1 2006-07-20 Thiemo Seufer <ths@mips.com>
3 * config/tc-mips.c (mips_fix_adjustable): Handle BFD_RELOC_MIPS16_JMP.
4 (tc_gen_reloc): Handle mips16 jumps to section symbol offsets.
6 2006-07-19 Paul Brook <paul@codesourcery.com>
8 * config/tc-arm.c (insns): Fix rbit Arm opcode.
10 2006-07-18 Paul Brook <paul@codesourcery.com>
12 * tc-arm.c (do_t_add_sub): Use addw/subw when source is PC.
13 (md_convert_frag): Use correct reloc for add_pc. Use
14 BFD_RELOC_ARM_T32_ADD_IMM for normal add/sum.
15 (md_apply_fix): Handle BFD_RELOC_ARM_T32_ADD_IMM.
16 (arm_force_relocation): Handle BFD_RELOC_ARM_T32_ADD_IMM.
18 2006-07-17 Mat Hostetter <mat@lcs.mit.edu>
20 * symbols.c (report_op_error): Fix pasto. Don't use as_bad_where
21 when file and line unknown.
23 2006-07-17 Thiemo Seufer <ths@mips.com>
25 * read.c (s_struct): Use IS_ELF.
26 * config/tc-mips.c (md_begin, mips16_mark_labels, mips_ip,
27 md_parse_option, s_change_sec, pic_need_relax, mips_fix_adjustable,
28 tc_gen_reloc, mips_frob_file_after_relocs, s_mips_end, s_mips_frame,
29 s_mips_mask): Likewise.
31 2006-07-16 Thiemo Seufer <ths@mips.com>
32 David Ung <davidu@mips.com>
34 * read.c (s_struct): Handle ELF section changing.
35 * config/tc-mips.c (s_align): Leave enabling auto-align to the
37 (s_change_sec): Try section changing only if we output ELF.
39 2006-07-15 H.J. Lu <hongjiu.lu@intel.com>
41 * config/tc-i386.c (cpu_arch): Remove Cpu086, CpuAthlon and
43 (smallest_imm_type): Remove Cpu086.
44 (i386_target_format): Likewise.
46 * config/tc-i386.h: Remove Cpu086, CpuAthlon and CpuAmdFam10.
49 2006-07-13 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
50 Michael Meissner <michael.meissner@amd.com>
52 * config/tc-i386.h (PROCESSOR_AMDFAM10): New processor_type.
53 (CpuSSE4a, CpuABM, CpuAmdFam10): New Cpu directives.
54 * config/tc-i386.c (cpu_arch): Add support for AmdFam10
56 (i386_align_code): Ditto.
57 (md_assemble_code): Add support for insertq/extrq instructions,
58 swapping as needed for intel syntax.
59 (swap_imm_operands): New function to swap immediate operands.
60 (swap_operands): Deal with 4 operand instructions.
61 (build_modrm_byte): Add support for insertq instruction.
63 2006-07-13 H.J. Lu <hongjiu.lu@intel.com>
65 * config/tc-i386.h (Size64): Fix a typo in comment.
67 2006-07-12 Nick Clifton <nickc@redhat.com>
69 * config/tc-sh.c (md_apply_fix): Do not allow the generic code in
70 fixup_segment() to repeat a range check on a value that has
71 already been checked here.
73 2006-07-07 James E Wilson <wilson@specifix.com>
75 * config/tc-mips.c (mips_cpu_info_table): Add sb1a.
77 2006-07-06 Mohammed Adnène Trojette <adn@diwi.org>
78 Nick Clifton <nickc@redhat.com>
81 * doc/as.texi: Fix spelling typo: branchs => branches.
82 * doc/c-m68hc11.texi: Likewise.
83 * config/tc-m68hc11.c: Likewise.
84 Support old spelling of command line switch for backwards
87 2006-07-04 Thiemo Seufer <ths@mips.com>
88 David Ung <davidu@mips.com>
90 * config/tc-mips.c (s_is_linkonce): New function.
91 (mips16_mark_labels): Don't adjust mips16 symbol addresses for
92 weak, external, and linkonce symbols.
93 (pic_need_relax): Use s_is_linkonce.
95 2006-06-24 H.J. Lu <hongjiu.lu@intel.com>
97 * doc/as.texinfo (Org): Remove space.
98 (P2align): Add "@var{abs-expr},".
100 2006-06-23 H.J. Lu <hongjiu.lu@intel.com>
102 * config/tc-i386.c (cpu_arch_tune_set): New.
103 (cpu_arch_isa): Likewise.
104 (i386_align_code): Use xchg %ax,%ax for 2 byte nop. Optimize
105 nops with short or long nop sequences based on -march=/.arch
107 (set_cpu_arch): Set cpu_arch_isa. If cpu_arch_tune_set is 0,
108 set cpu_arch_tune and cpu_arch_tune_flags.
109 (md_parse_option): For -march=, set cpu_arch_isa and set
110 cpu_arch_tune and cpu_arch_tune_flags if cpu_arch_tune_set is
111 0. Set cpu_arch_tune_set to 1 for -mtune=.
112 (i386_target_format): Don't set cpu_arch_tune.
114 2006-06-23 Nigel Stephens <nigel@mips.com>
116 * config/tc-mips.c (nopic_need_relax): Handle -fdata-sections
117 generated .sbss.* and .gnu.linkonce.sb.*.
119 2006-06-23 Thiemo Seufer <ths@mips.com>
120 David Ung <davidu@mips.com>
122 * config/tc-mips.h (TC_SEGMENT_INFO_TYPE): Declare per-segment
124 * config/tc-mips.c (label_list): Define per-segment label_list.
125 (mips_clear_insn_labels, mips_move_labels, mips16_mark_labels,
126 append_insn, s_align, s_cons, s_float_cons, s_gpword, s_gpdword,
127 mips_from_file_after_relocs, mips_define_label): Use per-segment
130 2006-06-22 Thiemo Seufer <ths@mips.com>
132 * config/tc-mips.c (ISA_SUPPORTS_MIPS16E): New macro.
133 (append_insn): Use it.
134 (md_apply_fix): Whitespace formatting.
135 (md_begin, append_insn, macro, macro2, mips16_immed, mips_align,
136 mips16_extended_frag): Remove register specifier.
137 (md_convert_frag): Likewise. Use TRUE ans FALSE instead of numeric
140 2006-06-21 Mark Shinwell <shinwell@codesourcery.com>
142 * config/tc-arm.c (s_arm_unwind_save_vfp_armv6): New. Parse
143 a directive saving VFP registers for ARMv6 or later.
144 (s_arm_unwind_save): Add parameter arch_v6 and call
145 s_arm_unwind_save_vfp or s_arm_unwind_save_vfp_armv6 as
147 (md_pseudo_table): Add entry for new "vsave" directive.
148 * doc/c-arm.texi: Correct error in example for "save"
149 directive (fstmdf -> fstmdx). Also document "vsave" directive.
151 2006-06-18 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
152 Anatoly Sokolov <aesok@post.ru>
154 * config/tc-avr.c (mcu_types): Add support for atmega165p, atmega169p
155 and atmega644p devices. Rename atmega164/atmega324 devices to
156 atmega164p/atmega324p.
157 * doc/c-avr.texi: Document new mcu and arch options.
159 2006-06-17 Nick Clifton <nickc@redhat.com>
161 * config/tc-arm.c (enum parse_operand_result): Move outside of
162 #ifdef OBJ_ELF so that non-ELF targeted ARM ports can build.
164 2006-06-16 H.J. Lu <hongjiu.lu@intel.com>
166 * config/tc-i386.h (processor_type): New.
167 (arch_entry): Add type.
169 * config/tc-i386.c (cpu_arch_tune): New.
170 (cpu_arch_tune_flags): Likewise.
171 (cpu_arch_isa_flags): Likewise.
173 (set_cpu_arch): Also update cpu_arch_isa_flags.
174 (md_assemble): Update cpu_arch_isa_flags.
176 (OPTION_MTUNE): Likewise.
177 (md_longopts): Add -march= and -mtune=.
178 (md_parse_option): Support -march= and -mtune=.
179 (md_show_usage): Add -march=CPU/-mtune=CPU.
180 (i386_target_format): Also update cpu_arch_isa_flags,
181 cpu_arch_tune and cpu_arch_tune_flags.
183 * doc/as.texinfo: Add -march=CPU/-mtune=CPU.
185 * doc/c-i386.texi: Document -march=CPU/-mtune=CPU.
187 2006-06-15 Mark Shinwell <shinwell@codesourcery.com>
189 * config/tc-arm.c (enum parse_operand_result): New.
190 (struct group_reloc_table_entry): New.
191 (enum group_reloc_type): New.
192 (group_reloc_table): New array.
193 (find_group_reloc_table_entry): New function.
194 (parse_shifter_operand_group_reloc): New function.
195 (parse_address_main): New function, incorporating code
196 from the old parse_address function. To be used via...
197 (parse_address): wrapper for parse_address_main; and
198 (parse_address_group_reloc): new function, likewise.
199 (enum operand_parse_code): New codes OP_SHG, OP_ADDRGLDR,
200 OP_ADDRGLDRS, OP_ADDRGLDC.
201 (parse_operands): Support for these new operand codes.
202 New macro po_misc_or_fail_no_backtrack.
203 (encode_arm_cp_address): Preserve group relocations.
204 (insns): Modify to use the above operand codes where group
205 relocations are permitted.
206 (md_apply_fix): Handle the group relocations
207 ALU_PC_G0_NC through LDC_SB_G2.
208 (tc_gen_reloc): Likewise.
209 (arm_force_relocation): Leave group relocations for the linker.
210 (arm_fix_adjustable): Likewise.
212 2006-06-15 Julian Brown <julian@codesourcery.com>
214 * config/tc-arm.c (do_vfp_nsyn_ldr_str): Remove, fold into...
215 (do_neon_ldr_str): Always defer to VFP encoding routines, which handle
218 2006-06-12 H.J. Lu <hongjiu.lu@intel.com>
220 * config/tc-i386.c (process_suffix): Don't add rex64 for
223 2006-06-09 Thiemo Seufer <ths@mips.com>
225 * config/tc-mips.c (mips_ip): Maintain argument count.
227 2006-06-09 Alan Modra <amodra@bigpond.net.au>
229 * config/tc-iq2000.c: Include sb.h.
231 2006-06-08 Nigel Stephens <nigel@mips.com>
233 * config/tc-mips.c (mips_pseudo_table): Add "origin" and "repeat"
234 aliases for better compatibility with SGI tools.
236 2006-06-08 Alan Modra <amodra@bigpond.net.au>
238 * configure.in (BFDLIB, BFDVER_H, ALL_OBJ_DEPS): Delete.
239 * Makefile.am (GASLIBS): Expand @BFDLIB@.
241 (OBJS): Expand @ALL_OBJ_DEPS@. Depend on all fopen-*.h variants.
242 (obj-aout.o): Depend on $(DEP_@target_get_type@_aout)
243 (obj-coff.o, obj-ecoff.o, obj-elf.o): Similarly.
245 * dep-in.sed: Don't substitute bfdver.h. Do remove symcat.h.
246 * Makefile.in: Regenerate.
247 * doc/Makefile.in: Regenerate.
248 * configure: Regenerate.
250 2006-06-07 Joseph S. Myers <joseph@codesourcery.com>
252 * po/Make-in (pdf, ps): New dummy targets.
254 2006-06-07 Julian Brown <julian@codesourcery.com>
256 * config/tc-arm.c (stdarg.h): include.
257 (arm_it): Add uncond_value field. Add isvec and issingle to operand
259 (arm_reg_type): Add REG_TYPE_VFSD (single or double VFP reg) and
260 REG_TYPE_NSDQ (single, double or quad vector reg).
261 (reg_expected_msgs): Update.
262 (BAD_FPU): Add macro for unsupported FPU instruction error.
263 (parse_neon_type): Support 'd' as an alias for .f64.
264 (parse_typed_reg_or_scalar): Support REG_TYPE_VFSD, REG_TYPE_NSDQ
266 (parse_vfp_reg_list): Don't update first arg on error.
267 (parse_neon_mov): Support extra syntax for VFP moves.
268 (operand_parse_code): Add OP_RVSD, OP_RNSDQ, OP_VRSDLST, OP_RVSD_IO,
269 OP_RNSDQ_RNSC, OP_RVC_PSR, OP_APSR_RR, OP_oRNSDQ.
270 (parse_operands): Support isvec, issingle operands fields, new parse
272 (do_vfp_nsyn_mrs, do_vfp_nsyn_msr): New functions. Support VFP mrs,
274 (do_mrs, do_msr, do_t_mrs, do_t_msr): Add support for above.
275 (NEON_ENC_TAB): Add vnmul, vnmla, vnmls, vcmp, vcmpz, vcmpe, vcmpez.
276 (NEON_ENC_SINGLE, NEON_ENC_DOUBLE): Define macros.
277 (NEON_SHAPE_DEF): New macro. Define table of possible instruction
279 (neon_shape): Redefine in terms of above.
280 (neon_shape_class): New enumeration, table of shape classes.
281 (neon_shape_el): New enumeration. One element of a shape.
282 (neon_shape_el_size): Register widths of above, where appropriate.
283 (neon_shape_info): New struct. Info for shape table.
284 (neon_shape_tab): New array.
285 (neon_type_mask): Add N_F64, N_VFP. Update N_MAX_NONSPECIAL.
286 (neon_check_shape): Rewrite as...
287 (neon_select_shape): New function to classify instruction shapes,
288 driven by new table neon_shape_tab array.
289 (neon_quad): New function. Return 1 if shape should set Q flag in
290 instructions (or equivalent), 0 otherwise.
291 (type_chk_of_el_type): Support F64.
292 (el_type_of_type_chk): Likewise.
293 (neon_check_type): Add support for VFP type checking (VFP data
294 elements fill their containing registers).
295 (do_vfp_cond_or_thumb): Fill in condition field in ARM mode, or 0xE
296 in thumb mode for VFP instructions.
297 (do_vfp_nsyn_opcode): New function. Look up the opcode in argument,
298 and encode the current instruction as if it were that opcode.
299 (try_vfp_nsyn): New. If this looks like a VFP instruction with ARGS
300 arguments, call function in PFN.
301 (do_vfp_nsyn_add_sub, do_vfp_nsyn_mla_mls, do_vfp_nsyn_mul)
302 (do_vfp_nsyn_abs_neg, do_vfp_nsyn_ldm_stm, do_vfp_nsyn_ldr_str)
303 (do_vfp_nsyn_sqrt, do_vfp_nsyn_div, do_vfp_nsyn_nmul)
304 (do_vfp_nsyn_cmp, nsyn_insert_sp, do_vfp_nsyn_push)
305 (do_vfp_nsyn_pop, do_vfp_nsyn_cvt, do_vfp_nsyn_cvtz): New functions.
306 Redirect Neon-syntax VFP instructions to VFP instruction handlers.
307 (do_neon_dyadic_i_su, do_neon_dyadic_i64_su, do_neon_shl_imm)
308 (do_neon_qshl_imm, do_neon_logic, do_neon_bitfield)
309 (neon_dyadic_misc, neon_compare, do_neon_tst, do_neon_qdmulh)
310 (do_neon_fcmp_absolute, do_neon_step, do_neon_sli, do_neon_sri)
311 (do_neon_qshlu_imm, neon_move_immediate, do_neon_mvn, do_neon_ext)
312 (do_neon_rev, do_neon_dup, do_neon_rshift_round_imm, do_neon_trn)
313 (do_neon_zip_uzp, do_neon_sat_abs_neg, do_neon_pair_long)
314 (do_neon_recip_est, do_neon_cls, do_neon_clz, do_neon_cnt)
315 (do_neon_swp): Use neon_select_shape not neon_check_shape. Use
317 (vfp_or_neon_is_neon): New function. Call if a mnemonic shared
318 between VFP and Neon turns out to belong to Neon. Perform
319 architecture check and fill in condition field if appropriate.
320 (do_neon_addsub_if_i, do_neon_mac_maybe_scalar, do_neon_abs_neg)
321 (do_neon_cvt): Add support for VFP variants of instructions.
322 (neon_cvt_flavour): Extend to cover VFP conversions.
323 (do_neon_mov): Rewrite to use neon_select_shape. Add support for VFP
325 (do_neon_ldr_str): Handle single-precision VFP load/store.
326 (do_neon_ld_st_interleave, do_neon_ld_st_lane, do_neon_ld_dup): Use
327 NS_NULL not NS_IGNORE.
328 (opcode_tag): Add OT_csuffixF for operands which either take a
329 conditional suffix, or have 0xF in the condition field.
330 (md_assemble): Add support for OT_csuffixF.
331 (NCE): Replace macro with...
332 (NCE_tag, NCE, NCEF): New macros.
333 (nCE): Replace macro with...
334 (nCE_tag, nCE, nCEF): New macros.
335 (insns): Add support for VFP insns or VFP versions of insns msr,
336 mrs, vsqrt, vdiv, vnmul, vnmla, vnmls, vcmp, vcmpe, vpush, vpop,
337 vcvtz, vmul, vmla, vmls, vadd, vsub, vabs, vneg, vldm, vldmia,
338 vldbdb, vstm, vstmia, vstmdb, vldr, vstr, vcvt, vmov. Group shared
339 VFP/Neon insns together.
341 2006-06-07 Alan Modra <amodra@bigpond.net.au>
342 Ladislav Michl <ladis@linux-mips.org>
344 * app.c: Don't include headers already included by as.h.
346 * atof-generic.c: Likewise.
348 * dwarf2dbg.c: Likewise.
350 * input-file.c: Likewise.
351 * input-scrub.c: Likewise.
353 * output-file.c: Likewise.
356 * config/bfin-lex.l: Likewise.
357 * config/obj-coff.h: Likewise.
358 * config/obj-elf.h: Likewise.
359 * config/obj-som.h: Likewise.
360 * config/tc-arc.c: Likewise.
361 * config/tc-arm.c: Likewise.
362 * config/tc-avr.c: Likewise.
363 * config/tc-bfin.c: Likewise.
364 * config/tc-cris.c: Likewise.
365 * config/tc-d10v.c: Likewise.
366 * config/tc-d30v.c: Likewise.
367 * config/tc-dlx.h: Likewise.
368 * config/tc-fr30.c: Likewise.
369 * config/tc-frv.c: Likewise.
370 * config/tc-h8300.c: Likewise.
371 * config/tc-hppa.c: Likewise.
372 * config/tc-i370.c: Likewise.
373 * config/tc-i860.c: Likewise.
374 * config/tc-i960.c: Likewise.
375 * config/tc-ip2k.c: Likewise.
376 * config/tc-iq2000.c: Likewise.
377 * config/tc-m32c.c: Likewise.
378 * config/tc-m32r.c: Likewise.
379 * config/tc-maxq.c: Likewise.
380 * config/tc-mcore.c: Likewise.
381 * config/tc-mips.c: Likewise.
382 * config/tc-mmix.c: Likewise.
383 * config/tc-mn10200.c: Likewise.
384 * config/tc-mn10300.c: Likewise.
385 * config/tc-msp430.c: Likewise.
386 * config/tc-mt.c: Likewise.
387 * config/tc-ns32k.c: Likewise.
388 * config/tc-openrisc.c: Likewise.
389 * config/tc-ppc.c: Likewise.
390 * config/tc-s390.c: Likewise.
391 * config/tc-sh.c: Likewise.
392 * config/tc-sh64.c: Likewise.
393 * config/tc-sparc.c: Likewise.
394 * config/tc-tic30.c: Likewise.
395 * config/tc-tic4x.c: Likewise.
396 * config/tc-tic54x.c: Likewise.
397 * config/tc-v850.c: Likewise.
398 * config/tc-vax.c: Likewise.
399 * config/tc-xc16x.c: Likewise.
400 * config/tc-xstormy16.c: Likewise.
401 * config/tc-xtensa.c: Likewise.
402 * config/tc-z80.c: Likewise.
403 * config/tc-z8k.c: Likewise.
404 * macro.h: Don't include sb.h or ansidecl.h.
405 * sb.h: Don't include stdio.h or ansidecl.h.
406 * cond.c: Include sb.h.
407 * itbl-lex.l: Include as.h instead of other system headers.
408 * itbl-parse.y: Likewise.
409 * itbl-ops.c: Similarly.
410 * itbl-ops.h: Don't include as.h or ansidecl.h.
411 * config/bfin-defs.h: Don't include bfd.h or as.h.
412 * config/bfin-parse.y: Include as.h instead of other system headers.
414 2006-06-06 Ben Elliston <bje@au.ibm.com>
415 Anton Blanchard <anton@samba.org>
417 * config/tc-ppc.c (parse_cpu): Handle "-mpower6".
418 (md_show_usage): Document it.
419 (ppc_setup_opcodes): Test power6 opcode flag bits.
420 * doc/c-ppc.texi (PowerPC-Opts): Document "-mpower6".
422 2006-06-06 Thiemo Seufer <ths@mips.com>
423 Chao-ying Fu <fu@mips.com>
425 * config/tc-mips.c (ISA_SUPPORTS_DSP64): New macro.
426 (CPU_HAS_MIPS3D, CPU_HAS_MDMX, CPU_HAS_DSP, CPU_HAS_MT): Delete.
427 (macro_build): Update comment.
428 (mips_ip): Allow DSP64 instructions for MIPS64R2.
429 (mips_after_parse_args): Remove uses of CPU_HAS_MIPS3D and
431 (mips_cpu_info): Fix formatting. Add MIPS_CPU_ASE_MIPS3D and
432 MIPS_CPU_ASE_MDMX flags for sb1.
434 2006-06-05 Thiemo Seufer <ths@mips.com>
436 * config/tc-mips.c (macro_build): Use INSERT_OPERAND wherew
438 (mips16_macro_build): Use MIPS16_INSERT_OPERAND where appropriate.
439 (mips_ip): Make overflowed/underflowed constant arguments in DSP
440 and MT instructions a fatal error. Use INSERT_OPERAND where
441 appropriate. Improve warnings for break and wait code overflows.
442 Use symbolic constant of OP_MASK_COPZ.
443 (mips16_ip): Use MIPS16_INSERT_OPERAND where appropriate.
445 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
447 * po/Make-in (top_builddir): Define.
449 2006-06-02 Joseph S. Myers <joseph@codesourcery.com>
451 * doc/Makefile.am (TEXI2DVI): Define.
452 * doc/Makefile.in: Regenerate.
453 * doc/c-arc.texi: Fix typo.
455 2006-06-01 Alan Modra <amodra@bigpond.net.au>
457 * config/obj-ieee.c: Delete.
458 * config/obj-ieee.h: Delete.
459 * Makefile.am (OBJ_FORMATS): Remove ieee.
460 (OBJ_FORMAT_CFILES, OBJ_FORMAT_HFILES): Similarly.
461 (obj-ieee.o): Remove rule.
462 * Makefile.in: Regenerate.
463 * configure.in (atof): Remove tahoe.
464 (OBJ_MAYBE_IEEE): Don't define.
465 * configure: Regenerate.
466 * config.in: Regenerate.
467 * doc/Makefile.in: Regenerate.
468 * po/POTFILES.in: Regenerate.
470 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
472 * Makefile.am: Replace INTLLIBS and INTLDEPS with LIBINTL
473 and LIBINTL_DEP everywhere.
475 (INCLUDES, DEP_INCLUDES): Use @INCINTL@.
476 * acinclude.m4: Include new gettext macros.
477 * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
478 Remove local code for po/Makefile.
479 * Makefile.in, configure, doc/Makefile.in: Regenerated.
481 2006-05-30 Nick Clifton <nickc@redhat.com>
483 * po/es.po: Updated Spanish translation.
485 2006-05-06 Denis Chertykov <denisc@overta.ru>
487 * doc/c-avr.texi: New file.
488 * doc/Makefile.am (CPU_DOCS): Add c-avr.texi
489 * doc/all.texi: Set AVR
490 * doc/as.texinfo: Include c-avr.texi
492 2006-05-28 Jie Zhang <jie.zhang@analog.com>
494 * config/bfin-parse.y (check_macfunc): Loose the condition of
495 calling check_multiply_halfregs ().
497 2006-05-25 Jie Zhang <jie.zhang@analog.com>
499 * config/bfin-parse.y (asm_1): Better check and deal with
500 vector and scalar Multiply 16-Bit Operands instructions.
502 2006-05-24 Nick Clifton <nickc@redhat.com>
504 * config/tc-hppa.c: Convert to ISO C90 format.
505 * config/tc-hppa.h: Likewise.
507 2006-05-24 Carlos O'Donell <carlos@systemhalted.org>
508 Randolph Chung <randolph@tausq.org>
510 * config/tc-hppa.c (is_tls_gdidx, is_tls_ldidx, is_tls_dtpoff,
511 is_tls_ieoff, is_tls_leoff): Define.
512 (fix_new_hppa): Handle TLS.
513 (cons_fix_new_hppa): Likewise.
515 (md_apply_fix): Handle TLS relocs.
516 * config/tc-hppa.h (hppa_fix_adjustable): Handle TLS.
518 2006-05-24 Bjoern Haase <bjoern.m.haase@web.de>
520 * config/tc-avr.c: Add new cpu targets avr6, avr2560 and avr2561.
522 2006-05-23 Thiemo Seufer <ths@mips.com>
523 David Ung <davidu@mips.com>
524 Nigel Stephens <nigel@mips.com>
527 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS): Rename.
528 (ISA_SUPPORTS_DSP_ASE, ISA_SUPPORTS_MT_ASE, ISA_HAS_64BIT_FPRS,
529 ISA_HAS_MXHC1): New macros.
530 (HAVE_32BIT_FPRS): Use ISA_HAS_64BIT_FPRS instead of
531 ISA_HAS_64BIT_REGS. Formatting fixes. Improved comments.
532 (mips_cpu_info): Change to use combined ASE/IS_ISA flag.
533 (MIPS_CPU_IS_ISA, MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP,
534 MIPS_CPU_ASE_MT, MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX): New defines.
535 (mips_after_parse_args): Change default handling of float register
536 size to account for 32bit code with 64bit FP. Better sanity checking
537 of ISA/ASE/ABI option combinations.
538 (s_mipsset): Support switching of GPR and FPR sizes via
539 .set {g,f}p={32,64,default}. Better sanity checking for .set ASE
541 (mips_elf_final_processing): We should record the use of 64bit FP
542 registers in 32bit code but we don't, because ELF header flags are
544 (mips_cpu_info_table): Add ASE flags for CPUs with mandatory ASE
545 extensions. Add 4ksc, 4kec, 4kem, 4kep, 4ksd, m4kp, 24kec, 24kef,
546 24kex, 34kc, 34kf, 34kx, 25kf CPU definitions.
547 (mips_cpu_info_from_isa): Use MIPS_CPU_IS_ISA.
548 * doc/c-mips.texi: Document .set {g,f}p={32,64,default}. Document
549 missing -march options. Document .set arch=CPU. Move .set smartmips
550 to ASE page. Use @code for .set FOO examples.
552 2006-05-23 Jie Zhang <jie.zhang@analog.com>
554 * config/tc-bfin.c (bfin_start_line_hook): Bump line counters
557 2006-05-23 Jie Zhang <jie.zhang@analog.com>
559 * config/bfin-defs.h (bfin_equals): Remove declaration.
560 * config/bfin-parse.y (asm_1): Remove "expr ASSIGN expr".
561 * config/tc-bfin.c (bfin_name_is_register): Remove.
562 (bfin_equals): Remove.
563 * config/tc-bfin.h (TC_EQUAL_IN_INSN): Redefine as 1.
564 (bfin_name_is_register): Remove declaration.
566 2006-05-19 Thiemo Seufer <ths@mips.com>
567 Nigel Stephens <nigel@mips.com>
569 * config/tc-mipc.c (ISA_HAS_ODD_SINGLE_FPR): New define.
570 (mips_oddfpreg_ok): New function.
573 2006-05-19 Thiemo Seufer <ths@mips.com>
574 David Ung <davidu@mips.com>
576 * config/tc-mips.h (tc_mips_regname_to_dw2regnum): Declare.
577 * config/tc-mipc.c (ABI_NEEDS_64BIT_REGS, ISA_HAS_64BIT_REGS,
578 ISA_HAS_DROR, ISA_HAS_ROR): Reformat.
579 (regname, RTYPE_MASK, RTYPE_NUM, RTYPE_FPU, RTYPE_FCC, RTYPE_VEC,
580 RTYPE_GP, RTYPE_CP0, RTYPE_PC, RTYPE_ACC, RTYPE_CCC, RNUM_MASK,
581 RWARN, GENERIC_REGISTER_NUMBERS, FPU_REGISTER_NAMES,
582 FPU_CONDITION_CODE_NAMES, COPROC_CONDITION_CODE_NAMES,
583 N32N64_SYMBOLIC_REGISTER_NAMES, O32_SYMBOLIC_REGISTER_NAMES,
584 SYMBOLIC_REGISTER_NAMES, MIPS16_SPECIAL_REGISTER_NAMES,
585 MDMX_VECTOR_REGISTER_NAMES, MIPS_DSP_ACCUMULATOR_NAMES, reg_names,
586 reg_names_o32, reg_names_n32n64): Define register classes.
587 (reg_lookup): New function, use register classes.
588 (md_begin): Reserve register names in the symbol table. Simplify
590 (mips_ip): Fix comment formatting. Handle symbolic COP0 registers.
592 (mips16_ip): Use reg_lookup.
593 (tc_get_register): Likewise.
594 (tc_mips_regname_to_dw2regnum): New function.
596 2006-05-19 Thiemo Seufer <ths@mips.com>
598 * config/tc-arm.c, config/tc-arm.h (tc_arm_regname_to_dw2regnum):
599 Un-constify string argument.
600 * config/tc-i386.c, config/tc-i386.h (tc_x86_regname_to_dw2regnum):
602 * config/tc-m68k.c, config/tc-m68k.h (tc_m68k_regname_to_dw2regnum):
604 * config/tc-ppc.c, config/tc-ppc.h (tc_ppc_regname_to_dw2regnum):
606 * config/tc-s390.c, config/tc-s390.h (tc_s390_regname_to_dw2regnum):
608 * config/tc-sh.c, config/tc-sh.h (sh_regname_to_dw2regnum):
610 * config/tc-sparc.c, config/tc-sparc.h (sparc_regname_to_dw2regnum):
613 2006-05-19 Nathan Sidwell <nathan@codesourcery.com>
615 * gas/config/tc-m68k.c (m68k_init_arch): Move checking of
616 cfloat/m68881 to correct architecture before using it.
618 2006-05-16 Bjoern Haase <bjoern.m.haase@web.de>
620 * config/tc-avr.h (TC_VALIDATE_FIX): Allow fixups for immediate
623 2006-05-15 Paul Brook <paul@codesourcery.com>
625 * config/tc-arm.c (arm_adjust_symtab): Use
626 bfd_is_arm_special_symbol_name.
628 2006-05-15 Bob Wilson <bob.wilson@acm.org>
630 * config/tc-xtensa.c (is_direct_call_opcode, is_branch_jmp_to_next,
631 xg_assemble_vliw_tokens, xtensa_mark_narrow_branches,
632 xtensa_fix_short_loop_frags, is_local_forward_loop, relax_frag_immed):
633 Handle errors from calls to xtensa_opcode_is_* functions.
635 2006-05-14 Thiemo Seufer <ths@mips.com>
637 * config/tc-mips.c (macro_build): Test for currently active
639 (mips16_ip): Reject invalid opcodes.
641 2006-05-11 Carlos O'Donell <carlos@codesourcery.com>
643 * doc/as.texinfo: Rename "Index" to "AS Index",
644 and "ABORT" to "ABORT (COFF)".
646 2006-05-11 Paul Brook <paul@codesourcery.com>
648 * config/tc-arm.c (parse_half): New function.
649 (operand_parse_code): Remove OP_Iffff. Add OP_HALF.
650 (parse_operands): Ditto.
651 (do_mov16): Reject invalid relocations.
652 (do_t_mov16): Ditto. Use Thumb reloc numbers.
653 (insns): Replace Iffff with HALF.
654 (md_apply_fix): Add MOVW and MOVT relocs.
655 (tc_gen_reloc): Ditto.
656 * doc/c-arm.texi: Document relocation operators
658 2006-05-11 Paul Brook <paul@codesourcery.com>
660 * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
662 2006-05-11 Thiemo Seufer <ths@mips.com>
664 * config/tc-mips.c (append_insn): Don't check the range of j or
667 2006-05-11 Pedro Alves <pedro_alves@portugalmail.pt>
669 * config/tc-arm.c (md_pcrel_from_section): Force a bias for
670 relocs against external symbols for WinCE targets.
671 (md_apply_fix): Likewise.
673 2006-05-09 David Ung <davidu@mips.com>
675 * config/tc-mips.c (append_insn): Only warn about an out-of-range
678 2006-05-09 Nick Clifton <nickc@redhat.com>
680 * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups
681 against symbols which are not going to be placed into the symbol
684 2006-05-09 Ben Elliston <bje@au.ibm.com>
686 * expr.c (operand): Remove `if (0 && ..)' statement and
687 subsequently unused target_op label. Collapse `if (1 || ..)'
689 * app.c (do_scrub_chars): Remove unused case 0, as it is handled
690 separately above the switch.
692 2006-05-08 Nick Clifton <nickc@redhat.com>
695 * config/tc-msp430.c (line_separator_character): Define as |.
697 2006-05-08 Thiemo Seufer <ths@mips.com>
698 Nigel Stephens <nigel@mips.com>
699 David Ung <davidu@mips.com>
701 * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
702 (mips_opts): Likewise.
703 (file_ase_smartmips): New variable.
704 (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
705 (macro_build): Handle SmartMIPS instructions.
707 (md_longopts): Add argument handling for smartmips.
708 (md_parse_options, mips_after_parse_args): Likewise.
709 (s_mipsset): Add .set smartmips support.
710 (md_show_usage): Document -msmartmips/-mno-smartmips.
711 * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
713 * doc/c-mips.texi: Likewise.
715 2006-05-08 Alan Modra <amodra@bigpond.net.au>
717 * write.c (relax_segment): Add pass count arg. Don't error on
718 negative org/space on first two passes.
719 (relax_seg_info): New struct.
720 (relax_seg, write_object_file): Adjust.
721 * write.h (relax_segment): Update prototype.
723 2006-05-05 Julian Brown <julian@codesourcery.com>
725 * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
727 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
728 architecture version checks.
729 (insns): Allow overlapping instructions to be used in VFP mode.
731 2006-05-05 H.J. Lu <hongjiu.lu@intel.com>
734 * config/obj-elf.c (obj_elf_change_section): Allow user
735 specified SHF_ALPHA_GPREL.
737 2006-05-05 Bjoern Haase <bjoern.m.haase@web.de>
739 * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups
740 for PMEM related expressions.
742 2006-05-05 Nick Clifton <nickc@redhat.com>
745 * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the
746 insertion of a directory separator character into a string at a
747 given offset. Uses heuristics to decide when to use a backslash
748 character rather than a forward-slash character.
749 (dwarf2_directive_loc): Use the macro.
750 (out_debug_info): Likewise.
752 2006-05-05 Thiemo Seufer <ths@mips.com>
753 David Ung <davidu@mips.com>
755 * config/tc-mips.c (macro_build): Add case 'k' to handle cache
757 (macro): Add new case M_CACHE_AB.
759 2006-05-04 Kazu Hirata <kazu@codesourcery.com>
761 * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
762 (opcode_lookup): Issue a warning for opcode with
763 OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated
764 identical to OT_cinfix3.
765 (TxC3w, TC3w, tC3w): New.
766 (insns): Use tC3w and TC3w for comparison instructions with
769 2006-05-04 Alan Modra <amodra@bigpond.net.au>
771 * subsegs.h (struct frchain): Delete frch_seg.
772 (frchain_root): Delete.
773 (seg_info): Define as macro.
774 * subsegs.c (frchain_root): Delete.
775 (abs_seg_info, und_seg_info, absolute_frchain): Delete.
776 (subsegs_begin, subseg_change): Adjust for above.
777 (subseg_set_rest): Likewise. Add new frchain structs to seginfo
778 rather than to one big list.
779 (subseg_get): Don't special case abs, und sections.
780 (subseg_new, subseg_force_new): Don't set frchainP here.
782 (subsegs_print_statistics): Adjust frag chain control list traversal.
783 * debug.c (dmp_frags): Likewise.
784 * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
785 at frchain_root. Make use of known frchain ordering.
786 (last_frag_for_seg): Likewise.
787 (get_frag_fix): Likewise. Add seg param.
788 (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
789 * write.c (chain_frchains_together_1): Adjust for struct frchain.
790 (SUB_SEGMENT_ALIGN): Likewise.
791 (subsegs_finish): Adjust frchain list traversal.
792 * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
793 (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
794 (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
795 (xtensa_fix_b_j_loop_end_frags): Likewise.
796 (xtensa_fix_close_loop_end_frags): Likewise.
797 (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
798 (retrieve_segment_info): Delete frch_seg initialisation.
800 2006-05-03 Alan Modra <amodra@bigpond.net.au>
802 * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
803 * config/obj-elf.h (obj_sec_set_private_data): Delete.
804 * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
805 * config/tc-mn10300.c (tc_gen_reloc): Likewise.
807 2006-05-02 Joseph Myers <joseph@codesourcery.com>
809 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
811 (md_apply_fix3): Multiply offset by 4 here for
812 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
814 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
815 Jan Beulich <jbeulich@novell.com>
817 * config/tc-i386.c (output_invalid_buf): Change size for
819 * config/tc-tic30.c (output_invalid_buf): Likewise.
821 * config/tc-i386.c (output_invalid): Cast none-ascii char to
823 * config/tc-tic30.c (output_invalid): Likewise.
825 2006-05-02 Daniel Jacobowitz <dan@codesourcery.com>
827 * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
828 (TEXI2POD): Use AM_MAKEINFOFLAGS.
829 (asconfig.texi): Don't set top_srcdir.
830 * doc/as.texinfo: Don't use top_srcdir.
831 * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
833 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
835 * config/tc-i386.c (output_invalid_buf): Change size to 16.
836 * config/tc-tic30.c (output_invalid_buf): Likewise.
838 * config/tc-i386.c (output_invalid): Use snprintf instead of
840 * config/tc-ia64.c (declare_register_set): Likewise.
841 (emit_one_bundle): Likewise.
842 (check_dependencies): Likewise.
843 * config/tc-tic30.c (output_invalid): Likewise.
845 2006-05-02 Paul Brook <paul@codesourcery.com>
847 * config/tc-arm.c (arm_optimize_expr): New function.
848 * config/tc-arm.h (md_optimize_expr): Define
849 (arm_optimize_expr): Add prototype.
850 (TC_FORCE_RELOCATION_SUB_SAME): Define.
852 2006-05-02 Ben Elliston <bje@au.ibm.com>
854 * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
857 * sb.h (sb_list_vector): Move to sb.c.
858 * sb.c (free_list): Use type of sb_list_vector directly.
859 (sb_build): Fix off-by-one error in assertion about `size'.
861 2006-05-01 Ben Elliston <bje@au.ibm.com>
863 * listing.c (listing_listing): Remove useless loop.
864 * macro.c (macro_expand): Remove is_positional local variable.
865 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
866 and simplify surrounding expressions, where possible.
867 (assign_symbol): Likewise.
868 (s_weakref): Likewise.
869 * symbols.c (colon): Likewise.
871 2006-05-01 James Lemke <jwlemke@wasabisystems.com>
873 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
875 2006-04-30 Thiemo Seufer <ths@mips.com>
876 David Ung <davidu@mips.com>
878 * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
879 (mips_immed): New table that records various handling of udi
880 instruction patterns.
881 (mips_ip): Adds udi handling.
883 2006-04-28 Alan Modra <amodra@bigpond.net.au>
885 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
886 of list rather than beginning.
888 2006-04-26 Julian Brown <julian@codesourcery.com>
890 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
891 (is_quarter_float): Rename from above. Simplify slightly.
892 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
894 (parse_neon_mov): Parse floating-point constants.
895 (neon_qfloat_bits): Fix encoding.
896 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
897 preference to integer encoding when using the F32 type.
899 2006-04-26 Julian Brown <julian@codesourcery.com>
901 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
902 zero-initialising structures containing it will lead to invalid types).
903 (arm_it): Add vectype to each operand.
904 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
906 (neon_typed_alias): New structure. Extra information for typed
908 (reg_entry): Add neon type info field.
909 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
910 Break out alternative syntax for coprocessor registers, etc. into...
911 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
912 out from arm_reg_parse.
913 (parse_neon_type): Move. Return SUCCESS/FAIL.
914 (first_error): New function. Call to ensure first error which occurs is
916 (parse_neon_operand_type): Parse exactly one type.
917 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
918 (parse_typed_reg_or_scalar): New function. Handle core of both
919 arm_typed_reg_parse and parse_scalar.
920 (arm_typed_reg_parse): Parse a register with an optional type.
921 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
923 (parse_scalar): Parse a Neon scalar with optional type.
924 (parse_reg_list): Use first_error.
925 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
926 (neon_alias_types_same): New function. Return true if two (alias) types
928 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
930 (insert_reg_alias): Return new reg_entry not void.
931 (insert_neon_reg_alias): New function. Insert type/index information as
932 well as register for alias.
933 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
934 make typed register aliases accordingly.
935 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
937 (s_unreq): Delete type information if present.
938 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
939 (s_arm_unwind_save_mmxwcg): Likewise.
940 (s_arm_unwind_movsp): Likewise.
941 (s_arm_unwind_setfp): Likewise.
942 (parse_shift): Likewise.
943 (parse_shifter_operand): Likewise.
944 (parse_address): Likewise.
945 (parse_tb): Likewise.
946 (tc_arm_regname_to_dw2regnum): Likewise.
947 (md_pseudo_table): Add dn, qn.
948 (parse_neon_mov): Handle typed operands.
949 (parse_operands): Likewise.
950 (neon_type_mask): Add N_SIZ.
951 (N_ALLMODS): New macro.
952 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
953 (el_type_of_type_chk): Add some safeguards.
954 (modify_types_allowed): Fix logic bug.
955 (neon_check_type): Handle operands with types.
956 (neon_three_same): Remove redundant optional arg handling.
957 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
958 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
959 (do_neon_step): Adjust accordingly.
960 (neon_cmode_for_logic_imm): Use first_error.
961 (do_neon_bitfield): Call neon_check_type.
962 (neon_dyadic): Rename to...
963 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
964 to allow modification of type of the destination.
965 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
966 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
967 (do_neon_compare): Make destination be an untyped bitfield.
968 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
969 (neon_mul_mac): Return early in case of errors.
970 (neon_move_immediate): Use first_error.
971 (neon_mac_reg_scalar_long): Fix type to include scalar.
972 (do_neon_dup): Likewise.
973 (do_neon_mov): Likewise (in several places).
974 (do_neon_tbl_tbx): Fix type.
975 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
976 (do_neon_ld_dup): Exit early in case of errors and/or use
978 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
979 Handle .dn/.qn directives.
980 (REGDEF): Add zero for reg_entry neon field.
982 2006-04-26 Julian Brown <julian@codesourcery.com>
984 * config/tc-arm.c (limits.h): Include.
985 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
986 (fpu_vfp_v3_or_neon_ext): Declare constants.
987 (neon_el_type): New enumeration of types for Neon vector elements.
988 (neon_type_el): New struct. Define type and size of a vector element.
989 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
991 (neon_type): Define struct. The type of an instruction.
992 (arm_it): Add 'vectype' for the current instruction.
993 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
994 (vfp_sp_reg_pos): Rename to...
995 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
997 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
998 (Neon D or Q register).
999 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
1001 (GE_OPT_PREFIX_BIG): Define constant, for use in...
1002 (my_get_expression): Allow above constant as argument to accept
1003 64-bit constants with optional prefix.
1004 (arm_reg_parse): Add extra argument to return the specific type of
1005 register in when either a D or Q register (REG_TYPE_NDQ) is
1006 requested. Can be NULL.
1007 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
1008 (parse_reg_list): Update for new arm_reg_parse args.
1009 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
1010 (parse_neon_el_struct_list): New function. Parse element/structure
1011 register lists for VLD<n>/VST<n> instructions.
1012 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
1013 (s_arm_unwind_save_mmxwr): Likewise.
1014 (s_arm_unwind_save_mmxwcg): Likewise.
1015 (s_arm_unwind_movsp): Likewise.
1016 (s_arm_unwind_setfp): Likewise.
1017 (parse_big_immediate): New function. Parse an immediate, which may be
1018 64 bits wide. Put results in inst.operands[i].
1019 (parse_shift): Update for new arm_reg_parse args.
1020 (parse_address): Likewise. Add parsing of alignment specifiers.
1021 (parse_neon_mov): Parse the operands of a VMOV instruction.
1022 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
1023 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
1024 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
1025 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
1026 (parse_operands): Handle new codes above.
1027 (encode_arm_vfp_sp_reg): Rename to...
1028 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
1029 selected VFP version only supports D0-D15.
1030 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
1031 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
1032 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
1033 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
1034 encode_arm_vfp_reg name, and allow 32 D regs.
1035 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
1036 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
1038 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
1039 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
1040 constant-load and conversion insns introduced with VFPv3.
1041 (neon_tab_entry): New struct.
1042 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
1043 those which are the targets of pseudo-instructions.
1044 (neon_opc): Enumerate opcodes, use as indices into...
1045 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
1046 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
1047 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
1048 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
1050 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
1052 (neon_type_mask): New. Compact type representation for type checking.
1053 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
1054 permitted type combinations.
1055 (N_IGNORE_TYPE): New macro.
1056 (neon_check_shape): New function. Check an instruction shape for
1057 multiple alternatives. Return the specific shape for the current
1059 (neon_modify_type_size): New function. Modify a vector type and size,
1060 depending on the bit mask in argument 1.
1061 (neon_type_promote): New function. Convert a given "key" type (of an
1062 operand) into the correct type for a different operand, based on a bit
1064 (type_chk_of_el_type): New function. Convert a type and size into the
1065 compact representation used for type checking.
1066 (el_type_of_type_ckh): New function. Reverse of above (only when a
1067 single bit is set in the bit mask).
1068 (modify_types_allowed): New function. Alter a mask of allowed types
1069 based on a bit mask of modifications.
1070 (neon_check_type): New function. Check the type of the current
1071 instruction against the variable argument list. The "key" type of the
1072 instruction is returned.
1073 (neon_dp_fixup): New function. Fill in and modify instruction bits for
1074 a Neon data-processing instruction depending on whether we're in ARM
1075 mode or Thumb-2 mode.
1076 (neon_logbits): New function.
1077 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
1078 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
1079 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
1080 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
1081 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
1082 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
1083 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1084 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
1085 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
1086 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
1087 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
1088 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
1089 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
1090 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
1091 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
1092 (neon_move_immediate, do_neon_mvn, neon_mixed_length)
1093 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
1094 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
1095 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
1096 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
1097 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
1098 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
1099 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
1100 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
1101 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
1103 (parse_neon_type): New function. Parse Neon type specifier.
1104 (opcode_lookup): Allow parsing of Neon type specifiers.
1105 (REGNUM2, REGSETH, REGSET2): New macros.
1106 (reg_names): Add new VFPv3 and Neon registers.
1107 (NUF, nUF, NCE, nCE): New macros for opcode table.
1108 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
1109 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
1110 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
1111 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
1112 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
1113 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
1114 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
1115 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
1116 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
1117 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
1118 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
1119 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
1120 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
1121 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
1123 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
1124 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
1125 (arm_option_cpu_value): Add vfp3 and neon.
1126 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
1129 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1131 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
1132 syntax instead of hardcoded opcodes with ".w18" suffixes.
1133 (wide_branch_opcode): New.
1134 (build_transition): Use it to check for wide branch opcodes with
1135 either ".w18" or ".w15" suffixes.
1137 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1139 * config/tc-xtensa.c (xtensa_create_literal_symbol,
1140 xg_assemble_literal, xg_assemble_literal_space): Do not set the
1141 frag's is_literal flag.
1143 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1145 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
1147 2006-04-23 Kazu Hirata <kazu@codesourcery.com>
1149 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
1150 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
1151 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
1152 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
1153 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
1155 2005-04-20 Paul Brook <paul@codesourcery.com>
1157 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
1159 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
1161 2006-04-19 Alan Modra <amodra@bigpond.net.au>
1163 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
1164 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
1165 Make some cpus unsupported on ELF. Run "make dep-am".
1166 * Makefile.in: Regenerate.
1168 2006-04-19 Alan Modra <amodra@bigpond.net.au>
1170 * configure.in (--enable-targets): Indent help message.
1171 * configure: Regenerate.
1173 2006-04-18 H.J. Lu <hongjiu.lu@intel.com>
1176 * config/tc-i386.c (i386_immediate): Check illegal immediate
1179 2006-04-18 Alan Modra <amodra@bigpond.net.au>
1181 * config/tc-i386.c: Formatting.
1182 (output_disp, output_imm): ISO C90 params.
1184 * frags.c (frag_offset_fixed_p): Constify args.
1185 * frags.h (frag_offset_fixed_p): Ditto.
1187 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
1188 (COFF_MAGIC): Delete.
1190 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
1192 2006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
1194 * po/POTFILES.in: Regenerated.
1196 2006-04-16 Mark Mitchell <mark@codesourcery.com>
1198 * doc/as.texinfo: Mention that some .type syntaxes are not
1199 supported on all architectures.
1201 2006-04-14 Sterling Augustine <sterling@tensilica.com>
1203 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
1204 instructions when such transformations have been disabled.
1206 2006-04-10 Sterling Augustine <sterling@tensilica.com>
1208 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
1209 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
1210 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
1211 decoding the loop instructions. Remove current_offset variable.
1212 (xtensa_fix_short_loop_frags): Likewise.
1213 (min_bytes_to_other_loop_end): Remove current_offset argument.
1215 2006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl>
1217 * config/tc-z80.c (z80_optimize_expr): Removed.
1218 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
1220 2006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
1222 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
1223 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
1224 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
1225 atmega644, atmega329, atmega3290, atmega649, atmega6490,
1226 atmega406, atmega640, atmega1280, atmega1281, at90can32,
1227 at90can64, at90usb646, at90usb647, at90usb1286 and
1229 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
1231 2006-04-07 Paul Brook <paul@codesourcery.com>
1233 * config/tc-arm.c (parse_operands): Set default error message.
1235 2006-04-07 Paul Brook <paul@codesourcery.com>
1237 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
1239 2006-04-07 Paul Brook <paul@codesourcery.com>
1241 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
1243 2006-04-07 Paul Brook <paul@codesourcery.com>
1245 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
1246 (move_or_literal_pool): Handle Thumb-2 instructions.
1247 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
1249 2006-04-07 Alan Modra <amodra@bigpond.net.au>
1252 * config/tc-i386.c (match_template): Move 64-bit operand tests
1255 2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
1257 * po/Make-in: Add install-html target.
1258 * Makefile.am: Add install-html and install-html-recursive targets.
1259 * Makefile.in: Regenerate.
1260 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
1261 * configure: Regenerate.
1262 * doc/Makefile.am: Add install-html and install-html-am targets.
1263 * doc/Makefile.in: Regenerate.
1265 2006-04-06 Alan Modra <amodra@bigpond.net.au>
1267 * frags.c (frag_offset_fixed_p): Reinitialise offset before
1270 2006-04-05 Richard Sandiford <richard@codesourcery.com>
1271 Daniel Jacobowitz <dan@codesourcery.com>
1273 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
1274 (GOTT_BASE, GOTT_INDEX): New.
1275 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
1276 GOTT_INDEX when generating VxWorks PIC.
1277 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
1278 use the generic *-*-vxworks* stanza instead.
1280 2006-04-04 Alan Modra <amodra@bigpond.net.au>
1283 * frags.c (frag_offset_fixed_p): New function.
1284 * frags.h (frag_offset_fixed_p): Declare.
1285 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
1286 (resolve_expression): Likewise.
1288 2006-04-03 Sterling Augustine <sterling@tensilica.com>
1290 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
1291 of the same length but different numbers of slots.
1293 2006-03-30 Andreas Schwab <schwab@suse.de>
1295 * configure.in: Fix help string for --enable-targets option.
1296 * configure: Regenerate.
1298 2006-03-28 Nathan Sidwell <nathan@codesourcery.com>
1300 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
1301 (m68k_ip): ... here. Use for all chips. Protect against buffer
1302 overrun and avoid excessive copying.
1304 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
1305 m68020_control_regs, m68040_control_regs, m68060_control_regs,
1306 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
1307 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
1308 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
1309 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
1310 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
1311 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
1312 mcf5282_ctrl, mcfv4e_ctrl): ... these.
1313 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
1314 (struct m68k_cpu): Change chip field to control_regs.
1315 (current_chip): Remove.
1316 (control_regs): New.
1317 (m68k_archs, m68k_extensions): Adjust.
1318 (m68k_cpus): Reorder to be in cpu number order. Adjust.
1319 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
1320 (find_cf_chip): Reimplement for new organization of cpu table.
1321 (select_control_regs): Remove.
1323 (struct save_opts): Save control regs, not chip.
1324 (s_save, s_restore): Adjust.
1325 (m68k_lookup_cpu): Give deprecated warning when necessary.
1326 (m68k_init_arch): Adjust.
1327 (md_show_usage): Adjust for new cpu table organization.
1329 2006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
1331 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
1332 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
1333 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
1335 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
1336 (any_gotrel): New rule.
1337 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
1338 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
1340 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
1341 (bfin_pic_ptr): New function.
1342 (md_pseudo_table): Add it for ".picptr".
1343 (OPTION_FDPIC): New macro.
1344 (md_longopts): Add -mfdpic.
1345 (md_parse_option): Handle it.
1346 (md_begin): Set BFD flags.
1347 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
1348 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
1350 * Makefile.am (bfin-parse.o): Update dependencies.
1351 (DEPTC_bfin_elf): Likewise.
1352 * Makefile.in: Regenerate.
1354 2006-03-25 Richard Sandiford <richard@codesourcery.com>
1356 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
1357 mcfemac instead of mcfmac.
1359 2006-03-23 Michael Matz <matz@suse.de>
1361 * config/tc-i386.c (type_names): Correct placement of 'static'.
1362 (reloc): Map some more relocs to their 64 bit counterpart when
1364 (output_insn): Work around breakage if DEBUG386 is defined.
1365 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
1366 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
1367 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
1368 different from i386.
1369 (output_imm): Ditto.
1370 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
1372 (md_convert_frag): Jumps can now be larger than 2GB away, error
1374 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
1375 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
1377 2006-03-22 Richard Sandiford <richard@codesourcery.com>
1378 Daniel Jacobowitz <dan@codesourcery.com>
1379 Phil Edwards <phil@codesourcery.com>
1380 Zack Weinberg <zack@codesourcery.com>
1381 Mark Mitchell <mark@codesourcery.com>
1382 Nathan Sidwell <nathan@codesourcery.com>
1384 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
1385 (md_begin): Complain about -G being used for PIC. Don't change
1386 the text, data and bss alignments on VxWorks.
1387 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
1388 generating VxWorks PIC.
1389 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
1390 (macro): Likewise, but do not treat la $25 specially for
1391 VxWorks PIC, and do not handle jal.
1392 (OPTION_MVXWORKS_PIC): New macro.
1393 (md_longopts): Add -mvxworks-pic.
1394 (md_parse_option): Don't complain about using PIC and -G together here.
1395 Handle OPTION_MVXWORKS_PIC.
1396 (md_estimate_size_before_relax): Always use the first relaxation
1397 sequence on VxWorks.
1398 * config/tc-mips.h (VXWORKS_PIC): New.
1400 2006-03-21 Paul Brook <paul@codesourcery.com>
1402 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
1404 2006-03-21 Sterling Augustine <sterling@tensilica.com>
1406 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
1407 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
1408 (get_loop_align_size): New.
1409 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
1410 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
1411 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
1412 (get_noop_aligned_address): Use get_loop_align_size.
1413 (get_aligned_diff): Likewise.
1415 2006-03-21 Paul Brook <paul@codesourcery.com>
1417 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
1419 2006-03-20 Paul Brook <paul@codesourcery.com>
1421 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
1422 (do_t_branch): Encode branches inside IT blocks as unconditional.
1423 (do_t_cps): New function.
1424 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
1425 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
1426 (opcode_lookup): Allow conditional suffixes on all instructions in
1428 (md_assemble): Advance condexec state before checking for errors.
1429 (insns): Use do_t_cps.
1431 2006-03-20 Paul Brook <paul@codesourcery.com>
1433 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
1434 outputting the insn.
1436 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1438 * config/tc-vax.c: Update copyright year.
1439 * config/tc-vax.h: Likewise.
1441 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1443 * config/tc-vax.c (md_chars_to_number): Used only locally, so
1445 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
1447 2006-03-17 Paul Brook <paul@codesourcery.com>
1449 * config/tc-arm.c (insns): Add ldm and stm.
1451 2006-03-17 Ben Elliston <bje@au.ibm.com>
1454 * doc/as.texinfo (Ident): Document this directive more thoroughly.
1456 2006-03-16 Paul Brook <paul@codesourcery.com>
1458 * config/tc-arm.c (insns): Add "svc".
1460 2006-03-13 Bob Wilson <bob.wilson@acm.org>
1462 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
1463 flag and avoid double underscore prefixes.
1465 2006-03-10 Paul Brook <paul@codesourcery.com>
1467 * config/tc-arm.c (md_begin): Handle EABIv5.
1468 (arm_eabis): Add EF_ARM_EABI_VER5.
1469 * doc/c-arm.texi: Document -meabi=5.
1471 2006-03-10 Ben Elliston <bje@au.ibm.com>
1473 * app.c (do_scrub_chars): Simplify string handling.
1475 2006-03-07 Richard Sandiford <richard@codesourcery.com>
1476 Daniel Jacobowitz <dan@codesourcery.com>
1477 Zack Weinberg <zack@codesourcery.com>
1478 Nathan Sidwell <nathan@codesourcery.com>
1479 Paul Brook <paul@codesourcery.com>
1480 Ricardo Anguiano <anguiano@codesourcery.com>
1481 Phil Edwards <phil@codesourcery.com>
1483 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
1484 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
1486 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
1487 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
1488 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
1490 2006-03-06 Bob Wilson <bob.wilson@acm.org>
1492 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
1493 even when using the text-section-literals option.
1495 2006-03-06 Nathan Sidwell <nathan@codesourcery.com>
1497 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
1499 (m68k_ip): <case 'J'> Check we have some control regs.
1500 (md_parse_option): Allow raw arch switch.
1501 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
1502 whether 68881 or cfloat was meant by -mfloat.
1503 (md_show_usage): Adjust extension display.
1504 (m68k_elf_final_processing): Adjust.
1506 2006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
1508 * config/tc-avr.c (avr_mod_hash_value): New function.
1509 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
1510 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
1511 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
1512 instead of int avr_ldi_expression: use avr_mod_hash_value instead
1514 (tc_gen_reloc): Handle substractions of symbols, if possible do
1515 fixups, abort otherwise.
1516 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
1517 tc_fix_adjustable): Define.
1519 2006-03-02 James E Wilson <wilson@specifix.com>
1521 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
1522 change the template, then clear md.slot[curr].end_of_insn_group.
1524 2006-02-28 Jan Beulich <jbeulich@novell.com>
1526 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
1528 2006-02-28 Jan Beulich <jbeulich@novell.com>
1531 * macro.c (getstring): Don't treat parentheses special anymore.
1532 (get_any_string): Don't consider '(' and ')' as quoting anymore.
1533 Special-case '(', ')', '[', and ']' when dealing with non-quoting
1536 2006-02-28 Mat <mat@csail.mit.edu>
1538 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
1540 2006-02-27 Jakub Jelinek <jakub@redhat.com>
1542 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
1544 (CFI_signal_frame): Define.
1545 (cfi_pseudo_table): Add .cfi_signal_frame.
1546 (dot_cfi): Handle CFI_signal_frame.
1547 (output_cie): Handle cie->signal_frame.
1548 (select_cie_for_fde): Don't share CIE if signal_frame flag is
1549 different. Copy signal_frame from FDE to newly created CIE.
1550 * doc/as.texinfo: Document .cfi_signal_frame.
1552 2006-02-27 Carlos O'Donell <carlos@codesourcery.com>
1554 * doc/Makefile.am: Add html target.
1555 * doc/Makefile.in: Regenerate.
1556 * po/Make-in: Add html target.
1558 2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
1560 * config/tc-i386.c (output_insn): Support Intel Merom New
1563 * config/tc-i386.h (CpuMNI): New.
1564 (CpuUnknownFlags): Add CpuMNI.
1566 2006-02-24 David S. Miller <davem@sunset.davemloft.net>
1568 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
1569 (hpriv_reg_table): New table for hyperprivileged registers.
1570 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
1573 2006-02-24 DJ Delorie <dj@redhat.com>
1575 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
1576 (tc_gen_reloc): Don't define.
1577 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
1578 (OPTION_LINKRELAX): New.
1579 (md_longopts): Add it.
1581 (md_parse_options): Set it.
1582 (md_assemble): Emit relaxation relocs as needed.
1583 (md_convert_frag): Emit relaxation relocs as needed.
1584 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
1585 (m32c_apply_fix): New.
1586 (tc_gen_reloc): New.
1587 (m32c_force_relocation): Force out jump relocs when relaxing.
1588 (m32c_fix_adjustable): Return false if relaxing.
1590 2006-02-24 Paul Brook <paul@codesourcery.com>
1592 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
1593 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
1594 (struct asm_barrier_opt): Define.
1595 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
1596 (parse_psr): Accept V7M psr names.
1597 (parse_barrier): New function.
1598 (enum operand_parse_code): Add OP_oBARRIER.
1599 (parse_operands): Implement OP_oBARRIER.
1600 (do_barrier): New function.
1601 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
1602 (do_t_cpsi): Add V7M restrictions.
1603 (do_t_mrs, do_t_msr): Validate V7M variants.
1604 (md_assemble): Check for NULL variants.
1605 (v7m_psrs, barrier_opt_names): New tables.
1606 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
1607 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
1608 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
1609 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
1610 (struct cpu_arch_ver_table): Define.
1611 (cpu_arch_ver): New.
1612 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
1613 Tag_CPU_arch_profile.
1614 * doc/c-arm.texi: Document new cpu and arch options.
1616 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1618 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
1620 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1622 * config/tc-ia64.c: Update copyright years.
1624 2006-02-22 H.J. Lu <hongjiu.lu@intel.com>
1626 * config/tc-ia64.c (specify_resource): Add the rule 17 from
1629 2005-02-22 Paul Brook <paul@codesourcery.com>
1631 * config/tc-arm.c (do_pld): Remove incorrect write to
1633 (encode_thumb32_addr_mode): Use correct operand.
1635 2006-02-21 Paul Brook <paul@codesourcery.com>
1637 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
1639 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
1640 Anil Paranjape <anilp1@kpitcummins.com>
1641 Shilin Shakti <shilins@kpitcummins.com>
1643 * Makefile.am: Add xc16x related entry.
1644 * Makefile.in: Regenerate.
1645 * configure.in: Added xc16x related entry.
1646 * configure: Regenerate.
1647 * config/tc-xc16x.h: New file
1648 * config/tc-xc16x.c: New file
1649 * doc/c-xc16x.texi: New file for xc16x
1650 * doc/all.texi: Entry for xc16x
1651 * doc/Makefile.texi: Added c-xc16x.texi
1652 * NEWS: Announce the support for the new target.
1654 2006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
1656 * configure.tgt: set emulation for mips-*-netbsd*
1658 2006-02-14 Jakub Jelinek <jakub@redhat.com>
1660 * config.in: Rebuilt.
1662 2006-02-13 Bob Wilson <bob.wilson@acm.org>
1664 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
1665 from 1, not 0, in error messages.
1666 (md_assemble): Simplify special-case check for ENTRY instructions.
1667 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
1668 operand in error message.
1670 2006-02-13 Joseph S. Myers <joseph@codesourcery.com>
1672 * configure.tgt (arm-*-linux-gnueabi*): Change to
1675 2006-02-10 Nick Clifton <nickc@redhat.com>
1677 * config/tc-crx.c (check_range): Ensure that the sign bit of a
1678 32-bit value is propagated into the upper bits of a 64-bit long.
1680 * config/tc-arc.c (init_opcode_tables): Fix cast.
1681 (arc_extoper, md_operand): Likewise.
1683 2006-02-09 David Heine <dlheine@tensilica.com>
1685 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
1686 each relaxation step.
1688 2006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
1690 * configure.in (CHECK_DECLS): Add vsnprintf.
1691 * configure: Regenerate.
1692 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
1693 include/declare here, but...
1694 * as.h: Move code detecting VARARGS idiom to the top.
1695 (errno.h, stdarg.h, varargs.h, va_list): ...here.
1696 (vsnprintf): Declare if not already declared.
1698 2006-02-08 H.J. Lu <hongjiu.lu@intel.com>
1700 * as.c (close_output_file): New.
1701 (main): Register close_output_file with xatexit before
1702 dump_statistics. Don't call output_file_close.
1704 2006-02-07 Nathan Sidwell <nathan@codesourcery.com>
1706 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
1707 mcf5329_control_regs): New.
1708 (not_current_architecture, selected_arch, selected_cpu): New.
1709 (m68k_archs, m68k_extensions): New.
1710 (archs): Renamed to ...
1711 (m68k_cpus): ... here. Adjust.
1713 (md_pseudo_table): Add arch and cpu directives.
1714 (find_cf_chip, m68k_ip): Adjust table scanning.
1715 (no_68851, no_68881): Remove.
1716 (md_assemble): Lazily initialize.
1717 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
1718 (md_init_after_args): Move functionality to m68k_init_arch.
1719 (mri_chip): Adjust table scanning.
1720 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
1721 options with saner parsing.
1722 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
1723 m68k_init_arch): New.
1724 (s_m68k_cpu, s_m68k_arch): New.
1725 (md_show_usage): Adjust.
1726 (m68k_elf_final_processing): Set CF EF flags.
1727 * config/tc-m68k.h (m68k_init_after_args): Remove.
1728 (tc_init_after_args): Remove.
1729 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
1730 (M68k-Directives): Document .arch and .cpu directives.
1732 2006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl>
1734 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
1735 synonyms for equ and defl.
1736 (z80_cons_fix_new): New function.
1737 (emit_byte): Disallow relative jumps to absolute locations.
1738 (emit_data): Only handle defb, prototype changed, because defb is
1739 now handled as pseudo-op rather than an instruction.
1740 (instab): Entries for defb,defw,db,dw moved from here...
1741 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
1742 Add entries for def24,def32,d24,d32.
1743 (md_assemble): Improved error handling.
1744 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
1745 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
1746 (z80_cons_fix_new): Declare.
1747 * doc/c-z80.texi (defb, db): Mention warning on overflow.
1748 (def24,d24,def32,d32): New pseudo-ops.
1750 2006-02-02 Paul Brook <paul@codesourcery.com>
1752 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
1754 2005-02-02 Paul Brook <paul@codesourcery.com>
1756 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
1757 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
1758 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
1759 T2_OPCODE_RSB): Define.
1760 (thumb32_negate_data_op): New function.
1761 (md_apply_fix): Use it.
1763 2006-01-31 Bob Wilson <bob.wilson@acm.org>
1765 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
1767 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
1768 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
1770 (relaxation_requirements): Add pfinish_frag argument and use it to
1771 replace setting tinsn->record_fix fields.
1772 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
1773 and vinsn_to_insnbuf. Remove references to record_fix and
1774 slot_sub_symbols fields.
1775 (xtensa_mark_narrow_branches): Delete unused code.
1776 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
1778 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
1780 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
1781 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
1782 of the record_fix field. Simplify error messages for unexpected
1784 (set_expr_symbol_offset_diff): Delete.
1786 2006-01-31 Paul Brook <paul@codesourcery.com>
1788 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
1790 2006-01-31 Paul Brook <paul@codesourcery.com>
1791 Richard Earnshaw <rearnsha@arm.com>
1793 * config/tc-arm.c: Use arm_feature_set.
1794 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
1795 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
1796 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
1799 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
1800 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
1801 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
1802 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
1804 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
1805 (arm_opts): Move old cpu/arch options from here...
1806 (arm_legacy_opts): ... to here.
1807 (md_parse_option): Search arm_legacy_opts.
1808 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
1809 (arm_float_abis, arm_eabis): Make const.
1811 2006-01-25 Bob Wilson <bob.wilson@acm.org>
1813 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
1815 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1817 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
1818 in load immediate intruction.
1820 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1822 * config/bfin-parse.y (value_match): Use correct conversion
1823 specifications in template string for __FILE__ and __LINE__.
1827 2006-01-18 Alexandre Oliva <aoliva@redhat.com>
1829 Introduce TLS descriptors for i386 and x86_64.
1830 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
1831 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
1832 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
1833 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
1834 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
1836 (build_modrm_byte): Set up zero modrm for TLS desc calls.
1837 (lex_got): Handle @tlsdesc and @tlscall.
1838 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
1840 2006-01-11 Nick Clifton <nickc@redhat.com>
1842 Fixes for building on 64-bit hosts:
1843 * config/tc-avr.c (mod_index): New union to allow conversion
1844 between pointers and integers.
1845 (md_begin, avr_ldi_expression): Use it.
1846 * config/tc-i370.c (md_assemble): Add cast for argument to print
1848 * config/tc-tic54x.c (subsym_substitute): Likewise.
1849 * config/tc-mn10200.c (md_assemble): Use a union to convert the
1850 opindex field of fr_cgen structure into a pointer so that it can
1851 be stored in a frag.
1852 * config/tc-mn10300.c (md_assemble): Likewise.
1853 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
1855 * config/tc-v850.c: Replace uses of (int) casts with correct
1858 2006-01-09 H.J. Lu <hongjiu.lu@intel.com>
1861 * symbols.c (snapshot_symbol): Don't change a defined symbol.
1863 2006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
1866 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
1867 a local-label reference.
1869 For older changes see ChangeLog-2005
1875 version-control: never