1 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
3 * config/tc-mips.c (mips16_ip): Handle "I".
5 2013-07-12 Maciej W. Rozycki <macro@codesourcery.com>
7 * config/tc-mips.c (mips_flag_nan2008): New variable.
8 (options): Add OPTION_NAN enum value.
9 (md_longopts): Handle it.
10 (md_parse_option): Likewise.
11 (s_nan): New function.
12 (mips_elf_final_processing): Handle EF_MIPS_NAN2008.
13 (md_show_usage): Add -mnan.
15 * doc/as.texinfo (Overview): Add -mnan.
16 * doc/c-mips.texi (MIPS Opts): Document -mnan.
17 (MIPS NaN Encodings): New node. Document .nan directive.
18 (MIPS-Dependent): List the new node.
20 2013-07-09 Tristan Gingold <gingold@adacore.com>
22 * configure.com: Define HAVE_SYS_TYPES_H and HAVE_UNISTD_H
24 2013-07-08 Richard Sandiford <rdsandiford@googlemail.com>
26 * config/tc-mips.c (mips_ip): Unconditionally parse an expression
27 for 'A' and assume that the constant has been elided if the result
30 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
32 * config/tc-mips.c (gprel16_reloc_p): New function.
33 (macro_read_relocs): Assume BFD_RELOC_LO16 if all relocs are
35 (offset_high_part, small_offset_p): New functions.
36 (nacro): Use them. Remove *_OB and *_DOB cases. For single-
37 register load and store macros, handle the 16-bit offset case first.
38 If a 16-bit offset is not suitable for the instruction we're
39 generating, load it into the temporary register using
40 ADDRESS_ADDI_INSN. Make the M_LI_DD code fall through into the
41 M_L_DAB code once the address has been constructed. For double load
42 and store macros, again handle the 16-bit offset case first.
43 If the second register cannot be accessed from the same high
44 part as the first, load it into AT using ADDRESS_ADDI_INSN.
45 Fix the handling of LD in cases where the first register is the
46 same as the base. Also handle the case where the offset is
47 not 16 bits and the second register cannot be accessed from the
48 same high part as the first. For unaligned loads and stores,
49 fuse the offbits == 12 and old "ab" handling. Apply this handling
50 whenever the second offset needs a different high part from the first.
51 Construct the offset using ADDRESS_ADDI_INSN where possible,
52 for offbits == 16 as well as offbits == 12. Use offset_reloc
53 when constructing the individual loads and stores.
54 (mips_ip): Set up imm_expr, imm2_expr, offset_expr, imm_reloc
55 and offset_reloc before matching against a particular opcode.
56 Handle elided 'A' constants. Allow 'A' constants to use
59 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
61 * config/tc-mips.c (validate_mips_insn): Remove "[" and "]" handling.
62 (mips_ip): Likewise. Do not set is_mdmx for INSN_5400 instructions.
63 Check constraints on the VR5400 RZU.OB, SLL.OB and SRL.OB instructions.
65 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
67 * config/tc-mips.c (mips_ip): Preserve the real bit number for "+p".
68 Require the msb to be <= 31 for "+s". Check that the size is <= 31
69 for both "+s" and "+S".
71 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
73 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn):
74 (mips_ip, mips16_ip): Handle "+i".
76 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
78 * config/tc-mips.c (mips32_to_micromips_reg_h_map): Delete.
79 (micromips_to_32_reg_h_map): Rename to...
80 (micromips_to_32_reg_h_map1): ...this.
81 (micromips_to_32_reg_i_map): Rename to...
82 (micromips_to_32_reg_h_map2): ...this.
83 (mips_lookup_reg_pair): New function.
84 (gpr_write_mask, macro): Adjust after above renaming.
85 (validate_micromips_insn): Remove "mi" handling.
86 (mips_ip): Likewise. Parse both registers in a pair for "mh".
88 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
90 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn)
91 (mips_ip): Remove "+D" and "+T" handling.
93 2013-07-05 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
95 * config/tc-s390.c (md_gather_operands, md_apply_fix): Support new
98 2013-07-03 Marcus Shawcroft <marcus.shawcroft@arm.com>
100 * config/tc-aarch64.c (reloc_table): Merge got_prel19 into got.
102 2013-07-02 Marcus Shawcroft <marcus.shawcroft@arm.com>
104 * config/tc-aarch64.c (md_apply_fix): Reorder case values.
105 (aarch64_force_relocation): Likewise.
107 2013-07-02 Alan Modra <amodra@gmail.com>
109 * config/tc-ppc.c (ppc_elf_adjust_symtab): Don't make .TOC. weak.
111 2013-06-26 Maciej W. Rozycki <macro@codesourcery.com>
113 * doc/as.texinfo (Overview): Remove @samp from MIPS ISA names.
114 * doc/c-mips.texi (MIPS Options): Remove @sc from MIPS ISA names.
115 Replace @sc{mips16} with literal `MIPS16'.
116 (MIPS ISA): Replace @sc{mips3} with literal `MIPS III'.
118 2013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
120 * config/tc-aarch64.c (reloc_table): Replace
121 BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with
122 BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to
123 BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and
124 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC.
125 (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC,
126 BFD_RELOC_AARCH64_LD32_GOT_LO12_NC,
127 BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC,
128 BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC,
129 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and
130 BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC.
131 (aarch64_force_relocation): Likewise.
133 2013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
135 * config/tc-aarch64.c (ilp32_p): New static variable.
136 (elf64_aarch64_target_format): Return the target according to the
138 (md_begin): Determine 'mach' according to the value of 'ilp32_p'.
139 (aarch64_opts): Add support for options '-milp32' and '-mlp64'.
140 (aarch64_dwarf2_addr_size): New function.
141 * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration.
142 (DWARF2_ADDR_SIZE): New define.
144 2013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
146 * doc/c-mips.texi: Use ISA instead of @sc{isa}.
148 2013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
150 * config/tc-mips.c (validate_mips_insn): Use STYPE rather than SHAMT.
152 2013-06-25 Maciej W. Rozycki <macro@codesourcery.com>
154 * config/tc-mips.c (mips_set_options): Add insn32 member.
155 (mips_opts): Initialize it.
156 (NOP_INSN, NOP_INSN_SIZE): Handle insn32 mode.
157 (options): Add OPTION_INSN32 and OPTION_NO_INSN32 enum values.
158 (md_longopts): Add "minsn32" and "mno-insn32" options.
159 (is_size_valid): Handle insn32 mode.
160 (md_assemble): Pass instruction string down to macro.
161 (brk_fmt): Add second dimension and insn32 mode initializers.
162 (mfhl_fmt): Likewise.
163 (BRK_FMT, MFHL_FMT): Handle insn32 mode.
164 (macro_build) <'c'>: Handle microMIPS 32-bit BREAK encoding.
165 (macro_build_jalr, move_register): Handle insn32 mode.
166 (macro_build_branch_rs): Likewise.
167 (macro): Handle insn32 mode.
168 <M_JRADDIUSP>, <M_JRC>, <M_MOVEP>: New cases.
169 (mips_ip): Handle insn32 mode.
170 (md_parse_option): Handle OPTION_INSN32 and OPTION_NO_INSN32.
171 (s_mipsset): Handle "insn32" and "noinsn32" pseudo-ops.
172 (mips_handle_align): Handle insn32 mode.
173 (md_show_usage): Add -minsn32 and -mno-insn32.
175 * doc/as.texinfo (Target MIPS options): Add -minsn32 and
177 (-minsn32, -mno-insn32): New options.
178 * doc/c-mips.texi (MIPS Opts): Add -minsn32 and -mno-insn32
180 (MIPS assembly options): New node. Document .set insn32 and
182 (MIPS-Dependent): List the new node.
184 2013-06-25 Nick Clifton <nickc@redhat.com>
186 * config/tc-msp430.c (msp430_srcoperand): Do not allow the use of
187 the PC in indirect addressing on 430xv2 parts.
188 (msp430_operands): Add version test to hardware bug encoding
191 2013-06-24 Roland McGrath <mcgrathr@google.com>
193 * config/tc-arm.c (parse_reg_list): Use skip_past_char for '}',
194 so it skips whitespace before it.
195 (s_arm_unwind_save_mmxwr, s_arm_unwind_save_mmxwcg): Likewise.
197 * config/tc-arm.c (arm_symbol_chars): Include '{' and '}'.
198 (arm_reg_parse_multi): Skip whitespace first.
199 (parse_reg_list): Likewise.
200 (parse_vfp_reg_list): Likewise.
201 (s_arm_unwind_save_mmxwcg): Likewise.
203 2013-06-24 Nick Clifton <nickc@redhat.com>
206 * config/tc-arm.c (do_t_smc): Mark as ending an IT block.
208 2013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
210 * config/tc-mips.c (mips_ip): Fix swapped bit numbers in comments.
212 2013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
214 * config/tc-mips.c: Assert that offsetT and valueT are at least
216 (GPR_SMIN, GPR_SMAX): New macros.
217 (macro, mips_ip): Remove code for 4-byte valueT and offsetT.
219 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
221 * config/tc-mips.c: Remove OBJ_ELF, OBJ_MAYBE_ELF and IS_ELF
222 conditions. Remove any code deselected by them.
223 (s_mips_frame, s_mips_mask): Handle ECOFF_DEBUGGING case first.
225 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
227 * NEWS: Note removal of ECOFF support.
228 * doc/as.texinfo (--emulation): Update for the removal of MIPS ECOFF.
229 * Makefile.am (TARG_ENV_HFILES): Remove config/te-lnews.h.
230 (MULTI_CFILES): Remove config/e-mipsecoff.c.
231 * Makefile.in: Regenerate.
232 * configure.in: Remove MIPS ECOFF references.
233 (mips-sony-bsd*, mips-*-bsd*, mips-*-lnews*-ecoff, mips-*-*-ecoff):
235 (mips-*-irix5*-*, mips*-*-linux*-*, mips*-*-freebsd*)
236 (mips*-*-kfreebsd*-gnu, mips-*-*-elf): Fold into...
237 (mips-*-*): ...this single case.
238 (mipsbecoff, mipslecoff, mipsecoff): Remove emulations. Expect
239 MIPS emulations to be e-mipself*.
240 * configure: Regenerate.
241 * configure.tgt (mips-sony-bsd*, mips-*-ultrix*, mips-*-osf*)
242 (mips-*-ecoff*, mips-*-pe*, mips-*-irix*, ips-*-lnews*, mips-*-riscos*)
243 (mips-*-sysv*): Remove coff and ecoff cases.
244 * as.c (mipsbecoff, mipslecoff, mipsecoff): Remove.
245 * ecoff.c: Remove reference to MIPS ECOFF.
246 * config/e-mipsecoff.c, config/te-lnews.h: Delete files.
247 * config/tc-mips.c (ECOFF_LITTLE_FORMAT): Delete.
248 (RDATA_SECTION_NAME, mips_target_form): Remove COFF and ECOFF cases.
249 (mips_hi_fixup): Tweak comment.
250 (append_insn): Require a howto.
251 (mips_after_parse_args): Remove OBJ_MAYBE_ECOFF code.
253 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
255 * doc/as.texinfo: Use MIPS rather than @sc{mips} throughout.
256 Use "CPU" instead of "cpu".
257 * doc/c-mips.texi: Likewise.
258 (MIPS Opts): Rename to MIPS Options.
259 (MIPS option stack): Rename to MIPS Option Stack.
260 (MIPS ASE instruction generation overrides): Rename to
261 MIPS ASE Instruction Generation Overrides (for now).
262 (MIPS floating-point): Rename to MIPS Floating-Point.
264 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
266 * doc/c-mips.texi (MIPS Macros): New section.
267 (MIPS Object): Replace with...
268 (MIPS Small Data): ...this new section.
270 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
272 * doc/c-mips.texi (MIPS symbol sizes): Move section further up file.
273 Capitalize name. Use @kindex instead of @cindex for .set entries.
275 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
277 * doc/c-mips.texi (MIPS Stabs): Remove section.
279 2013-06-20 Richard Sandiford <rdsandiford@googlemail.com>
281 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS, ISA_SUPPORTS_DSP_ASE)
282 (ISA_SUPPORTS_DSP64_ASE, ISA_SUPPORTS_DSPR2_ASE, ISA_SUPPORTS_EVA_ASE)
283 (ISA_SUPPORTS_MT_ASE, ISA_SUPPORTS_MCU_ASE, ISA_SUPPORTS_VIRT_ASE)
284 (ISA_SUPPORTS_VIRT64_ASE): Delete.
285 (mips_ase): New structure.
286 (mips_ases): New table.
287 (FP64_ASES): New macro.
288 (mips_ase_groups): New array.
289 (mips_isa_rev, mips_ase_mask, mips_check_isa_supports_ase)
290 (mips_check_isa_supports_ases, mips_set_ase, mips_lookup_ase): New
292 (is_opcode_valid): Use mips_ases to get the 64-bit ASE flags.
293 (md_parse_option): Use mips_ases and mips_set_ase instead of
294 separate case statements for each ASE option.
295 (mips_after_parse_args): Use FP64_ASES. Use
296 mips_check_isa_supports_ases to check the ASEs against
298 (s_mipsset): Use mips_ases and mips_set_ase instead of
299 separate if statements for each ASE option. Use
300 mips_check_isa_supports_ases, even when a non-ASE option
303 2013-06-19 Greta Yorsh <Greta.Yorsh@arm.com>
305 * config/tc-arm.c (arm_cpus): Add support for Cortex-A12.
307 2013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
309 * config/tc-mips.c (md_shortopts, options, md_longopts)
310 (md_longopts_size): Move earlier in file.
312 2013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
314 * config/tc-mips.c (mips_set_options): Replace separate "ase_*" fields
315 with a single "ase" bitmask.
316 (mips_opts): Update accordingly.
317 (file_ase, file_ase_explicit): New variables.
318 (file_ase_mips3d, file_ase_mdmx, file_ase_smartmips, file_ase_dsp)
319 (file_ase_dspr2, file_ase_eva, file_ase_mt, file_ase_virt): Delete.
320 (ISA_HAS_ROR): Adjust for mips_set_options change.
321 (is_opcode_valid): Take the base ase mask directly from mips_opts.
322 (mips_ip): Adjust for mips_set_options change.
323 (md_parse_option): Likewise. Update file_ase_explicit.
324 (mips_after_parse_args): Adjust for mips_set_options change.
325 Use bitmask operations to select the default ASEs. Set file_ase
326 rather than individual per-ASE variables.
327 (s_mipsset): Adjust for mips_set_options change.
328 (mips_elf_final_processing): Test file_ase rather than
329 file_ase_mdmx. Remove commented-out code.
331 2013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
333 * config/tc-mips.c (mips_cpu_info): Add an "ase" field.
334 (MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, MIPS_CPU_ASE_MT)
335 (MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX, MIPS_CPU_ASE_DSPR2)
336 (MIPS_CPU_ASE_MCU, MIPS_CPU_ASE_VIRT, MIPS_CPU_ASE_EVA): Delete.
337 (mips_after_parse_args): Use the new "ase" field to choose
339 (mips_cpu_info_table): Move ASEs from the "flags" field to the
342 2013-06-18 Richard Earnshaw <rearnsha@arm.com>
344 * config/tc-arm.c (symbol_preemptible): New function.
345 (relax_branch): Use it.
347 2013-06-17 Catherine Moore <clm@codesourcery.com>
348 Maciej W. Rozycki <macro@codesourcery.com>
349 Chao-Ying Fu <fu@mips.com>
351 * config/tc-mips.c (mips_set_options): Add ase_eva.
352 (mips_set_options mips_opts): Add ase_eva.
353 (file_ase_eva): Declare.
354 (ISA_SUPPORTS_EVA_ASE): Define.
355 (IS_SEXT_9BIT_NUM): Define.
356 (MIPS_CPU_ASE_EVA): Define.
357 (is_opcode_valid): Add support for ase_eva.
358 (macro_build): Likewise.
360 (validate_mips_insn): Likewise.
361 (validate_micromips_insn): Likewise.
363 (options): Add OPTION_EVA and OPTION_NO_EVA.
364 (md_longopts): Add -meva and -mno-eva.
365 (md_parse_option): Process new options.
366 (mips_after_parse_args): Check for valid EVA combinations.
367 (s_mipsset): Likewise.
369 2013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
371 * dwarf2dbg.h (dwarf2_move_insn): Declare.
372 * dwarf2dbg.c (line_subseg): Add pmove_tail.
373 (get_line_subseg): Add create_p argument. Initialize pmove_tail.
374 (dwarf2_gen_line_info_1): Update call accordingly.
375 (dwarf2_move_insn): New function.
376 * config/tc-mips.c (append_insn): Use dwarf2_move_insn.
378 2013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
382 2011-09-05 Richard Sandiford <rdsandiford@googlemail.com>
385 * dwarf2dbg.c (pending_lines, pending_lines_tail): New variables.
386 (dwarf2_gen_line_info_1): Delete.
387 (dwarf2_push_line, dwarf2_flush_pending_lines): New functions.
388 (dwarf2_gen_line_info, dwarf2_emit_label): Use them.
389 (dwarf2_consume_line_info): Call dwarf2_flush_pending_lines.
390 (dwarf2_directive_loc): Push previous .locs instead of generating
393 2013-06-13 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
395 * config/tc-mips.c (ISA_SUPPORTS_VIRT_ASE): Support micromips.
396 (ISA_SUPPORTS_VIRT64_ASE): Support 64-bit micromips.
398 2013-06-13 Nick Clifton <nickc@redhat.com>
401 * config/tc-m68k.h (TC_CHECK_ADJUSTED_BROKEN_DOT_WORD): Define.
402 * config/tc-m68k.c (tc_m68k_check_adjusted_broken_word): New
403 function. Generates an error if the adjusted offset is out of a
406 2013-06-12 Sandra Loosemore <sandra@codesourcery.com>
408 * config/tc-nios2.c (md_apply_fix): Mask constant
409 BFD_RELOC_NIOS2_HIADJ16 value to 16 bits.
411 2013-06-10 Maciej W. Rozycki <macro@codesourcery.com>
413 * config/tc-mips.c (append_insn): Don't do branch relaxation for
414 MIPS-3D instructions either.
415 (md_convert_frag): Update the COPx branch mask accordingly.
417 * config/tc-mips.c (md_show_usage): Document --[no-]relax-branch
419 * doc/as.texinfo (Overview): Add --relax-branch and
421 * doc/c-mips.texi (MIPS Opts): Document --relax-branch and
424 2013-06-09 Sandra Loosemore <sandra@codesourcery.com>
426 * config/tc-nios2.c (nios2_parse_args): Allow trap argument to
429 2013-06-08 Catherine Moore <clm@codesourcery.com>
431 * config/tc-mips.c (is_opcode_valid): Build ASE mask.
432 (is_opcode_valid_16): Pass ase value to opcode_is_member.
433 (append_insn): Change INSN_xxxx to ASE_xxxx.
435 2013-06-01 George Thomas <george.thomas@atmel.com>
437 * gas/config/tc-avr.c: Change ISA for devices with USB support to
440 2013-05-31 H.J. Lu <hongjiu.lu@intel.com>
442 * config/tc-i386.c (md_begin): Don't align text/data/bss sections
445 2013-05-31 Paul Brook <paul@codesourcery.com>
448 * config/tc-mips.c (s_ehword): New.
450 2013-05-30 Paul Brook <paul@codesourcery.com>
452 * config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH.
454 2013-05-29 Maciej W. Rozycki <macro@codesourcery.com>
456 * write.c (resolve_reloc_expr_symbols): On REL targets don't
457 convert relocs who have no relocatable field either. Rephrase
458 the conditional so that the PC-relative check is only applied
461 2013-05-28 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
463 * config/tc-mips.c (macro) <ld>: Don't use $zero for address
466 2013-05-28 Yufeng Zhang <yufeng.zhang@arm.com>
468 * config/tc-aarch64.c (reloc_table): Update to use
469 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 instead of
470 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE.
471 (md_apply_fix): Likewise.
472 (aarch64_force_relocation): Likewise.
474 2013-05-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
476 * config/tc-arm.c (it_fsm_post_encode): Improve
477 warning messages about deprecated IT block formats.
479 2013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com>
481 * config/tc-aarch64.c (md_apply_fix): Move value range checking
482 inside fx_done condition.
484 2013-05-22 Jürgen Urban <JuergenUrban@gmx.de>
486 * config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB.
488 2013-05-20 Peter Bergner <bergner@vnet.ibm.com>
490 * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error
491 and clean up warning when using PRINT_OPCODE_TABLE.
493 2013-05-20 Alan Modra <amodra@gmail.com>
495 * config/tc-ppc.c (md_apply_fix): Hoist code common to insn
496 and data fixups performing shift/high adjust/sign extension on
497 fieldval. Sink fx_pcrel handling and checks. Use fixP->fx_size
498 when writing data fixups rather than recalculating size.
500 2013-05-16 Jan-Benedict Glaw <jbglaw@lug-owl.de>
502 * doc/c-msp430.texi: Fix typo.
504 2013-05-16 Tristan Gingold <gingold@adacore.com>
506 * config/tc-ppc.c (ppc_is_toc_sym): Symbols of class XMC_TC
507 are also TOC symbols.
509 2013-05-16 Nick Clifton <nickc@redhat.com>
511 * config/tc-msp430.c: Make -mmcu recognise more part numbers.
512 Add -mcpu command to specify core type.
513 * doc/c-msp430.texi: Update documentation.
515 2013-05-09 Andrew Pinski <apinski@cavium.com>
517 * config/tc-mips.c (struct mips_set_options): New ase_virt field.
518 (mips_opts): Update for the new field.
519 (file_ase_virt): New variable.
520 (ISA_SUPPORTS_VIRT_ASE): New macro.
521 (ISA_SUPPORTS_VIRT64_ASE): New macro.
522 (MIPS_CPU_ASE_VIRT): New define.
523 (is_opcode_valid): Handle ase_virt.
524 (macro_build): Handle "+J".
525 (validate_mips_insn): Likewise.
527 (enum options): Add OPTION_VIRT and OPTION_NO_VIRT.
528 (md_longopts): Add mvirt and mnovirt
529 (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT.
530 (mips_after_parse_args): Handle ase_virt field.
531 (s_mipsset): Handle "virt" and "novirt".
532 (mips_elf_final_processing): Add a comment about virt ASE might need
534 (md_show_usage): Print out the usage of -mvirt and mno-virt options.
535 * doc/c-mips.texi: Document -mvirt and -mno-virt.
536 Document ".set virt" and ".set novirt".
538 2013-05-09 Alan Modra <amodra@gmail.com>
540 * config/tc-ppc.c (md_apply_fix): Sign extend fieldval under
541 control of operand flag bits.
543 2013-05-07 Alan Modra <amodra@gmail.com>
545 * config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro.
546 (PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D): Likewise.
547 (PPC_VLE_HI16A, PPC_VLE_HI16D): Likewise.
548 (PPC_VLE_HA16A, PPC_VLE_HA16D): Likewise.
549 (md_apply_fix): Set fx_no_overflow for assorted relocations.
550 Shift and sign-extend fieldval for use by some VLE reloc
551 operand->insert functions.
553 2013-05-06 Paul Brook <paul@codesourcery.com>
554 Catherine Moore <clm@codesourcery.com>
556 * config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL.
557 (limited_pcrel_reloc_p): Likewise.
558 (md_apply_fix): Likewise.
559 (tc_gen_reloc): Likewise.
561 2013-05-06 Richard Sandiford <rdsandiford@googlemail.com>
563 * config/tc-mips.c (limited_pcrel_reloc_p): New function.
564 (mips_fix_adjustable): Adjust pc-relative check to use
567 2013-05-02 Richard Sandiford <rdsandiford@googlemail.com>
569 * config/tc-mips.c (mips_pseudo_table): Add stabd and stabs entries.
570 (s_mips_stab): Do not restrict to stabn only.
572 2013-05-02 Nick Clifton <nickc@redhat.com>
574 * config/tc-msp430.c: Add support for the MSP430X architecture.
575 Add code to insert a NOP instruction after any instruction that
576 might change the interrupt state.
577 Add support for the LARGE memory model.
578 Add code to initialise the .MSP430.attributes section.
579 * config/tc-msp430.h: Add support for the MSP430X architecture.
580 * doc/c-msp430.texi: Document the new -mL and -mN command line
582 * NEWS: Mention support for the MSP430X architecture.
584 2013-05-01 Maciej W. Rozycki <macro@codesourcery.com>
586 * configure.tgt: Replace alpha*-*-linuxecoff* pattern with
587 alpha*-*-linux*ecoff*.
589 2013-04-30 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
591 * config/tc-mips.c (mips_ip): Add sizelo.
592 For "+C", "+G", and "+H", set sizelo and compare against it.
594 2013-04-29 Nick Clifton <nickc@redhat.com>
596 * as.c (Options): Add -gdwarf-sections.
597 (parse_args): Likewise.
598 * as.h (flag_dwarf_sections): Declare.
599 * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes.
600 (process_entries): When -gdwarf-sections is enabled generate
601 fragmentary .debug_line sections.
602 (out_debug_line): Set the section for the .debug_line section end
604 * doc/as.texinfo: Document -gdwarf-sections.
605 * NEWS: Mention -gdwarf-sections.
607 2013-04-26 Christian Groessler <chris@groessler.org>
609 * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdline
610 according to the target parameter. Don't call s_segm since s_segm
611 calls bfd_set_arch_mach using stdoutput, but stdoutput isn't
613 (md_begin): Call s_segm according to target parameter from command
616 2013-04-25 Alan Modra <amodra@gmail.com>
618 * configure.in: Allow little-endian linux.
619 * configure: Regenerate.
621 2013-04-24 Sandra Loosemore <sandra@codesourcery.com>
623 * config/tc-nios2.c (nios2_control_register_arg_p): Rename
624 "fstatus" control register to "eccinj".
626 2013-04-19 Kai Tietz <ktietz@redhat.com>
628 * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin.
630 2013-04-15 Julian Brown <julian@codesourcery.com>
632 * expr.c (add_to_result, subtract_from_result): Make global.
633 * expr.h (add_to_result, subtract_from_result): Add prototypes.
634 * config/tc-sh.c (sh_optimize_expr): Use add_to_result,
635 subtract_from_result to handle extra bit of precision for .sleb128
638 2013-04-10 Julian Brown <julian@codesourcery.com>
640 * read.c (convert_to_bignum): Add sign parameter. Use it
641 instead of X_unsigned to determine sign of resulting bignum.
642 (emit_expr): Pass extra argument to convert_to_bignum.
643 (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass
644 X_extrabit to convert_to_bignum.
645 (parse_bitfield_cons): Set X_extrabit.
646 * expr.c (make_expr_symbol, expr_build_uconstant, operand):
647 Initialise X_extrabit field as appropriate.
648 (add_to_result): New.
649 (subtract_from_result): New.
651 * expr.h (expressionS): Add X_extrabit field.
653 2013-04-10 Jan Beulich <jbeulich@suse.com>
655 * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base
656 register being PC when is_t or writeback, and use distinct
657 diagnostic for the latter case.
659 2013-04-10 Jan Beulich <jbeulich@suse.com>
661 * gas/config/tc-arm.c (parse_operands): Re-write
663 (do_barrier): Remove bogus constraint().
664 (do_t_barrier): Remove.
666 2013-04-09 Joerg Wunsch <joerg.wunsch@atmel.com>
668 * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2,
669 ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2,
671 * gas/doc/c-avr.texi (-mmcu documentation): Likewise.
673 2013-04-09 Jan Beulich <jbeulich@suse.com>
675 * gas/config/tc-arm.c (do_vmrs): Accept all control registers.
676 Use local variable Rt in more places.
677 (do_vmsr): Accept all control registers.
679 2013-04-09 Jan Beulich <jbeulich@suse.com>
681 * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix
682 if there was none specified for moves between scalar and core
685 2013-04-09 Jan Beulich <jbeulich@suse.com>
687 * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the
690 2013-04-08 Jan Beulich <jbeulich@suse.com>
692 * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for
695 2013-04-08 Jan Beulich <jbeulich@suse.com>
697 * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq
700 2013-04-03 Alan Modra <amodra@gmail.com>
702 * doc/as.texinfo: Add support to generate man options for h8300.
703 * doc/c-h8300.texi: Likewise.
705 2013-03-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
707 * config/tc-arm.c (arm_cpus): Add support for Cortex-A53 and
710 2013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com>
713 * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array.
715 2013-03-26 Nick Clifton <nickc@redhat.com>
718 * listing.c (rebuffer_line): Rewrite to avoid seeking back to the
719 start of the file each time.
722 * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for
725 2013-03-26 Douglas B Rupp <rupp@gnat.com>
727 * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment
730 2013-03-21 Will Newton <will.newton@linaro.org>
732 * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all
733 pc-relative str instructions in Thumb mode.
735 2013-03-21 Michael Schewe <michael.schewe@gmx.net>
737 * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
738 @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
740 * config/tc-h8300.h: Remove duplicated defines.
742 2013-03-21 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
745 * tc-avr.c (mcu_has_3_byte_pc): New function.
746 (tc_cfi_frame_initial_instructions): Call it to find return
749 2013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com>
752 * config/tc-tic6x.c (tic6x_try_encode): Handle
753 tic6x_coding_dreg_(msb|lsb) field coding types and use it to
754 encode register pair numbers when required.
756 2013-03-15 Will Newton <will.newton@linaro.org>
758 * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register
759 in vstr in Thumb mode for pre-ARMv7 cores.
761 2013-03-14 Andreas Schwab <schwab@suse.de>
763 * doc/c-arc.texi (ARC Directives): Revert last change and use
764 @itemize instead of @table.
765 * doc/c-arm.texi (ARM-Instruction-Set): Likewise.
767 2013-03-14 Nick Clifton <nickc@redhat.com>
770 * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a
771 NULL message, instead just check ARM_CPU_IS_ANY directly.
773 2013-03-14 Nick Clifton <nickc@redhat.com>
776 * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet
778 * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text
779 to the @item directives.
780 (ARM-Neon-Alignment): Move to correct place in the document.
781 * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
783 * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
786 2013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
788 * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o'
789 case. Add default BAD_CASE to switch.
791 2013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
793 * config/tc-nios2.c (nios2_assemble_args_ds): New function.
794 (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
796 2013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
798 * config/tc-arm.c (crc_ext_armv8): New feature set.
799 (UNPRED_REG): New macro.
800 (do_crc32_1): New function.
801 (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
802 do_crc32ch, do_crc32cw): Likewise.
804 (insns): Add entries for crc32 mnemonics.
805 (arm_extensions): Add entry for crc.
807 2013-03-08 Chung-Lin Tang <cltang@codesourcery.com>
809 * write.h (struct fix): Add fx_dot_frag field.
811 * write.c (dot_frag): New variable.
812 (fix_new_internal): Set fx_dot_frag field with dot_frag.
813 (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
814 * expr.c (expr): Save value of frag_now in dot_frag when setting
816 * read.c (emit_expr): Likewise. Delete comments.
818 2013-03-07 H.J. Lu <hongjiu.lu@intel.com>
820 * config/tc-i386.c (flag_code_names): Removed.
821 (i386_index_check): Rewrote.
823 2013-03-05 Yufeng Zhang <yufeng.zhang@arm.com>
825 * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
827 (aarch64_double_precision_fmovable): New function.
828 (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
829 function; handle hexadecimal representation of IEEE754 encoding.
830 (parse_operands): Update the call to parse_aarch64_imm_float.
832 2013-02-28 H.J. Lu <hongjiu.lu@intel.com>
834 * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
835 (check_hle): Updated.
836 (md_assemble): Likewise.
837 (parse_insn): Likewise.
839 2013-02-28 H.J. Lu <hongjiu.lu@intel.com>
841 * config/tc-i386.c (_i386_insn): Add rep_prefix.
842 (md_assemble): Check if REP prefix is OK.
843 (parse_insn): Remove expecting_string_instruction. Set
846 2013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
848 * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
850 2013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
852 * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
853 for system registers.
855 2013-02-27 DJ Delorie <dj@redhat.com>
857 * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
858 (rl78_op): Handle %code().
859 (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
860 (tc_gen_reloc): Likwise; convert to a computed reloc.
861 (md_apply_fix): Likewise.
863 2013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
865 * config/rl78-parse.y: Fix encoding of DIVWU insn.
867 2013-02-25 Terry Guo <terry.guo@arm.com>
869 * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
870 * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
871 list of accepted CPUs.
873 2013-02-19 H.J. Lu <hongjiu.lu@intel.com>
876 * config/tc-i386.c (cpu_arch): Add ".smap".
878 * doc/c-i386.texi: Document smap.
880 2013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
882 * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
883 mips_assembling_insn appropriately.
884 (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
886 2013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
888 * config/tc-mips.c (append_insn): Correct indentation, remove
891 2013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
893 * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
895 2013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
897 * configure.tgt: Add nios2-*-rtems*.
899 2013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
901 * config/tc-aarch64.c (md_begin): Change to check if 'name' is
904 2013-02-09 Jürgen Urban <JuergenUrban@gmx.de>
906 * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
907 (macro): Use it. Assert that trunc.w.s is not used for r5900.
909 2013-02-08 Yi-Hsiu, Hsu <ahsu@marvell.com>
911 * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4
914 2013-02-06 Sandra Loosemore <sandra@codesourcery.com>
915 Andrew Jenner <andrew@codesourcery.com>
917 Based on patches from Altera Corporation.
919 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
920 (TARGET_CPU_HFILES): Add config/tc-nios2.h.
921 * Makefile.in: Regenerated.
922 * configure.tgt: Add case for nios2*-linux*.
923 * config/obj-elf.c: Conditionally include elf/nios2.h.
924 * config/tc-nios2.c: New file.
925 * config/tc-nios2.h: New file.
926 * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
927 * doc/Makefile.in: Regenerated.
928 * doc/all.texi: Set NIOSII.
929 * doc/as.texinfo (Overview): Add Nios II options.
930 (Machine Dependencies): Include c-nios2.texi.
931 * doc/c-nios2.texi: New file.
932 * NEWS: Note Altera Nios II support.
934 2013-02-06 Alan Modra <amodra@gmail.com>
937 * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
938 Don't skip fixups with fx_subsy non-NULL.
939 * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
940 with fx_subsy non-NULL.
942 2013-02-04 H.J. Lu <hongjiu.lu@intel.com>
944 * doc/c-metag.texi: Add "@c man" markers.
946 2013-02-04 Alan Modra <amodra@gmail.com>
948 * write.c (fixup_segment): Return void. Delete seg_reloc_count
950 (TC_ADJUST_RELOC_COUNT): Delete.
951 * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
953 2013-02-04 Alan Modra <amodra@gmail.com>
955 * po/POTFILES.in: Regenerate.
957 2013-01-30 Markos Chandras <markos.chandras@imgtec.com>
959 * config/tc-metag.c: Make SWAP instruction less permissive with
962 2013-01-29 DJ Delorie <dj@redhat.com>
964 * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
965 relocs in .word/.etc statements.
967 2013-01-29 Roland McGrath <mcgrathr@google.com>
969 * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
970 immediate value for 8-bit offset" error so it shows line info.
972 2013-01-24 Joseph Myers <joseph@codesourcery.com>
974 * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
977 2013-01-24 Nick Clifton <nickc@redhat.com>
979 * config/tc-v850.c: Add support for e3v5 architecture.
980 * doc/c-v850.texi: Mention new support.
982 2013-01-23 Nick Clifton <nickc@redhat.com>
985 * config/tc-avr.c: Include dwarf2dbg.h.
987 2013-01-18 H.J. Lu <hongjiu.lu@intel.com>
989 * config/tc-i386.c (reloc): Support size relocation only for ELF.
990 (tc_i386_fix_adjustable): Likewise.
992 (tc_gen_reloc): Likewise.
994 2013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
996 * config/tc-aarch64.c (output_operand_error_record): Change to output
997 the out-of-range error message as value-expected message if there is
998 only one single value in the expected range.
999 (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
1000 LSL #0 as a programmer-friendly feature.
1002 2013-01-16 H.J. Lu <hongjiu.lu@intel.com>
1004 * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
1005 (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
1006 BFD_RELOC_64_SIZE relocations.
1007 (lex_got): Support "symbol@SIZE" and don't create GOT symbol
1009 (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
1010 relocations against local symbols.
1012 2013-01-16 Alan Modra <amodra@gmail.com>
1014 * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
1015 finding some sort of toc syntax error, and break to avoid
1016 compiler uninit warning.
1018 2013-01-15 H.J. Lu <hongjiu.lu@intel.com>
1021 * config/tc-i386.c (lex_got): Increment length by 1 if the
1022 relocation token is removed.
1024 2013-01-15 Nick Clifton <nickc@redhat.com>
1026 * config/tc-v850.c (md_assemble): Allow signed values for
1029 2013-01-11 Sean Keys <skeys@ipdatasys.com>
1031 * config/tc-xgate.c (md_begin): Fix mistake made when going from
1034 2013-01-10 Peter Bergner <bergner@vnet.ibm.com>
1036 * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
1037 * doc/c-ppc.texi (PowerPC-Opts): Likewise.
1038 * config/tc-ppc.c (md_show_usage): Likewise.
1039 (ppc_handle_align): Handle power8's group ending nop.
1041 2013-01-10 Sean Keys <skeys@ipdatasys.com>
1043 * config/tc-xgate.c (md_begin): Fix the printing of opcodes so
1044 that the assember exits after the opcodes have been printed.
1046 2013-01-10 H.J. Lu <hongjiu.lu@intel.com>
1048 * app.c: Remove trailing white spaces.
1052 * dw2gencfi.c: Likewise.
1053 * dwarf2dbg.h: Likewise.
1054 * ecoff.c: Likewise.
1055 * input-file.c: Likewise.
1056 * itbl-lex.h: Likewise.
1057 * output-file.c: Likewise.
1060 * subsegs.c: Likewise.
1061 * symbols.c: Likewise.
1062 * write.c: Likewise.
1063 * config/tc-i386.c: Likewise.
1064 * doc/Makefile.am: Likewise.
1065 * doc/Makefile.in: Likewise.
1066 * doc/c-aarch64.texi: Likewise.
1067 * doc/c-alpha.texi: Likewise.
1068 * doc/c-arc.texi: Likewise.
1069 * doc/c-arm.texi: Likewise.
1070 * doc/c-avr.texi: Likewise.
1071 * doc/c-bfin.texi: Likewise.
1072 * doc/c-cr16.texi: Likewise.
1073 * doc/c-d10v.texi: Likewise.
1074 * doc/c-d30v.texi: Likewise.
1075 * doc/c-h8300.texi: Likewise.
1076 * doc/c-hppa.texi: Likewise.
1077 * doc/c-i370.texi: Likewise.
1078 * doc/c-i386.texi: Likewise.
1079 * doc/c-i860.texi: Likewise.
1080 * doc/c-m32c.texi: Likewise.
1081 * doc/c-m32r.texi: Likewise.
1082 * doc/c-m68hc11.texi: Likewise.
1083 * doc/c-m68k.texi: Likewise.
1084 * doc/c-microblaze.texi: Likewise.
1085 * doc/c-mips.texi: Likewise.
1086 * doc/c-msp430.texi: Likewise.
1087 * doc/c-mt.texi: Likewise.
1088 * doc/c-s390.texi: Likewise.
1089 * doc/c-score.texi: Likewise.
1090 * doc/c-sh.texi: Likewise.
1091 * doc/c-sh64.texi: Likewise.
1092 * doc/c-tic54x.texi: Likewise.
1093 * doc/c-tic6x.texi: Likewise.
1094 * doc/c-v850.texi: Likewise.
1095 * doc/c-xc16x.texi: Likewise.
1096 * doc/c-xgate.texi: Likewise.
1097 * doc/c-xtensa.texi: Likewise.
1098 * doc/c-z80.texi: Likewise.
1099 * doc/internals.texi: Likewise.
1101 2013-01-10 Roland McGrath <mcgrathr@google.com>
1103 * hash.c (hash_new_sized): Make it global.
1104 * hash.h: Declare it.
1105 * macro.c (define_macro): Use hash_new_sized instead of hash_new,
1108 2013-01-10 Will Newton <will.newton@imgtec.com>
1110 * Makefile.am: Add Meta.
1111 * Makefile.in: Regenerate.
1112 * config/tc-metag.c: New file.
1113 * config/tc-metag.h: New file.
1114 * configure.tgt: Add Meta.
1115 * doc/Makefile.am: Add Meta.
1116 * doc/Makefile.in: Regenerate.
1117 * doc/all.texi: Add Meta.
1118 * doc/as.texiinfo: Document Meta options.
1119 * doc/c-metag.texi: New file.
1121 2013-01-09 Steve Ellcey <sellcey@mips.com>
1123 * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
1125 * config/tc-mips.c (internalError): Remove, replace with abort.
1127 2013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
1129 * config/tc-aarch64.c (parse_operands): Change to compare the result
1130 of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
1132 2013-01-07 Nick Clifton <nickc@redhat.com>
1135 * config/tc-arm.c (skip_past_char): Skip whitespace before the
1136 anticipated character.
1137 * config/tc-arm.c (parse_address_main): Delete skip of whitespace
1138 here as it is no longer needed.
1140 2013-01-06 Andreas Schwab <schwab@linux-m68k.org>
1142 * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
1143 * doc/c-score.texi (SCORE-Opts): Likewise.
1144 * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
1146 2013-01-04 Juergen Urban <JuergenUrban@gmx.de>
1148 * config/tc-mips.c: Add support for MIPS r5900.
1149 Add M_LQ_AB and M_SQ_AB to support large values for instructions
1151 (can_swap_branch_p, get_append_method): Detect some conditional
1152 short loops to fix a bug on the r5900 by NOP in the branch delay
1154 (M_MUL): Support 3 operands in multu on r5900.
1155 (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
1156 (s_mipsset): Force 32 bit floating point on r5900.
1157 (mips_ip): Check parameter range of instructions mfps and mtps on
1159 * configure.in: Detect CPU type when target string contains r5900
1160 (e.g. mips64r5900el-linux-gnu).
1162 2013-01-02 H.J. Lu <hongjiu.lu@intel.com>
1164 * as.c (parse_args): Update copyright year to 2013.
1166 2013-01-02 Yufeng Zhang <yufeng.zhang@arm.com>
1168 * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
1171 2013-01-02 Nick Clifton <nickc@redhat.com>
1174 * config/tc-arm.c (parse_address_main): Skip whitespace before a
1177 For older changes see ChangeLog-2012
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