1 2006-07-12 Nick Clifton <nickc@redhat.com>
3 * config/tc-sh.c (md_apply_fix): Do not allow the generic code in
4 fixup_segment() to repeat a range check on a value that have
5 already been checked here.
7 2006-07-07 James E Wilson <wilson@specifix.com>
9 * config/tc-mips.c (mips_cpu_info_table): Add sb1a.
11 2006-07-06 Mohammed Adnène Trojette <adn@diwi.org>
12 Nick Clifton <nickc@redhat.com>
15 * doc/as.texi: Fix spelling typo: branchs => branches.
16 * doc/c-m68hc11.texi: Likewise.
17 * config/tc-m68hc11.c: Likewise.
18 Support old spelling of command line switch for backwards
21 2006-07-04 Thiemo Seufer <ths@mips.com>
22 David Ung <davidu@mips.com>
24 * config/tc-mips.c (s_is_linkonce): New function.
25 (mips16_mark_labels): Don't adjust mips16 symbol addresses for
26 weak, external, and linkonce symbols.
27 (pic_need_relax): Use s_is_linkonce.
29 2006-06-24 H.J. Lu <hongjiu.lu@intel.com>
31 * doc/as.texinfo (Org): Remove space.
32 (P2align): Add "@var{abs-expr},".
34 2006-06-23 H.J. Lu <hongjiu.lu@intel.com>
36 * config/tc-i386.c (cpu_arch_tune_set): New.
37 (cpu_arch_isa): Likewise.
38 (i386_align_code): Use xchg %ax,%ax for 2 byte nop. Optimize
39 nops with short or long nop sequences based on -march=/.arch
41 (set_cpu_arch): Set cpu_arch_isa. If cpu_arch_tune_set is 0,
42 set cpu_arch_tune and cpu_arch_tune_flags.
43 (md_parse_option): For -march=, set cpu_arch_isa and set
44 cpu_arch_tune and cpu_arch_tune_flags if cpu_arch_tune_set is
45 0. Set cpu_arch_tune_set to 1 for -mtune=.
46 (i386_target_format): Don't set cpu_arch_tune.
48 2006-06-23 Nigel Stephens <nigel@mips.com>
50 * config/tc-mips.c (nopic_need_relax): Handle -fdata-sections
51 generated .sbss.* and .gnu.linkonce.sb.*.
53 2006-06-23 Thiemo Seufer <ths@mips.com>
54 David Ung <davidu@mips.com>
56 * config/tc-mips.h (TC_SEGMENT_INFO_TYPE): Declare per-segment
58 * config/tc-mips.c (label_list): Define per-segment label_list.
59 (mips_clear_insn_labels, mips_move_labels, mips16_mark_labels,
60 append_insn, s_align, s_cons, s_float_cons, s_gpword, s_gpdword,
61 mips_from_file_after_relocs, mips_define_label): Use per-segment
64 2006-06-22 Thiemo Seufer <ths@mips.com>
66 * config/tc-mips.c (ISA_SUPPORTS_MIPS16E): New macro.
67 (append_insn): Use it.
68 (md_apply_fix): Whitespace formatting.
69 (md_begin, append_insn, macro, macro2, mips16_immed, mips_align,
70 mips16_extended_frag): Remove register specifier.
71 (md_convert_frag): Likewise. Use TRUE ans FALSE instead of numeric
74 2006-06-21 Mark Shinwell <shinwell@codesourcery.com>
76 * config/tc-arm.c (s_arm_unwind_save_vfp_armv6): New. Parse
77 a directive saving VFP registers for ARMv6 or later.
78 (s_arm_unwind_save): Add parameter arch_v6 and call
79 s_arm_unwind_save_vfp or s_arm_unwind_save_vfp_armv6 as
81 (md_pseudo_table): Add entry for new "vsave" directive.
82 * doc/c-arm.texi: Correct error in example for "save"
83 directive (fstmdf -> fstmdx). Also document "vsave" directive.
85 2006-06-18 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
86 Anatoly Sokolov <aesok@post.ru>
88 * config/tc-avr.c (mcu_types): Add support for atmega165p, atmega169p
89 and atmega644p devices. Rename atmega164/atmega324 devices to
90 atmega164p/atmega324p.
91 * doc/c-avr.texi: Document new mcu and arch options.
93 2006-06-17 Nick Clifton <nickc@redhat.com>
95 * config/tc-arm.c (enum parse_operand_result): Move outside of
96 #ifdef OBJ_ELF so that non-ELF targeted ARM ports can build.
98 2006-06-16 H.J. Lu <hongjiu.lu@intel.com>
100 * config/tc-i386.h (processor_type): New.
101 (arch_entry): Add type.
103 * config/tc-i386.c (cpu_arch_tune): New.
104 (cpu_arch_tune_flags): Likewise.
105 (cpu_arch_isa_flags): Likewise.
107 (set_cpu_arch): Also update cpu_arch_isa_flags.
108 (md_assemble): Update cpu_arch_isa_flags.
110 (OPTION_MTUNE): Likewise.
111 (md_longopts): Add -march= and -mtune=.
112 (md_parse_option): Support -march= and -mtune=.
113 (md_show_usage): Add -march=CPU/-mtune=CPU.
114 (i386_target_format): Also update cpu_arch_isa_flags,
115 cpu_arch_tune and cpu_arch_tune_flags.
117 * doc/as.texinfo: Add -march=CPU/-mtune=CPU.
119 * doc/c-i386.texi: Document -march=CPU/-mtune=CPU.
121 2006-06-15 Mark Shinwell <shinwell@codesourcery.com>
123 * config/tc-arm.c (enum parse_operand_result): New.
124 (struct group_reloc_table_entry): New.
125 (enum group_reloc_type): New.
126 (group_reloc_table): New array.
127 (find_group_reloc_table_entry): New function.
128 (parse_shifter_operand_group_reloc): New function.
129 (parse_address_main): New function, incorporating code
130 from the old parse_address function. To be used via...
131 (parse_address): wrapper for parse_address_main; and
132 (parse_address_group_reloc): new function, likewise.
133 (enum operand_parse_code): New codes OP_SHG, OP_ADDRGLDR,
134 OP_ADDRGLDRS, OP_ADDRGLDC.
135 (parse_operands): Support for these new operand codes.
136 New macro po_misc_or_fail_no_backtrack.
137 (encode_arm_cp_address): Preserve group relocations.
138 (insns): Modify to use the above operand codes where group
139 relocations are permitted.
140 (md_apply_fix): Handle the group relocations
141 ALU_PC_G0_NC through LDC_SB_G2.
142 (tc_gen_reloc): Likewise.
143 (arm_force_relocation): Leave group relocations for the linker.
144 (arm_fix_adjustable): Likewise.
146 2006-06-15 Julian Brown <julian@codesourcery.com>
148 * config/tc-arm.c (do_vfp_nsyn_ldr_str): Remove, fold into...
149 (do_neon_ldr_str): Always defer to VFP encoding routines, which handle
152 2006-06-12 H.J. Lu <hongjiu.lu@intel.com>
154 * config/tc-i386.c (process_suffix): Don't add rex64 for
157 2006-06-09 Thiemo Seufer <ths@mips.com>
159 * config/tc-mips.c (mips_ip): Maintain argument count.
161 2006-06-09 Alan Modra <amodra@bigpond.net.au>
163 * config/tc-iq2000.c: Include sb.h.
165 2006-06-08 Nigel Stephens <nigel@mips.com>
167 * config/tc-mips.c (mips_pseudo_table): Add "origin" and "repeat"
168 aliases for better compatibility with SGI tools.
170 2006-06-08 Alan Modra <amodra@bigpond.net.au>
172 * configure.in (BFDLIB, BFDVER_H, ALL_OBJ_DEPS): Delete.
173 * Makefile.am (GASLIBS): Expand @BFDLIB@.
175 (OBJS): Expand @ALL_OBJ_DEPS@. Depend on all fopen-*.h variants.
176 (obj-aout.o): Depend on $(DEP_@target_get_type@_aout)
177 (obj-coff.o, obj-ecoff.o, obj-elf.o): Similarly.
179 * dep-in.sed: Don't substitute bfdver.h. Do remove symcat.h.
180 * Makefile.in: Regenerate.
181 * doc/Makefile.in: Regenerate.
182 * configure: Regenerate.
184 2006-06-07 Joseph S. Myers <joseph@codesourcery.com>
186 * po/Make-in (pdf, ps): New dummy targets.
188 2006-06-07 Julian Brown <julian@codesourcery.com>
190 * config/tc-arm.c (stdarg.h): include.
191 (arm_it): Add uncond_value field. Add isvec and issingle to operand
193 (arm_reg_type): Add REG_TYPE_VFSD (single or double VFP reg) and
194 REG_TYPE_NSDQ (single, double or quad vector reg).
195 (reg_expected_msgs): Update.
196 (BAD_FPU): Add macro for unsupported FPU instruction error.
197 (parse_neon_type): Support 'd' as an alias for .f64.
198 (parse_typed_reg_or_scalar): Support REG_TYPE_VFSD, REG_TYPE_NSDQ
200 (parse_vfp_reg_list): Don't update first arg on error.
201 (parse_neon_mov): Support extra syntax for VFP moves.
202 (operand_parse_code): Add OP_RVSD, OP_RNSDQ, OP_VRSDLST, OP_RVSD_IO,
203 OP_RNSDQ_RNSC, OP_RVC_PSR, OP_APSR_RR, OP_oRNSDQ.
204 (parse_operands): Support isvec, issingle operands fields, new parse
206 (do_vfp_nsyn_mrs, do_vfp_nsyn_msr): New functions. Support VFP mrs,
208 (do_mrs, do_msr, do_t_mrs, do_t_msr): Add support for above.
209 (NEON_ENC_TAB): Add vnmul, vnmla, vnmls, vcmp, vcmpz, vcmpe, vcmpez.
210 (NEON_ENC_SINGLE, NEON_ENC_DOUBLE): Define macros.
211 (NEON_SHAPE_DEF): New macro. Define table of possible instruction
213 (neon_shape): Redefine in terms of above.
214 (neon_shape_class): New enumeration, table of shape classes.
215 (neon_shape_el): New enumeration. One element of a shape.
216 (neon_shape_el_size): Register widths of above, where appropriate.
217 (neon_shape_info): New struct. Info for shape table.
218 (neon_shape_tab): New array.
219 (neon_type_mask): Add N_F64, N_VFP. Update N_MAX_NONSPECIAL.
220 (neon_check_shape): Rewrite as...
221 (neon_select_shape): New function to classify instruction shapes,
222 driven by new table neon_shape_tab array.
223 (neon_quad): New function. Return 1 if shape should set Q flag in
224 instructions (or equivalent), 0 otherwise.
225 (type_chk_of_el_type): Support F64.
226 (el_type_of_type_chk): Likewise.
227 (neon_check_type): Add support for VFP type checking (VFP data
228 elements fill their containing registers).
229 (do_vfp_cond_or_thumb): Fill in condition field in ARM mode, or 0xE
230 in thumb mode for VFP instructions.
231 (do_vfp_nsyn_opcode): New function. Look up the opcode in argument,
232 and encode the current instruction as if it were that opcode.
233 (try_vfp_nsyn): New. If this looks like a VFP instruction with ARGS
234 arguments, call function in PFN.
235 (do_vfp_nsyn_add_sub, do_vfp_nsyn_mla_mls, do_vfp_nsyn_mul)
236 (do_vfp_nsyn_abs_neg, do_vfp_nsyn_ldm_stm, do_vfp_nsyn_ldr_str)
237 (do_vfp_nsyn_sqrt, do_vfp_nsyn_div, do_vfp_nsyn_nmul)
238 (do_vfp_nsyn_cmp, nsyn_insert_sp, do_vfp_nsyn_push)
239 (do_vfp_nsyn_pop, do_vfp_nsyn_cvt, do_vfp_nsyn_cvtz): New functions.
240 Redirect Neon-syntax VFP instructions to VFP instruction handlers.
241 (do_neon_dyadic_i_su, do_neon_dyadic_i64_su, do_neon_shl_imm)
242 (do_neon_qshl_imm, do_neon_logic, do_neon_bitfield)
243 (neon_dyadic_misc, neon_compare, do_neon_tst, do_neon_qdmulh)
244 (do_neon_fcmp_absolute, do_neon_step, do_neon_sli, do_neon_sri)
245 (do_neon_qshlu_imm, neon_move_immediate, do_neon_mvn, do_neon_ext)
246 (do_neon_rev, do_neon_dup, do_neon_rshift_round_imm, do_neon_trn)
247 (do_neon_zip_uzp, do_neon_sat_abs_neg, do_neon_pair_long)
248 (do_neon_recip_est, do_neon_cls, do_neon_clz, do_neon_cnt)
249 (do_neon_swp): Use neon_select_shape not neon_check_shape. Use
251 (vfp_or_neon_is_neon): New function. Call if a mnemonic shared
252 between VFP and Neon turns out to belong to Neon. Perform
253 architecture check and fill in condition field if appropriate.
254 (do_neon_addsub_if_i, do_neon_mac_maybe_scalar, do_neon_abs_neg)
255 (do_neon_cvt): Add support for VFP variants of instructions.
256 (neon_cvt_flavour): Extend to cover VFP conversions.
257 (do_neon_mov): Rewrite to use neon_select_shape. Add support for VFP
259 (do_neon_ldr_str): Handle single-precision VFP load/store.
260 (do_neon_ld_st_interleave, do_neon_ld_st_lane, do_neon_ld_dup): Use
261 NS_NULL not NS_IGNORE.
262 (opcode_tag): Add OT_csuffixF for operands which either take a
263 conditional suffix, or have 0xF in the condition field.
264 (md_assemble): Add support for OT_csuffixF.
265 (NCE): Replace macro with...
266 (NCE_tag, NCE, NCEF): New macros.
267 (nCE): Replace macro with...
268 (nCE_tag, nCE, nCEF): New macros.
269 (insns): Add support for VFP insns or VFP versions of insns msr,
270 mrs, vsqrt, vdiv, vnmul, vnmla, vnmls, vcmp, vcmpe, vpush, vpop,
271 vcvtz, vmul, vmla, vmls, vadd, vsub, vabs, vneg, vldm, vldmia,
272 vldbdb, vstm, vstmia, vstmdb, vldr, vstr, vcvt, vmov. Group shared
273 VFP/Neon insns together.
275 2006-06-07 Alan Modra <amodra@bigpond.net.au>
276 Ladislav Michl <ladis@linux-mips.org>
278 * app.c: Don't include headers already included by as.h.
280 * atof-generic.c: Likewise.
282 * dwarf2dbg.c: Likewise.
284 * input-file.c: Likewise.
285 * input-scrub.c: Likewise.
287 * output-file.c: Likewise.
290 * config/bfin-lex.l: Likewise.
291 * config/obj-coff.h: Likewise.
292 * config/obj-elf.h: Likewise.
293 * config/obj-som.h: Likewise.
294 * config/tc-arc.c: Likewise.
295 * config/tc-arm.c: Likewise.
296 * config/tc-avr.c: Likewise.
297 * config/tc-bfin.c: Likewise.
298 * config/tc-cris.c: Likewise.
299 * config/tc-d10v.c: Likewise.
300 * config/tc-d30v.c: Likewise.
301 * config/tc-dlx.h: Likewise.
302 * config/tc-fr30.c: Likewise.
303 * config/tc-frv.c: Likewise.
304 * config/tc-h8300.c: Likewise.
305 * config/tc-hppa.c: Likewise.
306 * config/tc-i370.c: Likewise.
307 * config/tc-i860.c: Likewise.
308 * config/tc-i960.c: Likewise.
309 * config/tc-ip2k.c: Likewise.
310 * config/tc-iq2000.c: Likewise.
311 * config/tc-m32c.c: Likewise.
312 * config/tc-m32r.c: Likewise.
313 * config/tc-maxq.c: Likewise.
314 * config/tc-mcore.c: Likewise.
315 * config/tc-mips.c: Likewise.
316 * config/tc-mmix.c: Likewise.
317 * config/tc-mn10200.c: Likewise.
318 * config/tc-mn10300.c: Likewise.
319 * config/tc-msp430.c: Likewise.
320 * config/tc-mt.c: Likewise.
321 * config/tc-ns32k.c: Likewise.
322 * config/tc-openrisc.c: Likewise.
323 * config/tc-ppc.c: Likewise.
324 * config/tc-s390.c: Likewise.
325 * config/tc-sh.c: Likewise.
326 * config/tc-sh64.c: Likewise.
327 * config/tc-sparc.c: Likewise.
328 * config/tc-tic30.c: Likewise.
329 * config/tc-tic4x.c: Likewise.
330 * config/tc-tic54x.c: Likewise.
331 * config/tc-v850.c: Likewise.
332 * config/tc-vax.c: Likewise.
333 * config/tc-xc16x.c: Likewise.
334 * config/tc-xstormy16.c: Likewise.
335 * config/tc-xtensa.c: Likewise.
336 * config/tc-z80.c: Likewise.
337 * config/tc-z8k.c: Likewise.
338 * macro.h: Don't include sb.h or ansidecl.h.
339 * sb.h: Don't include stdio.h or ansidecl.h.
340 * cond.c: Include sb.h.
341 * itbl-lex.l: Include as.h instead of other system headers.
342 * itbl-parse.y: Likewise.
343 * itbl-ops.c: Similarly.
344 * itbl-ops.h: Don't include as.h or ansidecl.h.
345 * config/bfin-defs.h: Don't include bfd.h or as.h.
346 * config/bfin-parse.y: Include as.h instead of other system headers.
348 2006-06-06 Ben Elliston <bje@au.ibm.com>
349 Anton Blanchard <anton@samba.org>
351 * config/tc-ppc.c (parse_cpu): Handle "-mpower6".
352 (md_show_usage): Document it.
353 (ppc_setup_opcodes): Test power6 opcode flag bits.
354 * doc/c-ppc.texi (PowerPC-Opts): Document "-mpower6".
356 2006-06-06 Thiemo Seufer <ths@mips.com>
357 Chao-ying Fu <fu@mips.com>
359 * config/tc-mips.c (ISA_SUPPORTS_DSP64): New macro.
360 (CPU_HAS_MIPS3D, CPU_HAS_MDMX, CPU_HAS_DSP, CPU_HAS_MT): Delete.
361 (macro_build): Update comment.
362 (mips_ip): Allow DSP64 instructions for MIPS64R2.
363 (mips_after_parse_args): Remove uses of CPU_HAS_MIPS3D and
365 (mips_cpu_info): Fix formatting. Add MIPS_CPU_ASE_MIPS3D and
366 MIPS_CPU_ASE_MDMX flags for sb1.
368 2006-06-05 Thiemo Seufer <ths@mips.com>
370 * config/tc-mips.c (macro_build): Use INSERT_OPERAND wherew
372 (mips16_macro_build): Use MIPS16_INSERT_OPERAND where appropriate.
373 (mips_ip): Make overflowed/underflowed constant arguments in DSP
374 and MT instructions a fatal error. Use INSERT_OPERAND where
375 appropriate. Improve warnings for break and wait code overflows.
376 Use symbolic constant of OP_MASK_COPZ.
377 (mips16_ip): Use MIPS16_INSERT_OPERAND where appropriate.
379 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
381 * po/Make-in (top_builddir): Define.
383 2006-06-02 Joseph S. Myers <joseph@codesourcery.com>
385 * doc/Makefile.am (TEXI2DVI): Define.
386 * doc/Makefile.in: Regenerate.
387 * doc/c-arc.texi: Fix typo.
389 2006-06-01 Alan Modra <amodra@bigpond.net.au>
391 * config/obj-ieee.c: Delete.
392 * config/obj-ieee.h: Delete.
393 * Makefile.am (OBJ_FORMATS): Remove ieee.
394 (OBJ_FORMAT_CFILES, OBJ_FORMAT_HFILES): Similarly.
395 (obj-ieee.o): Remove rule.
396 * Makefile.in: Regenerate.
397 * configure.in (atof): Remove tahoe.
398 (OBJ_MAYBE_IEEE): Don't define.
399 * configure: Regenerate.
400 * config.in: Regenerate.
401 * doc/Makefile.in: Regenerate.
402 * po/POTFILES.in: Regenerate.
404 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
406 * Makefile.am: Replace INTLLIBS and INTLDEPS with LIBINTL
407 and LIBINTL_DEP everywhere.
409 (INCLUDES, DEP_INCLUDES): Use @INCINTL@.
410 * acinclude.m4: Include new gettext macros.
411 * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
412 Remove local code for po/Makefile.
413 * Makefile.in, configure, doc/Makefile.in: Regenerated.
415 2006-05-30 Nick Clifton <nickc@redhat.com>
417 * po/es.po: Updated Spanish translation.
419 2006-05-06 Denis Chertykov <denisc@overta.ru>
421 * doc/c-avr.texi: New file.
422 * doc/Makefile.am (CPU_DOCS): Add c-avr.texi
423 * doc/all.texi: Set AVR
424 * doc/as.texinfo: Include c-avr.texi
426 2006-05-28 Jie Zhang <jie.zhang@analog.com>
428 * config/bfin-parse.y (check_macfunc): Loose the condition of
429 calling check_multiply_halfregs ().
431 2006-05-25 Jie Zhang <jie.zhang@analog.com>
433 * config/bfin-parse.y (asm_1): Better check and deal with
434 vector and scalar Multiply 16-Bit Operands instructions.
436 2006-05-24 Nick Clifton <nickc@redhat.com>
438 * config/tc-hppa.c: Convert to ISO C90 format.
439 * config/tc-hppa.h: Likewise.
441 2006-05-24 Carlos O'Donell <carlos@systemhalted.org>
442 Randolph Chung <randolph@tausq.org>
444 * config/tc-hppa.c (is_tls_gdidx, is_tls_ldidx, is_tls_dtpoff,
445 is_tls_ieoff, is_tls_leoff): Define.
446 (fix_new_hppa): Handle TLS.
447 (cons_fix_new_hppa): Likewise.
449 (md_apply_fix): Handle TLS relocs.
450 * config/tc-hppa.h (hppa_fix_adjustable): Handle TLS.
452 2006-05-24 Bjoern Haase <bjoern.m.haase@web.de>
454 * config/tc-avr.c: Add new cpu targets avr6, avr2560 and avr2561.
456 2006-05-23 Thiemo Seufer <ths@mips.com>
457 David Ung <davidu@mips.com>
458 Nigel Stephens <nigel@mips.com>
461 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS): Rename.
462 (ISA_SUPPORTS_DSP_ASE, ISA_SUPPORTS_MT_ASE, ISA_HAS_64BIT_FPRS,
463 ISA_HAS_MXHC1): New macros.
464 (HAVE_32BIT_FPRS): Use ISA_HAS_64BIT_FPRS instead of
465 ISA_HAS_64BIT_REGS. Formatting fixes. Improved comments.
466 (mips_cpu_info): Change to use combined ASE/IS_ISA flag.
467 (MIPS_CPU_IS_ISA, MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP,
468 MIPS_CPU_ASE_MT, MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX): New defines.
469 (mips_after_parse_args): Change default handling of float register
470 size to account for 32bit code with 64bit FP. Better sanity checking
471 of ISA/ASE/ABI option combinations.
472 (s_mipsset): Support switching of GPR and FPR sizes via
473 .set {g,f}p={32,64,default}. Better sanity checking for .set ASE
475 (mips_elf_final_processing): We should record the use of 64bit FP
476 registers in 32bit code but we don't, because ELF header flags are
478 (mips_cpu_info_table): Add ASE flags for CPUs with mandatory ASE
479 extensions. Add 4ksc, 4kec, 4kem, 4kep, 4ksd, m4kp, 24kec, 24kef,
480 24kex, 34kc, 34kf, 34kx, 25kf CPU definitions.
481 (mips_cpu_info_from_isa): Use MIPS_CPU_IS_ISA.
482 * doc/c-mips.texi: Document .set {g,f}p={32,64,default}. Document
483 missing -march options. Document .set arch=CPU. Move .set smartmips
484 to ASE page. Use @code for .set FOO examples.
486 2006-05-23 Jie Zhang <jie.zhang@analog.com>
488 * config/tc-bfin.c (bfin_start_line_hook): Bump line counters
491 2006-05-23 Jie Zhang <jie.zhang@analog.com>
493 * config/bfin-defs.h (bfin_equals): Remove declaration.
494 * config/bfin-parse.y (asm_1): Remove "expr ASSIGN expr".
495 * config/tc-bfin.c (bfin_name_is_register): Remove.
496 (bfin_equals): Remove.
497 * config/tc-bfin.h (TC_EQUAL_IN_INSN): Redefine as 1.
498 (bfin_name_is_register): Remove declaration.
500 2006-05-19 Thiemo Seufer <ths@mips.com>
501 Nigel Stephens <nigel@mips.com>
503 * config/tc-mipc.c (ISA_HAS_ODD_SINGLE_FPR): New define.
504 (mips_oddfpreg_ok): New function.
507 2006-05-19 Thiemo Seufer <ths@mips.com>
508 David Ung <davidu@mips.com>
510 * config/tc-mips.h (tc_mips_regname_to_dw2regnum): Declare.
511 * config/tc-mipc.c (ABI_NEEDS_64BIT_REGS, ISA_HAS_64BIT_REGS,
512 ISA_HAS_DROR, ISA_HAS_ROR): Reformat.
513 (regname, RTYPE_MASK, RTYPE_NUM, RTYPE_FPU, RTYPE_FCC, RTYPE_VEC,
514 RTYPE_GP, RTYPE_CP0, RTYPE_PC, RTYPE_ACC, RTYPE_CCC, RNUM_MASK,
515 RWARN, GENERIC_REGISTER_NUMBERS, FPU_REGISTER_NAMES,
516 FPU_CONDITION_CODE_NAMES, COPROC_CONDITION_CODE_NAMES,
517 N32N64_SYMBOLIC_REGISTER_NAMES, O32_SYMBOLIC_REGISTER_NAMES,
518 SYMBOLIC_REGISTER_NAMES, MIPS16_SPECIAL_REGISTER_NAMES,
519 MDMX_VECTOR_REGISTER_NAMES, MIPS_DSP_ACCUMULATOR_NAMES, reg_names,
520 reg_names_o32, reg_names_n32n64): Define register classes.
521 (reg_lookup): New function, use register classes.
522 (md_begin): Reserve register names in the symbol table. Simplify
524 (mips_ip): Fix comment formatting. Handle symbolic COP0 registers.
526 (mips16_ip): Use reg_lookup.
527 (tc_get_register): Likewise.
528 (tc_mips_regname_to_dw2regnum): New function.
530 2006-05-19 Thiemo Seufer <ths@mips.com>
532 * config/tc-arm.c, config/tc-arm.h (tc_arm_regname_to_dw2regnum):
533 Un-constify string argument.
534 * config/tc-i386.c, config/tc-i386.h (tc_x86_regname_to_dw2regnum):
536 * config/tc-m68k.c, config/tc-m68k.h (tc_m68k_regname_to_dw2regnum):
538 * config/tc-ppc.c, config/tc-ppc.h (tc_ppc_regname_to_dw2regnum):
540 * config/tc-s390.c, config/tc-s390.h (tc_s390_regname_to_dw2regnum):
542 * config/tc-sh.c, config/tc-sh.h (sh_regname_to_dw2regnum):
544 * config/tc-sparc.c, config/tc-sparc.h (sparc_regname_to_dw2regnum):
547 2006-05-19 Nathan Sidwell <nathan@codesourcery.com>
549 * gas/config/tc-m68k.c (m68k_init_arch): Move checking of
550 cfloat/m68881 to correct architecture before using it.
552 2006-05-16 Bjoern Haase <bjoern.m.haase@web.de>
554 * config/tc-avr.h (TC_VALIDATE_FIX): Allow fixups for immediate
557 2006-05-15 Paul Brook <paul@codesourcery.com>
559 * config/tc-arm.c (arm_adjust_symtab): Use
560 bfd_is_arm_special_symbol_name.
562 2006-05-15 Bob Wilson <bob.wilson@acm.org>
564 * config/tc-xtensa.c (is_direct_call_opcode, is_branch_jmp_to_next,
565 xg_assemble_vliw_tokens, xtensa_mark_narrow_branches,
566 xtensa_fix_short_loop_frags, is_local_forward_loop, relax_frag_immed):
567 Handle errors from calls to xtensa_opcode_is_* functions.
569 2006-05-14 Thiemo Seufer <ths@mips.com>
571 * config/tc-mips.c (macro_build): Test for currently active
573 (mips16_ip): Reject invalid opcodes.
575 2006-05-11 Carlos O'Donell <carlos@codesourcery.com>
577 * doc/as.texinfo: Rename "Index" to "AS Index",
578 and "ABORT" to "ABORT (COFF)".
580 2006-05-11 Paul Brook <paul@codesourcery.com>
582 * config/tc-arm.c (parse_half): New function.
583 (operand_parse_code): Remove OP_Iffff. Add OP_HALF.
584 (parse_operands): Ditto.
585 (do_mov16): Reject invalid relocations.
586 (do_t_mov16): Ditto. Use Thumb reloc numbers.
587 (insns): Replace Iffff with HALF.
588 (md_apply_fix): Add MOVW and MOVT relocs.
589 (tc_gen_reloc): Ditto.
590 * doc/c-arm.texi: Document relocation operators
592 2006-05-11 Paul Brook <paul@codesourcery.com>
594 * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
596 2006-05-11 Thiemo Seufer <ths@mips.com>
598 * config/tc-mips.c (append_insn): Don't check the range of j or
601 2006-05-11 Pedro Alves <pedro_alves@portugalmail.pt>
603 * config/tc-arm.c (md_pcrel_from_section): Force a bias for
604 relocs against external symbols for WinCE targets.
605 (md_apply_fix): Likewise.
607 2006-05-09 David Ung <davidu@mips.com>
609 * config/tc-mips.c (append_insn): Only warn about an out-of-range
612 2006-05-09 Nick Clifton <nickc@redhat.com>
614 * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups
615 against symbols which are not going to be placed into the symbol
618 2006-05-09 Ben Elliston <bje@au.ibm.com>
620 * expr.c (operand): Remove `if (0 && ..)' statement and
621 subsequently unused target_op label. Collapse `if (1 || ..)'
623 * app.c (do_scrub_chars): Remove unused case 0, as it is handled
624 separately above the switch.
626 2006-05-08 Nick Clifton <nickc@redhat.com>
629 * config/tc-msp430.c (line_separator_character): Define as |.
631 2006-05-08 Thiemo Seufer <ths@mips.com>
632 Nigel Stephens <nigel@mips.com>
633 David Ung <davidu@mips.com>
635 * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
636 (mips_opts): Likewise.
637 (file_ase_smartmips): New variable.
638 (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
639 (macro_build): Handle SmartMIPS instructions.
641 (md_longopts): Add argument handling for smartmips.
642 (md_parse_options, mips_after_parse_args): Likewise.
643 (s_mipsset): Add .set smartmips support.
644 (md_show_usage): Document -msmartmips/-mno-smartmips.
645 * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
647 * doc/c-mips.texi: Likewise.
649 2006-05-08 Alan Modra <amodra@bigpond.net.au>
651 * write.c (relax_segment): Add pass count arg. Don't error on
652 negative org/space on first two passes.
653 (relax_seg_info): New struct.
654 (relax_seg, write_object_file): Adjust.
655 * write.h (relax_segment): Update prototype.
657 2006-05-05 Julian Brown <julian@codesourcery.com>
659 * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
661 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
662 architecture version checks.
663 (insns): Allow overlapping instructions to be used in VFP mode.
665 2006-05-05 H.J. Lu <hongjiu.lu@intel.com>
668 * config/obj-elf.c (obj_elf_change_section): Allow user
669 specified SHF_ALPHA_GPREL.
671 2006-05-05 Bjoern Haase <bjoern.m.haase@web.de>
673 * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups
674 for PMEM related expressions.
676 2006-05-05 Nick Clifton <nickc@redhat.com>
679 * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the
680 insertion of a directory separator character into a string at a
681 given offset. Uses heuristics to decide when to use a backslash
682 character rather than a forward-slash character.
683 (dwarf2_directive_loc): Use the macro.
684 (out_debug_info): Likewise.
686 2006-05-05 Thiemo Seufer <ths@mips.com>
687 David Ung <davidu@mips.com>
689 * config/tc-mips.c (macro_build): Add case 'k' to handle cache
691 (macro): Add new case M_CACHE_AB.
693 2006-05-04 Kazu Hirata <kazu@codesourcery.com>
695 * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
696 (opcode_lookup): Issue a warning for opcode with
697 OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated
698 identical to OT_cinfix3.
699 (TxC3w, TC3w, tC3w): New.
700 (insns): Use tC3w and TC3w for comparison instructions with
703 2006-05-04 Alan Modra <amodra@bigpond.net.au>
705 * subsegs.h (struct frchain): Delete frch_seg.
706 (frchain_root): Delete.
707 (seg_info): Define as macro.
708 * subsegs.c (frchain_root): Delete.
709 (abs_seg_info, und_seg_info, absolute_frchain): Delete.
710 (subsegs_begin, subseg_change): Adjust for above.
711 (subseg_set_rest): Likewise. Add new frchain structs to seginfo
712 rather than to one big list.
713 (subseg_get): Don't special case abs, und sections.
714 (subseg_new, subseg_force_new): Don't set frchainP here.
716 (subsegs_print_statistics): Adjust frag chain control list traversal.
717 * debug.c (dmp_frags): Likewise.
718 * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
719 at frchain_root. Make use of known frchain ordering.
720 (last_frag_for_seg): Likewise.
721 (get_frag_fix): Likewise. Add seg param.
722 (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
723 * write.c (chain_frchains_together_1): Adjust for struct frchain.
724 (SUB_SEGMENT_ALIGN): Likewise.
725 (subsegs_finish): Adjust frchain list traversal.
726 * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
727 (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
728 (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
729 (xtensa_fix_b_j_loop_end_frags): Likewise.
730 (xtensa_fix_close_loop_end_frags): Likewise.
731 (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
732 (retrieve_segment_info): Delete frch_seg initialisation.
734 2006-05-03 Alan Modra <amodra@bigpond.net.au>
736 * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
737 * config/obj-elf.h (obj_sec_set_private_data): Delete.
738 * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
739 * config/tc-mn10300.c (tc_gen_reloc): Likewise.
741 2006-05-02 Joseph Myers <joseph@codesourcery.com>
743 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
745 (md_apply_fix3): Multiply offset by 4 here for
746 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
748 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
749 Jan Beulich <jbeulich@novell.com>
751 * config/tc-i386.c (output_invalid_buf): Change size for
753 * config/tc-tic30.c (output_invalid_buf): Likewise.
755 * config/tc-i386.c (output_invalid): Cast none-ascii char to
757 * config/tc-tic30.c (output_invalid): Likewise.
759 2006-05-02 Daniel Jacobowitz <dan@codesourcery.com>
761 * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
762 (TEXI2POD): Use AM_MAKEINFOFLAGS.
763 (asconfig.texi): Don't set top_srcdir.
764 * doc/as.texinfo: Don't use top_srcdir.
765 * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
767 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
769 * config/tc-i386.c (output_invalid_buf): Change size to 16.
770 * config/tc-tic30.c (output_invalid_buf): Likewise.
772 * config/tc-i386.c (output_invalid): Use snprintf instead of
774 * config/tc-ia64.c (declare_register_set): Likewise.
775 (emit_one_bundle): Likewise.
776 (check_dependencies): Likewise.
777 * config/tc-tic30.c (output_invalid): Likewise.
779 2006-05-02 Paul Brook <paul@codesourcery.com>
781 * config/tc-arm.c (arm_optimize_expr): New function.
782 * config/tc-arm.h (md_optimize_expr): Define
783 (arm_optimize_expr): Add prototype.
784 (TC_FORCE_RELOCATION_SUB_SAME): Define.
786 2006-05-02 Ben Elliston <bje@au.ibm.com>
788 * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
791 * sb.h (sb_list_vector): Move to sb.c.
792 * sb.c (free_list): Use type of sb_list_vector directly.
793 (sb_build): Fix off-by-one error in assertion about `size'.
795 2006-05-01 Ben Elliston <bje@au.ibm.com>
797 * listing.c (listing_listing): Remove useless loop.
798 * macro.c (macro_expand): Remove is_positional local variable.
799 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
800 and simplify surrounding expressions, where possible.
801 (assign_symbol): Likewise.
802 (s_weakref): Likewise.
803 * symbols.c (colon): Likewise.
805 2006-05-01 James Lemke <jwlemke@wasabisystems.com>
807 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
809 2006-04-30 Thiemo Seufer <ths@mips.com>
810 David Ung <davidu@mips.com>
812 * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
813 (mips_immed): New table that records various handling of udi
814 instruction patterns.
815 (mips_ip): Adds udi handling.
817 2006-04-28 Alan Modra <amodra@bigpond.net.au>
819 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
820 of list rather than beginning.
822 2006-04-26 Julian Brown <julian@codesourcery.com>
824 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
825 (is_quarter_float): Rename from above. Simplify slightly.
826 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
828 (parse_neon_mov): Parse floating-point constants.
829 (neon_qfloat_bits): Fix encoding.
830 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
831 preference to integer encoding when using the F32 type.
833 2006-04-26 Julian Brown <julian@codesourcery.com>
835 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
836 zero-initialising structures containing it will lead to invalid types).
837 (arm_it): Add vectype to each operand.
838 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
840 (neon_typed_alias): New structure. Extra information for typed
842 (reg_entry): Add neon type info field.
843 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
844 Break out alternative syntax for coprocessor registers, etc. into...
845 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
846 out from arm_reg_parse.
847 (parse_neon_type): Move. Return SUCCESS/FAIL.
848 (first_error): New function. Call to ensure first error which occurs is
850 (parse_neon_operand_type): Parse exactly one type.
851 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
852 (parse_typed_reg_or_scalar): New function. Handle core of both
853 arm_typed_reg_parse and parse_scalar.
854 (arm_typed_reg_parse): Parse a register with an optional type.
855 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
857 (parse_scalar): Parse a Neon scalar with optional type.
858 (parse_reg_list): Use first_error.
859 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
860 (neon_alias_types_same): New function. Return true if two (alias) types
862 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
864 (insert_reg_alias): Return new reg_entry not void.
865 (insert_neon_reg_alias): New function. Insert type/index information as
866 well as register for alias.
867 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
868 make typed register aliases accordingly.
869 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
871 (s_unreq): Delete type information if present.
872 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
873 (s_arm_unwind_save_mmxwcg): Likewise.
874 (s_arm_unwind_movsp): Likewise.
875 (s_arm_unwind_setfp): Likewise.
876 (parse_shift): Likewise.
877 (parse_shifter_operand): Likewise.
878 (parse_address): Likewise.
879 (parse_tb): Likewise.
880 (tc_arm_regname_to_dw2regnum): Likewise.
881 (md_pseudo_table): Add dn, qn.
882 (parse_neon_mov): Handle typed operands.
883 (parse_operands): Likewise.
884 (neon_type_mask): Add N_SIZ.
885 (N_ALLMODS): New macro.
886 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
887 (el_type_of_type_chk): Add some safeguards.
888 (modify_types_allowed): Fix logic bug.
889 (neon_check_type): Handle operands with types.
890 (neon_three_same): Remove redundant optional arg handling.
891 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
892 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
893 (do_neon_step): Adjust accordingly.
894 (neon_cmode_for_logic_imm): Use first_error.
895 (do_neon_bitfield): Call neon_check_type.
896 (neon_dyadic): Rename to...
897 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
898 to allow modification of type of the destination.
899 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
900 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
901 (do_neon_compare): Make destination be an untyped bitfield.
902 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
903 (neon_mul_mac): Return early in case of errors.
904 (neon_move_immediate): Use first_error.
905 (neon_mac_reg_scalar_long): Fix type to include scalar.
906 (do_neon_dup): Likewise.
907 (do_neon_mov): Likewise (in several places).
908 (do_neon_tbl_tbx): Fix type.
909 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
910 (do_neon_ld_dup): Exit early in case of errors and/or use
912 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
913 Handle .dn/.qn directives.
914 (REGDEF): Add zero for reg_entry neon field.
916 2006-04-26 Julian Brown <julian@codesourcery.com>
918 * config/tc-arm.c (limits.h): Include.
919 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
920 (fpu_vfp_v3_or_neon_ext): Declare constants.
921 (neon_el_type): New enumeration of types for Neon vector elements.
922 (neon_type_el): New struct. Define type and size of a vector element.
923 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
925 (neon_type): Define struct. The type of an instruction.
926 (arm_it): Add 'vectype' for the current instruction.
927 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
928 (vfp_sp_reg_pos): Rename to...
929 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
931 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
932 (Neon D or Q register).
933 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
935 (GE_OPT_PREFIX_BIG): Define constant, for use in...
936 (my_get_expression): Allow above constant as argument to accept
937 64-bit constants with optional prefix.
938 (arm_reg_parse): Add extra argument to return the specific type of
939 register in when either a D or Q register (REG_TYPE_NDQ) is
940 requested. Can be NULL.
941 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
942 (parse_reg_list): Update for new arm_reg_parse args.
943 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
944 (parse_neon_el_struct_list): New function. Parse element/structure
945 register lists for VLD<n>/VST<n> instructions.
946 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
947 (s_arm_unwind_save_mmxwr): Likewise.
948 (s_arm_unwind_save_mmxwcg): Likewise.
949 (s_arm_unwind_movsp): Likewise.
950 (s_arm_unwind_setfp): Likewise.
951 (parse_big_immediate): New function. Parse an immediate, which may be
952 64 bits wide. Put results in inst.operands[i].
953 (parse_shift): Update for new arm_reg_parse args.
954 (parse_address): Likewise. Add parsing of alignment specifiers.
955 (parse_neon_mov): Parse the operands of a VMOV instruction.
956 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
957 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
958 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
959 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
960 (parse_operands): Handle new codes above.
961 (encode_arm_vfp_sp_reg): Rename to...
962 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
963 selected VFP version only supports D0-D15.
964 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
965 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
966 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
967 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
968 encode_arm_vfp_reg name, and allow 32 D regs.
969 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
970 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
972 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
973 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
974 constant-load and conversion insns introduced with VFPv3.
975 (neon_tab_entry): New struct.
976 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
977 those which are the targets of pseudo-instructions.
978 (neon_opc): Enumerate opcodes, use as indices into...
979 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
980 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
981 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
982 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
984 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
986 (neon_type_mask): New. Compact type representation for type checking.
987 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
988 permitted type combinations.
989 (N_IGNORE_TYPE): New macro.
990 (neon_check_shape): New function. Check an instruction shape for
991 multiple alternatives. Return the specific shape for the current
993 (neon_modify_type_size): New function. Modify a vector type and size,
994 depending on the bit mask in argument 1.
995 (neon_type_promote): New function. Convert a given "key" type (of an
996 operand) into the correct type for a different operand, based on a bit
998 (type_chk_of_el_type): New function. Convert a type and size into the
999 compact representation used for type checking.
1000 (el_type_of_type_ckh): New function. Reverse of above (only when a
1001 single bit is set in the bit mask).
1002 (modify_types_allowed): New function. Alter a mask of allowed types
1003 based on a bit mask of modifications.
1004 (neon_check_type): New function. Check the type of the current
1005 instruction against the variable argument list. The "key" type of the
1006 instruction is returned.
1007 (neon_dp_fixup): New function. Fill in and modify instruction bits for
1008 a Neon data-processing instruction depending on whether we're in ARM
1009 mode or Thumb-2 mode.
1010 (neon_logbits): New function.
1011 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
1012 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
1013 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
1014 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
1015 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
1016 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
1017 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1018 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
1019 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
1020 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
1021 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
1022 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
1023 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
1024 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
1025 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
1026 (neon_move_immediate, do_neon_mvn, neon_mixed_length)
1027 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
1028 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
1029 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
1030 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
1031 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
1032 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
1033 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
1034 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
1035 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
1037 (parse_neon_type): New function. Parse Neon type specifier.
1038 (opcode_lookup): Allow parsing of Neon type specifiers.
1039 (REGNUM2, REGSETH, REGSET2): New macros.
1040 (reg_names): Add new VFPv3 and Neon registers.
1041 (NUF, nUF, NCE, nCE): New macros for opcode table.
1042 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
1043 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
1044 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
1045 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
1046 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
1047 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
1048 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
1049 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
1050 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
1051 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
1052 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
1053 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
1054 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
1055 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
1057 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
1058 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
1059 (arm_option_cpu_value): Add vfp3 and neon.
1060 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
1063 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1065 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
1066 syntax instead of hardcoded opcodes with ".w18" suffixes.
1067 (wide_branch_opcode): New.
1068 (build_transition): Use it to check for wide branch opcodes with
1069 either ".w18" or ".w15" suffixes.
1071 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1073 * config/tc-xtensa.c (xtensa_create_literal_symbol,
1074 xg_assemble_literal, xg_assemble_literal_space): Do not set the
1075 frag's is_literal flag.
1077 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1079 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
1081 2006-04-23 Kazu Hirata <kazu@codesourcery.com>
1083 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
1084 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
1085 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
1086 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
1087 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
1089 2005-04-20 Paul Brook <paul@codesourcery.com>
1091 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
1093 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
1095 2006-04-19 Alan Modra <amodra@bigpond.net.au>
1097 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
1098 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
1099 Make some cpus unsupported on ELF. Run "make dep-am".
1100 * Makefile.in: Regenerate.
1102 2006-04-19 Alan Modra <amodra@bigpond.net.au>
1104 * configure.in (--enable-targets): Indent help message.
1105 * configure: Regenerate.
1107 2006-04-18 H.J. Lu <hongjiu.lu@intel.com>
1110 * config/tc-i386.c (i386_immediate): Check illegal immediate
1113 2006-04-18 Alan Modra <amodra@bigpond.net.au>
1115 * config/tc-i386.c: Formatting.
1116 (output_disp, output_imm): ISO C90 params.
1118 * frags.c (frag_offset_fixed_p): Constify args.
1119 * frags.h (frag_offset_fixed_p): Ditto.
1121 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
1122 (COFF_MAGIC): Delete.
1124 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
1126 2006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
1128 * po/POTFILES.in: Regenerated.
1130 2006-04-16 Mark Mitchell <mark@codesourcery.com>
1132 * doc/as.texinfo: Mention that some .type syntaxes are not
1133 supported on all architectures.
1135 2006-04-14 Sterling Augustine <sterling@tensilica.com>
1137 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
1138 instructions when such transformations have been disabled.
1140 2006-04-10 Sterling Augustine <sterling@tensilica.com>
1142 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
1143 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
1144 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
1145 decoding the loop instructions. Remove current_offset variable.
1146 (xtensa_fix_short_loop_frags): Likewise.
1147 (min_bytes_to_other_loop_end): Remove current_offset argument.
1149 2006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl>
1151 * config/tc-z80.c (z80_optimize_expr): Removed.
1152 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
1154 2006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
1156 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
1157 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
1158 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
1159 atmega644, atmega329, atmega3290, atmega649, atmega6490,
1160 atmega406, atmega640, atmega1280, atmega1281, at90can32,
1161 at90can64, at90usb646, at90usb647, at90usb1286 and
1163 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
1165 2006-04-07 Paul Brook <paul@codesourcery.com>
1167 * config/tc-arm.c (parse_operands): Set default error message.
1169 2006-04-07 Paul Brook <paul@codesourcery.com>
1171 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
1173 2006-04-07 Paul Brook <paul@codesourcery.com>
1175 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
1177 2006-04-07 Paul Brook <paul@codesourcery.com>
1179 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
1180 (move_or_literal_pool): Handle Thumb-2 instructions.
1181 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
1183 2006-04-07 Alan Modra <amodra@bigpond.net.au>
1186 * config/tc-i386.c (match_template): Move 64-bit operand tests
1189 2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
1191 * po/Make-in: Add install-html target.
1192 * Makefile.am: Add install-html and install-html-recursive targets.
1193 * Makefile.in: Regenerate.
1194 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
1195 * configure: Regenerate.
1196 * doc/Makefile.am: Add install-html and install-html-am targets.
1197 * doc/Makefile.in: Regenerate.
1199 2006-04-06 Alan Modra <amodra@bigpond.net.au>
1201 * frags.c (frag_offset_fixed_p): Reinitialise offset before
1204 2006-04-05 Richard Sandiford <richard@codesourcery.com>
1205 Daniel Jacobowitz <dan@codesourcery.com>
1207 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
1208 (GOTT_BASE, GOTT_INDEX): New.
1209 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
1210 GOTT_INDEX when generating VxWorks PIC.
1211 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
1212 use the generic *-*-vxworks* stanza instead.
1214 2006-04-04 Alan Modra <amodra@bigpond.net.au>
1217 * frags.c (frag_offset_fixed_p): New function.
1218 * frags.h (frag_offset_fixed_p): Declare.
1219 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
1220 (resolve_expression): Likewise.
1222 2006-04-03 Sterling Augustine <sterling@tensilica.com>
1224 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
1225 of the same length but different numbers of slots.
1227 2006-03-30 Andreas Schwab <schwab@suse.de>
1229 * configure.in: Fix help string for --enable-targets option.
1230 * configure: Regenerate.
1232 2006-03-28 Nathan Sidwell <nathan@codesourcery.com>
1234 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
1235 (m68k_ip): ... here. Use for all chips. Protect against buffer
1236 overrun and avoid excessive copying.
1238 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
1239 m68020_control_regs, m68040_control_regs, m68060_control_regs,
1240 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
1241 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
1242 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
1243 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
1244 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
1245 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
1246 mcf5282_ctrl, mcfv4e_ctrl): ... these.
1247 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
1248 (struct m68k_cpu): Change chip field to control_regs.
1249 (current_chip): Remove.
1250 (control_regs): New.
1251 (m68k_archs, m68k_extensions): Adjust.
1252 (m68k_cpus): Reorder to be in cpu number order. Adjust.
1253 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
1254 (find_cf_chip): Reimplement for new organization of cpu table.
1255 (select_control_regs): Remove.
1257 (struct save_opts): Save control regs, not chip.
1258 (s_save, s_restore): Adjust.
1259 (m68k_lookup_cpu): Give deprecated warning when necessary.
1260 (m68k_init_arch): Adjust.
1261 (md_show_usage): Adjust for new cpu table organization.
1263 2006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
1265 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
1266 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
1267 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
1269 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
1270 (any_gotrel): New rule.
1271 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
1272 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
1274 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
1275 (bfin_pic_ptr): New function.
1276 (md_pseudo_table): Add it for ".picptr".
1277 (OPTION_FDPIC): New macro.
1278 (md_longopts): Add -mfdpic.
1279 (md_parse_option): Handle it.
1280 (md_begin): Set BFD flags.
1281 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
1282 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
1284 * Makefile.am (bfin-parse.o): Update dependencies.
1285 (DEPTC_bfin_elf): Likewise.
1286 * Makefile.in: Regenerate.
1288 2006-03-25 Richard Sandiford <richard@codesourcery.com>
1290 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
1291 mcfemac instead of mcfmac.
1293 2006-03-23 Michael Matz <matz@suse.de>
1295 * config/tc-i386.c (type_names): Correct placement of 'static'.
1296 (reloc): Map some more relocs to their 64 bit counterpart when
1298 (output_insn): Work around breakage if DEBUG386 is defined.
1299 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
1300 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
1301 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
1302 different from i386.
1303 (output_imm): Ditto.
1304 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
1306 (md_convert_frag): Jumps can now be larger than 2GB away, error
1308 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
1309 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
1311 2006-03-22 Richard Sandiford <richard@codesourcery.com>
1312 Daniel Jacobowitz <dan@codesourcery.com>
1313 Phil Edwards <phil@codesourcery.com>
1314 Zack Weinberg <zack@codesourcery.com>
1315 Mark Mitchell <mark@codesourcery.com>
1316 Nathan Sidwell <nathan@codesourcery.com>
1318 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
1319 (md_begin): Complain about -G being used for PIC. Don't change
1320 the text, data and bss alignments on VxWorks.
1321 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
1322 generating VxWorks PIC.
1323 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
1324 (macro): Likewise, but do not treat la $25 specially for
1325 VxWorks PIC, and do not handle jal.
1326 (OPTION_MVXWORKS_PIC): New macro.
1327 (md_longopts): Add -mvxworks-pic.
1328 (md_parse_option): Don't complain about using PIC and -G together here.
1329 Handle OPTION_MVXWORKS_PIC.
1330 (md_estimate_size_before_relax): Always use the first relaxation
1331 sequence on VxWorks.
1332 * config/tc-mips.h (VXWORKS_PIC): New.
1334 2006-03-21 Paul Brook <paul@codesourcery.com>
1336 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
1338 2006-03-21 Sterling Augustine <sterling@tensilica.com>
1340 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
1341 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
1342 (get_loop_align_size): New.
1343 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
1344 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
1345 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
1346 (get_noop_aligned_address): Use get_loop_align_size.
1347 (get_aligned_diff): Likewise.
1349 2006-03-21 Paul Brook <paul@codesourcery.com>
1351 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
1353 2006-03-20 Paul Brook <paul@codesourcery.com>
1355 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
1356 (do_t_branch): Encode branches inside IT blocks as unconditional.
1357 (do_t_cps): New function.
1358 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
1359 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
1360 (opcode_lookup): Allow conditional suffixes on all instructions in
1362 (md_assemble): Advance condexec state before checking for errors.
1363 (insns): Use do_t_cps.
1365 2006-03-20 Paul Brook <paul@codesourcery.com>
1367 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
1368 outputting the insn.
1370 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1372 * config/tc-vax.c: Update copyright year.
1373 * config/tc-vax.h: Likewise.
1375 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1377 * config/tc-vax.c (md_chars_to_number): Used only locally, so
1379 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
1381 2006-03-17 Paul Brook <paul@codesourcery.com>
1383 * config/tc-arm.c (insns): Add ldm and stm.
1385 2006-03-17 Ben Elliston <bje@au.ibm.com>
1388 * doc/as.texinfo (Ident): Document this directive more thoroughly.
1390 2006-03-16 Paul Brook <paul@codesourcery.com>
1392 * config/tc-arm.c (insns): Add "svc".
1394 2006-03-13 Bob Wilson <bob.wilson@acm.org>
1396 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
1397 flag and avoid double underscore prefixes.
1399 2006-03-10 Paul Brook <paul@codesourcery.com>
1401 * config/tc-arm.c (md_begin): Handle EABIv5.
1402 (arm_eabis): Add EF_ARM_EABI_VER5.
1403 * doc/c-arm.texi: Document -meabi=5.
1405 2006-03-10 Ben Elliston <bje@au.ibm.com>
1407 * app.c (do_scrub_chars): Simplify string handling.
1409 2006-03-07 Richard Sandiford <richard@codesourcery.com>
1410 Daniel Jacobowitz <dan@codesourcery.com>
1411 Zack Weinberg <zack@codesourcery.com>
1412 Nathan Sidwell <nathan@codesourcery.com>
1413 Paul Brook <paul@codesourcery.com>
1414 Ricardo Anguiano <anguiano@codesourcery.com>
1415 Phil Edwards <phil@codesourcery.com>
1417 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
1418 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
1420 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
1421 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
1422 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
1424 2006-03-06 Bob Wilson <bob.wilson@acm.org>
1426 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
1427 even when using the text-section-literals option.
1429 2006-03-06 Nathan Sidwell <nathan@codesourcery.com>
1431 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
1433 (m68k_ip): <case 'J'> Check we have some control regs.
1434 (md_parse_option): Allow raw arch switch.
1435 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
1436 whether 68881 or cfloat was meant by -mfloat.
1437 (md_show_usage): Adjust extension display.
1438 (m68k_elf_final_processing): Adjust.
1440 2006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
1442 * config/tc-avr.c (avr_mod_hash_value): New function.
1443 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
1444 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
1445 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
1446 instead of int avr_ldi_expression: use avr_mod_hash_value instead
1448 (tc_gen_reloc): Handle substractions of symbols, if possible do
1449 fixups, abort otherwise.
1450 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
1451 tc_fix_adjustable): Define.
1453 2006-03-02 James E Wilson <wilson@specifix.com>
1455 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
1456 change the template, then clear md.slot[curr].end_of_insn_group.
1458 2006-02-28 Jan Beulich <jbeulich@novell.com>
1460 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
1462 2006-02-28 Jan Beulich <jbeulich@novell.com>
1465 * macro.c (getstring): Don't treat parentheses special anymore.
1466 (get_any_string): Don't consider '(' and ')' as quoting anymore.
1467 Special-case '(', ')', '[', and ']' when dealing with non-quoting
1470 2006-02-28 Mat <mat@csail.mit.edu>
1472 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
1474 2006-02-27 Jakub Jelinek <jakub@redhat.com>
1476 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
1478 (CFI_signal_frame): Define.
1479 (cfi_pseudo_table): Add .cfi_signal_frame.
1480 (dot_cfi): Handle CFI_signal_frame.
1481 (output_cie): Handle cie->signal_frame.
1482 (select_cie_for_fde): Don't share CIE if signal_frame flag is
1483 different. Copy signal_frame from FDE to newly created CIE.
1484 * doc/as.texinfo: Document .cfi_signal_frame.
1486 2006-02-27 Carlos O'Donell <carlos@codesourcery.com>
1488 * doc/Makefile.am: Add html target.
1489 * doc/Makefile.in: Regenerate.
1490 * po/Make-in: Add html target.
1492 2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
1494 * config/tc-i386.c (output_insn): Support Intel Merom New
1497 * config/tc-i386.h (CpuMNI): New.
1498 (CpuUnknownFlags): Add CpuMNI.
1500 2006-02-24 David S. Miller <davem@sunset.davemloft.net>
1502 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
1503 (hpriv_reg_table): New table for hyperprivileged registers.
1504 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
1507 2006-02-24 DJ Delorie <dj@redhat.com>
1509 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
1510 (tc_gen_reloc): Don't define.
1511 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
1512 (OPTION_LINKRELAX): New.
1513 (md_longopts): Add it.
1515 (md_parse_options): Set it.
1516 (md_assemble): Emit relaxation relocs as needed.
1517 (md_convert_frag): Emit relaxation relocs as needed.
1518 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
1519 (m32c_apply_fix): New.
1520 (tc_gen_reloc): New.
1521 (m32c_force_relocation): Force out jump relocs when relaxing.
1522 (m32c_fix_adjustable): Return false if relaxing.
1524 2006-02-24 Paul Brook <paul@codesourcery.com>
1526 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
1527 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
1528 (struct asm_barrier_opt): Define.
1529 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
1530 (parse_psr): Accept V7M psr names.
1531 (parse_barrier): New function.
1532 (enum operand_parse_code): Add OP_oBARRIER.
1533 (parse_operands): Implement OP_oBARRIER.
1534 (do_barrier): New function.
1535 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
1536 (do_t_cpsi): Add V7M restrictions.
1537 (do_t_mrs, do_t_msr): Validate V7M variants.
1538 (md_assemble): Check for NULL variants.
1539 (v7m_psrs, barrier_opt_names): New tables.
1540 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
1541 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
1542 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
1543 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
1544 (struct cpu_arch_ver_table): Define.
1545 (cpu_arch_ver): New.
1546 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
1547 Tag_CPU_arch_profile.
1548 * doc/c-arm.texi: Document new cpu and arch options.
1550 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1552 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
1554 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1556 * config/tc-ia64.c: Update copyright years.
1558 2006-02-22 H.J. Lu <hongjiu.lu@intel.com>
1560 * config/tc-ia64.c (specify_resource): Add the rule 17 from
1563 2005-02-22 Paul Brook <paul@codesourcery.com>
1565 * config/tc-arm.c (do_pld): Remove incorrect write to
1567 (encode_thumb32_addr_mode): Use correct operand.
1569 2006-02-21 Paul Brook <paul@codesourcery.com>
1571 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
1573 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
1574 Anil Paranjape <anilp1@kpitcummins.com>
1575 Shilin Shakti <shilins@kpitcummins.com>
1577 * Makefile.am: Add xc16x related entry.
1578 * Makefile.in: Regenerate.
1579 * configure.in: Added xc16x related entry.
1580 * configure: Regenerate.
1581 * config/tc-xc16x.h: New file
1582 * config/tc-xc16x.c: New file
1583 * doc/c-xc16x.texi: New file for xc16x
1584 * doc/all.texi: Entry for xc16x
1585 * doc/Makefile.texi: Added c-xc16x.texi
1586 * NEWS: Announce the support for the new target.
1588 2006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
1590 * configure.tgt: set emulation for mips-*-netbsd*
1592 2006-02-14 Jakub Jelinek <jakub@redhat.com>
1594 * config.in: Rebuilt.
1596 2006-02-13 Bob Wilson <bob.wilson@acm.org>
1598 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
1599 from 1, not 0, in error messages.
1600 (md_assemble): Simplify special-case check for ENTRY instructions.
1601 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
1602 operand in error message.
1604 2006-02-13 Joseph S. Myers <joseph@codesourcery.com>
1606 * configure.tgt (arm-*-linux-gnueabi*): Change to
1609 2006-02-10 Nick Clifton <nickc@redhat.com>
1611 * config/tc-crx.c (check_range): Ensure that the sign bit of a
1612 32-bit value is propagated into the upper bits of a 64-bit long.
1614 * config/tc-arc.c (init_opcode_tables): Fix cast.
1615 (arc_extoper, md_operand): Likewise.
1617 2006-02-09 David Heine <dlheine@tensilica.com>
1619 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
1620 each relaxation step.
1622 2006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
1624 * configure.in (CHECK_DECLS): Add vsnprintf.
1625 * configure: Regenerate.
1626 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
1627 include/declare here, but...
1628 * as.h: Move code detecting VARARGS idiom to the top.
1629 (errno.h, stdarg.h, varargs.h, va_list): ...here.
1630 (vsnprintf): Declare if not already declared.
1632 2006-02-08 H.J. Lu <hongjiu.lu@intel.com>
1634 * as.c (close_output_file): New.
1635 (main): Register close_output_file with xatexit before
1636 dump_statistics. Don't call output_file_close.
1638 2006-02-07 Nathan Sidwell <nathan@codesourcery.com>
1640 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
1641 mcf5329_control_regs): New.
1642 (not_current_architecture, selected_arch, selected_cpu): New.
1643 (m68k_archs, m68k_extensions): New.
1644 (archs): Renamed to ...
1645 (m68k_cpus): ... here. Adjust.
1647 (md_pseudo_table): Add arch and cpu directives.
1648 (find_cf_chip, m68k_ip): Adjust table scanning.
1649 (no_68851, no_68881): Remove.
1650 (md_assemble): Lazily initialize.
1651 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
1652 (md_init_after_args): Move functionality to m68k_init_arch.
1653 (mri_chip): Adjust table scanning.
1654 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
1655 options with saner parsing.
1656 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
1657 m68k_init_arch): New.
1658 (s_m68k_cpu, s_m68k_arch): New.
1659 (md_show_usage): Adjust.
1660 (m68k_elf_final_processing): Set CF EF flags.
1661 * config/tc-m68k.h (m68k_init_after_args): Remove.
1662 (tc_init_after_args): Remove.
1663 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
1664 (M68k-Directives): Document .arch and .cpu directives.
1666 2006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl>
1668 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
1669 synonyms for equ and defl.
1670 (z80_cons_fix_new): New function.
1671 (emit_byte): Disallow relative jumps to absolute locations.
1672 (emit_data): Only handle defb, prototype changed, because defb is
1673 now handled as pseudo-op rather than an instruction.
1674 (instab): Entries for defb,defw,db,dw moved from here...
1675 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
1676 Add entries for def24,def32,d24,d32.
1677 (md_assemble): Improved error handling.
1678 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
1679 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
1680 (z80_cons_fix_new): Declare.
1681 * doc/c-z80.texi (defb, db): Mention warning on overflow.
1682 (def24,d24,def32,d32): New pseudo-ops.
1684 2006-02-02 Paul Brook <paul@codesourcery.com>
1686 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
1688 2005-02-02 Paul Brook <paul@codesourcery.com>
1690 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
1691 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
1692 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
1693 T2_OPCODE_RSB): Define.
1694 (thumb32_negate_data_op): New function.
1695 (md_apply_fix): Use it.
1697 2006-01-31 Bob Wilson <bob.wilson@acm.org>
1699 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
1701 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
1702 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
1704 (relaxation_requirements): Add pfinish_frag argument and use it to
1705 replace setting tinsn->record_fix fields.
1706 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
1707 and vinsn_to_insnbuf. Remove references to record_fix and
1708 slot_sub_symbols fields.
1709 (xtensa_mark_narrow_branches): Delete unused code.
1710 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
1712 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
1714 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
1715 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
1716 of the record_fix field. Simplify error messages for unexpected
1718 (set_expr_symbol_offset_diff): Delete.
1720 2006-01-31 Paul Brook <paul@codesourcery.com>
1722 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
1724 2006-01-31 Paul Brook <paul@codesourcery.com>
1725 Richard Earnshaw <rearnsha@arm.com>
1727 * config/tc-arm.c: Use arm_feature_set.
1728 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
1729 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
1730 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
1733 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
1734 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
1735 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
1736 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
1738 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
1739 (arm_opts): Move old cpu/arch options from here...
1740 (arm_legacy_opts): ... to here.
1741 (md_parse_option): Search arm_legacy_opts.
1742 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
1743 (arm_float_abis, arm_eabis): Make const.
1745 2006-01-25 Bob Wilson <bob.wilson@acm.org>
1747 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
1749 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1751 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
1752 in load immediate intruction.
1754 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1756 * config/bfin-parse.y (value_match): Use correct conversion
1757 specifications in template string for __FILE__ and __LINE__.
1761 2006-01-18 Alexandre Oliva <aoliva@redhat.com>
1763 Introduce TLS descriptors for i386 and x86_64.
1764 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
1765 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
1766 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
1767 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
1768 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
1770 (build_modrm_byte): Set up zero modrm for TLS desc calls.
1771 (lex_got): Handle @tlsdesc and @tlscall.
1772 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
1774 2006-01-11 Nick Clifton <nickc@redhat.com>
1776 Fixes for building on 64-bit hosts:
1777 * config/tc-avr.c (mod_index): New union to allow conversion
1778 between pointers and integers.
1779 (md_begin, avr_ldi_expression): Use it.
1780 * config/tc-i370.c (md_assemble): Add cast for argument to print
1782 * config/tc-tic54x.c (subsym_substitute): Likewise.
1783 * config/tc-mn10200.c (md_assemble): Use a union to convert the
1784 opindex field of fr_cgen structure into a pointer so that it can
1785 be stored in a frag.
1786 * config/tc-mn10300.c (md_assemble): Likewise.
1787 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
1789 * config/tc-v850.c: Replace uses of (int) casts with correct
1792 2006-01-09 H.J. Lu <hongjiu.lu@intel.com>
1795 * symbols.c (snapshot_symbol): Don't change a defined symbol.
1797 2006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
1800 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
1801 a local-label reference.
1803 For older changes see ChangeLog-2005
1809 version-control: never
projects / deliverable / binutils-gdb.git / blob