gas/ChangeLog

   1 2006-07-06  Mohammed Adnène Trojette  <adn@diwi.org>
   2             Nick Clifton  <nickc@redhat.com>
   3
   4         PR binutils/2877
   5         * doc/as.texi: Fix spelling typo: branchs => branches.
   6         * doc/c-m68hc11.texi: Likewise.
   7         * config/tc-m68hc11.c: Likewise.
   8         Support old spelling of command line switch for backwards
   9         compatibility.
  10
  11 2006-07-04  Thiemo Seufer  <ths@mips.com>
  12             David Ung  <davidu@mips.com>
  13
  14         * config/tc-mips.c (s_is_linkonce): New function.
  15         (mips16_mark_labels): Don't adjust mips16 symbol addresses for
  16         weak, external, and linkonce symbols.
  17         (pic_need_relax): Use s_is_linkonce.
  18
  19 2006-06-24  H.J. Lu  <hongjiu.lu@intel.com>
  20
  21         * doc/as.texinfo (Org): Remove space.
  22         (P2align): Add "@var{abs-expr},".
  23
  24 2006-06-23  H.J. Lu  <hongjiu.lu@intel.com>
  25
  26         * config/tc-i386.c (cpu_arch_tune_set): New.
  27         (cpu_arch_isa): Likewise.
  28         (i386_align_code): Use xchg %ax,%ax for 2 byte nop. Optimize
  29         nops with short or long nop sequences based on -march=/.arch
  30         and -mtune=.
  31         (set_cpu_arch): Set cpu_arch_isa.  If cpu_arch_tune_set is 0,
  32         set cpu_arch_tune and cpu_arch_tune_flags.
  33         (md_parse_option): For -march=, set cpu_arch_isa and set
  34         cpu_arch_tune and cpu_arch_tune_flags if cpu_arch_tune_set is
  35         0.  Set cpu_arch_tune_set to 1 for -mtune=.
  36         (i386_target_format): Don't set cpu_arch_tune.
  37
  38 2006-06-23  Nigel Stephens  <nigel@mips.com>
  39
  40         * config/tc-mips.c (nopic_need_relax): Handle -fdata-sections
  41         generated .sbss.* and .gnu.linkonce.sb.*.
  42
  43 2006-06-23  Thiemo Seufer  <ths@mips.com>
  44             David Ung  <davidu@mips.com>
  45
  46         * config/tc-mips.h (TC_SEGMENT_INFO_TYPE): Declare per-segment
  47         label_list.
  48         * config/tc-mips.c (label_list): Define per-segment label_list.
  49         (mips_clear_insn_labels, mips_move_labels, mips16_mark_labels,
  50         append_insn, s_align, s_cons, s_float_cons, s_gpword, s_gpdword,
  51         mips_from_file_after_relocs, mips_define_label): Use per-segment
  52         label_list.
  53
  54 2006-06-22  Thiemo Seufer  <ths@mips.com>
  55
  56         * config/tc-mips.c (ISA_SUPPORTS_MIPS16E): New macro.
  57         (append_insn): Use it.
  58         (md_apply_fix): Whitespace formatting.
  59         (md_begin, append_insn, macro, macro2, mips16_immed, mips_align,
  60         mips16_extended_frag): Remove register specifier.
  61         (md_convert_frag): Likewise. Use TRUE ans FALSE instead of numeric
  62         constants.
  63
  64 2006-06-21  Mark Shinwell  <shinwell@codesourcery.com>
  65
  66         * config/tc-arm.c (s_arm_unwind_save_vfp_armv6): New.  Parse
  67         a directive saving VFP registers for ARMv6 or later.
  68         (s_arm_unwind_save): Add parameter arch_v6 and call
  69         s_arm_unwind_save_vfp or s_arm_unwind_save_vfp_armv6 as
  70         appropriate.
  71         (md_pseudo_table): Add entry for new "vsave" directive.
  72         * doc/c-arm.texi: Correct error in example for "save"
  73         directive (fstmdf -> fstmdx).  Also document "vsave" directive.
  74
  75 2006-06-18  Joerg Wunsch <j.gnu@uriah.heep.sax.de>
  76             Anatoly Sokolov <aesok@post.ru>
  77
  78         * config/tc-avr.c (mcu_types): Add support for atmega165p, atmega169p
  79         and atmega644p devices. Rename atmega164/atmega324 devices to
  80         atmega164p/atmega324p.
  81         * doc/c-avr.texi: Document new mcu and arch options.
  82
  83 2006-06-17  Nick Clifton  <nickc@redhat.com>
  84
  85         * config/tc-arm.c (enum parse_operand_result): Move outside of
  86         #ifdef OBJ_ELF so that non-ELF targeted ARM ports can build.
  87
  88 2006-06-16  H.J. Lu  <hongjiu.lu@intel.com>
  89
  90         * config/tc-i386.h (processor_type): New.
  91         (arch_entry): Add type.
  92
  93         * config/tc-i386.c (cpu_arch_tune): New.
  94         (cpu_arch_tune_flags): Likewise.
  95         (cpu_arch_isa_flags): Likewise.
  96         (cpu_arch): Updated.
  97         (set_cpu_arch): Also update cpu_arch_isa_flags.
  98         (md_assemble): Update cpu_arch_isa_flags.
  99         (OPTION_MARCH): New.
 100         (OPTION_MTUNE): Likewise.
 101         (md_longopts): Add -march= and -mtune=.
 102         (md_parse_option): Support -march= and -mtune=.
 103         (md_show_usage): Add -march=CPU/-mtune=CPU.
 104         (i386_target_format): Also update cpu_arch_isa_flags,
 105         cpu_arch_tune and cpu_arch_tune_flags.
 106
 107         * doc/as.texinfo: Add -march=CPU/-mtune=CPU.
 108
 109         * doc/c-i386.texi: Document -march=CPU/-mtune=CPU.
 110
 111 2006-06-15  Mark Shinwell  <shinwell@codesourcery.com>
 112
 113         * config/tc-arm.c (enum parse_operand_result): New.
 114         (struct group_reloc_table_entry): New.
 115         (enum group_reloc_type): New.
 116         (group_reloc_table): New array.
 117         (find_group_reloc_table_entry): New function.
 118         (parse_shifter_operand_group_reloc): New function.
 119         (parse_address_main): New function, incorporating code
 120         from the old parse_address function.  To be used via...
 121         (parse_address): wrapper for parse_address_main; and
 122         (parse_address_group_reloc): new function, likewise.
 123         (enum operand_parse_code): New codes OP_SHG, OP_ADDRGLDR,
 124         OP_ADDRGLDRS, OP_ADDRGLDC.
 125         (parse_operands): Support for these new operand codes.
 126         New macro po_misc_or_fail_no_backtrack.
 127         (encode_arm_cp_address): Preserve group relocations.
 128         (insns): Modify to use the above operand codes where group
 129         relocations are permitted.
 130         (md_apply_fix): Handle the group relocations
 131         ALU_PC_G0_NC through LDC_SB_G2.
 132         (tc_gen_reloc): Likewise.
 133         (arm_force_relocation): Leave group relocations for the linker.
 134         (arm_fix_adjustable): Likewise.
 135
 136 2006-06-15  Julian Brown  <julian@codesourcery.com>
 137
 138         * config/tc-arm.c (do_vfp_nsyn_ldr_str): Remove, fold into...
 139         (do_neon_ldr_str): Always defer to VFP encoding routines, which handle
 140         relocs properly.
 141
 142 2006-06-12  H.J. Lu  <hongjiu.lu@intel.com>
 143
 144         * config/tc-i386.c (process_suffix): Don't add rex64 for
 145         "xchg %rax,%rax".
 146
 147 2006-06-09  Thiemo Seufer  <ths@mips.com>
 148
 149         * config/tc-mips.c (mips_ip): Maintain argument count.
 150
 151 2006-06-09  Alan Modra  <amodra@bigpond.net.au>
 152
 153         * config/tc-iq2000.c: Include sb.h.
 154
 155 2006-06-08  Nigel Stephens  <nigel@mips.com>
 156
 157         * config/tc-mips.c (mips_pseudo_table): Add "origin" and "repeat"
 158         aliases for better compatibility with SGI tools.
 159
 160 2006-06-08  Alan Modra  <amodra@bigpond.net.au>
 161
 162         * configure.in (BFDLIB, BFDVER_H, ALL_OBJ_DEPS): Delete.
 163         * Makefile.am (GASLIBS): Expand @BFDLIB@.
 164         (BFDVER_H): Delete.
 165         (OBJS): Expand @ALL_OBJ_DEPS@.  Depend on all fopen-*.h variants.
 166         (obj-aout.o): Depend on $(DEP_@target_get_type@_aout)
 167         (obj-coff.o, obj-ecoff.o, obj-elf.o): Similarly.
 168         Run "make dep-am".
 169         * dep-in.sed: Don't substitute bfdver.h.  Do remove symcat.h.
 170         * Makefile.in: Regenerate.
 171         * doc/Makefile.in: Regenerate.
 172         * configure: Regenerate.
 173
 174 2006-06-07  Joseph S. Myers  <joseph@codesourcery.com>
 175
 176         * po/Make-in (pdf, ps): New dummy targets.
 177
 178 2006-06-07  Julian Brown  <julian@codesourcery.com>
 179
 180         * config/tc-arm.c (stdarg.h): include.
 181         (arm_it): Add uncond_value field. Add isvec and issingle to operand
 182         array.
 183         (arm_reg_type): Add REG_TYPE_VFSD (single or double VFP reg) and
 184         REG_TYPE_NSDQ (single, double or quad vector reg).
 185         (reg_expected_msgs): Update.
 186         (BAD_FPU): Add macro for unsupported FPU instruction error.
 187         (parse_neon_type): Support 'd' as an alias for .f64.
 188         (parse_typed_reg_or_scalar): Support REG_TYPE_VFSD, REG_TYPE_NSDQ
 189         sets of registers.
 190         (parse_vfp_reg_list): Don't update first arg on error.
 191         (parse_neon_mov): Support extra syntax for VFP moves.
 192         (operand_parse_code): Add OP_RVSD, OP_RNSDQ, OP_VRSDLST, OP_RVSD_IO,
 193         OP_RNSDQ_RNSC, OP_RVC_PSR, OP_APSR_RR, OP_oRNSDQ.
 194         (parse_operands): Support isvec, issingle operands fields, new parse
 195         codes above.
 196         (do_vfp_nsyn_mrs, do_vfp_nsyn_msr): New functions. Support VFP mrs,
 197         msr variants.
 198         (do_mrs, do_msr, do_t_mrs, do_t_msr): Add support for above.
 199         (NEON_ENC_TAB): Add vnmul, vnmla, vnmls, vcmp, vcmpz, vcmpe, vcmpez.
 200         (NEON_ENC_SINGLE, NEON_ENC_DOUBLE): Define macros.
 201         (NEON_SHAPE_DEF): New macro. Define table of possible instruction
 202         shapes.
 203         (neon_shape): Redefine in terms of above.
 204         (neon_shape_class): New enumeration, table of shape classes.
 205         (neon_shape_el): New enumeration. One element of a shape.
 206         (neon_shape_el_size): Register widths of above, where appropriate.
 207         (neon_shape_info): New struct. Info for shape table.
 208         (neon_shape_tab): New array.
 209         (neon_type_mask): Add N_F64, N_VFP. Update N_MAX_NONSPECIAL.
 210         (neon_check_shape): Rewrite as...
 211         (neon_select_shape): New function to classify instruction shapes,
 212         driven by new table neon_shape_tab array.
 213         (neon_quad): New function. Return 1 if shape should set Q flag in
 214         instructions (or equivalent), 0 otherwise.
 215         (type_chk_of_el_type): Support F64.
 216         (el_type_of_type_chk): Likewise.
 217         (neon_check_type): Add support for VFP type checking (VFP data
 218         elements fill their containing registers).
 219         (do_vfp_cond_or_thumb): Fill in condition field in ARM mode, or 0xE
 220         in thumb mode for VFP instructions.
 221         (do_vfp_nsyn_opcode): New function. Look up the opcode in argument,
 222         and encode the current instruction as if it were that opcode.
 223         (try_vfp_nsyn): New. If this looks like a VFP instruction with ARGS
 224         arguments, call function in PFN.
 225         (do_vfp_nsyn_add_sub, do_vfp_nsyn_mla_mls, do_vfp_nsyn_mul)
 226         (do_vfp_nsyn_abs_neg, do_vfp_nsyn_ldm_stm, do_vfp_nsyn_ldr_str)
 227         (do_vfp_nsyn_sqrt, do_vfp_nsyn_div, do_vfp_nsyn_nmul)
 228         (do_vfp_nsyn_cmp, nsyn_insert_sp, do_vfp_nsyn_push)
 229         (do_vfp_nsyn_pop, do_vfp_nsyn_cvt, do_vfp_nsyn_cvtz): New functions.
 230         Redirect Neon-syntax VFP instructions to VFP instruction handlers.
 231         (do_neon_dyadic_i_su, do_neon_dyadic_i64_su, do_neon_shl_imm)
 232         (do_neon_qshl_imm, do_neon_logic, do_neon_bitfield)
 233         (neon_dyadic_misc, neon_compare, do_neon_tst, do_neon_qdmulh)
 234         (do_neon_fcmp_absolute, do_neon_step, do_neon_sli, do_neon_sri)
 235         (do_neon_qshlu_imm, neon_move_immediate, do_neon_mvn, do_neon_ext)
 236         (do_neon_rev, do_neon_dup, do_neon_rshift_round_imm, do_neon_trn)
 237         (do_neon_zip_uzp, do_neon_sat_abs_neg, do_neon_pair_long)
 238         (do_neon_recip_est, do_neon_cls, do_neon_clz, do_neon_cnt)
 239         (do_neon_swp): Use neon_select_shape not neon_check_shape. Use
 240         neon_quad.
 241         (vfp_or_neon_is_neon): New function. Call if a mnemonic shared
 242         between VFP and Neon turns out to belong to Neon. Perform
 243         architecture check and fill in condition field if appropriate.
 244         (do_neon_addsub_if_i, do_neon_mac_maybe_scalar, do_neon_abs_neg)
 245         (do_neon_cvt): Add support for VFP variants of instructions.
 246         (neon_cvt_flavour): Extend to cover VFP conversions.
 247         (do_neon_mov): Rewrite to use neon_select_shape. Add support for VFP
 248         vmov variants.
 249         (do_neon_ldr_str): Handle single-precision VFP load/store.
 250         (do_neon_ld_st_interleave, do_neon_ld_st_lane, do_neon_ld_dup): Use
 251         NS_NULL not NS_IGNORE.
 252         (opcode_tag): Add OT_csuffixF for operands which either take a
 253         conditional suffix, or have 0xF in the condition field.
 254         (md_assemble): Add support for OT_csuffixF.
 255         (NCE): Replace macro with...
 256         (NCE_tag, NCE, NCEF): New macros.
 257         (nCE): Replace macro with...
 258         (nCE_tag, nCE, nCEF): New macros.
 259         (insns): Add support for VFP insns or VFP versions of insns msr,
 260         mrs, vsqrt, vdiv, vnmul, vnmla, vnmls, vcmp, vcmpe, vpush, vpop,
 261         vcvtz, vmul, vmla, vmls, vadd, vsub, vabs, vneg, vldm, vldmia,
 262         vldbdb, vstm, vstmia, vstmdb, vldr, vstr, vcvt, vmov. Group shared
 263         VFP/Neon insns together.
 264
 265 2006-06-07  Alan Modra  <amodra@bigpond.net.au>
 266             Ladislav Michl  <ladis@linux-mips.org>
 267
 268         * app.c: Don't include headers already included by as.h.
 269         * as.c: Likewise.
 270         * atof-generic.c: Likewise.
 271         * cgen.c: Likewise.
 272         * dwarf2dbg.c: Likewise.
 273         * expr.c: Likewise.
 274         * input-file.c: Likewise.
 275         * input-scrub.c: Likewise.
 276         * macro.c: Likewise.
 277         * output-file.c: Likewise.
 278         * read.c: Likewise.
 279         * sb.c: Likewise.
 280         * config/bfin-lex.l: Likewise.
 281         * config/obj-coff.h: Likewise.
 282         * config/obj-elf.h: Likewise.
 283         * config/obj-som.h: Likewise.
 284         * config/tc-arc.c: Likewise.
 285         * config/tc-arm.c: Likewise.
 286         * config/tc-avr.c: Likewise.
 287         * config/tc-bfin.c: Likewise.
 288         * config/tc-cris.c: Likewise.
 289         * config/tc-d10v.c: Likewise.
 290         * config/tc-d30v.c: Likewise.
 291         * config/tc-dlx.h: Likewise.
 292         * config/tc-fr30.c: Likewise.
 293         * config/tc-frv.c: Likewise.
 294         * config/tc-h8300.c: Likewise.
 295         * config/tc-hppa.c: Likewise.
 296         * config/tc-i370.c: Likewise.
 297         * config/tc-i860.c: Likewise.
 298         * config/tc-i960.c: Likewise.
 299         * config/tc-ip2k.c: Likewise.
 300         * config/tc-iq2000.c: Likewise.
 301         * config/tc-m32c.c: Likewise.
 302         * config/tc-m32r.c: Likewise.
 303         * config/tc-maxq.c: Likewise.
 304         * config/tc-mcore.c: Likewise.
 305         * config/tc-mips.c: Likewise.
 306         * config/tc-mmix.c: Likewise.
 307         * config/tc-mn10200.c: Likewise.
 308         * config/tc-mn10300.c: Likewise.
 309         * config/tc-msp430.c: Likewise.
 310         * config/tc-mt.c: Likewise.
 311         * config/tc-ns32k.c: Likewise.
 312         * config/tc-openrisc.c: Likewise.
 313         * config/tc-ppc.c: Likewise.
 314         * config/tc-s390.c: Likewise.
 315         * config/tc-sh.c: Likewise.
 316         * config/tc-sh64.c: Likewise.
 317         * config/tc-sparc.c: Likewise.
 318         * config/tc-tic30.c: Likewise.
 319         * config/tc-tic4x.c: Likewise.
 320         * config/tc-tic54x.c: Likewise.
 321         * config/tc-v850.c: Likewise.
 322         * config/tc-vax.c: Likewise.
 323         * config/tc-xc16x.c: Likewise.
 324         * config/tc-xstormy16.c: Likewise.
 325         * config/tc-xtensa.c: Likewise.
 326         * config/tc-z80.c: Likewise.
 327         * config/tc-z8k.c: Likewise.
 328         * macro.h: Don't include sb.h or ansidecl.h.
 329         * sb.h: Don't include stdio.h or ansidecl.h.
 330         * cond.c: Include sb.h.
 331         * itbl-lex.l: Include as.h instead of other system headers.
 332         * itbl-parse.y: Likewise.
 333         * itbl-ops.c: Similarly.
 334         * itbl-ops.h: Don't include as.h or ansidecl.h.
 335         * config/bfin-defs.h: Don't include bfd.h or as.h.
 336         * config/bfin-parse.y: Include as.h instead of other system headers.
 337
 338 2006-06-06  Ben Elliston  <bje@au.ibm.com>
 339             Anton Blanchard  <anton@samba.org>
 340
 341         * config/tc-ppc.c (parse_cpu): Handle "-mpower6".
 342         (md_show_usage): Document it.
 343         (ppc_setup_opcodes): Test power6 opcode flag bits.
 344         * doc/c-ppc.texi (PowerPC-Opts): Document "-mpower6".
 345
 346 2006-06-06  Thiemo Seufer  <ths@mips.com>
 347             Chao-ying Fu  <fu@mips.com>
 348
 349         * config/tc-mips.c (ISA_SUPPORTS_DSP64): New macro.
 350         (CPU_HAS_MIPS3D, CPU_HAS_MDMX, CPU_HAS_DSP, CPU_HAS_MT): Delete.
 351         (macro_build): Update comment.
 352         (mips_ip): Allow DSP64 instructions for MIPS64R2.
 353         (mips_after_parse_args): Remove uses of CPU_HAS_MIPS3D and
 354         CPU_HAS_MDMX.
 355         (mips_cpu_info): Fix formatting. Add MIPS_CPU_ASE_MIPS3D and
 356         MIPS_CPU_ASE_MDMX flags for sb1.
 357
 358 2006-06-05  Thiemo Seufer  <ths@mips.com>
 359
 360         * config/tc-mips.c (macro_build): Use INSERT_OPERAND wherew
 361         appropriate.
 362         (mips16_macro_build): Use MIPS16_INSERT_OPERAND where appropriate.
 363         (mips_ip): Make overflowed/underflowed constant arguments in DSP
 364         and MT instructions a fatal error. Use INSERT_OPERAND where
 365         appropriate. Improve warnings for break and wait code overflows.
 366         Use symbolic constant of OP_MASK_COPZ.
 367         (mips16_ip): Use MIPS16_INSERT_OPERAND where appropriate.
 368
 369 2006-06-05  Daniel Jacobowitz  <dan@codesourcery.com>
 370
 371         * po/Make-in (top_builddir): Define.
 372
 373 2006-06-02  Joseph S. Myers  <joseph@codesourcery.com>
 374
 375         * doc/Makefile.am (TEXI2DVI): Define.
 376         * doc/Makefile.in: Regenerate.
 377         * doc/c-arc.texi: Fix typo.
 378
 379 2006-06-01  Alan Modra  <amodra@bigpond.net.au>
 380
 381         * config/obj-ieee.c: Delete.
 382         * config/obj-ieee.h: Delete.
 383         * Makefile.am (OBJ_FORMATS): Remove ieee.
 384         (OBJ_FORMAT_CFILES, OBJ_FORMAT_HFILES): Similarly.
 385         (obj-ieee.o): Remove rule.
 386         * Makefile.in: Regenerate.
 387         * configure.in (atof): Remove tahoe.
 388         (OBJ_MAYBE_IEEE): Don't define.
 389         * configure: Regenerate.
 390         * config.in: Regenerate.
 391         * doc/Makefile.in: Regenerate.
 392         * po/POTFILES.in: Regenerate.
 393
 394 2006-05-31  Daniel Jacobowitz  <dan@codesourcery.com>
 395
 396         * Makefile.am: Replace INTLLIBS and INTLDEPS with LIBINTL
 397         and LIBINTL_DEP everywhere.
 398         (INTLLIBS): Remove.
 399         (INCLUDES, DEP_INCLUDES): Use @INCINTL@.
 400         * acinclude.m4: Include new gettext macros.
 401         * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
 402         Remove local code for po/Makefile.
 403         * Makefile.in, configure, doc/Makefile.in: Regenerated.
 404
 405 2006-05-30  Nick Clifton  <nickc@redhat.com>
 406
 407         * po/es.po: Updated Spanish translation.
 408
 409 2006-05-06  Denis Chertykov  <denisc@overta.ru>
 410
 411         * doc/c-avr.texi: New file.
 412         * doc/Makefile.am (CPU_DOCS): Add c-avr.texi
 413         * doc/all.texi: Set AVR
 414         * doc/as.texinfo: Include c-avr.texi
 415
 416 2006-05-28  Jie Zhang  <jie.zhang@analog.com>
 417
 418         * config/bfin-parse.y (check_macfunc): Loose the condition of
 419         calling check_multiply_halfregs ().
 420
 421 2006-05-25  Jie Zhang  <jie.zhang@analog.com>
 422
 423         * config/bfin-parse.y (asm_1): Better check and deal with
 424         vector and scalar Multiply 16-Bit Operands instructions.
 425
 426 2006-05-24  Nick Clifton  <nickc@redhat.com>
 427
 428         * config/tc-hppa.c: Convert to ISO C90 format.
 429         * config/tc-hppa.h: Likewise.
 430
 431 2006-05-24  Carlos O'Donell  <carlos@systemhalted.org>
 432             Randolph Chung  <randolph@tausq.org>
 433
 434         * config/tc-hppa.c (is_tls_gdidx, is_tls_ldidx, is_tls_dtpoff,
 435         is_tls_ieoff, is_tls_leoff): Define.
 436         (fix_new_hppa): Handle TLS.
 437         (cons_fix_new_hppa): Likewise.
 438         (pa_ip): Likewise.
 439         (md_apply_fix): Handle TLS relocs.
 440         * config/tc-hppa.h (hppa_fix_adjustable): Handle TLS.
 441
 442 2006-05-24  Bjoern Haase  <bjoern.m.haase@web.de>
 443
 444         * config/tc-avr.c: Add new cpu targets avr6, avr2560 and avr2561.
 445
 446 2006-05-23  Thiemo Seufer  <ths@mips.com>
 447             David Ung  <davidu@mips.com>
 448             Nigel Stephens  <nigel@mips.com>
 449
 450         [ gas/ChangeLog ]
 451         * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS): Rename.
 452         (ISA_SUPPORTS_DSP_ASE, ISA_SUPPORTS_MT_ASE, ISA_HAS_64BIT_FPRS,
 453         ISA_HAS_MXHC1): New macros.
 454         (HAVE_32BIT_FPRS): Use ISA_HAS_64BIT_FPRS instead of
 455         ISA_HAS_64BIT_REGS.  Formatting fixes.  Improved comments.
 456         (mips_cpu_info): Change to use combined ASE/IS_ISA flag.
 457         (MIPS_CPU_IS_ISA, MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP,
 458         MIPS_CPU_ASE_MT, MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX): New defines.
 459         (mips_after_parse_args): Change default handling of float register
 460         size to account for 32bit code with 64bit FP. Better sanity checking
 461         of ISA/ASE/ABI option combinations.
 462         (s_mipsset): Support switching of GPR and FPR sizes via
 463         .set {g,f}p={32,64,default}. Better sanity checking for .set ASE
 464         options.
 465         (mips_elf_final_processing): We should record the use of 64bit FP
 466         registers in 32bit code but we don't, because ELF header flags are
 467         a scarce ressource.
 468         (mips_cpu_info_table): Add ASE flags for CPUs with mandatory ASE
 469         extensions. Add 4ksc, 4kec, 4kem, 4kep, 4ksd, m4kp, 24kec, 24kef,
 470         24kex, 34kc, 34kf, 34kx, 25kf CPU definitions.
 471         (mips_cpu_info_from_isa): Use MIPS_CPU_IS_ISA.
 472         * doc/c-mips.texi: Document .set {g,f}p={32,64,default}. Document
 473         missing -march options. Document .set arch=CPU. Move .set smartmips
 474         to ASE page. Use @code for .set FOO examples.
 475
 476 2006-05-23  Jie Zhang  <jie.zhang@analog.com>
 477
 478         * config/tc-bfin.c (bfin_start_line_hook): Bump line counters
 479         if needed.
 480
 481 2006-05-23  Jie Zhang  <jie.zhang@analog.com>
 482
 483         * config/bfin-defs.h (bfin_equals): Remove declaration.
 484         * config/bfin-parse.y (asm_1): Remove "expr ASSIGN expr".
 485         * config/tc-bfin.c (bfin_name_is_register): Remove.
 486         (bfin_equals): Remove.
 487         * config/tc-bfin.h (TC_EQUAL_IN_INSN): Redefine as 1.
 488         (bfin_name_is_register): Remove declaration.
 489
 490 2006-05-19  Thiemo Seufer  <ths@mips.com>
 491             Nigel Stephens  <nigel@mips.com>
 492
 493         * config/tc-mipc.c (ISA_HAS_ODD_SINGLE_FPR): New define.
 494         (mips_oddfpreg_ok): New function.
 495         (mips_ip): Use it.
 496
 497 2006-05-19  Thiemo Seufer  <ths@mips.com>
 498             David Ung  <davidu@mips.com>
 499
 500         * config/tc-mips.h (tc_mips_regname_to_dw2regnum): Declare.
 501         * config/tc-mipc.c (ABI_NEEDS_64BIT_REGS, ISA_HAS_64BIT_REGS,
 502         ISA_HAS_DROR, ISA_HAS_ROR): Reformat.
 503         (regname, RTYPE_MASK, RTYPE_NUM, RTYPE_FPU, RTYPE_FCC, RTYPE_VEC,
 504         RTYPE_GP, RTYPE_CP0, RTYPE_PC, RTYPE_ACC, RTYPE_CCC, RNUM_MASK,
 505         RWARN, GENERIC_REGISTER_NUMBERS, FPU_REGISTER_NAMES,
 506         FPU_CONDITION_CODE_NAMES, COPROC_CONDITION_CODE_NAMES,
 507         N32N64_SYMBOLIC_REGISTER_NAMES, O32_SYMBOLIC_REGISTER_NAMES,
 508         SYMBOLIC_REGISTER_NAMES, MIPS16_SPECIAL_REGISTER_NAMES,
 509         MDMX_VECTOR_REGISTER_NAMES, MIPS_DSP_ACCUMULATOR_NAMES, reg_names,
 510         reg_names_o32, reg_names_n32n64): Define register classes.
 511         (reg_lookup): New function, use register classes.
 512         (md_begin): Reserve register names in the symbol table. Simplify
 513         OBJ_ELF defines.
 514         (mips_ip): Fix comment formatting. Handle symbolic COP0 registers.
 515         Use reg_lookup.
 516         (mips16_ip): Use reg_lookup.
 517         (tc_get_register): Likewise.
 518         (tc_mips_regname_to_dw2regnum): New function.
 519
 520 2006-05-19  Thiemo Seufer  <ths@mips.com>
 521
 522         * config/tc-arm.c, config/tc-arm.h (tc_arm_regname_to_dw2regnum):
 523         Un-constify string argument.
 524         * config/tc-i386.c, config/tc-i386.h (tc_x86_regname_to_dw2regnum):
 525         Likewise.
 526         * config/tc-m68k.c, config/tc-m68k.h (tc_m68k_regname_to_dw2regnum):
 527         Likewise.
 528         * config/tc-ppc.c, config/tc-ppc.h (tc_ppc_regname_to_dw2regnum):
 529         Likewise.
 530         * config/tc-s390.c, config/tc-s390.h (tc_s390_regname_to_dw2regnum):
 531         Likewise.
 532         * config/tc-sh.c, config/tc-sh.h (sh_regname_to_dw2regnum):
 533         Likewise.
 534         * config/tc-sparc.c, config/tc-sparc.h (sparc_regname_to_dw2regnum):
 535         Likewise.
 536
 537 2006-05-19  Nathan Sidwell  <nathan@codesourcery.com>
 538
 539         * gas/config/tc-m68k.c (m68k_init_arch): Move checking of
 540         cfloat/m68881 to correct architecture before using it.
 541
 542 2006-05-16  Bjoern Haase  <bjoern.m.haase@web.de>
 543
 544         * config/tc-avr.h (TC_VALIDATE_FIX): Allow fixups for immediate
 545         constant values.
 546
 547 2006-05-15  Paul Brook  <paul@codesourcery.com>
 548
 549         * config/tc-arm.c (arm_adjust_symtab): Use
 550         bfd_is_arm_special_symbol_name.
 551
 552 2006-05-15  Bob Wilson  <bob.wilson@acm.org>
 553
 554         * config/tc-xtensa.c (is_direct_call_opcode, is_branch_jmp_to_next,
 555         xg_assemble_vliw_tokens, xtensa_mark_narrow_branches,
 556         xtensa_fix_short_loop_frags, is_local_forward_loop, relax_frag_immed):
 557         Handle errors from calls to xtensa_opcode_is_* functions.
 558
 559 2006-05-14  Thiemo Seufer  <ths@mips.com>
 560
 561         * config/tc-mips.c (macro_build): Test for currently active
 562         mips16 option.
 563         (mips16_ip): Reject invalid opcodes.
 564
 565 2006-05-11  Carlos O'Donell  <carlos@codesourcery.com>
 566
 567         * doc/as.texinfo: Rename "Index" to "AS Index",
 568         and "ABORT" to "ABORT (COFF)".
 569
 570 2006-05-11  Paul Brook  <paul@codesourcery.com>
 571
 572         * config/tc-arm.c (parse_half): New function.
 573         (operand_parse_code): Remove OP_Iffff.  Add OP_HALF.
 574         (parse_operands): Ditto.
 575         (do_mov16): Reject invalid relocations.
 576         (do_t_mov16): Ditto.  Use Thumb reloc numbers.
 577         (insns): Replace Iffff with HALF.
 578         (md_apply_fix): Add MOVW and MOVT relocs.
 579         (tc_gen_reloc): Ditto.
 580         * doc/c-arm.texi: Document relocation operators
 581
 582 2006-05-11  Paul Brook  <paul@codesourcery.com>
 583
 584         * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
 585
 586 2006-05-11  Thiemo Seufer  <ths@mips.com>
 587
 588         * config/tc-mips.c (append_insn): Don't check the range of j or
 589         jal addresses.
 590
 591 2006-05-11  Pedro Alves  <pedro_alves@portugalmail.pt>
 592
 593         * config/tc-arm.c (md_pcrel_from_section): Force a bias for
 594         relocs against external symbols for WinCE targets.
 595         (md_apply_fix): Likewise.
 596
 597 2006-05-09  David Ung  <davidu@mips.com>
 598
 599         * config/tc-mips.c (append_insn): Only warn about an out-of-range
 600         j or jal address.
 601
 602 2006-05-09  Nick Clifton  <nickc@redhat.com>
 603
 604         * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups
 605         against symbols which are not going to be placed into the symbol
 606         table.
 607
 608 2006-05-09  Ben Elliston  <bje@au.ibm.com>
 609
 610         * expr.c (operand): Remove `if (0 && ..)' statement and
 611         subsequently unused target_op label.  Collapse `if (1 || ..)'
 612         statement.
 613         * app.c (do_scrub_chars): Remove unused case 0, as it is handled
 614         separately above the switch.
 615
 616 2006-05-08  Nick Clifton  <nickc@redhat.com>
 617
 618         PR gas/2623
 619         * config/tc-msp430.c (line_separator_character): Define as |.
 620
 621 2006-05-08  Thiemo Seufer  <ths@mips.com>
 622             Nigel Stephens  <nigel@mips.com>
 623             David Ung  <davidu@mips.com>
 624
 625         * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
 626         (mips_opts): Likewise.
 627         (file_ase_smartmips): New variable.
 628         (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
 629         (macro_build): Handle SmartMIPS instructions.
 630         (mips_ip): Likewise.
 631         (md_longopts): Add argument handling for smartmips.
 632         (md_parse_options, mips_after_parse_args): Likewise.
 633         (s_mipsset): Add .set smartmips support.
 634         (md_show_usage): Document -msmartmips/-mno-smartmips.
 635         * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
 636         .set smartmips.
 637         * doc/c-mips.texi: Likewise.
 638
 639 2006-05-08  Alan Modra  <amodra@bigpond.net.au>
 640
 641         * write.c (relax_segment): Add pass count arg.  Don't error on
 642         negative org/space on first two passes.
 643         (relax_seg_info): New struct.
 644         (relax_seg, write_object_file): Adjust.
 645         * write.h (relax_segment): Update prototype.
 646
 647 2006-05-05  Julian Brown  <julian@codesourcery.com>
 648
 649         * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
 650         checking.
 651         (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
 652         architecture version checks.
 653         (insns): Allow overlapping instructions to be used in VFP mode.
 654
 655 2006-05-05  H.J. Lu  <hongjiu.lu@intel.com>
 656
 657         PR gas/2598
 658         * config/obj-elf.c (obj_elf_change_section): Allow user
 659         specified SHF_ALPHA_GPREL.
 660
 661 2006-05-05  Bjoern Haase  <bjoern.m.haase@web.de>
 662
 663         * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define.  Disable fixups
 664         for PMEM related expressions.
 665
 666 2006-05-05  Nick Clifton  <nickc@redhat.com>
 667
 668         PR gas/2582
 669         * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro.  Handles the
 670         insertion of a directory separator character into a string at a
 671         given offset.  Uses heuristics to decide when to use a backslash
 672         character rather than a forward-slash character.
 673         (dwarf2_directive_loc): Use the macro.
 674         (out_debug_info): Likewise.
 675
 676 2006-05-05  Thiemo Seufer  <ths@mips.com>
 677             David Ung  <davidu@mips.com>
 678
 679         * config/tc-mips.c (macro_build): Add case 'k' to handle cache
 680         instruction.
 681         (macro): Add new case M_CACHE_AB.
 682
 683 2006-05-04  Kazu Hirata  <kazu@codesourcery.com>
 684
 685         * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
 686         (opcode_lookup): Issue a warning for opcode with
 687         OT_cinfix3_deprecated.  Otherwise treat OT_cinfix3_deprecated
 688         identical to OT_cinfix3.
 689         (TxC3w, TC3w, tC3w): New.
 690         (insns): Use tC3w and TC3w for comparison instructions with
 691         's' suffix.
 692
 693 2006-05-04  Alan Modra  <amodra@bigpond.net.au>
 694
 695         * subsegs.h (struct frchain): Delete frch_seg.
 696         (frchain_root): Delete.
 697         (seg_info): Define as macro.
 698         * subsegs.c (frchain_root): Delete.
 699         (abs_seg_info, und_seg_info, absolute_frchain): Delete.
 700         (subsegs_begin, subseg_change): Adjust for above.
 701         (subseg_set_rest): Likewise.  Add new frchain structs to seginfo
 702         rather than to one big list.
 703         (subseg_get): Don't special case abs, und sections.
 704         (subseg_new, subseg_force_new): Don't set frchainP here.
 705         (seg_info): Delete.
 706         (subsegs_print_statistics): Adjust frag chain control list traversal.
 707         * debug.c (dmp_frags):  Likewise.
 708         * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
 709         at frchain_root.  Make use of known frchain ordering.
 710         (last_frag_for_seg): Likewise.
 711         (get_frag_fix): Likewise.  Add seg param.
 712         (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
 713         * write.c (chain_frchains_together_1): Adjust for struct frchain.
 714         (SUB_SEGMENT_ALIGN): Likewise.
 715         (subsegs_finish): Adjust frchain list traversal.
 716         * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
 717         (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
 718         (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
 719         (xtensa_fix_b_j_loop_end_frags): Likewise.
 720         (xtensa_fix_close_loop_end_frags): Likewise.
 721         (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
 722         (retrieve_segment_info): Delete frch_seg initialisation.
 723
 724 2006-05-03  Alan Modra  <amodra@bigpond.net.au>
 725
 726         * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
 727         * config/obj-elf.h (obj_sec_set_private_data): Delete.
 728         * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
 729         * config/tc-mn10300.c (tc_gen_reloc): Likewise.
 730
 731 2006-05-02  Joseph Myers  <joseph@codesourcery.com>
 732
 733         * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
 734         here.
 735         (md_apply_fix3): Multiply offset by 4 here for
 736         BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
 737
 738 2006-05-02  H.J. Lu  <hongjiu.lu@intel.com>
 739             Jan Beulich  <jbeulich@novell.com>
 740
 741         * config/tc-i386.c (output_invalid_buf): Change size for
 742         unsigned char.
 743         * config/tc-tic30.c (output_invalid_buf): Likewise.
 744
 745         * config/tc-i386.c (output_invalid): Cast none-ascii char to
 746         unsigned char.
 747         * config/tc-tic30.c (output_invalid): Likewise.
 748
 749 2006-05-02  Daniel Jacobowitz  <dan@codesourcery.com>
 750
 751         * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
 752         (TEXI2POD): Use AM_MAKEINFOFLAGS.
 753         (asconfig.texi): Don't set top_srcdir.
 754         * doc/as.texinfo: Don't use top_srcdir.
 755         * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
 756
 757 2006-05-02  H.J. Lu  <hongjiu.lu@intel.com>
 758
 759         * config/tc-i386.c (output_invalid_buf): Change size to 16.
 760         * config/tc-tic30.c (output_invalid_buf): Likewise.
 761
 762         * config/tc-i386.c (output_invalid): Use snprintf instead of
 763         sprintf.
 764         * config/tc-ia64.c (declare_register_set): Likewise.
 765         (emit_one_bundle): Likewise.
 766         (check_dependencies): Likewise.
 767         * config/tc-tic30.c (output_invalid): Likewise.
 768
 769 2006-05-02  Paul Brook  <paul@codesourcery.com>
 770
 771         * config/tc-arm.c (arm_optimize_expr): New function.
 772         * config/tc-arm.h (md_optimize_expr): Define
 773         (arm_optimize_expr): Add prototype.
 774         (TC_FORCE_RELOCATION_SUB_SAME): Define.
 775
 776 2006-05-02  Ben Elliston  <bje@au.ibm.com>
 777
 778         * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
 779         field unsigned.
 780
 781         * sb.h (sb_list_vector): Move to sb.c.
 782         * sb.c (free_list): Use type of sb_list_vector directly.
 783         (sb_build): Fix off-by-one error in assertion about `size'.
 784
 785 2006-05-01  Ben Elliston  <bje@au.ibm.com>
 786
 787         * listing.c (listing_listing): Remove useless loop.
 788         * macro.c (macro_expand): Remove is_positional local variable.
 789         * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
 790         and simplify surrounding expressions, where possible.
 791         (assign_symbol): Likewise.
 792         (s_weakref): Likewise.
 793         * symbols.c (colon): Likewise.
 794
 795 2006-05-01  James Lemke  <jwlemke@wasabisystems.com>
 796
 797         * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
 798
 799 2006-04-30  Thiemo Seufer  <ths@mips.com>
 800             David Ung  <davidu@mips.com>
 801
 802         * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
 803         (mips_immed): New table that records various handling of udi
 804         instruction patterns.
 805         (mips_ip): Adds udi handling.
 806
 807 2006-04-28  Alan Modra  <amodra@bigpond.net.au>
 808
 809         * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
 810         of list rather than beginning.
 811
 812 2006-04-26  Julian Brown  <julian@codesourcery.com>
 813
 814         * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
 815         (is_quarter_float): Rename from above. Simplify slightly.
 816         (parse_qfloat_immediate): Parse a "quarter precision" floating-point
 817         number.
 818         (parse_neon_mov): Parse floating-point constants.
 819         (neon_qfloat_bits): Fix encoding.
 820         (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
 821         preference to integer encoding when using the F32 type.
 822
 823 2006-04-26  Julian Brown  <julian@codesourcery.com>
 824
 825         * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
 826         zero-initialising structures containing it will lead to invalid types).
 827         (arm_it): Add vectype to each operand.
 828         (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
 829         defined field.
 830         (neon_typed_alias): New structure. Extra information for typed
 831         register aliases.
 832         (reg_entry): Add neon type info field.
 833         (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
 834         Break out alternative syntax for coprocessor registers, etc. into...
 835         (arm_reg_alt_syntax): New function. Alternate syntax handling broken
 836         out from arm_reg_parse.
 837         (parse_neon_type): Move. Return SUCCESS/FAIL.
 838         (first_error): New function. Call to ensure first error which occurs is
 839         reported.
 840         (parse_neon_operand_type): Parse exactly one type.
 841         (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
 842         (parse_typed_reg_or_scalar): New function. Handle core of both
 843         arm_typed_reg_parse and parse_scalar.
 844         (arm_typed_reg_parse): Parse a register with an optional type.
 845         (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
 846         result.
 847         (parse_scalar): Parse a Neon scalar with optional type.
 848         (parse_reg_list): Use first_error.
 849         (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
 850         (neon_alias_types_same): New function. Return true if two (alias) types
 851         are the same.
 852         (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
 853         of elements.
 854         (insert_reg_alias): Return new reg_entry not void.
 855         (insert_neon_reg_alias): New function. Insert type/index information as
 856         well as register for alias.
 857         (create_neon_reg_alias): New function. Parse .dn/.qn directives and
 858         make typed register aliases accordingly.
 859         (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
 860         of line.
 861         (s_unreq): Delete type information if present.
 862         (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
 863         (s_arm_unwind_save_mmxwcg): Likewise.
 864         (s_arm_unwind_movsp): Likewise.
 865         (s_arm_unwind_setfp): Likewise.
 866         (parse_shift): Likewise.
 867         (parse_shifter_operand): Likewise.
 868         (parse_address): Likewise.
 869         (parse_tb): Likewise.
 870         (tc_arm_regname_to_dw2regnum): Likewise.
 871         (md_pseudo_table): Add dn, qn.
 872         (parse_neon_mov): Handle typed operands.
 873         (parse_operands): Likewise.
 874         (neon_type_mask): Add N_SIZ.
 875         (N_ALLMODS): New macro.
 876         (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
 877         (el_type_of_type_chk): Add some safeguards.
 878         (modify_types_allowed): Fix logic bug.
 879         (neon_check_type): Handle operands with types.
 880         (neon_three_same): Remove redundant optional arg handling.
 881         (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
 882         (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
 883         (do_neon_step): Adjust accordingly.
 884         (neon_cmode_for_logic_imm): Use first_error.
 885         (do_neon_bitfield): Call neon_check_type.
 886         (neon_dyadic): Rename to...
 887         (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
 888         to allow modification of type of the destination.
 889         (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
 890         (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
 891         (do_neon_compare): Make destination be an untyped bitfield.
 892         (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
 893         (neon_mul_mac): Return early in case of errors.
 894         (neon_move_immediate): Use first_error.
 895         (neon_mac_reg_scalar_long): Fix type to include scalar.
 896         (do_neon_dup): Likewise.
 897         (do_neon_mov): Likewise (in several places).
 898         (do_neon_tbl_tbx): Fix type.
 899         (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
 900         (do_neon_ld_dup): Exit early in case of errors and/or use
 901         first_error.
 902         (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
 903         Handle .dn/.qn directives.
 904         (REGDEF): Add zero for reg_entry neon field.
 905
 906 2006-04-26  Julian Brown  <julian@codesourcery.com>
 907
 908         * config/tc-arm.c (limits.h): Include.
 909         (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
 910         (fpu_vfp_v3_or_neon_ext): Declare constants.
 911         (neon_el_type): New enumeration of types for Neon vector elements.
 912         (neon_type_el): New struct. Define type and size of a vector element.
 913         (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
 914         instruction.
 915         (neon_type): Define struct. The type of an instruction.
 916         (arm_it): Add 'vectype' for the current instruction.
 917         (isscalar, immisalign, regisimm, isquad): New predicates for operands.
 918         (vfp_sp_reg_pos): Rename to...
 919         (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
 920         tags.
 921         (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
 922         (Neon D or Q register).
 923         (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
 924         register.
 925         (GE_OPT_PREFIX_BIG): Define constant, for use in...
 926         (my_get_expression): Allow above constant as argument to accept
 927         64-bit constants with optional prefix.
 928         (arm_reg_parse): Add extra argument to return the specific type of
 929         register in when either a D or Q register (REG_TYPE_NDQ) is
 930         requested. Can be NULL.
 931         (parse_scalar): New function. Parse Neon scalar (vector reg and index).
 932         (parse_reg_list): Update for new arm_reg_parse args.
 933         (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
 934         (parse_neon_el_struct_list): New function. Parse element/structure
 935         register lists for VLD<n>/VST<n> instructions.
 936         (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
 937         (s_arm_unwind_save_mmxwr): Likewise.
 938         (s_arm_unwind_save_mmxwcg): Likewise.
 939         (s_arm_unwind_movsp): Likewise.
 940         (s_arm_unwind_setfp): Likewise.
 941         (parse_big_immediate): New function. Parse an immediate, which may be
 942         64 bits wide. Put results in inst.operands[i].
 943         (parse_shift): Update for new arm_reg_parse args.
 944         (parse_address): Likewise. Add parsing of alignment specifiers.
 945         (parse_neon_mov): Parse the operands of a VMOV instruction.
 946         (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
 947         OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
 948         OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
 949         OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
 950         (parse_operands): Handle new codes above.
 951         (encode_arm_vfp_sp_reg): Rename to...
 952         (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
 953         selected VFP version only supports D0-D15.
 954         (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
 955         (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
 956         (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
 957         (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
 958         encode_arm_vfp_reg name, and allow 32 D regs.
 959         (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
 960         (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
 961         regs.
 962         (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
 963         (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
 964         constant-load and conversion insns introduced with VFPv3.
 965         (neon_tab_entry): New struct.
 966         (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
 967         those which are the targets of pseudo-instructions.
 968         (neon_opc): Enumerate opcodes, use as indices into...
 969         (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
 970         (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
 971         (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
 972         (NEON_ENC_DUP): Define meaningful helper macros to look up values in
 973         neon_enc_tab.
 974         (neon_shape): Enumerate shapes (permitted register widths, etc.) for
 975         Neon instructions.
 976         (neon_type_mask): New. Compact type representation for type checking.
 977         (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
 978         permitted type combinations.
 979         (N_IGNORE_TYPE): New macro.
 980         (neon_check_shape): New function. Check an instruction shape for
 981         multiple alternatives. Return the specific shape for the current
 982         instruction.
 983         (neon_modify_type_size): New function. Modify a vector type and size,
 984         depending on the bit mask in argument 1.
 985         (neon_type_promote): New function. Convert a given "key" type (of an
 986         operand) into the correct type for a different operand, based on a bit
 987         mask.
 988         (type_chk_of_el_type): New function. Convert a type and size into the
 989         compact representation used for type checking.
 990         (el_type_of_type_ckh): New function. Reverse of above (only when a
 991         single bit is set in the bit mask).
 992         (modify_types_allowed): New function. Alter a mask of allowed types
 993         based on a bit mask of modifications.
 994         (neon_check_type): New function. Check the type of the current
 995         instruction against the variable argument list. The "key" type of the
 996         instruction is returned.
 997         (neon_dp_fixup): New function. Fill in and modify instruction bits for
 998         a Neon data-processing instruction depending on whether we're in ARM
 999         mode or Thumb-2 mode.
1000         (neon_logbits): New function.
1001         (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
1002         (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
1003         (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
1004         (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
1005         (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
1006         (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
1007         (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1008         (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
1009         (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
1010         (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
1011         (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
1012         (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
1013         (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
1014         (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
1015         (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
1016         (neon_move_immediate, do_neon_mvn, neon_mixed_length)
1017         (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
1018         (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
1019         (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
1020         (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
1021         (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
1022         (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
1023         (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
1024         (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
1025         (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
1026         helpers.
1027         (parse_neon_type): New function. Parse Neon type specifier.
1028         (opcode_lookup): Allow parsing of Neon type specifiers.
1029         (REGNUM2, REGSETH, REGSET2): New macros.
1030         (reg_names): Add new VFPv3 and Neon registers.
1031         (NUF, nUF, NCE, nCE): New macros for opcode table.
1032         (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
1033         fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
1034         fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
1035         Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
1036         vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
1037         vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
1038         vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
1039         vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr,  v{r}sra, vsli,
1040         vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
1041         vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
1042         vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
1043         vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
1044         vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
1045         vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
1046         fto[us][lh][sd].
1047         (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
1048         (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
1049         (arm_option_cpu_value): Add vfp3 and neon.
1050         (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
1051         VFPv1 attribute.
1052
1053 2006-04-25  Bob Wilson  <bob.wilson@acm.org>
1054
1055         * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
1056         syntax instead of hardcoded opcodes with ".w18" suffixes.
1057         (wide_branch_opcode): New.
1058         (build_transition): Use it to check for wide branch opcodes with
1059         either ".w18" or ".w15" suffixes.
1060
1061 2006-04-25  Bob Wilson  <bob.wilson@acm.org>
1062
1063         * config/tc-xtensa.c (xtensa_create_literal_symbol,
1064         xg_assemble_literal, xg_assemble_literal_space): Do not set the
1065         frag's is_literal flag.
1066
1067 2006-04-25  Bob Wilson  <bob.wilson@acm.org>
1068
1069         * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
1070
1071 2006-04-23  Kazu Hirata  <kazu@codesourcery.com>
1072
1073         * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
1074         config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
1075         config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
1076         config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
1077         config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
1078
1079 2005-04-20  Paul Brook  <paul@codesourcery.com>
1080
1081         * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
1082         all targets.
1083         (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
1084
1085 2006-04-19  Alan Modra  <amodra@bigpond.net.au>
1086
1087         * Makefile.am (CPU_TYPES): Add maxq and mt.  Sort.
1088         (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
1089         Make some cpus unsupported on ELF.  Run "make dep-am".
1090         * Makefile.in: Regenerate.
1091
1092 2006-04-19  Alan Modra  <amodra@bigpond.net.au>
1093
1094         * configure.in (--enable-targets): Indent help message.
1095         * configure: Regenerate.
1096
1097 2006-04-18  H.J. Lu  <hongjiu.lu@intel.com>
1098
1099         PR gas/2533
1100         * config/tc-i386.c (i386_immediate): Check illegal immediate
1101         register operand.
1102
1103 2006-04-18  Alan Modra  <amodra@bigpond.net.au>
1104
1105         * config/tc-i386.c: Formatting.
1106         (output_disp, output_imm): ISO C90 params.
1107
1108         * frags.c (frag_offset_fixed_p): Constify args.
1109         * frags.h (frag_offset_fixed_p): Ditto.
1110
1111         * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
1112         (COFF_MAGIC): Delete.
1113
1114         * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
1115
1116 2006-04-16  Daniel Jacobowitz  <dan@codesourcery.com>
1117
1118         * po/POTFILES.in: Regenerated.
1119
1120 2006-04-16  Mark Mitchell  <mark@codesourcery.com>
1121
1122         * doc/as.texinfo: Mention that some .type syntaxes are not
1123         supported on all architectures.
1124
1125 2006-04-14  Sterling Augustine  <sterling@tensilica.com>
1126
1127         * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
1128         instructions when such transformations have been disabled.
1129
1130 2006-04-10  Sterling Augustine  <sterling@tensilica.com>
1131
1132         * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
1133         symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
1134         (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
1135         decoding the loop instructions.  Remove current_offset variable.
1136         (xtensa_fix_short_loop_frags): Likewise.
1137         (min_bytes_to_other_loop_end): Remove current_offset argument.
1138
1139 2006-04-09  Arnold Metselaar  <arnold.metselaar@planet.nl>
1140
1141         * config/tc-z80.c (z80_optimize_expr): Removed.
1142         * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
1143
1144 2006-04-07  Joerg Wunsch <j.gnu@uriah.heep.sax.de>
1145
1146         * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
1147         attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
1148         attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
1149         atmega644, atmega329, atmega3290, atmega649, atmega6490,
1150         atmega406, atmega640, atmega1280, atmega1281, at90can32,
1151         at90can64, at90usb646, at90usb647, at90usb1286 and
1152         at90usb1287.
1153         Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
1154
1155 2006-04-07  Paul Brook  <paul@codesourcery.com>
1156
1157         * config/tc-arm.c (parse_operands): Set default error message.
1158
1159 2006-04-07  Paul Brook  <paul@codesourcery.com>
1160
1161         * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
1162
1163 2006-04-07  Paul Brook  <paul@codesourcery.com>
1164
1165         * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
1166
1167 2006-04-07  Paul Brook  <paul@codesourcery.com>
1168
1169         * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
1170         (move_or_literal_pool): Handle Thumb-2 instructions.
1171         (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
1172
1173 2006-04-07  Alan Modra  <amodra@bigpond.net.au>
1174
1175         PR 2512.
1176         * config/tc-i386.c (match_template): Move 64-bit operand tests
1177         inside loop.
1178
1179 2006-04-06  Carlos O'Donell  <carlos@codesourcery.com>
1180
1181         * po/Make-in: Add install-html target.
1182         * Makefile.am: Add install-html and install-html-recursive targets.
1183         * Makefile.in: Regenerate.
1184         * configure.in: AC_SUBST datarootdir, docdir, htmldir.
1185         * configure: Regenerate.
1186         * doc/Makefile.am: Add install-html and install-html-am targets.
1187         * doc/Makefile.in: Regenerate.
1188
1189 2006-04-06  Alan Modra  <amodra@bigpond.net.au>
1190
1191         * frags.c (frag_offset_fixed_p): Reinitialise offset before
1192         second scan.
1193
1194 2006-04-05  Richard Sandiford  <richard@codesourcery.com>
1195             Daniel Jacobowitz  <dan@codesourcery.com>
1196
1197         * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
1198         (GOTT_BASE, GOTT_INDEX): New.
1199         (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
1200         GOTT_INDEX when generating VxWorks PIC.
1201         * configure.tgt (sparc*-*-vxworks*): Remove this special case;
1202         use the generic *-*-vxworks* stanza instead.
1203
1204 2006-04-04  Alan Modra  <amodra@bigpond.net.au>
1205
1206         PR 997
1207         * frags.c (frag_offset_fixed_p): New function.
1208         * frags.h (frag_offset_fixed_p): Declare.
1209         * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
1210         (resolve_expression): Likewise.
1211
1212 2006-04-03  Sterling Augustine  <sterling@tensilica.com>
1213
1214         * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
1215         of the same length but different numbers of slots.
1216
1217 2006-03-30  Andreas Schwab  <schwab@suse.de>
1218
1219         * configure.in: Fix help string for --enable-targets option.
1220         * configure: Regenerate.
1221
1222 2006-03-28  Nathan Sidwell  <nathan@codesourcery.com>
1223
1224         * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
1225         (m68k_ip): ... here.  Use for all chips.  Protect against buffer
1226         overrun and avoid excessive copying.
1227
1228         * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
1229         m68020_control_regs, m68040_control_regs, m68060_control_regs,
1230         mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
1231         mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
1232         mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
1233         (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
1234         mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
1235         mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
1236         mcf5282_ctrl, mcfv4e_ctrl): ... these.
1237         (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
1238         (struct m68k_cpu): Change chip field to control_regs.
1239         (current_chip): Remove.
1240         (control_regs): New.
1241         (m68k_archs, m68k_extensions): Adjust.
1242         (m68k_cpus): Reorder to be in cpu number order.  Adjust.
1243         (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
1244         (find_cf_chip): Reimplement for new organization of cpu table.
1245         (select_control_regs): Remove.
1246         (mri_chip): Adjust.
1247         (struct save_opts): Save control regs, not chip.
1248         (s_save, s_restore): Adjust.
1249         (m68k_lookup_cpu): Give deprecated warning when necessary.
1250         (m68k_init_arch): Adjust.
1251         (md_show_usage): Adjust for new cpu table organization.
1252
1253 2006-03-25  Bernd Schmidt  <bernd.schmidt@analog.com>
1254
1255         * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
1256         * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
1257         * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
1258         "elf/bfin.h".
1259         (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
1260         (any_gotrel): New rule.
1261         (got): Use it, and create Expr_Node_GOT_Reloc nodes.
1262         * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
1263         "elf/bfin.h".
1264         (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
1265         (bfin_pic_ptr): New function.
1266         (md_pseudo_table): Add it for ".picptr".
1267         (OPTION_FDPIC): New macro.
1268         (md_longopts): Add -mfdpic.
1269         (md_parse_option): Handle it.
1270         (md_begin): Set BFD flags.
1271         (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
1272         (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
1273         us for GOT relocs.
1274         * Makefile.am (bfin-parse.o): Update dependencies.
1275         (DEPTC_bfin_elf): Likewise.
1276         * Makefile.in: Regenerate.
1277
1278 2006-03-25  Richard Sandiford  <richard@codesourcery.com>
1279
1280         * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
1281         mcfemac instead of mcfmac.
1282
1283 2006-03-23  Michael Matz  <matz@suse.de>
1284
1285         * config/tc-i386.c (type_names): Correct placement of 'static'.
1286         (reloc): Map some more relocs to their 64 bit counterpart when
1287         size is 8.
1288         (output_insn): Work around breakage if DEBUG386 is defined.
1289         (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
1290         needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
1291         BFD_RELOC_X86_64_GOTPC32.  Also x86-64 handles pcrel addressing
1292         different from i386.
1293         (output_imm): Ditto.
1294         (lex_got): Recognize @PLTOFF and @GOTPLT.  Make @GOT accept also
1295         Imm64.
1296         (md_convert_frag): Jumps can now be larger than 2GB away, error
1297         out in that case.
1298         (tc_gen_reloc): New relocs are passed through.  BFD_RELOC_64
1299         and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
1300
1301 2006-03-22  Richard Sandiford  <richard@codesourcery.com>
1302             Daniel Jacobowitz  <dan@codesourcery.com>
1303             Phil Edwards  <phil@codesourcery.com>
1304             Zack Weinberg  <zack@codesourcery.com>
1305             Mark Mitchell  <mark@codesourcery.com>
1306             Nathan Sidwell  <nathan@codesourcery.com>
1307
1308         * config/tc-mips.c (mips_target_format): Handle vxworks targets.
1309         (md_begin): Complain about -G being used for PIC.  Don't change
1310         the text, data and bss alignments on VxWorks.
1311         (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
1312         generating VxWorks PIC.
1313         (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
1314         (macro): Likewise, but do not treat la $25 specially for
1315         VxWorks PIC, and do not handle jal.
1316         (OPTION_MVXWORKS_PIC): New macro.
1317         (md_longopts): Add -mvxworks-pic.
1318         (md_parse_option): Don't complain about using PIC and -G together here.
1319         Handle OPTION_MVXWORKS_PIC.
1320         (md_estimate_size_before_relax): Always use the first relaxation
1321         sequence on VxWorks.
1322         * config/tc-mips.h (VXWORKS_PIC): New.
1323
1324 2006-03-21  Paul Brook  <paul@codesourcery.com>
1325
1326         * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
1327
1328 2006-03-21  Sterling Augustine  <sterling@tensilica.com>
1329
1330         * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
1331         (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
1332         (get_loop_align_size): New.
1333         (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
1334         (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
1335         (get_text_align_power): Rewrite to handle inputs in the range 2-8.
1336         (get_noop_aligned_address): Use get_loop_align_size.
1337         (get_aligned_diff): Likewise.
1338
1339 2006-03-21  Paul Brook  <paul@codesourcery.com>
1340
1341         * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
1342
1343 2006-03-20  Paul Brook  <paul@codesourcery.com>
1344
1345         * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
1346         (do_t_branch): Encode branches inside IT blocks as unconditional.
1347         (do_t_cps): New function.
1348         (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
1349         do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
1350         (opcode_lookup): Allow conditional suffixes on all instructions in
1351         Thumb mode.
1352         (md_assemble): Advance condexec state before checking for errors.
1353         (insns): Use do_t_cps.
1354
1355 2006-03-20  Paul Brook  <paul@codesourcery.com>
1356
1357         * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
1358         outputting the insn.
1359
1360 2006-03-18  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
1361
1362         * config/tc-vax.c: Update copyright year.
1363         * config/tc-vax.h: Likewise.
1364
1365 2006-03-18  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
1366
1367         * config/tc-vax.c (md_chars_to_number): Used only locally, so
1368         make it static.
1369         * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
1370
1371 2006-03-17  Paul Brook  <paul@codesourcery.com>
1372
1373         * config/tc-arm.c (insns): Add ldm and stm.
1374
1375 2006-03-17  Ben Elliston  <bje@au.ibm.com>
1376
1377         PR gas/2446
1378         * doc/as.texinfo (Ident): Document this directive more thoroughly.
1379
1380 2006-03-16  Paul Brook  <paul@codesourcery.com>
1381
1382         * config/tc-arm.c (insns): Add "svc".
1383
1384 2006-03-13  Bob Wilson  <bob.wilson@acm.org>
1385
1386         * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
1387         flag and avoid double underscore prefixes.
1388
1389 2006-03-10  Paul Brook  <paul@codesourcery.com>
1390
1391         * config/tc-arm.c (md_begin): Handle EABIv5.
1392         (arm_eabis): Add EF_ARM_EABI_VER5.
1393         * doc/c-arm.texi: Document -meabi=5.
1394
1395 2006-03-10  Ben Elliston  <bje@au.ibm.com>
1396
1397         * app.c (do_scrub_chars): Simplify string handling.
1398
1399 2006-03-07  Richard Sandiford  <richard@codesourcery.com>
1400             Daniel Jacobowitz  <dan@codesourcery.com>
1401             Zack Weinberg  <zack@codesourcery.com>
1402             Nathan Sidwell  <nathan@codesourcery.com>
1403             Paul Brook  <paul@codesourcery.com>
1404             Ricardo Anguiano  <anguiano@codesourcery.com>
1405             Phil Edwards  <phil@codesourcery.com>
1406
1407         * config/tc-arm.c (md_apply_fix): Install a value of zero into a
1408         BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
1409         R_ARM_ABS12 reloc.
1410         (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
1411         relocs, but adjust by md_pcrel_from_section.  Create R_ARM_ABS12
1412         relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
1413
1414 2006-03-06  Bob Wilson  <bob.wilson@acm.org>
1415
1416         * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
1417         even when using the text-section-literals option.
1418
1419 2006-03-06  Nathan Sidwell  <nathan@codesourcery.com>
1420
1421         * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
1422         and cf.
1423         (m68k_ip): <case 'J'> Check we have some control regs.
1424         (md_parse_option): Allow raw arch switch.
1425         (m68k_init_arch): Better detection of arch/cpu mismatch.  Detect
1426         whether 68881 or cfloat was meant by -mfloat.
1427         (md_show_usage): Adjust extension display.
1428         (m68k_elf_final_processing): Adjust.
1429
1430 2006-03-03  Bjoern Haase  <bjoern.m.haase@web.de>
1431
1432         * config/tc-avr.c (avr_mod_hash_value): New function.
1433         (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
1434         BFD_RELOC_MS8_LDI for hlo8() and hhi8()
1435         (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
1436         instead of int avr_ldi_expression: use avr_mod_hash_value instead
1437         of (int).
1438         (tc_gen_reloc): Handle substractions of symbols, if possible do
1439         fixups, abort otherwise.
1440         * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
1441         tc_fix_adjustable): Define.
1442
1443 2006-03-02  James E Wilson  <wilson@specifix.com>
1444
1445         * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
1446         change the template, then clear md.slot[curr].end_of_insn_group.
1447
1448 2006-02-28  Jan Beulich  <jbeulich@novell.com>
1449
1450         * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
1451
1452 2006-02-28  Jan Beulich  <jbeulich@novell.com>
1453
1454         PR/1070
1455         * macro.c (getstring): Don't treat parentheses special anymore.
1456         (get_any_string): Don't consider '(' and ')' as quoting anymore.
1457         Special-case '(', ')', '[', and ']' when dealing with non-quoting
1458         characters.
1459
1460 2006-02-28  Mat <mat@csail.mit.edu>
1461
1462         * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
1463
1464 2006-02-27  Jakub Jelinek  <jakub@redhat.com>
1465
1466         * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
1467         field.
1468         (CFI_signal_frame): Define.
1469         (cfi_pseudo_table): Add .cfi_signal_frame.
1470         (dot_cfi): Handle CFI_signal_frame.
1471         (output_cie): Handle cie->signal_frame.
1472         (select_cie_for_fde): Don't share CIE if signal_frame flag is
1473         different.  Copy signal_frame from FDE to newly created CIE.
1474         * doc/as.texinfo: Document .cfi_signal_frame.
1475
1476 2006-02-27  Carlos O'Donell  <carlos@codesourcery.com>
1477
1478         * doc/Makefile.am: Add html target.
1479         * doc/Makefile.in: Regenerate.
1480         * po/Make-in: Add html target.
1481
1482 2006-02-27  H.J. Lu <hongjiu.lu@intel.com>
1483
1484         * config/tc-i386.c (output_insn): Support Intel Merom New
1485         Instructions.
1486
1487         * config/tc-i386.h (CpuMNI): New.
1488         (CpuUnknownFlags): Add CpuMNI.
1489
1490 2006-02-24  David S. Miller  <davem@sunset.davemloft.net>
1491
1492         * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
1493         (hpriv_reg_table): New table for hyperprivileged registers.
1494         (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
1495         register encoding.
1496
1497 2006-02-24  DJ Delorie  <dj@redhat.com>
1498
1499         * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
1500         (tc_gen_reloc): Don't define.
1501         * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
1502         (OPTION_LINKRELAX): New.
1503         (md_longopts): Add it.
1504         (m32c_relax): New.
1505         (md_parse_options): Set it.
1506         (md_assemble): Emit relaxation relocs as needed.
1507         (md_convert_frag): Emit relaxation relocs as needed.
1508         (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
1509         (m32c_apply_fix): New.
1510         (tc_gen_reloc): New.
1511         (m32c_force_relocation): Force out jump relocs when relaxing.
1512         (m32c_fix_adjustable): Return false if relaxing.
1513
1514 2006-02-24  Paul Brook  <paul@codesourcery.com>
1515
1516         * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
1517         arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
1518         (struct asm_barrier_opt): Define.
1519         (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
1520         (parse_psr): Accept V7M psr names.
1521         (parse_barrier): New function.
1522         (enum operand_parse_code): Add OP_oBARRIER.
1523         (parse_operands): Implement OP_oBARRIER.
1524         (do_barrier): New function.
1525         (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
1526         (do_t_cpsi): Add V7M restrictions.
1527         (do_t_mrs, do_t_msr): Validate V7M variants.
1528         (md_assemble): Check for NULL variants.
1529         (v7m_psrs, barrier_opt_names): New tables.
1530         (insns): Add V7 instructions.  Mark V6 instructions absent from V7M.
1531         (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
1532         (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
1533         (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
1534         (struct cpu_arch_ver_table): Define.
1535         (cpu_arch_ver): New.
1536         (aeabi_set_public_attributes): Use cpu_arch_ver.  Set
1537         Tag_CPU_arch_profile.
1538         * doc/c-arm.texi: Document new cpu and arch options.
1539
1540 2006-02-23  H.J. Lu  <hongjiu.lu@intel.com>
1541
1542         * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
1543
1544 2006-02-23  H.J. Lu  <hongjiu.lu@intel.com>
1545
1546         * config/tc-ia64.c: Update copyright years.
1547
1548 2006-02-22  H.J. Lu  <hongjiu.lu@intel.com>
1549
1550         * config/tc-ia64.c (specify_resource): Add the rule 17 from
1551         SDM 2.2.
1552
1553 2005-02-22  Paul Brook  <paul@codesourcery.com>
1554
1555         * config/tc-arm.c (do_pld): Remove incorrect write to
1556         inst.instruction.
1557         (encode_thumb32_addr_mode): Use correct operand.
1558
1559 2006-02-21  Paul Brook  <paul@codesourcery.com>
1560
1561         * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
1562
1563 2006-02-17  Shrirang Khisti  <shrirangk@kpitcummins.com>
1564             Anil Paranjape   <anilp1@kpitcummins.com>
1565             Shilin Shakti    <shilins@kpitcummins.com>
1566
1567         * Makefile.am: Add xc16x related entry.
1568         * Makefile.in: Regenerate.
1569         * configure.in: Added xc16x related entry.
1570         * configure: Regenerate.
1571         * config/tc-xc16x.h: New file
1572         * config/tc-xc16x.c: New file
1573         * doc/c-xc16x.texi: New file for xc16x
1574         * doc/all.texi: Entry for xc16x
1575         * doc/Makefile.texi: Added c-xc16x.texi
1576         * NEWS: Announce the support for the new target.
1577
1578 2006-02-16  Nick Hudson  <nick.hudson@dsl.pipex.com>
1579
1580         * configure.tgt: set emulation for mips-*-netbsd*
1581
1582 2006-02-14  Jakub Jelinek  <jakub@redhat.com>
1583
1584         * config.in: Rebuilt.
1585
1586 2006-02-13  Bob Wilson  <bob.wilson@acm.org>
1587
1588         * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
1589         from 1, not 0, in error messages.
1590         (md_assemble): Simplify special-case check for ENTRY instructions.
1591         (tinsn_has_invalid_symbolic_operands): Do not include opcode and
1592         operand in error message.
1593
1594 2006-02-13  Joseph S. Myers  <joseph@codesourcery.com>
1595
1596         * configure.tgt (arm-*-linux-gnueabi*): Change to
1597         arm-*-linux-*eabi*.
1598
1599 2006-02-10  Nick Clifton  <nickc@redhat.com>
1600
1601         * config/tc-crx.c (check_range): Ensure that the sign bit of a
1602         32-bit value is propagated into the upper bits of a 64-bit long.
1603
1604         * config/tc-arc.c (init_opcode_tables): Fix cast.
1605         (arc_extoper, md_operand): Likewise.
1606
1607 2006-02-09  David Heine  <dlheine@tensilica.com>
1608
1609         * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
1610         each relaxation step.
1611
1612 2006-02-09  Eric Botcazou  <ebotcazou@libertysurf.fr>
1613
1614         * configure.in (CHECK_DECLS): Add vsnprintf.
1615         * configure: Regenerate.
1616         * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
1617         include/declare here, but...
1618         * as.h: Move code detecting VARARGS idiom to the top.
1619         (errno.h, stdarg.h, varargs.h, va_list): ...here.
1620         (vsnprintf): Declare if not already declared.
1621
1622 2006-02-08  H.J. Lu  <hongjiu.lu@intel.com>
1623
1624         * as.c (close_output_file): New.
1625         (main): Register close_output_file with xatexit before
1626         dump_statistics. Don't call output_file_close.
1627
1628 2006-02-07  Nathan Sidwell  <nathan@codesourcery.com>
1629
1630         * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
1631         mcf5329_control_regs): New.
1632         (not_current_architecture, selected_arch, selected_cpu): New.
1633         (m68k_archs, m68k_extensions): New.
1634         (archs): Renamed to ...
1635         (m68k_cpus): ... here.  Adjust.
1636         (n_arches): Remove.
1637         (md_pseudo_table): Add arch and cpu directives.
1638         (find_cf_chip, m68k_ip): Adjust table scanning.
1639         (no_68851, no_68881): Remove.
1640         (md_assemble): Lazily initialize.
1641         (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
1642         (md_init_after_args): Move functionality to m68k_init_arch.
1643         (mri_chip): Adjust table scanning.
1644         (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
1645         options with saner parsing.
1646         (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
1647         m68k_init_arch): New.
1648         (s_m68k_cpu, s_m68k_arch): New.
1649         (md_show_usage): Adjust.
1650         (m68k_elf_final_processing): Set CF EF flags.
1651         * config/tc-m68k.h (m68k_init_after_args): Remove.
1652         (tc_init_after_args): Remove.
1653         * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
1654         (M68k-Directives): Document .arch and .cpu directives.
1655
1656 2006-02-05  Arnold Metselaar  <arnold.metselaar@planet.nl>
1657
1658         * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
1659         synonyms for equ and defl.
1660         (z80_cons_fix_new): New function.
1661         (emit_byte): Disallow relative jumps to absolute locations.
1662         (emit_data): Only handle defb, prototype changed, because defb is
1663         now handled as pseudo-op rather than an instruction.
1664         (instab): Entries for defb,defw,db,dw moved from here...
1665         (md_pseudo_table): ... to here, use generic cons() for defw,dw.
1666         Add entries for def24,def32,d24,d32.
1667         (md_assemble): Improved error handling.
1668         (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
1669         * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
1670         (z80_cons_fix_new): Declare.
1671         * doc/c-z80.texi (defb, db): Mention warning on overflow.
1672         (def24,d24,def32,d32): New pseudo-ops.
1673
1674 2006-02-02  Paul Brook  <paul@codesourcery.com>
1675
1676         * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
1677
1678 2005-02-02  Paul Brook  <paul@codesourcery.com>
1679
1680         * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
1681         T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
1682         T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
1683         T2_OPCODE_RSB): Define.
1684         (thumb32_negate_data_op): New function.
1685         (md_apply_fix): Use it.
1686
1687 2006-01-31  Bob Wilson  <bob.wilson@acm.org>
1688
1689         * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
1690         fields.
1691         * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
1692         * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
1693         subtracted symbols.
1694         (relaxation_requirements): Add pfinish_frag argument and use it to
1695         replace setting tinsn->record_fix fields.
1696         (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
1697         and vinsn_to_insnbuf.  Remove references to record_fix and
1698         slot_sub_symbols fields.
1699         (xtensa_mark_narrow_branches): Delete unused code.
1700         (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
1701         a symbol.
1702         (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
1703         record_fix fields.
1704         (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
1705         (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
1706         of the record_fix field.  Simplify error messages for unexpected
1707         symbolic operands.
1708         (set_expr_symbol_offset_diff): Delete.
1709
1710 2006-01-31  Paul Brook  <paul@codesourcery.com>
1711
1712         * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
1713
1714 2006-01-31  Paul Brook  <paul@codesourcery.com>
1715         Richard Earnshaw <rearnsha@arm.com>
1716
1717         * config/tc-arm.c: Use arm_feature_set.
1718         (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
1719         arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
1720         fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
1721         New variables.
1722         (insns): Use them.
1723         (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
1724         md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
1725         arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
1726         s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
1727         feature flags.
1728         (arm_legacy_option_table, arm_option_cpu_value_table): New types.
1729         (arm_opts): Move old cpu/arch options from here...
1730         (arm_legacy_opts): ... to here.
1731         (md_parse_option): Search arm_legacy_opts.
1732         (arm_cpus, arm_archs, arm_extensions, arm_fpus)
1733         (arm_float_abis, arm_eabis): Make const.
1734
1735 2006-01-25  Bob Wilson  <bob.wilson@acm.org>
1736
1737         * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
1738
1739 2006-01-21  Jie Zhang  <jie.zhang@analog.com>
1740
1741         * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
1742         in load immediate intruction.
1743
1744 2006-01-21  Jie Zhang  <jie.zhang@analog.com>
1745
1746         * config/bfin-parse.y (value_match): Use correct conversion
1747         specifications in template string for __FILE__ and __LINE__.
1748         (binary): Ditto.
1749         (unary): Ditto.
1750
1751 2006-01-18  Alexandre Oliva  <aoliva@redhat.com>
1752
1753         Introduce TLS descriptors for i386 and x86_64.
1754         * config/tc-i386.c (tc_i386_fix_adjustable): Handle
1755         BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
1756         BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
1757         (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
1758         BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
1759         displacement bits.
1760         (build_modrm_byte): Set up zero modrm for TLS desc calls.
1761         (lex_got): Handle @tlsdesc and @tlscall.
1762         (md_apply_fix, tc_gen_reloc): Handle the new relocations.
1763
1764 2006-01-11  Nick Clifton  <nickc@redhat.com>
1765
1766         Fixes for building on 64-bit hosts:
1767         * config/tc-avr.c (mod_index): New union to allow conversion
1768         between pointers and integers.
1769         (md_begin, avr_ldi_expression): Use it.
1770         * config/tc-i370.c (md_assemble): Add cast for argument to print
1771         statement.
1772         * config/tc-tic54x.c (subsym_substitute): Likewise.
1773         * config/tc-mn10200.c (md_assemble): Use a union to convert the
1774         opindex field of fr_cgen structure into a pointer so that it can
1775         be stored in a frag.
1776         * config/tc-mn10300.c (md_assemble): Likewise.
1777         * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
1778         types.
1779         * config/tc-v850.c: Replace uses of (int) casts with correct
1780         types.
1781
1782 2006-01-09  H.J. Lu  <hongjiu.lu@intel.com>
1783
1784         PR gas/2117
1785         * symbols.c (snapshot_symbol): Don't change a defined symbol.
1786
1787 2006-01-03  Hans-Peter Nilsson  <hp@bitrange.com>
1788
1789         PR gas/2101
1790         * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
1791         a local-label reference.
1792
1793 For older changes see ChangeLog-2005
1794 \f
1795 Local Variables:
1796 mode: change-log
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1798 fill-column: 74
1799 version-control: never
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