1 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
3 * Makefile.am: Replace INTLLIBS and INTLDEPS with LIBINTL
4 and LIBINTL_DEP everywhere.
6 (INCLUDES, DEP_INCLUDES): Use @INCINTL@.
7 * acinclude.m4: Include new gettext macros.
8 * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
9 Remove local code for po/Makefile.
10 * Makefile.in, configure, doc/Makefile.in: Regenerated.
12 2006-05-30 Nick Clifton <nickc@redhat.com>
14 * po/es.po: Updated Spanish translation.
16 2006-05-06 Denis Chertykov <denisc@overta.ru>
18 * doc/c-avr.texi: New file.
19 * doc/Makefile.am (CPU_DOCS): Add c-avr.texi
20 * doc/all.texi: Set AVR
21 * doc/as.texinfo: Include c-avr.texi
23 2006-05-28 Jie Zhang <jie.zhang@analog.com>
25 * config/bfin-parse.y (check_macfunc): Loose the condition of
26 calling check_multiply_halfregs ().
28 2006-05-25 Jie Zhang <jie.zhang@analog.com>
30 * config/bfin-parse.y (asm_1): Better check and deal with
31 vector and scalar Multiply 16-Bit Operands instructions.
33 2006-05-24 Nick Clifton <nickc@redhat.com>
35 * config/tc-hppa.c: Convert to ISO C90 format.
36 * config/tc-hppa.h: Likewise.
38 2006-05-24 Carlos O'Donell <carlos@systemhalted.org>
39 Randolph Chung <randolph@tausq.org>
41 * config/tc-hppa.c (is_tls_gdidx, is_tls_ldidx, is_tls_dtpoff,
42 is_tls_ieoff, is_tls_leoff): Define.
43 (fix_new_hppa): Handle TLS.
44 (cons_fix_new_hppa): Likewise.
46 (md_apply_fix): Handle TLS relocs.
47 * config/tc-hppa.h (hppa_fix_adjustable): Handle TLS.
49 2006-05-24 Bjoern Haase <bjoern.m.haase@web.de>
51 * config/tc-avr.c: Add new cpu targets avr6, avr2560 and avr2561.
53 2006-05-23 Thiemo Seufer <ths@mips.com>
54 David Ung <davidu@mips.com>
55 Nigel Stephens <nigel@mips.com>
58 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS): Rename.
59 (ISA_SUPPORTS_DSP_ASE, ISA_SUPPORTS_MT_ASE, ISA_HAS_64BIT_FPRS,
60 ISA_HAS_MXHC1): New macros.
61 (HAVE_32BIT_FPRS): Use ISA_HAS_64BIT_FPRS instead of
62 ISA_HAS_64BIT_REGS. Formatting fixes. Improved comments.
63 (mips_cpu_info): Change to use combined ASE/IS_ISA flag.
64 (MIPS_CPU_IS_ISA, MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP,
65 MIPS_CPU_ASE_MT, MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX): New defines.
66 (mips_after_parse_args): Change default handling of float register
67 size to account for 32bit code with 64bit FP. Better sanity checking
68 of ISA/ASE/ABI option combinations.
69 (s_mipsset): Support switching of GPR and FPR sizes via
70 .set {g,f}p={32,64,default}. Better sanity checking for .set ASE
72 (mips_elf_final_processing): We should record the use of 64bit FP
73 registers in 32bit code but we don't, because ELF header flags are
75 (mips_cpu_info_table): Add ASE flags for CPUs with mandatory ASE
76 extensions. Add 4ksc, 4kec, 4kem, 4kep, 4ksd, m4kp, 24kec, 24kef,
77 24kex, 34kc, 34kf, 34kx, 25kf CPU definitions.
78 (mips_cpu_info_from_isa): Use MIPS_CPU_IS_ISA.
79 * doc/c-mips.texi: Document .set {g,f}p={32,64,default}. Document
80 missing -march options. Document .set arch=CPU. Move .set smartmips
81 to ASE page. Use @code for .set FOO examples.
83 2006-05-23 Jie Zhang <jie.zhang@analog.com>
85 * config/tc-bfin.c (bfin_start_line_hook): Bump line counters
88 2006-05-23 Jie Zhang <jie.zhang@analog.com>
90 * config/bfin-defs.h (bfin_equals): Remove declaration.
91 * config/bfin-parse.y (asm_1): Remove "expr ASSIGN expr".
92 * config/tc-bfin.c (bfin_name_is_register): Remove.
93 (bfin_equals): Remove.
94 * config/tc-bfin.h (TC_EQUAL_IN_INSN): Redefine as 1.
95 (bfin_name_is_register): Remove declaration.
97 2006-05-19 Thiemo Seufer <ths@mips.com>
98 Nigel Stephens <nigel@mips.com>
100 * config/tc-mipc.c (ISA_HAS_ODD_SINGLE_FPR): New define.
101 (mips_oddfpreg_ok): New function.
104 2006-05-19 Thiemo Seufer <ths@mips.com>
105 David Ung <davidu@mips.com>
107 * config/tc-mips.h (tc_mips_regname_to_dw2regnum): Declare.
108 * config/tc-mipc.c (ABI_NEEDS_64BIT_REGS, ISA_HAS_64BIT_REGS,
109 ISA_HAS_DROR, ISA_HAS_ROR): Reformat.
110 (regname, RTYPE_MASK, RTYPE_NUM, RTYPE_FPU, RTYPE_FCC, RTYPE_VEC,
111 RTYPE_GP, RTYPE_CP0, RTYPE_PC, RTYPE_ACC, RTYPE_CCC, RNUM_MASK,
112 RWARN, GENERIC_REGISTER_NUMBERS, FPU_REGISTER_NAMES,
113 FPU_CONDITION_CODE_NAMES, COPROC_CONDITION_CODE_NAMES,
114 N32N64_SYMBOLIC_REGISTER_NAMES, O32_SYMBOLIC_REGISTER_NAMES,
115 SYMBOLIC_REGISTER_NAMES, MIPS16_SPECIAL_REGISTER_NAMES,
116 MDMX_VECTOR_REGISTER_NAMES, MIPS_DSP_ACCUMULATOR_NAMES, reg_names,
117 reg_names_o32, reg_names_n32n64): Define register classes.
118 (reg_lookup): New function, use register classes.
119 (md_begin): Reserve register names in the symbol table. Simplify
121 (mips_ip): Fix comment formatting. Handle symbolic COP0 registers.
123 (mips16_ip): Use reg_lookup.
124 (tc_get_register): Likewise.
125 (tc_mips_regname_to_dw2regnum): New function.
127 2006-05-19 Thiemo Seufer <ths@mips.com>
129 * config/tc-arm.c, config/tc-arm.h (tc_arm_regname_to_dw2regnum):
130 Un-constify string argument.
131 * config/tc-i386.c, config/tc-i386.h (tc_x86_regname_to_dw2regnum):
133 * config/tc-m68k.c, config/tc-m68k.h (tc_m68k_regname_to_dw2regnum):
135 * config/tc-ppc.c, config/tc-ppc.h (tc_ppc_regname_to_dw2regnum):
137 * config/tc-s390.c, config/tc-s390.h (tc_s390_regname_to_dw2regnum):
139 * config/tc-sh.c, config/tc-sh.h (sh_regname_to_dw2regnum):
141 * config/tc-sparc.c, config/tc-sparc.h (sparc_regname_to_dw2regnum):
144 2006-05-19 Nathan Sidwell <nathan@codesourcery.com>
146 * gas/config/tc-m68k.c (m68k_init_arch): Move checking of
147 cfloat/m68881 to correct architecture before using it.
149 2006-05-16 Bjoern Haase <bjoern.m.haase@web.de>
151 * config/tc-avr.h (TC_VALIDATE_FIX): Allow fixups for immediate
154 2006-05-15 Paul Brook <paul@codesourcery.com>
156 * config/tc-arm.c (arm_adjust_symtab): Use
157 bfd_is_arm_special_symbol_name.
159 2006-05-15 Bob Wilson <bob.wilson@acm.org>
161 * config/tc-xtensa.c (is_direct_call_opcode, is_branch_jmp_to_next,
162 xg_assemble_vliw_tokens, xtensa_mark_narrow_branches,
163 xtensa_fix_short_loop_frags, is_local_forward_loop, relax_frag_immed):
164 Handle errors from calls to xtensa_opcode_is_* functions.
166 2006-05-14 Thiemo Seufer <ths@mips.com>
168 * config/tc-mips.c (macro_build): Test for currently active
170 (mips16_ip): Reject invalid opcodes.
172 2006-05-11 Carlos O'Donell <carlos@codesourcery.com>
174 * doc/as.texinfo: Rename "Index" to "AS Index",
175 and "ABORT" to "ABORT (COFF)".
177 2006-05-11 Paul Brook <paul@codesourcery.com>
179 * config/tc-arm.c (parse_half): New function.
180 (operand_parse_code): Remove OP_Iffff. Add OP_HALF.
181 (parse_operands): Ditto.
182 (do_mov16): Reject invalid relocations.
183 (do_t_mov16): Ditto. Use Thumb reloc numbers.
184 (insns): Replace Iffff with HALF.
185 (md_apply_fix): Add MOVW and MOVT relocs.
186 (tc_gen_reloc): Ditto.
187 * doc/c-arm.texi: Document relocation operators
189 2006-05-11 Paul Brook <paul@codesourcery.com>
191 * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
193 2006-05-11 Thiemo Seufer <ths@mips.com>
195 * config/tc-mips.c (append_insn): Don't check the range of j or
198 2006-05-11 Pedro Alves <pedro_alves@portugalmail.pt>
200 * config/tc-arm.c (md_pcrel_from_section): Force a bias for
201 relocs against external symbols for WinCE targets.
202 (md_apply_fix): Likewise.
204 2006-05-09 David Ung <davidu@mips.com>
206 * config/tc-mips.c (append_insn): Only warn about an out-of-range
209 2006-05-09 Nick Clifton <nickc@redhat.com>
211 * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups
212 against symbols which are not going to be placed into the symbol
215 2006-05-09 Ben Elliston <bje@au.ibm.com>
217 * expr.c (operand): Remove `if (0 && ..)' statement and
218 subsequently unused target_op label. Collapse `if (1 || ..)'
220 * app.c (do_scrub_chars): Remove unused case 0, as it is handled
221 separately above the switch.
223 2006-05-08 Nick Clifton <nickc@redhat.com>
226 * config/tc-msp430.c (line_separator_character): Define as |.
228 2006-05-08 Thiemo Seufer <ths@mips.com>
229 Nigel Stephens <nigel@mips.com>
230 David Ung <davidu@mips.com>
232 * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
233 (mips_opts): Likewise.
234 (file_ase_smartmips): New variable.
235 (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
236 (macro_build): Handle SmartMIPS instructions.
238 (md_longopts): Add argument handling for smartmips.
239 (md_parse_options, mips_after_parse_args): Likewise.
240 (s_mipsset): Add .set smartmips support.
241 (md_show_usage): Document -msmartmips/-mno-smartmips.
242 * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
244 * doc/c-mips.texi: Likewise.
246 2006-05-08 Alan Modra <amodra@bigpond.net.au>
248 * write.c (relax_segment): Add pass count arg. Don't error on
249 negative org/space on first two passes.
250 (relax_seg_info): New struct.
251 (relax_seg, write_object_file): Adjust.
252 * write.h (relax_segment): Update prototype.
254 2006-05-05 Julian Brown <julian@codesourcery.com>
256 * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
258 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
259 architecture version checks.
260 (insns): Allow overlapping instructions to be used in VFP mode.
262 2006-05-05 H.J. Lu <hongjiu.lu@intel.com>
265 * config/obj-elf.c (obj_elf_change_section): Allow user
266 specified SHF_ALPHA_GPREL.
268 2006-05-05 Bjoern Haase <bjoern.m.haase@web.de>
270 * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups
271 for PMEM related expressions.
273 2006-05-05 Nick Clifton <nickc@redhat.com>
276 * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the
277 insertion of a directory separator character into a string at a
278 given offset. Uses heuristics to decide when to use a backslash
279 character rather than a forward-slash character.
280 (dwarf2_directive_loc): Use the macro.
281 (out_debug_info): Likewise.
283 2006-05-05 Thiemo Seufer <ths@mips.com>
284 David Ung <davidu@mips.com>
286 * config/tc-mips.c (macro_build): Add case 'k' to handle cache
288 (macro): Add new case M_CACHE_AB.
290 2006-05-04 Kazu Hirata <kazu@codesourcery.com>
292 * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
293 (opcode_lookup): Issue a warning for opcode with
294 OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated
295 identical to OT_cinfix3.
296 (TxC3w, TC3w, tC3w): New.
297 (insns): Use tC3w and TC3w for comparison instructions with
300 2006-05-04 Alan Modra <amodra@bigpond.net.au>
302 * subsegs.h (struct frchain): Delete frch_seg.
303 (frchain_root): Delete.
304 (seg_info): Define as macro.
305 * subsegs.c (frchain_root): Delete.
306 (abs_seg_info, und_seg_info, absolute_frchain): Delete.
307 (subsegs_begin, subseg_change): Adjust for above.
308 (subseg_set_rest): Likewise. Add new frchain structs to seginfo
309 rather than to one big list.
310 (subseg_get): Don't special case abs, und sections.
311 (subseg_new, subseg_force_new): Don't set frchainP here.
313 (subsegs_print_statistics): Adjust frag chain control list traversal.
314 * debug.c (dmp_frags): Likewise.
315 * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
316 at frchain_root. Make use of known frchain ordering.
317 (last_frag_for_seg): Likewise.
318 (get_frag_fix): Likewise. Add seg param.
319 (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
320 * write.c (chain_frchains_together_1): Adjust for struct frchain.
321 (SUB_SEGMENT_ALIGN): Likewise.
322 (subsegs_finish): Adjust frchain list traversal.
323 * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
324 (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
325 (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
326 (xtensa_fix_b_j_loop_end_frags): Likewise.
327 (xtensa_fix_close_loop_end_frags): Likewise.
328 (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
329 (retrieve_segment_info): Delete frch_seg initialisation.
331 2006-05-03 Alan Modra <amodra@bigpond.net.au>
333 * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
334 * config/obj-elf.h (obj_sec_set_private_data): Delete.
335 * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
336 * config/tc-mn10300.c (tc_gen_reloc): Likewise.
338 2006-05-02 Joseph Myers <joseph@codesourcery.com>
340 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
342 (md_apply_fix3): Multiply offset by 4 here for
343 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
345 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
346 Jan Beulich <jbeulich@novell.com>
348 * config/tc-i386.c (output_invalid_buf): Change size for
350 * config/tc-tic30.c (output_invalid_buf): Likewise.
352 * config/tc-i386.c (output_invalid): Cast none-ascii char to
354 * config/tc-tic30.c (output_invalid): Likewise.
356 2006-05-02 Daniel Jacobowitz <dan@codesourcery.com>
358 * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
359 (TEXI2POD): Use AM_MAKEINFOFLAGS.
360 (asconfig.texi): Don't set top_srcdir.
361 * doc/as.texinfo: Don't use top_srcdir.
362 * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
364 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
366 * config/tc-i386.c (output_invalid_buf): Change size to 16.
367 * config/tc-tic30.c (output_invalid_buf): Likewise.
369 * config/tc-i386.c (output_invalid): Use snprintf instead of
371 * config/tc-ia64.c (declare_register_set): Likewise.
372 (emit_one_bundle): Likewise.
373 (check_dependencies): Likewise.
374 * config/tc-tic30.c (output_invalid): Likewise.
376 2006-05-02 Paul Brook <paul@codesourcery.com>
378 * config/tc-arm.c (arm_optimize_expr): New function.
379 * config/tc-arm.h (md_optimize_expr): Define
380 (arm_optimize_expr): Add prototype.
381 (TC_FORCE_RELOCATION_SUB_SAME): Define.
383 2006-05-02 Ben Elliston <bje@au.ibm.com>
385 * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
388 * sb.h (sb_list_vector): Move to sb.c.
389 * sb.c (free_list): Use type of sb_list_vector directly.
390 (sb_build): Fix off-by-one error in assertion about `size'.
392 2006-05-01 Ben Elliston <bje@au.ibm.com>
394 * listing.c (listing_listing): Remove useless loop.
395 * macro.c (macro_expand): Remove is_positional local variable.
396 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
397 and simplify surrounding expressions, where possible.
398 (assign_symbol): Likewise.
399 (s_weakref): Likewise.
400 * symbols.c (colon): Likewise.
402 2006-05-01 James Lemke <jwlemke@wasabisystems.com>
404 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
406 2006-04-30 Thiemo Seufer <ths@mips.com>
407 David Ung <davidu@mips.com>
409 * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
410 (mips_immed): New table that records various handling of udi
411 instruction patterns.
412 (mips_ip): Adds udi handling.
414 2006-04-28 Alan Modra <amodra@bigpond.net.au>
416 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
417 of list rather than beginning.
419 2006-04-26 Julian Brown <julian@codesourcery.com>
421 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
422 (is_quarter_float): Rename from above. Simplify slightly.
423 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
425 (parse_neon_mov): Parse floating-point constants.
426 (neon_qfloat_bits): Fix encoding.
427 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
428 preference to integer encoding when using the F32 type.
430 2006-04-26 Julian Brown <julian@codesourcery.com>
432 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
433 zero-initialising structures containing it will lead to invalid types).
434 (arm_it): Add vectype to each operand.
435 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
437 (neon_typed_alias): New structure. Extra information for typed
439 (reg_entry): Add neon type info field.
440 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
441 Break out alternative syntax for coprocessor registers, etc. into...
442 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
443 out from arm_reg_parse.
444 (parse_neon_type): Move. Return SUCCESS/FAIL.
445 (first_error): New function. Call to ensure first error which occurs is
447 (parse_neon_operand_type): Parse exactly one type.
448 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
449 (parse_typed_reg_or_scalar): New function. Handle core of both
450 arm_typed_reg_parse and parse_scalar.
451 (arm_typed_reg_parse): Parse a register with an optional type.
452 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
454 (parse_scalar): Parse a Neon scalar with optional type.
455 (parse_reg_list): Use first_error.
456 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
457 (neon_alias_types_same): New function. Return true if two (alias) types
459 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
461 (insert_reg_alias): Return new reg_entry not void.
462 (insert_neon_reg_alias): New function. Insert type/index information as
463 well as register for alias.
464 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
465 make typed register aliases accordingly.
466 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
468 (s_unreq): Delete type information if present.
469 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
470 (s_arm_unwind_save_mmxwcg): Likewise.
471 (s_arm_unwind_movsp): Likewise.
472 (s_arm_unwind_setfp): Likewise.
473 (parse_shift): Likewise.
474 (parse_shifter_operand): Likewise.
475 (parse_address): Likewise.
476 (parse_tb): Likewise.
477 (tc_arm_regname_to_dw2regnum): Likewise.
478 (md_pseudo_table): Add dn, qn.
479 (parse_neon_mov): Handle typed operands.
480 (parse_operands): Likewise.
481 (neon_type_mask): Add N_SIZ.
482 (N_ALLMODS): New macro.
483 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
484 (el_type_of_type_chk): Add some safeguards.
485 (modify_types_allowed): Fix logic bug.
486 (neon_check_type): Handle operands with types.
487 (neon_three_same): Remove redundant optional arg handling.
488 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
489 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
490 (do_neon_step): Adjust accordingly.
491 (neon_cmode_for_logic_imm): Use first_error.
492 (do_neon_bitfield): Call neon_check_type.
493 (neon_dyadic): Rename to...
494 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
495 to allow modification of type of the destination.
496 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
497 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
498 (do_neon_compare): Make destination be an untyped bitfield.
499 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
500 (neon_mul_mac): Return early in case of errors.
501 (neon_move_immediate): Use first_error.
502 (neon_mac_reg_scalar_long): Fix type to include scalar.
503 (do_neon_dup): Likewise.
504 (do_neon_mov): Likewise (in several places).
505 (do_neon_tbl_tbx): Fix type.
506 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
507 (do_neon_ld_dup): Exit early in case of errors and/or use
509 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
510 Handle .dn/.qn directives.
511 (REGDEF): Add zero for reg_entry neon field.
513 2006-04-26 Julian Brown <julian@codesourcery.com>
515 * config/tc-arm.c (limits.h): Include.
516 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
517 (fpu_vfp_v3_or_neon_ext): Declare constants.
518 (neon_el_type): New enumeration of types for Neon vector elements.
519 (neon_type_el): New struct. Define type and size of a vector element.
520 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
522 (neon_type): Define struct. The type of an instruction.
523 (arm_it): Add 'vectype' for the current instruction.
524 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
525 (vfp_sp_reg_pos): Rename to...
526 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
528 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
529 (Neon D or Q register).
530 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
532 (GE_OPT_PREFIX_BIG): Define constant, for use in...
533 (my_get_expression): Allow above constant as argument to accept
534 64-bit constants with optional prefix.
535 (arm_reg_parse): Add extra argument to return the specific type of
536 register in when either a D or Q register (REG_TYPE_NDQ) is
537 requested. Can be NULL.
538 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
539 (parse_reg_list): Update for new arm_reg_parse args.
540 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
541 (parse_neon_el_struct_list): New function. Parse element/structure
542 register lists for VLD<n>/VST<n> instructions.
543 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
544 (s_arm_unwind_save_mmxwr): Likewise.
545 (s_arm_unwind_save_mmxwcg): Likewise.
546 (s_arm_unwind_movsp): Likewise.
547 (s_arm_unwind_setfp): Likewise.
548 (parse_big_immediate): New function. Parse an immediate, which may be
549 64 bits wide. Put results in inst.operands[i].
550 (parse_shift): Update for new arm_reg_parse args.
551 (parse_address): Likewise. Add parsing of alignment specifiers.
552 (parse_neon_mov): Parse the operands of a VMOV instruction.
553 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
554 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
555 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
556 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
557 (parse_operands): Handle new codes above.
558 (encode_arm_vfp_sp_reg): Rename to...
559 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
560 selected VFP version only supports D0-D15.
561 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
562 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
563 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
564 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
565 encode_arm_vfp_reg name, and allow 32 D regs.
566 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
567 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
569 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
570 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
571 constant-load and conversion insns introduced with VFPv3.
572 (neon_tab_entry): New struct.
573 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
574 those which are the targets of pseudo-instructions.
575 (neon_opc): Enumerate opcodes, use as indices into...
576 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
577 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
578 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
579 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
581 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
583 (neon_type_mask): New. Compact type representation for type checking.
584 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
585 permitted type combinations.
586 (N_IGNORE_TYPE): New macro.
587 (neon_check_shape): New function. Check an instruction shape for
588 multiple alternatives. Return the specific shape for the current
590 (neon_modify_type_size): New function. Modify a vector type and size,
591 depending on the bit mask in argument 1.
592 (neon_type_promote): New function. Convert a given "key" type (of an
593 operand) into the correct type for a different operand, based on a bit
595 (type_chk_of_el_type): New function. Convert a type and size into the
596 compact representation used for type checking.
597 (el_type_of_type_ckh): New function. Reverse of above (only when a
598 single bit is set in the bit mask).
599 (modify_types_allowed): New function. Alter a mask of allowed types
600 based on a bit mask of modifications.
601 (neon_check_type): New function. Check the type of the current
602 instruction against the variable argument list. The "key" type of the
603 instruction is returned.
604 (neon_dp_fixup): New function. Fill in and modify instruction bits for
605 a Neon data-processing instruction depending on whether we're in ARM
606 mode or Thumb-2 mode.
607 (neon_logbits): New function.
608 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
609 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
610 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
611 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
612 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
613 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
614 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
615 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
616 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
617 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
618 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
619 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
620 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
621 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
622 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
623 (neon_move_immediate, do_neon_mvn, neon_mixed_length)
624 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
625 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
626 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
627 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
628 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
629 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
630 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
631 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
632 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
634 (parse_neon_type): New function. Parse Neon type specifier.
635 (opcode_lookup): Allow parsing of Neon type specifiers.
636 (REGNUM2, REGSETH, REGSET2): New macros.
637 (reg_names): Add new VFPv3 and Neon registers.
638 (NUF, nUF, NCE, nCE): New macros for opcode table.
639 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
640 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
641 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
642 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
643 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
644 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
645 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
646 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
647 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
648 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
649 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
650 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
651 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
652 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
654 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
655 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
656 (arm_option_cpu_value): Add vfp3 and neon.
657 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
660 2006-04-25 Bob Wilson <bob.wilson@acm.org>
662 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
663 syntax instead of hardcoded opcodes with ".w18" suffixes.
664 (wide_branch_opcode): New.
665 (build_transition): Use it to check for wide branch opcodes with
666 either ".w18" or ".w15" suffixes.
668 2006-04-25 Bob Wilson <bob.wilson@acm.org>
670 * config/tc-xtensa.c (xtensa_create_literal_symbol,
671 xg_assemble_literal, xg_assemble_literal_space): Do not set the
672 frag's is_literal flag.
674 2006-04-25 Bob Wilson <bob.wilson@acm.org>
676 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
678 2006-04-23 Kazu Hirata <kazu@codesourcery.com>
680 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
681 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
682 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
683 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
684 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
686 2005-04-20 Paul Brook <paul@codesourcery.com>
688 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
690 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
692 2006-04-19 Alan Modra <amodra@bigpond.net.au>
694 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
695 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
696 Make some cpus unsupported on ELF. Run "make dep-am".
697 * Makefile.in: Regenerate.
699 2006-04-19 Alan Modra <amodra@bigpond.net.au>
701 * configure.in (--enable-targets): Indent help message.
702 * configure: Regenerate.
704 2006-04-18 H.J. Lu <hongjiu.lu@intel.com>
707 * config/tc-i386.c (i386_immediate): Check illegal immediate
710 2006-04-18 Alan Modra <amodra@bigpond.net.au>
712 * config/tc-i386.c: Formatting.
713 (output_disp, output_imm): ISO C90 params.
715 * frags.c (frag_offset_fixed_p): Constify args.
716 * frags.h (frag_offset_fixed_p): Ditto.
718 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
719 (COFF_MAGIC): Delete.
721 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
723 2006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
725 * po/POTFILES.in: Regenerated.
727 2006-04-16 Mark Mitchell <mark@codesourcery.com>
729 * doc/as.texinfo: Mention that some .type syntaxes are not
730 supported on all architectures.
732 2006-04-14 Sterling Augustine <sterling@tensilica.com>
734 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
735 instructions when such transformations have been disabled.
737 2006-04-10 Sterling Augustine <sterling@tensilica.com>
739 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
740 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
741 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
742 decoding the loop instructions. Remove current_offset variable.
743 (xtensa_fix_short_loop_frags): Likewise.
744 (min_bytes_to_other_loop_end): Remove current_offset argument.
746 2006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl>
748 * config/tc-z80.c (z80_optimize_expr): Removed.
749 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
751 2006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
753 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
754 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
755 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
756 atmega644, atmega329, atmega3290, atmega649, atmega6490,
757 atmega406, atmega640, atmega1280, atmega1281, at90can32,
758 at90can64, at90usb646, at90usb647, at90usb1286 and
760 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
762 2006-04-07 Paul Brook <paul@codesourcery.com>
764 * config/tc-arm.c (parse_operands): Set default error message.
766 2006-04-07 Paul Brook <paul@codesourcery.com>
768 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
770 2006-04-07 Paul Brook <paul@codesourcery.com>
772 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
774 2006-04-07 Paul Brook <paul@codesourcery.com>
776 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
777 (move_or_literal_pool): Handle Thumb-2 instructions.
778 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
780 2006-04-07 Alan Modra <amodra@bigpond.net.au>
783 * config/tc-i386.c (match_template): Move 64-bit operand tests
786 2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
788 * po/Make-in: Add install-html target.
789 * Makefile.am: Add install-html and install-html-recursive targets.
790 * Makefile.in: Regenerate.
791 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
792 * configure: Regenerate.
793 * doc/Makefile.am: Add install-html and install-html-am targets.
794 * doc/Makefile.in: Regenerate.
796 2006-04-06 Alan Modra <amodra@bigpond.net.au>
798 * frags.c (frag_offset_fixed_p): Reinitialise offset before
801 2006-04-05 Richard Sandiford <richard@codesourcery.com>
802 Daniel Jacobowitz <dan@codesourcery.com>
804 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
805 (GOTT_BASE, GOTT_INDEX): New.
806 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
807 GOTT_INDEX when generating VxWorks PIC.
808 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
809 use the generic *-*-vxworks* stanza instead.
811 2006-04-04 Alan Modra <amodra@bigpond.net.au>
814 * frags.c (frag_offset_fixed_p): New function.
815 * frags.h (frag_offset_fixed_p): Declare.
816 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
817 (resolve_expression): Likewise.
819 2006-04-03 Sterling Augustine <sterling@tensilica.com>
821 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
822 of the same length but different numbers of slots.
824 2006-03-30 Andreas Schwab <schwab@suse.de>
826 * configure.in: Fix help string for --enable-targets option.
827 * configure: Regenerate.
829 2006-03-28 Nathan Sidwell <nathan@codesourcery.com>
831 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
832 (m68k_ip): ... here. Use for all chips. Protect against buffer
833 overrun and avoid excessive copying.
835 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
836 m68020_control_regs, m68040_control_regs, m68060_control_regs,
837 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
838 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
839 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
840 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
841 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
842 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
843 mcf5282_ctrl, mcfv4e_ctrl): ... these.
844 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
845 (struct m68k_cpu): Change chip field to control_regs.
846 (current_chip): Remove.
848 (m68k_archs, m68k_extensions): Adjust.
849 (m68k_cpus): Reorder to be in cpu number order. Adjust.
850 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
851 (find_cf_chip): Reimplement for new organization of cpu table.
852 (select_control_regs): Remove.
854 (struct save_opts): Save control regs, not chip.
855 (s_save, s_restore): Adjust.
856 (m68k_lookup_cpu): Give deprecated warning when necessary.
857 (m68k_init_arch): Adjust.
858 (md_show_usage): Adjust for new cpu table organization.
860 2006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
862 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
863 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
864 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
866 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
867 (any_gotrel): New rule.
868 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
869 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
871 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
872 (bfin_pic_ptr): New function.
873 (md_pseudo_table): Add it for ".picptr".
874 (OPTION_FDPIC): New macro.
875 (md_longopts): Add -mfdpic.
876 (md_parse_option): Handle it.
877 (md_begin): Set BFD flags.
878 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
879 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
881 * Makefile.am (bfin-parse.o): Update dependencies.
882 (DEPTC_bfin_elf): Likewise.
883 * Makefile.in: Regenerate.
885 2006-03-25 Richard Sandiford <richard@codesourcery.com>
887 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
888 mcfemac instead of mcfmac.
890 2006-03-23 Michael Matz <matz@suse.de>
892 * config/tc-i386.c (type_names): Correct placement of 'static'.
893 (reloc): Map some more relocs to their 64 bit counterpart when
895 (output_insn): Work around breakage if DEBUG386 is defined.
896 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
897 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
898 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
901 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
903 (md_convert_frag): Jumps can now be larger than 2GB away, error
905 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
906 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
908 2006-03-22 Richard Sandiford <richard@codesourcery.com>
909 Daniel Jacobowitz <dan@codesourcery.com>
910 Phil Edwards <phil@codesourcery.com>
911 Zack Weinberg <zack@codesourcery.com>
912 Mark Mitchell <mark@codesourcery.com>
913 Nathan Sidwell <nathan@codesourcery.com>
915 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
916 (md_begin): Complain about -G being used for PIC. Don't change
917 the text, data and bss alignments on VxWorks.
918 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
919 generating VxWorks PIC.
920 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
921 (macro): Likewise, but do not treat la $25 specially for
922 VxWorks PIC, and do not handle jal.
923 (OPTION_MVXWORKS_PIC): New macro.
924 (md_longopts): Add -mvxworks-pic.
925 (md_parse_option): Don't complain about using PIC and -G together here.
926 Handle OPTION_MVXWORKS_PIC.
927 (md_estimate_size_before_relax): Always use the first relaxation
929 * config/tc-mips.h (VXWORKS_PIC): New.
931 2006-03-21 Paul Brook <paul@codesourcery.com>
933 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
935 2006-03-21 Sterling Augustine <sterling@tensilica.com>
937 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
938 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
939 (get_loop_align_size): New.
940 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
941 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
942 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
943 (get_noop_aligned_address): Use get_loop_align_size.
944 (get_aligned_diff): Likewise.
946 2006-03-21 Paul Brook <paul@codesourcery.com>
948 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
950 2006-03-20 Paul Brook <paul@codesourcery.com>
952 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
953 (do_t_branch): Encode branches inside IT blocks as unconditional.
954 (do_t_cps): New function.
955 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
956 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
957 (opcode_lookup): Allow conditional suffixes on all instructions in
959 (md_assemble): Advance condexec state before checking for errors.
960 (insns): Use do_t_cps.
962 2006-03-20 Paul Brook <paul@codesourcery.com>
964 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
967 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
969 * config/tc-vax.c: Update copyright year.
970 * config/tc-vax.h: Likewise.
972 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
974 * config/tc-vax.c (md_chars_to_number): Used only locally, so
976 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
978 2006-03-17 Paul Brook <paul@codesourcery.com>
980 * config/tc-arm.c (insns): Add ldm and stm.
982 2006-03-17 Ben Elliston <bje@au.ibm.com>
985 * doc/as.texinfo (Ident): Document this directive more thoroughly.
987 2006-03-16 Paul Brook <paul@codesourcery.com>
989 * config/tc-arm.c (insns): Add "svc".
991 2006-03-13 Bob Wilson <bob.wilson@acm.org>
993 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
994 flag and avoid double underscore prefixes.
996 2006-03-10 Paul Brook <paul@codesourcery.com>
998 * config/tc-arm.c (md_begin): Handle EABIv5.
999 (arm_eabis): Add EF_ARM_EABI_VER5.
1000 * doc/c-arm.texi: Document -meabi=5.
1002 2006-03-10 Ben Elliston <bje@au.ibm.com>
1004 * app.c (do_scrub_chars): Simplify string handling.
1006 2006-03-07 Richard Sandiford <richard@codesourcery.com>
1007 Daniel Jacobowitz <dan@codesourcery.com>
1008 Zack Weinberg <zack@codesourcery.com>
1009 Nathan Sidwell <nathan@codesourcery.com>
1010 Paul Brook <paul@codesourcery.com>
1011 Ricardo Anguiano <anguiano@codesourcery.com>
1012 Phil Edwards <phil@codesourcery.com>
1014 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
1015 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
1017 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
1018 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
1019 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
1021 2006-03-06 Bob Wilson <bob.wilson@acm.org>
1023 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
1024 even when using the text-section-literals option.
1026 2006-03-06 Nathan Sidwell <nathan@codesourcery.com>
1028 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
1030 (m68k_ip): <case 'J'> Check we have some control regs.
1031 (md_parse_option): Allow raw arch switch.
1032 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
1033 whether 68881 or cfloat was meant by -mfloat.
1034 (md_show_usage): Adjust extension display.
1035 (m68k_elf_final_processing): Adjust.
1037 2006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
1039 * config/tc-avr.c (avr_mod_hash_value): New function.
1040 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
1041 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
1042 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
1043 instead of int avr_ldi_expression: use avr_mod_hash_value instead
1045 (tc_gen_reloc): Handle substractions of symbols, if possible do
1046 fixups, abort otherwise.
1047 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
1048 tc_fix_adjustable): Define.
1050 2006-03-02 James E Wilson <wilson@specifix.com>
1052 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
1053 change the template, then clear md.slot[curr].end_of_insn_group.
1055 2006-02-28 Jan Beulich <jbeulich@novell.com>
1057 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
1059 2006-02-28 Jan Beulich <jbeulich@novell.com>
1062 * macro.c (getstring): Don't treat parentheses special anymore.
1063 (get_any_string): Don't consider '(' and ')' as quoting anymore.
1064 Special-case '(', ')', '[', and ']' when dealing with non-quoting
1067 2006-02-28 Mat <mat@csail.mit.edu>
1069 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
1071 2006-02-27 Jakub Jelinek <jakub@redhat.com>
1073 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
1075 (CFI_signal_frame): Define.
1076 (cfi_pseudo_table): Add .cfi_signal_frame.
1077 (dot_cfi): Handle CFI_signal_frame.
1078 (output_cie): Handle cie->signal_frame.
1079 (select_cie_for_fde): Don't share CIE if signal_frame flag is
1080 different. Copy signal_frame from FDE to newly created CIE.
1081 * doc/as.texinfo: Document .cfi_signal_frame.
1083 2006-02-27 Carlos O'Donell <carlos@codesourcery.com>
1085 * doc/Makefile.am: Add html target.
1086 * doc/Makefile.in: Regenerate.
1087 * po/Make-in: Add html target.
1089 2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
1091 * config/tc-i386.c (output_insn): Support Intel Merom New
1094 * config/tc-i386.h (CpuMNI): New.
1095 (CpuUnknownFlags): Add CpuMNI.
1097 2006-02-24 David S. Miller <davem@sunset.davemloft.net>
1099 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
1100 (hpriv_reg_table): New table for hyperprivileged registers.
1101 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
1104 2006-02-24 DJ Delorie <dj@redhat.com>
1106 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
1107 (tc_gen_reloc): Don't define.
1108 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
1109 (OPTION_LINKRELAX): New.
1110 (md_longopts): Add it.
1112 (md_parse_options): Set it.
1113 (md_assemble): Emit relaxation relocs as needed.
1114 (md_convert_frag): Emit relaxation relocs as needed.
1115 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
1116 (m32c_apply_fix): New.
1117 (tc_gen_reloc): New.
1118 (m32c_force_relocation): Force out jump relocs when relaxing.
1119 (m32c_fix_adjustable): Return false if relaxing.
1121 2006-02-24 Paul Brook <paul@codesourcery.com>
1123 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
1124 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
1125 (struct asm_barrier_opt): Define.
1126 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
1127 (parse_psr): Accept V7M psr names.
1128 (parse_barrier): New function.
1129 (enum operand_parse_code): Add OP_oBARRIER.
1130 (parse_operands): Implement OP_oBARRIER.
1131 (do_barrier): New function.
1132 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
1133 (do_t_cpsi): Add V7M restrictions.
1134 (do_t_mrs, do_t_msr): Validate V7M variants.
1135 (md_assemble): Check for NULL variants.
1136 (v7m_psrs, barrier_opt_names): New tables.
1137 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
1138 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
1139 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
1140 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
1141 (struct cpu_arch_ver_table): Define.
1142 (cpu_arch_ver): New.
1143 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
1144 Tag_CPU_arch_profile.
1145 * doc/c-arm.texi: Document new cpu and arch options.
1147 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1149 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
1151 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1153 * config/tc-ia64.c: Update copyright years.
1155 2006-02-22 H.J. Lu <hongjiu.lu@intel.com>
1157 * config/tc-ia64.c (specify_resource): Add the rule 17 from
1160 2005-02-22 Paul Brook <paul@codesourcery.com>
1162 * config/tc-arm.c (do_pld): Remove incorrect write to
1164 (encode_thumb32_addr_mode): Use correct operand.
1166 2006-02-21 Paul Brook <paul@codesourcery.com>
1168 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
1170 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
1171 Anil Paranjape <anilp1@kpitcummins.com>
1172 Shilin Shakti <shilins@kpitcummins.com>
1174 * Makefile.am: Add xc16x related entry.
1175 * Makefile.in: Regenerate.
1176 * configure.in: Added xc16x related entry.
1177 * configure: Regenerate.
1178 * config/tc-xc16x.h: New file
1179 * config/tc-xc16x.c: New file
1180 * doc/c-xc16x.texi: New file for xc16x
1181 * doc/all.texi: Entry for xc16x
1182 * doc/Makefile.texi: Added c-xc16x.texi
1183 * NEWS: Announce the support for the new target.
1185 2006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
1187 * configure.tgt: set emulation for mips-*-netbsd*
1189 2006-02-14 Jakub Jelinek <jakub@redhat.com>
1191 * config.in: Rebuilt.
1193 2006-02-13 Bob Wilson <bob.wilson@acm.org>
1195 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
1196 from 1, not 0, in error messages.
1197 (md_assemble): Simplify special-case check for ENTRY instructions.
1198 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
1199 operand in error message.
1201 2006-02-13 Joseph S. Myers <joseph@codesourcery.com>
1203 * configure.tgt (arm-*-linux-gnueabi*): Change to
1206 2006-02-10 Nick Clifton <nickc@redhat.com>
1208 * config/tc-crx.c (check_range): Ensure that the sign bit of a
1209 32-bit value is propagated into the upper bits of a 64-bit long.
1211 * config/tc-arc.c (init_opcode_tables): Fix cast.
1212 (arc_extoper, md_operand): Likewise.
1214 2006-02-09 David Heine <dlheine@tensilica.com>
1216 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
1217 each relaxation step.
1219 2006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
1221 * configure.in (CHECK_DECLS): Add vsnprintf.
1222 * configure: Regenerate.
1223 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
1224 include/declare here, but...
1225 * as.h: Move code detecting VARARGS idiom to the top.
1226 (errno.h, stdarg.h, varargs.h, va_list): ...here.
1227 (vsnprintf): Declare if not already declared.
1229 2006-02-08 H.J. Lu <hongjiu.lu@intel.com>
1231 * as.c (close_output_file): New.
1232 (main): Register close_output_file with xatexit before
1233 dump_statistics. Don't call output_file_close.
1235 2006-02-07 Nathan Sidwell <nathan@codesourcery.com>
1237 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
1238 mcf5329_control_regs): New.
1239 (not_current_architecture, selected_arch, selected_cpu): New.
1240 (m68k_archs, m68k_extensions): New.
1241 (archs): Renamed to ...
1242 (m68k_cpus): ... here. Adjust.
1244 (md_pseudo_table): Add arch and cpu directives.
1245 (find_cf_chip, m68k_ip): Adjust table scanning.
1246 (no_68851, no_68881): Remove.
1247 (md_assemble): Lazily initialize.
1248 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
1249 (md_init_after_args): Move functionality to m68k_init_arch.
1250 (mri_chip): Adjust table scanning.
1251 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
1252 options with saner parsing.
1253 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
1254 m68k_init_arch): New.
1255 (s_m68k_cpu, s_m68k_arch): New.
1256 (md_show_usage): Adjust.
1257 (m68k_elf_final_processing): Set CF EF flags.
1258 * config/tc-m68k.h (m68k_init_after_args): Remove.
1259 (tc_init_after_args): Remove.
1260 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
1261 (M68k-Directives): Document .arch and .cpu directives.
1263 2006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl>
1265 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
1266 synonyms for equ and defl.
1267 (z80_cons_fix_new): New function.
1268 (emit_byte): Disallow relative jumps to absolute locations.
1269 (emit_data): Only handle defb, prototype changed, because defb is
1270 now handled as pseudo-op rather than an instruction.
1271 (instab): Entries for defb,defw,db,dw moved from here...
1272 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
1273 Add entries for def24,def32,d24,d32.
1274 (md_assemble): Improved error handling.
1275 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
1276 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
1277 (z80_cons_fix_new): Declare.
1278 * doc/c-z80.texi (defb, db): Mention warning on overflow.
1279 (def24,d24,def32,d32): New pseudo-ops.
1281 2006-02-02 Paul Brook <paul@codesourcery.com>
1283 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
1285 2005-02-02 Paul Brook <paul@codesourcery.com>
1287 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
1288 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
1289 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
1290 T2_OPCODE_RSB): Define.
1291 (thumb32_negate_data_op): New function.
1292 (md_apply_fix): Use it.
1294 2006-01-31 Bob Wilson <bob.wilson@acm.org>
1296 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
1298 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
1299 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
1301 (relaxation_requirements): Add pfinish_frag argument and use it to
1302 replace setting tinsn->record_fix fields.
1303 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
1304 and vinsn_to_insnbuf. Remove references to record_fix and
1305 slot_sub_symbols fields.
1306 (xtensa_mark_narrow_branches): Delete unused code.
1307 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
1309 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
1311 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
1312 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
1313 of the record_fix field. Simplify error messages for unexpected
1315 (set_expr_symbol_offset_diff): Delete.
1317 2006-01-31 Paul Brook <paul@codesourcery.com>
1319 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
1321 2006-01-31 Paul Brook <paul@codesourcery.com>
1322 Richard Earnshaw <rearnsha@arm.com>
1324 * config/tc-arm.c: Use arm_feature_set.
1325 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
1326 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
1327 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
1330 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
1331 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
1332 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
1333 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
1335 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
1336 (arm_opts): Move old cpu/arch options from here...
1337 (arm_legacy_opts): ... to here.
1338 (md_parse_option): Search arm_legacy_opts.
1339 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
1340 (arm_float_abis, arm_eabis): Make const.
1342 2006-01-25 Bob Wilson <bob.wilson@acm.org>
1344 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
1346 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1348 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
1349 in load immediate intruction.
1351 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1353 * config/bfin-parse.y (value_match): Use correct conversion
1354 specifications in template string for __FILE__ and __LINE__.
1358 2006-01-18 Alexandre Oliva <aoliva@redhat.com>
1360 Introduce TLS descriptors for i386 and x86_64.
1361 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
1362 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
1363 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
1364 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
1365 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
1367 (build_modrm_byte): Set up zero modrm for TLS desc calls.
1368 (lex_got): Handle @tlsdesc and @tlscall.
1369 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
1371 2006-01-11 Nick Clifton <nickc@redhat.com>
1373 Fixes for building on 64-bit hosts:
1374 * config/tc-avr.c (mod_index): New union to allow conversion
1375 between pointers and integers.
1376 (md_begin, avr_ldi_expression): Use it.
1377 * config/tc-i370.c (md_assemble): Add cast for argument to print
1379 * config/tc-tic54x.c (subsym_substitute): Likewise.
1380 * config/tc-mn10200.c (md_assemble): Use a union to convert the
1381 opindex field of fr_cgen structure into a pointer so that it can
1382 be stored in a frag.
1383 * config/tc-mn10300.c (md_assemble): Likewise.
1384 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
1386 * config/tc-v850.c: Replace uses of (int) casts with correct
1389 2006-01-09 H.J. Lu <hongjiu.lu@intel.com>
1392 * symbols.c (snapshot_symbol): Don't change a defined symbol.
1394 2006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
1397 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
1398 a local-label reference.
1400 For older changes see ChangeLog-2005
1406 version-control: never
projects / deliverable / binutils-gdb.git / blob