1 2006-05-08 Alan Modra <amodra@bigpond.net.au>
3 * write.c (relax_segment): Add pass count arg. Don't error on
4 negative org/space on first two passes.
5 (relax_seg_info): New struct.
6 (relax_seg, write_object_file): Adjust.
7 * write.h (relax_segment): Update prototype.
9 2006-05-05 Julian Brown <julian@codesourcery.com>
11 * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
13 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
14 architecture version checks.
15 (insns): Allow overlapping instructions to be used in VFP mode.
17 2006-05-05 H.J. Lu <hongjiu.lu@intel.com>
20 * config/obj-elf.c (obj_elf_change_section): Allow user
21 specified SHF_ALPHA_GPREL.
23 2006-05-05 Bjoern Haase <bjoern.m.haase@web.de>
25 * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups
26 for PMEM related expressions.
28 2006-05-05 Nick Clifton <nickc@redhat.com>
31 * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the
32 insertion of a directory separator character into a string at a
33 given offset. Uses heuristics to decide when to use a backslash
34 character rather than a forward-slash character.
35 (dwarf2_directive_loc): Use the macro.
36 (out_debug_info): Likewise.
38 2006-05-05 Thiemo Seufer <ths@mips.com>
39 David Ung <davidu@mips.com>
41 * config/tc-mips.c (macro_build): Add case 'k' to handle cache
43 (macro): Add new case M_CACHE_AB.
45 2006-05-04 Kazu Hirata <kazu@codesourcery.com>
47 * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
48 (opcode_lookup): Issue a warning for opcode with
49 OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated
50 identical to OT_cinfix3.
51 (TxC3w, TC3w, tC3w): New.
52 (insns): Use tC3w and TC3w for comparison instructions with
55 2006-05-04 Alan Modra <amodra@bigpond.net.au>
57 * subsegs.h (struct frchain): Delete frch_seg.
58 (frchain_root): Delete.
59 (seg_info): Define as macro.
60 * subsegs.c (frchain_root): Delete.
61 (abs_seg_info, und_seg_info, absolute_frchain): Delete.
62 (subsegs_begin, subseg_change): Adjust for above.
63 (subseg_set_rest): Likewise. Add new frchain structs to seginfo
64 rather than to one big list.
65 (subseg_get): Don't special case abs, und sections.
66 (subseg_new, subseg_force_new): Don't set frchainP here.
68 (subsegs_print_statistics): Adjust frag chain control list traversal.
69 * debug.c (dmp_frags): Likewise.
70 * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
71 at frchain_root. Make use of known frchain ordering.
72 (last_frag_for_seg): Likewise.
73 (get_frag_fix): Likewise. Add seg param.
74 (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
75 * write.c (chain_frchains_together_1): Adjust for struct frchain.
76 (SUB_SEGMENT_ALIGN): Likewise.
77 (subsegs_finish): Adjust frchain list traversal.
78 * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
79 (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
80 (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
81 (xtensa_fix_b_j_loop_end_frags): Likewise.
82 (xtensa_fix_close_loop_end_frags): Likewise.
83 (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
84 (retrieve_segment_info): Delete frch_seg initialisation.
86 2006-05-03 Alan Modra <amodra@bigpond.net.au>
88 * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
89 * config/obj-elf.h (obj_sec_set_private_data): Delete.
90 * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
91 * config/tc-mn10300.c (tc_gen_reloc): Likewise.
93 2006-05-02 Joseph Myers <joseph@codesourcery.com>
95 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
97 (md_apply_fix3): Multiply offset by 4 here for
98 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
100 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
101 Jan Beulich <jbeulich@novell.com>
103 * config/tc-i386.c (output_invalid_buf): Change size for
105 * config/tc-tic30.c (output_invalid_buf): Likewise.
107 * config/tc-i386.c (output_invalid): Cast none-ascii char to
109 * config/tc-tic30.c (output_invalid): Likewise.
111 2006-05-02 Daniel Jacobowitz <dan@codesourcery.com>
113 * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
114 (TEXI2POD): Use AM_MAKEINFOFLAGS.
115 (asconfig.texi): Don't set top_srcdir.
116 * doc/as.texinfo: Don't use top_srcdir.
117 * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
119 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
121 * config/tc-i386.c (output_invalid_buf): Change size to 16.
122 * config/tc-tic30.c (output_invalid_buf): Likewise.
124 * config/tc-i386.c (output_invalid): Use snprintf instead of
126 * config/tc-ia64.c (declare_register_set): Likewise.
127 (emit_one_bundle): Likewise.
128 (check_dependencies): Likewise.
129 * config/tc-tic30.c (output_invalid): Likewise.
131 2006-05-02 Paul Brook <paul@codesourcery.com>
133 * config/tc-arm.c (arm_optimize_expr): New function.
134 * config/tc-arm.h (md_optimize_expr): Define
135 (arm_optimize_expr): Add prototype.
136 (TC_FORCE_RELOCATION_SUB_SAME): Define.
138 2006-05-02 Ben Elliston <bje@au.ibm.com>
140 * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
143 * sb.h (sb_list_vector): Move to sb.c.
144 * sb.c (free_list): Use type of sb_list_vector directly.
145 (sb_build): Fix off-by-one error in assertion about `size'.
147 2006-05-01 Ben Elliston <bje@au.ibm.com>
149 * listing.c (listing_listing): Remove useless loop.
150 * macro.c (macro_expand): Remove is_positional local variable.
151 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
152 and simplify surrounding expressions, where possible.
153 (assign_symbol): Likewise.
154 (s_weakref): Likewise.
155 * symbols.c (colon): Likewise.
157 2006-05-01 James Lemke <jwlemke@wasabisystems.com>
159 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
161 2006-04-30 Thiemo Seufer <ths@mips.com>
162 David Ung <davidu@mips.com>
164 * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
165 (mips_immed): New table that records various handling of udi
166 instruction patterns.
167 (mips_ip): Adds udi handling.
169 2006-04-28 Alan Modra <amodra@bigpond.net.au>
171 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
172 of list rather than beginning.
174 2006-04-26 Julian Brown <julian@codesourcery.com>
176 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
177 (is_quarter_float): Rename from above. Simplify slightly.
178 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
180 (parse_neon_mov): Parse floating-point constants.
181 (neon_qfloat_bits): Fix encoding.
182 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
183 preference to integer encoding when using the F32 type.
185 2006-04-26 Julian Brown <julian@codesourcery.com>
187 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
188 zero-initialising structures containing it will lead to invalid types).
189 (arm_it): Add vectype to each operand.
190 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
192 (neon_typed_alias): New structure. Extra information for typed
194 (reg_entry): Add neon type info field.
195 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
196 Break out alternative syntax for coprocessor registers, etc. into...
197 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
198 out from arm_reg_parse.
199 (parse_neon_type): Move. Return SUCCESS/FAIL.
200 (first_error): New function. Call to ensure first error which occurs is
202 (parse_neon_operand_type): Parse exactly one type.
203 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
204 (parse_typed_reg_or_scalar): New function. Handle core of both
205 arm_typed_reg_parse and parse_scalar.
206 (arm_typed_reg_parse): Parse a register with an optional type.
207 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
209 (parse_scalar): Parse a Neon scalar with optional type.
210 (parse_reg_list): Use first_error.
211 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
212 (neon_alias_types_same): New function. Return true if two (alias) types
214 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
216 (insert_reg_alias): Return new reg_entry not void.
217 (insert_neon_reg_alias): New function. Insert type/index information as
218 well as register for alias.
219 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
220 make typed register aliases accordingly.
221 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
223 (s_unreq): Delete type information if present.
224 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
225 (s_arm_unwind_save_mmxwcg): Likewise.
226 (s_arm_unwind_movsp): Likewise.
227 (s_arm_unwind_setfp): Likewise.
228 (parse_shift): Likewise.
229 (parse_shifter_operand): Likewise.
230 (parse_address): Likewise.
231 (parse_tb): Likewise.
232 (tc_arm_regname_to_dw2regnum): Likewise.
233 (md_pseudo_table): Add dn, qn.
234 (parse_neon_mov): Handle typed operands.
235 (parse_operands): Likewise.
236 (neon_type_mask): Add N_SIZ.
237 (N_ALLMODS): New macro.
238 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
239 (el_type_of_type_chk): Add some safeguards.
240 (modify_types_allowed): Fix logic bug.
241 (neon_check_type): Handle operands with types.
242 (neon_three_same): Remove redundant optional arg handling.
243 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
244 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
245 (do_neon_step): Adjust accordingly.
246 (neon_cmode_for_logic_imm): Use first_error.
247 (do_neon_bitfield): Call neon_check_type.
248 (neon_dyadic): Rename to...
249 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
250 to allow modification of type of the destination.
251 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
252 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
253 (do_neon_compare): Make destination be an untyped bitfield.
254 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
255 (neon_mul_mac): Return early in case of errors.
256 (neon_move_immediate): Use first_error.
257 (neon_mac_reg_scalar_long): Fix type to include scalar.
258 (do_neon_dup): Likewise.
259 (do_neon_mov): Likewise (in several places).
260 (do_neon_tbl_tbx): Fix type.
261 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
262 (do_neon_ld_dup): Exit early in case of errors and/or use
264 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
265 Handle .dn/.qn directives.
266 (REGDEF): Add zero for reg_entry neon field.
268 2006-04-26 Julian Brown <julian@codesourcery.com>
270 * config/tc-arm.c (limits.h): Include.
271 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
272 (fpu_vfp_v3_or_neon_ext): Declare constants.
273 (neon_el_type): New enumeration of types for Neon vector elements.
274 (neon_type_el): New struct. Define type and size of a vector element.
275 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
277 (neon_type): Define struct. The type of an instruction.
278 (arm_it): Add 'vectype' for the current instruction.
279 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
280 (vfp_sp_reg_pos): Rename to...
281 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
283 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
284 (Neon D or Q register).
285 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
287 (GE_OPT_PREFIX_BIG): Define constant, for use in...
288 (my_get_expression): Allow above constant as argument to accept
289 64-bit constants with optional prefix.
290 (arm_reg_parse): Add extra argument to return the specific type of
291 register in when either a D or Q register (REG_TYPE_NDQ) is
292 requested. Can be NULL.
293 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
294 (parse_reg_list): Update for new arm_reg_parse args.
295 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
296 (parse_neon_el_struct_list): New function. Parse element/structure
297 register lists for VLD<n>/VST<n> instructions.
298 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
299 (s_arm_unwind_save_mmxwr): Likewise.
300 (s_arm_unwind_save_mmxwcg): Likewise.
301 (s_arm_unwind_movsp): Likewise.
302 (s_arm_unwind_setfp): Likewise.
303 (parse_big_immediate): New function. Parse an immediate, which may be
304 64 bits wide. Put results in inst.operands[i].
305 (parse_shift): Update for new arm_reg_parse args.
306 (parse_address): Likewise. Add parsing of alignment specifiers.
307 (parse_neon_mov): Parse the operands of a VMOV instruction.
308 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
309 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
310 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
311 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
312 (parse_operands): Handle new codes above.
313 (encode_arm_vfp_sp_reg): Rename to...
314 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
315 selected VFP version only supports D0-D15.
316 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
317 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
318 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
319 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
320 encode_arm_vfp_reg name, and allow 32 D regs.
321 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
322 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
324 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
325 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
326 constant-load and conversion insns introduced with VFPv3.
327 (neon_tab_entry): New struct.
328 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
329 those which are the targets of pseudo-instructions.
330 (neon_opc): Enumerate opcodes, use as indices into...
331 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
332 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
333 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
334 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
336 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
338 (neon_type_mask): New. Compact type representation for type checking.
339 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
340 permitted type combinations.
341 (N_IGNORE_TYPE): New macro.
342 (neon_check_shape): New function. Check an instruction shape for
343 multiple alternatives. Return the specific shape for the current
345 (neon_modify_type_size): New function. Modify a vector type and size,
346 depending on the bit mask in argument 1.
347 (neon_type_promote): New function. Convert a given "key" type (of an
348 operand) into the correct type for a different operand, based on a bit
350 (type_chk_of_el_type): New function. Convert a type and size into the
351 compact representation used for type checking.
352 (el_type_of_type_ckh): New function. Reverse of above (only when a
353 single bit is set in the bit mask).
354 (modify_types_allowed): New function. Alter a mask of allowed types
355 based on a bit mask of modifications.
356 (neon_check_type): New function. Check the type of the current
357 instruction against the variable argument list. The "key" type of the
358 instruction is returned.
359 (neon_dp_fixup): New function. Fill in and modify instruction bits for
360 a Neon data-processing instruction depending on whether we're in ARM
361 mode or Thumb-2 mode.
362 (neon_logbits): New function.
363 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
364 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
365 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
366 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
367 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
368 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
369 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
370 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
371 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
372 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
373 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
374 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
375 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
376 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
377 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
378 (neon_move_immediate, do_neon_mvn, neon_mixed_length)
379 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
380 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
381 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
382 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
383 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
384 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
385 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
386 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
387 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
389 (parse_neon_type): New function. Parse Neon type specifier.
390 (opcode_lookup): Allow parsing of Neon type specifiers.
391 (REGNUM2, REGSETH, REGSET2): New macros.
392 (reg_names): Add new VFPv3 and Neon registers.
393 (NUF, nUF, NCE, nCE): New macros for opcode table.
394 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
395 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
396 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
397 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
398 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
399 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
400 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
401 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
402 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
403 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
404 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
405 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
406 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
407 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
409 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
410 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
411 (arm_option_cpu_value): Add vfp3 and neon.
412 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
415 2006-04-25 Bob Wilson <bob.wilson@acm.org>
417 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
418 syntax instead of hardcoded opcodes with ".w18" suffixes.
419 (wide_branch_opcode): New.
420 (build_transition): Use it to check for wide branch opcodes with
421 either ".w18" or ".w15" suffixes.
423 2006-04-25 Bob Wilson <bob.wilson@acm.org>
425 * config/tc-xtensa.c (xtensa_create_literal_symbol,
426 xg_assemble_literal, xg_assemble_literal_space): Do not set the
427 frag's is_literal flag.
429 2006-04-25 Bob Wilson <bob.wilson@acm.org>
431 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
433 2006-04-23 Kazu Hirata <kazu@codesourcery.com>
435 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
436 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
437 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
438 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
439 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
441 2005-04-20 Paul Brook <paul@codesourcery.com>
443 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
445 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
447 2006-04-19 Alan Modra <amodra@bigpond.net.au>
449 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
450 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
451 Make some cpus unsupported on ELF. Run "make dep-am".
452 * Makefile.in: Regenerate.
454 2006-04-19 Alan Modra <amodra@bigpond.net.au>
456 * configure.in (--enable-targets): Indent help message.
457 * configure: Regenerate.
459 2006-04-18 H.J. Lu <hongjiu.lu@intel.com>
462 * config/tc-i386.c (i386_immediate): Check illegal immediate
465 2006-04-18 Alan Modra <amodra@bigpond.net.au>
467 * config/tc-i386.c: Formatting.
468 (output_disp, output_imm): ISO C90 params.
470 * frags.c (frag_offset_fixed_p): Constify args.
471 * frags.h (frag_offset_fixed_p): Ditto.
473 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
474 (COFF_MAGIC): Delete.
476 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
478 2006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
480 * po/POTFILES.in: Regenerated.
482 2006-04-16 Mark Mitchell <mark@codesourcery.com>
484 * doc/as.texinfo: Mention that some .type syntaxes are not
485 supported on all architectures.
487 2006-04-14 Sterling Augustine <sterling@tensilica.com>
489 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
490 instructions when such transformations have been disabled.
492 2006-04-10 Sterling Augustine <sterling@tensilica.com>
494 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
495 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
496 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
497 decoding the loop instructions. Remove current_offset variable.
498 (xtensa_fix_short_loop_frags): Likewise.
499 (min_bytes_to_other_loop_end): Remove current_offset argument.
501 2006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl>
503 * config/tc-z80.c (z80_optimize_expr): Removed.
504 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
506 2006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
508 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
509 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
510 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
511 atmega644, atmega329, atmega3290, atmega649, atmega6490,
512 atmega406, atmega640, atmega1280, atmega1281, at90can32,
513 at90can64, at90usb646, at90usb647, at90usb1286 and
515 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
517 2006-04-07 Paul Brook <paul@codesourcery.com>
519 * config/tc-arm.c (parse_operands): Set default error message.
521 2006-04-07 Paul Brook <paul@codesourcery.com>
523 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
525 2006-04-07 Paul Brook <paul@codesourcery.com>
527 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
529 2006-04-07 Paul Brook <paul@codesourcery.com>
531 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
532 (move_or_literal_pool): Handle Thumb-2 instructions.
533 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
535 2006-04-07 Alan Modra <amodra@bigpond.net.au>
538 * config/tc-i386.c (match_template): Move 64-bit operand tests
541 2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
543 * po/Make-in: Add install-html target.
544 * Makefile.am: Add install-html and install-html-recursive targets.
545 * Makefile.in: Regenerate.
546 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
547 * configure: Regenerate.
548 * doc/Makefile.am: Add install-html and install-html-am targets.
549 * doc/Makefile.in: Regenerate.
551 2006-04-06 Alan Modra <amodra@bigpond.net.au>
553 * frags.c (frag_offset_fixed_p): Reinitialise offset before
556 2006-04-05 Richard Sandiford <richard@codesourcery.com>
557 Daniel Jacobowitz <dan@codesourcery.com>
559 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
560 (GOTT_BASE, GOTT_INDEX): New.
561 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
562 GOTT_INDEX when generating VxWorks PIC.
563 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
564 use the generic *-*-vxworks* stanza instead.
566 2006-04-04 Alan Modra <amodra@bigpond.net.au>
569 * frags.c (frag_offset_fixed_p): New function.
570 * frags.h (frag_offset_fixed_p): Declare.
571 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
572 (resolve_expression): Likewise.
574 2006-04-03 Sterling Augustine <sterling@tensilica.com>
576 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
577 of the same length but different numbers of slots.
579 2006-03-30 Andreas Schwab <schwab@suse.de>
581 * configure.in: Fix help string for --enable-targets option.
582 * configure: Regenerate.
584 2006-03-28 Nathan Sidwell <nathan@codesourcery.com>
586 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
587 (m68k_ip): ... here. Use for all chips. Protect against buffer
588 overrun and avoid excessive copying.
590 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
591 m68020_control_regs, m68040_control_regs, m68060_control_regs,
592 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
593 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
594 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
595 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
596 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
597 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
598 mcf5282_ctrl, mcfv4e_ctrl): ... these.
599 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
600 (struct m68k_cpu): Change chip field to control_regs.
601 (current_chip): Remove.
603 (m68k_archs, m68k_extensions): Adjust.
604 (m68k_cpus): Reorder to be in cpu number order. Adjust.
605 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
606 (find_cf_chip): Reimplement for new organization of cpu table.
607 (select_control_regs): Remove.
609 (struct save_opts): Save control regs, not chip.
610 (s_save, s_restore): Adjust.
611 (m68k_lookup_cpu): Give deprecated warning when necessary.
612 (m68k_init_arch): Adjust.
613 (md_show_usage): Adjust for new cpu table organization.
615 2006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
617 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
618 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
619 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
621 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
622 (any_gotrel): New rule.
623 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
624 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
626 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
627 (bfin_pic_ptr): New function.
628 (md_pseudo_table): Add it for ".picptr".
629 (OPTION_FDPIC): New macro.
630 (md_longopts): Add -mfdpic.
631 (md_parse_option): Handle it.
632 (md_begin): Set BFD flags.
633 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
634 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
636 * Makefile.am (bfin-parse.o): Update dependencies.
637 (DEPTC_bfin_elf): Likewise.
638 * Makefile.in: Regenerate.
640 2006-03-25 Richard Sandiford <richard@codesourcery.com>
642 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
643 mcfemac instead of mcfmac.
645 2006-03-23 Michael Matz <matz@suse.de>
647 * config/tc-i386.c (type_names): Correct placement of 'static'.
648 (reloc): Map some more relocs to their 64 bit counterpart when
650 (output_insn): Work around breakage if DEBUG386 is defined.
651 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
652 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
653 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
656 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
658 (md_convert_frag): Jumps can now be larger than 2GB away, error
660 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
661 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
663 2006-03-22 Richard Sandiford <richard@codesourcery.com>
664 Daniel Jacobowitz <dan@codesourcery.com>
665 Phil Edwards <phil@codesourcery.com>
666 Zack Weinberg <zack@codesourcery.com>
667 Mark Mitchell <mark@codesourcery.com>
668 Nathan Sidwell <nathan@codesourcery.com>
670 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
671 (md_begin): Complain about -G being used for PIC. Don't change
672 the text, data and bss alignments on VxWorks.
673 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
674 generating VxWorks PIC.
675 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
676 (macro): Likewise, but do not treat la $25 specially for
677 VxWorks PIC, and do not handle jal.
678 (OPTION_MVXWORKS_PIC): New macro.
679 (md_longopts): Add -mvxworks-pic.
680 (md_parse_option): Don't complain about using PIC and -G together here.
681 Handle OPTION_MVXWORKS_PIC.
682 (md_estimate_size_before_relax): Always use the first relaxation
684 * config/tc-mips.h (VXWORKS_PIC): New.
686 2006-03-21 Paul Brook <paul@codesourcery.com>
688 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
690 2006-03-21 Sterling Augustine <sterling@tensilica.com>
692 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
693 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
694 (get_loop_align_size): New.
695 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
696 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
697 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
698 (get_noop_aligned_address): Use get_loop_align_size.
699 (get_aligned_diff): Likewise.
701 2006-03-21 Paul Brook <paul@codesourcery.com>
703 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
705 2006-03-20 Paul Brook <paul@codesourcery.com>
707 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
708 (do_t_branch): Encode branches inside IT blocks as unconditional.
709 (do_t_cps): New function.
710 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
711 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
712 (opcode_lookup): Allow conditional suffixes on all instructions in
714 (md_assemble): Advance condexec state before checking for errors.
715 (insns): Use do_t_cps.
717 2006-03-20 Paul Brook <paul@codesourcery.com>
719 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
722 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
724 * config/tc-vax.c: Update copyright year.
725 * config/tc-vax.h: Likewise.
727 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
729 * config/tc-vax.c (md_chars_to_number): Used only locally, so
731 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
733 2006-03-17 Paul Brook <paul@codesourcery.com>
735 * config/tc-arm.c (insns): Add ldm and stm.
737 2006-03-17 Ben Elliston <bje@au.ibm.com>
740 * doc/as.texinfo (Ident): Document this directive more thoroughly.
742 2006-03-16 Paul Brook <paul@codesourcery.com>
744 * config/tc-arm.c (insns): Add "svc".
746 2006-03-13 Bob Wilson <bob.wilson@acm.org>
748 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
749 flag and avoid double underscore prefixes.
751 2006-03-10 Paul Brook <paul@codesourcery.com>
753 * config/tc-arm.c (md_begin): Handle EABIv5.
754 (arm_eabis): Add EF_ARM_EABI_VER5.
755 * doc/c-arm.texi: Document -meabi=5.
757 2006-03-10 Ben Elliston <bje@au.ibm.com>
759 * app.c (do_scrub_chars): Simplify string handling.
761 2006-03-07 Richard Sandiford <richard@codesourcery.com>
762 Daniel Jacobowitz <dan@codesourcery.com>
763 Zack Weinberg <zack@codesourcery.com>
764 Nathan Sidwell <nathan@codesourcery.com>
765 Paul Brook <paul@codesourcery.com>
766 Ricardo Anguiano <anguiano@codesourcery.com>
767 Phil Edwards <phil@codesourcery.com>
769 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
770 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
772 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
773 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
774 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
776 2006-03-06 Bob Wilson <bob.wilson@acm.org>
778 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
779 even when using the text-section-literals option.
781 2006-03-06 Nathan Sidwell <nathan@codesourcery.com>
783 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
785 (m68k_ip): <case 'J'> Check we have some control regs.
786 (md_parse_option): Allow raw arch switch.
787 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
788 whether 68881 or cfloat was meant by -mfloat.
789 (md_show_usage): Adjust extension display.
790 (m68k_elf_final_processing): Adjust.
792 2006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
794 * config/tc-avr.c (avr_mod_hash_value): New function.
795 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
796 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
797 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
798 instead of int avr_ldi_expression: use avr_mod_hash_value instead
800 (tc_gen_reloc): Handle substractions of symbols, if possible do
801 fixups, abort otherwise.
802 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
803 tc_fix_adjustable): Define.
805 2006-03-02 James E Wilson <wilson@specifix.com>
807 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
808 change the template, then clear md.slot[curr].end_of_insn_group.
810 2006-02-28 Jan Beulich <jbeulich@novell.com>
812 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
814 2006-02-28 Jan Beulich <jbeulich@novell.com>
817 * macro.c (getstring): Don't treat parentheses special anymore.
818 (get_any_string): Don't consider '(' and ')' as quoting anymore.
819 Special-case '(', ')', '[', and ']' when dealing with non-quoting
822 2006-02-28 Mat <mat@csail.mit.edu>
824 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
826 2006-02-27 Jakub Jelinek <jakub@redhat.com>
828 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
830 (CFI_signal_frame): Define.
831 (cfi_pseudo_table): Add .cfi_signal_frame.
832 (dot_cfi): Handle CFI_signal_frame.
833 (output_cie): Handle cie->signal_frame.
834 (select_cie_for_fde): Don't share CIE if signal_frame flag is
835 different. Copy signal_frame from FDE to newly created CIE.
836 * doc/as.texinfo: Document .cfi_signal_frame.
838 2006-02-27 Carlos O'Donell <carlos@codesourcery.com>
840 * doc/Makefile.am: Add html target.
841 * doc/Makefile.in: Regenerate.
842 * po/Make-in: Add html target.
844 2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
846 * config/tc-i386.c (output_insn): Support Intel Merom New
849 * config/tc-i386.h (CpuMNI): New.
850 (CpuUnknownFlags): Add CpuMNI.
852 2006-02-24 David S. Miller <davem@sunset.davemloft.net>
854 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
855 (hpriv_reg_table): New table for hyperprivileged registers.
856 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
859 2006-02-24 DJ Delorie <dj@redhat.com>
861 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
862 (tc_gen_reloc): Don't define.
863 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
864 (OPTION_LINKRELAX): New.
865 (md_longopts): Add it.
867 (md_parse_options): Set it.
868 (md_assemble): Emit relaxation relocs as needed.
869 (md_convert_frag): Emit relaxation relocs as needed.
870 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
871 (m32c_apply_fix): New.
873 (m32c_force_relocation): Force out jump relocs when relaxing.
874 (m32c_fix_adjustable): Return false if relaxing.
876 2006-02-24 Paul Brook <paul@codesourcery.com>
878 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
879 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
880 (struct asm_barrier_opt): Define.
881 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
882 (parse_psr): Accept V7M psr names.
883 (parse_barrier): New function.
884 (enum operand_parse_code): Add OP_oBARRIER.
885 (parse_operands): Implement OP_oBARRIER.
886 (do_barrier): New function.
887 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
888 (do_t_cpsi): Add V7M restrictions.
889 (do_t_mrs, do_t_msr): Validate V7M variants.
890 (md_assemble): Check for NULL variants.
891 (v7m_psrs, barrier_opt_names): New tables.
892 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
893 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
894 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
895 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
896 (struct cpu_arch_ver_table): Define.
898 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
899 Tag_CPU_arch_profile.
900 * doc/c-arm.texi: Document new cpu and arch options.
902 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
904 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
906 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
908 * config/tc-ia64.c: Update copyright years.
910 2006-02-22 H.J. Lu <hongjiu.lu@intel.com>
912 * config/tc-ia64.c (specify_resource): Add the rule 17 from
915 2005-02-22 Paul Brook <paul@codesourcery.com>
917 * config/tc-arm.c (do_pld): Remove incorrect write to
919 (encode_thumb32_addr_mode): Use correct operand.
921 2006-02-21 Paul Brook <paul@codesourcery.com>
923 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
925 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
926 Anil Paranjape <anilp1@kpitcummins.com>
927 Shilin Shakti <shilins@kpitcummins.com>
929 * Makefile.am: Add xc16x related entry.
930 * Makefile.in: Regenerate.
931 * configure.in: Added xc16x related entry.
932 * configure: Regenerate.
933 * config/tc-xc16x.h: New file
934 * config/tc-xc16x.c: New file
935 * doc/c-xc16x.texi: New file for xc16x
936 * doc/all.texi: Entry for xc16x
937 * doc/Makefile.texi: Added c-xc16x.texi
938 * NEWS: Announce the support for the new target.
940 2006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
942 * configure.tgt: set emulation for mips-*-netbsd*
944 2006-02-14 Jakub Jelinek <jakub@redhat.com>
946 * config.in: Rebuilt.
948 2006-02-13 Bob Wilson <bob.wilson@acm.org>
950 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
951 from 1, not 0, in error messages.
952 (md_assemble): Simplify special-case check for ENTRY instructions.
953 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
954 operand in error message.
956 2006-02-13 Joseph S. Myers <joseph@codesourcery.com>
958 * configure.tgt (arm-*-linux-gnueabi*): Change to
961 2006-02-10 Nick Clifton <nickc@redhat.com>
963 * config/tc-crx.c (check_range): Ensure that the sign bit of a
964 32-bit value is propagated into the upper bits of a 64-bit long.
966 * config/tc-arc.c (init_opcode_tables): Fix cast.
967 (arc_extoper, md_operand): Likewise.
969 2006-02-09 David Heine <dlheine@tensilica.com>
971 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
972 each relaxation step.
974 2006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
976 * configure.in (CHECK_DECLS): Add vsnprintf.
977 * configure: Regenerate.
978 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
979 include/declare here, but...
980 * as.h: Move code detecting VARARGS idiom to the top.
981 (errno.h, stdarg.h, varargs.h, va_list): ...here.
982 (vsnprintf): Declare if not already declared.
984 2006-02-08 H.J. Lu <hongjiu.lu@intel.com>
986 * as.c (close_output_file): New.
987 (main): Register close_output_file with xatexit before
988 dump_statistics. Don't call output_file_close.
990 2006-02-07 Nathan Sidwell <nathan@codesourcery.com>
992 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
993 mcf5329_control_regs): New.
994 (not_current_architecture, selected_arch, selected_cpu): New.
995 (m68k_archs, m68k_extensions): New.
996 (archs): Renamed to ...
997 (m68k_cpus): ... here. Adjust.
999 (md_pseudo_table): Add arch and cpu directives.
1000 (find_cf_chip, m68k_ip): Adjust table scanning.
1001 (no_68851, no_68881): Remove.
1002 (md_assemble): Lazily initialize.
1003 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
1004 (md_init_after_args): Move functionality to m68k_init_arch.
1005 (mri_chip): Adjust table scanning.
1006 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
1007 options with saner parsing.
1008 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
1009 m68k_init_arch): New.
1010 (s_m68k_cpu, s_m68k_arch): New.
1011 (md_show_usage): Adjust.
1012 (m68k_elf_final_processing): Set CF EF flags.
1013 * config/tc-m68k.h (m68k_init_after_args): Remove.
1014 (tc_init_after_args): Remove.
1015 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
1016 (M68k-Directives): Document .arch and .cpu directives.
1018 2006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl>
1020 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
1021 synonyms for equ and defl.
1022 (z80_cons_fix_new): New function.
1023 (emit_byte): Disallow relative jumps to absolute locations.
1024 (emit_data): Only handle defb, prototype changed, because defb is
1025 now handled as pseudo-op rather than an instruction.
1026 (instab): Entries for defb,defw,db,dw moved from here...
1027 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
1028 Add entries for def24,def32,d24,d32.
1029 (md_assemble): Improved error handling.
1030 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
1031 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
1032 (z80_cons_fix_new): Declare.
1033 * doc/c-z80.texi (defb, db): Mention warning on overflow.
1034 (def24,d24,def32,d32): New pseudo-ops.
1036 2006-02-02 Paul Brook <paul@codesourcery.com>
1038 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
1040 2005-02-02 Paul Brook <paul@codesourcery.com>
1042 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
1043 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
1044 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
1045 T2_OPCODE_RSB): Define.
1046 (thumb32_negate_data_op): New function.
1047 (md_apply_fix): Use it.
1049 2006-01-31 Bob Wilson <bob.wilson@acm.org>
1051 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
1053 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
1054 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
1056 (relaxation_requirements): Add pfinish_frag argument and use it to
1057 replace setting tinsn->record_fix fields.
1058 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
1059 and vinsn_to_insnbuf. Remove references to record_fix and
1060 slot_sub_symbols fields.
1061 (xtensa_mark_narrow_branches): Delete unused code.
1062 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
1064 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
1066 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
1067 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
1068 of the record_fix field. Simplify error messages for unexpected
1070 (set_expr_symbol_offset_diff): Delete.
1072 2006-01-31 Paul Brook <paul@codesourcery.com>
1074 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
1076 2006-01-31 Paul Brook <paul@codesourcery.com>
1077 Richard Earnshaw <rearnsha@arm.com>
1079 * config/tc-arm.c: Use arm_feature_set.
1080 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
1081 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
1082 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
1085 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
1086 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
1087 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
1088 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
1090 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
1091 (arm_opts): Move old cpu/arch options from here...
1092 (arm_legacy_opts): ... to here.
1093 (md_parse_option): Search arm_legacy_opts.
1094 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
1095 (arm_float_abis, arm_eabis): Make const.
1097 2006-01-25 Bob Wilson <bob.wilson@acm.org>
1099 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
1101 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1103 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
1104 in load immediate intruction.
1106 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1108 * config/bfin-parse.y (value_match): Use correct conversion
1109 specifications in template string for __FILE__ and __LINE__.
1113 2006-01-18 Alexandre Oliva <aoliva@redhat.com>
1115 Introduce TLS descriptors for i386 and x86_64.
1116 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
1117 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
1118 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
1119 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
1120 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
1122 (build_modrm_byte): Set up zero modrm for TLS desc calls.
1123 (lex_got): Handle @tlsdesc and @tlscall.
1124 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
1126 2006-01-11 Nick Clifton <nickc@redhat.com>
1128 Fixes for building on 64-bit hosts:
1129 * config/tc-avr.c (mod_index): New union to allow conversion
1130 between pointers and integers.
1131 (md_begin, avr_ldi_expression): Use it.
1132 * config/tc-i370.c (md_assemble): Add cast for argument to print
1134 * config/tc-tic54x.c (subsym_substitute): Likewise.
1135 * config/tc-mn10200.c (md_assemble): Use a union to convert the
1136 opindex field of fr_cgen structure into a pointer so that it can
1137 be stored in a frag.
1138 * config/tc-mn10300.c (md_assemble): Likewise.
1139 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
1141 * config/tc-v850.c: Replace uses of (int) casts with correct
1144 2006-01-09 H.J. Lu <hongjiu.lu@intel.com>
1147 * symbols.c (snapshot_symbol): Don't change a defined symbol.
1149 2006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
1152 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
1153 a local-label reference.
1155 For older changes see ChangeLog-2005
1161 version-control: never