1 2006-08-16 Julian Brown <julian@codesourcery.com>
3 * config/tc-arm.c (md_assemble): Improve diagnostic when attempting
4 to use ARM instructions on non-ARM-supporting cores.
5 (autoselect_thumb_from_cpu_variant): New function. Switch on Thumb
6 mode automatically based on cpu variant.
7 (md_begin): Call above function.
9 2006-08-16 Julian Brown <julian@codesourcery.com>
11 * config/tc-arm.c (opcode_lookup): Allow Neon type suffixes to be
12 recognized in non-unified syntax mode.
14 2006-08-15 Thiemo Seufer <ths@mips.com>
15 Nigel Stephens <nigel@mips.com>
16 David Ung <davidu@mips.com>
18 * configure.tgt: Handle mips*-sde-elf*.
20 2006-08-12 Thiemo Seufer <ths@networkno.de>
22 * config/tc-mips.c (mips16_ip): Fix argument register handling
23 for restore instruction.
25 2006-08-08 Bob Wilson <bob.wilson@acm.org>
27 * dwarf2dbg.c (DWARF2_USE_FIXED_ADVANCE_PC): New.
29 (out_fixed_inc_line_addr): New.
30 (process_entries): Use out_fixed_inc_line_addr when
31 DWARF2_USE_FIXED_ADVANCE_PC is set.
32 * config/tc-xtensa.h (DWARF2_USE_FIXED_ADVANCE_PC): Define.
34 2006-08-08 DJ Delorie <dj@redhat.com>
36 * config/tc-sh.c (sh_frob_section): Canonicalize pointers to local
37 vs full symbols so that we never have more than one pointer value
38 for any given symbol in our symbol table.
40 2006-08-08 Sterling Augustine <sterling@tensilica.com>
42 * dwarf2dbg.c (out_debug_info): Add new parameter ranges_seg
43 and emit DW_AT_ranges when code in compilation unit is not
45 (out_debug_abbrev): Emit DW_AT_ranges abbreviation if code in
47 (dwarf2_finish): Create and pass ranges_seg to out_debug_info.
48 (out_debug_ranges): New function to emit .debug_ranges section
49 when code is not contiguous.
51 2006-08-08 Nick Clifton <nickc@redhat.com>
53 * config/tc-arm.c (WARN_DEPRECATED): Enable.
55 2006-08-05 Pedro Alves <pedro_alves@portugalmail.pt>
57 * config/tc-arm.c: Move "dwarf2dbg.h" inclusion out of OBJ_ELF
59 (pe_directive_secrel) [TE_PE]: New function.
60 (md_pseudo_table) [!OBJ_ELF]: Handle 2byte, 4byte, 8byte, file,
62 [TE_PE]: Handle secrel32.
63 (output_relax_insn): Remove OBJ_ELF around dwarf2_emit_insn
65 (output_inst): Remove OBJ_ELF around dwarf2_emit_insn call.
66 (arm_frob_label): Remove OBJ_ELF around dwarf2_emit_label call.
67 (md_section_align): Only round section sizes here for AOUT
69 (tc_arm_regname_to_dw2regnum): Move out for OBJ_ELF only block.
70 (tc_pe_dwarf2_emit_offset): New function.
71 (md_apply_fix) [TE_PE]: Handle BFD_RELOC_32_SECREL.
72 (cons_fix_new_arm): Handle O_secrel.
73 * config/tc-arm.h : Move DWARF2_LINE_MIN_INSN_LENGTH,
74 DWARF2_DEFAULT_RETURN_COLUMN and DWARF2_CIE_DATA_ALIGNMENT out
75 of OBJ_ELF only block.
76 [TE_PE]: Define O_secrel, TC_DWARF2_EMIT_OFFSET, and declare
77 tc_pe_dwarf2_emit_offset.
79 2006-08-04 Richard Sandiford <richard@codesourcery.com>
81 * config/tc-sh.c (apply_full_field_fix): New function.
82 (md_apply_fix): Use it instead of md_number_to_chars. Do not fill
83 in fx_addnumber for BFD_RELOC_32_PLT_PCREL.
84 (tc_gen_reloc): Use fx_addnumber rather than 0 as the default case.
85 * config/tc-sh.h (TARGET_FORMAT): Override for TE_VXWORKS.
87 2006-08-03 Nick Clifton <nickc@redhat.com>
90 * config.in: Regenerate.
92 2006-08-03 Joseph Myers <joseph@codesourcery.com>
94 * config/tc-arm.c (parse_operands): Handle invalid register name
97 2006-08-03 Joseph Myers <joseph@codesourcery.com>
99 * config/tc-arm.c (enum operand_parse_code): Add OP_RIWC_RIWG.
100 (parse_operands): Handle it.
101 (insns): Use it for tmcr and tmrc.
103 2006-08-02 Petr Salinger <Petr.Salinger@seznam.cz>
106 * config/tc-i386.c (md_parse_option): Treat any target starting
107 with elf64_x86_64 as a viable target for the -64 switch.
108 (i386_target_format): For 64-bit ELF flavoured output use
110 * config/tc-i386.h (ELF_TARGET_FORMAT64): Define.
112 2006-08-02 Nick Clifton <nickc@redhat.com>
115 * acinclude.m4 (BFD_BINARY_FOPEN): Import this function from
117 * configure.in: Run BFD_BINARY_FOPEN.
118 * configure: Regenerate.
119 * as.h: Look at USE_BINARY_FOPEN to decide which fopen-*.h header
122 2006-08-01 H.J. Lu <hongjiu.lu@intel.com>
124 * config/tc-i386.c (md_assemble): Don't update
127 2006-08-01 Thiemo Seufer <ths@mips.com>
129 * config/tc-mips.c (md_section_align): Check ELF-ness at runtime.
131 2006-08-01 Thiemo Seufer <ths@mips.com>
133 * config/tc-mips.c (macro_build_lui): Fix comment formatting.
134 (md_apply_fix): Likewise. Unify handling of BFD_RELOC_RVA,
135 BFD_RELOC_32 and BFD_RELOC_16.
136 (s_align, s_cpload, s_cplocal, s_cprestore, s_mips_stab,
137 md_convert_frag, md_obj_end): Fix comment formatting.
139 2006-07-31 Thiemo Seufer <ths@mips.com>
141 * config/tc-mips.c (md_apply_fix, tc_gen_reloc): Remove special
142 handling for BFD_RELOC_MIPS16_JMP.
144 2006-07-24 Andreas Schwab <schwab@suse.de>
147 * read.c (read_a_source_file): Ignore unknown text after line
148 comment character. Fix misleading comment.
150 2006-07-24 Ralk Wildenhues <Ralf.Wildenhues@gmx.de>
152 * doc/all.texi, doc/as.texinfo, doc/c-arc.texi, doc/c-arm.texi,
153 doc/c-avr.texi, doc/c-bfin.texi, doc/c-i386.texi,
154 doc/c-i960.texi, doc/c-m32r.texi, doc/c-m68k.texi,
155 doc/c-mmix.texi, doc/c-pdp11.texi, doc/c-ppc.texi,
156 doc/c-tic54x.texi, doc/c-v850.texi, doc/c-xtensa.texi,
157 doc/c-z80.texi, doc/internals.texi: Fix some typos.
159 2006-07-21 Nick Clifton <nickc@redhat.com>
161 * config/tc-sh.c (md_longopts): Add -EL and -EB for use by the
164 2006-07-20 Thiemo Seufer <ths@mips.com>
165 Nigel Stephens <nigel@mips.com>
167 * config/tc-mips.c (md_parse_option): Don't infer optimisation
168 options from debug options.
170 2006-07-20 Thiemo Seufer <ths@mips.com>
172 * config/tc-mips.c (mips_fix_adjustable): Handle BFD_RELOC_MIPS16_JMP.
173 (tc_gen_reloc): Handle mips16 jumps to section symbol offsets.
175 2006-07-19 Paul Brook <paul@codesourcery.com>
177 * config/tc-arm.c (insns): Fix rbit Arm opcode.
179 2006-07-18 Paul Brook <paul@codesourcery.com>
181 * tc-arm.c (do_t_add_sub): Use addw/subw when source is PC.
182 (md_convert_frag): Use correct reloc for add_pc. Use
183 BFD_RELOC_ARM_T32_ADD_IMM for normal add/sum.
184 (md_apply_fix): Handle BFD_RELOC_ARM_T32_ADD_IMM.
185 (arm_force_relocation): Handle BFD_RELOC_ARM_T32_ADD_IMM.
187 2006-07-17 Mat Hostetter <mat@lcs.mit.edu>
189 * symbols.c (report_op_error): Fix pasto. Don't use as_bad_where
190 when file and line unknown.
192 2006-07-17 Thiemo Seufer <ths@mips.com>
194 * read.c (s_struct): Use IS_ELF.
195 * config/tc-mips.c (md_begin, mips16_mark_labels, mips_ip,
196 md_parse_option, s_change_sec, pic_need_relax, mips_fix_adjustable,
197 tc_gen_reloc, mips_frob_file_after_relocs, s_mips_end, s_mips_frame,
198 s_mips_mask): Likewise.
200 2006-07-16 Thiemo Seufer <ths@mips.com>
201 David Ung <davidu@mips.com>
203 * read.c (s_struct): Handle ELF section changing.
204 * config/tc-mips.c (s_align): Leave enabling auto-align to the
206 (s_change_sec): Try section changing only if we output ELF.
208 2006-07-15 H.J. Lu <hongjiu.lu@intel.com>
210 * config/tc-i386.c (cpu_arch): Remove Cpu086, CpuAthlon and
212 (smallest_imm_type): Remove Cpu086.
213 (i386_target_format): Likewise.
215 * config/tc-i386.h: Remove Cpu086, CpuAthlon and CpuAmdFam10.
218 2006-07-13 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
219 Michael Meissner <michael.meissner@amd.com>
221 * config/tc-i386.h (PROCESSOR_AMDFAM10): New processor_type.
222 (CpuSSE4a, CpuABM, CpuAmdFam10): New Cpu directives.
223 * config/tc-i386.c (cpu_arch): Add support for AmdFam10
225 (i386_align_code): Ditto.
226 (md_assemble_code): Add support for insertq/extrq instructions,
227 swapping as needed for intel syntax.
228 (swap_imm_operands): New function to swap immediate operands.
229 (swap_operands): Deal with 4 operand instructions.
230 (build_modrm_byte): Add support for insertq instruction.
232 2006-07-13 H.J. Lu <hongjiu.lu@intel.com>
234 * config/tc-i386.h (Size64): Fix a typo in comment.
236 2006-07-12 Nick Clifton <nickc@redhat.com>
238 * config/tc-sh.c (md_apply_fix): Do not allow the generic code in
239 fixup_segment() to repeat a range check on a value that has
240 already been checked here.
242 2006-07-07 James E Wilson <wilson@specifix.com>
244 * config/tc-mips.c (mips_cpu_info_table): Add sb1a.
246 2006-07-06 Mohammed Adnène Trojette <adn@diwi.org>
247 Nick Clifton <nickc@redhat.com>
250 * doc/as.texi: Fix spelling typo: branchs => branches.
251 * doc/c-m68hc11.texi: Likewise.
252 * config/tc-m68hc11.c: Likewise.
253 Support old spelling of command line switch for backwards
256 2006-07-04 Thiemo Seufer <ths@mips.com>
257 David Ung <davidu@mips.com>
259 * config/tc-mips.c (s_is_linkonce): New function.
260 (mips16_mark_labels): Don't adjust mips16 symbol addresses for
261 weak, external, and linkonce symbols.
262 (pic_need_relax): Use s_is_linkonce.
264 2006-06-24 H.J. Lu <hongjiu.lu@intel.com>
266 * doc/as.texinfo (Org): Remove space.
267 (P2align): Add "@var{abs-expr},".
269 2006-06-23 H.J. Lu <hongjiu.lu@intel.com>
271 * config/tc-i386.c (cpu_arch_tune_set): New.
272 (cpu_arch_isa): Likewise.
273 (i386_align_code): Use xchg %ax,%ax for 2 byte nop. Optimize
274 nops with short or long nop sequences based on -march=/.arch
276 (set_cpu_arch): Set cpu_arch_isa. If cpu_arch_tune_set is 0,
277 set cpu_arch_tune and cpu_arch_tune_flags.
278 (md_parse_option): For -march=, set cpu_arch_isa and set
279 cpu_arch_tune and cpu_arch_tune_flags if cpu_arch_tune_set is
280 0. Set cpu_arch_tune_set to 1 for -mtune=.
281 (i386_target_format): Don't set cpu_arch_tune.
283 2006-06-23 Nigel Stephens <nigel@mips.com>
285 * config/tc-mips.c (nopic_need_relax): Handle -fdata-sections
286 generated .sbss.* and .gnu.linkonce.sb.*.
288 2006-06-23 Thiemo Seufer <ths@mips.com>
289 David Ung <davidu@mips.com>
291 * config/tc-mips.h (TC_SEGMENT_INFO_TYPE): Declare per-segment
293 * config/tc-mips.c (label_list): Define per-segment label_list.
294 (mips_clear_insn_labels, mips_move_labels, mips16_mark_labels,
295 append_insn, s_align, s_cons, s_float_cons, s_gpword, s_gpdword,
296 mips_from_file_after_relocs, mips_define_label): Use per-segment
299 2006-06-22 Thiemo Seufer <ths@mips.com>
301 * config/tc-mips.c (ISA_SUPPORTS_MIPS16E): New macro.
302 (append_insn): Use it.
303 (md_apply_fix): Whitespace formatting.
304 (md_begin, append_insn, macro, macro2, mips16_immed, mips_align,
305 mips16_extended_frag): Remove register specifier.
306 (md_convert_frag): Likewise. Use TRUE ans FALSE instead of numeric
309 2006-06-21 Mark Shinwell <shinwell@codesourcery.com>
311 * config/tc-arm.c (s_arm_unwind_save_vfp_armv6): New. Parse
312 a directive saving VFP registers for ARMv6 or later.
313 (s_arm_unwind_save): Add parameter arch_v6 and call
314 s_arm_unwind_save_vfp or s_arm_unwind_save_vfp_armv6 as
316 (md_pseudo_table): Add entry for new "vsave" directive.
317 * doc/c-arm.texi: Correct error in example for "save"
318 directive (fstmdf -> fstmdx). Also document "vsave" directive.
320 2006-06-18 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
321 Anatoly Sokolov <aesok@post.ru>
323 * config/tc-avr.c (mcu_types): Add support for atmega165p, atmega169p
324 and atmega644p devices. Rename atmega164/atmega324 devices to
325 atmega164p/atmega324p.
326 * doc/c-avr.texi: Document new mcu and arch options.
328 2006-06-17 Nick Clifton <nickc@redhat.com>
330 * config/tc-arm.c (enum parse_operand_result): Move outside of
331 #ifdef OBJ_ELF so that non-ELF targeted ARM ports can build.
333 2006-06-16 H.J. Lu <hongjiu.lu@intel.com>
335 * config/tc-i386.h (processor_type): New.
336 (arch_entry): Add type.
338 * config/tc-i386.c (cpu_arch_tune): New.
339 (cpu_arch_tune_flags): Likewise.
340 (cpu_arch_isa_flags): Likewise.
342 (set_cpu_arch): Also update cpu_arch_isa_flags.
343 (md_assemble): Update cpu_arch_isa_flags.
345 (OPTION_MTUNE): Likewise.
346 (md_longopts): Add -march= and -mtune=.
347 (md_parse_option): Support -march= and -mtune=.
348 (md_show_usage): Add -march=CPU/-mtune=CPU.
349 (i386_target_format): Also update cpu_arch_isa_flags,
350 cpu_arch_tune and cpu_arch_tune_flags.
352 * doc/as.texinfo: Add -march=CPU/-mtune=CPU.
354 * doc/c-i386.texi: Document -march=CPU/-mtune=CPU.
356 2006-06-15 Mark Shinwell <shinwell@codesourcery.com>
358 * config/tc-arm.c (enum parse_operand_result): New.
359 (struct group_reloc_table_entry): New.
360 (enum group_reloc_type): New.
361 (group_reloc_table): New array.
362 (find_group_reloc_table_entry): New function.
363 (parse_shifter_operand_group_reloc): New function.
364 (parse_address_main): New function, incorporating code
365 from the old parse_address function. To be used via...
366 (parse_address): wrapper for parse_address_main; and
367 (parse_address_group_reloc): new function, likewise.
368 (enum operand_parse_code): New codes OP_SHG, OP_ADDRGLDR,
369 OP_ADDRGLDRS, OP_ADDRGLDC.
370 (parse_operands): Support for these new operand codes.
371 New macro po_misc_or_fail_no_backtrack.
372 (encode_arm_cp_address): Preserve group relocations.
373 (insns): Modify to use the above operand codes where group
374 relocations are permitted.
375 (md_apply_fix): Handle the group relocations
376 ALU_PC_G0_NC through LDC_SB_G2.
377 (tc_gen_reloc): Likewise.
378 (arm_force_relocation): Leave group relocations for the linker.
379 (arm_fix_adjustable): Likewise.
381 2006-06-15 Julian Brown <julian@codesourcery.com>
383 * config/tc-arm.c (do_vfp_nsyn_ldr_str): Remove, fold into...
384 (do_neon_ldr_str): Always defer to VFP encoding routines, which handle
387 2006-06-12 H.J. Lu <hongjiu.lu@intel.com>
389 * config/tc-i386.c (process_suffix): Don't add rex64 for
392 2006-06-09 Thiemo Seufer <ths@mips.com>
394 * config/tc-mips.c (mips_ip): Maintain argument count.
396 2006-06-09 Alan Modra <amodra@bigpond.net.au>
398 * config/tc-iq2000.c: Include sb.h.
400 2006-06-08 Nigel Stephens <nigel@mips.com>
402 * config/tc-mips.c (mips_pseudo_table): Add "origin" and "repeat"
403 aliases for better compatibility with SGI tools.
405 2006-06-08 Alan Modra <amodra@bigpond.net.au>
407 * configure.in (BFDLIB, BFDVER_H, ALL_OBJ_DEPS): Delete.
408 * Makefile.am (GASLIBS): Expand @BFDLIB@.
410 (OBJS): Expand @ALL_OBJ_DEPS@. Depend on all fopen-*.h variants.
411 (obj-aout.o): Depend on $(DEP_@target_get_type@_aout)
412 (obj-coff.o, obj-ecoff.o, obj-elf.o): Similarly.
414 * dep-in.sed: Don't substitute bfdver.h. Do remove symcat.h.
415 * Makefile.in: Regenerate.
416 * doc/Makefile.in: Regenerate.
417 * configure: Regenerate.
419 2006-06-07 Joseph S. Myers <joseph@codesourcery.com>
421 * po/Make-in (pdf, ps): New dummy targets.
423 2006-06-07 Julian Brown <julian@codesourcery.com>
425 * config/tc-arm.c (stdarg.h): include.
426 (arm_it): Add uncond_value field. Add isvec and issingle to operand
428 (arm_reg_type): Add REG_TYPE_VFSD (single or double VFP reg) and
429 REG_TYPE_NSDQ (single, double or quad vector reg).
430 (reg_expected_msgs): Update.
431 (BAD_FPU): Add macro for unsupported FPU instruction error.
432 (parse_neon_type): Support 'd' as an alias for .f64.
433 (parse_typed_reg_or_scalar): Support REG_TYPE_VFSD, REG_TYPE_NSDQ
435 (parse_vfp_reg_list): Don't update first arg on error.
436 (parse_neon_mov): Support extra syntax for VFP moves.
437 (operand_parse_code): Add OP_RVSD, OP_RNSDQ, OP_VRSDLST, OP_RVSD_IO,
438 OP_RNSDQ_RNSC, OP_RVC_PSR, OP_APSR_RR, OP_oRNSDQ.
439 (parse_operands): Support isvec, issingle operands fields, new parse
441 (do_vfp_nsyn_mrs, do_vfp_nsyn_msr): New functions. Support VFP mrs,
443 (do_mrs, do_msr, do_t_mrs, do_t_msr): Add support for above.
444 (NEON_ENC_TAB): Add vnmul, vnmla, vnmls, vcmp, vcmpz, vcmpe, vcmpez.
445 (NEON_ENC_SINGLE, NEON_ENC_DOUBLE): Define macros.
446 (NEON_SHAPE_DEF): New macro. Define table of possible instruction
448 (neon_shape): Redefine in terms of above.
449 (neon_shape_class): New enumeration, table of shape classes.
450 (neon_shape_el): New enumeration. One element of a shape.
451 (neon_shape_el_size): Register widths of above, where appropriate.
452 (neon_shape_info): New struct. Info for shape table.
453 (neon_shape_tab): New array.
454 (neon_type_mask): Add N_F64, N_VFP. Update N_MAX_NONSPECIAL.
455 (neon_check_shape): Rewrite as...
456 (neon_select_shape): New function to classify instruction shapes,
457 driven by new table neon_shape_tab array.
458 (neon_quad): New function. Return 1 if shape should set Q flag in
459 instructions (or equivalent), 0 otherwise.
460 (type_chk_of_el_type): Support F64.
461 (el_type_of_type_chk): Likewise.
462 (neon_check_type): Add support for VFP type checking (VFP data
463 elements fill their containing registers).
464 (do_vfp_cond_or_thumb): Fill in condition field in ARM mode, or 0xE
465 in thumb mode for VFP instructions.
466 (do_vfp_nsyn_opcode): New function. Look up the opcode in argument,
467 and encode the current instruction as if it were that opcode.
468 (try_vfp_nsyn): New. If this looks like a VFP instruction with ARGS
469 arguments, call function in PFN.
470 (do_vfp_nsyn_add_sub, do_vfp_nsyn_mla_mls, do_vfp_nsyn_mul)
471 (do_vfp_nsyn_abs_neg, do_vfp_nsyn_ldm_stm, do_vfp_nsyn_ldr_str)
472 (do_vfp_nsyn_sqrt, do_vfp_nsyn_div, do_vfp_nsyn_nmul)
473 (do_vfp_nsyn_cmp, nsyn_insert_sp, do_vfp_nsyn_push)
474 (do_vfp_nsyn_pop, do_vfp_nsyn_cvt, do_vfp_nsyn_cvtz): New functions.
475 Redirect Neon-syntax VFP instructions to VFP instruction handlers.
476 (do_neon_dyadic_i_su, do_neon_dyadic_i64_su, do_neon_shl_imm)
477 (do_neon_qshl_imm, do_neon_logic, do_neon_bitfield)
478 (neon_dyadic_misc, neon_compare, do_neon_tst, do_neon_qdmulh)
479 (do_neon_fcmp_absolute, do_neon_step, do_neon_sli, do_neon_sri)
480 (do_neon_qshlu_imm, neon_move_immediate, do_neon_mvn, do_neon_ext)
481 (do_neon_rev, do_neon_dup, do_neon_rshift_round_imm, do_neon_trn)
482 (do_neon_zip_uzp, do_neon_sat_abs_neg, do_neon_pair_long)
483 (do_neon_recip_est, do_neon_cls, do_neon_clz, do_neon_cnt)
484 (do_neon_swp): Use neon_select_shape not neon_check_shape. Use
486 (vfp_or_neon_is_neon): New function. Call if a mnemonic shared
487 between VFP and Neon turns out to belong to Neon. Perform
488 architecture check and fill in condition field if appropriate.
489 (do_neon_addsub_if_i, do_neon_mac_maybe_scalar, do_neon_abs_neg)
490 (do_neon_cvt): Add support for VFP variants of instructions.
491 (neon_cvt_flavour): Extend to cover VFP conversions.
492 (do_neon_mov): Rewrite to use neon_select_shape. Add support for VFP
494 (do_neon_ldr_str): Handle single-precision VFP load/store.
495 (do_neon_ld_st_interleave, do_neon_ld_st_lane, do_neon_ld_dup): Use
496 NS_NULL not NS_IGNORE.
497 (opcode_tag): Add OT_csuffixF for operands which either take a
498 conditional suffix, or have 0xF in the condition field.
499 (md_assemble): Add support for OT_csuffixF.
500 (NCE): Replace macro with...
501 (NCE_tag, NCE, NCEF): New macros.
502 (nCE): Replace macro with...
503 (nCE_tag, nCE, nCEF): New macros.
504 (insns): Add support for VFP insns or VFP versions of insns msr,
505 mrs, vsqrt, vdiv, vnmul, vnmla, vnmls, vcmp, vcmpe, vpush, vpop,
506 vcvtz, vmul, vmla, vmls, vadd, vsub, vabs, vneg, vldm, vldmia,
507 vldbdb, vstm, vstmia, vstmdb, vldr, vstr, vcvt, vmov. Group shared
508 VFP/Neon insns together.
510 2006-06-07 Alan Modra <amodra@bigpond.net.au>
511 Ladislav Michl <ladis@linux-mips.org>
513 * app.c: Don't include headers already included by as.h.
515 * atof-generic.c: Likewise.
517 * dwarf2dbg.c: Likewise.
519 * input-file.c: Likewise.
520 * input-scrub.c: Likewise.
522 * output-file.c: Likewise.
525 * config/bfin-lex.l: Likewise.
526 * config/obj-coff.h: Likewise.
527 * config/obj-elf.h: Likewise.
528 * config/obj-som.h: Likewise.
529 * config/tc-arc.c: Likewise.
530 * config/tc-arm.c: Likewise.
531 * config/tc-avr.c: Likewise.
532 * config/tc-bfin.c: Likewise.
533 * config/tc-cris.c: Likewise.
534 * config/tc-d10v.c: Likewise.
535 * config/tc-d30v.c: Likewise.
536 * config/tc-dlx.h: Likewise.
537 * config/tc-fr30.c: Likewise.
538 * config/tc-frv.c: Likewise.
539 * config/tc-h8300.c: Likewise.
540 * config/tc-hppa.c: Likewise.
541 * config/tc-i370.c: Likewise.
542 * config/tc-i860.c: Likewise.
543 * config/tc-i960.c: Likewise.
544 * config/tc-ip2k.c: Likewise.
545 * config/tc-iq2000.c: Likewise.
546 * config/tc-m32c.c: Likewise.
547 * config/tc-m32r.c: Likewise.
548 * config/tc-maxq.c: Likewise.
549 * config/tc-mcore.c: Likewise.
550 * config/tc-mips.c: Likewise.
551 * config/tc-mmix.c: Likewise.
552 * config/tc-mn10200.c: Likewise.
553 * config/tc-mn10300.c: Likewise.
554 * config/tc-msp430.c: Likewise.
555 * config/tc-mt.c: Likewise.
556 * config/tc-ns32k.c: Likewise.
557 * config/tc-openrisc.c: Likewise.
558 * config/tc-ppc.c: Likewise.
559 * config/tc-s390.c: Likewise.
560 * config/tc-sh.c: Likewise.
561 * config/tc-sh64.c: Likewise.
562 * config/tc-sparc.c: Likewise.
563 * config/tc-tic30.c: Likewise.
564 * config/tc-tic4x.c: Likewise.
565 * config/tc-tic54x.c: Likewise.
566 * config/tc-v850.c: Likewise.
567 * config/tc-vax.c: Likewise.
568 * config/tc-xc16x.c: Likewise.
569 * config/tc-xstormy16.c: Likewise.
570 * config/tc-xtensa.c: Likewise.
571 * config/tc-z80.c: Likewise.
572 * config/tc-z8k.c: Likewise.
573 * macro.h: Don't include sb.h or ansidecl.h.
574 * sb.h: Don't include stdio.h or ansidecl.h.
575 * cond.c: Include sb.h.
576 * itbl-lex.l: Include as.h instead of other system headers.
577 * itbl-parse.y: Likewise.
578 * itbl-ops.c: Similarly.
579 * itbl-ops.h: Don't include as.h or ansidecl.h.
580 * config/bfin-defs.h: Don't include bfd.h or as.h.
581 * config/bfin-parse.y: Include as.h instead of other system headers.
583 2006-06-06 Ben Elliston <bje@au.ibm.com>
584 Anton Blanchard <anton@samba.org>
586 * config/tc-ppc.c (parse_cpu): Handle "-mpower6".
587 (md_show_usage): Document it.
588 (ppc_setup_opcodes): Test power6 opcode flag bits.
589 * doc/c-ppc.texi (PowerPC-Opts): Document "-mpower6".
591 2006-06-06 Thiemo Seufer <ths@mips.com>
592 Chao-ying Fu <fu@mips.com>
594 * config/tc-mips.c (ISA_SUPPORTS_DSP64): New macro.
595 (CPU_HAS_MIPS3D, CPU_HAS_MDMX, CPU_HAS_DSP, CPU_HAS_MT): Delete.
596 (macro_build): Update comment.
597 (mips_ip): Allow DSP64 instructions for MIPS64R2.
598 (mips_after_parse_args): Remove uses of CPU_HAS_MIPS3D and
600 (mips_cpu_info): Fix formatting. Add MIPS_CPU_ASE_MIPS3D and
601 MIPS_CPU_ASE_MDMX flags for sb1.
603 2006-06-05 Thiemo Seufer <ths@mips.com>
605 * config/tc-mips.c (macro_build): Use INSERT_OPERAND wherew
607 (mips16_macro_build): Use MIPS16_INSERT_OPERAND where appropriate.
608 (mips_ip): Make overflowed/underflowed constant arguments in DSP
609 and MT instructions a fatal error. Use INSERT_OPERAND where
610 appropriate. Improve warnings for break and wait code overflows.
611 Use symbolic constant of OP_MASK_COPZ.
612 (mips16_ip): Use MIPS16_INSERT_OPERAND where appropriate.
614 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
616 * po/Make-in (top_builddir): Define.
618 2006-06-02 Joseph S. Myers <joseph@codesourcery.com>
620 * doc/Makefile.am (TEXI2DVI): Define.
621 * doc/Makefile.in: Regenerate.
622 * doc/c-arc.texi: Fix typo.
624 2006-06-01 Alan Modra <amodra@bigpond.net.au>
626 * config/obj-ieee.c: Delete.
627 * config/obj-ieee.h: Delete.
628 * Makefile.am (OBJ_FORMATS): Remove ieee.
629 (OBJ_FORMAT_CFILES, OBJ_FORMAT_HFILES): Similarly.
630 (obj-ieee.o): Remove rule.
631 * Makefile.in: Regenerate.
632 * configure.in (atof): Remove tahoe.
633 (OBJ_MAYBE_IEEE): Don't define.
634 * configure: Regenerate.
635 * config.in: Regenerate.
636 * doc/Makefile.in: Regenerate.
637 * po/POTFILES.in: Regenerate.
639 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
641 * Makefile.am: Replace INTLLIBS and INTLDEPS with LIBINTL
642 and LIBINTL_DEP everywhere.
644 (INCLUDES, DEP_INCLUDES): Use @INCINTL@.
645 * acinclude.m4: Include new gettext macros.
646 * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
647 Remove local code for po/Makefile.
648 * Makefile.in, configure, doc/Makefile.in: Regenerated.
650 2006-05-30 Nick Clifton <nickc@redhat.com>
652 * po/es.po: Updated Spanish translation.
654 2006-05-06 Denis Chertykov <denisc@overta.ru>
656 * doc/c-avr.texi: New file.
657 * doc/Makefile.am (CPU_DOCS): Add c-avr.texi
658 * doc/all.texi: Set AVR
659 * doc/as.texinfo: Include c-avr.texi
661 2006-05-28 Jie Zhang <jie.zhang@analog.com>
663 * config/bfin-parse.y (check_macfunc): Loose the condition of
664 calling check_multiply_halfregs ().
666 2006-05-25 Jie Zhang <jie.zhang@analog.com>
668 * config/bfin-parse.y (asm_1): Better check and deal with
669 vector and scalar Multiply 16-Bit Operands instructions.
671 2006-05-24 Nick Clifton <nickc@redhat.com>
673 * config/tc-hppa.c: Convert to ISO C90 format.
674 * config/tc-hppa.h: Likewise.
676 2006-05-24 Carlos O'Donell <carlos@systemhalted.org>
677 Randolph Chung <randolph@tausq.org>
679 * config/tc-hppa.c (is_tls_gdidx, is_tls_ldidx, is_tls_dtpoff,
680 is_tls_ieoff, is_tls_leoff): Define.
681 (fix_new_hppa): Handle TLS.
682 (cons_fix_new_hppa): Likewise.
684 (md_apply_fix): Handle TLS relocs.
685 * config/tc-hppa.h (hppa_fix_adjustable): Handle TLS.
687 2006-05-24 Bjoern Haase <bjoern.m.haase@web.de>
689 * config/tc-avr.c: Add new cpu targets avr6, avr2560 and avr2561.
691 2006-05-23 Thiemo Seufer <ths@mips.com>
692 David Ung <davidu@mips.com>
693 Nigel Stephens <nigel@mips.com>
696 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS): Rename.
697 (ISA_SUPPORTS_DSP_ASE, ISA_SUPPORTS_MT_ASE, ISA_HAS_64BIT_FPRS,
698 ISA_HAS_MXHC1): New macros.
699 (HAVE_32BIT_FPRS): Use ISA_HAS_64BIT_FPRS instead of
700 ISA_HAS_64BIT_REGS. Formatting fixes. Improved comments.
701 (mips_cpu_info): Change to use combined ASE/IS_ISA flag.
702 (MIPS_CPU_IS_ISA, MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP,
703 MIPS_CPU_ASE_MT, MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX): New defines.
704 (mips_after_parse_args): Change default handling of float register
705 size to account for 32bit code with 64bit FP. Better sanity checking
706 of ISA/ASE/ABI option combinations.
707 (s_mipsset): Support switching of GPR and FPR sizes via
708 .set {g,f}p={32,64,default}. Better sanity checking for .set ASE
710 (mips_elf_final_processing): We should record the use of 64bit FP
711 registers in 32bit code but we don't, because ELF header flags are
713 (mips_cpu_info_table): Add ASE flags for CPUs with mandatory ASE
714 extensions. Add 4ksc, 4kec, 4kem, 4kep, 4ksd, m4kp, 24kec, 24kef,
715 24kex, 34kc, 34kf, 34kx, 25kf CPU definitions.
716 (mips_cpu_info_from_isa): Use MIPS_CPU_IS_ISA.
717 * doc/c-mips.texi: Document .set {g,f}p={32,64,default}. Document
718 missing -march options. Document .set arch=CPU. Move .set smartmips
719 to ASE page. Use @code for .set FOO examples.
721 2006-05-23 Jie Zhang <jie.zhang@analog.com>
723 * config/tc-bfin.c (bfin_start_line_hook): Bump line counters
726 2006-05-23 Jie Zhang <jie.zhang@analog.com>
728 * config/bfin-defs.h (bfin_equals): Remove declaration.
729 * config/bfin-parse.y (asm_1): Remove "expr ASSIGN expr".
730 * config/tc-bfin.c (bfin_name_is_register): Remove.
731 (bfin_equals): Remove.
732 * config/tc-bfin.h (TC_EQUAL_IN_INSN): Redefine as 1.
733 (bfin_name_is_register): Remove declaration.
735 2006-05-19 Thiemo Seufer <ths@mips.com>
736 Nigel Stephens <nigel@mips.com>
738 * config/tc-mipc.c (ISA_HAS_ODD_SINGLE_FPR): New define.
739 (mips_oddfpreg_ok): New function.
742 2006-05-19 Thiemo Seufer <ths@mips.com>
743 David Ung <davidu@mips.com>
745 * config/tc-mips.h (tc_mips_regname_to_dw2regnum): Declare.
746 * config/tc-mipc.c (ABI_NEEDS_64BIT_REGS, ISA_HAS_64BIT_REGS,
747 ISA_HAS_DROR, ISA_HAS_ROR): Reformat.
748 (regname, RTYPE_MASK, RTYPE_NUM, RTYPE_FPU, RTYPE_FCC, RTYPE_VEC,
749 RTYPE_GP, RTYPE_CP0, RTYPE_PC, RTYPE_ACC, RTYPE_CCC, RNUM_MASK,
750 RWARN, GENERIC_REGISTER_NUMBERS, FPU_REGISTER_NAMES,
751 FPU_CONDITION_CODE_NAMES, COPROC_CONDITION_CODE_NAMES,
752 N32N64_SYMBOLIC_REGISTER_NAMES, O32_SYMBOLIC_REGISTER_NAMES,
753 SYMBOLIC_REGISTER_NAMES, MIPS16_SPECIAL_REGISTER_NAMES,
754 MDMX_VECTOR_REGISTER_NAMES, MIPS_DSP_ACCUMULATOR_NAMES, reg_names,
755 reg_names_o32, reg_names_n32n64): Define register classes.
756 (reg_lookup): New function, use register classes.
757 (md_begin): Reserve register names in the symbol table. Simplify
759 (mips_ip): Fix comment formatting. Handle symbolic COP0 registers.
761 (mips16_ip): Use reg_lookup.
762 (tc_get_register): Likewise.
763 (tc_mips_regname_to_dw2regnum): New function.
765 2006-05-19 Thiemo Seufer <ths@mips.com>
767 * config/tc-arm.c, config/tc-arm.h (tc_arm_regname_to_dw2regnum):
768 Un-constify string argument.
769 * config/tc-i386.c, config/tc-i386.h (tc_x86_regname_to_dw2regnum):
771 * config/tc-m68k.c, config/tc-m68k.h (tc_m68k_regname_to_dw2regnum):
773 * config/tc-ppc.c, config/tc-ppc.h (tc_ppc_regname_to_dw2regnum):
775 * config/tc-s390.c, config/tc-s390.h (tc_s390_regname_to_dw2regnum):
777 * config/tc-sh.c, config/tc-sh.h (sh_regname_to_dw2regnum):
779 * config/tc-sparc.c, config/tc-sparc.h (sparc_regname_to_dw2regnum):
782 2006-05-19 Nathan Sidwell <nathan@codesourcery.com>
784 * gas/config/tc-m68k.c (m68k_init_arch): Move checking of
785 cfloat/m68881 to correct architecture before using it.
787 2006-05-16 Bjoern Haase <bjoern.m.haase@web.de>
789 * config/tc-avr.h (TC_VALIDATE_FIX): Allow fixups for immediate
792 2006-05-15 Paul Brook <paul@codesourcery.com>
794 * config/tc-arm.c (arm_adjust_symtab): Use
795 bfd_is_arm_special_symbol_name.
797 2006-05-15 Bob Wilson <bob.wilson@acm.org>
799 * config/tc-xtensa.c (is_direct_call_opcode, is_branch_jmp_to_next,
800 xg_assemble_vliw_tokens, xtensa_mark_narrow_branches,
801 xtensa_fix_short_loop_frags, is_local_forward_loop, relax_frag_immed):
802 Handle errors from calls to xtensa_opcode_is_* functions.
804 2006-05-14 Thiemo Seufer <ths@mips.com>
806 * config/tc-mips.c (macro_build): Test for currently active
808 (mips16_ip): Reject invalid opcodes.
810 2006-05-11 Carlos O'Donell <carlos@codesourcery.com>
812 * doc/as.texinfo: Rename "Index" to "AS Index",
813 and "ABORT" to "ABORT (COFF)".
815 2006-05-11 Paul Brook <paul@codesourcery.com>
817 * config/tc-arm.c (parse_half): New function.
818 (operand_parse_code): Remove OP_Iffff. Add OP_HALF.
819 (parse_operands): Ditto.
820 (do_mov16): Reject invalid relocations.
821 (do_t_mov16): Ditto. Use Thumb reloc numbers.
822 (insns): Replace Iffff with HALF.
823 (md_apply_fix): Add MOVW and MOVT relocs.
824 (tc_gen_reloc): Ditto.
825 * doc/c-arm.texi: Document relocation operators
827 2006-05-11 Paul Brook <paul@codesourcery.com>
829 * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
831 2006-05-11 Thiemo Seufer <ths@mips.com>
833 * config/tc-mips.c (append_insn): Don't check the range of j or
836 2006-05-11 Pedro Alves <pedro_alves@portugalmail.pt>
838 * config/tc-arm.c (md_pcrel_from_section): Force a bias for
839 relocs against external symbols for WinCE targets.
840 (md_apply_fix): Likewise.
842 2006-05-09 David Ung <davidu@mips.com>
844 * config/tc-mips.c (append_insn): Only warn about an out-of-range
847 2006-05-09 Nick Clifton <nickc@redhat.com>
849 * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups
850 against symbols which are not going to be placed into the symbol
853 2006-05-09 Ben Elliston <bje@au.ibm.com>
855 * expr.c (operand): Remove `if (0 && ..)' statement and
856 subsequently unused target_op label. Collapse `if (1 || ..)'
858 * app.c (do_scrub_chars): Remove unused case 0, as it is handled
859 separately above the switch.
861 2006-05-08 Nick Clifton <nickc@redhat.com>
864 * config/tc-msp430.c (line_separator_character): Define as |.
866 2006-05-08 Thiemo Seufer <ths@mips.com>
867 Nigel Stephens <nigel@mips.com>
868 David Ung <davidu@mips.com>
870 * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
871 (mips_opts): Likewise.
872 (file_ase_smartmips): New variable.
873 (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
874 (macro_build): Handle SmartMIPS instructions.
876 (md_longopts): Add argument handling for smartmips.
877 (md_parse_options, mips_after_parse_args): Likewise.
878 (s_mipsset): Add .set smartmips support.
879 (md_show_usage): Document -msmartmips/-mno-smartmips.
880 * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
882 * doc/c-mips.texi: Likewise.
884 2006-05-08 Alan Modra <amodra@bigpond.net.au>
886 * write.c (relax_segment): Add pass count arg. Don't error on
887 negative org/space on first two passes.
888 (relax_seg_info): New struct.
889 (relax_seg, write_object_file): Adjust.
890 * write.h (relax_segment): Update prototype.
892 2006-05-05 Julian Brown <julian@codesourcery.com>
894 * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
896 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
897 architecture version checks.
898 (insns): Allow overlapping instructions to be used in VFP mode.
900 2006-05-05 H.J. Lu <hongjiu.lu@intel.com>
903 * config/obj-elf.c (obj_elf_change_section): Allow user
904 specified SHF_ALPHA_GPREL.
906 2006-05-05 Bjoern Haase <bjoern.m.haase@web.de>
908 * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups
909 for PMEM related expressions.
911 2006-05-05 Nick Clifton <nickc@redhat.com>
914 * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the
915 insertion of a directory separator character into a string at a
916 given offset. Uses heuristics to decide when to use a backslash
917 character rather than a forward-slash character.
918 (dwarf2_directive_loc): Use the macro.
919 (out_debug_info): Likewise.
921 2006-05-05 Thiemo Seufer <ths@mips.com>
922 David Ung <davidu@mips.com>
924 * config/tc-mips.c (macro_build): Add case 'k' to handle cache
926 (macro): Add new case M_CACHE_AB.
928 2006-05-04 Kazu Hirata <kazu@codesourcery.com>
930 * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
931 (opcode_lookup): Issue a warning for opcode with
932 OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated
933 identical to OT_cinfix3.
934 (TxC3w, TC3w, tC3w): New.
935 (insns): Use tC3w and TC3w for comparison instructions with
938 2006-05-04 Alan Modra <amodra@bigpond.net.au>
940 * subsegs.h (struct frchain): Delete frch_seg.
941 (frchain_root): Delete.
942 (seg_info): Define as macro.
943 * subsegs.c (frchain_root): Delete.
944 (abs_seg_info, und_seg_info, absolute_frchain): Delete.
945 (subsegs_begin, subseg_change): Adjust for above.
946 (subseg_set_rest): Likewise. Add new frchain structs to seginfo
947 rather than to one big list.
948 (subseg_get): Don't special case abs, und sections.
949 (subseg_new, subseg_force_new): Don't set frchainP here.
951 (subsegs_print_statistics): Adjust frag chain control list traversal.
952 * debug.c (dmp_frags): Likewise.
953 * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
954 at frchain_root. Make use of known frchain ordering.
955 (last_frag_for_seg): Likewise.
956 (get_frag_fix): Likewise. Add seg param.
957 (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
958 * write.c (chain_frchains_together_1): Adjust for struct frchain.
959 (SUB_SEGMENT_ALIGN): Likewise.
960 (subsegs_finish): Adjust frchain list traversal.
961 * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
962 (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
963 (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
964 (xtensa_fix_b_j_loop_end_frags): Likewise.
965 (xtensa_fix_close_loop_end_frags): Likewise.
966 (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
967 (retrieve_segment_info): Delete frch_seg initialisation.
969 2006-05-03 Alan Modra <amodra@bigpond.net.au>
971 * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
972 * config/obj-elf.h (obj_sec_set_private_data): Delete.
973 * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
974 * config/tc-mn10300.c (tc_gen_reloc): Likewise.
976 2006-05-02 Joseph Myers <joseph@codesourcery.com>
978 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
980 (md_apply_fix3): Multiply offset by 4 here for
981 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
983 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
984 Jan Beulich <jbeulich@novell.com>
986 * config/tc-i386.c (output_invalid_buf): Change size for
988 * config/tc-tic30.c (output_invalid_buf): Likewise.
990 * config/tc-i386.c (output_invalid): Cast none-ascii char to
992 * config/tc-tic30.c (output_invalid): Likewise.
994 2006-05-02 Daniel Jacobowitz <dan@codesourcery.com>
996 * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
997 (TEXI2POD): Use AM_MAKEINFOFLAGS.
998 (asconfig.texi): Don't set top_srcdir.
999 * doc/as.texinfo: Don't use top_srcdir.
1000 * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
1002 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
1004 * config/tc-i386.c (output_invalid_buf): Change size to 16.
1005 * config/tc-tic30.c (output_invalid_buf): Likewise.
1007 * config/tc-i386.c (output_invalid): Use snprintf instead of
1009 * config/tc-ia64.c (declare_register_set): Likewise.
1010 (emit_one_bundle): Likewise.
1011 (check_dependencies): Likewise.
1012 * config/tc-tic30.c (output_invalid): Likewise.
1014 2006-05-02 Paul Brook <paul@codesourcery.com>
1016 * config/tc-arm.c (arm_optimize_expr): New function.
1017 * config/tc-arm.h (md_optimize_expr): Define
1018 (arm_optimize_expr): Add prototype.
1019 (TC_FORCE_RELOCATION_SUB_SAME): Define.
1021 2006-05-02 Ben Elliston <bje@au.ibm.com>
1023 * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
1026 * sb.h (sb_list_vector): Move to sb.c.
1027 * sb.c (free_list): Use type of sb_list_vector directly.
1028 (sb_build): Fix off-by-one error in assertion about `size'.
1030 2006-05-01 Ben Elliston <bje@au.ibm.com>
1032 * listing.c (listing_listing): Remove useless loop.
1033 * macro.c (macro_expand): Remove is_positional local variable.
1034 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
1035 and simplify surrounding expressions, where possible.
1036 (assign_symbol): Likewise.
1037 (s_weakref): Likewise.
1038 * symbols.c (colon): Likewise.
1040 2006-05-01 James Lemke <jwlemke@wasabisystems.com>
1042 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
1044 2006-04-30 Thiemo Seufer <ths@mips.com>
1045 David Ung <davidu@mips.com>
1047 * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
1048 (mips_immed): New table that records various handling of udi
1049 instruction patterns.
1050 (mips_ip): Adds udi handling.
1052 2006-04-28 Alan Modra <amodra@bigpond.net.au>
1054 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
1055 of list rather than beginning.
1057 2006-04-26 Julian Brown <julian@codesourcery.com>
1059 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
1060 (is_quarter_float): Rename from above. Simplify slightly.
1061 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
1063 (parse_neon_mov): Parse floating-point constants.
1064 (neon_qfloat_bits): Fix encoding.
1065 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
1066 preference to integer encoding when using the F32 type.
1068 2006-04-26 Julian Brown <julian@codesourcery.com>
1070 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
1071 zero-initialising structures containing it will lead to invalid types).
1072 (arm_it): Add vectype to each operand.
1073 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
1075 (neon_typed_alias): New structure. Extra information for typed
1077 (reg_entry): Add neon type info field.
1078 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
1079 Break out alternative syntax for coprocessor registers, etc. into...
1080 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
1081 out from arm_reg_parse.
1082 (parse_neon_type): Move. Return SUCCESS/FAIL.
1083 (first_error): New function. Call to ensure first error which occurs is
1085 (parse_neon_operand_type): Parse exactly one type.
1086 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
1087 (parse_typed_reg_or_scalar): New function. Handle core of both
1088 arm_typed_reg_parse and parse_scalar.
1089 (arm_typed_reg_parse): Parse a register with an optional type.
1090 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
1092 (parse_scalar): Parse a Neon scalar with optional type.
1093 (parse_reg_list): Use first_error.
1094 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
1095 (neon_alias_types_same): New function. Return true if two (alias) types
1097 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
1099 (insert_reg_alias): Return new reg_entry not void.
1100 (insert_neon_reg_alias): New function. Insert type/index information as
1101 well as register for alias.
1102 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
1103 make typed register aliases accordingly.
1104 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
1106 (s_unreq): Delete type information if present.
1107 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
1108 (s_arm_unwind_save_mmxwcg): Likewise.
1109 (s_arm_unwind_movsp): Likewise.
1110 (s_arm_unwind_setfp): Likewise.
1111 (parse_shift): Likewise.
1112 (parse_shifter_operand): Likewise.
1113 (parse_address): Likewise.
1114 (parse_tb): Likewise.
1115 (tc_arm_regname_to_dw2regnum): Likewise.
1116 (md_pseudo_table): Add dn, qn.
1117 (parse_neon_mov): Handle typed operands.
1118 (parse_operands): Likewise.
1119 (neon_type_mask): Add N_SIZ.
1120 (N_ALLMODS): New macro.
1121 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
1122 (el_type_of_type_chk): Add some safeguards.
1123 (modify_types_allowed): Fix logic bug.
1124 (neon_check_type): Handle operands with types.
1125 (neon_three_same): Remove redundant optional arg handling.
1126 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
1127 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
1128 (do_neon_step): Adjust accordingly.
1129 (neon_cmode_for_logic_imm): Use first_error.
1130 (do_neon_bitfield): Call neon_check_type.
1131 (neon_dyadic): Rename to...
1132 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
1133 to allow modification of type of the destination.
1134 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1135 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
1136 (do_neon_compare): Make destination be an untyped bitfield.
1137 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
1138 (neon_mul_mac): Return early in case of errors.
1139 (neon_move_immediate): Use first_error.
1140 (neon_mac_reg_scalar_long): Fix type to include scalar.
1141 (do_neon_dup): Likewise.
1142 (do_neon_mov): Likewise (in several places).
1143 (do_neon_tbl_tbx): Fix type.
1144 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
1145 (do_neon_ld_dup): Exit early in case of errors and/or use
1147 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
1148 Handle .dn/.qn directives.
1149 (REGDEF): Add zero for reg_entry neon field.
1151 2006-04-26 Julian Brown <julian@codesourcery.com>
1153 * config/tc-arm.c (limits.h): Include.
1154 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
1155 (fpu_vfp_v3_or_neon_ext): Declare constants.
1156 (neon_el_type): New enumeration of types for Neon vector elements.
1157 (neon_type_el): New struct. Define type and size of a vector element.
1158 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
1160 (neon_type): Define struct. The type of an instruction.
1161 (arm_it): Add 'vectype' for the current instruction.
1162 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
1163 (vfp_sp_reg_pos): Rename to...
1164 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
1166 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
1167 (Neon D or Q register).
1168 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
1170 (GE_OPT_PREFIX_BIG): Define constant, for use in...
1171 (my_get_expression): Allow above constant as argument to accept
1172 64-bit constants with optional prefix.
1173 (arm_reg_parse): Add extra argument to return the specific type of
1174 register in when either a D or Q register (REG_TYPE_NDQ) is
1175 requested. Can be NULL.
1176 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
1177 (parse_reg_list): Update for new arm_reg_parse args.
1178 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
1179 (parse_neon_el_struct_list): New function. Parse element/structure
1180 register lists for VLD<n>/VST<n> instructions.
1181 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
1182 (s_arm_unwind_save_mmxwr): Likewise.
1183 (s_arm_unwind_save_mmxwcg): Likewise.
1184 (s_arm_unwind_movsp): Likewise.
1185 (s_arm_unwind_setfp): Likewise.
1186 (parse_big_immediate): New function. Parse an immediate, which may be
1187 64 bits wide. Put results in inst.operands[i].
1188 (parse_shift): Update for new arm_reg_parse args.
1189 (parse_address): Likewise. Add parsing of alignment specifiers.
1190 (parse_neon_mov): Parse the operands of a VMOV instruction.
1191 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
1192 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
1193 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
1194 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
1195 (parse_operands): Handle new codes above.
1196 (encode_arm_vfp_sp_reg): Rename to...
1197 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
1198 selected VFP version only supports D0-D15.
1199 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
1200 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
1201 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
1202 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
1203 encode_arm_vfp_reg name, and allow 32 D regs.
1204 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
1205 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
1207 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
1208 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
1209 constant-load and conversion insns introduced with VFPv3.
1210 (neon_tab_entry): New struct.
1211 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
1212 those which are the targets of pseudo-instructions.
1213 (neon_opc): Enumerate opcodes, use as indices into...
1214 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
1215 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
1216 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
1217 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
1219 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
1221 (neon_type_mask): New. Compact type representation for type checking.
1222 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
1223 permitted type combinations.
1224 (N_IGNORE_TYPE): New macro.
1225 (neon_check_shape): New function. Check an instruction shape for
1226 multiple alternatives. Return the specific shape for the current
1228 (neon_modify_type_size): New function. Modify a vector type and size,
1229 depending on the bit mask in argument 1.
1230 (neon_type_promote): New function. Convert a given "key" type (of an
1231 operand) into the correct type for a different operand, based on a bit
1233 (type_chk_of_el_type): New function. Convert a type and size into the
1234 compact representation used for type checking.
1235 (el_type_of_type_ckh): New function. Reverse of above (only when a
1236 single bit is set in the bit mask).
1237 (modify_types_allowed): New function. Alter a mask of allowed types
1238 based on a bit mask of modifications.
1239 (neon_check_type): New function. Check the type of the current
1240 instruction against the variable argument list. The "key" type of the
1241 instruction is returned.
1242 (neon_dp_fixup): New function. Fill in and modify instruction bits for
1243 a Neon data-processing instruction depending on whether we're in ARM
1244 mode or Thumb-2 mode.
1245 (neon_logbits): New function.
1246 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
1247 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
1248 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
1249 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
1250 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
1251 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
1252 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1253 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
1254 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
1255 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
1256 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
1257 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
1258 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
1259 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
1260 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
1261 (neon_move_immediate, do_neon_mvn, neon_mixed_length)
1262 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
1263 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
1264 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
1265 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
1266 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
1267 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
1268 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
1269 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
1270 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
1272 (parse_neon_type): New function. Parse Neon type specifier.
1273 (opcode_lookup): Allow parsing of Neon type specifiers.
1274 (REGNUM2, REGSETH, REGSET2): New macros.
1275 (reg_names): Add new VFPv3 and Neon registers.
1276 (NUF, nUF, NCE, nCE): New macros for opcode table.
1277 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
1278 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
1279 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
1280 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
1281 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
1282 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
1283 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
1284 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
1285 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
1286 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
1287 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
1288 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
1289 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
1290 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
1292 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
1293 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
1294 (arm_option_cpu_value): Add vfp3 and neon.
1295 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
1298 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1300 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
1301 syntax instead of hardcoded opcodes with ".w18" suffixes.
1302 (wide_branch_opcode): New.
1303 (build_transition): Use it to check for wide branch opcodes with
1304 either ".w18" or ".w15" suffixes.
1306 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1308 * config/tc-xtensa.c (xtensa_create_literal_symbol,
1309 xg_assemble_literal, xg_assemble_literal_space): Do not set the
1310 frag's is_literal flag.
1312 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1314 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
1316 2006-04-23 Kazu Hirata <kazu@codesourcery.com>
1318 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
1319 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
1320 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
1321 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
1322 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
1324 2005-04-20 Paul Brook <paul@codesourcery.com>
1326 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
1328 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
1330 2006-04-19 Alan Modra <amodra@bigpond.net.au>
1332 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
1333 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
1334 Make some cpus unsupported on ELF. Run "make dep-am".
1335 * Makefile.in: Regenerate.
1337 2006-04-19 Alan Modra <amodra@bigpond.net.au>
1339 * configure.in (--enable-targets): Indent help message.
1340 * configure: Regenerate.
1342 2006-04-18 H.J. Lu <hongjiu.lu@intel.com>
1345 * config/tc-i386.c (i386_immediate): Check illegal immediate
1348 2006-04-18 Alan Modra <amodra@bigpond.net.au>
1350 * config/tc-i386.c: Formatting.
1351 (output_disp, output_imm): ISO C90 params.
1353 * frags.c (frag_offset_fixed_p): Constify args.
1354 * frags.h (frag_offset_fixed_p): Ditto.
1356 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
1357 (COFF_MAGIC): Delete.
1359 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
1361 2006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
1363 * po/POTFILES.in: Regenerated.
1365 2006-04-16 Mark Mitchell <mark@codesourcery.com>
1367 * doc/as.texinfo: Mention that some .type syntaxes are not
1368 supported on all architectures.
1370 2006-04-14 Sterling Augustine <sterling@tensilica.com>
1372 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
1373 instructions when such transformations have been disabled.
1375 2006-04-10 Sterling Augustine <sterling@tensilica.com>
1377 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
1378 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
1379 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
1380 decoding the loop instructions. Remove current_offset variable.
1381 (xtensa_fix_short_loop_frags): Likewise.
1382 (min_bytes_to_other_loop_end): Remove current_offset argument.
1384 2006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl>
1386 * config/tc-z80.c (z80_optimize_expr): Removed.
1387 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
1389 2006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
1391 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
1392 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
1393 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
1394 atmega644, atmega329, atmega3290, atmega649, atmega6490,
1395 atmega406, atmega640, atmega1280, atmega1281, at90can32,
1396 at90can64, at90usb646, at90usb647, at90usb1286 and
1398 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
1400 2006-04-07 Paul Brook <paul@codesourcery.com>
1402 * config/tc-arm.c (parse_operands): Set default error message.
1404 2006-04-07 Paul Brook <paul@codesourcery.com>
1406 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
1408 2006-04-07 Paul Brook <paul@codesourcery.com>
1410 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
1412 2006-04-07 Paul Brook <paul@codesourcery.com>
1414 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
1415 (move_or_literal_pool): Handle Thumb-2 instructions.
1416 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
1418 2006-04-07 Alan Modra <amodra@bigpond.net.au>
1421 * config/tc-i386.c (match_template): Move 64-bit operand tests
1424 2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
1426 * po/Make-in: Add install-html target.
1427 * Makefile.am: Add install-html and install-html-recursive targets.
1428 * Makefile.in: Regenerate.
1429 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
1430 * configure: Regenerate.
1431 * doc/Makefile.am: Add install-html and install-html-am targets.
1432 * doc/Makefile.in: Regenerate.
1434 2006-04-06 Alan Modra <amodra@bigpond.net.au>
1436 * frags.c (frag_offset_fixed_p): Reinitialise offset before
1439 2006-04-05 Richard Sandiford <richard@codesourcery.com>
1440 Daniel Jacobowitz <dan@codesourcery.com>
1442 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
1443 (GOTT_BASE, GOTT_INDEX): New.
1444 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
1445 GOTT_INDEX when generating VxWorks PIC.
1446 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
1447 use the generic *-*-vxworks* stanza instead.
1449 2006-04-04 Alan Modra <amodra@bigpond.net.au>
1452 * frags.c (frag_offset_fixed_p): New function.
1453 * frags.h (frag_offset_fixed_p): Declare.
1454 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
1455 (resolve_expression): Likewise.
1457 2006-04-03 Sterling Augustine <sterling@tensilica.com>
1459 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
1460 of the same length but different numbers of slots.
1462 2006-03-30 Andreas Schwab <schwab@suse.de>
1464 * configure.in: Fix help string for --enable-targets option.
1465 * configure: Regenerate.
1467 2006-03-28 Nathan Sidwell <nathan@codesourcery.com>
1469 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
1470 (m68k_ip): ... here. Use for all chips. Protect against buffer
1471 overrun and avoid excessive copying.
1473 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
1474 m68020_control_regs, m68040_control_regs, m68060_control_regs,
1475 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
1476 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
1477 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
1478 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
1479 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
1480 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
1481 mcf5282_ctrl, mcfv4e_ctrl): ... these.
1482 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
1483 (struct m68k_cpu): Change chip field to control_regs.
1484 (current_chip): Remove.
1485 (control_regs): New.
1486 (m68k_archs, m68k_extensions): Adjust.
1487 (m68k_cpus): Reorder to be in cpu number order. Adjust.
1488 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
1489 (find_cf_chip): Reimplement for new organization of cpu table.
1490 (select_control_regs): Remove.
1492 (struct save_opts): Save control regs, not chip.
1493 (s_save, s_restore): Adjust.
1494 (m68k_lookup_cpu): Give deprecated warning when necessary.
1495 (m68k_init_arch): Adjust.
1496 (md_show_usage): Adjust for new cpu table organization.
1498 2006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
1500 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
1501 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
1502 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
1504 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
1505 (any_gotrel): New rule.
1506 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
1507 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
1509 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
1510 (bfin_pic_ptr): New function.
1511 (md_pseudo_table): Add it for ".picptr".
1512 (OPTION_FDPIC): New macro.
1513 (md_longopts): Add -mfdpic.
1514 (md_parse_option): Handle it.
1515 (md_begin): Set BFD flags.
1516 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
1517 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
1519 * Makefile.am (bfin-parse.o): Update dependencies.
1520 (DEPTC_bfin_elf): Likewise.
1521 * Makefile.in: Regenerate.
1523 2006-03-25 Richard Sandiford <richard@codesourcery.com>
1525 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
1526 mcfemac instead of mcfmac.
1528 2006-03-23 Michael Matz <matz@suse.de>
1530 * config/tc-i386.c (type_names): Correct placement of 'static'.
1531 (reloc): Map some more relocs to their 64 bit counterpart when
1533 (output_insn): Work around breakage if DEBUG386 is defined.
1534 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
1535 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
1536 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
1537 different from i386.
1538 (output_imm): Ditto.
1539 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
1541 (md_convert_frag): Jumps can now be larger than 2GB away, error
1543 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
1544 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
1546 2006-03-22 Richard Sandiford <richard@codesourcery.com>
1547 Daniel Jacobowitz <dan@codesourcery.com>
1548 Phil Edwards <phil@codesourcery.com>
1549 Zack Weinberg <zack@codesourcery.com>
1550 Mark Mitchell <mark@codesourcery.com>
1551 Nathan Sidwell <nathan@codesourcery.com>
1553 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
1554 (md_begin): Complain about -G being used for PIC. Don't change
1555 the text, data and bss alignments on VxWorks.
1556 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
1557 generating VxWorks PIC.
1558 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
1559 (macro): Likewise, but do not treat la $25 specially for
1560 VxWorks PIC, and do not handle jal.
1561 (OPTION_MVXWORKS_PIC): New macro.
1562 (md_longopts): Add -mvxworks-pic.
1563 (md_parse_option): Don't complain about using PIC and -G together here.
1564 Handle OPTION_MVXWORKS_PIC.
1565 (md_estimate_size_before_relax): Always use the first relaxation
1566 sequence on VxWorks.
1567 * config/tc-mips.h (VXWORKS_PIC): New.
1569 2006-03-21 Paul Brook <paul@codesourcery.com>
1571 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
1573 2006-03-21 Sterling Augustine <sterling@tensilica.com>
1575 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
1576 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
1577 (get_loop_align_size): New.
1578 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
1579 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
1580 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
1581 (get_noop_aligned_address): Use get_loop_align_size.
1582 (get_aligned_diff): Likewise.
1584 2006-03-21 Paul Brook <paul@codesourcery.com>
1586 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
1588 2006-03-20 Paul Brook <paul@codesourcery.com>
1590 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
1591 (do_t_branch): Encode branches inside IT blocks as unconditional.
1592 (do_t_cps): New function.
1593 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
1594 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
1595 (opcode_lookup): Allow conditional suffixes on all instructions in
1597 (md_assemble): Advance condexec state before checking for errors.
1598 (insns): Use do_t_cps.
1600 2006-03-20 Paul Brook <paul@codesourcery.com>
1602 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
1603 outputting the insn.
1605 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1607 * config/tc-vax.c: Update copyright year.
1608 * config/tc-vax.h: Likewise.
1610 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1612 * config/tc-vax.c (md_chars_to_number): Used only locally, so
1614 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
1616 2006-03-17 Paul Brook <paul@codesourcery.com>
1618 * config/tc-arm.c (insns): Add ldm and stm.
1620 2006-03-17 Ben Elliston <bje@au.ibm.com>
1623 * doc/as.texinfo (Ident): Document this directive more thoroughly.
1625 2006-03-16 Paul Brook <paul@codesourcery.com>
1627 * config/tc-arm.c (insns): Add "svc".
1629 2006-03-13 Bob Wilson <bob.wilson@acm.org>
1631 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
1632 flag and avoid double underscore prefixes.
1634 2006-03-10 Paul Brook <paul@codesourcery.com>
1636 * config/tc-arm.c (md_begin): Handle EABIv5.
1637 (arm_eabis): Add EF_ARM_EABI_VER5.
1638 * doc/c-arm.texi: Document -meabi=5.
1640 2006-03-10 Ben Elliston <bje@au.ibm.com>
1642 * app.c (do_scrub_chars): Simplify string handling.
1644 2006-03-07 Richard Sandiford <richard@codesourcery.com>
1645 Daniel Jacobowitz <dan@codesourcery.com>
1646 Zack Weinberg <zack@codesourcery.com>
1647 Nathan Sidwell <nathan@codesourcery.com>
1648 Paul Brook <paul@codesourcery.com>
1649 Ricardo Anguiano <anguiano@codesourcery.com>
1650 Phil Edwards <phil@codesourcery.com>
1652 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
1653 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
1655 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
1656 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
1657 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
1659 2006-03-06 Bob Wilson <bob.wilson@acm.org>
1661 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
1662 even when using the text-section-literals option.
1664 2006-03-06 Nathan Sidwell <nathan@codesourcery.com>
1666 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
1668 (m68k_ip): <case 'J'> Check we have some control regs.
1669 (md_parse_option): Allow raw arch switch.
1670 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
1671 whether 68881 or cfloat was meant by -mfloat.
1672 (md_show_usage): Adjust extension display.
1673 (m68k_elf_final_processing): Adjust.
1675 2006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
1677 * config/tc-avr.c (avr_mod_hash_value): New function.
1678 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
1679 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
1680 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
1681 instead of int avr_ldi_expression: use avr_mod_hash_value instead
1683 (tc_gen_reloc): Handle substractions of symbols, if possible do
1684 fixups, abort otherwise.
1685 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
1686 tc_fix_adjustable): Define.
1688 2006-03-02 James E Wilson <wilson@specifix.com>
1690 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
1691 change the template, then clear md.slot[curr].end_of_insn_group.
1693 2006-02-28 Jan Beulich <jbeulich@novell.com>
1695 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
1697 2006-02-28 Jan Beulich <jbeulich@novell.com>
1700 * macro.c (getstring): Don't treat parentheses special anymore.
1701 (get_any_string): Don't consider '(' and ')' as quoting anymore.
1702 Special-case '(', ')', '[', and ']' when dealing with non-quoting
1705 2006-02-28 Mat <mat@csail.mit.edu>
1707 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
1709 2006-02-27 Jakub Jelinek <jakub@redhat.com>
1711 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
1713 (CFI_signal_frame): Define.
1714 (cfi_pseudo_table): Add .cfi_signal_frame.
1715 (dot_cfi): Handle CFI_signal_frame.
1716 (output_cie): Handle cie->signal_frame.
1717 (select_cie_for_fde): Don't share CIE if signal_frame flag is
1718 different. Copy signal_frame from FDE to newly created CIE.
1719 * doc/as.texinfo: Document .cfi_signal_frame.
1721 2006-02-27 Carlos O'Donell <carlos@codesourcery.com>
1723 * doc/Makefile.am: Add html target.
1724 * doc/Makefile.in: Regenerate.
1725 * po/Make-in: Add html target.
1727 2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
1729 * config/tc-i386.c (output_insn): Support Intel Merom New
1732 * config/tc-i386.h (CpuMNI): New.
1733 (CpuUnknownFlags): Add CpuMNI.
1735 2006-02-24 David S. Miller <davem@sunset.davemloft.net>
1737 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
1738 (hpriv_reg_table): New table for hyperprivileged registers.
1739 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
1742 2006-02-24 DJ Delorie <dj@redhat.com>
1744 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
1745 (tc_gen_reloc): Don't define.
1746 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
1747 (OPTION_LINKRELAX): New.
1748 (md_longopts): Add it.
1750 (md_parse_options): Set it.
1751 (md_assemble): Emit relaxation relocs as needed.
1752 (md_convert_frag): Emit relaxation relocs as needed.
1753 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
1754 (m32c_apply_fix): New.
1755 (tc_gen_reloc): New.
1756 (m32c_force_relocation): Force out jump relocs when relaxing.
1757 (m32c_fix_adjustable): Return false if relaxing.
1759 2006-02-24 Paul Brook <paul@codesourcery.com>
1761 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
1762 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
1763 (struct asm_barrier_opt): Define.
1764 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
1765 (parse_psr): Accept V7M psr names.
1766 (parse_barrier): New function.
1767 (enum operand_parse_code): Add OP_oBARRIER.
1768 (parse_operands): Implement OP_oBARRIER.
1769 (do_barrier): New function.
1770 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
1771 (do_t_cpsi): Add V7M restrictions.
1772 (do_t_mrs, do_t_msr): Validate V7M variants.
1773 (md_assemble): Check for NULL variants.
1774 (v7m_psrs, barrier_opt_names): New tables.
1775 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
1776 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
1777 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
1778 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
1779 (struct cpu_arch_ver_table): Define.
1780 (cpu_arch_ver): New.
1781 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
1782 Tag_CPU_arch_profile.
1783 * doc/c-arm.texi: Document new cpu and arch options.
1785 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1787 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
1789 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1791 * config/tc-ia64.c: Update copyright years.
1793 2006-02-22 H.J. Lu <hongjiu.lu@intel.com>
1795 * config/tc-ia64.c (specify_resource): Add the rule 17 from
1798 2005-02-22 Paul Brook <paul@codesourcery.com>
1800 * config/tc-arm.c (do_pld): Remove incorrect write to
1802 (encode_thumb32_addr_mode): Use correct operand.
1804 2006-02-21 Paul Brook <paul@codesourcery.com>
1806 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
1808 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
1809 Anil Paranjape <anilp1@kpitcummins.com>
1810 Shilin Shakti <shilins@kpitcummins.com>
1812 * Makefile.am: Add xc16x related entry.
1813 * Makefile.in: Regenerate.
1814 * configure.in: Added xc16x related entry.
1815 * configure: Regenerate.
1816 * config/tc-xc16x.h: New file
1817 * config/tc-xc16x.c: New file
1818 * doc/c-xc16x.texi: New file for xc16x
1819 * doc/all.texi: Entry for xc16x
1820 * doc/Makefile.texi: Added c-xc16x.texi
1821 * NEWS: Announce the support for the new target.
1823 2006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
1825 * configure.tgt: set emulation for mips-*-netbsd*
1827 2006-02-14 Jakub Jelinek <jakub@redhat.com>
1829 * config.in: Rebuilt.
1831 2006-02-13 Bob Wilson <bob.wilson@acm.org>
1833 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
1834 from 1, not 0, in error messages.
1835 (md_assemble): Simplify special-case check for ENTRY instructions.
1836 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
1837 operand in error message.
1839 2006-02-13 Joseph S. Myers <joseph@codesourcery.com>
1841 * configure.tgt (arm-*-linux-gnueabi*): Change to
1844 2006-02-10 Nick Clifton <nickc@redhat.com>
1846 * config/tc-crx.c (check_range): Ensure that the sign bit of a
1847 32-bit value is propagated into the upper bits of a 64-bit long.
1849 * config/tc-arc.c (init_opcode_tables): Fix cast.
1850 (arc_extoper, md_operand): Likewise.
1852 2006-02-09 David Heine <dlheine@tensilica.com>
1854 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
1855 each relaxation step.
1857 2006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
1859 * configure.in (CHECK_DECLS): Add vsnprintf.
1860 * configure: Regenerate.
1861 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
1862 include/declare here, but...
1863 * as.h: Move code detecting VARARGS idiom to the top.
1864 (errno.h, stdarg.h, varargs.h, va_list): ...here.
1865 (vsnprintf): Declare if not already declared.
1867 2006-02-08 H.J. Lu <hongjiu.lu@intel.com>
1869 * as.c (close_output_file): New.
1870 (main): Register close_output_file with xatexit before
1871 dump_statistics. Don't call output_file_close.
1873 2006-02-07 Nathan Sidwell <nathan@codesourcery.com>
1875 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
1876 mcf5329_control_regs): New.
1877 (not_current_architecture, selected_arch, selected_cpu): New.
1878 (m68k_archs, m68k_extensions): New.
1879 (archs): Renamed to ...
1880 (m68k_cpus): ... here. Adjust.
1882 (md_pseudo_table): Add arch and cpu directives.
1883 (find_cf_chip, m68k_ip): Adjust table scanning.
1884 (no_68851, no_68881): Remove.
1885 (md_assemble): Lazily initialize.
1886 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
1887 (md_init_after_args): Move functionality to m68k_init_arch.
1888 (mri_chip): Adjust table scanning.
1889 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
1890 options with saner parsing.
1891 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
1892 m68k_init_arch): New.
1893 (s_m68k_cpu, s_m68k_arch): New.
1894 (md_show_usage): Adjust.
1895 (m68k_elf_final_processing): Set CF EF flags.
1896 * config/tc-m68k.h (m68k_init_after_args): Remove.
1897 (tc_init_after_args): Remove.
1898 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
1899 (M68k-Directives): Document .arch and .cpu directives.
1901 2006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl>
1903 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
1904 synonyms for equ and defl.
1905 (z80_cons_fix_new): New function.
1906 (emit_byte): Disallow relative jumps to absolute locations.
1907 (emit_data): Only handle defb, prototype changed, because defb is
1908 now handled as pseudo-op rather than an instruction.
1909 (instab): Entries for defb,defw,db,dw moved from here...
1910 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
1911 Add entries for def24,def32,d24,d32.
1912 (md_assemble): Improved error handling.
1913 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
1914 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
1915 (z80_cons_fix_new): Declare.
1916 * doc/c-z80.texi (defb, db): Mention warning on overflow.
1917 (def24,d24,def32,d32): New pseudo-ops.
1919 2006-02-02 Paul Brook <paul@codesourcery.com>
1921 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
1923 2005-02-02 Paul Brook <paul@codesourcery.com>
1925 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
1926 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
1927 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
1928 T2_OPCODE_RSB): Define.
1929 (thumb32_negate_data_op): New function.
1930 (md_apply_fix): Use it.
1932 2006-01-31 Bob Wilson <bob.wilson@acm.org>
1934 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
1936 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
1937 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
1939 (relaxation_requirements): Add pfinish_frag argument and use it to
1940 replace setting tinsn->record_fix fields.
1941 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
1942 and vinsn_to_insnbuf. Remove references to record_fix and
1943 slot_sub_symbols fields.
1944 (xtensa_mark_narrow_branches): Delete unused code.
1945 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
1947 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
1949 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
1950 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
1951 of the record_fix field. Simplify error messages for unexpected
1953 (set_expr_symbol_offset_diff): Delete.
1955 2006-01-31 Paul Brook <paul@codesourcery.com>
1957 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
1959 2006-01-31 Paul Brook <paul@codesourcery.com>
1960 Richard Earnshaw <rearnsha@arm.com>
1962 * config/tc-arm.c: Use arm_feature_set.
1963 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
1964 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
1965 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
1968 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
1969 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
1970 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
1971 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
1973 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
1974 (arm_opts): Move old cpu/arch options from here...
1975 (arm_legacy_opts): ... to here.
1976 (md_parse_option): Search arm_legacy_opts.
1977 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
1978 (arm_float_abis, arm_eabis): Make const.
1980 2006-01-25 Bob Wilson <bob.wilson@acm.org>
1982 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
1984 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1986 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
1987 in load immediate intruction.
1989 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1991 * config/bfin-parse.y (value_match): Use correct conversion
1992 specifications in template string for __FILE__ and __LINE__.
1996 2006-01-18 Alexandre Oliva <aoliva@redhat.com>
1998 Introduce TLS descriptors for i386 and x86_64.
1999 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
2000 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
2001 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
2002 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
2003 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
2005 (build_modrm_byte): Set up zero modrm for TLS desc calls.
2006 (lex_got): Handle @tlsdesc and @tlscall.
2007 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
2009 2006-01-11 Nick Clifton <nickc@redhat.com>
2011 Fixes for building on 64-bit hosts:
2012 * config/tc-avr.c (mod_index): New union to allow conversion
2013 between pointers and integers.
2014 (md_begin, avr_ldi_expression): Use it.
2015 * config/tc-i370.c (md_assemble): Add cast for argument to print
2017 * config/tc-tic54x.c (subsym_substitute): Likewise.
2018 * config/tc-mn10200.c (md_assemble): Use a union to convert the
2019 opindex field of fr_cgen structure into a pointer so that it can
2020 be stored in a frag.
2021 * config/tc-mn10300.c (md_assemble): Likewise.
2022 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
2024 * config/tc-v850.c: Replace uses of (int) casts with correct
2027 2006-01-09 H.J. Lu <hongjiu.lu@intel.com>
2030 * symbols.c (snapshot_symbol): Don't change a defined symbol.
2032 2006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
2035 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
2036 a local-label reference.
2038 For older changes see ChangeLog-2005
2044 version-control: never