1 2006-07-19 Paul Brook <paul@codesourcery.com>
3 * config/tc-arm.c (insns): Fix rbit Arm opcode.
5 2006-07-18 Paul Brook <paul@codesourcery.com>
7 * tc-arm.c (do_t_add_sub): Use addw/subw when source is PC.
8 (md_convert_frag): Use correct reloc for add_pc. Use
9 BFD_RELOC_ARM_T32_ADD_IMM for normal add/sum.
10 (md_apply_fix): Handle BFD_RELOC_ARM_T32_ADD_IMM.
11 (arm_force_relocation): Handle BFD_RELOC_ARM_T32_ADD_IMM.
13 2006-07-17 Mat Hostetter <mat@lcs.mit.edu>
15 * symbols.c (report_op_error): Fix pasto. Don't use as_bad_where
16 when file and line unknown.
18 2006-07-17 Thiemo Seufer <ths@mips.com>
20 * read.c (s_struct): Use IS_ELF.
21 * config/tc-mips.c (md_begin, mips16_mark_labels, mips_ip,
22 md_parse_option, s_change_sec, pic_need_relax, mips_fix_adjustable,
23 tc_gen_reloc, mips_frob_file_after_relocs, s_mips_end, s_mips_frame,
24 s_mips_mask): Likewise.
26 2006-07-16 Thiemo Seufer <ths@mips.com>
27 David Ung <davidu@mips.com>
29 * read.c (s_struct): Handle ELF section changing.
30 * config/tc-mips.c (s_align): Leave enabling auto-align to the
32 (s_change_sec): Try section changing only if we output ELF.
34 2006-07-15 H.J. Lu <hongjiu.lu@intel.com>
36 * config/tc-i386.c (cpu_arch): Remove Cpu086, CpuAthlon and
38 (smallest_imm_type): Remove Cpu086.
39 (i386_target_format): Likewise.
41 * config/tc-i386.h: Remove Cpu086, CpuAthlon and CpuAmdFam10.
44 2006-07-13 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
45 Michael Meissner <michael.meissner@amd.com>
47 * config/tc-i386.h (PROCESSOR_AMDFAM10): New processor_type.
48 (CpuSSE4a, CpuABM, CpuAmdFam10): New Cpu directives.
49 * config/tc-i386.c (cpu_arch): Add support for AmdFam10
51 (i386_align_code): Ditto.
52 (md_assemble_code): Add support for insertq/extrq instructions,
53 swapping as needed for intel syntax.
54 (swap_imm_operands): New function to swap immediate operands.
55 (swap_operands): Deal with 4 operand instructions.
56 (build_modrm_byte): Add support for insertq instruction.
58 2006-07-13 H.J. Lu <hongjiu.lu@intel.com>
60 * config/tc-i386.h (Size64): Fix a typo in comment.
62 2006-07-12 Nick Clifton <nickc@redhat.com>
64 * config/tc-sh.c (md_apply_fix): Do not allow the generic code in
65 fixup_segment() to repeat a range check on a value that has
66 already been checked here.
68 2006-07-07 James E Wilson <wilson@specifix.com>
70 * config/tc-mips.c (mips_cpu_info_table): Add sb1a.
72 2006-07-06 Mohammed Adnène Trojette <adn@diwi.org>
73 Nick Clifton <nickc@redhat.com>
76 * doc/as.texi: Fix spelling typo: branchs => branches.
77 * doc/c-m68hc11.texi: Likewise.
78 * config/tc-m68hc11.c: Likewise.
79 Support old spelling of command line switch for backwards
82 2006-07-04 Thiemo Seufer <ths@mips.com>
83 David Ung <davidu@mips.com>
85 * config/tc-mips.c (s_is_linkonce): New function.
86 (mips16_mark_labels): Don't adjust mips16 symbol addresses for
87 weak, external, and linkonce symbols.
88 (pic_need_relax): Use s_is_linkonce.
90 2006-06-24 H.J. Lu <hongjiu.lu@intel.com>
92 * doc/as.texinfo (Org): Remove space.
93 (P2align): Add "@var{abs-expr},".
95 2006-06-23 H.J. Lu <hongjiu.lu@intel.com>
97 * config/tc-i386.c (cpu_arch_tune_set): New.
98 (cpu_arch_isa): Likewise.
99 (i386_align_code): Use xchg %ax,%ax for 2 byte nop. Optimize
100 nops with short or long nop sequences based on -march=/.arch
102 (set_cpu_arch): Set cpu_arch_isa. If cpu_arch_tune_set is 0,
103 set cpu_arch_tune and cpu_arch_tune_flags.
104 (md_parse_option): For -march=, set cpu_arch_isa and set
105 cpu_arch_tune and cpu_arch_tune_flags if cpu_arch_tune_set is
106 0. Set cpu_arch_tune_set to 1 for -mtune=.
107 (i386_target_format): Don't set cpu_arch_tune.
109 2006-06-23 Nigel Stephens <nigel@mips.com>
111 * config/tc-mips.c (nopic_need_relax): Handle -fdata-sections
112 generated .sbss.* and .gnu.linkonce.sb.*.
114 2006-06-23 Thiemo Seufer <ths@mips.com>
115 David Ung <davidu@mips.com>
117 * config/tc-mips.h (TC_SEGMENT_INFO_TYPE): Declare per-segment
119 * config/tc-mips.c (label_list): Define per-segment label_list.
120 (mips_clear_insn_labels, mips_move_labels, mips16_mark_labels,
121 append_insn, s_align, s_cons, s_float_cons, s_gpword, s_gpdword,
122 mips_from_file_after_relocs, mips_define_label): Use per-segment
125 2006-06-22 Thiemo Seufer <ths@mips.com>
127 * config/tc-mips.c (ISA_SUPPORTS_MIPS16E): New macro.
128 (append_insn): Use it.
129 (md_apply_fix): Whitespace formatting.
130 (md_begin, append_insn, macro, macro2, mips16_immed, mips_align,
131 mips16_extended_frag): Remove register specifier.
132 (md_convert_frag): Likewise. Use TRUE ans FALSE instead of numeric
135 2006-06-21 Mark Shinwell <shinwell@codesourcery.com>
137 * config/tc-arm.c (s_arm_unwind_save_vfp_armv6): New. Parse
138 a directive saving VFP registers for ARMv6 or later.
139 (s_arm_unwind_save): Add parameter arch_v6 and call
140 s_arm_unwind_save_vfp or s_arm_unwind_save_vfp_armv6 as
142 (md_pseudo_table): Add entry for new "vsave" directive.
143 * doc/c-arm.texi: Correct error in example for "save"
144 directive (fstmdf -> fstmdx). Also document "vsave" directive.
146 2006-06-18 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
147 Anatoly Sokolov <aesok@post.ru>
149 * config/tc-avr.c (mcu_types): Add support for atmega165p, atmega169p
150 and atmega644p devices. Rename atmega164/atmega324 devices to
151 atmega164p/atmega324p.
152 * doc/c-avr.texi: Document new mcu and arch options.
154 2006-06-17 Nick Clifton <nickc@redhat.com>
156 * config/tc-arm.c (enum parse_operand_result): Move outside of
157 #ifdef OBJ_ELF so that non-ELF targeted ARM ports can build.
159 2006-06-16 H.J. Lu <hongjiu.lu@intel.com>
161 * config/tc-i386.h (processor_type): New.
162 (arch_entry): Add type.
164 * config/tc-i386.c (cpu_arch_tune): New.
165 (cpu_arch_tune_flags): Likewise.
166 (cpu_arch_isa_flags): Likewise.
168 (set_cpu_arch): Also update cpu_arch_isa_flags.
169 (md_assemble): Update cpu_arch_isa_flags.
171 (OPTION_MTUNE): Likewise.
172 (md_longopts): Add -march= and -mtune=.
173 (md_parse_option): Support -march= and -mtune=.
174 (md_show_usage): Add -march=CPU/-mtune=CPU.
175 (i386_target_format): Also update cpu_arch_isa_flags,
176 cpu_arch_tune and cpu_arch_tune_flags.
178 * doc/as.texinfo: Add -march=CPU/-mtune=CPU.
180 * doc/c-i386.texi: Document -march=CPU/-mtune=CPU.
182 2006-06-15 Mark Shinwell <shinwell@codesourcery.com>
184 * config/tc-arm.c (enum parse_operand_result): New.
185 (struct group_reloc_table_entry): New.
186 (enum group_reloc_type): New.
187 (group_reloc_table): New array.
188 (find_group_reloc_table_entry): New function.
189 (parse_shifter_operand_group_reloc): New function.
190 (parse_address_main): New function, incorporating code
191 from the old parse_address function. To be used via...
192 (parse_address): wrapper for parse_address_main; and
193 (parse_address_group_reloc): new function, likewise.
194 (enum operand_parse_code): New codes OP_SHG, OP_ADDRGLDR,
195 OP_ADDRGLDRS, OP_ADDRGLDC.
196 (parse_operands): Support for these new operand codes.
197 New macro po_misc_or_fail_no_backtrack.
198 (encode_arm_cp_address): Preserve group relocations.
199 (insns): Modify to use the above operand codes where group
200 relocations are permitted.
201 (md_apply_fix): Handle the group relocations
202 ALU_PC_G0_NC through LDC_SB_G2.
203 (tc_gen_reloc): Likewise.
204 (arm_force_relocation): Leave group relocations for the linker.
205 (arm_fix_adjustable): Likewise.
207 2006-06-15 Julian Brown <julian@codesourcery.com>
209 * config/tc-arm.c (do_vfp_nsyn_ldr_str): Remove, fold into...
210 (do_neon_ldr_str): Always defer to VFP encoding routines, which handle
213 2006-06-12 H.J. Lu <hongjiu.lu@intel.com>
215 * config/tc-i386.c (process_suffix): Don't add rex64 for
218 2006-06-09 Thiemo Seufer <ths@mips.com>
220 * config/tc-mips.c (mips_ip): Maintain argument count.
222 2006-06-09 Alan Modra <amodra@bigpond.net.au>
224 * config/tc-iq2000.c: Include sb.h.
226 2006-06-08 Nigel Stephens <nigel@mips.com>
228 * config/tc-mips.c (mips_pseudo_table): Add "origin" and "repeat"
229 aliases for better compatibility with SGI tools.
231 2006-06-08 Alan Modra <amodra@bigpond.net.au>
233 * configure.in (BFDLIB, BFDVER_H, ALL_OBJ_DEPS): Delete.
234 * Makefile.am (GASLIBS): Expand @BFDLIB@.
236 (OBJS): Expand @ALL_OBJ_DEPS@. Depend on all fopen-*.h variants.
237 (obj-aout.o): Depend on $(DEP_@target_get_type@_aout)
238 (obj-coff.o, obj-ecoff.o, obj-elf.o): Similarly.
240 * dep-in.sed: Don't substitute bfdver.h. Do remove symcat.h.
241 * Makefile.in: Regenerate.
242 * doc/Makefile.in: Regenerate.
243 * configure: Regenerate.
245 2006-06-07 Joseph S. Myers <joseph@codesourcery.com>
247 * po/Make-in (pdf, ps): New dummy targets.
249 2006-06-07 Julian Brown <julian@codesourcery.com>
251 * config/tc-arm.c (stdarg.h): include.
252 (arm_it): Add uncond_value field. Add isvec and issingle to operand
254 (arm_reg_type): Add REG_TYPE_VFSD (single or double VFP reg) and
255 REG_TYPE_NSDQ (single, double or quad vector reg).
256 (reg_expected_msgs): Update.
257 (BAD_FPU): Add macro for unsupported FPU instruction error.
258 (parse_neon_type): Support 'd' as an alias for .f64.
259 (parse_typed_reg_or_scalar): Support REG_TYPE_VFSD, REG_TYPE_NSDQ
261 (parse_vfp_reg_list): Don't update first arg on error.
262 (parse_neon_mov): Support extra syntax for VFP moves.
263 (operand_parse_code): Add OP_RVSD, OP_RNSDQ, OP_VRSDLST, OP_RVSD_IO,
264 OP_RNSDQ_RNSC, OP_RVC_PSR, OP_APSR_RR, OP_oRNSDQ.
265 (parse_operands): Support isvec, issingle operands fields, new parse
267 (do_vfp_nsyn_mrs, do_vfp_nsyn_msr): New functions. Support VFP mrs,
269 (do_mrs, do_msr, do_t_mrs, do_t_msr): Add support for above.
270 (NEON_ENC_TAB): Add vnmul, vnmla, vnmls, vcmp, vcmpz, vcmpe, vcmpez.
271 (NEON_ENC_SINGLE, NEON_ENC_DOUBLE): Define macros.
272 (NEON_SHAPE_DEF): New macro. Define table of possible instruction
274 (neon_shape): Redefine in terms of above.
275 (neon_shape_class): New enumeration, table of shape classes.
276 (neon_shape_el): New enumeration. One element of a shape.
277 (neon_shape_el_size): Register widths of above, where appropriate.
278 (neon_shape_info): New struct. Info for shape table.
279 (neon_shape_tab): New array.
280 (neon_type_mask): Add N_F64, N_VFP. Update N_MAX_NONSPECIAL.
281 (neon_check_shape): Rewrite as...
282 (neon_select_shape): New function to classify instruction shapes,
283 driven by new table neon_shape_tab array.
284 (neon_quad): New function. Return 1 if shape should set Q flag in
285 instructions (or equivalent), 0 otherwise.
286 (type_chk_of_el_type): Support F64.
287 (el_type_of_type_chk): Likewise.
288 (neon_check_type): Add support for VFP type checking (VFP data
289 elements fill their containing registers).
290 (do_vfp_cond_or_thumb): Fill in condition field in ARM mode, or 0xE
291 in thumb mode for VFP instructions.
292 (do_vfp_nsyn_opcode): New function. Look up the opcode in argument,
293 and encode the current instruction as if it were that opcode.
294 (try_vfp_nsyn): New. If this looks like a VFP instruction with ARGS
295 arguments, call function in PFN.
296 (do_vfp_nsyn_add_sub, do_vfp_nsyn_mla_mls, do_vfp_nsyn_mul)
297 (do_vfp_nsyn_abs_neg, do_vfp_nsyn_ldm_stm, do_vfp_nsyn_ldr_str)
298 (do_vfp_nsyn_sqrt, do_vfp_nsyn_div, do_vfp_nsyn_nmul)
299 (do_vfp_nsyn_cmp, nsyn_insert_sp, do_vfp_nsyn_push)
300 (do_vfp_nsyn_pop, do_vfp_nsyn_cvt, do_vfp_nsyn_cvtz): New functions.
301 Redirect Neon-syntax VFP instructions to VFP instruction handlers.
302 (do_neon_dyadic_i_su, do_neon_dyadic_i64_su, do_neon_shl_imm)
303 (do_neon_qshl_imm, do_neon_logic, do_neon_bitfield)
304 (neon_dyadic_misc, neon_compare, do_neon_tst, do_neon_qdmulh)
305 (do_neon_fcmp_absolute, do_neon_step, do_neon_sli, do_neon_sri)
306 (do_neon_qshlu_imm, neon_move_immediate, do_neon_mvn, do_neon_ext)
307 (do_neon_rev, do_neon_dup, do_neon_rshift_round_imm, do_neon_trn)
308 (do_neon_zip_uzp, do_neon_sat_abs_neg, do_neon_pair_long)
309 (do_neon_recip_est, do_neon_cls, do_neon_clz, do_neon_cnt)
310 (do_neon_swp): Use neon_select_shape not neon_check_shape. Use
312 (vfp_or_neon_is_neon): New function. Call if a mnemonic shared
313 between VFP and Neon turns out to belong to Neon. Perform
314 architecture check and fill in condition field if appropriate.
315 (do_neon_addsub_if_i, do_neon_mac_maybe_scalar, do_neon_abs_neg)
316 (do_neon_cvt): Add support for VFP variants of instructions.
317 (neon_cvt_flavour): Extend to cover VFP conversions.
318 (do_neon_mov): Rewrite to use neon_select_shape. Add support for VFP
320 (do_neon_ldr_str): Handle single-precision VFP load/store.
321 (do_neon_ld_st_interleave, do_neon_ld_st_lane, do_neon_ld_dup): Use
322 NS_NULL not NS_IGNORE.
323 (opcode_tag): Add OT_csuffixF for operands which either take a
324 conditional suffix, or have 0xF in the condition field.
325 (md_assemble): Add support for OT_csuffixF.
326 (NCE): Replace macro with...
327 (NCE_tag, NCE, NCEF): New macros.
328 (nCE): Replace macro with...
329 (nCE_tag, nCE, nCEF): New macros.
330 (insns): Add support for VFP insns or VFP versions of insns msr,
331 mrs, vsqrt, vdiv, vnmul, vnmla, vnmls, vcmp, vcmpe, vpush, vpop,
332 vcvtz, vmul, vmla, vmls, vadd, vsub, vabs, vneg, vldm, vldmia,
333 vldbdb, vstm, vstmia, vstmdb, vldr, vstr, vcvt, vmov. Group shared
334 VFP/Neon insns together.
336 2006-06-07 Alan Modra <amodra@bigpond.net.au>
337 Ladislav Michl <ladis@linux-mips.org>
339 * app.c: Don't include headers already included by as.h.
341 * atof-generic.c: Likewise.
343 * dwarf2dbg.c: Likewise.
345 * input-file.c: Likewise.
346 * input-scrub.c: Likewise.
348 * output-file.c: Likewise.
351 * config/bfin-lex.l: Likewise.
352 * config/obj-coff.h: Likewise.
353 * config/obj-elf.h: Likewise.
354 * config/obj-som.h: Likewise.
355 * config/tc-arc.c: Likewise.
356 * config/tc-arm.c: Likewise.
357 * config/tc-avr.c: Likewise.
358 * config/tc-bfin.c: Likewise.
359 * config/tc-cris.c: Likewise.
360 * config/tc-d10v.c: Likewise.
361 * config/tc-d30v.c: Likewise.
362 * config/tc-dlx.h: Likewise.
363 * config/tc-fr30.c: Likewise.
364 * config/tc-frv.c: Likewise.
365 * config/tc-h8300.c: Likewise.
366 * config/tc-hppa.c: Likewise.
367 * config/tc-i370.c: Likewise.
368 * config/tc-i860.c: Likewise.
369 * config/tc-i960.c: Likewise.
370 * config/tc-ip2k.c: Likewise.
371 * config/tc-iq2000.c: Likewise.
372 * config/tc-m32c.c: Likewise.
373 * config/tc-m32r.c: Likewise.
374 * config/tc-maxq.c: Likewise.
375 * config/tc-mcore.c: Likewise.
376 * config/tc-mips.c: Likewise.
377 * config/tc-mmix.c: Likewise.
378 * config/tc-mn10200.c: Likewise.
379 * config/tc-mn10300.c: Likewise.
380 * config/tc-msp430.c: Likewise.
381 * config/tc-mt.c: Likewise.
382 * config/tc-ns32k.c: Likewise.
383 * config/tc-openrisc.c: Likewise.
384 * config/tc-ppc.c: Likewise.
385 * config/tc-s390.c: Likewise.
386 * config/tc-sh.c: Likewise.
387 * config/tc-sh64.c: Likewise.
388 * config/tc-sparc.c: Likewise.
389 * config/tc-tic30.c: Likewise.
390 * config/tc-tic4x.c: Likewise.
391 * config/tc-tic54x.c: Likewise.
392 * config/tc-v850.c: Likewise.
393 * config/tc-vax.c: Likewise.
394 * config/tc-xc16x.c: Likewise.
395 * config/tc-xstormy16.c: Likewise.
396 * config/tc-xtensa.c: Likewise.
397 * config/tc-z80.c: Likewise.
398 * config/tc-z8k.c: Likewise.
399 * macro.h: Don't include sb.h or ansidecl.h.
400 * sb.h: Don't include stdio.h or ansidecl.h.
401 * cond.c: Include sb.h.
402 * itbl-lex.l: Include as.h instead of other system headers.
403 * itbl-parse.y: Likewise.
404 * itbl-ops.c: Similarly.
405 * itbl-ops.h: Don't include as.h or ansidecl.h.
406 * config/bfin-defs.h: Don't include bfd.h or as.h.
407 * config/bfin-parse.y: Include as.h instead of other system headers.
409 2006-06-06 Ben Elliston <bje@au.ibm.com>
410 Anton Blanchard <anton@samba.org>
412 * config/tc-ppc.c (parse_cpu): Handle "-mpower6".
413 (md_show_usage): Document it.
414 (ppc_setup_opcodes): Test power6 opcode flag bits.
415 * doc/c-ppc.texi (PowerPC-Opts): Document "-mpower6".
417 2006-06-06 Thiemo Seufer <ths@mips.com>
418 Chao-ying Fu <fu@mips.com>
420 * config/tc-mips.c (ISA_SUPPORTS_DSP64): New macro.
421 (CPU_HAS_MIPS3D, CPU_HAS_MDMX, CPU_HAS_DSP, CPU_HAS_MT): Delete.
422 (macro_build): Update comment.
423 (mips_ip): Allow DSP64 instructions for MIPS64R2.
424 (mips_after_parse_args): Remove uses of CPU_HAS_MIPS3D and
426 (mips_cpu_info): Fix formatting. Add MIPS_CPU_ASE_MIPS3D and
427 MIPS_CPU_ASE_MDMX flags for sb1.
429 2006-06-05 Thiemo Seufer <ths@mips.com>
431 * config/tc-mips.c (macro_build): Use INSERT_OPERAND wherew
433 (mips16_macro_build): Use MIPS16_INSERT_OPERAND where appropriate.
434 (mips_ip): Make overflowed/underflowed constant arguments in DSP
435 and MT instructions a fatal error. Use INSERT_OPERAND where
436 appropriate. Improve warnings for break and wait code overflows.
437 Use symbolic constant of OP_MASK_COPZ.
438 (mips16_ip): Use MIPS16_INSERT_OPERAND where appropriate.
440 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
442 * po/Make-in (top_builddir): Define.
444 2006-06-02 Joseph S. Myers <joseph@codesourcery.com>
446 * doc/Makefile.am (TEXI2DVI): Define.
447 * doc/Makefile.in: Regenerate.
448 * doc/c-arc.texi: Fix typo.
450 2006-06-01 Alan Modra <amodra@bigpond.net.au>
452 * config/obj-ieee.c: Delete.
453 * config/obj-ieee.h: Delete.
454 * Makefile.am (OBJ_FORMATS): Remove ieee.
455 (OBJ_FORMAT_CFILES, OBJ_FORMAT_HFILES): Similarly.
456 (obj-ieee.o): Remove rule.
457 * Makefile.in: Regenerate.
458 * configure.in (atof): Remove tahoe.
459 (OBJ_MAYBE_IEEE): Don't define.
460 * configure: Regenerate.
461 * config.in: Regenerate.
462 * doc/Makefile.in: Regenerate.
463 * po/POTFILES.in: Regenerate.
465 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
467 * Makefile.am: Replace INTLLIBS and INTLDEPS with LIBINTL
468 and LIBINTL_DEP everywhere.
470 (INCLUDES, DEP_INCLUDES): Use @INCINTL@.
471 * acinclude.m4: Include new gettext macros.
472 * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
473 Remove local code for po/Makefile.
474 * Makefile.in, configure, doc/Makefile.in: Regenerated.
476 2006-05-30 Nick Clifton <nickc@redhat.com>
478 * po/es.po: Updated Spanish translation.
480 2006-05-06 Denis Chertykov <denisc@overta.ru>
482 * doc/c-avr.texi: New file.
483 * doc/Makefile.am (CPU_DOCS): Add c-avr.texi
484 * doc/all.texi: Set AVR
485 * doc/as.texinfo: Include c-avr.texi
487 2006-05-28 Jie Zhang <jie.zhang@analog.com>
489 * config/bfin-parse.y (check_macfunc): Loose the condition of
490 calling check_multiply_halfregs ().
492 2006-05-25 Jie Zhang <jie.zhang@analog.com>
494 * config/bfin-parse.y (asm_1): Better check and deal with
495 vector and scalar Multiply 16-Bit Operands instructions.
497 2006-05-24 Nick Clifton <nickc@redhat.com>
499 * config/tc-hppa.c: Convert to ISO C90 format.
500 * config/tc-hppa.h: Likewise.
502 2006-05-24 Carlos O'Donell <carlos@systemhalted.org>
503 Randolph Chung <randolph@tausq.org>
505 * config/tc-hppa.c (is_tls_gdidx, is_tls_ldidx, is_tls_dtpoff,
506 is_tls_ieoff, is_tls_leoff): Define.
507 (fix_new_hppa): Handle TLS.
508 (cons_fix_new_hppa): Likewise.
510 (md_apply_fix): Handle TLS relocs.
511 * config/tc-hppa.h (hppa_fix_adjustable): Handle TLS.
513 2006-05-24 Bjoern Haase <bjoern.m.haase@web.de>
515 * config/tc-avr.c: Add new cpu targets avr6, avr2560 and avr2561.
517 2006-05-23 Thiemo Seufer <ths@mips.com>
518 David Ung <davidu@mips.com>
519 Nigel Stephens <nigel@mips.com>
522 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS): Rename.
523 (ISA_SUPPORTS_DSP_ASE, ISA_SUPPORTS_MT_ASE, ISA_HAS_64BIT_FPRS,
524 ISA_HAS_MXHC1): New macros.
525 (HAVE_32BIT_FPRS): Use ISA_HAS_64BIT_FPRS instead of
526 ISA_HAS_64BIT_REGS. Formatting fixes. Improved comments.
527 (mips_cpu_info): Change to use combined ASE/IS_ISA flag.
528 (MIPS_CPU_IS_ISA, MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP,
529 MIPS_CPU_ASE_MT, MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX): New defines.
530 (mips_after_parse_args): Change default handling of float register
531 size to account for 32bit code with 64bit FP. Better sanity checking
532 of ISA/ASE/ABI option combinations.
533 (s_mipsset): Support switching of GPR and FPR sizes via
534 .set {g,f}p={32,64,default}. Better sanity checking for .set ASE
536 (mips_elf_final_processing): We should record the use of 64bit FP
537 registers in 32bit code but we don't, because ELF header flags are
539 (mips_cpu_info_table): Add ASE flags for CPUs with mandatory ASE
540 extensions. Add 4ksc, 4kec, 4kem, 4kep, 4ksd, m4kp, 24kec, 24kef,
541 24kex, 34kc, 34kf, 34kx, 25kf CPU definitions.
542 (mips_cpu_info_from_isa): Use MIPS_CPU_IS_ISA.
543 * doc/c-mips.texi: Document .set {g,f}p={32,64,default}. Document
544 missing -march options. Document .set arch=CPU. Move .set smartmips
545 to ASE page. Use @code for .set FOO examples.
547 2006-05-23 Jie Zhang <jie.zhang@analog.com>
549 * config/tc-bfin.c (bfin_start_line_hook): Bump line counters
552 2006-05-23 Jie Zhang <jie.zhang@analog.com>
554 * config/bfin-defs.h (bfin_equals): Remove declaration.
555 * config/bfin-parse.y (asm_1): Remove "expr ASSIGN expr".
556 * config/tc-bfin.c (bfin_name_is_register): Remove.
557 (bfin_equals): Remove.
558 * config/tc-bfin.h (TC_EQUAL_IN_INSN): Redefine as 1.
559 (bfin_name_is_register): Remove declaration.
561 2006-05-19 Thiemo Seufer <ths@mips.com>
562 Nigel Stephens <nigel@mips.com>
564 * config/tc-mipc.c (ISA_HAS_ODD_SINGLE_FPR): New define.
565 (mips_oddfpreg_ok): New function.
568 2006-05-19 Thiemo Seufer <ths@mips.com>
569 David Ung <davidu@mips.com>
571 * config/tc-mips.h (tc_mips_regname_to_dw2regnum): Declare.
572 * config/tc-mipc.c (ABI_NEEDS_64BIT_REGS, ISA_HAS_64BIT_REGS,
573 ISA_HAS_DROR, ISA_HAS_ROR): Reformat.
574 (regname, RTYPE_MASK, RTYPE_NUM, RTYPE_FPU, RTYPE_FCC, RTYPE_VEC,
575 RTYPE_GP, RTYPE_CP0, RTYPE_PC, RTYPE_ACC, RTYPE_CCC, RNUM_MASK,
576 RWARN, GENERIC_REGISTER_NUMBERS, FPU_REGISTER_NAMES,
577 FPU_CONDITION_CODE_NAMES, COPROC_CONDITION_CODE_NAMES,
578 N32N64_SYMBOLIC_REGISTER_NAMES, O32_SYMBOLIC_REGISTER_NAMES,
579 SYMBOLIC_REGISTER_NAMES, MIPS16_SPECIAL_REGISTER_NAMES,
580 MDMX_VECTOR_REGISTER_NAMES, MIPS_DSP_ACCUMULATOR_NAMES, reg_names,
581 reg_names_o32, reg_names_n32n64): Define register classes.
582 (reg_lookup): New function, use register classes.
583 (md_begin): Reserve register names in the symbol table. Simplify
585 (mips_ip): Fix comment formatting. Handle symbolic COP0 registers.
587 (mips16_ip): Use reg_lookup.
588 (tc_get_register): Likewise.
589 (tc_mips_regname_to_dw2regnum): New function.
591 2006-05-19 Thiemo Seufer <ths@mips.com>
593 * config/tc-arm.c, config/tc-arm.h (tc_arm_regname_to_dw2regnum):
594 Un-constify string argument.
595 * config/tc-i386.c, config/tc-i386.h (tc_x86_regname_to_dw2regnum):
597 * config/tc-m68k.c, config/tc-m68k.h (tc_m68k_regname_to_dw2regnum):
599 * config/tc-ppc.c, config/tc-ppc.h (tc_ppc_regname_to_dw2regnum):
601 * config/tc-s390.c, config/tc-s390.h (tc_s390_regname_to_dw2regnum):
603 * config/tc-sh.c, config/tc-sh.h (sh_regname_to_dw2regnum):
605 * config/tc-sparc.c, config/tc-sparc.h (sparc_regname_to_dw2regnum):
608 2006-05-19 Nathan Sidwell <nathan@codesourcery.com>
610 * gas/config/tc-m68k.c (m68k_init_arch): Move checking of
611 cfloat/m68881 to correct architecture before using it.
613 2006-05-16 Bjoern Haase <bjoern.m.haase@web.de>
615 * config/tc-avr.h (TC_VALIDATE_FIX): Allow fixups for immediate
618 2006-05-15 Paul Brook <paul@codesourcery.com>
620 * config/tc-arm.c (arm_adjust_symtab): Use
621 bfd_is_arm_special_symbol_name.
623 2006-05-15 Bob Wilson <bob.wilson@acm.org>
625 * config/tc-xtensa.c (is_direct_call_opcode, is_branch_jmp_to_next,
626 xg_assemble_vliw_tokens, xtensa_mark_narrow_branches,
627 xtensa_fix_short_loop_frags, is_local_forward_loop, relax_frag_immed):
628 Handle errors from calls to xtensa_opcode_is_* functions.
630 2006-05-14 Thiemo Seufer <ths@mips.com>
632 * config/tc-mips.c (macro_build): Test for currently active
634 (mips16_ip): Reject invalid opcodes.
636 2006-05-11 Carlos O'Donell <carlos@codesourcery.com>
638 * doc/as.texinfo: Rename "Index" to "AS Index",
639 and "ABORT" to "ABORT (COFF)".
641 2006-05-11 Paul Brook <paul@codesourcery.com>
643 * config/tc-arm.c (parse_half): New function.
644 (operand_parse_code): Remove OP_Iffff. Add OP_HALF.
645 (parse_operands): Ditto.
646 (do_mov16): Reject invalid relocations.
647 (do_t_mov16): Ditto. Use Thumb reloc numbers.
648 (insns): Replace Iffff with HALF.
649 (md_apply_fix): Add MOVW and MOVT relocs.
650 (tc_gen_reloc): Ditto.
651 * doc/c-arm.texi: Document relocation operators
653 2006-05-11 Paul Brook <paul@codesourcery.com>
655 * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
657 2006-05-11 Thiemo Seufer <ths@mips.com>
659 * config/tc-mips.c (append_insn): Don't check the range of j or
662 2006-05-11 Pedro Alves <pedro_alves@portugalmail.pt>
664 * config/tc-arm.c (md_pcrel_from_section): Force a bias for
665 relocs against external symbols for WinCE targets.
666 (md_apply_fix): Likewise.
668 2006-05-09 David Ung <davidu@mips.com>
670 * config/tc-mips.c (append_insn): Only warn about an out-of-range
673 2006-05-09 Nick Clifton <nickc@redhat.com>
675 * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups
676 against symbols which are not going to be placed into the symbol
679 2006-05-09 Ben Elliston <bje@au.ibm.com>
681 * expr.c (operand): Remove `if (0 && ..)' statement and
682 subsequently unused target_op label. Collapse `if (1 || ..)'
684 * app.c (do_scrub_chars): Remove unused case 0, as it is handled
685 separately above the switch.
687 2006-05-08 Nick Clifton <nickc@redhat.com>
690 * config/tc-msp430.c (line_separator_character): Define as |.
692 2006-05-08 Thiemo Seufer <ths@mips.com>
693 Nigel Stephens <nigel@mips.com>
694 David Ung <davidu@mips.com>
696 * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
697 (mips_opts): Likewise.
698 (file_ase_smartmips): New variable.
699 (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
700 (macro_build): Handle SmartMIPS instructions.
702 (md_longopts): Add argument handling for smartmips.
703 (md_parse_options, mips_after_parse_args): Likewise.
704 (s_mipsset): Add .set smartmips support.
705 (md_show_usage): Document -msmartmips/-mno-smartmips.
706 * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
708 * doc/c-mips.texi: Likewise.
710 2006-05-08 Alan Modra <amodra@bigpond.net.au>
712 * write.c (relax_segment): Add pass count arg. Don't error on
713 negative org/space on first two passes.
714 (relax_seg_info): New struct.
715 (relax_seg, write_object_file): Adjust.
716 * write.h (relax_segment): Update prototype.
718 2006-05-05 Julian Brown <julian@codesourcery.com>
720 * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
722 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
723 architecture version checks.
724 (insns): Allow overlapping instructions to be used in VFP mode.
726 2006-05-05 H.J. Lu <hongjiu.lu@intel.com>
729 * config/obj-elf.c (obj_elf_change_section): Allow user
730 specified SHF_ALPHA_GPREL.
732 2006-05-05 Bjoern Haase <bjoern.m.haase@web.de>
734 * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups
735 for PMEM related expressions.
737 2006-05-05 Nick Clifton <nickc@redhat.com>
740 * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the
741 insertion of a directory separator character into a string at a
742 given offset. Uses heuristics to decide when to use a backslash
743 character rather than a forward-slash character.
744 (dwarf2_directive_loc): Use the macro.
745 (out_debug_info): Likewise.
747 2006-05-05 Thiemo Seufer <ths@mips.com>
748 David Ung <davidu@mips.com>
750 * config/tc-mips.c (macro_build): Add case 'k' to handle cache
752 (macro): Add new case M_CACHE_AB.
754 2006-05-04 Kazu Hirata <kazu@codesourcery.com>
756 * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
757 (opcode_lookup): Issue a warning for opcode with
758 OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated
759 identical to OT_cinfix3.
760 (TxC3w, TC3w, tC3w): New.
761 (insns): Use tC3w and TC3w for comparison instructions with
764 2006-05-04 Alan Modra <amodra@bigpond.net.au>
766 * subsegs.h (struct frchain): Delete frch_seg.
767 (frchain_root): Delete.
768 (seg_info): Define as macro.
769 * subsegs.c (frchain_root): Delete.
770 (abs_seg_info, und_seg_info, absolute_frchain): Delete.
771 (subsegs_begin, subseg_change): Adjust for above.
772 (subseg_set_rest): Likewise. Add new frchain structs to seginfo
773 rather than to one big list.
774 (subseg_get): Don't special case abs, und sections.
775 (subseg_new, subseg_force_new): Don't set frchainP here.
777 (subsegs_print_statistics): Adjust frag chain control list traversal.
778 * debug.c (dmp_frags): Likewise.
779 * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
780 at frchain_root. Make use of known frchain ordering.
781 (last_frag_for_seg): Likewise.
782 (get_frag_fix): Likewise. Add seg param.
783 (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
784 * write.c (chain_frchains_together_1): Adjust for struct frchain.
785 (SUB_SEGMENT_ALIGN): Likewise.
786 (subsegs_finish): Adjust frchain list traversal.
787 * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
788 (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
789 (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
790 (xtensa_fix_b_j_loop_end_frags): Likewise.
791 (xtensa_fix_close_loop_end_frags): Likewise.
792 (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
793 (retrieve_segment_info): Delete frch_seg initialisation.
795 2006-05-03 Alan Modra <amodra@bigpond.net.au>
797 * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
798 * config/obj-elf.h (obj_sec_set_private_data): Delete.
799 * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
800 * config/tc-mn10300.c (tc_gen_reloc): Likewise.
802 2006-05-02 Joseph Myers <joseph@codesourcery.com>
804 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
806 (md_apply_fix3): Multiply offset by 4 here for
807 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
809 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
810 Jan Beulich <jbeulich@novell.com>
812 * config/tc-i386.c (output_invalid_buf): Change size for
814 * config/tc-tic30.c (output_invalid_buf): Likewise.
816 * config/tc-i386.c (output_invalid): Cast none-ascii char to
818 * config/tc-tic30.c (output_invalid): Likewise.
820 2006-05-02 Daniel Jacobowitz <dan@codesourcery.com>
822 * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
823 (TEXI2POD): Use AM_MAKEINFOFLAGS.
824 (asconfig.texi): Don't set top_srcdir.
825 * doc/as.texinfo: Don't use top_srcdir.
826 * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
828 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
830 * config/tc-i386.c (output_invalid_buf): Change size to 16.
831 * config/tc-tic30.c (output_invalid_buf): Likewise.
833 * config/tc-i386.c (output_invalid): Use snprintf instead of
835 * config/tc-ia64.c (declare_register_set): Likewise.
836 (emit_one_bundle): Likewise.
837 (check_dependencies): Likewise.
838 * config/tc-tic30.c (output_invalid): Likewise.
840 2006-05-02 Paul Brook <paul@codesourcery.com>
842 * config/tc-arm.c (arm_optimize_expr): New function.
843 * config/tc-arm.h (md_optimize_expr): Define
844 (arm_optimize_expr): Add prototype.
845 (TC_FORCE_RELOCATION_SUB_SAME): Define.
847 2006-05-02 Ben Elliston <bje@au.ibm.com>
849 * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
852 * sb.h (sb_list_vector): Move to sb.c.
853 * sb.c (free_list): Use type of sb_list_vector directly.
854 (sb_build): Fix off-by-one error in assertion about `size'.
856 2006-05-01 Ben Elliston <bje@au.ibm.com>
858 * listing.c (listing_listing): Remove useless loop.
859 * macro.c (macro_expand): Remove is_positional local variable.
860 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
861 and simplify surrounding expressions, where possible.
862 (assign_symbol): Likewise.
863 (s_weakref): Likewise.
864 * symbols.c (colon): Likewise.
866 2006-05-01 James Lemke <jwlemke@wasabisystems.com>
868 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
870 2006-04-30 Thiemo Seufer <ths@mips.com>
871 David Ung <davidu@mips.com>
873 * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
874 (mips_immed): New table that records various handling of udi
875 instruction patterns.
876 (mips_ip): Adds udi handling.
878 2006-04-28 Alan Modra <amodra@bigpond.net.au>
880 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
881 of list rather than beginning.
883 2006-04-26 Julian Brown <julian@codesourcery.com>
885 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
886 (is_quarter_float): Rename from above. Simplify slightly.
887 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
889 (parse_neon_mov): Parse floating-point constants.
890 (neon_qfloat_bits): Fix encoding.
891 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
892 preference to integer encoding when using the F32 type.
894 2006-04-26 Julian Brown <julian@codesourcery.com>
896 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
897 zero-initialising structures containing it will lead to invalid types).
898 (arm_it): Add vectype to each operand.
899 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
901 (neon_typed_alias): New structure. Extra information for typed
903 (reg_entry): Add neon type info field.
904 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
905 Break out alternative syntax for coprocessor registers, etc. into...
906 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
907 out from arm_reg_parse.
908 (parse_neon_type): Move. Return SUCCESS/FAIL.
909 (first_error): New function. Call to ensure first error which occurs is
911 (parse_neon_operand_type): Parse exactly one type.
912 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
913 (parse_typed_reg_or_scalar): New function. Handle core of both
914 arm_typed_reg_parse and parse_scalar.
915 (arm_typed_reg_parse): Parse a register with an optional type.
916 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
918 (parse_scalar): Parse a Neon scalar with optional type.
919 (parse_reg_list): Use first_error.
920 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
921 (neon_alias_types_same): New function. Return true if two (alias) types
923 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
925 (insert_reg_alias): Return new reg_entry not void.
926 (insert_neon_reg_alias): New function. Insert type/index information as
927 well as register for alias.
928 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
929 make typed register aliases accordingly.
930 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
932 (s_unreq): Delete type information if present.
933 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
934 (s_arm_unwind_save_mmxwcg): Likewise.
935 (s_arm_unwind_movsp): Likewise.
936 (s_arm_unwind_setfp): Likewise.
937 (parse_shift): Likewise.
938 (parse_shifter_operand): Likewise.
939 (parse_address): Likewise.
940 (parse_tb): Likewise.
941 (tc_arm_regname_to_dw2regnum): Likewise.
942 (md_pseudo_table): Add dn, qn.
943 (parse_neon_mov): Handle typed operands.
944 (parse_operands): Likewise.
945 (neon_type_mask): Add N_SIZ.
946 (N_ALLMODS): New macro.
947 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
948 (el_type_of_type_chk): Add some safeguards.
949 (modify_types_allowed): Fix logic bug.
950 (neon_check_type): Handle operands with types.
951 (neon_three_same): Remove redundant optional arg handling.
952 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
953 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
954 (do_neon_step): Adjust accordingly.
955 (neon_cmode_for_logic_imm): Use first_error.
956 (do_neon_bitfield): Call neon_check_type.
957 (neon_dyadic): Rename to...
958 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
959 to allow modification of type of the destination.
960 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
961 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
962 (do_neon_compare): Make destination be an untyped bitfield.
963 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
964 (neon_mul_mac): Return early in case of errors.
965 (neon_move_immediate): Use first_error.
966 (neon_mac_reg_scalar_long): Fix type to include scalar.
967 (do_neon_dup): Likewise.
968 (do_neon_mov): Likewise (in several places).
969 (do_neon_tbl_tbx): Fix type.
970 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
971 (do_neon_ld_dup): Exit early in case of errors and/or use
973 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
974 Handle .dn/.qn directives.
975 (REGDEF): Add zero for reg_entry neon field.
977 2006-04-26 Julian Brown <julian@codesourcery.com>
979 * config/tc-arm.c (limits.h): Include.
980 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
981 (fpu_vfp_v3_or_neon_ext): Declare constants.
982 (neon_el_type): New enumeration of types for Neon vector elements.
983 (neon_type_el): New struct. Define type and size of a vector element.
984 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
986 (neon_type): Define struct. The type of an instruction.
987 (arm_it): Add 'vectype' for the current instruction.
988 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
989 (vfp_sp_reg_pos): Rename to...
990 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
992 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
993 (Neon D or Q register).
994 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
996 (GE_OPT_PREFIX_BIG): Define constant, for use in...
997 (my_get_expression): Allow above constant as argument to accept
998 64-bit constants with optional prefix.
999 (arm_reg_parse): Add extra argument to return the specific type of
1000 register in when either a D or Q register (REG_TYPE_NDQ) is
1001 requested. Can be NULL.
1002 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
1003 (parse_reg_list): Update for new arm_reg_parse args.
1004 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
1005 (parse_neon_el_struct_list): New function. Parse element/structure
1006 register lists for VLD<n>/VST<n> instructions.
1007 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
1008 (s_arm_unwind_save_mmxwr): Likewise.
1009 (s_arm_unwind_save_mmxwcg): Likewise.
1010 (s_arm_unwind_movsp): Likewise.
1011 (s_arm_unwind_setfp): Likewise.
1012 (parse_big_immediate): New function. Parse an immediate, which may be
1013 64 bits wide. Put results in inst.operands[i].
1014 (parse_shift): Update for new arm_reg_parse args.
1015 (parse_address): Likewise. Add parsing of alignment specifiers.
1016 (parse_neon_mov): Parse the operands of a VMOV instruction.
1017 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
1018 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
1019 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
1020 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
1021 (parse_operands): Handle new codes above.
1022 (encode_arm_vfp_sp_reg): Rename to...
1023 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
1024 selected VFP version only supports D0-D15.
1025 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
1026 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
1027 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
1028 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
1029 encode_arm_vfp_reg name, and allow 32 D regs.
1030 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
1031 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
1033 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
1034 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
1035 constant-load and conversion insns introduced with VFPv3.
1036 (neon_tab_entry): New struct.
1037 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
1038 those which are the targets of pseudo-instructions.
1039 (neon_opc): Enumerate opcodes, use as indices into...
1040 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
1041 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
1042 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
1043 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
1045 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
1047 (neon_type_mask): New. Compact type representation for type checking.
1048 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
1049 permitted type combinations.
1050 (N_IGNORE_TYPE): New macro.
1051 (neon_check_shape): New function. Check an instruction shape for
1052 multiple alternatives. Return the specific shape for the current
1054 (neon_modify_type_size): New function. Modify a vector type and size,
1055 depending on the bit mask in argument 1.
1056 (neon_type_promote): New function. Convert a given "key" type (of an
1057 operand) into the correct type for a different operand, based on a bit
1059 (type_chk_of_el_type): New function. Convert a type and size into the
1060 compact representation used for type checking.
1061 (el_type_of_type_ckh): New function. Reverse of above (only when a
1062 single bit is set in the bit mask).
1063 (modify_types_allowed): New function. Alter a mask of allowed types
1064 based on a bit mask of modifications.
1065 (neon_check_type): New function. Check the type of the current
1066 instruction against the variable argument list. The "key" type of the
1067 instruction is returned.
1068 (neon_dp_fixup): New function. Fill in and modify instruction bits for
1069 a Neon data-processing instruction depending on whether we're in ARM
1070 mode or Thumb-2 mode.
1071 (neon_logbits): New function.
1072 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
1073 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
1074 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
1075 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
1076 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
1077 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
1078 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1079 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
1080 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
1081 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
1082 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
1083 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
1084 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
1085 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
1086 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
1087 (neon_move_immediate, do_neon_mvn, neon_mixed_length)
1088 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
1089 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
1090 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
1091 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
1092 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
1093 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
1094 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
1095 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
1096 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
1098 (parse_neon_type): New function. Parse Neon type specifier.
1099 (opcode_lookup): Allow parsing of Neon type specifiers.
1100 (REGNUM2, REGSETH, REGSET2): New macros.
1101 (reg_names): Add new VFPv3 and Neon registers.
1102 (NUF, nUF, NCE, nCE): New macros for opcode table.
1103 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
1104 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
1105 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
1106 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
1107 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
1108 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
1109 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
1110 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
1111 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
1112 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
1113 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
1114 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
1115 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
1116 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
1118 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
1119 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
1120 (arm_option_cpu_value): Add vfp3 and neon.
1121 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
1124 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1126 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
1127 syntax instead of hardcoded opcodes with ".w18" suffixes.
1128 (wide_branch_opcode): New.
1129 (build_transition): Use it to check for wide branch opcodes with
1130 either ".w18" or ".w15" suffixes.
1132 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1134 * config/tc-xtensa.c (xtensa_create_literal_symbol,
1135 xg_assemble_literal, xg_assemble_literal_space): Do not set the
1136 frag's is_literal flag.
1138 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1140 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
1142 2006-04-23 Kazu Hirata <kazu@codesourcery.com>
1144 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
1145 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
1146 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
1147 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
1148 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
1150 2005-04-20 Paul Brook <paul@codesourcery.com>
1152 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
1154 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
1156 2006-04-19 Alan Modra <amodra@bigpond.net.au>
1158 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
1159 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
1160 Make some cpus unsupported on ELF. Run "make dep-am".
1161 * Makefile.in: Regenerate.
1163 2006-04-19 Alan Modra <amodra@bigpond.net.au>
1165 * configure.in (--enable-targets): Indent help message.
1166 * configure: Regenerate.
1168 2006-04-18 H.J. Lu <hongjiu.lu@intel.com>
1171 * config/tc-i386.c (i386_immediate): Check illegal immediate
1174 2006-04-18 Alan Modra <amodra@bigpond.net.au>
1176 * config/tc-i386.c: Formatting.
1177 (output_disp, output_imm): ISO C90 params.
1179 * frags.c (frag_offset_fixed_p): Constify args.
1180 * frags.h (frag_offset_fixed_p): Ditto.
1182 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
1183 (COFF_MAGIC): Delete.
1185 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
1187 2006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
1189 * po/POTFILES.in: Regenerated.
1191 2006-04-16 Mark Mitchell <mark@codesourcery.com>
1193 * doc/as.texinfo: Mention that some .type syntaxes are not
1194 supported on all architectures.
1196 2006-04-14 Sterling Augustine <sterling@tensilica.com>
1198 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
1199 instructions when such transformations have been disabled.
1201 2006-04-10 Sterling Augustine <sterling@tensilica.com>
1203 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
1204 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
1205 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
1206 decoding the loop instructions. Remove current_offset variable.
1207 (xtensa_fix_short_loop_frags): Likewise.
1208 (min_bytes_to_other_loop_end): Remove current_offset argument.
1210 2006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl>
1212 * config/tc-z80.c (z80_optimize_expr): Removed.
1213 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
1215 2006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
1217 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
1218 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
1219 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
1220 atmega644, atmega329, atmega3290, atmega649, atmega6490,
1221 atmega406, atmega640, atmega1280, atmega1281, at90can32,
1222 at90can64, at90usb646, at90usb647, at90usb1286 and
1224 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
1226 2006-04-07 Paul Brook <paul@codesourcery.com>
1228 * config/tc-arm.c (parse_operands): Set default error message.
1230 2006-04-07 Paul Brook <paul@codesourcery.com>
1232 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
1234 2006-04-07 Paul Brook <paul@codesourcery.com>
1236 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
1238 2006-04-07 Paul Brook <paul@codesourcery.com>
1240 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
1241 (move_or_literal_pool): Handle Thumb-2 instructions.
1242 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
1244 2006-04-07 Alan Modra <amodra@bigpond.net.au>
1247 * config/tc-i386.c (match_template): Move 64-bit operand tests
1250 2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
1252 * po/Make-in: Add install-html target.
1253 * Makefile.am: Add install-html and install-html-recursive targets.
1254 * Makefile.in: Regenerate.
1255 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
1256 * configure: Regenerate.
1257 * doc/Makefile.am: Add install-html and install-html-am targets.
1258 * doc/Makefile.in: Regenerate.
1260 2006-04-06 Alan Modra <amodra@bigpond.net.au>
1262 * frags.c (frag_offset_fixed_p): Reinitialise offset before
1265 2006-04-05 Richard Sandiford <richard@codesourcery.com>
1266 Daniel Jacobowitz <dan@codesourcery.com>
1268 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
1269 (GOTT_BASE, GOTT_INDEX): New.
1270 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
1271 GOTT_INDEX when generating VxWorks PIC.
1272 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
1273 use the generic *-*-vxworks* stanza instead.
1275 2006-04-04 Alan Modra <amodra@bigpond.net.au>
1278 * frags.c (frag_offset_fixed_p): New function.
1279 * frags.h (frag_offset_fixed_p): Declare.
1280 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
1281 (resolve_expression): Likewise.
1283 2006-04-03 Sterling Augustine <sterling@tensilica.com>
1285 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
1286 of the same length but different numbers of slots.
1288 2006-03-30 Andreas Schwab <schwab@suse.de>
1290 * configure.in: Fix help string for --enable-targets option.
1291 * configure: Regenerate.
1293 2006-03-28 Nathan Sidwell <nathan@codesourcery.com>
1295 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
1296 (m68k_ip): ... here. Use for all chips. Protect against buffer
1297 overrun and avoid excessive copying.
1299 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
1300 m68020_control_regs, m68040_control_regs, m68060_control_regs,
1301 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
1302 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
1303 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
1304 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
1305 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
1306 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
1307 mcf5282_ctrl, mcfv4e_ctrl): ... these.
1308 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
1309 (struct m68k_cpu): Change chip field to control_regs.
1310 (current_chip): Remove.
1311 (control_regs): New.
1312 (m68k_archs, m68k_extensions): Adjust.
1313 (m68k_cpus): Reorder to be in cpu number order. Adjust.
1314 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
1315 (find_cf_chip): Reimplement for new organization of cpu table.
1316 (select_control_regs): Remove.
1318 (struct save_opts): Save control regs, not chip.
1319 (s_save, s_restore): Adjust.
1320 (m68k_lookup_cpu): Give deprecated warning when necessary.
1321 (m68k_init_arch): Adjust.
1322 (md_show_usage): Adjust for new cpu table organization.
1324 2006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
1326 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
1327 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
1328 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
1330 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
1331 (any_gotrel): New rule.
1332 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
1333 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
1335 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
1336 (bfin_pic_ptr): New function.
1337 (md_pseudo_table): Add it for ".picptr".
1338 (OPTION_FDPIC): New macro.
1339 (md_longopts): Add -mfdpic.
1340 (md_parse_option): Handle it.
1341 (md_begin): Set BFD flags.
1342 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
1343 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
1345 * Makefile.am (bfin-parse.o): Update dependencies.
1346 (DEPTC_bfin_elf): Likewise.
1347 * Makefile.in: Regenerate.
1349 2006-03-25 Richard Sandiford <richard@codesourcery.com>
1351 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
1352 mcfemac instead of mcfmac.
1354 2006-03-23 Michael Matz <matz@suse.de>
1356 * config/tc-i386.c (type_names): Correct placement of 'static'.
1357 (reloc): Map some more relocs to their 64 bit counterpart when
1359 (output_insn): Work around breakage if DEBUG386 is defined.
1360 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
1361 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
1362 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
1363 different from i386.
1364 (output_imm): Ditto.
1365 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
1367 (md_convert_frag): Jumps can now be larger than 2GB away, error
1369 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
1370 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
1372 2006-03-22 Richard Sandiford <richard@codesourcery.com>
1373 Daniel Jacobowitz <dan@codesourcery.com>
1374 Phil Edwards <phil@codesourcery.com>
1375 Zack Weinberg <zack@codesourcery.com>
1376 Mark Mitchell <mark@codesourcery.com>
1377 Nathan Sidwell <nathan@codesourcery.com>
1379 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
1380 (md_begin): Complain about -G being used for PIC. Don't change
1381 the text, data and bss alignments on VxWorks.
1382 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
1383 generating VxWorks PIC.
1384 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
1385 (macro): Likewise, but do not treat la $25 specially for
1386 VxWorks PIC, and do not handle jal.
1387 (OPTION_MVXWORKS_PIC): New macro.
1388 (md_longopts): Add -mvxworks-pic.
1389 (md_parse_option): Don't complain about using PIC and -G together here.
1390 Handle OPTION_MVXWORKS_PIC.
1391 (md_estimate_size_before_relax): Always use the first relaxation
1392 sequence on VxWorks.
1393 * config/tc-mips.h (VXWORKS_PIC): New.
1395 2006-03-21 Paul Brook <paul@codesourcery.com>
1397 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
1399 2006-03-21 Sterling Augustine <sterling@tensilica.com>
1401 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
1402 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
1403 (get_loop_align_size): New.
1404 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
1405 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
1406 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
1407 (get_noop_aligned_address): Use get_loop_align_size.
1408 (get_aligned_diff): Likewise.
1410 2006-03-21 Paul Brook <paul@codesourcery.com>
1412 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
1414 2006-03-20 Paul Brook <paul@codesourcery.com>
1416 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
1417 (do_t_branch): Encode branches inside IT blocks as unconditional.
1418 (do_t_cps): New function.
1419 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
1420 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
1421 (opcode_lookup): Allow conditional suffixes on all instructions in
1423 (md_assemble): Advance condexec state before checking for errors.
1424 (insns): Use do_t_cps.
1426 2006-03-20 Paul Brook <paul@codesourcery.com>
1428 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
1429 outputting the insn.
1431 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1433 * config/tc-vax.c: Update copyright year.
1434 * config/tc-vax.h: Likewise.
1436 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1438 * config/tc-vax.c (md_chars_to_number): Used only locally, so
1440 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
1442 2006-03-17 Paul Brook <paul@codesourcery.com>
1444 * config/tc-arm.c (insns): Add ldm and stm.
1446 2006-03-17 Ben Elliston <bje@au.ibm.com>
1449 * doc/as.texinfo (Ident): Document this directive more thoroughly.
1451 2006-03-16 Paul Brook <paul@codesourcery.com>
1453 * config/tc-arm.c (insns): Add "svc".
1455 2006-03-13 Bob Wilson <bob.wilson@acm.org>
1457 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
1458 flag and avoid double underscore prefixes.
1460 2006-03-10 Paul Brook <paul@codesourcery.com>
1462 * config/tc-arm.c (md_begin): Handle EABIv5.
1463 (arm_eabis): Add EF_ARM_EABI_VER5.
1464 * doc/c-arm.texi: Document -meabi=5.
1466 2006-03-10 Ben Elliston <bje@au.ibm.com>
1468 * app.c (do_scrub_chars): Simplify string handling.
1470 2006-03-07 Richard Sandiford <richard@codesourcery.com>
1471 Daniel Jacobowitz <dan@codesourcery.com>
1472 Zack Weinberg <zack@codesourcery.com>
1473 Nathan Sidwell <nathan@codesourcery.com>
1474 Paul Brook <paul@codesourcery.com>
1475 Ricardo Anguiano <anguiano@codesourcery.com>
1476 Phil Edwards <phil@codesourcery.com>
1478 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
1479 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
1481 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
1482 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
1483 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
1485 2006-03-06 Bob Wilson <bob.wilson@acm.org>
1487 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
1488 even when using the text-section-literals option.
1490 2006-03-06 Nathan Sidwell <nathan@codesourcery.com>
1492 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
1494 (m68k_ip): <case 'J'> Check we have some control regs.
1495 (md_parse_option): Allow raw arch switch.
1496 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
1497 whether 68881 or cfloat was meant by -mfloat.
1498 (md_show_usage): Adjust extension display.
1499 (m68k_elf_final_processing): Adjust.
1501 2006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
1503 * config/tc-avr.c (avr_mod_hash_value): New function.
1504 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
1505 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
1506 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
1507 instead of int avr_ldi_expression: use avr_mod_hash_value instead
1509 (tc_gen_reloc): Handle substractions of symbols, if possible do
1510 fixups, abort otherwise.
1511 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
1512 tc_fix_adjustable): Define.
1514 2006-03-02 James E Wilson <wilson@specifix.com>
1516 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
1517 change the template, then clear md.slot[curr].end_of_insn_group.
1519 2006-02-28 Jan Beulich <jbeulich@novell.com>
1521 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
1523 2006-02-28 Jan Beulich <jbeulich@novell.com>
1526 * macro.c (getstring): Don't treat parentheses special anymore.
1527 (get_any_string): Don't consider '(' and ')' as quoting anymore.
1528 Special-case '(', ')', '[', and ']' when dealing with non-quoting
1531 2006-02-28 Mat <mat@csail.mit.edu>
1533 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
1535 2006-02-27 Jakub Jelinek <jakub@redhat.com>
1537 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
1539 (CFI_signal_frame): Define.
1540 (cfi_pseudo_table): Add .cfi_signal_frame.
1541 (dot_cfi): Handle CFI_signal_frame.
1542 (output_cie): Handle cie->signal_frame.
1543 (select_cie_for_fde): Don't share CIE if signal_frame flag is
1544 different. Copy signal_frame from FDE to newly created CIE.
1545 * doc/as.texinfo: Document .cfi_signal_frame.
1547 2006-02-27 Carlos O'Donell <carlos@codesourcery.com>
1549 * doc/Makefile.am: Add html target.
1550 * doc/Makefile.in: Regenerate.
1551 * po/Make-in: Add html target.
1553 2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
1555 * config/tc-i386.c (output_insn): Support Intel Merom New
1558 * config/tc-i386.h (CpuMNI): New.
1559 (CpuUnknownFlags): Add CpuMNI.
1561 2006-02-24 David S. Miller <davem@sunset.davemloft.net>
1563 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
1564 (hpriv_reg_table): New table for hyperprivileged registers.
1565 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
1568 2006-02-24 DJ Delorie <dj@redhat.com>
1570 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
1571 (tc_gen_reloc): Don't define.
1572 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
1573 (OPTION_LINKRELAX): New.
1574 (md_longopts): Add it.
1576 (md_parse_options): Set it.
1577 (md_assemble): Emit relaxation relocs as needed.
1578 (md_convert_frag): Emit relaxation relocs as needed.
1579 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
1580 (m32c_apply_fix): New.
1581 (tc_gen_reloc): New.
1582 (m32c_force_relocation): Force out jump relocs when relaxing.
1583 (m32c_fix_adjustable): Return false if relaxing.
1585 2006-02-24 Paul Brook <paul@codesourcery.com>
1587 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
1588 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
1589 (struct asm_barrier_opt): Define.
1590 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
1591 (parse_psr): Accept V7M psr names.
1592 (parse_barrier): New function.
1593 (enum operand_parse_code): Add OP_oBARRIER.
1594 (parse_operands): Implement OP_oBARRIER.
1595 (do_barrier): New function.
1596 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
1597 (do_t_cpsi): Add V7M restrictions.
1598 (do_t_mrs, do_t_msr): Validate V7M variants.
1599 (md_assemble): Check for NULL variants.
1600 (v7m_psrs, barrier_opt_names): New tables.
1601 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
1602 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
1603 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
1604 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
1605 (struct cpu_arch_ver_table): Define.
1606 (cpu_arch_ver): New.
1607 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
1608 Tag_CPU_arch_profile.
1609 * doc/c-arm.texi: Document new cpu and arch options.
1611 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1613 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
1615 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1617 * config/tc-ia64.c: Update copyright years.
1619 2006-02-22 H.J. Lu <hongjiu.lu@intel.com>
1621 * config/tc-ia64.c (specify_resource): Add the rule 17 from
1624 2005-02-22 Paul Brook <paul@codesourcery.com>
1626 * config/tc-arm.c (do_pld): Remove incorrect write to
1628 (encode_thumb32_addr_mode): Use correct operand.
1630 2006-02-21 Paul Brook <paul@codesourcery.com>
1632 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
1634 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
1635 Anil Paranjape <anilp1@kpitcummins.com>
1636 Shilin Shakti <shilins@kpitcummins.com>
1638 * Makefile.am: Add xc16x related entry.
1639 * Makefile.in: Regenerate.
1640 * configure.in: Added xc16x related entry.
1641 * configure: Regenerate.
1642 * config/tc-xc16x.h: New file
1643 * config/tc-xc16x.c: New file
1644 * doc/c-xc16x.texi: New file for xc16x
1645 * doc/all.texi: Entry for xc16x
1646 * doc/Makefile.texi: Added c-xc16x.texi
1647 * NEWS: Announce the support for the new target.
1649 2006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
1651 * configure.tgt: set emulation for mips-*-netbsd*
1653 2006-02-14 Jakub Jelinek <jakub@redhat.com>
1655 * config.in: Rebuilt.
1657 2006-02-13 Bob Wilson <bob.wilson@acm.org>
1659 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
1660 from 1, not 0, in error messages.
1661 (md_assemble): Simplify special-case check for ENTRY instructions.
1662 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
1663 operand in error message.
1665 2006-02-13 Joseph S. Myers <joseph@codesourcery.com>
1667 * configure.tgt (arm-*-linux-gnueabi*): Change to
1670 2006-02-10 Nick Clifton <nickc@redhat.com>
1672 * config/tc-crx.c (check_range): Ensure that the sign bit of a
1673 32-bit value is propagated into the upper bits of a 64-bit long.
1675 * config/tc-arc.c (init_opcode_tables): Fix cast.
1676 (arc_extoper, md_operand): Likewise.
1678 2006-02-09 David Heine <dlheine@tensilica.com>
1680 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
1681 each relaxation step.
1683 2006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
1685 * configure.in (CHECK_DECLS): Add vsnprintf.
1686 * configure: Regenerate.
1687 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
1688 include/declare here, but...
1689 * as.h: Move code detecting VARARGS idiom to the top.
1690 (errno.h, stdarg.h, varargs.h, va_list): ...here.
1691 (vsnprintf): Declare if not already declared.
1693 2006-02-08 H.J. Lu <hongjiu.lu@intel.com>
1695 * as.c (close_output_file): New.
1696 (main): Register close_output_file with xatexit before
1697 dump_statistics. Don't call output_file_close.
1699 2006-02-07 Nathan Sidwell <nathan@codesourcery.com>
1701 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
1702 mcf5329_control_regs): New.
1703 (not_current_architecture, selected_arch, selected_cpu): New.
1704 (m68k_archs, m68k_extensions): New.
1705 (archs): Renamed to ...
1706 (m68k_cpus): ... here. Adjust.
1708 (md_pseudo_table): Add arch and cpu directives.
1709 (find_cf_chip, m68k_ip): Adjust table scanning.
1710 (no_68851, no_68881): Remove.
1711 (md_assemble): Lazily initialize.
1712 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
1713 (md_init_after_args): Move functionality to m68k_init_arch.
1714 (mri_chip): Adjust table scanning.
1715 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
1716 options with saner parsing.
1717 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
1718 m68k_init_arch): New.
1719 (s_m68k_cpu, s_m68k_arch): New.
1720 (md_show_usage): Adjust.
1721 (m68k_elf_final_processing): Set CF EF flags.
1722 * config/tc-m68k.h (m68k_init_after_args): Remove.
1723 (tc_init_after_args): Remove.
1724 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
1725 (M68k-Directives): Document .arch and .cpu directives.
1727 2006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl>
1729 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
1730 synonyms for equ and defl.
1731 (z80_cons_fix_new): New function.
1732 (emit_byte): Disallow relative jumps to absolute locations.
1733 (emit_data): Only handle defb, prototype changed, because defb is
1734 now handled as pseudo-op rather than an instruction.
1735 (instab): Entries for defb,defw,db,dw moved from here...
1736 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
1737 Add entries for def24,def32,d24,d32.
1738 (md_assemble): Improved error handling.
1739 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
1740 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
1741 (z80_cons_fix_new): Declare.
1742 * doc/c-z80.texi (defb, db): Mention warning on overflow.
1743 (def24,d24,def32,d32): New pseudo-ops.
1745 2006-02-02 Paul Brook <paul@codesourcery.com>
1747 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
1749 2005-02-02 Paul Brook <paul@codesourcery.com>
1751 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
1752 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
1753 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
1754 T2_OPCODE_RSB): Define.
1755 (thumb32_negate_data_op): New function.
1756 (md_apply_fix): Use it.
1758 2006-01-31 Bob Wilson <bob.wilson@acm.org>
1760 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
1762 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
1763 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
1765 (relaxation_requirements): Add pfinish_frag argument and use it to
1766 replace setting tinsn->record_fix fields.
1767 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
1768 and vinsn_to_insnbuf. Remove references to record_fix and
1769 slot_sub_symbols fields.
1770 (xtensa_mark_narrow_branches): Delete unused code.
1771 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
1773 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
1775 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
1776 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
1777 of the record_fix field. Simplify error messages for unexpected
1779 (set_expr_symbol_offset_diff): Delete.
1781 2006-01-31 Paul Brook <paul@codesourcery.com>
1783 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
1785 2006-01-31 Paul Brook <paul@codesourcery.com>
1786 Richard Earnshaw <rearnsha@arm.com>
1788 * config/tc-arm.c: Use arm_feature_set.
1789 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
1790 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
1791 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
1794 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
1795 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
1796 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
1797 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
1799 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
1800 (arm_opts): Move old cpu/arch options from here...
1801 (arm_legacy_opts): ... to here.
1802 (md_parse_option): Search arm_legacy_opts.
1803 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
1804 (arm_float_abis, arm_eabis): Make const.
1806 2006-01-25 Bob Wilson <bob.wilson@acm.org>
1808 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
1810 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1812 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
1813 in load immediate intruction.
1815 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1817 * config/bfin-parse.y (value_match): Use correct conversion
1818 specifications in template string for __FILE__ and __LINE__.
1822 2006-01-18 Alexandre Oliva <aoliva@redhat.com>
1824 Introduce TLS descriptors for i386 and x86_64.
1825 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
1826 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
1827 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
1828 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
1829 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
1831 (build_modrm_byte): Set up zero modrm for TLS desc calls.
1832 (lex_got): Handle @tlsdesc and @tlscall.
1833 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
1835 2006-01-11 Nick Clifton <nickc@redhat.com>
1837 Fixes for building on 64-bit hosts:
1838 * config/tc-avr.c (mod_index): New union to allow conversion
1839 between pointers and integers.
1840 (md_begin, avr_ldi_expression): Use it.
1841 * config/tc-i370.c (md_assemble): Add cast for argument to print
1843 * config/tc-tic54x.c (subsym_substitute): Likewise.
1844 * config/tc-mn10200.c (md_assemble): Use a union to convert the
1845 opindex field of fr_cgen structure into a pointer so that it can
1846 be stored in a frag.
1847 * config/tc-mn10300.c (md_assemble): Likewise.
1848 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
1850 * config/tc-v850.c: Replace uses of (int) casts with correct
1853 2006-01-09 H.J. Lu <hongjiu.lu@intel.com>
1856 * symbols.c (snapshot_symbol): Don't change a defined symbol.
1858 2006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
1861 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
1862 a local-label reference.
1864 For older changes see ChangeLog-2005
1870 version-control: never