2006-09-16 Paul Brook <paul@codesourcery.com>
[deliverable/binutils-gdb.git] / gas / ChangeLog
1 2006-09-16 Paul Brook <paul@codesourcery.com>
2
3 * config/tc-arm.c (s_arm_unwind_movsp): Add offset argument.
4 * doc/c-arm.texi (movsp): Document offset argument.
5
6 2006-09-16 Paul Brook <paul@codesourcery.com>
7
8 * config/tc-arm.c (thumb32_negate_data_op): Consistently use
9 unsigned int to avoid 64-bit host problems.
10
11 2006-09-15 Bernd Schmidt <bernd.schmidt@analog.com>
12
13 * config/bfin-parse.y (binary): Do some more constant folding for
14 additions.
15
16 2006-09-13 Jan Beulich <jbeulich@novell.com>
17
18 * input-file.c (input_file_give_next_buffer): Demote as_bad to
19 as_warn.
20
21 2006-09-13 Alan Modra <amodra@bigpond.net.au>
22
23 PR gas/3165
24 * config/tc-sh (DWARF2_CIE_DATA_ALIGNMENT): Wrap negative number
25 in parens.
26
27 2006-09-13 Alan Modra <amodra@bigpond.net.au>
28
29 * input-file.c (input_file_open): Replace as_perror with as_bad
30 so that gas exits with error on file errors. Correct error
31 message.
32 (input_file_get, input_file_give_next_buffer): Likewise.
33 * input-file.h: Update comment.
34
35 2006-09-11 Tomas Frydrych <dr.tomas@yahoo.co.uk>
36
37 PR gas/3172
38 * config/tc-arm.c (parse_typed_reg_or_scalar): Accept wCg class
39 registers as a sub-class of wC registers.
40
41 2006-09-11 Alan Modra <amodra@bigpond.net.au>
42
43 PR gas/3165
44 * config/tc-mips.h (enum dwarf2_format): Forward declare.
45 (DWARF2_CIE_DATA_ALIGNMENT): Wrap negative number in parens.
46 * config/tc-alpha.h (DWARF2_CIE_DATA_ALIGNMENT): Likewise.
47 * config/tc-arm.h (DWARF2_CIE_DATA_ALIGNMENT): Likewise.
48
49 2006-09-08 Nick Clifton <nickc@redhat.com>
50
51 PR gas/3129
52 * doc/as.texinfo (Macro): Improve documentation about separating
53 macro arguments from following text.
54
55 2006-09-08 Paul Brook <paul@codesourcery.com>
56
57 * config/tc-arm.c (insns): Allow ARM IT pseudo-insn on all cores.
58
59 2006-09-07 Paul Brook <paul@codesourcery.com>
60
61 * config/tc-arm.c (parse_operands): Mark operand as present.
62
63 2006-09-04 Paul Brook <paul@codesourcery.com>
64
65 * config/tc-arm.c (do_neon_dyadic_if_i): Remove.
66 (do_neon_dyadic_if_i_d): Avoid setting U bit.
67 (do_neon_mac_maybe_scalar): Ditto.
68 (do_neon_dyadic_narrow): Force operand type to NT_integer.
69 (insns): Remove out of date comments.
70
71 2006-08-29 Nick Clifton <nickc@redhat.com>
72
73 * read.c (s_align): Initialize the 'stopc' variable to prevent
74 compiler complaints about it being used without being
75 initialized.
76 (s_comm_internal, s_mri_common, s_fail, s_globl, s_space,
77 s_float_space, s_struct, cons_worker, equals): Likewise.
78
79 2006-08-29 Malcolm Parsons <malcolm.parsons@gmail.com>
80
81 * ecoff.c (ecoff_directive_val): Fix message typo.
82 * config/tc-ns32k.c (convert_iif): Likewise.
83 * config/tc-sh64.c (shmedia_check_limits): Likewise.
84
85 2006-08-25 Sterling Augustine <sterling@tensilica.com>
86 Bob Wilson <bob.wilson@acm.org>
87
88 * config/tc-xtensa.c (xtensa_mark_literal_pool_location): Do not check
89 the state of the absolute_literals directive. Remove align frag at
90 the start of the literal pool position.
91
92 2006-08-25 Bob Wilson <bob.wilson@acm.org>
93
94 * doc/c-xtensa.texi: Add @group commands in examples.
95
96 2006-08-24 Bob Wilson <bob.wilson@acm.org>
97
98 * config/tc-xtensa.c (FINI_LITERAL_SECTION_NAME): Delete.
99 (INIT_LITERAL_SECTION_NAME): Delete.
100 (lit_state struct): Remove segment names, init_lit_seg, and
101 fini_lit_seg. Add lit_prefix and current_text_seg.
102 (init_literal_head_h, init_literal_head): Delete.
103 (fini_literal_head_h, fini_literal_head): Delete.
104 (xtensa_begin_directive): Move argument parsing to
105 xtensa_literal_prefix function.
106 (xtensa_end_directive): Deallocate lit_prefix field of lit_state.
107 (xtensa_literal_prefix): Parse the directive argument here and
108 record it in the lit_prefix field. Remove code to derive literal
109 section names.
110 (linkonce_len): New.
111 (get_is_linkonce_section): Use linkonce_len. Check for any
112 ".gnu.linkonce.*" section, not just text sections.
113 (md_begin): Remove initialization of deleted lit_state fields.
114 (xtensa_reorder_segments, xtensa_post_relax_hook): Remove references
115 to init_literal_head and fini_literal_head.
116 (xtensa_move_literals): Likewise. Skip literals for .init and .fini
117 when traversing literal_head list.
118 (match_section_group): New.
119 (cache_literal_section): Rewrite to determine the literal section
120 name on the fly, create the section and return it.
121 (xtensa_switch_to_literal_fragment): Adjust for cache_literal_section.
122 (xtensa_switch_to_non_abs_literal_fragment): Likewise.
123 (xtensa_create_property_segments, xtensa_create_xproperty_segments):
124 Use xtensa_get_property_section from bfd.
125 (retrieve_xtensa_section): Delete.
126 * doc/c-xtensa.texi (Xtensa Options): Fix --text-section-literals
127 description to refer to plural literal sections and add xref to
128 the Literal Directive section.
129 (Literal Directive): Describe new rules for deriving literal section
130 names. Add footnote for special case of .init/.fini with
131 --text-section-literals.
132 (Literal Prefix Directive): Replace old naming rules with xref to the
133 Literal Directive section.
134
135 2006-08-21 Joseph Myers <joseph@codesourcery.com>
136
137 * config/tc-arm.c (s_arm_unwind_save_mmxwr): Correct condition for
138 merging with previous long opcode.
139
140 2006-08-22 Pedro Alves <pedro_alves@portugalmail.pt>
141
142 * Makefile.am (TARG_ENV_HFILES): Add te-wince-pe.h.
143 * Makefile.in: Regenerate.
144 * config/tc-arm.h [TARGET_FORMAT]: ARM wince bfd names were
145 renamed. Adjust.
146
147 2006-08-16 Julian Brown <julian@codesourcery.com>
148
149 * config/tc-arm.c (md_assemble): Improve diagnostic when attempting
150 to use ARM instructions on non-ARM-supporting cores.
151 (autoselect_thumb_from_cpu_variant): New function. Switch on Thumb
152 mode automatically based on cpu variant.
153 (md_begin): Call above function.
154
155 2006-08-16 Julian Brown <julian@codesourcery.com>
156
157 * config/tc-arm.c (opcode_lookup): Allow Neon type suffixes to be
158 recognized in non-unified syntax mode.
159
160 2006-08-15 Thiemo Seufer <ths@mips.com>
161 Nigel Stephens <nigel@mips.com>
162 David Ung <davidu@mips.com>
163
164 * configure.tgt: Handle mips*-sde-elf*.
165
166 2006-08-12 Thiemo Seufer <ths@networkno.de>
167
168 * config/tc-mips.c (mips16_ip): Fix argument register handling
169 for restore instruction.
170
171 2006-08-08 Bob Wilson <bob.wilson@acm.org>
172
173 * dwarf2dbg.c (DWARF2_USE_FIXED_ADVANCE_PC): New.
174 (out_sleb128): New.
175 (out_fixed_inc_line_addr): New.
176 (process_entries): Use out_fixed_inc_line_addr when
177 DWARF2_USE_FIXED_ADVANCE_PC is set.
178 * config/tc-xtensa.h (DWARF2_USE_FIXED_ADVANCE_PC): Define.
179
180 2006-08-08 DJ Delorie <dj@redhat.com>
181
182 * config/tc-sh.c (sh_frob_section): Canonicalize pointers to local
183 vs full symbols so that we never have more than one pointer value
184 for any given symbol in our symbol table.
185
186 2006-08-08 Sterling Augustine <sterling@tensilica.com>
187
188 * dwarf2dbg.c (out_debug_info): Add new parameter ranges_seg
189 and emit DW_AT_ranges when code in compilation unit is not
190 contiguous.
191 (out_debug_abbrev): Emit DW_AT_ranges abbreviation if code in
192 is not contiguous.
193 (dwarf2_finish): Create and pass ranges_seg to out_debug_info.
194 (out_debug_ranges): New function to emit .debug_ranges section
195 when code is not contiguous.
196
197 2006-08-08 Nick Clifton <nickc@redhat.com>
198
199 * config/tc-arm.c (WARN_DEPRECATED): Enable.
200
201 2006-08-05 Pedro Alves <pedro_alves@portugalmail.pt>
202
203 * config/tc-arm.c: Move "dwarf2dbg.h" inclusion out of OBJ_ELF
204 only block.
205 (pe_directive_secrel) [TE_PE]: New function.
206 (md_pseudo_table) [!OBJ_ELF]: Handle 2byte, 4byte, 8byte, file,
207 loc, loc_mark_labels.
208 [TE_PE]: Handle secrel32.
209 (output_relax_insn): Remove OBJ_ELF around dwarf2_emit_insn
210 call.
211 (output_inst): Remove OBJ_ELF around dwarf2_emit_insn call.
212 (arm_frob_label): Remove OBJ_ELF around dwarf2_emit_label call.
213 (md_section_align): Only round section sizes here for AOUT
214 targets.
215 (tc_arm_regname_to_dw2regnum): Move out for OBJ_ELF only block.
216 (tc_pe_dwarf2_emit_offset): New function.
217 (md_apply_fix) [TE_PE]: Handle BFD_RELOC_32_SECREL.
218 (cons_fix_new_arm): Handle O_secrel.
219 * config/tc-arm.h : Move DWARF2_LINE_MIN_INSN_LENGTH,
220 DWARF2_DEFAULT_RETURN_COLUMN and DWARF2_CIE_DATA_ALIGNMENT out
221 of OBJ_ELF only block.
222 [TE_PE]: Define O_secrel, TC_DWARF2_EMIT_OFFSET, and declare
223 tc_pe_dwarf2_emit_offset.
224
225 2006-08-04 Richard Sandiford <richard@codesourcery.com>
226
227 * config/tc-sh.c (apply_full_field_fix): New function.
228 (md_apply_fix): Use it instead of md_number_to_chars. Do not fill
229 in fx_addnumber for BFD_RELOC_32_PLT_PCREL.
230 (tc_gen_reloc): Use fx_addnumber rather than 0 as the default case.
231 * config/tc-sh.h (TARGET_FORMAT): Override for TE_VXWORKS.
232
233 2006-08-03 Nick Clifton <nickc@redhat.com>
234
235 PR gas/2991
236 * config.in: Regenerate.
237
238 2006-08-03 Joseph Myers <joseph@codesourcery.com>
239
240 * config/tc-arm.c (parse_operands): Handle invalid register name
241 for OP_RIWR_RIWC.
242
243 2006-08-03 Joseph Myers <joseph@codesourcery.com>
244
245 * config/tc-arm.c (enum operand_parse_code): Add OP_RIWC_RIWG.
246 (parse_operands): Handle it.
247 (insns): Use it for tmcr and tmrc.
248
249 2006-08-02 Petr Salinger <Petr.Salinger@seznam.cz>
250
251 PR binutils/2983
252 * config/tc-i386.c (md_parse_option): Treat any target starting
253 with elf64_x86_64 as a viable target for the -64 switch.
254 (i386_target_format): For 64-bit ELF flavoured output use
255 ELF_TARGET_FORMAT64.
256 * config/tc-i386.h (ELF_TARGET_FORMAT64): Define.
257
258 2006-08-02 Nick Clifton <nickc@redhat.com>
259
260 PR gas/2991
261 * acinclude.m4 (BFD_BINARY_FOPEN): Import this function from
262 bfd/aclocal.m4.
263 * configure.in: Run BFD_BINARY_FOPEN.
264 * configure: Regenerate.
265 * as.h: Look at USE_BINARY_FOPEN to decide which fopen-*.h header
266 file to include.
267
268 2006-08-01 H.J. Lu <hongjiu.lu@intel.com>
269
270 * config/tc-i386.c (md_assemble): Don't update
271 cpu_arch_isa_flags.
272
273 2006-08-01 Thiemo Seufer <ths@mips.com>
274
275 * config/tc-mips.c (md_section_align): Check ELF-ness at runtime.
276
277 2006-08-01 Thiemo Seufer <ths@mips.com>
278
279 * config/tc-mips.c (macro_build_lui): Fix comment formatting.
280 (md_apply_fix): Likewise. Unify handling of BFD_RELOC_RVA,
281 BFD_RELOC_32 and BFD_RELOC_16.
282 (s_align, s_cpload, s_cplocal, s_cprestore, s_mips_stab,
283 md_convert_frag, md_obj_end): Fix comment formatting.
284
285 2006-07-31 Thiemo Seufer <ths@mips.com>
286
287 * config/tc-mips.c (md_apply_fix, tc_gen_reloc): Remove special
288 handling for BFD_RELOC_MIPS16_JMP.
289
290 2006-07-24 Andreas Schwab <schwab@suse.de>
291
292 PR/2756
293 * read.c (read_a_source_file): Ignore unknown text after line
294 comment character. Fix misleading comment.
295
296 2006-07-24 Ralk Wildenhues <Ralf.Wildenhues@gmx.de>
297
298 * doc/all.texi, doc/as.texinfo, doc/c-arc.texi, doc/c-arm.texi,
299 doc/c-avr.texi, doc/c-bfin.texi, doc/c-i386.texi,
300 doc/c-i960.texi, doc/c-m32r.texi, doc/c-m68k.texi,
301 doc/c-mmix.texi, doc/c-pdp11.texi, doc/c-ppc.texi,
302 doc/c-tic54x.texi, doc/c-v850.texi, doc/c-xtensa.texi,
303 doc/c-z80.texi, doc/internals.texi: Fix some typos.
304
305 2006-07-21 Nick Clifton <nickc@redhat.com>
306
307 * config/tc-sh.c (md_longopts): Add -EL and -EB for use by the
308 linker testsuite.
309
310 2006-07-20 Thiemo Seufer <ths@mips.com>
311 Nigel Stephens <nigel@mips.com>
312
313 * config/tc-mips.c (md_parse_option): Don't infer optimisation
314 options from debug options.
315
316 2006-07-20 Thiemo Seufer <ths@mips.com>
317
318 * config/tc-mips.c (mips_fix_adjustable): Handle BFD_RELOC_MIPS16_JMP.
319 (tc_gen_reloc): Handle mips16 jumps to section symbol offsets.
320
321 2006-07-19 Paul Brook <paul@codesourcery.com>
322
323 * config/tc-arm.c (insns): Fix rbit Arm opcode.
324
325 2006-07-18 Paul Brook <paul@codesourcery.com>
326
327 * tc-arm.c (do_t_add_sub): Use addw/subw when source is PC.
328 (md_convert_frag): Use correct reloc for add_pc. Use
329 BFD_RELOC_ARM_T32_ADD_IMM for normal add/sum.
330 (md_apply_fix): Handle BFD_RELOC_ARM_T32_ADD_IMM.
331 (arm_force_relocation): Handle BFD_RELOC_ARM_T32_ADD_IMM.
332
333 2006-07-17 Mat Hostetter <mat@lcs.mit.edu>
334
335 * symbols.c (report_op_error): Fix pasto. Don't use as_bad_where
336 when file and line unknown.
337
338 2006-07-17 Thiemo Seufer <ths@mips.com>
339
340 * read.c (s_struct): Use IS_ELF.
341 * config/tc-mips.c (md_begin, mips16_mark_labels, mips_ip,
342 md_parse_option, s_change_sec, pic_need_relax, mips_fix_adjustable,
343 tc_gen_reloc, mips_frob_file_after_relocs, s_mips_end, s_mips_frame,
344 s_mips_mask): Likewise.
345
346 2006-07-16 Thiemo Seufer <ths@mips.com>
347 David Ung <davidu@mips.com>
348
349 * read.c (s_struct): Handle ELF section changing.
350 * config/tc-mips.c (s_align): Leave enabling auto-align to the
351 generic code.
352 (s_change_sec): Try section changing only if we output ELF.
353
354 2006-07-15 H.J. Lu <hongjiu.lu@intel.com>
355
356 * config/tc-i386.c (cpu_arch): Remove Cpu086, CpuAthlon and
357 CpuAmdFam10.
358 (smallest_imm_type): Remove Cpu086.
359 (i386_target_format): Likewise.
360
361 * config/tc-i386.h: Remove Cpu086, CpuAthlon and CpuAmdFam10.
362 Update CpuXXX.
363
364 2006-07-13 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
365 Michael Meissner <michael.meissner@amd.com>
366
367 * config/tc-i386.h (PROCESSOR_AMDFAM10): New processor_type.
368 (CpuSSE4a, CpuABM, CpuAmdFam10): New Cpu directives.
369 * config/tc-i386.c (cpu_arch): Add support for AmdFam10
370 architecture.
371 (i386_align_code): Ditto.
372 (md_assemble_code): Add support for insertq/extrq instructions,
373 swapping as needed for intel syntax.
374 (swap_imm_operands): New function to swap immediate operands.
375 (swap_operands): Deal with 4 operand instructions.
376 (build_modrm_byte): Add support for insertq instruction.
377
378 2006-07-13 H.J. Lu <hongjiu.lu@intel.com>
379
380 * config/tc-i386.h (Size64): Fix a typo in comment.
381
382 2006-07-12 Nick Clifton <nickc@redhat.com>
383
384 * config/tc-sh.c (md_apply_fix): Do not allow the generic code in
385 fixup_segment() to repeat a range check on a value that has
386 already been checked here.
387
388 2006-07-07 James E Wilson <wilson@specifix.com>
389
390 * config/tc-mips.c (mips_cpu_info_table): Add sb1a.
391
392 2006-07-06 Mohammed Adnène Trojette <adn@diwi.org>
393 Nick Clifton <nickc@redhat.com>
394
395 PR binutils/2877
396 * doc/as.texi: Fix spelling typo: branchs => branches.
397 * doc/c-m68hc11.texi: Likewise.
398 * config/tc-m68hc11.c: Likewise.
399 Support old spelling of command line switch for backwards
400 compatibility.
401
402 2006-07-04 Thiemo Seufer <ths@mips.com>
403 David Ung <davidu@mips.com>
404
405 * config/tc-mips.c (s_is_linkonce): New function.
406 (mips16_mark_labels): Don't adjust mips16 symbol addresses for
407 weak, external, and linkonce symbols.
408 (pic_need_relax): Use s_is_linkonce.
409
410 2006-06-24 H.J. Lu <hongjiu.lu@intel.com>
411
412 * doc/as.texinfo (Org): Remove space.
413 (P2align): Add "@var{abs-expr},".
414
415 2006-06-23 H.J. Lu <hongjiu.lu@intel.com>
416
417 * config/tc-i386.c (cpu_arch_tune_set): New.
418 (cpu_arch_isa): Likewise.
419 (i386_align_code): Use xchg %ax,%ax for 2 byte nop. Optimize
420 nops with short or long nop sequences based on -march=/.arch
421 and -mtune=.
422 (set_cpu_arch): Set cpu_arch_isa. If cpu_arch_tune_set is 0,
423 set cpu_arch_tune and cpu_arch_tune_flags.
424 (md_parse_option): For -march=, set cpu_arch_isa and set
425 cpu_arch_tune and cpu_arch_tune_flags if cpu_arch_tune_set is
426 0. Set cpu_arch_tune_set to 1 for -mtune=.
427 (i386_target_format): Don't set cpu_arch_tune.
428
429 2006-06-23 Nigel Stephens <nigel@mips.com>
430
431 * config/tc-mips.c (nopic_need_relax): Handle -fdata-sections
432 generated .sbss.* and .gnu.linkonce.sb.*.
433
434 2006-06-23 Thiemo Seufer <ths@mips.com>
435 David Ung <davidu@mips.com>
436
437 * config/tc-mips.h (TC_SEGMENT_INFO_TYPE): Declare per-segment
438 label_list.
439 * config/tc-mips.c (label_list): Define per-segment label_list.
440 (mips_clear_insn_labels, mips_move_labels, mips16_mark_labels,
441 append_insn, s_align, s_cons, s_float_cons, s_gpword, s_gpdword,
442 mips_from_file_after_relocs, mips_define_label): Use per-segment
443 label_list.
444
445 2006-06-22 Thiemo Seufer <ths@mips.com>
446
447 * config/tc-mips.c (ISA_SUPPORTS_MIPS16E): New macro.
448 (append_insn): Use it.
449 (md_apply_fix): Whitespace formatting.
450 (md_begin, append_insn, macro, macro2, mips16_immed, mips_align,
451 mips16_extended_frag): Remove register specifier.
452 (md_convert_frag): Likewise. Use TRUE ans FALSE instead of numeric
453 constants.
454
455 2006-06-21 Mark Shinwell <shinwell@codesourcery.com>
456
457 * config/tc-arm.c (s_arm_unwind_save_vfp_armv6): New. Parse
458 a directive saving VFP registers for ARMv6 or later.
459 (s_arm_unwind_save): Add parameter arch_v6 and call
460 s_arm_unwind_save_vfp or s_arm_unwind_save_vfp_armv6 as
461 appropriate.
462 (md_pseudo_table): Add entry for new "vsave" directive.
463 * doc/c-arm.texi: Correct error in example for "save"
464 directive (fstmdf -> fstmdx). Also document "vsave" directive.
465
466 2006-06-18 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
467 Anatoly Sokolov <aesok@post.ru>
468
469 * config/tc-avr.c (mcu_types): Add support for atmega165p, atmega169p
470 and atmega644p devices. Rename atmega164/atmega324 devices to
471 atmega164p/atmega324p.
472 * doc/c-avr.texi: Document new mcu and arch options.
473
474 2006-06-17 Nick Clifton <nickc@redhat.com>
475
476 * config/tc-arm.c (enum parse_operand_result): Move outside of
477 #ifdef OBJ_ELF so that non-ELF targeted ARM ports can build.
478
479 2006-06-16 H.J. Lu <hongjiu.lu@intel.com>
480
481 * config/tc-i386.h (processor_type): New.
482 (arch_entry): Add type.
483
484 * config/tc-i386.c (cpu_arch_tune): New.
485 (cpu_arch_tune_flags): Likewise.
486 (cpu_arch_isa_flags): Likewise.
487 (cpu_arch): Updated.
488 (set_cpu_arch): Also update cpu_arch_isa_flags.
489 (md_assemble): Update cpu_arch_isa_flags.
490 (OPTION_MARCH): New.
491 (OPTION_MTUNE): Likewise.
492 (md_longopts): Add -march= and -mtune=.
493 (md_parse_option): Support -march= and -mtune=.
494 (md_show_usage): Add -march=CPU/-mtune=CPU.
495 (i386_target_format): Also update cpu_arch_isa_flags,
496 cpu_arch_tune and cpu_arch_tune_flags.
497
498 * doc/as.texinfo: Add -march=CPU/-mtune=CPU.
499
500 * doc/c-i386.texi: Document -march=CPU/-mtune=CPU.
501
502 2006-06-15 Mark Shinwell <shinwell@codesourcery.com>
503
504 * config/tc-arm.c (enum parse_operand_result): New.
505 (struct group_reloc_table_entry): New.
506 (enum group_reloc_type): New.
507 (group_reloc_table): New array.
508 (find_group_reloc_table_entry): New function.
509 (parse_shifter_operand_group_reloc): New function.
510 (parse_address_main): New function, incorporating code
511 from the old parse_address function. To be used via...
512 (parse_address): wrapper for parse_address_main; and
513 (parse_address_group_reloc): new function, likewise.
514 (enum operand_parse_code): New codes OP_SHG, OP_ADDRGLDR,
515 OP_ADDRGLDRS, OP_ADDRGLDC.
516 (parse_operands): Support for these new operand codes.
517 New macro po_misc_or_fail_no_backtrack.
518 (encode_arm_cp_address): Preserve group relocations.
519 (insns): Modify to use the above operand codes where group
520 relocations are permitted.
521 (md_apply_fix): Handle the group relocations
522 ALU_PC_G0_NC through LDC_SB_G2.
523 (tc_gen_reloc): Likewise.
524 (arm_force_relocation): Leave group relocations for the linker.
525 (arm_fix_adjustable): Likewise.
526
527 2006-06-15 Julian Brown <julian@codesourcery.com>
528
529 * config/tc-arm.c (do_vfp_nsyn_ldr_str): Remove, fold into...
530 (do_neon_ldr_str): Always defer to VFP encoding routines, which handle
531 relocs properly.
532
533 2006-06-12 H.J. Lu <hongjiu.lu@intel.com>
534
535 * config/tc-i386.c (process_suffix): Don't add rex64 for
536 "xchg %rax,%rax".
537
538 2006-06-09 Thiemo Seufer <ths@mips.com>
539
540 * config/tc-mips.c (mips_ip): Maintain argument count.
541
542 2006-06-09 Alan Modra <amodra@bigpond.net.au>
543
544 * config/tc-iq2000.c: Include sb.h.
545
546 2006-06-08 Nigel Stephens <nigel@mips.com>
547
548 * config/tc-mips.c (mips_pseudo_table): Add "origin" and "repeat"
549 aliases for better compatibility with SGI tools.
550
551 2006-06-08 Alan Modra <amodra@bigpond.net.au>
552
553 * configure.in (BFDLIB, BFDVER_H, ALL_OBJ_DEPS): Delete.
554 * Makefile.am (GASLIBS): Expand @BFDLIB@.
555 (BFDVER_H): Delete.
556 (OBJS): Expand @ALL_OBJ_DEPS@. Depend on all fopen-*.h variants.
557 (obj-aout.o): Depend on $(DEP_@target_get_type@_aout)
558 (obj-coff.o, obj-ecoff.o, obj-elf.o): Similarly.
559 Run "make dep-am".
560 * dep-in.sed: Don't substitute bfdver.h. Do remove symcat.h.
561 * Makefile.in: Regenerate.
562 * doc/Makefile.in: Regenerate.
563 * configure: Regenerate.
564
565 2006-06-07 Joseph S. Myers <joseph@codesourcery.com>
566
567 * po/Make-in (pdf, ps): New dummy targets.
568
569 2006-06-07 Julian Brown <julian@codesourcery.com>
570
571 * config/tc-arm.c (stdarg.h): include.
572 (arm_it): Add uncond_value field. Add isvec and issingle to operand
573 array.
574 (arm_reg_type): Add REG_TYPE_VFSD (single or double VFP reg) and
575 REG_TYPE_NSDQ (single, double or quad vector reg).
576 (reg_expected_msgs): Update.
577 (BAD_FPU): Add macro for unsupported FPU instruction error.
578 (parse_neon_type): Support 'd' as an alias for .f64.
579 (parse_typed_reg_or_scalar): Support REG_TYPE_VFSD, REG_TYPE_NSDQ
580 sets of registers.
581 (parse_vfp_reg_list): Don't update first arg on error.
582 (parse_neon_mov): Support extra syntax for VFP moves.
583 (operand_parse_code): Add OP_RVSD, OP_RNSDQ, OP_VRSDLST, OP_RVSD_IO,
584 OP_RNSDQ_RNSC, OP_RVC_PSR, OP_APSR_RR, OP_oRNSDQ.
585 (parse_operands): Support isvec, issingle operands fields, new parse
586 codes above.
587 (do_vfp_nsyn_mrs, do_vfp_nsyn_msr): New functions. Support VFP mrs,
588 msr variants.
589 (do_mrs, do_msr, do_t_mrs, do_t_msr): Add support for above.
590 (NEON_ENC_TAB): Add vnmul, vnmla, vnmls, vcmp, vcmpz, vcmpe, vcmpez.
591 (NEON_ENC_SINGLE, NEON_ENC_DOUBLE): Define macros.
592 (NEON_SHAPE_DEF): New macro. Define table of possible instruction
593 shapes.
594 (neon_shape): Redefine in terms of above.
595 (neon_shape_class): New enumeration, table of shape classes.
596 (neon_shape_el): New enumeration. One element of a shape.
597 (neon_shape_el_size): Register widths of above, where appropriate.
598 (neon_shape_info): New struct. Info for shape table.
599 (neon_shape_tab): New array.
600 (neon_type_mask): Add N_F64, N_VFP. Update N_MAX_NONSPECIAL.
601 (neon_check_shape): Rewrite as...
602 (neon_select_shape): New function to classify instruction shapes,
603 driven by new table neon_shape_tab array.
604 (neon_quad): New function. Return 1 if shape should set Q flag in
605 instructions (or equivalent), 0 otherwise.
606 (type_chk_of_el_type): Support F64.
607 (el_type_of_type_chk): Likewise.
608 (neon_check_type): Add support for VFP type checking (VFP data
609 elements fill their containing registers).
610 (do_vfp_cond_or_thumb): Fill in condition field in ARM mode, or 0xE
611 in thumb mode for VFP instructions.
612 (do_vfp_nsyn_opcode): New function. Look up the opcode in argument,
613 and encode the current instruction as if it were that opcode.
614 (try_vfp_nsyn): New. If this looks like a VFP instruction with ARGS
615 arguments, call function in PFN.
616 (do_vfp_nsyn_add_sub, do_vfp_nsyn_mla_mls, do_vfp_nsyn_mul)
617 (do_vfp_nsyn_abs_neg, do_vfp_nsyn_ldm_stm, do_vfp_nsyn_ldr_str)
618 (do_vfp_nsyn_sqrt, do_vfp_nsyn_div, do_vfp_nsyn_nmul)
619 (do_vfp_nsyn_cmp, nsyn_insert_sp, do_vfp_nsyn_push)
620 (do_vfp_nsyn_pop, do_vfp_nsyn_cvt, do_vfp_nsyn_cvtz): New functions.
621 Redirect Neon-syntax VFP instructions to VFP instruction handlers.
622 (do_neon_dyadic_i_su, do_neon_dyadic_i64_su, do_neon_shl_imm)
623 (do_neon_qshl_imm, do_neon_logic, do_neon_bitfield)
624 (neon_dyadic_misc, neon_compare, do_neon_tst, do_neon_qdmulh)
625 (do_neon_fcmp_absolute, do_neon_step, do_neon_sli, do_neon_sri)
626 (do_neon_qshlu_imm, neon_move_immediate, do_neon_mvn, do_neon_ext)
627 (do_neon_rev, do_neon_dup, do_neon_rshift_round_imm, do_neon_trn)
628 (do_neon_zip_uzp, do_neon_sat_abs_neg, do_neon_pair_long)
629 (do_neon_recip_est, do_neon_cls, do_neon_clz, do_neon_cnt)
630 (do_neon_swp): Use neon_select_shape not neon_check_shape. Use
631 neon_quad.
632 (vfp_or_neon_is_neon): New function. Call if a mnemonic shared
633 between VFP and Neon turns out to belong to Neon. Perform
634 architecture check and fill in condition field if appropriate.
635 (do_neon_addsub_if_i, do_neon_mac_maybe_scalar, do_neon_abs_neg)
636 (do_neon_cvt): Add support for VFP variants of instructions.
637 (neon_cvt_flavour): Extend to cover VFP conversions.
638 (do_neon_mov): Rewrite to use neon_select_shape. Add support for VFP
639 vmov variants.
640 (do_neon_ldr_str): Handle single-precision VFP load/store.
641 (do_neon_ld_st_interleave, do_neon_ld_st_lane, do_neon_ld_dup): Use
642 NS_NULL not NS_IGNORE.
643 (opcode_tag): Add OT_csuffixF for operands which either take a
644 conditional suffix, or have 0xF in the condition field.
645 (md_assemble): Add support for OT_csuffixF.
646 (NCE): Replace macro with...
647 (NCE_tag, NCE, NCEF): New macros.
648 (nCE): Replace macro with...
649 (nCE_tag, nCE, nCEF): New macros.
650 (insns): Add support for VFP insns or VFP versions of insns msr,
651 mrs, vsqrt, vdiv, vnmul, vnmla, vnmls, vcmp, vcmpe, vpush, vpop,
652 vcvtz, vmul, vmla, vmls, vadd, vsub, vabs, vneg, vldm, vldmia,
653 vldbdb, vstm, vstmia, vstmdb, vldr, vstr, vcvt, vmov. Group shared
654 VFP/Neon insns together.
655
656 2006-06-07 Alan Modra <amodra@bigpond.net.au>
657 Ladislav Michl <ladis@linux-mips.org>
658
659 * app.c: Don't include headers already included by as.h.
660 * as.c: Likewise.
661 * atof-generic.c: Likewise.
662 * cgen.c: Likewise.
663 * dwarf2dbg.c: Likewise.
664 * expr.c: Likewise.
665 * input-file.c: Likewise.
666 * input-scrub.c: Likewise.
667 * macro.c: Likewise.
668 * output-file.c: Likewise.
669 * read.c: Likewise.
670 * sb.c: Likewise.
671 * config/bfin-lex.l: Likewise.
672 * config/obj-coff.h: Likewise.
673 * config/obj-elf.h: Likewise.
674 * config/obj-som.h: Likewise.
675 * config/tc-arc.c: Likewise.
676 * config/tc-arm.c: Likewise.
677 * config/tc-avr.c: Likewise.
678 * config/tc-bfin.c: Likewise.
679 * config/tc-cris.c: Likewise.
680 * config/tc-d10v.c: Likewise.
681 * config/tc-d30v.c: Likewise.
682 * config/tc-dlx.h: Likewise.
683 * config/tc-fr30.c: Likewise.
684 * config/tc-frv.c: Likewise.
685 * config/tc-h8300.c: Likewise.
686 * config/tc-hppa.c: Likewise.
687 * config/tc-i370.c: Likewise.
688 * config/tc-i860.c: Likewise.
689 * config/tc-i960.c: Likewise.
690 * config/tc-ip2k.c: Likewise.
691 * config/tc-iq2000.c: Likewise.
692 * config/tc-m32c.c: Likewise.
693 * config/tc-m32r.c: Likewise.
694 * config/tc-maxq.c: Likewise.
695 * config/tc-mcore.c: Likewise.
696 * config/tc-mips.c: Likewise.
697 * config/tc-mmix.c: Likewise.
698 * config/tc-mn10200.c: Likewise.
699 * config/tc-mn10300.c: Likewise.
700 * config/tc-msp430.c: Likewise.
701 * config/tc-mt.c: Likewise.
702 * config/tc-ns32k.c: Likewise.
703 * config/tc-openrisc.c: Likewise.
704 * config/tc-ppc.c: Likewise.
705 * config/tc-s390.c: Likewise.
706 * config/tc-sh.c: Likewise.
707 * config/tc-sh64.c: Likewise.
708 * config/tc-sparc.c: Likewise.
709 * config/tc-tic30.c: Likewise.
710 * config/tc-tic4x.c: Likewise.
711 * config/tc-tic54x.c: Likewise.
712 * config/tc-v850.c: Likewise.
713 * config/tc-vax.c: Likewise.
714 * config/tc-xc16x.c: Likewise.
715 * config/tc-xstormy16.c: Likewise.
716 * config/tc-xtensa.c: Likewise.
717 * config/tc-z80.c: Likewise.
718 * config/tc-z8k.c: Likewise.
719 * macro.h: Don't include sb.h or ansidecl.h.
720 * sb.h: Don't include stdio.h or ansidecl.h.
721 * cond.c: Include sb.h.
722 * itbl-lex.l: Include as.h instead of other system headers.
723 * itbl-parse.y: Likewise.
724 * itbl-ops.c: Similarly.
725 * itbl-ops.h: Don't include as.h or ansidecl.h.
726 * config/bfin-defs.h: Don't include bfd.h or as.h.
727 * config/bfin-parse.y: Include as.h instead of other system headers.
728
729 2006-06-06 Ben Elliston <bje@au.ibm.com>
730 Anton Blanchard <anton@samba.org>
731
732 * config/tc-ppc.c (parse_cpu): Handle "-mpower6".
733 (md_show_usage): Document it.
734 (ppc_setup_opcodes): Test power6 opcode flag bits.
735 * doc/c-ppc.texi (PowerPC-Opts): Document "-mpower6".
736
737 2006-06-06 Thiemo Seufer <ths@mips.com>
738 Chao-ying Fu <fu@mips.com>
739
740 * config/tc-mips.c (ISA_SUPPORTS_DSP64): New macro.
741 (CPU_HAS_MIPS3D, CPU_HAS_MDMX, CPU_HAS_DSP, CPU_HAS_MT): Delete.
742 (macro_build): Update comment.
743 (mips_ip): Allow DSP64 instructions for MIPS64R2.
744 (mips_after_parse_args): Remove uses of CPU_HAS_MIPS3D and
745 CPU_HAS_MDMX.
746 (mips_cpu_info): Fix formatting. Add MIPS_CPU_ASE_MIPS3D and
747 MIPS_CPU_ASE_MDMX flags for sb1.
748
749 2006-06-05 Thiemo Seufer <ths@mips.com>
750
751 * config/tc-mips.c (macro_build): Use INSERT_OPERAND wherew
752 appropriate.
753 (mips16_macro_build): Use MIPS16_INSERT_OPERAND where appropriate.
754 (mips_ip): Make overflowed/underflowed constant arguments in DSP
755 and MT instructions a fatal error. Use INSERT_OPERAND where
756 appropriate. Improve warnings for break and wait code overflows.
757 Use symbolic constant of OP_MASK_COPZ.
758 (mips16_ip): Use MIPS16_INSERT_OPERAND where appropriate.
759
760 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
761
762 * po/Make-in (top_builddir): Define.
763
764 2006-06-02 Joseph S. Myers <joseph@codesourcery.com>
765
766 * doc/Makefile.am (TEXI2DVI): Define.
767 * doc/Makefile.in: Regenerate.
768 * doc/c-arc.texi: Fix typo.
769
770 2006-06-01 Alan Modra <amodra@bigpond.net.au>
771
772 * config/obj-ieee.c: Delete.
773 * config/obj-ieee.h: Delete.
774 * Makefile.am (OBJ_FORMATS): Remove ieee.
775 (OBJ_FORMAT_CFILES, OBJ_FORMAT_HFILES): Similarly.
776 (obj-ieee.o): Remove rule.
777 * Makefile.in: Regenerate.
778 * configure.in (atof): Remove tahoe.
779 (OBJ_MAYBE_IEEE): Don't define.
780 * configure: Regenerate.
781 * config.in: Regenerate.
782 * doc/Makefile.in: Regenerate.
783 * po/POTFILES.in: Regenerate.
784
785 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
786
787 * Makefile.am: Replace INTLLIBS and INTLDEPS with LIBINTL
788 and LIBINTL_DEP everywhere.
789 (INTLLIBS): Remove.
790 (INCLUDES, DEP_INCLUDES): Use @INCINTL@.
791 * acinclude.m4: Include new gettext macros.
792 * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
793 Remove local code for po/Makefile.
794 * Makefile.in, configure, doc/Makefile.in: Regenerated.
795
796 2006-05-30 Nick Clifton <nickc@redhat.com>
797
798 * po/es.po: Updated Spanish translation.
799
800 2006-05-06 Denis Chertykov <denisc@overta.ru>
801
802 * doc/c-avr.texi: New file.
803 * doc/Makefile.am (CPU_DOCS): Add c-avr.texi
804 * doc/all.texi: Set AVR
805 * doc/as.texinfo: Include c-avr.texi
806
807 2006-05-28 Jie Zhang <jie.zhang@analog.com>
808
809 * config/bfin-parse.y (check_macfunc): Loose the condition of
810 calling check_multiply_halfregs ().
811
812 2006-05-25 Jie Zhang <jie.zhang@analog.com>
813
814 * config/bfin-parse.y (asm_1): Better check and deal with
815 vector and scalar Multiply 16-Bit Operands instructions.
816
817 2006-05-24 Nick Clifton <nickc@redhat.com>
818
819 * config/tc-hppa.c: Convert to ISO C90 format.
820 * config/tc-hppa.h: Likewise.
821
822 2006-05-24 Carlos O'Donell <carlos@systemhalted.org>
823 Randolph Chung <randolph@tausq.org>
824
825 * config/tc-hppa.c (is_tls_gdidx, is_tls_ldidx, is_tls_dtpoff,
826 is_tls_ieoff, is_tls_leoff): Define.
827 (fix_new_hppa): Handle TLS.
828 (cons_fix_new_hppa): Likewise.
829 (pa_ip): Likewise.
830 (md_apply_fix): Handle TLS relocs.
831 * config/tc-hppa.h (hppa_fix_adjustable): Handle TLS.
832
833 2006-05-24 Bjoern Haase <bjoern.m.haase@web.de>
834
835 * config/tc-avr.c: Add new cpu targets avr6, avr2560 and avr2561.
836
837 2006-05-23 Thiemo Seufer <ths@mips.com>
838 David Ung <davidu@mips.com>
839 Nigel Stephens <nigel@mips.com>
840
841 [ gas/ChangeLog ]
842 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS): Rename.
843 (ISA_SUPPORTS_DSP_ASE, ISA_SUPPORTS_MT_ASE, ISA_HAS_64BIT_FPRS,
844 ISA_HAS_MXHC1): New macros.
845 (HAVE_32BIT_FPRS): Use ISA_HAS_64BIT_FPRS instead of
846 ISA_HAS_64BIT_REGS. Formatting fixes. Improved comments.
847 (mips_cpu_info): Change to use combined ASE/IS_ISA flag.
848 (MIPS_CPU_IS_ISA, MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP,
849 MIPS_CPU_ASE_MT, MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX): New defines.
850 (mips_after_parse_args): Change default handling of float register
851 size to account for 32bit code with 64bit FP. Better sanity checking
852 of ISA/ASE/ABI option combinations.
853 (s_mipsset): Support switching of GPR and FPR sizes via
854 .set {g,f}p={32,64,default}. Better sanity checking for .set ASE
855 options.
856 (mips_elf_final_processing): We should record the use of 64bit FP
857 registers in 32bit code but we don't, because ELF header flags are
858 a scarce ressource.
859 (mips_cpu_info_table): Add ASE flags for CPUs with mandatory ASE
860 extensions. Add 4ksc, 4kec, 4kem, 4kep, 4ksd, m4kp, 24kec, 24kef,
861 24kex, 34kc, 34kf, 34kx, 25kf CPU definitions.
862 (mips_cpu_info_from_isa): Use MIPS_CPU_IS_ISA.
863 * doc/c-mips.texi: Document .set {g,f}p={32,64,default}. Document
864 missing -march options. Document .set arch=CPU. Move .set smartmips
865 to ASE page. Use @code for .set FOO examples.
866
867 2006-05-23 Jie Zhang <jie.zhang@analog.com>
868
869 * config/tc-bfin.c (bfin_start_line_hook): Bump line counters
870 if needed.
871
872 2006-05-23 Jie Zhang <jie.zhang@analog.com>
873
874 * config/bfin-defs.h (bfin_equals): Remove declaration.
875 * config/bfin-parse.y (asm_1): Remove "expr ASSIGN expr".
876 * config/tc-bfin.c (bfin_name_is_register): Remove.
877 (bfin_equals): Remove.
878 * config/tc-bfin.h (TC_EQUAL_IN_INSN): Redefine as 1.
879 (bfin_name_is_register): Remove declaration.
880
881 2006-05-19 Thiemo Seufer <ths@mips.com>
882 Nigel Stephens <nigel@mips.com>
883
884 * config/tc-mipc.c (ISA_HAS_ODD_SINGLE_FPR): New define.
885 (mips_oddfpreg_ok): New function.
886 (mips_ip): Use it.
887
888 2006-05-19 Thiemo Seufer <ths@mips.com>
889 David Ung <davidu@mips.com>
890
891 * config/tc-mips.h (tc_mips_regname_to_dw2regnum): Declare.
892 * config/tc-mipc.c (ABI_NEEDS_64BIT_REGS, ISA_HAS_64BIT_REGS,
893 ISA_HAS_DROR, ISA_HAS_ROR): Reformat.
894 (regname, RTYPE_MASK, RTYPE_NUM, RTYPE_FPU, RTYPE_FCC, RTYPE_VEC,
895 RTYPE_GP, RTYPE_CP0, RTYPE_PC, RTYPE_ACC, RTYPE_CCC, RNUM_MASK,
896 RWARN, GENERIC_REGISTER_NUMBERS, FPU_REGISTER_NAMES,
897 FPU_CONDITION_CODE_NAMES, COPROC_CONDITION_CODE_NAMES,
898 N32N64_SYMBOLIC_REGISTER_NAMES, O32_SYMBOLIC_REGISTER_NAMES,
899 SYMBOLIC_REGISTER_NAMES, MIPS16_SPECIAL_REGISTER_NAMES,
900 MDMX_VECTOR_REGISTER_NAMES, MIPS_DSP_ACCUMULATOR_NAMES, reg_names,
901 reg_names_o32, reg_names_n32n64): Define register classes.
902 (reg_lookup): New function, use register classes.
903 (md_begin): Reserve register names in the symbol table. Simplify
904 OBJ_ELF defines.
905 (mips_ip): Fix comment formatting. Handle symbolic COP0 registers.
906 Use reg_lookup.
907 (mips16_ip): Use reg_lookup.
908 (tc_get_register): Likewise.
909 (tc_mips_regname_to_dw2regnum): New function.
910
911 2006-05-19 Thiemo Seufer <ths@mips.com>
912
913 * config/tc-arm.c, config/tc-arm.h (tc_arm_regname_to_dw2regnum):
914 Un-constify string argument.
915 * config/tc-i386.c, config/tc-i386.h (tc_x86_regname_to_dw2regnum):
916 Likewise.
917 * config/tc-m68k.c, config/tc-m68k.h (tc_m68k_regname_to_dw2regnum):
918 Likewise.
919 * config/tc-ppc.c, config/tc-ppc.h (tc_ppc_regname_to_dw2regnum):
920 Likewise.
921 * config/tc-s390.c, config/tc-s390.h (tc_s390_regname_to_dw2regnum):
922 Likewise.
923 * config/tc-sh.c, config/tc-sh.h (sh_regname_to_dw2regnum):
924 Likewise.
925 * config/tc-sparc.c, config/tc-sparc.h (sparc_regname_to_dw2regnum):
926 Likewise.
927
928 2006-05-19 Nathan Sidwell <nathan@codesourcery.com>
929
930 * gas/config/tc-m68k.c (m68k_init_arch): Move checking of
931 cfloat/m68881 to correct architecture before using it.
932
933 2006-05-16 Bjoern Haase <bjoern.m.haase@web.de>
934
935 * config/tc-avr.h (TC_VALIDATE_FIX): Allow fixups for immediate
936 constant values.
937
938 2006-05-15 Paul Brook <paul@codesourcery.com>
939
940 * config/tc-arm.c (arm_adjust_symtab): Use
941 bfd_is_arm_special_symbol_name.
942
943 2006-05-15 Bob Wilson <bob.wilson@acm.org>
944
945 * config/tc-xtensa.c (is_direct_call_opcode, is_branch_jmp_to_next,
946 xg_assemble_vliw_tokens, xtensa_mark_narrow_branches,
947 xtensa_fix_short_loop_frags, is_local_forward_loop, relax_frag_immed):
948 Handle errors from calls to xtensa_opcode_is_* functions.
949
950 2006-05-14 Thiemo Seufer <ths@mips.com>
951
952 * config/tc-mips.c (macro_build): Test for currently active
953 mips16 option.
954 (mips16_ip): Reject invalid opcodes.
955
956 2006-05-11 Carlos O'Donell <carlos@codesourcery.com>
957
958 * doc/as.texinfo: Rename "Index" to "AS Index",
959 and "ABORT" to "ABORT (COFF)".
960
961 2006-05-11 Paul Brook <paul@codesourcery.com>
962
963 * config/tc-arm.c (parse_half): New function.
964 (operand_parse_code): Remove OP_Iffff. Add OP_HALF.
965 (parse_operands): Ditto.
966 (do_mov16): Reject invalid relocations.
967 (do_t_mov16): Ditto. Use Thumb reloc numbers.
968 (insns): Replace Iffff with HALF.
969 (md_apply_fix): Add MOVW and MOVT relocs.
970 (tc_gen_reloc): Ditto.
971 * doc/c-arm.texi: Document relocation operators
972
973 2006-05-11 Paul Brook <paul@codesourcery.com>
974
975 * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
976
977 2006-05-11 Thiemo Seufer <ths@mips.com>
978
979 * config/tc-mips.c (append_insn): Don't check the range of j or
980 jal addresses.
981
982 2006-05-11 Pedro Alves <pedro_alves@portugalmail.pt>
983
984 * config/tc-arm.c (md_pcrel_from_section): Force a bias for
985 relocs against external symbols for WinCE targets.
986 (md_apply_fix): Likewise.
987
988 2006-05-09 David Ung <davidu@mips.com>
989
990 * config/tc-mips.c (append_insn): Only warn about an out-of-range
991 j or jal address.
992
993 2006-05-09 Nick Clifton <nickc@redhat.com>
994
995 * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups
996 against symbols which are not going to be placed into the symbol
997 table.
998
999 2006-05-09 Ben Elliston <bje@au.ibm.com>
1000
1001 * expr.c (operand): Remove `if (0 && ..)' statement and
1002 subsequently unused target_op label. Collapse `if (1 || ..)'
1003 statement.
1004 * app.c (do_scrub_chars): Remove unused case 0, as it is handled
1005 separately above the switch.
1006
1007 2006-05-08 Nick Clifton <nickc@redhat.com>
1008
1009 PR gas/2623
1010 * config/tc-msp430.c (line_separator_character): Define as |.
1011
1012 2006-05-08 Thiemo Seufer <ths@mips.com>
1013 Nigel Stephens <nigel@mips.com>
1014 David Ung <davidu@mips.com>
1015
1016 * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
1017 (mips_opts): Likewise.
1018 (file_ase_smartmips): New variable.
1019 (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
1020 (macro_build): Handle SmartMIPS instructions.
1021 (mips_ip): Likewise.
1022 (md_longopts): Add argument handling for smartmips.
1023 (md_parse_options, mips_after_parse_args): Likewise.
1024 (s_mipsset): Add .set smartmips support.
1025 (md_show_usage): Document -msmartmips/-mno-smartmips.
1026 * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
1027 .set smartmips.
1028 * doc/c-mips.texi: Likewise.
1029
1030 2006-05-08 Alan Modra <amodra@bigpond.net.au>
1031
1032 * write.c (relax_segment): Add pass count arg. Don't error on
1033 negative org/space on first two passes.
1034 (relax_seg_info): New struct.
1035 (relax_seg, write_object_file): Adjust.
1036 * write.h (relax_segment): Update prototype.
1037
1038 2006-05-05 Julian Brown <julian@codesourcery.com>
1039
1040 * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
1041 checking.
1042 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
1043 architecture version checks.
1044 (insns): Allow overlapping instructions to be used in VFP mode.
1045
1046 2006-05-05 H.J. Lu <hongjiu.lu@intel.com>
1047
1048 PR gas/2598
1049 * config/obj-elf.c (obj_elf_change_section): Allow user
1050 specified SHF_ALPHA_GPREL.
1051
1052 2006-05-05 Bjoern Haase <bjoern.m.haase@web.de>
1053
1054 * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups
1055 for PMEM related expressions.
1056
1057 2006-05-05 Nick Clifton <nickc@redhat.com>
1058
1059 PR gas/2582
1060 * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the
1061 insertion of a directory separator character into a string at a
1062 given offset. Uses heuristics to decide when to use a backslash
1063 character rather than a forward-slash character.
1064 (dwarf2_directive_loc): Use the macro.
1065 (out_debug_info): Likewise.
1066
1067 2006-05-05 Thiemo Seufer <ths@mips.com>
1068 David Ung <davidu@mips.com>
1069
1070 * config/tc-mips.c (macro_build): Add case 'k' to handle cache
1071 instruction.
1072 (macro): Add new case M_CACHE_AB.
1073
1074 2006-05-04 Kazu Hirata <kazu@codesourcery.com>
1075
1076 * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
1077 (opcode_lookup): Issue a warning for opcode with
1078 OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated
1079 identical to OT_cinfix3.
1080 (TxC3w, TC3w, tC3w): New.
1081 (insns): Use tC3w and TC3w for comparison instructions with
1082 's' suffix.
1083
1084 2006-05-04 Alan Modra <amodra@bigpond.net.au>
1085
1086 * subsegs.h (struct frchain): Delete frch_seg.
1087 (frchain_root): Delete.
1088 (seg_info): Define as macro.
1089 * subsegs.c (frchain_root): Delete.
1090 (abs_seg_info, und_seg_info, absolute_frchain): Delete.
1091 (subsegs_begin, subseg_change): Adjust for above.
1092 (subseg_set_rest): Likewise. Add new frchain structs to seginfo
1093 rather than to one big list.
1094 (subseg_get): Don't special case abs, und sections.
1095 (subseg_new, subseg_force_new): Don't set frchainP here.
1096 (seg_info): Delete.
1097 (subsegs_print_statistics): Adjust frag chain control list traversal.
1098 * debug.c (dmp_frags): Likewise.
1099 * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
1100 at frchain_root. Make use of known frchain ordering.
1101 (last_frag_for_seg): Likewise.
1102 (get_frag_fix): Likewise. Add seg param.
1103 (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
1104 * write.c (chain_frchains_together_1): Adjust for struct frchain.
1105 (SUB_SEGMENT_ALIGN): Likewise.
1106 (subsegs_finish): Adjust frchain list traversal.
1107 * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
1108 (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
1109 (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
1110 (xtensa_fix_b_j_loop_end_frags): Likewise.
1111 (xtensa_fix_close_loop_end_frags): Likewise.
1112 (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
1113 (retrieve_segment_info): Delete frch_seg initialisation.
1114
1115 2006-05-03 Alan Modra <amodra@bigpond.net.au>
1116
1117 * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
1118 * config/obj-elf.h (obj_sec_set_private_data): Delete.
1119 * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
1120 * config/tc-mn10300.c (tc_gen_reloc): Likewise.
1121
1122 2006-05-02 Joseph Myers <joseph@codesourcery.com>
1123
1124 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
1125 here.
1126 (md_apply_fix3): Multiply offset by 4 here for
1127 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
1128
1129 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
1130 Jan Beulich <jbeulich@novell.com>
1131
1132 * config/tc-i386.c (output_invalid_buf): Change size for
1133 unsigned char.
1134 * config/tc-tic30.c (output_invalid_buf): Likewise.
1135
1136 * config/tc-i386.c (output_invalid): Cast none-ascii char to
1137 unsigned char.
1138 * config/tc-tic30.c (output_invalid): Likewise.
1139
1140 2006-05-02 Daniel Jacobowitz <dan@codesourcery.com>
1141
1142 * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
1143 (TEXI2POD): Use AM_MAKEINFOFLAGS.
1144 (asconfig.texi): Don't set top_srcdir.
1145 * doc/as.texinfo: Don't use top_srcdir.
1146 * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
1147
1148 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
1149
1150 * config/tc-i386.c (output_invalid_buf): Change size to 16.
1151 * config/tc-tic30.c (output_invalid_buf): Likewise.
1152
1153 * config/tc-i386.c (output_invalid): Use snprintf instead of
1154 sprintf.
1155 * config/tc-ia64.c (declare_register_set): Likewise.
1156 (emit_one_bundle): Likewise.
1157 (check_dependencies): Likewise.
1158 * config/tc-tic30.c (output_invalid): Likewise.
1159
1160 2006-05-02 Paul Brook <paul@codesourcery.com>
1161
1162 * config/tc-arm.c (arm_optimize_expr): New function.
1163 * config/tc-arm.h (md_optimize_expr): Define
1164 (arm_optimize_expr): Add prototype.
1165 (TC_FORCE_RELOCATION_SUB_SAME): Define.
1166
1167 2006-05-02 Ben Elliston <bje@au.ibm.com>
1168
1169 * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
1170 field unsigned.
1171
1172 * sb.h (sb_list_vector): Move to sb.c.
1173 * sb.c (free_list): Use type of sb_list_vector directly.
1174 (sb_build): Fix off-by-one error in assertion about `size'.
1175
1176 2006-05-01 Ben Elliston <bje@au.ibm.com>
1177
1178 * listing.c (listing_listing): Remove useless loop.
1179 * macro.c (macro_expand): Remove is_positional local variable.
1180 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
1181 and simplify surrounding expressions, where possible.
1182 (assign_symbol): Likewise.
1183 (s_weakref): Likewise.
1184 * symbols.c (colon): Likewise.
1185
1186 2006-05-01 James Lemke <jwlemke@wasabisystems.com>
1187
1188 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
1189
1190 2006-04-30 Thiemo Seufer <ths@mips.com>
1191 David Ung <davidu@mips.com>
1192
1193 * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
1194 (mips_immed): New table that records various handling of udi
1195 instruction patterns.
1196 (mips_ip): Adds udi handling.
1197
1198 2006-04-28 Alan Modra <amodra@bigpond.net.au>
1199
1200 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
1201 of list rather than beginning.
1202
1203 2006-04-26 Julian Brown <julian@codesourcery.com>
1204
1205 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
1206 (is_quarter_float): Rename from above. Simplify slightly.
1207 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
1208 number.
1209 (parse_neon_mov): Parse floating-point constants.
1210 (neon_qfloat_bits): Fix encoding.
1211 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
1212 preference to integer encoding when using the F32 type.
1213
1214 2006-04-26 Julian Brown <julian@codesourcery.com>
1215
1216 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
1217 zero-initialising structures containing it will lead to invalid types).
1218 (arm_it): Add vectype to each operand.
1219 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
1220 defined field.
1221 (neon_typed_alias): New structure. Extra information for typed
1222 register aliases.
1223 (reg_entry): Add neon type info field.
1224 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
1225 Break out alternative syntax for coprocessor registers, etc. into...
1226 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
1227 out from arm_reg_parse.
1228 (parse_neon_type): Move. Return SUCCESS/FAIL.
1229 (first_error): New function. Call to ensure first error which occurs is
1230 reported.
1231 (parse_neon_operand_type): Parse exactly one type.
1232 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
1233 (parse_typed_reg_or_scalar): New function. Handle core of both
1234 arm_typed_reg_parse and parse_scalar.
1235 (arm_typed_reg_parse): Parse a register with an optional type.
1236 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
1237 result.
1238 (parse_scalar): Parse a Neon scalar with optional type.
1239 (parse_reg_list): Use first_error.
1240 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
1241 (neon_alias_types_same): New function. Return true if two (alias) types
1242 are the same.
1243 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
1244 of elements.
1245 (insert_reg_alias): Return new reg_entry not void.
1246 (insert_neon_reg_alias): New function. Insert type/index information as
1247 well as register for alias.
1248 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
1249 make typed register aliases accordingly.
1250 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
1251 of line.
1252 (s_unreq): Delete type information if present.
1253 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
1254 (s_arm_unwind_save_mmxwcg): Likewise.
1255 (s_arm_unwind_movsp): Likewise.
1256 (s_arm_unwind_setfp): Likewise.
1257 (parse_shift): Likewise.
1258 (parse_shifter_operand): Likewise.
1259 (parse_address): Likewise.
1260 (parse_tb): Likewise.
1261 (tc_arm_regname_to_dw2regnum): Likewise.
1262 (md_pseudo_table): Add dn, qn.
1263 (parse_neon_mov): Handle typed operands.
1264 (parse_operands): Likewise.
1265 (neon_type_mask): Add N_SIZ.
1266 (N_ALLMODS): New macro.
1267 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
1268 (el_type_of_type_chk): Add some safeguards.
1269 (modify_types_allowed): Fix logic bug.
1270 (neon_check_type): Handle operands with types.
1271 (neon_three_same): Remove redundant optional arg handling.
1272 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
1273 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
1274 (do_neon_step): Adjust accordingly.
1275 (neon_cmode_for_logic_imm): Use first_error.
1276 (do_neon_bitfield): Call neon_check_type.
1277 (neon_dyadic): Rename to...
1278 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
1279 to allow modification of type of the destination.
1280 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1281 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
1282 (do_neon_compare): Make destination be an untyped bitfield.
1283 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
1284 (neon_mul_mac): Return early in case of errors.
1285 (neon_move_immediate): Use first_error.
1286 (neon_mac_reg_scalar_long): Fix type to include scalar.
1287 (do_neon_dup): Likewise.
1288 (do_neon_mov): Likewise (in several places).
1289 (do_neon_tbl_tbx): Fix type.
1290 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
1291 (do_neon_ld_dup): Exit early in case of errors and/or use
1292 first_error.
1293 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
1294 Handle .dn/.qn directives.
1295 (REGDEF): Add zero for reg_entry neon field.
1296
1297 2006-04-26 Julian Brown <julian@codesourcery.com>
1298
1299 * config/tc-arm.c (limits.h): Include.
1300 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
1301 (fpu_vfp_v3_or_neon_ext): Declare constants.
1302 (neon_el_type): New enumeration of types for Neon vector elements.
1303 (neon_type_el): New struct. Define type and size of a vector element.
1304 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
1305 instruction.
1306 (neon_type): Define struct. The type of an instruction.
1307 (arm_it): Add 'vectype' for the current instruction.
1308 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
1309 (vfp_sp_reg_pos): Rename to...
1310 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
1311 tags.
1312 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
1313 (Neon D or Q register).
1314 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
1315 register.
1316 (GE_OPT_PREFIX_BIG): Define constant, for use in...
1317 (my_get_expression): Allow above constant as argument to accept
1318 64-bit constants with optional prefix.
1319 (arm_reg_parse): Add extra argument to return the specific type of
1320 register in when either a D or Q register (REG_TYPE_NDQ) is
1321 requested. Can be NULL.
1322 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
1323 (parse_reg_list): Update for new arm_reg_parse args.
1324 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
1325 (parse_neon_el_struct_list): New function. Parse element/structure
1326 register lists for VLD<n>/VST<n> instructions.
1327 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
1328 (s_arm_unwind_save_mmxwr): Likewise.
1329 (s_arm_unwind_save_mmxwcg): Likewise.
1330 (s_arm_unwind_movsp): Likewise.
1331 (s_arm_unwind_setfp): Likewise.
1332 (parse_big_immediate): New function. Parse an immediate, which may be
1333 64 bits wide. Put results in inst.operands[i].
1334 (parse_shift): Update for new arm_reg_parse args.
1335 (parse_address): Likewise. Add parsing of alignment specifiers.
1336 (parse_neon_mov): Parse the operands of a VMOV instruction.
1337 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
1338 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
1339 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
1340 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
1341 (parse_operands): Handle new codes above.
1342 (encode_arm_vfp_sp_reg): Rename to...
1343 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
1344 selected VFP version only supports D0-D15.
1345 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
1346 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
1347 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
1348 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
1349 encode_arm_vfp_reg name, and allow 32 D regs.
1350 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
1351 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
1352 regs.
1353 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
1354 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
1355 constant-load and conversion insns introduced with VFPv3.
1356 (neon_tab_entry): New struct.
1357 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
1358 those which are the targets of pseudo-instructions.
1359 (neon_opc): Enumerate opcodes, use as indices into...
1360 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
1361 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
1362 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
1363 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
1364 neon_enc_tab.
1365 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
1366 Neon instructions.
1367 (neon_type_mask): New. Compact type representation for type checking.
1368 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
1369 permitted type combinations.
1370 (N_IGNORE_TYPE): New macro.
1371 (neon_check_shape): New function. Check an instruction shape for
1372 multiple alternatives. Return the specific shape for the current
1373 instruction.
1374 (neon_modify_type_size): New function. Modify a vector type and size,
1375 depending on the bit mask in argument 1.
1376 (neon_type_promote): New function. Convert a given "key" type (of an
1377 operand) into the correct type for a different operand, based on a bit
1378 mask.
1379 (type_chk_of_el_type): New function. Convert a type and size into the
1380 compact representation used for type checking.
1381 (el_type_of_type_ckh): New function. Reverse of above (only when a
1382 single bit is set in the bit mask).
1383 (modify_types_allowed): New function. Alter a mask of allowed types
1384 based on a bit mask of modifications.
1385 (neon_check_type): New function. Check the type of the current
1386 instruction against the variable argument list. The "key" type of the
1387 instruction is returned.
1388 (neon_dp_fixup): New function. Fill in and modify instruction bits for
1389 a Neon data-processing instruction depending on whether we're in ARM
1390 mode or Thumb-2 mode.
1391 (neon_logbits): New function.
1392 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
1393 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
1394 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
1395 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
1396 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
1397 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
1398 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1399 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
1400 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
1401 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
1402 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
1403 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
1404 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
1405 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
1406 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
1407 (neon_move_immediate, do_neon_mvn, neon_mixed_length)
1408 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
1409 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
1410 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
1411 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
1412 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
1413 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
1414 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
1415 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
1416 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
1417 helpers.
1418 (parse_neon_type): New function. Parse Neon type specifier.
1419 (opcode_lookup): Allow parsing of Neon type specifiers.
1420 (REGNUM2, REGSETH, REGSET2): New macros.
1421 (reg_names): Add new VFPv3 and Neon registers.
1422 (NUF, nUF, NCE, nCE): New macros for opcode table.
1423 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
1424 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
1425 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
1426 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
1427 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
1428 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
1429 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
1430 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
1431 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
1432 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
1433 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
1434 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
1435 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
1436 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
1437 fto[us][lh][sd].
1438 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
1439 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
1440 (arm_option_cpu_value): Add vfp3 and neon.
1441 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
1442 VFPv1 attribute.
1443
1444 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1445
1446 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
1447 syntax instead of hardcoded opcodes with ".w18" suffixes.
1448 (wide_branch_opcode): New.
1449 (build_transition): Use it to check for wide branch opcodes with
1450 either ".w18" or ".w15" suffixes.
1451
1452 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1453
1454 * config/tc-xtensa.c (xtensa_create_literal_symbol,
1455 xg_assemble_literal, xg_assemble_literal_space): Do not set the
1456 frag's is_literal flag.
1457
1458 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1459
1460 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
1461
1462 2006-04-23 Kazu Hirata <kazu@codesourcery.com>
1463
1464 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
1465 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
1466 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
1467 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
1468 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
1469
1470 2005-04-20 Paul Brook <paul@codesourcery.com>
1471
1472 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
1473 all targets.
1474 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
1475
1476 2006-04-19 Alan Modra <amodra@bigpond.net.au>
1477
1478 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
1479 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
1480 Make some cpus unsupported on ELF. Run "make dep-am".
1481 * Makefile.in: Regenerate.
1482
1483 2006-04-19 Alan Modra <amodra@bigpond.net.au>
1484
1485 * configure.in (--enable-targets): Indent help message.
1486 * configure: Regenerate.
1487
1488 2006-04-18 H.J. Lu <hongjiu.lu@intel.com>
1489
1490 PR gas/2533
1491 * config/tc-i386.c (i386_immediate): Check illegal immediate
1492 register operand.
1493
1494 2006-04-18 Alan Modra <amodra@bigpond.net.au>
1495
1496 * config/tc-i386.c: Formatting.
1497 (output_disp, output_imm): ISO C90 params.
1498
1499 * frags.c (frag_offset_fixed_p): Constify args.
1500 * frags.h (frag_offset_fixed_p): Ditto.
1501
1502 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
1503 (COFF_MAGIC): Delete.
1504
1505 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
1506
1507 2006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
1508
1509 * po/POTFILES.in: Regenerated.
1510
1511 2006-04-16 Mark Mitchell <mark@codesourcery.com>
1512
1513 * doc/as.texinfo: Mention that some .type syntaxes are not
1514 supported on all architectures.
1515
1516 2006-04-14 Sterling Augustine <sterling@tensilica.com>
1517
1518 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
1519 instructions when such transformations have been disabled.
1520
1521 2006-04-10 Sterling Augustine <sterling@tensilica.com>
1522
1523 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
1524 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
1525 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
1526 decoding the loop instructions. Remove current_offset variable.
1527 (xtensa_fix_short_loop_frags): Likewise.
1528 (min_bytes_to_other_loop_end): Remove current_offset argument.
1529
1530 2006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl>
1531
1532 * config/tc-z80.c (z80_optimize_expr): Removed.
1533 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
1534
1535 2006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
1536
1537 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
1538 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
1539 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
1540 atmega644, atmega329, atmega3290, atmega649, atmega6490,
1541 atmega406, atmega640, atmega1280, atmega1281, at90can32,
1542 at90can64, at90usb646, at90usb647, at90usb1286 and
1543 at90usb1287.
1544 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
1545
1546 2006-04-07 Paul Brook <paul@codesourcery.com>
1547
1548 * config/tc-arm.c (parse_operands): Set default error message.
1549
1550 2006-04-07 Paul Brook <paul@codesourcery.com>
1551
1552 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
1553
1554 2006-04-07 Paul Brook <paul@codesourcery.com>
1555
1556 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
1557
1558 2006-04-07 Paul Brook <paul@codesourcery.com>
1559
1560 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
1561 (move_or_literal_pool): Handle Thumb-2 instructions.
1562 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
1563
1564 2006-04-07 Alan Modra <amodra@bigpond.net.au>
1565
1566 PR 2512.
1567 * config/tc-i386.c (match_template): Move 64-bit operand tests
1568 inside loop.
1569
1570 2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
1571
1572 * po/Make-in: Add install-html target.
1573 * Makefile.am: Add install-html and install-html-recursive targets.
1574 * Makefile.in: Regenerate.
1575 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
1576 * configure: Regenerate.
1577 * doc/Makefile.am: Add install-html and install-html-am targets.
1578 * doc/Makefile.in: Regenerate.
1579
1580 2006-04-06 Alan Modra <amodra@bigpond.net.au>
1581
1582 * frags.c (frag_offset_fixed_p): Reinitialise offset before
1583 second scan.
1584
1585 2006-04-05 Richard Sandiford <richard@codesourcery.com>
1586 Daniel Jacobowitz <dan@codesourcery.com>
1587
1588 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
1589 (GOTT_BASE, GOTT_INDEX): New.
1590 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
1591 GOTT_INDEX when generating VxWorks PIC.
1592 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
1593 use the generic *-*-vxworks* stanza instead.
1594
1595 2006-04-04 Alan Modra <amodra@bigpond.net.au>
1596
1597 PR 997
1598 * frags.c (frag_offset_fixed_p): New function.
1599 * frags.h (frag_offset_fixed_p): Declare.
1600 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
1601 (resolve_expression): Likewise.
1602
1603 2006-04-03 Sterling Augustine <sterling@tensilica.com>
1604
1605 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
1606 of the same length but different numbers of slots.
1607
1608 2006-03-30 Andreas Schwab <schwab@suse.de>
1609
1610 * configure.in: Fix help string for --enable-targets option.
1611 * configure: Regenerate.
1612
1613 2006-03-28 Nathan Sidwell <nathan@codesourcery.com>
1614
1615 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
1616 (m68k_ip): ... here. Use for all chips. Protect against buffer
1617 overrun and avoid excessive copying.
1618
1619 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
1620 m68020_control_regs, m68040_control_regs, m68060_control_regs,
1621 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
1622 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
1623 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
1624 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
1625 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
1626 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
1627 mcf5282_ctrl, mcfv4e_ctrl): ... these.
1628 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
1629 (struct m68k_cpu): Change chip field to control_regs.
1630 (current_chip): Remove.
1631 (control_regs): New.
1632 (m68k_archs, m68k_extensions): Adjust.
1633 (m68k_cpus): Reorder to be in cpu number order. Adjust.
1634 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
1635 (find_cf_chip): Reimplement for new organization of cpu table.
1636 (select_control_regs): Remove.
1637 (mri_chip): Adjust.
1638 (struct save_opts): Save control regs, not chip.
1639 (s_save, s_restore): Adjust.
1640 (m68k_lookup_cpu): Give deprecated warning when necessary.
1641 (m68k_init_arch): Adjust.
1642 (md_show_usage): Adjust for new cpu table organization.
1643
1644 2006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
1645
1646 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
1647 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
1648 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
1649 "elf/bfin.h".
1650 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
1651 (any_gotrel): New rule.
1652 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
1653 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
1654 "elf/bfin.h".
1655 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
1656 (bfin_pic_ptr): New function.
1657 (md_pseudo_table): Add it for ".picptr".
1658 (OPTION_FDPIC): New macro.
1659 (md_longopts): Add -mfdpic.
1660 (md_parse_option): Handle it.
1661 (md_begin): Set BFD flags.
1662 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
1663 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
1664 us for GOT relocs.
1665 * Makefile.am (bfin-parse.o): Update dependencies.
1666 (DEPTC_bfin_elf): Likewise.
1667 * Makefile.in: Regenerate.
1668
1669 2006-03-25 Richard Sandiford <richard@codesourcery.com>
1670
1671 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
1672 mcfemac instead of mcfmac.
1673
1674 2006-03-23 Michael Matz <matz@suse.de>
1675
1676 * config/tc-i386.c (type_names): Correct placement of 'static'.
1677 (reloc): Map some more relocs to their 64 bit counterpart when
1678 size is 8.
1679 (output_insn): Work around breakage if DEBUG386 is defined.
1680 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
1681 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
1682 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
1683 different from i386.
1684 (output_imm): Ditto.
1685 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
1686 Imm64.
1687 (md_convert_frag): Jumps can now be larger than 2GB away, error
1688 out in that case.
1689 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
1690 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
1691
1692 2006-03-22 Richard Sandiford <richard@codesourcery.com>
1693 Daniel Jacobowitz <dan@codesourcery.com>
1694 Phil Edwards <phil@codesourcery.com>
1695 Zack Weinberg <zack@codesourcery.com>
1696 Mark Mitchell <mark@codesourcery.com>
1697 Nathan Sidwell <nathan@codesourcery.com>
1698
1699 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
1700 (md_begin): Complain about -G being used for PIC. Don't change
1701 the text, data and bss alignments on VxWorks.
1702 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
1703 generating VxWorks PIC.
1704 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
1705 (macro): Likewise, but do not treat la $25 specially for
1706 VxWorks PIC, and do not handle jal.
1707 (OPTION_MVXWORKS_PIC): New macro.
1708 (md_longopts): Add -mvxworks-pic.
1709 (md_parse_option): Don't complain about using PIC and -G together here.
1710 Handle OPTION_MVXWORKS_PIC.
1711 (md_estimate_size_before_relax): Always use the first relaxation
1712 sequence on VxWorks.
1713 * config/tc-mips.h (VXWORKS_PIC): New.
1714
1715 2006-03-21 Paul Brook <paul@codesourcery.com>
1716
1717 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
1718
1719 2006-03-21 Sterling Augustine <sterling@tensilica.com>
1720
1721 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
1722 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
1723 (get_loop_align_size): New.
1724 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
1725 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
1726 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
1727 (get_noop_aligned_address): Use get_loop_align_size.
1728 (get_aligned_diff): Likewise.
1729
1730 2006-03-21 Paul Brook <paul@codesourcery.com>
1731
1732 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
1733
1734 2006-03-20 Paul Brook <paul@codesourcery.com>
1735
1736 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
1737 (do_t_branch): Encode branches inside IT blocks as unconditional.
1738 (do_t_cps): New function.
1739 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
1740 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
1741 (opcode_lookup): Allow conditional suffixes on all instructions in
1742 Thumb mode.
1743 (md_assemble): Advance condexec state before checking for errors.
1744 (insns): Use do_t_cps.
1745
1746 2006-03-20 Paul Brook <paul@codesourcery.com>
1747
1748 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
1749 outputting the insn.
1750
1751 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1752
1753 * config/tc-vax.c: Update copyright year.
1754 * config/tc-vax.h: Likewise.
1755
1756 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1757
1758 * config/tc-vax.c (md_chars_to_number): Used only locally, so
1759 make it static.
1760 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
1761
1762 2006-03-17 Paul Brook <paul@codesourcery.com>
1763
1764 * config/tc-arm.c (insns): Add ldm and stm.
1765
1766 2006-03-17 Ben Elliston <bje@au.ibm.com>
1767
1768 PR gas/2446
1769 * doc/as.texinfo (Ident): Document this directive more thoroughly.
1770
1771 2006-03-16 Paul Brook <paul@codesourcery.com>
1772
1773 * config/tc-arm.c (insns): Add "svc".
1774
1775 2006-03-13 Bob Wilson <bob.wilson@acm.org>
1776
1777 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
1778 flag and avoid double underscore prefixes.
1779
1780 2006-03-10 Paul Brook <paul@codesourcery.com>
1781
1782 * config/tc-arm.c (md_begin): Handle EABIv5.
1783 (arm_eabis): Add EF_ARM_EABI_VER5.
1784 * doc/c-arm.texi: Document -meabi=5.
1785
1786 2006-03-10 Ben Elliston <bje@au.ibm.com>
1787
1788 * app.c (do_scrub_chars): Simplify string handling.
1789
1790 2006-03-07 Richard Sandiford <richard@codesourcery.com>
1791 Daniel Jacobowitz <dan@codesourcery.com>
1792 Zack Weinberg <zack@codesourcery.com>
1793 Nathan Sidwell <nathan@codesourcery.com>
1794 Paul Brook <paul@codesourcery.com>
1795 Ricardo Anguiano <anguiano@codesourcery.com>
1796 Phil Edwards <phil@codesourcery.com>
1797
1798 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
1799 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
1800 R_ARM_ABS12 reloc.
1801 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
1802 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
1803 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
1804
1805 2006-03-06 Bob Wilson <bob.wilson@acm.org>
1806
1807 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
1808 even when using the text-section-literals option.
1809
1810 2006-03-06 Nathan Sidwell <nathan@codesourcery.com>
1811
1812 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
1813 and cf.
1814 (m68k_ip): <case 'J'> Check we have some control regs.
1815 (md_parse_option): Allow raw arch switch.
1816 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
1817 whether 68881 or cfloat was meant by -mfloat.
1818 (md_show_usage): Adjust extension display.
1819 (m68k_elf_final_processing): Adjust.
1820
1821 2006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
1822
1823 * config/tc-avr.c (avr_mod_hash_value): New function.
1824 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
1825 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
1826 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
1827 instead of int avr_ldi_expression: use avr_mod_hash_value instead
1828 of (int).
1829 (tc_gen_reloc): Handle substractions of symbols, if possible do
1830 fixups, abort otherwise.
1831 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
1832 tc_fix_adjustable): Define.
1833
1834 2006-03-02 James E Wilson <wilson@specifix.com>
1835
1836 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
1837 change the template, then clear md.slot[curr].end_of_insn_group.
1838
1839 2006-02-28 Jan Beulich <jbeulich@novell.com>
1840
1841 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
1842
1843 2006-02-28 Jan Beulich <jbeulich@novell.com>
1844
1845 PR/1070
1846 * macro.c (getstring): Don't treat parentheses special anymore.
1847 (get_any_string): Don't consider '(' and ')' as quoting anymore.
1848 Special-case '(', ')', '[', and ']' when dealing with non-quoting
1849 characters.
1850
1851 2006-02-28 Mat <mat@csail.mit.edu>
1852
1853 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
1854
1855 2006-02-27 Jakub Jelinek <jakub@redhat.com>
1856
1857 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
1858 field.
1859 (CFI_signal_frame): Define.
1860 (cfi_pseudo_table): Add .cfi_signal_frame.
1861 (dot_cfi): Handle CFI_signal_frame.
1862 (output_cie): Handle cie->signal_frame.
1863 (select_cie_for_fde): Don't share CIE if signal_frame flag is
1864 different. Copy signal_frame from FDE to newly created CIE.
1865 * doc/as.texinfo: Document .cfi_signal_frame.
1866
1867 2006-02-27 Carlos O'Donell <carlos@codesourcery.com>
1868
1869 * doc/Makefile.am: Add html target.
1870 * doc/Makefile.in: Regenerate.
1871 * po/Make-in: Add html target.
1872
1873 2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
1874
1875 * config/tc-i386.c (output_insn): Support Intel Merom New
1876 Instructions.
1877
1878 * config/tc-i386.h (CpuMNI): New.
1879 (CpuUnknownFlags): Add CpuMNI.
1880
1881 2006-02-24 David S. Miller <davem@sunset.davemloft.net>
1882
1883 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
1884 (hpriv_reg_table): New table for hyperprivileged registers.
1885 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
1886 register encoding.
1887
1888 2006-02-24 DJ Delorie <dj@redhat.com>
1889
1890 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
1891 (tc_gen_reloc): Don't define.
1892 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
1893 (OPTION_LINKRELAX): New.
1894 (md_longopts): Add it.
1895 (m32c_relax): New.
1896 (md_parse_options): Set it.
1897 (md_assemble): Emit relaxation relocs as needed.
1898 (md_convert_frag): Emit relaxation relocs as needed.
1899 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
1900 (m32c_apply_fix): New.
1901 (tc_gen_reloc): New.
1902 (m32c_force_relocation): Force out jump relocs when relaxing.
1903 (m32c_fix_adjustable): Return false if relaxing.
1904
1905 2006-02-24 Paul Brook <paul@codesourcery.com>
1906
1907 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
1908 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
1909 (struct asm_barrier_opt): Define.
1910 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
1911 (parse_psr): Accept V7M psr names.
1912 (parse_barrier): New function.
1913 (enum operand_parse_code): Add OP_oBARRIER.
1914 (parse_operands): Implement OP_oBARRIER.
1915 (do_barrier): New function.
1916 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
1917 (do_t_cpsi): Add V7M restrictions.
1918 (do_t_mrs, do_t_msr): Validate V7M variants.
1919 (md_assemble): Check for NULL variants.
1920 (v7m_psrs, barrier_opt_names): New tables.
1921 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
1922 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
1923 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
1924 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
1925 (struct cpu_arch_ver_table): Define.
1926 (cpu_arch_ver): New.
1927 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
1928 Tag_CPU_arch_profile.
1929 * doc/c-arm.texi: Document new cpu and arch options.
1930
1931 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1932
1933 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
1934
1935 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1936
1937 * config/tc-ia64.c: Update copyright years.
1938
1939 2006-02-22 H.J. Lu <hongjiu.lu@intel.com>
1940
1941 * config/tc-ia64.c (specify_resource): Add the rule 17 from
1942 SDM 2.2.
1943
1944 2005-02-22 Paul Brook <paul@codesourcery.com>
1945
1946 * config/tc-arm.c (do_pld): Remove incorrect write to
1947 inst.instruction.
1948 (encode_thumb32_addr_mode): Use correct operand.
1949
1950 2006-02-21 Paul Brook <paul@codesourcery.com>
1951
1952 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
1953
1954 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
1955 Anil Paranjape <anilp1@kpitcummins.com>
1956 Shilin Shakti <shilins@kpitcummins.com>
1957
1958 * Makefile.am: Add xc16x related entry.
1959 * Makefile.in: Regenerate.
1960 * configure.in: Added xc16x related entry.
1961 * configure: Regenerate.
1962 * config/tc-xc16x.h: New file
1963 * config/tc-xc16x.c: New file
1964 * doc/c-xc16x.texi: New file for xc16x
1965 * doc/all.texi: Entry for xc16x
1966 * doc/Makefile.texi: Added c-xc16x.texi
1967 * NEWS: Announce the support for the new target.
1968
1969 2006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
1970
1971 * configure.tgt: set emulation for mips-*-netbsd*
1972
1973 2006-02-14 Jakub Jelinek <jakub@redhat.com>
1974
1975 * config.in: Rebuilt.
1976
1977 2006-02-13 Bob Wilson <bob.wilson@acm.org>
1978
1979 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
1980 from 1, not 0, in error messages.
1981 (md_assemble): Simplify special-case check for ENTRY instructions.
1982 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
1983 operand in error message.
1984
1985 2006-02-13 Joseph S. Myers <joseph@codesourcery.com>
1986
1987 * configure.tgt (arm-*-linux-gnueabi*): Change to
1988 arm-*-linux-*eabi*.
1989
1990 2006-02-10 Nick Clifton <nickc@redhat.com>
1991
1992 * config/tc-crx.c (check_range): Ensure that the sign bit of a
1993 32-bit value is propagated into the upper bits of a 64-bit long.
1994
1995 * config/tc-arc.c (init_opcode_tables): Fix cast.
1996 (arc_extoper, md_operand): Likewise.
1997
1998 2006-02-09 David Heine <dlheine@tensilica.com>
1999
2000 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
2001 each relaxation step.
2002
2003 2006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
2004
2005 * configure.in (CHECK_DECLS): Add vsnprintf.
2006 * configure: Regenerate.
2007 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
2008 include/declare here, but...
2009 * as.h: Move code detecting VARARGS idiom to the top.
2010 (errno.h, stdarg.h, varargs.h, va_list): ...here.
2011 (vsnprintf): Declare if not already declared.
2012
2013 2006-02-08 H.J. Lu <hongjiu.lu@intel.com>
2014
2015 * as.c (close_output_file): New.
2016 (main): Register close_output_file with xatexit before
2017 dump_statistics. Don't call output_file_close.
2018
2019 2006-02-07 Nathan Sidwell <nathan@codesourcery.com>
2020
2021 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
2022 mcf5329_control_regs): New.
2023 (not_current_architecture, selected_arch, selected_cpu): New.
2024 (m68k_archs, m68k_extensions): New.
2025 (archs): Renamed to ...
2026 (m68k_cpus): ... here. Adjust.
2027 (n_arches): Remove.
2028 (md_pseudo_table): Add arch and cpu directives.
2029 (find_cf_chip, m68k_ip): Adjust table scanning.
2030 (no_68851, no_68881): Remove.
2031 (md_assemble): Lazily initialize.
2032 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
2033 (md_init_after_args): Move functionality to m68k_init_arch.
2034 (mri_chip): Adjust table scanning.
2035 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
2036 options with saner parsing.
2037 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
2038 m68k_init_arch): New.
2039 (s_m68k_cpu, s_m68k_arch): New.
2040 (md_show_usage): Adjust.
2041 (m68k_elf_final_processing): Set CF EF flags.
2042 * config/tc-m68k.h (m68k_init_after_args): Remove.
2043 (tc_init_after_args): Remove.
2044 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
2045 (M68k-Directives): Document .arch and .cpu directives.
2046
2047 2006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl>
2048
2049 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
2050 synonyms for equ and defl.
2051 (z80_cons_fix_new): New function.
2052 (emit_byte): Disallow relative jumps to absolute locations.
2053 (emit_data): Only handle defb, prototype changed, because defb is
2054 now handled as pseudo-op rather than an instruction.
2055 (instab): Entries for defb,defw,db,dw moved from here...
2056 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
2057 Add entries for def24,def32,d24,d32.
2058 (md_assemble): Improved error handling.
2059 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
2060 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
2061 (z80_cons_fix_new): Declare.
2062 * doc/c-z80.texi (defb, db): Mention warning on overflow.
2063 (def24,d24,def32,d32): New pseudo-ops.
2064
2065 2006-02-02 Paul Brook <paul@codesourcery.com>
2066
2067 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
2068
2069 2005-02-02 Paul Brook <paul@codesourcery.com>
2070
2071 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
2072 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
2073 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
2074 T2_OPCODE_RSB): Define.
2075 (thumb32_negate_data_op): New function.
2076 (md_apply_fix): Use it.
2077
2078 2006-01-31 Bob Wilson <bob.wilson@acm.org>
2079
2080 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
2081 fields.
2082 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
2083 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
2084 subtracted symbols.
2085 (relaxation_requirements): Add pfinish_frag argument and use it to
2086 replace setting tinsn->record_fix fields.
2087 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
2088 and vinsn_to_insnbuf. Remove references to record_fix and
2089 slot_sub_symbols fields.
2090 (xtensa_mark_narrow_branches): Delete unused code.
2091 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
2092 a symbol.
2093 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
2094 record_fix fields.
2095 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
2096 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
2097 of the record_fix field. Simplify error messages for unexpected
2098 symbolic operands.
2099 (set_expr_symbol_offset_diff): Delete.
2100
2101 2006-01-31 Paul Brook <paul@codesourcery.com>
2102
2103 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
2104
2105 2006-01-31 Paul Brook <paul@codesourcery.com>
2106 Richard Earnshaw <rearnsha@arm.com>
2107
2108 * config/tc-arm.c: Use arm_feature_set.
2109 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
2110 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
2111 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
2112 New variables.
2113 (insns): Use them.
2114 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
2115 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
2116 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
2117 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
2118 feature flags.
2119 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
2120 (arm_opts): Move old cpu/arch options from here...
2121 (arm_legacy_opts): ... to here.
2122 (md_parse_option): Search arm_legacy_opts.
2123 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
2124 (arm_float_abis, arm_eabis): Make const.
2125
2126 2006-01-25 Bob Wilson <bob.wilson@acm.org>
2127
2128 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
2129
2130 2006-01-21 Jie Zhang <jie.zhang@analog.com>
2131
2132 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
2133 in load immediate intruction.
2134
2135 2006-01-21 Jie Zhang <jie.zhang@analog.com>
2136
2137 * config/bfin-parse.y (value_match): Use correct conversion
2138 specifications in template string for __FILE__ and __LINE__.
2139 (binary): Ditto.
2140 (unary): Ditto.
2141
2142 2006-01-18 Alexandre Oliva <aoliva@redhat.com>
2143
2144 Introduce TLS descriptors for i386 and x86_64.
2145 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
2146 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
2147 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
2148 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
2149 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
2150 displacement bits.
2151 (build_modrm_byte): Set up zero modrm for TLS desc calls.
2152 (lex_got): Handle @tlsdesc and @tlscall.
2153 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
2154
2155 2006-01-11 Nick Clifton <nickc@redhat.com>
2156
2157 Fixes for building on 64-bit hosts:
2158 * config/tc-avr.c (mod_index): New union to allow conversion
2159 between pointers and integers.
2160 (md_begin, avr_ldi_expression): Use it.
2161 * config/tc-i370.c (md_assemble): Add cast for argument to print
2162 statement.
2163 * config/tc-tic54x.c (subsym_substitute): Likewise.
2164 * config/tc-mn10200.c (md_assemble): Use a union to convert the
2165 opindex field of fr_cgen structure into a pointer so that it can
2166 be stored in a frag.
2167 * config/tc-mn10300.c (md_assemble): Likewise.
2168 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
2169 types.
2170 * config/tc-v850.c: Replace uses of (int) casts with correct
2171 types.
2172
2173 2006-01-09 H.J. Lu <hongjiu.lu@intel.com>
2174
2175 PR gas/2117
2176 * symbols.c (snapshot_symbol): Don't change a defined symbol.
2177
2178 2006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
2179
2180 PR gas/2101
2181 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
2182 a local-label reference.
2183
2184 For older changes see ChangeLog-2005
2185 \f
2186 Local Variables:
2187 mode: change-log
2188 left-margin: 8
2189 fill-column: 74
2190 version-control: never
2191 End:
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