* config/tc-ppc.c (ppc_symbol_chars): Remove '+' and '-'.
[deliverable/binutils-gdb.git] / gas / ChangeLog
1 2006-09-22 Alan Modra <amodra@bigpond.net.au>
2
3 * config/tc-ppc.c (ppc_symbol_chars): Remove '+' and '-'.
4
5 2006-09-22 Alan Modra <amodra@bigpond.net.au>
6
7 * as.h (as_perror): Delete declaration.
8 * gdbinit.in (as_perror): Delete breakpoint.
9 * messages.c (as_perror): Delete function.
10 * doc/internals.texi: Remove as_perror description.
11 * listing.c (listing_print: Don't use as_perror.
12 * output-file.c (output_file_create, output_file_close): Likewise.
13 * symbols.c (symbol_create, symbol_clone): Likewise.
14 * write.c (write_contents): Likewise.
15 * config/obj-som.c (obj_som_version, obj_som_copyright): Likewise.
16 * config/tc-tic54x.c (tic54x_mlib): Likewise.
17
18 2006-09-22 Alan Modra <amodra@bigpond.net.au>
19
20 * config/tc-ppc.c (md_section_align): Don't round up address for ELF.
21 (ppc_handle_align): New function.
22 * config/tc-ppc.h (HANDLE_ALIGN): Use ppc_handle_align.
23 (SUB_SEGMENT_ALIGN): Define as zero.
24
25 2006-09-20 Bob Wilson <bob.wilson@acm.org>
26
27 * doc/as.texinfo: Fix cross reference usage, typos and grammar.
28 (Overview): Skip cross reference in man page.
29
30 2006-09-20 Kai Tietz <Kai.Tietz@onevision.com>
31
32 * configure.in: Add new target x86_64-pc-mingw64.
33 * configure: Regenerate.
34 * configure.tgt: Add new target x86_64-pc-mingw64.
35 * config/obj-coff.h: Add handling for TE_PEP target specific code and definitions.
36 * config/tc-i386.c: Add new targets.
37 (md_parse_option): Add targets to OPTION_64.
38 (x86_64_target_format): Add new method for setup proper default target cpu mode.
39 * config/te-pep.h: Add new target definition header.
40 (TE_PEP): New macro: Identifies new target architecture.
41 (COFF_WITH_pex64): Set proper includes in bfd.
42 * NEWS: Mention new target.
43
44 2006-09-18 Bernd Schmidt <bernd.schmidt@analog.com>
45
46 * config/bfin-parse.y (binary): Change sub of const to add of negated
47 const.
48
49 2006-09-17 Mei Ligang <ligang@sunnorth.com.cn>
50
51 * config/tc-score.c: New file.
52 * config/tc-score.h: Newf file.
53 * configure.tgt: Add Score target.
54 * Makefile.am: Add Score files.
55 * Makefile.in: Regenerate.
56 * NEWS: Mention new target support.
57
58 2006-09-16 Paul Brook <paul@codesourcery.com>
59
60 * config/tc-arm.c (s_arm_unwind_movsp): Add offset argument.
61 * doc/c-arm.texi (movsp): Document offset argument.
62
63 2006-09-16 Paul Brook <paul@codesourcery.com>
64
65 * config/tc-arm.c (thumb32_negate_data_op): Consistently use
66 unsigned int to avoid 64-bit host problems.
67
68 2006-09-15 Bernd Schmidt <bernd.schmidt@analog.com>
69
70 * config/bfin-parse.y (binary): Do some more constant folding for
71 additions.
72
73 2006-09-13 Jan Beulich <jbeulich@novell.com>
74
75 * input-file.c (input_file_give_next_buffer): Demote as_bad to
76 as_warn.
77
78 2006-09-13 Alan Modra <amodra@bigpond.net.au>
79
80 PR gas/3165
81 * config/tc-sh (DWARF2_CIE_DATA_ALIGNMENT): Wrap negative number
82 in parens.
83
84 2006-09-13 Alan Modra <amodra@bigpond.net.au>
85
86 * input-file.c (input_file_open): Replace as_perror with as_bad
87 so that gas exits with error on file errors. Correct error
88 message.
89 (input_file_get, input_file_give_next_buffer): Likewise.
90 * input-file.h: Update comment.
91
92 2006-09-11 Tomas Frydrych <dr.tomas@yahoo.co.uk>
93
94 PR gas/3172
95 * config/tc-arm.c (parse_typed_reg_or_scalar): Accept wCg class
96 registers as a sub-class of wC registers.
97
98 2006-09-11 Alan Modra <amodra@bigpond.net.au>
99
100 PR gas/3165
101 * config/tc-mips.h (enum dwarf2_format): Forward declare.
102 (DWARF2_CIE_DATA_ALIGNMENT): Wrap negative number in parens.
103 * config/tc-alpha.h (DWARF2_CIE_DATA_ALIGNMENT): Likewise.
104 * config/tc-arm.h (DWARF2_CIE_DATA_ALIGNMENT): Likewise.
105
106 2006-09-08 Nick Clifton <nickc@redhat.com>
107
108 PR gas/3129
109 * doc/as.texinfo (Macro): Improve documentation about separating
110 macro arguments from following text.
111
112 2006-09-08 Paul Brook <paul@codesourcery.com>
113
114 * config/tc-arm.c (insns): Allow ARM IT pseudo-insn on all cores.
115
116 2006-09-07 Paul Brook <paul@codesourcery.com>
117
118 * config/tc-arm.c (parse_operands): Mark operand as present.
119
120 2006-09-04 Paul Brook <paul@codesourcery.com>
121
122 * config/tc-arm.c (do_neon_dyadic_if_i): Remove.
123 (do_neon_dyadic_if_i_d): Avoid setting U bit.
124 (do_neon_mac_maybe_scalar): Ditto.
125 (do_neon_dyadic_narrow): Force operand type to NT_integer.
126 (insns): Remove out of date comments.
127
128 2006-08-29 Nick Clifton <nickc@redhat.com>
129
130 * read.c (s_align): Initialize the 'stopc' variable to prevent
131 compiler complaints about it being used without being
132 initialized.
133 (s_comm_internal, s_mri_common, s_fail, s_globl, s_space,
134 s_float_space, s_struct, cons_worker, equals): Likewise.
135
136 2006-08-29 Malcolm Parsons <malcolm.parsons@gmail.com>
137
138 * ecoff.c (ecoff_directive_val): Fix message typo.
139 * config/tc-ns32k.c (convert_iif): Likewise.
140 * config/tc-sh64.c (shmedia_check_limits): Likewise.
141
142 2006-08-25 Sterling Augustine <sterling@tensilica.com>
143 Bob Wilson <bob.wilson@acm.org>
144
145 * config/tc-xtensa.c (xtensa_mark_literal_pool_location): Do not check
146 the state of the absolute_literals directive. Remove align frag at
147 the start of the literal pool position.
148
149 2006-08-25 Bob Wilson <bob.wilson@acm.org>
150
151 * doc/c-xtensa.texi: Add @group commands in examples.
152
153 2006-08-24 Bob Wilson <bob.wilson@acm.org>
154
155 * config/tc-xtensa.c (FINI_LITERAL_SECTION_NAME): Delete.
156 (INIT_LITERAL_SECTION_NAME): Delete.
157 (lit_state struct): Remove segment names, init_lit_seg, and
158 fini_lit_seg. Add lit_prefix and current_text_seg.
159 (init_literal_head_h, init_literal_head): Delete.
160 (fini_literal_head_h, fini_literal_head): Delete.
161 (xtensa_begin_directive): Move argument parsing to
162 xtensa_literal_prefix function.
163 (xtensa_end_directive): Deallocate lit_prefix field of lit_state.
164 (xtensa_literal_prefix): Parse the directive argument here and
165 record it in the lit_prefix field. Remove code to derive literal
166 section names.
167 (linkonce_len): New.
168 (get_is_linkonce_section): Use linkonce_len. Check for any
169 ".gnu.linkonce.*" section, not just text sections.
170 (md_begin): Remove initialization of deleted lit_state fields.
171 (xtensa_reorder_segments, xtensa_post_relax_hook): Remove references
172 to init_literal_head and fini_literal_head.
173 (xtensa_move_literals): Likewise. Skip literals for .init and .fini
174 when traversing literal_head list.
175 (match_section_group): New.
176 (cache_literal_section): Rewrite to determine the literal section
177 name on the fly, create the section and return it.
178 (xtensa_switch_to_literal_fragment): Adjust for cache_literal_section.
179 (xtensa_switch_to_non_abs_literal_fragment): Likewise.
180 (xtensa_create_property_segments, xtensa_create_xproperty_segments):
181 Use xtensa_get_property_section from bfd.
182 (retrieve_xtensa_section): Delete.
183 * doc/c-xtensa.texi (Xtensa Options): Fix --text-section-literals
184 description to refer to plural literal sections and add xref to
185 the Literal Directive section.
186 (Literal Directive): Describe new rules for deriving literal section
187 names. Add footnote for special case of .init/.fini with
188 --text-section-literals.
189 (Literal Prefix Directive): Replace old naming rules with xref to the
190 Literal Directive section.
191
192 2006-08-21 Joseph Myers <joseph@codesourcery.com>
193
194 * config/tc-arm.c (s_arm_unwind_save_mmxwr): Correct condition for
195 merging with previous long opcode.
196
197 2006-08-22 Pedro Alves <pedro_alves@portugalmail.pt>
198
199 * Makefile.am (TARG_ENV_HFILES): Add te-wince-pe.h.
200 * Makefile.in: Regenerate.
201 * config/tc-arm.h [TARGET_FORMAT]: ARM wince bfd names were
202 renamed. Adjust.
203
204 2006-08-16 Julian Brown <julian@codesourcery.com>
205
206 * config/tc-arm.c (md_assemble): Improve diagnostic when attempting
207 to use ARM instructions on non-ARM-supporting cores.
208 (autoselect_thumb_from_cpu_variant): New function. Switch on Thumb
209 mode automatically based on cpu variant.
210 (md_begin): Call above function.
211
212 2006-08-16 Julian Brown <julian@codesourcery.com>
213
214 * config/tc-arm.c (opcode_lookup): Allow Neon type suffixes to be
215 recognized in non-unified syntax mode.
216
217 2006-08-15 Thiemo Seufer <ths@mips.com>
218 Nigel Stephens <nigel@mips.com>
219 David Ung <davidu@mips.com>
220
221 * configure.tgt: Handle mips*-sde-elf*.
222
223 2006-08-12 Thiemo Seufer <ths@networkno.de>
224
225 * config/tc-mips.c (mips16_ip): Fix argument register handling
226 for restore instruction.
227
228 2006-08-08 Bob Wilson <bob.wilson@acm.org>
229
230 * dwarf2dbg.c (DWARF2_USE_FIXED_ADVANCE_PC): New.
231 (out_sleb128): New.
232 (out_fixed_inc_line_addr): New.
233 (process_entries): Use out_fixed_inc_line_addr when
234 DWARF2_USE_FIXED_ADVANCE_PC is set.
235 * config/tc-xtensa.h (DWARF2_USE_FIXED_ADVANCE_PC): Define.
236
237 2006-08-08 DJ Delorie <dj@redhat.com>
238
239 * config/tc-sh.c (sh_frob_section): Canonicalize pointers to local
240 vs full symbols so that we never have more than one pointer value
241 for any given symbol in our symbol table.
242
243 2006-08-08 Sterling Augustine <sterling@tensilica.com>
244
245 * dwarf2dbg.c (out_debug_info): Add new parameter ranges_seg
246 and emit DW_AT_ranges when code in compilation unit is not
247 contiguous.
248 (out_debug_abbrev): Emit DW_AT_ranges abbreviation if code in
249 is not contiguous.
250 (dwarf2_finish): Create and pass ranges_seg to out_debug_info.
251 (out_debug_ranges): New function to emit .debug_ranges section
252 when code is not contiguous.
253
254 2006-08-08 Nick Clifton <nickc@redhat.com>
255
256 * config/tc-arm.c (WARN_DEPRECATED): Enable.
257
258 2006-08-05 Pedro Alves <pedro_alves@portugalmail.pt>
259
260 * config/tc-arm.c: Move "dwarf2dbg.h" inclusion out of OBJ_ELF
261 only block.
262 (pe_directive_secrel) [TE_PE]: New function.
263 (md_pseudo_table) [!OBJ_ELF]: Handle 2byte, 4byte, 8byte, file,
264 loc, loc_mark_labels.
265 [TE_PE]: Handle secrel32.
266 (output_relax_insn): Remove OBJ_ELF around dwarf2_emit_insn
267 call.
268 (output_inst): Remove OBJ_ELF around dwarf2_emit_insn call.
269 (arm_frob_label): Remove OBJ_ELF around dwarf2_emit_label call.
270 (md_section_align): Only round section sizes here for AOUT
271 targets.
272 (tc_arm_regname_to_dw2regnum): Move out for OBJ_ELF only block.
273 (tc_pe_dwarf2_emit_offset): New function.
274 (md_apply_fix) [TE_PE]: Handle BFD_RELOC_32_SECREL.
275 (cons_fix_new_arm): Handle O_secrel.
276 * config/tc-arm.h : Move DWARF2_LINE_MIN_INSN_LENGTH,
277 DWARF2_DEFAULT_RETURN_COLUMN and DWARF2_CIE_DATA_ALIGNMENT out
278 of OBJ_ELF only block.
279 [TE_PE]: Define O_secrel, TC_DWARF2_EMIT_OFFSET, and declare
280 tc_pe_dwarf2_emit_offset.
281
282 2006-08-04 Richard Sandiford <richard@codesourcery.com>
283
284 * config/tc-sh.c (apply_full_field_fix): New function.
285 (md_apply_fix): Use it instead of md_number_to_chars. Do not fill
286 in fx_addnumber for BFD_RELOC_32_PLT_PCREL.
287 (tc_gen_reloc): Use fx_addnumber rather than 0 as the default case.
288 * config/tc-sh.h (TARGET_FORMAT): Override for TE_VXWORKS.
289
290 2006-08-03 Nick Clifton <nickc@redhat.com>
291
292 PR gas/2991
293 * config.in: Regenerate.
294
295 2006-08-03 Joseph Myers <joseph@codesourcery.com>
296
297 * config/tc-arm.c (parse_operands): Handle invalid register name
298 for OP_RIWR_RIWC.
299
300 2006-08-03 Joseph Myers <joseph@codesourcery.com>
301
302 * config/tc-arm.c (enum operand_parse_code): Add OP_RIWC_RIWG.
303 (parse_operands): Handle it.
304 (insns): Use it for tmcr and tmrc.
305
306 2006-08-02 Petr Salinger <Petr.Salinger@seznam.cz>
307
308 PR binutils/2983
309 * config/tc-i386.c (md_parse_option): Treat any target starting
310 with elf64_x86_64 as a viable target for the -64 switch.
311 (i386_target_format): For 64-bit ELF flavoured output use
312 ELF_TARGET_FORMAT64.
313 * config/tc-i386.h (ELF_TARGET_FORMAT64): Define.
314
315 2006-08-02 Nick Clifton <nickc@redhat.com>
316
317 PR gas/2991
318 * acinclude.m4 (BFD_BINARY_FOPEN): Import this function from
319 bfd/aclocal.m4.
320 * configure.in: Run BFD_BINARY_FOPEN.
321 * configure: Regenerate.
322 * as.h: Look at USE_BINARY_FOPEN to decide which fopen-*.h header
323 file to include.
324
325 2006-08-01 H.J. Lu <hongjiu.lu@intel.com>
326
327 * config/tc-i386.c (md_assemble): Don't update
328 cpu_arch_isa_flags.
329
330 2006-08-01 Thiemo Seufer <ths@mips.com>
331
332 * config/tc-mips.c (md_section_align): Check ELF-ness at runtime.
333
334 2006-08-01 Thiemo Seufer <ths@mips.com>
335
336 * config/tc-mips.c (macro_build_lui): Fix comment formatting.
337 (md_apply_fix): Likewise. Unify handling of BFD_RELOC_RVA,
338 BFD_RELOC_32 and BFD_RELOC_16.
339 (s_align, s_cpload, s_cplocal, s_cprestore, s_mips_stab,
340 md_convert_frag, md_obj_end): Fix comment formatting.
341
342 2006-07-31 Thiemo Seufer <ths@mips.com>
343
344 * config/tc-mips.c (md_apply_fix, tc_gen_reloc): Remove special
345 handling for BFD_RELOC_MIPS16_JMP.
346
347 2006-07-24 Andreas Schwab <schwab@suse.de>
348
349 PR/2756
350 * read.c (read_a_source_file): Ignore unknown text after line
351 comment character. Fix misleading comment.
352
353 2006-07-24 Ralk Wildenhues <Ralf.Wildenhues@gmx.de>
354
355 * doc/all.texi, doc/as.texinfo, doc/c-arc.texi, doc/c-arm.texi,
356 doc/c-avr.texi, doc/c-bfin.texi, doc/c-i386.texi,
357 doc/c-i960.texi, doc/c-m32r.texi, doc/c-m68k.texi,
358 doc/c-mmix.texi, doc/c-pdp11.texi, doc/c-ppc.texi,
359 doc/c-tic54x.texi, doc/c-v850.texi, doc/c-xtensa.texi,
360 doc/c-z80.texi, doc/internals.texi: Fix some typos.
361
362 2006-07-21 Nick Clifton <nickc@redhat.com>
363
364 * config/tc-sh.c (md_longopts): Add -EL and -EB for use by the
365 linker testsuite.
366
367 2006-07-20 Thiemo Seufer <ths@mips.com>
368 Nigel Stephens <nigel@mips.com>
369
370 * config/tc-mips.c (md_parse_option): Don't infer optimisation
371 options from debug options.
372
373 2006-07-20 Thiemo Seufer <ths@mips.com>
374
375 * config/tc-mips.c (mips_fix_adjustable): Handle BFD_RELOC_MIPS16_JMP.
376 (tc_gen_reloc): Handle mips16 jumps to section symbol offsets.
377
378 2006-07-19 Paul Brook <paul@codesourcery.com>
379
380 * config/tc-arm.c (insns): Fix rbit Arm opcode.
381
382 2006-07-18 Paul Brook <paul@codesourcery.com>
383
384 * tc-arm.c (do_t_add_sub): Use addw/subw when source is PC.
385 (md_convert_frag): Use correct reloc for add_pc. Use
386 BFD_RELOC_ARM_T32_ADD_IMM for normal add/sum.
387 (md_apply_fix): Handle BFD_RELOC_ARM_T32_ADD_IMM.
388 (arm_force_relocation): Handle BFD_RELOC_ARM_T32_ADD_IMM.
389
390 2006-07-17 Mat Hostetter <mat@lcs.mit.edu>
391
392 * symbols.c (report_op_error): Fix pasto. Don't use as_bad_where
393 when file and line unknown.
394
395 2006-07-17 Thiemo Seufer <ths@mips.com>
396
397 * read.c (s_struct): Use IS_ELF.
398 * config/tc-mips.c (md_begin, mips16_mark_labels, mips_ip,
399 md_parse_option, s_change_sec, pic_need_relax, mips_fix_adjustable,
400 tc_gen_reloc, mips_frob_file_after_relocs, s_mips_end, s_mips_frame,
401 s_mips_mask): Likewise.
402
403 2006-07-16 Thiemo Seufer <ths@mips.com>
404 David Ung <davidu@mips.com>
405
406 * read.c (s_struct): Handle ELF section changing.
407 * config/tc-mips.c (s_align): Leave enabling auto-align to the
408 generic code.
409 (s_change_sec): Try section changing only if we output ELF.
410
411 2006-07-15 H.J. Lu <hongjiu.lu@intel.com>
412
413 * config/tc-i386.c (cpu_arch): Remove Cpu086, CpuAthlon and
414 CpuAmdFam10.
415 (smallest_imm_type): Remove Cpu086.
416 (i386_target_format): Likewise.
417
418 * config/tc-i386.h: Remove Cpu086, CpuAthlon and CpuAmdFam10.
419 Update CpuXXX.
420
421 2006-07-13 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
422 Michael Meissner <michael.meissner@amd.com>
423
424 * config/tc-i386.h (PROCESSOR_AMDFAM10): New processor_type.
425 (CpuSSE4a, CpuABM, CpuAmdFam10): New Cpu directives.
426 * config/tc-i386.c (cpu_arch): Add support for AmdFam10
427 architecture.
428 (i386_align_code): Ditto.
429 (md_assemble_code): Add support for insertq/extrq instructions,
430 swapping as needed for intel syntax.
431 (swap_imm_operands): New function to swap immediate operands.
432 (swap_operands): Deal with 4 operand instructions.
433 (build_modrm_byte): Add support for insertq instruction.
434
435 2006-07-13 H.J. Lu <hongjiu.lu@intel.com>
436
437 * config/tc-i386.h (Size64): Fix a typo in comment.
438
439 2006-07-12 Nick Clifton <nickc@redhat.com>
440
441 * config/tc-sh.c (md_apply_fix): Do not allow the generic code in
442 fixup_segment() to repeat a range check on a value that has
443 already been checked here.
444
445 2006-07-07 James E Wilson <wilson@specifix.com>
446
447 * config/tc-mips.c (mips_cpu_info_table): Add sb1a.
448
449 2006-07-06 Mohammed Adnène Trojette <adn@diwi.org>
450 Nick Clifton <nickc@redhat.com>
451
452 PR binutils/2877
453 * doc/as.texi: Fix spelling typo: branchs => branches.
454 * doc/c-m68hc11.texi: Likewise.
455 * config/tc-m68hc11.c: Likewise.
456 Support old spelling of command line switch for backwards
457 compatibility.
458
459 2006-07-04 Thiemo Seufer <ths@mips.com>
460 David Ung <davidu@mips.com>
461
462 * config/tc-mips.c (s_is_linkonce): New function.
463 (mips16_mark_labels): Don't adjust mips16 symbol addresses for
464 weak, external, and linkonce symbols.
465 (pic_need_relax): Use s_is_linkonce.
466
467 2006-06-24 H.J. Lu <hongjiu.lu@intel.com>
468
469 * doc/as.texinfo (Org): Remove space.
470 (P2align): Add "@var{abs-expr},".
471
472 2006-06-23 H.J. Lu <hongjiu.lu@intel.com>
473
474 * config/tc-i386.c (cpu_arch_tune_set): New.
475 (cpu_arch_isa): Likewise.
476 (i386_align_code): Use xchg %ax,%ax for 2 byte nop. Optimize
477 nops with short or long nop sequences based on -march=/.arch
478 and -mtune=.
479 (set_cpu_arch): Set cpu_arch_isa. If cpu_arch_tune_set is 0,
480 set cpu_arch_tune and cpu_arch_tune_flags.
481 (md_parse_option): For -march=, set cpu_arch_isa and set
482 cpu_arch_tune and cpu_arch_tune_flags if cpu_arch_tune_set is
483 0. Set cpu_arch_tune_set to 1 for -mtune=.
484 (i386_target_format): Don't set cpu_arch_tune.
485
486 2006-06-23 Nigel Stephens <nigel@mips.com>
487
488 * config/tc-mips.c (nopic_need_relax): Handle -fdata-sections
489 generated .sbss.* and .gnu.linkonce.sb.*.
490
491 2006-06-23 Thiemo Seufer <ths@mips.com>
492 David Ung <davidu@mips.com>
493
494 * config/tc-mips.h (TC_SEGMENT_INFO_TYPE): Declare per-segment
495 label_list.
496 * config/tc-mips.c (label_list): Define per-segment label_list.
497 (mips_clear_insn_labels, mips_move_labels, mips16_mark_labels,
498 append_insn, s_align, s_cons, s_float_cons, s_gpword, s_gpdword,
499 mips_from_file_after_relocs, mips_define_label): Use per-segment
500 label_list.
501
502 2006-06-22 Thiemo Seufer <ths@mips.com>
503
504 * config/tc-mips.c (ISA_SUPPORTS_MIPS16E): New macro.
505 (append_insn): Use it.
506 (md_apply_fix): Whitespace formatting.
507 (md_begin, append_insn, macro, macro2, mips16_immed, mips_align,
508 mips16_extended_frag): Remove register specifier.
509 (md_convert_frag): Likewise. Use TRUE ans FALSE instead of numeric
510 constants.
511
512 2006-06-21 Mark Shinwell <shinwell@codesourcery.com>
513
514 * config/tc-arm.c (s_arm_unwind_save_vfp_armv6): New. Parse
515 a directive saving VFP registers for ARMv6 or later.
516 (s_arm_unwind_save): Add parameter arch_v6 and call
517 s_arm_unwind_save_vfp or s_arm_unwind_save_vfp_armv6 as
518 appropriate.
519 (md_pseudo_table): Add entry for new "vsave" directive.
520 * doc/c-arm.texi: Correct error in example for "save"
521 directive (fstmdf -> fstmdx). Also document "vsave" directive.
522
523 2006-06-18 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
524 Anatoly Sokolov <aesok@post.ru>
525
526 * config/tc-avr.c (mcu_types): Add support for atmega165p, atmega169p
527 and atmega644p devices. Rename atmega164/atmega324 devices to
528 atmega164p/atmega324p.
529 * doc/c-avr.texi: Document new mcu and arch options.
530
531 2006-06-17 Nick Clifton <nickc@redhat.com>
532
533 * config/tc-arm.c (enum parse_operand_result): Move outside of
534 #ifdef OBJ_ELF so that non-ELF targeted ARM ports can build.
535
536 2006-06-16 H.J. Lu <hongjiu.lu@intel.com>
537
538 * config/tc-i386.h (processor_type): New.
539 (arch_entry): Add type.
540
541 * config/tc-i386.c (cpu_arch_tune): New.
542 (cpu_arch_tune_flags): Likewise.
543 (cpu_arch_isa_flags): Likewise.
544 (cpu_arch): Updated.
545 (set_cpu_arch): Also update cpu_arch_isa_flags.
546 (md_assemble): Update cpu_arch_isa_flags.
547 (OPTION_MARCH): New.
548 (OPTION_MTUNE): Likewise.
549 (md_longopts): Add -march= and -mtune=.
550 (md_parse_option): Support -march= and -mtune=.
551 (md_show_usage): Add -march=CPU/-mtune=CPU.
552 (i386_target_format): Also update cpu_arch_isa_flags,
553 cpu_arch_tune and cpu_arch_tune_flags.
554
555 * doc/as.texinfo: Add -march=CPU/-mtune=CPU.
556
557 * doc/c-i386.texi: Document -march=CPU/-mtune=CPU.
558
559 2006-06-15 Mark Shinwell <shinwell@codesourcery.com>
560
561 * config/tc-arm.c (enum parse_operand_result): New.
562 (struct group_reloc_table_entry): New.
563 (enum group_reloc_type): New.
564 (group_reloc_table): New array.
565 (find_group_reloc_table_entry): New function.
566 (parse_shifter_operand_group_reloc): New function.
567 (parse_address_main): New function, incorporating code
568 from the old parse_address function. To be used via...
569 (parse_address): wrapper for parse_address_main; and
570 (parse_address_group_reloc): new function, likewise.
571 (enum operand_parse_code): New codes OP_SHG, OP_ADDRGLDR,
572 OP_ADDRGLDRS, OP_ADDRGLDC.
573 (parse_operands): Support for these new operand codes.
574 New macro po_misc_or_fail_no_backtrack.
575 (encode_arm_cp_address): Preserve group relocations.
576 (insns): Modify to use the above operand codes where group
577 relocations are permitted.
578 (md_apply_fix): Handle the group relocations
579 ALU_PC_G0_NC through LDC_SB_G2.
580 (tc_gen_reloc): Likewise.
581 (arm_force_relocation): Leave group relocations for the linker.
582 (arm_fix_adjustable): Likewise.
583
584 2006-06-15 Julian Brown <julian@codesourcery.com>
585
586 * config/tc-arm.c (do_vfp_nsyn_ldr_str): Remove, fold into...
587 (do_neon_ldr_str): Always defer to VFP encoding routines, which handle
588 relocs properly.
589
590 2006-06-12 H.J. Lu <hongjiu.lu@intel.com>
591
592 * config/tc-i386.c (process_suffix): Don't add rex64 for
593 "xchg %rax,%rax".
594
595 2006-06-09 Thiemo Seufer <ths@mips.com>
596
597 * config/tc-mips.c (mips_ip): Maintain argument count.
598
599 2006-06-09 Alan Modra <amodra@bigpond.net.au>
600
601 * config/tc-iq2000.c: Include sb.h.
602
603 2006-06-08 Nigel Stephens <nigel@mips.com>
604
605 * config/tc-mips.c (mips_pseudo_table): Add "origin" and "repeat"
606 aliases for better compatibility with SGI tools.
607
608 2006-06-08 Alan Modra <amodra@bigpond.net.au>
609
610 * configure.in (BFDLIB, BFDVER_H, ALL_OBJ_DEPS): Delete.
611 * Makefile.am (GASLIBS): Expand @BFDLIB@.
612 (BFDVER_H): Delete.
613 (OBJS): Expand @ALL_OBJ_DEPS@. Depend on all fopen-*.h variants.
614 (obj-aout.o): Depend on $(DEP_@target_get_type@_aout)
615 (obj-coff.o, obj-ecoff.o, obj-elf.o): Similarly.
616 Run "make dep-am".
617 * dep-in.sed: Don't substitute bfdver.h. Do remove symcat.h.
618 * Makefile.in: Regenerate.
619 * doc/Makefile.in: Regenerate.
620 * configure: Regenerate.
621
622 2006-06-07 Joseph S. Myers <joseph@codesourcery.com>
623
624 * po/Make-in (pdf, ps): New dummy targets.
625
626 2006-06-07 Julian Brown <julian@codesourcery.com>
627
628 * config/tc-arm.c (stdarg.h): include.
629 (arm_it): Add uncond_value field. Add isvec and issingle to operand
630 array.
631 (arm_reg_type): Add REG_TYPE_VFSD (single or double VFP reg) and
632 REG_TYPE_NSDQ (single, double or quad vector reg).
633 (reg_expected_msgs): Update.
634 (BAD_FPU): Add macro for unsupported FPU instruction error.
635 (parse_neon_type): Support 'd' as an alias for .f64.
636 (parse_typed_reg_or_scalar): Support REG_TYPE_VFSD, REG_TYPE_NSDQ
637 sets of registers.
638 (parse_vfp_reg_list): Don't update first arg on error.
639 (parse_neon_mov): Support extra syntax for VFP moves.
640 (operand_parse_code): Add OP_RVSD, OP_RNSDQ, OP_VRSDLST, OP_RVSD_IO,
641 OP_RNSDQ_RNSC, OP_RVC_PSR, OP_APSR_RR, OP_oRNSDQ.
642 (parse_operands): Support isvec, issingle operands fields, new parse
643 codes above.
644 (do_vfp_nsyn_mrs, do_vfp_nsyn_msr): New functions. Support VFP mrs,
645 msr variants.
646 (do_mrs, do_msr, do_t_mrs, do_t_msr): Add support for above.
647 (NEON_ENC_TAB): Add vnmul, vnmla, vnmls, vcmp, vcmpz, vcmpe, vcmpez.
648 (NEON_ENC_SINGLE, NEON_ENC_DOUBLE): Define macros.
649 (NEON_SHAPE_DEF): New macro. Define table of possible instruction
650 shapes.
651 (neon_shape): Redefine in terms of above.
652 (neon_shape_class): New enumeration, table of shape classes.
653 (neon_shape_el): New enumeration. One element of a shape.
654 (neon_shape_el_size): Register widths of above, where appropriate.
655 (neon_shape_info): New struct. Info for shape table.
656 (neon_shape_tab): New array.
657 (neon_type_mask): Add N_F64, N_VFP. Update N_MAX_NONSPECIAL.
658 (neon_check_shape): Rewrite as...
659 (neon_select_shape): New function to classify instruction shapes,
660 driven by new table neon_shape_tab array.
661 (neon_quad): New function. Return 1 if shape should set Q flag in
662 instructions (or equivalent), 0 otherwise.
663 (type_chk_of_el_type): Support F64.
664 (el_type_of_type_chk): Likewise.
665 (neon_check_type): Add support for VFP type checking (VFP data
666 elements fill their containing registers).
667 (do_vfp_cond_or_thumb): Fill in condition field in ARM mode, or 0xE
668 in thumb mode for VFP instructions.
669 (do_vfp_nsyn_opcode): New function. Look up the opcode in argument,
670 and encode the current instruction as if it were that opcode.
671 (try_vfp_nsyn): New. If this looks like a VFP instruction with ARGS
672 arguments, call function in PFN.
673 (do_vfp_nsyn_add_sub, do_vfp_nsyn_mla_mls, do_vfp_nsyn_mul)
674 (do_vfp_nsyn_abs_neg, do_vfp_nsyn_ldm_stm, do_vfp_nsyn_ldr_str)
675 (do_vfp_nsyn_sqrt, do_vfp_nsyn_div, do_vfp_nsyn_nmul)
676 (do_vfp_nsyn_cmp, nsyn_insert_sp, do_vfp_nsyn_push)
677 (do_vfp_nsyn_pop, do_vfp_nsyn_cvt, do_vfp_nsyn_cvtz): New functions.
678 Redirect Neon-syntax VFP instructions to VFP instruction handlers.
679 (do_neon_dyadic_i_su, do_neon_dyadic_i64_su, do_neon_shl_imm)
680 (do_neon_qshl_imm, do_neon_logic, do_neon_bitfield)
681 (neon_dyadic_misc, neon_compare, do_neon_tst, do_neon_qdmulh)
682 (do_neon_fcmp_absolute, do_neon_step, do_neon_sli, do_neon_sri)
683 (do_neon_qshlu_imm, neon_move_immediate, do_neon_mvn, do_neon_ext)
684 (do_neon_rev, do_neon_dup, do_neon_rshift_round_imm, do_neon_trn)
685 (do_neon_zip_uzp, do_neon_sat_abs_neg, do_neon_pair_long)
686 (do_neon_recip_est, do_neon_cls, do_neon_clz, do_neon_cnt)
687 (do_neon_swp): Use neon_select_shape not neon_check_shape. Use
688 neon_quad.
689 (vfp_or_neon_is_neon): New function. Call if a mnemonic shared
690 between VFP and Neon turns out to belong to Neon. Perform
691 architecture check and fill in condition field if appropriate.
692 (do_neon_addsub_if_i, do_neon_mac_maybe_scalar, do_neon_abs_neg)
693 (do_neon_cvt): Add support for VFP variants of instructions.
694 (neon_cvt_flavour): Extend to cover VFP conversions.
695 (do_neon_mov): Rewrite to use neon_select_shape. Add support for VFP
696 vmov variants.
697 (do_neon_ldr_str): Handle single-precision VFP load/store.
698 (do_neon_ld_st_interleave, do_neon_ld_st_lane, do_neon_ld_dup): Use
699 NS_NULL not NS_IGNORE.
700 (opcode_tag): Add OT_csuffixF for operands which either take a
701 conditional suffix, or have 0xF in the condition field.
702 (md_assemble): Add support for OT_csuffixF.
703 (NCE): Replace macro with...
704 (NCE_tag, NCE, NCEF): New macros.
705 (nCE): Replace macro with...
706 (nCE_tag, nCE, nCEF): New macros.
707 (insns): Add support for VFP insns or VFP versions of insns msr,
708 mrs, vsqrt, vdiv, vnmul, vnmla, vnmls, vcmp, vcmpe, vpush, vpop,
709 vcvtz, vmul, vmla, vmls, vadd, vsub, vabs, vneg, vldm, vldmia,
710 vldbdb, vstm, vstmia, vstmdb, vldr, vstr, vcvt, vmov. Group shared
711 VFP/Neon insns together.
712
713 2006-06-07 Alan Modra <amodra@bigpond.net.au>
714 Ladislav Michl <ladis@linux-mips.org>
715
716 * app.c: Don't include headers already included by as.h.
717 * as.c: Likewise.
718 * atof-generic.c: Likewise.
719 * cgen.c: Likewise.
720 * dwarf2dbg.c: Likewise.
721 * expr.c: Likewise.
722 * input-file.c: Likewise.
723 * input-scrub.c: Likewise.
724 * macro.c: Likewise.
725 * output-file.c: Likewise.
726 * read.c: Likewise.
727 * sb.c: Likewise.
728 * config/bfin-lex.l: Likewise.
729 * config/obj-coff.h: Likewise.
730 * config/obj-elf.h: Likewise.
731 * config/obj-som.h: Likewise.
732 * config/tc-arc.c: Likewise.
733 * config/tc-arm.c: Likewise.
734 * config/tc-avr.c: Likewise.
735 * config/tc-bfin.c: Likewise.
736 * config/tc-cris.c: Likewise.
737 * config/tc-d10v.c: Likewise.
738 * config/tc-d30v.c: Likewise.
739 * config/tc-dlx.h: Likewise.
740 * config/tc-fr30.c: Likewise.
741 * config/tc-frv.c: Likewise.
742 * config/tc-h8300.c: Likewise.
743 * config/tc-hppa.c: Likewise.
744 * config/tc-i370.c: Likewise.
745 * config/tc-i860.c: Likewise.
746 * config/tc-i960.c: Likewise.
747 * config/tc-ip2k.c: Likewise.
748 * config/tc-iq2000.c: Likewise.
749 * config/tc-m32c.c: Likewise.
750 * config/tc-m32r.c: Likewise.
751 * config/tc-maxq.c: Likewise.
752 * config/tc-mcore.c: Likewise.
753 * config/tc-mips.c: Likewise.
754 * config/tc-mmix.c: Likewise.
755 * config/tc-mn10200.c: Likewise.
756 * config/tc-mn10300.c: Likewise.
757 * config/tc-msp430.c: Likewise.
758 * config/tc-mt.c: Likewise.
759 * config/tc-ns32k.c: Likewise.
760 * config/tc-openrisc.c: Likewise.
761 * config/tc-ppc.c: Likewise.
762 * config/tc-s390.c: Likewise.
763 * config/tc-sh.c: Likewise.
764 * config/tc-sh64.c: Likewise.
765 * config/tc-sparc.c: Likewise.
766 * config/tc-tic30.c: Likewise.
767 * config/tc-tic4x.c: Likewise.
768 * config/tc-tic54x.c: Likewise.
769 * config/tc-v850.c: Likewise.
770 * config/tc-vax.c: Likewise.
771 * config/tc-xc16x.c: Likewise.
772 * config/tc-xstormy16.c: Likewise.
773 * config/tc-xtensa.c: Likewise.
774 * config/tc-z80.c: Likewise.
775 * config/tc-z8k.c: Likewise.
776 * macro.h: Don't include sb.h or ansidecl.h.
777 * sb.h: Don't include stdio.h or ansidecl.h.
778 * cond.c: Include sb.h.
779 * itbl-lex.l: Include as.h instead of other system headers.
780 * itbl-parse.y: Likewise.
781 * itbl-ops.c: Similarly.
782 * itbl-ops.h: Don't include as.h or ansidecl.h.
783 * config/bfin-defs.h: Don't include bfd.h or as.h.
784 * config/bfin-parse.y: Include as.h instead of other system headers.
785
786 2006-06-06 Ben Elliston <bje@au.ibm.com>
787 Anton Blanchard <anton@samba.org>
788
789 * config/tc-ppc.c (parse_cpu): Handle "-mpower6".
790 (md_show_usage): Document it.
791 (ppc_setup_opcodes): Test power6 opcode flag bits.
792 * doc/c-ppc.texi (PowerPC-Opts): Document "-mpower6".
793
794 2006-06-06 Thiemo Seufer <ths@mips.com>
795 Chao-ying Fu <fu@mips.com>
796
797 * config/tc-mips.c (ISA_SUPPORTS_DSP64): New macro.
798 (CPU_HAS_MIPS3D, CPU_HAS_MDMX, CPU_HAS_DSP, CPU_HAS_MT): Delete.
799 (macro_build): Update comment.
800 (mips_ip): Allow DSP64 instructions for MIPS64R2.
801 (mips_after_parse_args): Remove uses of CPU_HAS_MIPS3D and
802 CPU_HAS_MDMX.
803 (mips_cpu_info): Fix formatting. Add MIPS_CPU_ASE_MIPS3D and
804 MIPS_CPU_ASE_MDMX flags for sb1.
805
806 2006-06-05 Thiemo Seufer <ths@mips.com>
807
808 * config/tc-mips.c (macro_build): Use INSERT_OPERAND wherew
809 appropriate.
810 (mips16_macro_build): Use MIPS16_INSERT_OPERAND where appropriate.
811 (mips_ip): Make overflowed/underflowed constant arguments in DSP
812 and MT instructions a fatal error. Use INSERT_OPERAND where
813 appropriate. Improve warnings for break and wait code overflows.
814 Use symbolic constant of OP_MASK_COPZ.
815 (mips16_ip): Use MIPS16_INSERT_OPERAND where appropriate.
816
817 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
818
819 * po/Make-in (top_builddir): Define.
820
821 2006-06-02 Joseph S. Myers <joseph@codesourcery.com>
822
823 * doc/Makefile.am (TEXI2DVI): Define.
824 * doc/Makefile.in: Regenerate.
825 * doc/c-arc.texi: Fix typo.
826
827 2006-06-01 Alan Modra <amodra@bigpond.net.au>
828
829 * config/obj-ieee.c: Delete.
830 * config/obj-ieee.h: Delete.
831 * Makefile.am (OBJ_FORMATS): Remove ieee.
832 (OBJ_FORMAT_CFILES, OBJ_FORMAT_HFILES): Similarly.
833 (obj-ieee.o): Remove rule.
834 * Makefile.in: Regenerate.
835 * configure.in (atof): Remove tahoe.
836 (OBJ_MAYBE_IEEE): Don't define.
837 * configure: Regenerate.
838 * config.in: Regenerate.
839 * doc/Makefile.in: Regenerate.
840 * po/POTFILES.in: Regenerate.
841
842 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
843
844 * Makefile.am: Replace INTLLIBS and INTLDEPS with LIBINTL
845 and LIBINTL_DEP everywhere.
846 (INTLLIBS): Remove.
847 (INCLUDES, DEP_INCLUDES): Use @INCINTL@.
848 * acinclude.m4: Include new gettext macros.
849 * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
850 Remove local code for po/Makefile.
851 * Makefile.in, configure, doc/Makefile.in: Regenerated.
852
853 2006-05-30 Nick Clifton <nickc@redhat.com>
854
855 * po/es.po: Updated Spanish translation.
856
857 2006-05-06 Denis Chertykov <denisc@overta.ru>
858
859 * doc/c-avr.texi: New file.
860 * doc/Makefile.am (CPU_DOCS): Add c-avr.texi
861 * doc/all.texi: Set AVR
862 * doc/as.texinfo: Include c-avr.texi
863
864 2006-05-28 Jie Zhang <jie.zhang@analog.com>
865
866 * config/bfin-parse.y (check_macfunc): Loose the condition of
867 calling check_multiply_halfregs ().
868
869 2006-05-25 Jie Zhang <jie.zhang@analog.com>
870
871 * config/bfin-parse.y (asm_1): Better check and deal with
872 vector and scalar Multiply 16-Bit Operands instructions.
873
874 2006-05-24 Nick Clifton <nickc@redhat.com>
875
876 * config/tc-hppa.c: Convert to ISO C90 format.
877 * config/tc-hppa.h: Likewise.
878
879 2006-05-24 Carlos O'Donell <carlos@systemhalted.org>
880 Randolph Chung <randolph@tausq.org>
881
882 * config/tc-hppa.c (is_tls_gdidx, is_tls_ldidx, is_tls_dtpoff,
883 is_tls_ieoff, is_tls_leoff): Define.
884 (fix_new_hppa): Handle TLS.
885 (cons_fix_new_hppa): Likewise.
886 (pa_ip): Likewise.
887 (md_apply_fix): Handle TLS relocs.
888 * config/tc-hppa.h (hppa_fix_adjustable): Handle TLS.
889
890 2006-05-24 Bjoern Haase <bjoern.m.haase@web.de>
891
892 * config/tc-avr.c: Add new cpu targets avr6, avr2560 and avr2561.
893
894 2006-05-23 Thiemo Seufer <ths@mips.com>
895 David Ung <davidu@mips.com>
896 Nigel Stephens <nigel@mips.com>
897
898 [ gas/ChangeLog ]
899 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS): Rename.
900 (ISA_SUPPORTS_DSP_ASE, ISA_SUPPORTS_MT_ASE, ISA_HAS_64BIT_FPRS,
901 ISA_HAS_MXHC1): New macros.
902 (HAVE_32BIT_FPRS): Use ISA_HAS_64BIT_FPRS instead of
903 ISA_HAS_64BIT_REGS. Formatting fixes. Improved comments.
904 (mips_cpu_info): Change to use combined ASE/IS_ISA flag.
905 (MIPS_CPU_IS_ISA, MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP,
906 MIPS_CPU_ASE_MT, MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX): New defines.
907 (mips_after_parse_args): Change default handling of float register
908 size to account for 32bit code with 64bit FP. Better sanity checking
909 of ISA/ASE/ABI option combinations.
910 (s_mipsset): Support switching of GPR and FPR sizes via
911 .set {g,f}p={32,64,default}. Better sanity checking for .set ASE
912 options.
913 (mips_elf_final_processing): We should record the use of 64bit FP
914 registers in 32bit code but we don't, because ELF header flags are
915 a scarce ressource.
916 (mips_cpu_info_table): Add ASE flags for CPUs with mandatory ASE
917 extensions. Add 4ksc, 4kec, 4kem, 4kep, 4ksd, m4kp, 24kec, 24kef,
918 24kex, 34kc, 34kf, 34kx, 25kf CPU definitions.
919 (mips_cpu_info_from_isa): Use MIPS_CPU_IS_ISA.
920 * doc/c-mips.texi: Document .set {g,f}p={32,64,default}. Document
921 missing -march options. Document .set arch=CPU. Move .set smartmips
922 to ASE page. Use @code for .set FOO examples.
923
924 2006-05-23 Jie Zhang <jie.zhang@analog.com>
925
926 * config/tc-bfin.c (bfin_start_line_hook): Bump line counters
927 if needed.
928
929 2006-05-23 Jie Zhang <jie.zhang@analog.com>
930
931 * config/bfin-defs.h (bfin_equals): Remove declaration.
932 * config/bfin-parse.y (asm_1): Remove "expr ASSIGN expr".
933 * config/tc-bfin.c (bfin_name_is_register): Remove.
934 (bfin_equals): Remove.
935 * config/tc-bfin.h (TC_EQUAL_IN_INSN): Redefine as 1.
936 (bfin_name_is_register): Remove declaration.
937
938 2006-05-19 Thiemo Seufer <ths@mips.com>
939 Nigel Stephens <nigel@mips.com>
940
941 * config/tc-mipc.c (ISA_HAS_ODD_SINGLE_FPR): New define.
942 (mips_oddfpreg_ok): New function.
943 (mips_ip): Use it.
944
945 2006-05-19 Thiemo Seufer <ths@mips.com>
946 David Ung <davidu@mips.com>
947
948 * config/tc-mips.h (tc_mips_regname_to_dw2regnum): Declare.
949 * config/tc-mipc.c (ABI_NEEDS_64BIT_REGS, ISA_HAS_64BIT_REGS,
950 ISA_HAS_DROR, ISA_HAS_ROR): Reformat.
951 (regname, RTYPE_MASK, RTYPE_NUM, RTYPE_FPU, RTYPE_FCC, RTYPE_VEC,
952 RTYPE_GP, RTYPE_CP0, RTYPE_PC, RTYPE_ACC, RTYPE_CCC, RNUM_MASK,
953 RWARN, GENERIC_REGISTER_NUMBERS, FPU_REGISTER_NAMES,
954 FPU_CONDITION_CODE_NAMES, COPROC_CONDITION_CODE_NAMES,
955 N32N64_SYMBOLIC_REGISTER_NAMES, O32_SYMBOLIC_REGISTER_NAMES,
956 SYMBOLIC_REGISTER_NAMES, MIPS16_SPECIAL_REGISTER_NAMES,
957 MDMX_VECTOR_REGISTER_NAMES, MIPS_DSP_ACCUMULATOR_NAMES, reg_names,
958 reg_names_o32, reg_names_n32n64): Define register classes.
959 (reg_lookup): New function, use register classes.
960 (md_begin): Reserve register names in the symbol table. Simplify
961 OBJ_ELF defines.
962 (mips_ip): Fix comment formatting. Handle symbolic COP0 registers.
963 Use reg_lookup.
964 (mips16_ip): Use reg_lookup.
965 (tc_get_register): Likewise.
966 (tc_mips_regname_to_dw2regnum): New function.
967
968 2006-05-19 Thiemo Seufer <ths@mips.com>
969
970 * config/tc-arm.c, config/tc-arm.h (tc_arm_regname_to_dw2regnum):
971 Un-constify string argument.
972 * config/tc-i386.c, config/tc-i386.h (tc_x86_regname_to_dw2regnum):
973 Likewise.
974 * config/tc-m68k.c, config/tc-m68k.h (tc_m68k_regname_to_dw2regnum):
975 Likewise.
976 * config/tc-ppc.c, config/tc-ppc.h (tc_ppc_regname_to_dw2regnum):
977 Likewise.
978 * config/tc-s390.c, config/tc-s390.h (tc_s390_regname_to_dw2regnum):
979 Likewise.
980 * config/tc-sh.c, config/tc-sh.h (sh_regname_to_dw2regnum):
981 Likewise.
982 * config/tc-sparc.c, config/tc-sparc.h (sparc_regname_to_dw2regnum):
983 Likewise.
984
985 2006-05-19 Nathan Sidwell <nathan@codesourcery.com>
986
987 * gas/config/tc-m68k.c (m68k_init_arch): Move checking of
988 cfloat/m68881 to correct architecture before using it.
989
990 2006-05-16 Bjoern Haase <bjoern.m.haase@web.de>
991
992 * config/tc-avr.h (TC_VALIDATE_FIX): Allow fixups for immediate
993 constant values.
994
995 2006-05-15 Paul Brook <paul@codesourcery.com>
996
997 * config/tc-arm.c (arm_adjust_symtab): Use
998 bfd_is_arm_special_symbol_name.
999
1000 2006-05-15 Bob Wilson <bob.wilson@acm.org>
1001
1002 * config/tc-xtensa.c (is_direct_call_opcode, is_branch_jmp_to_next,
1003 xg_assemble_vliw_tokens, xtensa_mark_narrow_branches,
1004 xtensa_fix_short_loop_frags, is_local_forward_loop, relax_frag_immed):
1005 Handle errors from calls to xtensa_opcode_is_* functions.
1006
1007 2006-05-14 Thiemo Seufer <ths@mips.com>
1008
1009 * config/tc-mips.c (macro_build): Test for currently active
1010 mips16 option.
1011 (mips16_ip): Reject invalid opcodes.
1012
1013 2006-05-11 Carlos O'Donell <carlos@codesourcery.com>
1014
1015 * doc/as.texinfo: Rename "Index" to "AS Index",
1016 and "ABORT" to "ABORT (COFF)".
1017
1018 2006-05-11 Paul Brook <paul@codesourcery.com>
1019
1020 * config/tc-arm.c (parse_half): New function.
1021 (operand_parse_code): Remove OP_Iffff. Add OP_HALF.
1022 (parse_operands): Ditto.
1023 (do_mov16): Reject invalid relocations.
1024 (do_t_mov16): Ditto. Use Thumb reloc numbers.
1025 (insns): Replace Iffff with HALF.
1026 (md_apply_fix): Add MOVW and MOVT relocs.
1027 (tc_gen_reloc): Ditto.
1028 * doc/c-arm.texi: Document relocation operators
1029
1030 2006-05-11 Paul Brook <paul@codesourcery.com>
1031
1032 * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
1033
1034 2006-05-11 Thiemo Seufer <ths@mips.com>
1035
1036 * config/tc-mips.c (append_insn): Don't check the range of j or
1037 jal addresses.
1038
1039 2006-05-11 Pedro Alves <pedro_alves@portugalmail.pt>
1040
1041 * config/tc-arm.c (md_pcrel_from_section): Force a bias for
1042 relocs against external symbols for WinCE targets.
1043 (md_apply_fix): Likewise.
1044
1045 2006-05-09 David Ung <davidu@mips.com>
1046
1047 * config/tc-mips.c (append_insn): Only warn about an out-of-range
1048 j or jal address.
1049
1050 2006-05-09 Nick Clifton <nickc@redhat.com>
1051
1052 * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups
1053 against symbols which are not going to be placed into the symbol
1054 table.
1055
1056 2006-05-09 Ben Elliston <bje@au.ibm.com>
1057
1058 * expr.c (operand): Remove `if (0 && ..)' statement and
1059 subsequently unused target_op label. Collapse `if (1 || ..)'
1060 statement.
1061 * app.c (do_scrub_chars): Remove unused case 0, as it is handled
1062 separately above the switch.
1063
1064 2006-05-08 Nick Clifton <nickc@redhat.com>
1065
1066 PR gas/2623
1067 * config/tc-msp430.c (line_separator_character): Define as |.
1068
1069 2006-05-08 Thiemo Seufer <ths@mips.com>
1070 Nigel Stephens <nigel@mips.com>
1071 David Ung <davidu@mips.com>
1072
1073 * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
1074 (mips_opts): Likewise.
1075 (file_ase_smartmips): New variable.
1076 (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
1077 (macro_build): Handle SmartMIPS instructions.
1078 (mips_ip): Likewise.
1079 (md_longopts): Add argument handling for smartmips.
1080 (md_parse_options, mips_after_parse_args): Likewise.
1081 (s_mipsset): Add .set smartmips support.
1082 (md_show_usage): Document -msmartmips/-mno-smartmips.
1083 * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
1084 .set smartmips.
1085 * doc/c-mips.texi: Likewise.
1086
1087 2006-05-08 Alan Modra <amodra@bigpond.net.au>
1088
1089 * write.c (relax_segment): Add pass count arg. Don't error on
1090 negative org/space on first two passes.
1091 (relax_seg_info): New struct.
1092 (relax_seg, write_object_file): Adjust.
1093 * write.h (relax_segment): Update prototype.
1094
1095 2006-05-05 Julian Brown <julian@codesourcery.com>
1096
1097 * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
1098 checking.
1099 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
1100 architecture version checks.
1101 (insns): Allow overlapping instructions to be used in VFP mode.
1102
1103 2006-05-05 H.J. Lu <hongjiu.lu@intel.com>
1104
1105 PR gas/2598
1106 * config/obj-elf.c (obj_elf_change_section): Allow user
1107 specified SHF_ALPHA_GPREL.
1108
1109 2006-05-05 Bjoern Haase <bjoern.m.haase@web.de>
1110
1111 * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups
1112 for PMEM related expressions.
1113
1114 2006-05-05 Nick Clifton <nickc@redhat.com>
1115
1116 PR gas/2582
1117 * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the
1118 insertion of a directory separator character into a string at a
1119 given offset. Uses heuristics to decide when to use a backslash
1120 character rather than a forward-slash character.
1121 (dwarf2_directive_loc): Use the macro.
1122 (out_debug_info): Likewise.
1123
1124 2006-05-05 Thiemo Seufer <ths@mips.com>
1125 David Ung <davidu@mips.com>
1126
1127 * config/tc-mips.c (macro_build): Add case 'k' to handle cache
1128 instruction.
1129 (macro): Add new case M_CACHE_AB.
1130
1131 2006-05-04 Kazu Hirata <kazu@codesourcery.com>
1132
1133 * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
1134 (opcode_lookup): Issue a warning for opcode with
1135 OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated
1136 identical to OT_cinfix3.
1137 (TxC3w, TC3w, tC3w): New.
1138 (insns): Use tC3w and TC3w for comparison instructions with
1139 's' suffix.
1140
1141 2006-05-04 Alan Modra <amodra@bigpond.net.au>
1142
1143 * subsegs.h (struct frchain): Delete frch_seg.
1144 (frchain_root): Delete.
1145 (seg_info): Define as macro.
1146 * subsegs.c (frchain_root): Delete.
1147 (abs_seg_info, und_seg_info, absolute_frchain): Delete.
1148 (subsegs_begin, subseg_change): Adjust for above.
1149 (subseg_set_rest): Likewise. Add new frchain structs to seginfo
1150 rather than to one big list.
1151 (subseg_get): Don't special case abs, und sections.
1152 (subseg_new, subseg_force_new): Don't set frchainP here.
1153 (seg_info): Delete.
1154 (subsegs_print_statistics): Adjust frag chain control list traversal.
1155 * debug.c (dmp_frags): Likewise.
1156 * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
1157 at frchain_root. Make use of known frchain ordering.
1158 (last_frag_for_seg): Likewise.
1159 (get_frag_fix): Likewise. Add seg param.
1160 (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
1161 * write.c (chain_frchains_together_1): Adjust for struct frchain.
1162 (SUB_SEGMENT_ALIGN): Likewise.
1163 (subsegs_finish): Adjust frchain list traversal.
1164 * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
1165 (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
1166 (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
1167 (xtensa_fix_b_j_loop_end_frags): Likewise.
1168 (xtensa_fix_close_loop_end_frags): Likewise.
1169 (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
1170 (retrieve_segment_info): Delete frch_seg initialisation.
1171
1172 2006-05-03 Alan Modra <amodra@bigpond.net.au>
1173
1174 * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
1175 * config/obj-elf.h (obj_sec_set_private_data): Delete.
1176 * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
1177 * config/tc-mn10300.c (tc_gen_reloc): Likewise.
1178
1179 2006-05-02 Joseph Myers <joseph@codesourcery.com>
1180
1181 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
1182 here.
1183 (md_apply_fix3): Multiply offset by 4 here for
1184 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
1185
1186 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
1187 Jan Beulich <jbeulich@novell.com>
1188
1189 * config/tc-i386.c (output_invalid_buf): Change size for
1190 unsigned char.
1191 * config/tc-tic30.c (output_invalid_buf): Likewise.
1192
1193 * config/tc-i386.c (output_invalid): Cast none-ascii char to
1194 unsigned char.
1195 * config/tc-tic30.c (output_invalid): Likewise.
1196
1197 2006-05-02 Daniel Jacobowitz <dan@codesourcery.com>
1198
1199 * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
1200 (TEXI2POD): Use AM_MAKEINFOFLAGS.
1201 (asconfig.texi): Don't set top_srcdir.
1202 * doc/as.texinfo: Don't use top_srcdir.
1203 * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
1204
1205 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
1206
1207 * config/tc-i386.c (output_invalid_buf): Change size to 16.
1208 * config/tc-tic30.c (output_invalid_buf): Likewise.
1209
1210 * config/tc-i386.c (output_invalid): Use snprintf instead of
1211 sprintf.
1212 * config/tc-ia64.c (declare_register_set): Likewise.
1213 (emit_one_bundle): Likewise.
1214 (check_dependencies): Likewise.
1215 * config/tc-tic30.c (output_invalid): Likewise.
1216
1217 2006-05-02 Paul Brook <paul@codesourcery.com>
1218
1219 * config/tc-arm.c (arm_optimize_expr): New function.
1220 * config/tc-arm.h (md_optimize_expr): Define
1221 (arm_optimize_expr): Add prototype.
1222 (TC_FORCE_RELOCATION_SUB_SAME): Define.
1223
1224 2006-05-02 Ben Elliston <bje@au.ibm.com>
1225
1226 * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
1227 field unsigned.
1228
1229 * sb.h (sb_list_vector): Move to sb.c.
1230 * sb.c (free_list): Use type of sb_list_vector directly.
1231 (sb_build): Fix off-by-one error in assertion about `size'.
1232
1233 2006-05-01 Ben Elliston <bje@au.ibm.com>
1234
1235 * listing.c (listing_listing): Remove useless loop.
1236 * macro.c (macro_expand): Remove is_positional local variable.
1237 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
1238 and simplify surrounding expressions, where possible.
1239 (assign_symbol): Likewise.
1240 (s_weakref): Likewise.
1241 * symbols.c (colon): Likewise.
1242
1243 2006-05-01 James Lemke <jwlemke@wasabisystems.com>
1244
1245 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
1246
1247 2006-04-30 Thiemo Seufer <ths@mips.com>
1248 David Ung <davidu@mips.com>
1249
1250 * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
1251 (mips_immed): New table that records various handling of udi
1252 instruction patterns.
1253 (mips_ip): Adds udi handling.
1254
1255 2006-04-28 Alan Modra <amodra@bigpond.net.au>
1256
1257 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
1258 of list rather than beginning.
1259
1260 2006-04-26 Julian Brown <julian@codesourcery.com>
1261
1262 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
1263 (is_quarter_float): Rename from above. Simplify slightly.
1264 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
1265 number.
1266 (parse_neon_mov): Parse floating-point constants.
1267 (neon_qfloat_bits): Fix encoding.
1268 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
1269 preference to integer encoding when using the F32 type.
1270
1271 2006-04-26 Julian Brown <julian@codesourcery.com>
1272
1273 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
1274 zero-initialising structures containing it will lead to invalid types).
1275 (arm_it): Add vectype to each operand.
1276 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
1277 defined field.
1278 (neon_typed_alias): New structure. Extra information for typed
1279 register aliases.
1280 (reg_entry): Add neon type info field.
1281 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
1282 Break out alternative syntax for coprocessor registers, etc. into...
1283 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
1284 out from arm_reg_parse.
1285 (parse_neon_type): Move. Return SUCCESS/FAIL.
1286 (first_error): New function. Call to ensure first error which occurs is
1287 reported.
1288 (parse_neon_operand_type): Parse exactly one type.
1289 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
1290 (parse_typed_reg_or_scalar): New function. Handle core of both
1291 arm_typed_reg_parse and parse_scalar.
1292 (arm_typed_reg_parse): Parse a register with an optional type.
1293 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
1294 result.
1295 (parse_scalar): Parse a Neon scalar with optional type.
1296 (parse_reg_list): Use first_error.
1297 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
1298 (neon_alias_types_same): New function. Return true if two (alias) types
1299 are the same.
1300 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
1301 of elements.
1302 (insert_reg_alias): Return new reg_entry not void.
1303 (insert_neon_reg_alias): New function. Insert type/index information as
1304 well as register for alias.
1305 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
1306 make typed register aliases accordingly.
1307 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
1308 of line.
1309 (s_unreq): Delete type information if present.
1310 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
1311 (s_arm_unwind_save_mmxwcg): Likewise.
1312 (s_arm_unwind_movsp): Likewise.
1313 (s_arm_unwind_setfp): Likewise.
1314 (parse_shift): Likewise.
1315 (parse_shifter_operand): Likewise.
1316 (parse_address): Likewise.
1317 (parse_tb): Likewise.
1318 (tc_arm_regname_to_dw2regnum): Likewise.
1319 (md_pseudo_table): Add dn, qn.
1320 (parse_neon_mov): Handle typed operands.
1321 (parse_operands): Likewise.
1322 (neon_type_mask): Add N_SIZ.
1323 (N_ALLMODS): New macro.
1324 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
1325 (el_type_of_type_chk): Add some safeguards.
1326 (modify_types_allowed): Fix logic bug.
1327 (neon_check_type): Handle operands with types.
1328 (neon_three_same): Remove redundant optional arg handling.
1329 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
1330 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
1331 (do_neon_step): Adjust accordingly.
1332 (neon_cmode_for_logic_imm): Use first_error.
1333 (do_neon_bitfield): Call neon_check_type.
1334 (neon_dyadic): Rename to...
1335 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
1336 to allow modification of type of the destination.
1337 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1338 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
1339 (do_neon_compare): Make destination be an untyped bitfield.
1340 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
1341 (neon_mul_mac): Return early in case of errors.
1342 (neon_move_immediate): Use first_error.
1343 (neon_mac_reg_scalar_long): Fix type to include scalar.
1344 (do_neon_dup): Likewise.
1345 (do_neon_mov): Likewise (in several places).
1346 (do_neon_tbl_tbx): Fix type.
1347 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
1348 (do_neon_ld_dup): Exit early in case of errors and/or use
1349 first_error.
1350 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
1351 Handle .dn/.qn directives.
1352 (REGDEF): Add zero for reg_entry neon field.
1353
1354 2006-04-26 Julian Brown <julian@codesourcery.com>
1355
1356 * config/tc-arm.c (limits.h): Include.
1357 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
1358 (fpu_vfp_v3_or_neon_ext): Declare constants.
1359 (neon_el_type): New enumeration of types for Neon vector elements.
1360 (neon_type_el): New struct. Define type and size of a vector element.
1361 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
1362 instruction.
1363 (neon_type): Define struct. The type of an instruction.
1364 (arm_it): Add 'vectype' for the current instruction.
1365 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
1366 (vfp_sp_reg_pos): Rename to...
1367 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
1368 tags.
1369 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
1370 (Neon D or Q register).
1371 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
1372 register.
1373 (GE_OPT_PREFIX_BIG): Define constant, for use in...
1374 (my_get_expression): Allow above constant as argument to accept
1375 64-bit constants with optional prefix.
1376 (arm_reg_parse): Add extra argument to return the specific type of
1377 register in when either a D or Q register (REG_TYPE_NDQ) is
1378 requested. Can be NULL.
1379 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
1380 (parse_reg_list): Update for new arm_reg_parse args.
1381 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
1382 (parse_neon_el_struct_list): New function. Parse element/structure
1383 register lists for VLD<n>/VST<n> instructions.
1384 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
1385 (s_arm_unwind_save_mmxwr): Likewise.
1386 (s_arm_unwind_save_mmxwcg): Likewise.
1387 (s_arm_unwind_movsp): Likewise.
1388 (s_arm_unwind_setfp): Likewise.
1389 (parse_big_immediate): New function. Parse an immediate, which may be
1390 64 bits wide. Put results in inst.operands[i].
1391 (parse_shift): Update for new arm_reg_parse args.
1392 (parse_address): Likewise. Add parsing of alignment specifiers.
1393 (parse_neon_mov): Parse the operands of a VMOV instruction.
1394 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
1395 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
1396 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
1397 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
1398 (parse_operands): Handle new codes above.
1399 (encode_arm_vfp_sp_reg): Rename to...
1400 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
1401 selected VFP version only supports D0-D15.
1402 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
1403 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
1404 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
1405 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
1406 encode_arm_vfp_reg name, and allow 32 D regs.
1407 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
1408 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
1409 regs.
1410 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
1411 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
1412 constant-load and conversion insns introduced with VFPv3.
1413 (neon_tab_entry): New struct.
1414 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
1415 those which are the targets of pseudo-instructions.
1416 (neon_opc): Enumerate opcodes, use as indices into...
1417 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
1418 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
1419 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
1420 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
1421 neon_enc_tab.
1422 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
1423 Neon instructions.
1424 (neon_type_mask): New. Compact type representation for type checking.
1425 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
1426 permitted type combinations.
1427 (N_IGNORE_TYPE): New macro.
1428 (neon_check_shape): New function. Check an instruction shape for
1429 multiple alternatives. Return the specific shape for the current
1430 instruction.
1431 (neon_modify_type_size): New function. Modify a vector type and size,
1432 depending on the bit mask in argument 1.
1433 (neon_type_promote): New function. Convert a given "key" type (of an
1434 operand) into the correct type for a different operand, based on a bit
1435 mask.
1436 (type_chk_of_el_type): New function. Convert a type and size into the
1437 compact representation used for type checking.
1438 (el_type_of_type_ckh): New function. Reverse of above (only when a
1439 single bit is set in the bit mask).
1440 (modify_types_allowed): New function. Alter a mask of allowed types
1441 based on a bit mask of modifications.
1442 (neon_check_type): New function. Check the type of the current
1443 instruction against the variable argument list. The "key" type of the
1444 instruction is returned.
1445 (neon_dp_fixup): New function. Fill in and modify instruction bits for
1446 a Neon data-processing instruction depending on whether we're in ARM
1447 mode or Thumb-2 mode.
1448 (neon_logbits): New function.
1449 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
1450 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
1451 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
1452 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
1453 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
1454 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
1455 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1456 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
1457 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
1458 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
1459 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
1460 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
1461 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
1462 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
1463 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
1464 (neon_move_immediate, do_neon_mvn, neon_mixed_length)
1465 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
1466 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
1467 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
1468 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
1469 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
1470 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
1471 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
1472 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
1473 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
1474 helpers.
1475 (parse_neon_type): New function. Parse Neon type specifier.
1476 (opcode_lookup): Allow parsing of Neon type specifiers.
1477 (REGNUM2, REGSETH, REGSET2): New macros.
1478 (reg_names): Add new VFPv3 and Neon registers.
1479 (NUF, nUF, NCE, nCE): New macros for opcode table.
1480 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
1481 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
1482 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
1483 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
1484 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
1485 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
1486 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
1487 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
1488 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
1489 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
1490 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
1491 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
1492 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
1493 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
1494 fto[us][lh][sd].
1495 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
1496 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
1497 (arm_option_cpu_value): Add vfp3 and neon.
1498 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
1499 VFPv1 attribute.
1500
1501 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1502
1503 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
1504 syntax instead of hardcoded opcodes with ".w18" suffixes.
1505 (wide_branch_opcode): New.
1506 (build_transition): Use it to check for wide branch opcodes with
1507 either ".w18" or ".w15" suffixes.
1508
1509 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1510
1511 * config/tc-xtensa.c (xtensa_create_literal_symbol,
1512 xg_assemble_literal, xg_assemble_literal_space): Do not set the
1513 frag's is_literal flag.
1514
1515 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1516
1517 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
1518
1519 2006-04-23 Kazu Hirata <kazu@codesourcery.com>
1520
1521 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
1522 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
1523 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
1524 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
1525 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
1526
1527 2005-04-20 Paul Brook <paul@codesourcery.com>
1528
1529 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
1530 all targets.
1531 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
1532
1533 2006-04-19 Alan Modra <amodra@bigpond.net.au>
1534
1535 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
1536 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
1537 Make some cpus unsupported on ELF. Run "make dep-am".
1538 * Makefile.in: Regenerate.
1539
1540 2006-04-19 Alan Modra <amodra@bigpond.net.au>
1541
1542 * configure.in (--enable-targets): Indent help message.
1543 * configure: Regenerate.
1544
1545 2006-04-18 H.J. Lu <hongjiu.lu@intel.com>
1546
1547 PR gas/2533
1548 * config/tc-i386.c (i386_immediate): Check illegal immediate
1549 register operand.
1550
1551 2006-04-18 Alan Modra <amodra@bigpond.net.au>
1552
1553 * config/tc-i386.c: Formatting.
1554 (output_disp, output_imm): ISO C90 params.
1555
1556 * frags.c (frag_offset_fixed_p): Constify args.
1557 * frags.h (frag_offset_fixed_p): Ditto.
1558
1559 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
1560 (COFF_MAGIC): Delete.
1561
1562 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
1563
1564 2006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
1565
1566 * po/POTFILES.in: Regenerated.
1567
1568 2006-04-16 Mark Mitchell <mark@codesourcery.com>
1569
1570 * doc/as.texinfo: Mention that some .type syntaxes are not
1571 supported on all architectures.
1572
1573 2006-04-14 Sterling Augustine <sterling@tensilica.com>
1574
1575 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
1576 instructions when such transformations have been disabled.
1577
1578 2006-04-10 Sterling Augustine <sterling@tensilica.com>
1579
1580 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
1581 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
1582 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
1583 decoding the loop instructions. Remove current_offset variable.
1584 (xtensa_fix_short_loop_frags): Likewise.
1585 (min_bytes_to_other_loop_end): Remove current_offset argument.
1586
1587 2006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl>
1588
1589 * config/tc-z80.c (z80_optimize_expr): Removed.
1590 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
1591
1592 2006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
1593
1594 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
1595 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
1596 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
1597 atmega644, atmega329, atmega3290, atmega649, atmega6490,
1598 atmega406, atmega640, atmega1280, atmega1281, at90can32,
1599 at90can64, at90usb646, at90usb647, at90usb1286 and
1600 at90usb1287.
1601 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
1602
1603 2006-04-07 Paul Brook <paul@codesourcery.com>
1604
1605 * config/tc-arm.c (parse_operands): Set default error message.
1606
1607 2006-04-07 Paul Brook <paul@codesourcery.com>
1608
1609 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
1610
1611 2006-04-07 Paul Brook <paul@codesourcery.com>
1612
1613 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
1614
1615 2006-04-07 Paul Brook <paul@codesourcery.com>
1616
1617 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
1618 (move_or_literal_pool): Handle Thumb-2 instructions.
1619 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
1620
1621 2006-04-07 Alan Modra <amodra@bigpond.net.au>
1622
1623 PR 2512.
1624 * config/tc-i386.c (match_template): Move 64-bit operand tests
1625 inside loop.
1626
1627 2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
1628
1629 * po/Make-in: Add install-html target.
1630 * Makefile.am: Add install-html and install-html-recursive targets.
1631 * Makefile.in: Regenerate.
1632 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
1633 * configure: Regenerate.
1634 * doc/Makefile.am: Add install-html and install-html-am targets.
1635 * doc/Makefile.in: Regenerate.
1636
1637 2006-04-06 Alan Modra <amodra@bigpond.net.au>
1638
1639 * frags.c (frag_offset_fixed_p): Reinitialise offset before
1640 second scan.
1641
1642 2006-04-05 Richard Sandiford <richard@codesourcery.com>
1643 Daniel Jacobowitz <dan@codesourcery.com>
1644
1645 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
1646 (GOTT_BASE, GOTT_INDEX): New.
1647 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
1648 GOTT_INDEX when generating VxWorks PIC.
1649 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
1650 use the generic *-*-vxworks* stanza instead.
1651
1652 2006-04-04 Alan Modra <amodra@bigpond.net.au>
1653
1654 PR 997
1655 * frags.c (frag_offset_fixed_p): New function.
1656 * frags.h (frag_offset_fixed_p): Declare.
1657 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
1658 (resolve_expression): Likewise.
1659
1660 2006-04-03 Sterling Augustine <sterling@tensilica.com>
1661
1662 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
1663 of the same length but different numbers of slots.
1664
1665 2006-03-30 Andreas Schwab <schwab@suse.de>
1666
1667 * configure.in: Fix help string for --enable-targets option.
1668 * configure: Regenerate.
1669
1670 2006-03-28 Nathan Sidwell <nathan@codesourcery.com>
1671
1672 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
1673 (m68k_ip): ... here. Use for all chips. Protect against buffer
1674 overrun and avoid excessive copying.
1675
1676 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
1677 m68020_control_regs, m68040_control_regs, m68060_control_regs,
1678 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
1679 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
1680 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
1681 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
1682 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
1683 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
1684 mcf5282_ctrl, mcfv4e_ctrl): ... these.
1685 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
1686 (struct m68k_cpu): Change chip field to control_regs.
1687 (current_chip): Remove.
1688 (control_regs): New.
1689 (m68k_archs, m68k_extensions): Adjust.
1690 (m68k_cpus): Reorder to be in cpu number order. Adjust.
1691 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
1692 (find_cf_chip): Reimplement for new organization of cpu table.
1693 (select_control_regs): Remove.
1694 (mri_chip): Adjust.
1695 (struct save_opts): Save control regs, not chip.
1696 (s_save, s_restore): Adjust.
1697 (m68k_lookup_cpu): Give deprecated warning when necessary.
1698 (m68k_init_arch): Adjust.
1699 (md_show_usage): Adjust for new cpu table organization.
1700
1701 2006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
1702
1703 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
1704 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
1705 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
1706 "elf/bfin.h".
1707 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
1708 (any_gotrel): New rule.
1709 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
1710 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
1711 "elf/bfin.h".
1712 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
1713 (bfin_pic_ptr): New function.
1714 (md_pseudo_table): Add it for ".picptr".
1715 (OPTION_FDPIC): New macro.
1716 (md_longopts): Add -mfdpic.
1717 (md_parse_option): Handle it.
1718 (md_begin): Set BFD flags.
1719 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
1720 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
1721 us for GOT relocs.
1722 * Makefile.am (bfin-parse.o): Update dependencies.
1723 (DEPTC_bfin_elf): Likewise.
1724 * Makefile.in: Regenerate.
1725
1726 2006-03-25 Richard Sandiford <richard@codesourcery.com>
1727
1728 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
1729 mcfemac instead of mcfmac.
1730
1731 2006-03-23 Michael Matz <matz@suse.de>
1732
1733 * config/tc-i386.c (type_names): Correct placement of 'static'.
1734 (reloc): Map some more relocs to their 64 bit counterpart when
1735 size is 8.
1736 (output_insn): Work around breakage if DEBUG386 is defined.
1737 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
1738 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
1739 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
1740 different from i386.
1741 (output_imm): Ditto.
1742 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
1743 Imm64.
1744 (md_convert_frag): Jumps can now be larger than 2GB away, error
1745 out in that case.
1746 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
1747 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
1748
1749 2006-03-22 Richard Sandiford <richard@codesourcery.com>
1750 Daniel Jacobowitz <dan@codesourcery.com>
1751 Phil Edwards <phil@codesourcery.com>
1752 Zack Weinberg <zack@codesourcery.com>
1753 Mark Mitchell <mark@codesourcery.com>
1754 Nathan Sidwell <nathan@codesourcery.com>
1755
1756 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
1757 (md_begin): Complain about -G being used for PIC. Don't change
1758 the text, data and bss alignments on VxWorks.
1759 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
1760 generating VxWorks PIC.
1761 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
1762 (macro): Likewise, but do not treat la $25 specially for
1763 VxWorks PIC, and do not handle jal.
1764 (OPTION_MVXWORKS_PIC): New macro.
1765 (md_longopts): Add -mvxworks-pic.
1766 (md_parse_option): Don't complain about using PIC and -G together here.
1767 Handle OPTION_MVXWORKS_PIC.
1768 (md_estimate_size_before_relax): Always use the first relaxation
1769 sequence on VxWorks.
1770 * config/tc-mips.h (VXWORKS_PIC): New.
1771
1772 2006-03-21 Paul Brook <paul@codesourcery.com>
1773
1774 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
1775
1776 2006-03-21 Sterling Augustine <sterling@tensilica.com>
1777
1778 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
1779 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
1780 (get_loop_align_size): New.
1781 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
1782 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
1783 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
1784 (get_noop_aligned_address): Use get_loop_align_size.
1785 (get_aligned_diff): Likewise.
1786
1787 2006-03-21 Paul Brook <paul@codesourcery.com>
1788
1789 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
1790
1791 2006-03-20 Paul Brook <paul@codesourcery.com>
1792
1793 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
1794 (do_t_branch): Encode branches inside IT blocks as unconditional.
1795 (do_t_cps): New function.
1796 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
1797 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
1798 (opcode_lookup): Allow conditional suffixes on all instructions in
1799 Thumb mode.
1800 (md_assemble): Advance condexec state before checking for errors.
1801 (insns): Use do_t_cps.
1802
1803 2006-03-20 Paul Brook <paul@codesourcery.com>
1804
1805 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
1806 outputting the insn.
1807
1808 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1809
1810 * config/tc-vax.c: Update copyright year.
1811 * config/tc-vax.h: Likewise.
1812
1813 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1814
1815 * config/tc-vax.c (md_chars_to_number): Used only locally, so
1816 make it static.
1817 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
1818
1819 2006-03-17 Paul Brook <paul@codesourcery.com>
1820
1821 * config/tc-arm.c (insns): Add ldm and stm.
1822
1823 2006-03-17 Ben Elliston <bje@au.ibm.com>
1824
1825 PR gas/2446
1826 * doc/as.texinfo (Ident): Document this directive more thoroughly.
1827
1828 2006-03-16 Paul Brook <paul@codesourcery.com>
1829
1830 * config/tc-arm.c (insns): Add "svc".
1831
1832 2006-03-13 Bob Wilson <bob.wilson@acm.org>
1833
1834 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
1835 flag and avoid double underscore prefixes.
1836
1837 2006-03-10 Paul Brook <paul@codesourcery.com>
1838
1839 * config/tc-arm.c (md_begin): Handle EABIv5.
1840 (arm_eabis): Add EF_ARM_EABI_VER5.
1841 * doc/c-arm.texi: Document -meabi=5.
1842
1843 2006-03-10 Ben Elliston <bje@au.ibm.com>
1844
1845 * app.c (do_scrub_chars): Simplify string handling.
1846
1847 2006-03-07 Richard Sandiford <richard@codesourcery.com>
1848 Daniel Jacobowitz <dan@codesourcery.com>
1849 Zack Weinberg <zack@codesourcery.com>
1850 Nathan Sidwell <nathan@codesourcery.com>
1851 Paul Brook <paul@codesourcery.com>
1852 Ricardo Anguiano <anguiano@codesourcery.com>
1853 Phil Edwards <phil@codesourcery.com>
1854
1855 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
1856 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
1857 R_ARM_ABS12 reloc.
1858 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
1859 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
1860 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
1861
1862 2006-03-06 Bob Wilson <bob.wilson@acm.org>
1863
1864 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
1865 even when using the text-section-literals option.
1866
1867 2006-03-06 Nathan Sidwell <nathan@codesourcery.com>
1868
1869 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
1870 and cf.
1871 (m68k_ip): <case 'J'> Check we have some control regs.
1872 (md_parse_option): Allow raw arch switch.
1873 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
1874 whether 68881 or cfloat was meant by -mfloat.
1875 (md_show_usage): Adjust extension display.
1876 (m68k_elf_final_processing): Adjust.
1877
1878 2006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
1879
1880 * config/tc-avr.c (avr_mod_hash_value): New function.
1881 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
1882 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
1883 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
1884 instead of int avr_ldi_expression: use avr_mod_hash_value instead
1885 of (int).
1886 (tc_gen_reloc): Handle substractions of symbols, if possible do
1887 fixups, abort otherwise.
1888 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
1889 tc_fix_adjustable): Define.
1890
1891 2006-03-02 James E Wilson <wilson@specifix.com>
1892
1893 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
1894 change the template, then clear md.slot[curr].end_of_insn_group.
1895
1896 2006-02-28 Jan Beulich <jbeulich@novell.com>
1897
1898 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
1899
1900 2006-02-28 Jan Beulich <jbeulich@novell.com>
1901
1902 PR/1070
1903 * macro.c (getstring): Don't treat parentheses special anymore.
1904 (get_any_string): Don't consider '(' and ')' as quoting anymore.
1905 Special-case '(', ')', '[', and ']' when dealing with non-quoting
1906 characters.
1907
1908 2006-02-28 Mat <mat@csail.mit.edu>
1909
1910 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
1911
1912 2006-02-27 Jakub Jelinek <jakub@redhat.com>
1913
1914 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
1915 field.
1916 (CFI_signal_frame): Define.
1917 (cfi_pseudo_table): Add .cfi_signal_frame.
1918 (dot_cfi): Handle CFI_signal_frame.
1919 (output_cie): Handle cie->signal_frame.
1920 (select_cie_for_fde): Don't share CIE if signal_frame flag is
1921 different. Copy signal_frame from FDE to newly created CIE.
1922 * doc/as.texinfo: Document .cfi_signal_frame.
1923
1924 2006-02-27 Carlos O'Donell <carlos@codesourcery.com>
1925
1926 * doc/Makefile.am: Add html target.
1927 * doc/Makefile.in: Regenerate.
1928 * po/Make-in: Add html target.
1929
1930 2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
1931
1932 * config/tc-i386.c (output_insn): Support Intel Merom New
1933 Instructions.
1934
1935 * config/tc-i386.h (CpuMNI): New.
1936 (CpuUnknownFlags): Add CpuMNI.
1937
1938 2006-02-24 David S. Miller <davem@sunset.davemloft.net>
1939
1940 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
1941 (hpriv_reg_table): New table for hyperprivileged registers.
1942 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
1943 register encoding.
1944
1945 2006-02-24 DJ Delorie <dj@redhat.com>
1946
1947 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
1948 (tc_gen_reloc): Don't define.
1949 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
1950 (OPTION_LINKRELAX): New.
1951 (md_longopts): Add it.
1952 (m32c_relax): New.
1953 (md_parse_options): Set it.
1954 (md_assemble): Emit relaxation relocs as needed.
1955 (md_convert_frag): Emit relaxation relocs as needed.
1956 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
1957 (m32c_apply_fix): New.
1958 (tc_gen_reloc): New.
1959 (m32c_force_relocation): Force out jump relocs when relaxing.
1960 (m32c_fix_adjustable): Return false if relaxing.
1961
1962 2006-02-24 Paul Brook <paul@codesourcery.com>
1963
1964 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
1965 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
1966 (struct asm_barrier_opt): Define.
1967 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
1968 (parse_psr): Accept V7M psr names.
1969 (parse_barrier): New function.
1970 (enum operand_parse_code): Add OP_oBARRIER.
1971 (parse_operands): Implement OP_oBARRIER.
1972 (do_barrier): New function.
1973 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
1974 (do_t_cpsi): Add V7M restrictions.
1975 (do_t_mrs, do_t_msr): Validate V7M variants.
1976 (md_assemble): Check for NULL variants.
1977 (v7m_psrs, barrier_opt_names): New tables.
1978 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
1979 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
1980 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
1981 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
1982 (struct cpu_arch_ver_table): Define.
1983 (cpu_arch_ver): New.
1984 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
1985 Tag_CPU_arch_profile.
1986 * doc/c-arm.texi: Document new cpu and arch options.
1987
1988 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1989
1990 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
1991
1992 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1993
1994 * config/tc-ia64.c: Update copyright years.
1995
1996 2006-02-22 H.J. Lu <hongjiu.lu@intel.com>
1997
1998 * config/tc-ia64.c (specify_resource): Add the rule 17 from
1999 SDM 2.2.
2000
2001 2005-02-22 Paul Brook <paul@codesourcery.com>
2002
2003 * config/tc-arm.c (do_pld): Remove incorrect write to
2004 inst.instruction.
2005 (encode_thumb32_addr_mode): Use correct operand.
2006
2007 2006-02-21 Paul Brook <paul@codesourcery.com>
2008
2009 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
2010
2011 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
2012 Anil Paranjape <anilp1@kpitcummins.com>
2013 Shilin Shakti <shilins@kpitcummins.com>
2014
2015 * Makefile.am: Add xc16x related entry.
2016 * Makefile.in: Regenerate.
2017 * configure.in: Added xc16x related entry.
2018 * configure: Regenerate.
2019 * config/tc-xc16x.h: New file
2020 * config/tc-xc16x.c: New file
2021 * doc/c-xc16x.texi: New file for xc16x
2022 * doc/all.texi: Entry for xc16x
2023 * doc/Makefile.texi: Added c-xc16x.texi
2024 * NEWS: Announce the support for the new target.
2025
2026 2006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
2027
2028 * configure.tgt: set emulation for mips-*-netbsd*
2029
2030 2006-02-14 Jakub Jelinek <jakub@redhat.com>
2031
2032 * config.in: Rebuilt.
2033
2034 2006-02-13 Bob Wilson <bob.wilson@acm.org>
2035
2036 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
2037 from 1, not 0, in error messages.
2038 (md_assemble): Simplify special-case check for ENTRY instructions.
2039 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
2040 operand in error message.
2041
2042 2006-02-13 Joseph S. Myers <joseph@codesourcery.com>
2043
2044 * configure.tgt (arm-*-linux-gnueabi*): Change to
2045 arm-*-linux-*eabi*.
2046
2047 2006-02-10 Nick Clifton <nickc@redhat.com>
2048
2049 * config/tc-crx.c (check_range): Ensure that the sign bit of a
2050 32-bit value is propagated into the upper bits of a 64-bit long.
2051
2052 * config/tc-arc.c (init_opcode_tables): Fix cast.
2053 (arc_extoper, md_operand): Likewise.
2054
2055 2006-02-09 David Heine <dlheine@tensilica.com>
2056
2057 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
2058 each relaxation step.
2059
2060 2006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
2061
2062 * configure.in (CHECK_DECLS): Add vsnprintf.
2063 * configure: Regenerate.
2064 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
2065 include/declare here, but...
2066 * as.h: Move code detecting VARARGS idiom to the top.
2067 (errno.h, stdarg.h, varargs.h, va_list): ...here.
2068 (vsnprintf): Declare if not already declared.
2069
2070 2006-02-08 H.J. Lu <hongjiu.lu@intel.com>
2071
2072 * as.c (close_output_file): New.
2073 (main): Register close_output_file with xatexit before
2074 dump_statistics. Don't call output_file_close.
2075
2076 2006-02-07 Nathan Sidwell <nathan@codesourcery.com>
2077
2078 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
2079 mcf5329_control_regs): New.
2080 (not_current_architecture, selected_arch, selected_cpu): New.
2081 (m68k_archs, m68k_extensions): New.
2082 (archs): Renamed to ...
2083 (m68k_cpus): ... here. Adjust.
2084 (n_arches): Remove.
2085 (md_pseudo_table): Add arch and cpu directives.
2086 (find_cf_chip, m68k_ip): Adjust table scanning.
2087 (no_68851, no_68881): Remove.
2088 (md_assemble): Lazily initialize.
2089 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
2090 (md_init_after_args): Move functionality to m68k_init_arch.
2091 (mri_chip): Adjust table scanning.
2092 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
2093 options with saner parsing.
2094 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
2095 m68k_init_arch): New.
2096 (s_m68k_cpu, s_m68k_arch): New.
2097 (md_show_usage): Adjust.
2098 (m68k_elf_final_processing): Set CF EF flags.
2099 * config/tc-m68k.h (m68k_init_after_args): Remove.
2100 (tc_init_after_args): Remove.
2101 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
2102 (M68k-Directives): Document .arch and .cpu directives.
2103
2104 2006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl>
2105
2106 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
2107 synonyms for equ and defl.
2108 (z80_cons_fix_new): New function.
2109 (emit_byte): Disallow relative jumps to absolute locations.
2110 (emit_data): Only handle defb, prototype changed, because defb is
2111 now handled as pseudo-op rather than an instruction.
2112 (instab): Entries for defb,defw,db,dw moved from here...
2113 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
2114 Add entries for def24,def32,d24,d32.
2115 (md_assemble): Improved error handling.
2116 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
2117 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
2118 (z80_cons_fix_new): Declare.
2119 * doc/c-z80.texi (defb, db): Mention warning on overflow.
2120 (def24,d24,def32,d32): New pseudo-ops.
2121
2122 2006-02-02 Paul Brook <paul@codesourcery.com>
2123
2124 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
2125
2126 2005-02-02 Paul Brook <paul@codesourcery.com>
2127
2128 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
2129 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
2130 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
2131 T2_OPCODE_RSB): Define.
2132 (thumb32_negate_data_op): New function.
2133 (md_apply_fix): Use it.
2134
2135 2006-01-31 Bob Wilson <bob.wilson@acm.org>
2136
2137 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
2138 fields.
2139 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
2140 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
2141 subtracted symbols.
2142 (relaxation_requirements): Add pfinish_frag argument and use it to
2143 replace setting tinsn->record_fix fields.
2144 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
2145 and vinsn_to_insnbuf. Remove references to record_fix and
2146 slot_sub_symbols fields.
2147 (xtensa_mark_narrow_branches): Delete unused code.
2148 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
2149 a symbol.
2150 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
2151 record_fix fields.
2152 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
2153 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
2154 of the record_fix field. Simplify error messages for unexpected
2155 symbolic operands.
2156 (set_expr_symbol_offset_diff): Delete.
2157
2158 2006-01-31 Paul Brook <paul@codesourcery.com>
2159
2160 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
2161
2162 2006-01-31 Paul Brook <paul@codesourcery.com>
2163 Richard Earnshaw <rearnsha@arm.com>
2164
2165 * config/tc-arm.c: Use arm_feature_set.
2166 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
2167 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
2168 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
2169 New variables.
2170 (insns): Use them.
2171 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
2172 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
2173 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
2174 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
2175 feature flags.
2176 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
2177 (arm_opts): Move old cpu/arch options from here...
2178 (arm_legacy_opts): ... to here.
2179 (md_parse_option): Search arm_legacy_opts.
2180 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
2181 (arm_float_abis, arm_eabis): Make const.
2182
2183 2006-01-25 Bob Wilson <bob.wilson@acm.org>
2184
2185 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
2186
2187 2006-01-21 Jie Zhang <jie.zhang@analog.com>
2188
2189 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
2190 in load immediate intruction.
2191
2192 2006-01-21 Jie Zhang <jie.zhang@analog.com>
2193
2194 * config/bfin-parse.y (value_match): Use correct conversion
2195 specifications in template string for __FILE__ and __LINE__.
2196 (binary): Ditto.
2197 (unary): Ditto.
2198
2199 2006-01-18 Alexandre Oliva <aoliva@redhat.com>
2200
2201 Introduce TLS descriptors for i386 and x86_64.
2202 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
2203 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
2204 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
2205 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
2206 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
2207 displacement bits.
2208 (build_modrm_byte): Set up zero modrm for TLS desc calls.
2209 (lex_got): Handle @tlsdesc and @tlscall.
2210 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
2211
2212 2006-01-11 Nick Clifton <nickc@redhat.com>
2213
2214 Fixes for building on 64-bit hosts:
2215 * config/tc-avr.c (mod_index): New union to allow conversion
2216 between pointers and integers.
2217 (md_begin, avr_ldi_expression): Use it.
2218 * config/tc-i370.c (md_assemble): Add cast for argument to print
2219 statement.
2220 * config/tc-tic54x.c (subsym_substitute): Likewise.
2221 * config/tc-mn10200.c (md_assemble): Use a union to convert the
2222 opindex field of fr_cgen structure into a pointer so that it can
2223 be stored in a frag.
2224 * config/tc-mn10300.c (md_assemble): Likewise.
2225 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
2226 types.
2227 * config/tc-v850.c: Replace uses of (int) casts with correct
2228 types.
2229
2230 2006-01-09 H.J. Lu <hongjiu.lu@intel.com>
2231
2232 PR gas/2117
2233 * symbols.c (snapshot_symbol): Don't change a defined symbol.
2234
2235 2006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
2236
2237 PR gas/2101
2238 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
2239 a local-label reference.
2240
2241 For older changes see ChangeLog-2005
2242 \f
2243 Local Variables:
2244 mode: change-log
2245 left-margin: 8
2246 fill-column: 74
2247 version-control: never
2248 End:
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