1 2006-05-05 Julian Brown <julian@codesourcery.com>
3 * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
5 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
6 architecture version checks.
7 (insns): Allow overlapping instructions to be used in VFP mode.
9 2006-05-05 H.J. Lu <hongjiu.lu@intel.com>
12 * config/obj-elf.c (obj_elf_change_section): Allow user
13 specified SHF_ALPHA_GPREL.
15 2006-05-05 Bjoern Haase <bjoern.m.haase@web.de>
17 * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups
18 for PMEM related expressions.
20 2006-05-05 Nick Clifton <nickc@redhat.com>
23 * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the
24 insertion of a directory separator character into a string at a
25 given offset. Uses heuristics to decide when to use a backslash
26 character rather than a forward-slash character.
27 (dwarf2_directive_loc): Use the macro.
28 (out_debug_info): Likewise.
30 2006-05-05 Thiemo Seufer <ths@mips.com>
31 David Ung <davidu@mips.com>
33 * config/tc-mips.c (macro_build): Add case 'k' to handle cache
35 (macro): Add new case M_CACHE_AB.
37 2006-05-04 Kazu Hirata <kazu@codesourcery.com>
39 * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
40 (opcode_lookup): Issue a warning for opcode with
41 OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated
42 identical to OT_cinfix3.
43 (TxC3w, TC3w, tC3w): New.
44 (insns): Use tC3w and TC3w for comparison instructions with
47 2006-05-04 Alan Modra <amodra@bigpond.net.au>
49 * subsegs.h (struct frchain): Delete frch_seg.
50 (frchain_root): Delete.
51 (seg_info): Define as macro.
52 * subsegs.c (frchain_root): Delete.
53 (abs_seg_info, und_seg_info, absolute_frchain): Delete.
54 (subsegs_begin, subseg_change): Adjust for above.
55 (subseg_set_rest): Likewise. Add new frchain structs to seginfo
56 rather than to one big list.
57 (subseg_get): Don't special case abs, und sections.
58 (subseg_new, subseg_force_new): Don't set frchainP here.
60 (subsegs_print_statistics): Adjust frag chain control list traversal.
61 * debug.c (dmp_frags): Likewise.
62 * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
63 at frchain_root. Make use of known frchain ordering.
64 (last_frag_for_seg): Likewise.
65 (get_frag_fix): Likewise. Add seg param.
66 (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
67 * write.c (chain_frchains_together_1): Adjust for struct frchain.
68 (SUB_SEGMENT_ALIGN): Likewise.
69 (subsegs_finish): Adjust frchain list traversal.
70 * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
71 (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
72 (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
73 (xtensa_fix_b_j_loop_end_frags): Likewise.
74 (xtensa_fix_close_loop_end_frags): Likewise.
75 (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
76 (retrieve_segment_info): Delete frch_seg initialisation.
78 2006-05-03 Alan Modra <amodra@bigpond.net.au>
80 * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
81 * config/obj-elf.h (obj_sec_set_private_data): Delete.
82 * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
83 * config/tc-mn10300.c (tc_gen_reloc): Likewise.
85 2006-05-02 Joseph Myers <joseph@codesourcery.com>
87 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
89 (md_apply_fix3): Multiply offset by 4 here for
90 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
92 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
93 Jan Beulich <jbeulich@novell.com>
95 * config/tc-i386.c (output_invalid_buf): Change size for
97 * config/tc-tic30.c (output_invalid_buf): Likewise.
99 * config/tc-i386.c (output_invalid): Cast none-ascii char to
101 * config/tc-tic30.c (output_invalid): Likewise.
103 2006-05-02 Daniel Jacobowitz <dan@codesourcery.com>
105 * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
106 (TEXI2POD): Use AM_MAKEINFOFLAGS.
107 (asconfig.texi): Don't set top_srcdir.
108 * doc/as.texinfo: Don't use top_srcdir.
109 * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
111 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
113 * config/tc-i386.c (output_invalid_buf): Change size to 16.
114 * config/tc-tic30.c (output_invalid_buf): Likewise.
116 * config/tc-i386.c (output_invalid): Use snprintf instead of
118 * config/tc-ia64.c (declare_register_set): Likewise.
119 (emit_one_bundle): Likewise.
120 (check_dependencies): Likewise.
121 * config/tc-tic30.c (output_invalid): Likewise.
123 2006-05-02 Paul Brook <paul@codesourcery.com>
125 * config/tc-arm.c (arm_optimize_expr): New function.
126 * config/tc-arm.h (md_optimize_expr): Define
127 (arm_optimize_expr): Add prototype.
128 (TC_FORCE_RELOCATION_SUB_SAME): Define.
130 2006-05-02 Ben Elliston <bje@au.ibm.com>
132 * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
135 * sb.h (sb_list_vector): Move to sb.c.
136 * sb.c (free_list): Use type of sb_list_vector directly.
137 (sb_build): Fix off-by-one error in assertion about `size'.
139 2006-05-01 Ben Elliston <bje@au.ibm.com>
141 * listing.c (listing_listing): Remove useless loop.
142 * macro.c (macro_expand): Remove is_positional local variable.
143 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
144 and simplify surrounding expressions, where possible.
145 (assign_symbol): Likewise.
146 (s_weakref): Likewise.
147 * symbols.c (colon): Likewise.
149 2006-05-01 James Lemke <jwlemke@wasabisystems.com>
151 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
153 2006-04-30 Thiemo Seufer <ths@mips.com>
154 David Ung <davidu@mips.com>
156 * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
157 (mips_immed): New table that records various handling of udi
158 instruction patterns.
159 (mips_ip): Adds udi handling.
161 2006-04-28 Alan Modra <amodra@bigpond.net.au>
163 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
164 of list rather than beginning.
166 2006-04-26 Julian Brown <julian@codesourcery.com>
168 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
169 (is_quarter_float): Rename from above. Simplify slightly.
170 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
172 (parse_neon_mov): Parse floating-point constants.
173 (neon_qfloat_bits): Fix encoding.
174 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
175 preference to integer encoding when using the F32 type.
177 2006-04-26 Julian Brown <julian@codesourcery.com>
179 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
180 zero-initialising structures containing it will lead to invalid types).
181 (arm_it): Add vectype to each operand.
182 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
184 (neon_typed_alias): New structure. Extra information for typed
186 (reg_entry): Add neon type info field.
187 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
188 Break out alternative syntax for coprocessor registers, etc. into...
189 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
190 out from arm_reg_parse.
191 (parse_neon_type): Move. Return SUCCESS/FAIL.
192 (first_error): New function. Call to ensure first error which occurs is
194 (parse_neon_operand_type): Parse exactly one type.
195 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
196 (parse_typed_reg_or_scalar): New function. Handle core of both
197 arm_typed_reg_parse and parse_scalar.
198 (arm_typed_reg_parse): Parse a register with an optional type.
199 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
201 (parse_scalar): Parse a Neon scalar with optional type.
202 (parse_reg_list): Use first_error.
203 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
204 (neon_alias_types_same): New function. Return true if two (alias) types
206 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
208 (insert_reg_alias): Return new reg_entry not void.
209 (insert_neon_reg_alias): New function. Insert type/index information as
210 well as register for alias.
211 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
212 make typed register aliases accordingly.
213 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
215 (s_unreq): Delete type information if present.
216 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
217 (s_arm_unwind_save_mmxwcg): Likewise.
218 (s_arm_unwind_movsp): Likewise.
219 (s_arm_unwind_setfp): Likewise.
220 (parse_shift): Likewise.
221 (parse_shifter_operand): Likewise.
222 (parse_address): Likewise.
223 (parse_tb): Likewise.
224 (tc_arm_regname_to_dw2regnum): Likewise.
225 (md_pseudo_table): Add dn, qn.
226 (parse_neon_mov): Handle typed operands.
227 (parse_operands): Likewise.
228 (neon_type_mask): Add N_SIZ.
229 (N_ALLMODS): New macro.
230 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
231 (el_type_of_type_chk): Add some safeguards.
232 (modify_types_allowed): Fix logic bug.
233 (neon_check_type): Handle operands with types.
234 (neon_three_same): Remove redundant optional arg handling.
235 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
236 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
237 (do_neon_step): Adjust accordingly.
238 (neon_cmode_for_logic_imm): Use first_error.
239 (do_neon_bitfield): Call neon_check_type.
240 (neon_dyadic): Rename to...
241 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
242 to allow modification of type of the destination.
243 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
244 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
245 (do_neon_compare): Make destination be an untyped bitfield.
246 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
247 (neon_mul_mac): Return early in case of errors.
248 (neon_move_immediate): Use first_error.
249 (neon_mac_reg_scalar_long): Fix type to include scalar.
250 (do_neon_dup): Likewise.
251 (do_neon_mov): Likewise (in several places).
252 (do_neon_tbl_tbx): Fix type.
253 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
254 (do_neon_ld_dup): Exit early in case of errors and/or use
256 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
257 Handle .dn/.qn directives.
258 (REGDEF): Add zero for reg_entry neon field.
260 2006-04-26 Julian Brown <julian@codesourcery.com>
262 * config/tc-arm.c (limits.h): Include.
263 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
264 (fpu_vfp_v3_or_neon_ext): Declare constants.
265 (neon_el_type): New enumeration of types for Neon vector elements.
266 (neon_type_el): New struct. Define type and size of a vector element.
267 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
269 (neon_type): Define struct. The type of an instruction.
270 (arm_it): Add 'vectype' for the current instruction.
271 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
272 (vfp_sp_reg_pos): Rename to...
273 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
275 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
276 (Neon D or Q register).
277 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
279 (GE_OPT_PREFIX_BIG): Define constant, for use in...
280 (my_get_expression): Allow above constant as argument to accept
281 64-bit constants with optional prefix.
282 (arm_reg_parse): Add extra argument to return the specific type of
283 register in when either a D or Q register (REG_TYPE_NDQ) is
284 requested. Can be NULL.
285 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
286 (parse_reg_list): Update for new arm_reg_parse args.
287 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
288 (parse_neon_el_struct_list): New function. Parse element/structure
289 register lists for VLD<n>/VST<n> instructions.
290 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
291 (s_arm_unwind_save_mmxwr): Likewise.
292 (s_arm_unwind_save_mmxwcg): Likewise.
293 (s_arm_unwind_movsp): Likewise.
294 (s_arm_unwind_setfp): Likewise.
295 (parse_big_immediate): New function. Parse an immediate, which may be
296 64 bits wide. Put results in inst.operands[i].
297 (parse_shift): Update for new arm_reg_parse args.
298 (parse_address): Likewise. Add parsing of alignment specifiers.
299 (parse_neon_mov): Parse the operands of a VMOV instruction.
300 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
301 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
302 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
303 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
304 (parse_operands): Handle new codes above.
305 (encode_arm_vfp_sp_reg): Rename to...
306 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
307 selected VFP version only supports D0-D15.
308 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
309 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
310 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
311 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
312 encode_arm_vfp_reg name, and allow 32 D regs.
313 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
314 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
316 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
317 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
318 constant-load and conversion insns introduced with VFPv3.
319 (neon_tab_entry): New struct.
320 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
321 those which are the targets of pseudo-instructions.
322 (neon_opc): Enumerate opcodes, use as indices into...
323 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
324 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
325 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
326 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
328 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
330 (neon_type_mask): New. Compact type representation for type checking.
331 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
332 permitted type combinations.
333 (N_IGNORE_TYPE): New macro.
334 (neon_check_shape): New function. Check an instruction shape for
335 multiple alternatives. Return the specific shape for the current
337 (neon_modify_type_size): New function. Modify a vector type and size,
338 depending on the bit mask in argument 1.
339 (neon_type_promote): New function. Convert a given "key" type (of an
340 operand) into the correct type for a different operand, based on a bit
342 (type_chk_of_el_type): New function. Convert a type and size into the
343 compact representation used for type checking.
344 (el_type_of_type_ckh): New function. Reverse of above (only when a
345 single bit is set in the bit mask).
346 (modify_types_allowed): New function. Alter a mask of allowed types
347 based on a bit mask of modifications.
348 (neon_check_type): New function. Check the type of the current
349 instruction against the variable argument list. The "key" type of the
350 instruction is returned.
351 (neon_dp_fixup): New function. Fill in and modify instruction bits for
352 a Neon data-processing instruction depending on whether we're in ARM
353 mode or Thumb-2 mode.
354 (neon_logbits): New function.
355 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
356 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
357 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
358 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
359 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
360 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
361 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
362 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
363 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
364 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
365 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
366 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
367 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
368 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
369 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
370 (neon_move_immediate, do_neon_mvn, neon_mixed_length)
371 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
372 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
373 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
374 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
375 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
376 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
377 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
378 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
379 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
381 (parse_neon_type): New function. Parse Neon type specifier.
382 (opcode_lookup): Allow parsing of Neon type specifiers.
383 (REGNUM2, REGSETH, REGSET2): New macros.
384 (reg_names): Add new VFPv3 and Neon registers.
385 (NUF, nUF, NCE, nCE): New macros for opcode table.
386 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
387 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
388 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
389 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
390 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
391 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
392 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
393 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
394 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
395 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
396 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
397 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
398 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
399 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
401 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
402 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
403 (arm_option_cpu_value): Add vfp3 and neon.
404 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
407 2006-04-25 Bob Wilson <bob.wilson@acm.org>
409 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
410 syntax instead of hardcoded opcodes with ".w18" suffixes.
411 (wide_branch_opcode): New.
412 (build_transition): Use it to check for wide branch opcodes with
413 either ".w18" or ".w15" suffixes.
415 2006-04-25 Bob Wilson <bob.wilson@acm.org>
417 * config/tc-xtensa.c (xtensa_create_literal_symbol,
418 xg_assemble_literal, xg_assemble_literal_space): Do not set the
419 frag's is_literal flag.
421 2006-04-25 Bob Wilson <bob.wilson@acm.org>
423 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
425 2006-04-23 Kazu Hirata <kazu@codesourcery.com>
427 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
428 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
429 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
430 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
431 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
433 2005-04-20 Paul Brook <paul@codesourcery.com>
435 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
437 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
439 2006-04-19 Alan Modra <amodra@bigpond.net.au>
441 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
442 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
443 Make some cpus unsupported on ELF. Run "make dep-am".
444 * Makefile.in: Regenerate.
446 2006-04-19 Alan Modra <amodra@bigpond.net.au>
448 * configure.in (--enable-targets): Indent help message.
449 * configure: Regenerate.
451 2006-04-18 H.J. Lu <hongjiu.lu@intel.com>
454 * config/tc-i386.c (i386_immediate): Check illegal immediate
457 2006-04-18 Alan Modra <amodra@bigpond.net.au>
459 * config/tc-i386.c: Formatting.
460 (output_disp, output_imm): ISO C90 params.
462 * frags.c (frag_offset_fixed_p): Constify args.
463 * frags.h (frag_offset_fixed_p): Ditto.
465 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
466 (COFF_MAGIC): Delete.
468 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
470 2006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
472 * po/POTFILES.in: Regenerated.
474 2006-04-16 Mark Mitchell <mark@codesourcery.com>
476 * doc/as.texinfo: Mention that some .type syntaxes are not
477 supported on all architectures.
479 2006-04-14 Sterling Augustine <sterling@tensilica.com>
481 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
482 instructions when such transformations have been disabled.
484 2006-04-10 Sterling Augustine <sterling@tensilica.com>
486 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
487 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
488 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
489 decoding the loop instructions. Remove current_offset variable.
490 (xtensa_fix_short_loop_frags): Likewise.
491 (min_bytes_to_other_loop_end): Remove current_offset argument.
493 2006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl>
495 * config/tc-z80.c (z80_optimize_expr): Removed.
496 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
498 2006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
500 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
501 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
502 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
503 atmega644, atmega329, atmega3290, atmega649, atmega6490,
504 atmega406, atmega640, atmega1280, atmega1281, at90can32,
505 at90can64, at90usb646, at90usb647, at90usb1286 and
507 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
509 2006-04-07 Paul Brook <paul@codesourcery.com>
511 * config/tc-arm.c (parse_operands): Set default error message.
513 2006-04-07 Paul Brook <paul@codesourcery.com>
515 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
517 2006-04-07 Paul Brook <paul@codesourcery.com>
519 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
521 2006-04-07 Paul Brook <paul@codesourcery.com>
523 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
524 (move_or_literal_pool): Handle Thumb-2 instructions.
525 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
527 2006-04-07 Alan Modra <amodra@bigpond.net.au>
530 * config/tc-i386.c (match_template): Move 64-bit operand tests
533 2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
535 * po/Make-in: Add install-html target.
536 * Makefile.am: Add install-html and install-html-recursive targets.
537 * Makefile.in: Regenerate.
538 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
539 * configure: Regenerate.
540 * doc/Makefile.am: Add install-html and install-html-am targets.
541 * doc/Makefile.in: Regenerate.
543 2006-04-06 Alan Modra <amodra@bigpond.net.au>
545 * frags.c (frag_offset_fixed_p): Reinitialise offset before
548 2006-04-05 Richard Sandiford <richard@codesourcery.com>
549 Daniel Jacobowitz <dan@codesourcery.com>
551 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
552 (GOTT_BASE, GOTT_INDEX): New.
553 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
554 GOTT_INDEX when generating VxWorks PIC.
555 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
556 use the generic *-*-vxworks* stanza instead.
558 2006-04-04 Alan Modra <amodra@bigpond.net.au>
561 * frags.c (frag_offset_fixed_p): New function.
562 * frags.h (frag_offset_fixed_p): Declare.
563 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
564 (resolve_expression): Likewise.
566 2006-04-03 Sterling Augustine <sterling@tensilica.com>
568 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
569 of the same length but different numbers of slots.
571 2006-03-30 Andreas Schwab <schwab@suse.de>
573 * configure.in: Fix help string for --enable-targets option.
574 * configure: Regenerate.
576 2006-03-28 Nathan Sidwell <nathan@codesourcery.com>
578 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
579 (m68k_ip): ... here. Use for all chips. Protect against buffer
580 overrun and avoid excessive copying.
582 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
583 m68020_control_regs, m68040_control_regs, m68060_control_regs,
584 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
585 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
586 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
587 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
588 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
589 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
590 mcf5282_ctrl, mcfv4e_ctrl): ... these.
591 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
592 (struct m68k_cpu): Change chip field to control_regs.
593 (current_chip): Remove.
595 (m68k_archs, m68k_extensions): Adjust.
596 (m68k_cpus): Reorder to be in cpu number order. Adjust.
597 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
598 (find_cf_chip): Reimplement for new organization of cpu table.
599 (select_control_regs): Remove.
601 (struct save_opts): Save control regs, not chip.
602 (s_save, s_restore): Adjust.
603 (m68k_lookup_cpu): Give deprecated warning when necessary.
604 (m68k_init_arch): Adjust.
605 (md_show_usage): Adjust for new cpu table organization.
607 2006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
609 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
610 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
611 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
613 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
614 (any_gotrel): New rule.
615 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
616 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
618 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
619 (bfin_pic_ptr): New function.
620 (md_pseudo_table): Add it for ".picptr".
621 (OPTION_FDPIC): New macro.
622 (md_longopts): Add -mfdpic.
623 (md_parse_option): Handle it.
624 (md_begin): Set BFD flags.
625 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
626 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
628 * Makefile.am (bfin-parse.o): Update dependencies.
629 (DEPTC_bfin_elf): Likewise.
630 * Makefile.in: Regenerate.
632 2006-03-25 Richard Sandiford <richard@codesourcery.com>
634 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
635 mcfemac instead of mcfmac.
637 2006-03-23 Michael Matz <matz@suse.de>
639 * config/tc-i386.c (type_names): Correct placement of 'static'.
640 (reloc): Map some more relocs to their 64 bit counterpart when
642 (output_insn): Work around breakage if DEBUG386 is defined.
643 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
644 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
645 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
648 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
650 (md_convert_frag): Jumps can now be larger than 2GB away, error
652 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
653 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
655 2006-03-22 Richard Sandiford <richard@codesourcery.com>
656 Daniel Jacobowitz <dan@codesourcery.com>
657 Phil Edwards <phil@codesourcery.com>
658 Zack Weinberg <zack@codesourcery.com>
659 Mark Mitchell <mark@codesourcery.com>
660 Nathan Sidwell <nathan@codesourcery.com>
662 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
663 (md_begin): Complain about -G being used for PIC. Don't change
664 the text, data and bss alignments on VxWorks.
665 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
666 generating VxWorks PIC.
667 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
668 (macro): Likewise, but do not treat la $25 specially for
669 VxWorks PIC, and do not handle jal.
670 (OPTION_MVXWORKS_PIC): New macro.
671 (md_longopts): Add -mvxworks-pic.
672 (md_parse_option): Don't complain about using PIC and -G together here.
673 Handle OPTION_MVXWORKS_PIC.
674 (md_estimate_size_before_relax): Always use the first relaxation
676 * config/tc-mips.h (VXWORKS_PIC): New.
678 2006-03-21 Paul Brook <paul@codesourcery.com>
680 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
682 2006-03-21 Sterling Augustine <sterling@tensilica.com>
684 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
685 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
686 (get_loop_align_size): New.
687 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
688 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
689 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
690 (get_noop_aligned_address): Use get_loop_align_size.
691 (get_aligned_diff): Likewise.
693 2006-03-21 Paul Brook <paul@codesourcery.com>
695 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
697 2006-03-20 Paul Brook <paul@codesourcery.com>
699 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
700 (do_t_branch): Encode branches inside IT blocks as unconditional.
701 (do_t_cps): New function.
702 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
703 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
704 (opcode_lookup): Allow conditional suffixes on all instructions in
706 (md_assemble): Advance condexec state before checking for errors.
707 (insns): Use do_t_cps.
709 2006-03-20 Paul Brook <paul@codesourcery.com>
711 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
714 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
716 * config/tc-vax.c: Update copyright year.
717 * config/tc-vax.h: Likewise.
719 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
721 * config/tc-vax.c (md_chars_to_number): Used only locally, so
723 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
725 2006-03-17 Paul Brook <paul@codesourcery.com>
727 * config/tc-arm.c (insns): Add ldm and stm.
729 2006-03-17 Ben Elliston <bje@au.ibm.com>
732 * doc/as.texinfo (Ident): Document this directive more thoroughly.
734 2006-03-16 Paul Brook <paul@codesourcery.com>
736 * config/tc-arm.c (insns): Add "svc".
738 2006-03-13 Bob Wilson <bob.wilson@acm.org>
740 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
741 flag and avoid double underscore prefixes.
743 2006-03-10 Paul Brook <paul@codesourcery.com>
745 * config/tc-arm.c (md_begin): Handle EABIv5.
746 (arm_eabis): Add EF_ARM_EABI_VER5.
747 * doc/c-arm.texi: Document -meabi=5.
749 2006-03-10 Ben Elliston <bje@au.ibm.com>
751 * app.c (do_scrub_chars): Simplify string handling.
753 2006-03-07 Richard Sandiford <richard@codesourcery.com>
754 Daniel Jacobowitz <dan@codesourcery.com>
755 Zack Weinberg <zack@codesourcery.com>
756 Nathan Sidwell <nathan@codesourcery.com>
757 Paul Brook <paul@codesourcery.com>
758 Ricardo Anguiano <anguiano@codesourcery.com>
759 Phil Edwards <phil@codesourcery.com>
761 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
762 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
764 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
765 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
766 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
768 2006-03-06 Bob Wilson <bob.wilson@acm.org>
770 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
771 even when using the text-section-literals option.
773 2006-03-06 Nathan Sidwell <nathan@codesourcery.com>
775 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
777 (m68k_ip): <case 'J'> Check we have some control regs.
778 (md_parse_option): Allow raw arch switch.
779 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
780 whether 68881 or cfloat was meant by -mfloat.
781 (md_show_usage): Adjust extension display.
782 (m68k_elf_final_processing): Adjust.
784 2006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
786 * config/tc-avr.c (avr_mod_hash_value): New function.
787 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
788 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
789 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
790 instead of int avr_ldi_expression: use avr_mod_hash_value instead
792 (tc_gen_reloc): Handle substractions of symbols, if possible do
793 fixups, abort otherwise.
794 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
795 tc_fix_adjustable): Define.
797 2006-03-02 James E Wilson <wilson@specifix.com>
799 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
800 change the template, then clear md.slot[curr].end_of_insn_group.
802 2006-02-28 Jan Beulich <jbeulich@novell.com>
804 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
806 2006-02-28 Jan Beulich <jbeulich@novell.com>
809 * macro.c (getstring): Don't treat parentheses special anymore.
810 (get_any_string): Don't consider '(' and ')' as quoting anymore.
811 Special-case '(', ')', '[', and ']' when dealing with non-quoting
814 2006-02-28 Mat <mat@csail.mit.edu>
816 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
818 2006-02-27 Jakub Jelinek <jakub@redhat.com>
820 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
822 (CFI_signal_frame): Define.
823 (cfi_pseudo_table): Add .cfi_signal_frame.
824 (dot_cfi): Handle CFI_signal_frame.
825 (output_cie): Handle cie->signal_frame.
826 (select_cie_for_fde): Don't share CIE if signal_frame flag is
827 different. Copy signal_frame from FDE to newly created CIE.
828 * doc/as.texinfo: Document .cfi_signal_frame.
830 2006-02-27 Carlos O'Donell <carlos@codesourcery.com>
832 * doc/Makefile.am: Add html target.
833 * doc/Makefile.in: Regenerate.
834 * po/Make-in: Add html target.
836 2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
838 * config/tc-i386.c (output_insn): Support Intel Merom New
841 * config/tc-i386.h (CpuMNI): New.
842 (CpuUnknownFlags): Add CpuMNI.
844 2006-02-24 David S. Miller <davem@sunset.davemloft.net>
846 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
847 (hpriv_reg_table): New table for hyperprivileged registers.
848 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
851 2006-02-24 DJ Delorie <dj@redhat.com>
853 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
854 (tc_gen_reloc): Don't define.
855 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
856 (OPTION_LINKRELAX): New.
857 (md_longopts): Add it.
859 (md_parse_options): Set it.
860 (md_assemble): Emit relaxation relocs as needed.
861 (md_convert_frag): Emit relaxation relocs as needed.
862 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
863 (m32c_apply_fix): New.
865 (m32c_force_relocation): Force out jump relocs when relaxing.
866 (m32c_fix_adjustable): Return false if relaxing.
868 2006-02-24 Paul Brook <paul@codesourcery.com>
870 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
871 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
872 (struct asm_barrier_opt): Define.
873 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
874 (parse_psr): Accept V7M psr names.
875 (parse_barrier): New function.
876 (enum operand_parse_code): Add OP_oBARRIER.
877 (parse_operands): Implement OP_oBARRIER.
878 (do_barrier): New function.
879 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
880 (do_t_cpsi): Add V7M restrictions.
881 (do_t_mrs, do_t_msr): Validate V7M variants.
882 (md_assemble): Check for NULL variants.
883 (v7m_psrs, barrier_opt_names): New tables.
884 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
885 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
886 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
887 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
888 (struct cpu_arch_ver_table): Define.
890 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
891 Tag_CPU_arch_profile.
892 * doc/c-arm.texi: Document new cpu and arch options.
894 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
896 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
898 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
900 * config/tc-ia64.c: Update copyright years.
902 2006-02-22 H.J. Lu <hongjiu.lu@intel.com>
904 * config/tc-ia64.c (specify_resource): Add the rule 17 from
907 2005-02-22 Paul Brook <paul@codesourcery.com>
909 * config/tc-arm.c (do_pld): Remove incorrect write to
911 (encode_thumb32_addr_mode): Use correct operand.
913 2006-02-21 Paul Brook <paul@codesourcery.com>
915 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
917 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
918 Anil Paranjape <anilp1@kpitcummins.com>
919 Shilin Shakti <shilins@kpitcummins.com>
921 * Makefile.am: Add xc16x related entry.
922 * Makefile.in: Regenerate.
923 * configure.in: Added xc16x related entry.
924 * configure: Regenerate.
925 * config/tc-xc16x.h: New file
926 * config/tc-xc16x.c: New file
927 * doc/c-xc16x.texi: New file for xc16x
928 * doc/all.texi: Entry for xc16x
929 * doc/Makefile.texi: Added c-xc16x.texi
930 * NEWS: Announce the support for the new target.
932 2006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
934 * configure.tgt: set emulation for mips-*-netbsd*
936 2006-02-14 Jakub Jelinek <jakub@redhat.com>
938 * config.in: Rebuilt.
940 2006-02-13 Bob Wilson <bob.wilson@acm.org>
942 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
943 from 1, not 0, in error messages.
944 (md_assemble): Simplify special-case check for ENTRY instructions.
945 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
946 operand in error message.
948 2006-02-13 Joseph S. Myers <joseph@codesourcery.com>
950 * configure.tgt (arm-*-linux-gnueabi*): Change to
953 2006-02-10 Nick Clifton <nickc@redhat.com>
955 * config/tc-crx.c (check_range): Ensure that the sign bit of a
956 32-bit value is propagated into the upper bits of a 64-bit long.
958 * config/tc-arc.c (init_opcode_tables): Fix cast.
959 (arc_extoper, md_operand): Likewise.
961 2006-02-09 David Heine <dlheine@tensilica.com>
963 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
964 each relaxation step.
966 2006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
968 * configure.in (CHECK_DECLS): Add vsnprintf.
969 * configure: Regenerate.
970 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
971 include/declare here, but...
972 * as.h: Move code detecting VARARGS idiom to the top.
973 (errno.h, stdarg.h, varargs.h, va_list): ...here.
974 (vsnprintf): Declare if not already declared.
976 2006-02-08 H.J. Lu <hongjiu.lu@intel.com>
978 * as.c (close_output_file): New.
979 (main): Register close_output_file with xatexit before
980 dump_statistics. Don't call output_file_close.
982 2006-02-07 Nathan Sidwell <nathan@codesourcery.com>
984 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
985 mcf5329_control_regs): New.
986 (not_current_architecture, selected_arch, selected_cpu): New.
987 (m68k_archs, m68k_extensions): New.
988 (archs): Renamed to ...
989 (m68k_cpus): ... here. Adjust.
991 (md_pseudo_table): Add arch and cpu directives.
992 (find_cf_chip, m68k_ip): Adjust table scanning.
993 (no_68851, no_68881): Remove.
994 (md_assemble): Lazily initialize.
995 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
996 (md_init_after_args): Move functionality to m68k_init_arch.
997 (mri_chip): Adjust table scanning.
998 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
999 options with saner parsing.
1000 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
1001 m68k_init_arch): New.
1002 (s_m68k_cpu, s_m68k_arch): New.
1003 (md_show_usage): Adjust.
1004 (m68k_elf_final_processing): Set CF EF flags.
1005 * config/tc-m68k.h (m68k_init_after_args): Remove.
1006 (tc_init_after_args): Remove.
1007 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
1008 (M68k-Directives): Document .arch and .cpu directives.
1010 2006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl>
1012 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
1013 synonyms for equ and defl.
1014 (z80_cons_fix_new): New function.
1015 (emit_byte): Disallow relative jumps to absolute locations.
1016 (emit_data): Only handle defb, prototype changed, because defb is
1017 now handled as pseudo-op rather than an instruction.
1018 (instab): Entries for defb,defw,db,dw moved from here...
1019 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
1020 Add entries for def24,def32,d24,d32.
1021 (md_assemble): Improved error handling.
1022 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
1023 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
1024 (z80_cons_fix_new): Declare.
1025 * doc/c-z80.texi (defb, db): Mention warning on overflow.
1026 (def24,d24,def32,d32): New pseudo-ops.
1028 2006-02-02 Paul Brook <paul@codesourcery.com>
1030 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
1032 2005-02-02 Paul Brook <paul@codesourcery.com>
1034 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
1035 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
1036 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
1037 T2_OPCODE_RSB): Define.
1038 (thumb32_negate_data_op): New function.
1039 (md_apply_fix): Use it.
1041 2006-01-31 Bob Wilson <bob.wilson@acm.org>
1043 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
1045 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
1046 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
1048 (relaxation_requirements): Add pfinish_frag argument and use it to
1049 replace setting tinsn->record_fix fields.
1050 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
1051 and vinsn_to_insnbuf. Remove references to record_fix and
1052 slot_sub_symbols fields.
1053 (xtensa_mark_narrow_branches): Delete unused code.
1054 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
1056 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
1058 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
1059 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
1060 of the record_fix field. Simplify error messages for unexpected
1062 (set_expr_symbol_offset_diff): Delete.
1064 2006-01-31 Paul Brook <paul@codesourcery.com>
1066 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
1068 2006-01-31 Paul Brook <paul@codesourcery.com>
1069 Richard Earnshaw <rearnsha@arm.com>
1071 * config/tc-arm.c: Use arm_feature_set.
1072 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
1073 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
1074 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
1077 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
1078 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
1079 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
1080 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
1082 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
1083 (arm_opts): Move old cpu/arch options from here...
1084 (arm_legacy_opts): ... to here.
1085 (md_parse_option): Search arm_legacy_opts.
1086 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
1087 (arm_float_abis, arm_eabis): Make const.
1089 2006-01-25 Bob Wilson <bob.wilson@acm.org>
1091 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
1093 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1095 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
1096 in load immediate intruction.
1098 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1100 * config/bfin-parse.y (value_match): Use correct conversion
1101 specifications in template string for __FILE__ and __LINE__.
1105 2006-01-18 Alexandre Oliva <aoliva@redhat.com>
1107 Introduce TLS descriptors for i386 and x86_64.
1108 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
1109 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
1110 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
1111 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
1112 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
1114 (build_modrm_byte): Set up zero modrm for TLS desc calls.
1115 (lex_got): Handle @tlsdesc and @tlscall.
1116 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
1118 2006-01-11 Nick Clifton <nickc@redhat.com>
1120 Fixes for building on 64-bit hosts:
1121 * config/tc-avr.c (mod_index): New union to allow conversion
1122 between pointers and integers.
1123 (md_begin, avr_ldi_expression): Use it.
1124 * config/tc-i370.c (md_assemble): Add cast for argument to print
1126 * config/tc-tic54x.c (subsym_substitute): Likewise.
1127 * config/tc-mn10200.c (md_assemble): Use a union to convert the
1128 opindex field of fr_cgen structure into a pointer so that it can
1129 be stored in a frag.
1130 * config/tc-mn10300.c (md_assemble): Likewise.
1131 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
1133 * config/tc-v850.c: Replace uses of (int) casts with correct
1136 2006-01-09 H.J. Lu <hongjiu.lu@intel.com>
1139 * symbols.c (snapshot_symbol): Don't change a defined symbol.
1141 2006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
1144 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
1145 a local-label reference.
1147 For older changes see ChangeLog-2005
1153 version-control: never