1 2006-08-22 Pedro Alves <pedro_alves@portugalmail.pt>
3 * Makefile.am (TARG_ENV_HFILES): Add te-wince-pe.h.
4 * Makefile.in: Regenerate.
5 * config/tc-arm.h [TARGET_FORMAT]: ARM wince bfd names were
8 2006-08-16 Julian Brown <julian@codesourcery.com>
10 * config/tc-arm.c (md_assemble): Improve diagnostic when attempting
11 to use ARM instructions on non-ARM-supporting cores.
12 (autoselect_thumb_from_cpu_variant): New function. Switch on Thumb
13 mode automatically based on cpu variant.
14 (md_begin): Call above function.
16 2006-08-16 Julian Brown <julian@codesourcery.com>
18 * config/tc-arm.c (opcode_lookup): Allow Neon type suffixes to be
19 recognized in non-unified syntax mode.
21 2006-08-15 Thiemo Seufer <ths@mips.com>
22 Nigel Stephens <nigel@mips.com>
23 David Ung <davidu@mips.com>
25 * configure.tgt: Handle mips*-sde-elf*.
27 2006-08-12 Thiemo Seufer <ths@networkno.de>
29 * config/tc-mips.c (mips16_ip): Fix argument register handling
30 for restore instruction.
32 2006-08-08 Bob Wilson <bob.wilson@acm.org>
34 * dwarf2dbg.c (DWARF2_USE_FIXED_ADVANCE_PC): New.
36 (out_fixed_inc_line_addr): New.
37 (process_entries): Use out_fixed_inc_line_addr when
38 DWARF2_USE_FIXED_ADVANCE_PC is set.
39 * config/tc-xtensa.h (DWARF2_USE_FIXED_ADVANCE_PC): Define.
41 2006-08-08 DJ Delorie <dj@redhat.com>
43 * config/tc-sh.c (sh_frob_section): Canonicalize pointers to local
44 vs full symbols so that we never have more than one pointer value
45 for any given symbol in our symbol table.
47 2006-08-08 Sterling Augustine <sterling@tensilica.com>
49 * dwarf2dbg.c (out_debug_info): Add new parameter ranges_seg
50 and emit DW_AT_ranges when code in compilation unit is not
52 (out_debug_abbrev): Emit DW_AT_ranges abbreviation if code in
54 (dwarf2_finish): Create and pass ranges_seg to out_debug_info.
55 (out_debug_ranges): New function to emit .debug_ranges section
56 when code is not contiguous.
58 2006-08-08 Nick Clifton <nickc@redhat.com>
60 * config/tc-arm.c (WARN_DEPRECATED): Enable.
62 2006-08-05 Pedro Alves <pedro_alves@portugalmail.pt>
64 * config/tc-arm.c: Move "dwarf2dbg.h" inclusion out of OBJ_ELF
66 (pe_directive_secrel) [TE_PE]: New function.
67 (md_pseudo_table) [!OBJ_ELF]: Handle 2byte, 4byte, 8byte, file,
69 [TE_PE]: Handle secrel32.
70 (output_relax_insn): Remove OBJ_ELF around dwarf2_emit_insn
72 (output_inst): Remove OBJ_ELF around dwarf2_emit_insn call.
73 (arm_frob_label): Remove OBJ_ELF around dwarf2_emit_label call.
74 (md_section_align): Only round section sizes here for AOUT
76 (tc_arm_regname_to_dw2regnum): Move out for OBJ_ELF only block.
77 (tc_pe_dwarf2_emit_offset): New function.
78 (md_apply_fix) [TE_PE]: Handle BFD_RELOC_32_SECREL.
79 (cons_fix_new_arm): Handle O_secrel.
80 * config/tc-arm.h : Move DWARF2_LINE_MIN_INSN_LENGTH,
81 DWARF2_DEFAULT_RETURN_COLUMN and DWARF2_CIE_DATA_ALIGNMENT out
82 of OBJ_ELF only block.
83 [TE_PE]: Define O_secrel, TC_DWARF2_EMIT_OFFSET, and declare
84 tc_pe_dwarf2_emit_offset.
86 2006-08-04 Richard Sandiford <richard@codesourcery.com>
88 * config/tc-sh.c (apply_full_field_fix): New function.
89 (md_apply_fix): Use it instead of md_number_to_chars. Do not fill
90 in fx_addnumber for BFD_RELOC_32_PLT_PCREL.
91 (tc_gen_reloc): Use fx_addnumber rather than 0 as the default case.
92 * config/tc-sh.h (TARGET_FORMAT): Override for TE_VXWORKS.
94 2006-08-03 Nick Clifton <nickc@redhat.com>
97 * config.in: Regenerate.
99 2006-08-03 Joseph Myers <joseph@codesourcery.com>
101 * config/tc-arm.c (parse_operands): Handle invalid register name
104 2006-08-03 Joseph Myers <joseph@codesourcery.com>
106 * config/tc-arm.c (enum operand_parse_code): Add OP_RIWC_RIWG.
107 (parse_operands): Handle it.
108 (insns): Use it for tmcr and tmrc.
110 2006-08-02 Petr Salinger <Petr.Salinger@seznam.cz>
113 * config/tc-i386.c (md_parse_option): Treat any target starting
114 with elf64_x86_64 as a viable target for the -64 switch.
115 (i386_target_format): For 64-bit ELF flavoured output use
117 * config/tc-i386.h (ELF_TARGET_FORMAT64): Define.
119 2006-08-02 Nick Clifton <nickc@redhat.com>
122 * acinclude.m4 (BFD_BINARY_FOPEN): Import this function from
124 * configure.in: Run BFD_BINARY_FOPEN.
125 * configure: Regenerate.
126 * as.h: Look at USE_BINARY_FOPEN to decide which fopen-*.h header
129 2006-08-01 H.J. Lu <hongjiu.lu@intel.com>
131 * config/tc-i386.c (md_assemble): Don't update
134 2006-08-01 Thiemo Seufer <ths@mips.com>
136 * config/tc-mips.c (md_section_align): Check ELF-ness at runtime.
138 2006-08-01 Thiemo Seufer <ths@mips.com>
140 * config/tc-mips.c (macro_build_lui): Fix comment formatting.
141 (md_apply_fix): Likewise. Unify handling of BFD_RELOC_RVA,
142 BFD_RELOC_32 and BFD_RELOC_16.
143 (s_align, s_cpload, s_cplocal, s_cprestore, s_mips_stab,
144 md_convert_frag, md_obj_end): Fix comment formatting.
146 2006-07-31 Thiemo Seufer <ths@mips.com>
148 * config/tc-mips.c (md_apply_fix, tc_gen_reloc): Remove special
149 handling for BFD_RELOC_MIPS16_JMP.
151 2006-07-24 Andreas Schwab <schwab@suse.de>
154 * read.c (read_a_source_file): Ignore unknown text after line
155 comment character. Fix misleading comment.
157 2006-07-24 Ralk Wildenhues <Ralf.Wildenhues@gmx.de>
159 * doc/all.texi, doc/as.texinfo, doc/c-arc.texi, doc/c-arm.texi,
160 doc/c-avr.texi, doc/c-bfin.texi, doc/c-i386.texi,
161 doc/c-i960.texi, doc/c-m32r.texi, doc/c-m68k.texi,
162 doc/c-mmix.texi, doc/c-pdp11.texi, doc/c-ppc.texi,
163 doc/c-tic54x.texi, doc/c-v850.texi, doc/c-xtensa.texi,
164 doc/c-z80.texi, doc/internals.texi: Fix some typos.
166 2006-07-21 Nick Clifton <nickc@redhat.com>
168 * config/tc-sh.c (md_longopts): Add -EL and -EB for use by the
171 2006-07-20 Thiemo Seufer <ths@mips.com>
172 Nigel Stephens <nigel@mips.com>
174 * config/tc-mips.c (md_parse_option): Don't infer optimisation
175 options from debug options.
177 2006-07-20 Thiemo Seufer <ths@mips.com>
179 * config/tc-mips.c (mips_fix_adjustable): Handle BFD_RELOC_MIPS16_JMP.
180 (tc_gen_reloc): Handle mips16 jumps to section symbol offsets.
182 2006-07-19 Paul Brook <paul@codesourcery.com>
184 * config/tc-arm.c (insns): Fix rbit Arm opcode.
186 2006-07-18 Paul Brook <paul@codesourcery.com>
188 * tc-arm.c (do_t_add_sub): Use addw/subw when source is PC.
189 (md_convert_frag): Use correct reloc for add_pc. Use
190 BFD_RELOC_ARM_T32_ADD_IMM for normal add/sum.
191 (md_apply_fix): Handle BFD_RELOC_ARM_T32_ADD_IMM.
192 (arm_force_relocation): Handle BFD_RELOC_ARM_T32_ADD_IMM.
194 2006-07-17 Mat Hostetter <mat@lcs.mit.edu>
196 * symbols.c (report_op_error): Fix pasto. Don't use as_bad_where
197 when file and line unknown.
199 2006-07-17 Thiemo Seufer <ths@mips.com>
201 * read.c (s_struct): Use IS_ELF.
202 * config/tc-mips.c (md_begin, mips16_mark_labels, mips_ip,
203 md_parse_option, s_change_sec, pic_need_relax, mips_fix_adjustable,
204 tc_gen_reloc, mips_frob_file_after_relocs, s_mips_end, s_mips_frame,
205 s_mips_mask): Likewise.
207 2006-07-16 Thiemo Seufer <ths@mips.com>
208 David Ung <davidu@mips.com>
210 * read.c (s_struct): Handle ELF section changing.
211 * config/tc-mips.c (s_align): Leave enabling auto-align to the
213 (s_change_sec): Try section changing only if we output ELF.
215 2006-07-15 H.J. Lu <hongjiu.lu@intel.com>
217 * config/tc-i386.c (cpu_arch): Remove Cpu086, CpuAthlon and
219 (smallest_imm_type): Remove Cpu086.
220 (i386_target_format): Likewise.
222 * config/tc-i386.h: Remove Cpu086, CpuAthlon and CpuAmdFam10.
225 2006-07-13 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
226 Michael Meissner <michael.meissner@amd.com>
228 * config/tc-i386.h (PROCESSOR_AMDFAM10): New processor_type.
229 (CpuSSE4a, CpuABM, CpuAmdFam10): New Cpu directives.
230 * config/tc-i386.c (cpu_arch): Add support for AmdFam10
232 (i386_align_code): Ditto.
233 (md_assemble_code): Add support for insertq/extrq instructions,
234 swapping as needed for intel syntax.
235 (swap_imm_operands): New function to swap immediate operands.
236 (swap_operands): Deal with 4 operand instructions.
237 (build_modrm_byte): Add support for insertq instruction.
239 2006-07-13 H.J. Lu <hongjiu.lu@intel.com>
241 * config/tc-i386.h (Size64): Fix a typo in comment.
243 2006-07-12 Nick Clifton <nickc@redhat.com>
245 * config/tc-sh.c (md_apply_fix): Do not allow the generic code in
246 fixup_segment() to repeat a range check on a value that has
247 already been checked here.
249 2006-07-07 James E Wilson <wilson@specifix.com>
251 * config/tc-mips.c (mips_cpu_info_table): Add sb1a.
253 2006-07-06 Mohammed Adnène Trojette <adn@diwi.org>
254 Nick Clifton <nickc@redhat.com>
257 * doc/as.texi: Fix spelling typo: branchs => branches.
258 * doc/c-m68hc11.texi: Likewise.
259 * config/tc-m68hc11.c: Likewise.
260 Support old spelling of command line switch for backwards
263 2006-07-04 Thiemo Seufer <ths@mips.com>
264 David Ung <davidu@mips.com>
266 * config/tc-mips.c (s_is_linkonce): New function.
267 (mips16_mark_labels): Don't adjust mips16 symbol addresses for
268 weak, external, and linkonce symbols.
269 (pic_need_relax): Use s_is_linkonce.
271 2006-06-24 H.J. Lu <hongjiu.lu@intel.com>
273 * doc/as.texinfo (Org): Remove space.
274 (P2align): Add "@var{abs-expr},".
276 2006-06-23 H.J. Lu <hongjiu.lu@intel.com>
278 * config/tc-i386.c (cpu_arch_tune_set): New.
279 (cpu_arch_isa): Likewise.
280 (i386_align_code): Use xchg %ax,%ax for 2 byte nop. Optimize
281 nops with short or long nop sequences based on -march=/.arch
283 (set_cpu_arch): Set cpu_arch_isa. If cpu_arch_tune_set is 0,
284 set cpu_arch_tune and cpu_arch_tune_flags.
285 (md_parse_option): For -march=, set cpu_arch_isa and set
286 cpu_arch_tune and cpu_arch_tune_flags if cpu_arch_tune_set is
287 0. Set cpu_arch_tune_set to 1 for -mtune=.
288 (i386_target_format): Don't set cpu_arch_tune.
290 2006-06-23 Nigel Stephens <nigel@mips.com>
292 * config/tc-mips.c (nopic_need_relax): Handle -fdata-sections
293 generated .sbss.* and .gnu.linkonce.sb.*.
295 2006-06-23 Thiemo Seufer <ths@mips.com>
296 David Ung <davidu@mips.com>
298 * config/tc-mips.h (TC_SEGMENT_INFO_TYPE): Declare per-segment
300 * config/tc-mips.c (label_list): Define per-segment label_list.
301 (mips_clear_insn_labels, mips_move_labels, mips16_mark_labels,
302 append_insn, s_align, s_cons, s_float_cons, s_gpword, s_gpdword,
303 mips_from_file_after_relocs, mips_define_label): Use per-segment
306 2006-06-22 Thiemo Seufer <ths@mips.com>
308 * config/tc-mips.c (ISA_SUPPORTS_MIPS16E): New macro.
309 (append_insn): Use it.
310 (md_apply_fix): Whitespace formatting.
311 (md_begin, append_insn, macro, macro2, mips16_immed, mips_align,
312 mips16_extended_frag): Remove register specifier.
313 (md_convert_frag): Likewise. Use TRUE ans FALSE instead of numeric
316 2006-06-21 Mark Shinwell <shinwell@codesourcery.com>
318 * config/tc-arm.c (s_arm_unwind_save_vfp_armv6): New. Parse
319 a directive saving VFP registers for ARMv6 or later.
320 (s_arm_unwind_save): Add parameter arch_v6 and call
321 s_arm_unwind_save_vfp or s_arm_unwind_save_vfp_armv6 as
323 (md_pseudo_table): Add entry for new "vsave" directive.
324 * doc/c-arm.texi: Correct error in example for "save"
325 directive (fstmdf -> fstmdx). Also document "vsave" directive.
327 2006-06-18 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
328 Anatoly Sokolov <aesok@post.ru>
330 * config/tc-avr.c (mcu_types): Add support for atmega165p, atmega169p
331 and atmega644p devices. Rename atmega164/atmega324 devices to
332 atmega164p/atmega324p.
333 * doc/c-avr.texi: Document new mcu and arch options.
335 2006-06-17 Nick Clifton <nickc@redhat.com>
337 * config/tc-arm.c (enum parse_operand_result): Move outside of
338 #ifdef OBJ_ELF so that non-ELF targeted ARM ports can build.
340 2006-06-16 H.J. Lu <hongjiu.lu@intel.com>
342 * config/tc-i386.h (processor_type): New.
343 (arch_entry): Add type.
345 * config/tc-i386.c (cpu_arch_tune): New.
346 (cpu_arch_tune_flags): Likewise.
347 (cpu_arch_isa_flags): Likewise.
349 (set_cpu_arch): Also update cpu_arch_isa_flags.
350 (md_assemble): Update cpu_arch_isa_flags.
352 (OPTION_MTUNE): Likewise.
353 (md_longopts): Add -march= and -mtune=.
354 (md_parse_option): Support -march= and -mtune=.
355 (md_show_usage): Add -march=CPU/-mtune=CPU.
356 (i386_target_format): Also update cpu_arch_isa_flags,
357 cpu_arch_tune and cpu_arch_tune_flags.
359 * doc/as.texinfo: Add -march=CPU/-mtune=CPU.
361 * doc/c-i386.texi: Document -march=CPU/-mtune=CPU.
363 2006-06-15 Mark Shinwell <shinwell@codesourcery.com>
365 * config/tc-arm.c (enum parse_operand_result): New.
366 (struct group_reloc_table_entry): New.
367 (enum group_reloc_type): New.
368 (group_reloc_table): New array.
369 (find_group_reloc_table_entry): New function.
370 (parse_shifter_operand_group_reloc): New function.
371 (parse_address_main): New function, incorporating code
372 from the old parse_address function. To be used via...
373 (parse_address): wrapper for parse_address_main; and
374 (parse_address_group_reloc): new function, likewise.
375 (enum operand_parse_code): New codes OP_SHG, OP_ADDRGLDR,
376 OP_ADDRGLDRS, OP_ADDRGLDC.
377 (parse_operands): Support for these new operand codes.
378 New macro po_misc_or_fail_no_backtrack.
379 (encode_arm_cp_address): Preserve group relocations.
380 (insns): Modify to use the above operand codes where group
381 relocations are permitted.
382 (md_apply_fix): Handle the group relocations
383 ALU_PC_G0_NC through LDC_SB_G2.
384 (tc_gen_reloc): Likewise.
385 (arm_force_relocation): Leave group relocations for the linker.
386 (arm_fix_adjustable): Likewise.
388 2006-06-15 Julian Brown <julian@codesourcery.com>
390 * config/tc-arm.c (do_vfp_nsyn_ldr_str): Remove, fold into...
391 (do_neon_ldr_str): Always defer to VFP encoding routines, which handle
394 2006-06-12 H.J. Lu <hongjiu.lu@intel.com>
396 * config/tc-i386.c (process_suffix): Don't add rex64 for
399 2006-06-09 Thiemo Seufer <ths@mips.com>
401 * config/tc-mips.c (mips_ip): Maintain argument count.
403 2006-06-09 Alan Modra <amodra@bigpond.net.au>
405 * config/tc-iq2000.c: Include sb.h.
407 2006-06-08 Nigel Stephens <nigel@mips.com>
409 * config/tc-mips.c (mips_pseudo_table): Add "origin" and "repeat"
410 aliases for better compatibility with SGI tools.
412 2006-06-08 Alan Modra <amodra@bigpond.net.au>
414 * configure.in (BFDLIB, BFDVER_H, ALL_OBJ_DEPS): Delete.
415 * Makefile.am (GASLIBS): Expand @BFDLIB@.
417 (OBJS): Expand @ALL_OBJ_DEPS@. Depend on all fopen-*.h variants.
418 (obj-aout.o): Depend on $(DEP_@target_get_type@_aout)
419 (obj-coff.o, obj-ecoff.o, obj-elf.o): Similarly.
421 * dep-in.sed: Don't substitute bfdver.h. Do remove symcat.h.
422 * Makefile.in: Regenerate.
423 * doc/Makefile.in: Regenerate.
424 * configure: Regenerate.
426 2006-06-07 Joseph S. Myers <joseph@codesourcery.com>
428 * po/Make-in (pdf, ps): New dummy targets.
430 2006-06-07 Julian Brown <julian@codesourcery.com>
432 * config/tc-arm.c (stdarg.h): include.
433 (arm_it): Add uncond_value field. Add isvec and issingle to operand
435 (arm_reg_type): Add REG_TYPE_VFSD (single or double VFP reg) and
436 REG_TYPE_NSDQ (single, double or quad vector reg).
437 (reg_expected_msgs): Update.
438 (BAD_FPU): Add macro for unsupported FPU instruction error.
439 (parse_neon_type): Support 'd' as an alias for .f64.
440 (parse_typed_reg_or_scalar): Support REG_TYPE_VFSD, REG_TYPE_NSDQ
442 (parse_vfp_reg_list): Don't update first arg on error.
443 (parse_neon_mov): Support extra syntax for VFP moves.
444 (operand_parse_code): Add OP_RVSD, OP_RNSDQ, OP_VRSDLST, OP_RVSD_IO,
445 OP_RNSDQ_RNSC, OP_RVC_PSR, OP_APSR_RR, OP_oRNSDQ.
446 (parse_operands): Support isvec, issingle operands fields, new parse
448 (do_vfp_nsyn_mrs, do_vfp_nsyn_msr): New functions. Support VFP mrs,
450 (do_mrs, do_msr, do_t_mrs, do_t_msr): Add support for above.
451 (NEON_ENC_TAB): Add vnmul, vnmla, vnmls, vcmp, vcmpz, vcmpe, vcmpez.
452 (NEON_ENC_SINGLE, NEON_ENC_DOUBLE): Define macros.
453 (NEON_SHAPE_DEF): New macro. Define table of possible instruction
455 (neon_shape): Redefine in terms of above.
456 (neon_shape_class): New enumeration, table of shape classes.
457 (neon_shape_el): New enumeration. One element of a shape.
458 (neon_shape_el_size): Register widths of above, where appropriate.
459 (neon_shape_info): New struct. Info for shape table.
460 (neon_shape_tab): New array.
461 (neon_type_mask): Add N_F64, N_VFP. Update N_MAX_NONSPECIAL.
462 (neon_check_shape): Rewrite as...
463 (neon_select_shape): New function to classify instruction shapes,
464 driven by new table neon_shape_tab array.
465 (neon_quad): New function. Return 1 if shape should set Q flag in
466 instructions (or equivalent), 0 otherwise.
467 (type_chk_of_el_type): Support F64.
468 (el_type_of_type_chk): Likewise.
469 (neon_check_type): Add support for VFP type checking (VFP data
470 elements fill their containing registers).
471 (do_vfp_cond_or_thumb): Fill in condition field in ARM mode, or 0xE
472 in thumb mode for VFP instructions.
473 (do_vfp_nsyn_opcode): New function. Look up the opcode in argument,
474 and encode the current instruction as if it were that opcode.
475 (try_vfp_nsyn): New. If this looks like a VFP instruction with ARGS
476 arguments, call function in PFN.
477 (do_vfp_nsyn_add_sub, do_vfp_nsyn_mla_mls, do_vfp_nsyn_mul)
478 (do_vfp_nsyn_abs_neg, do_vfp_nsyn_ldm_stm, do_vfp_nsyn_ldr_str)
479 (do_vfp_nsyn_sqrt, do_vfp_nsyn_div, do_vfp_nsyn_nmul)
480 (do_vfp_nsyn_cmp, nsyn_insert_sp, do_vfp_nsyn_push)
481 (do_vfp_nsyn_pop, do_vfp_nsyn_cvt, do_vfp_nsyn_cvtz): New functions.
482 Redirect Neon-syntax VFP instructions to VFP instruction handlers.
483 (do_neon_dyadic_i_su, do_neon_dyadic_i64_su, do_neon_shl_imm)
484 (do_neon_qshl_imm, do_neon_logic, do_neon_bitfield)
485 (neon_dyadic_misc, neon_compare, do_neon_tst, do_neon_qdmulh)
486 (do_neon_fcmp_absolute, do_neon_step, do_neon_sli, do_neon_sri)
487 (do_neon_qshlu_imm, neon_move_immediate, do_neon_mvn, do_neon_ext)
488 (do_neon_rev, do_neon_dup, do_neon_rshift_round_imm, do_neon_trn)
489 (do_neon_zip_uzp, do_neon_sat_abs_neg, do_neon_pair_long)
490 (do_neon_recip_est, do_neon_cls, do_neon_clz, do_neon_cnt)
491 (do_neon_swp): Use neon_select_shape not neon_check_shape. Use
493 (vfp_or_neon_is_neon): New function. Call if a mnemonic shared
494 between VFP and Neon turns out to belong to Neon. Perform
495 architecture check and fill in condition field if appropriate.
496 (do_neon_addsub_if_i, do_neon_mac_maybe_scalar, do_neon_abs_neg)
497 (do_neon_cvt): Add support for VFP variants of instructions.
498 (neon_cvt_flavour): Extend to cover VFP conversions.
499 (do_neon_mov): Rewrite to use neon_select_shape. Add support for VFP
501 (do_neon_ldr_str): Handle single-precision VFP load/store.
502 (do_neon_ld_st_interleave, do_neon_ld_st_lane, do_neon_ld_dup): Use
503 NS_NULL not NS_IGNORE.
504 (opcode_tag): Add OT_csuffixF for operands which either take a
505 conditional suffix, or have 0xF in the condition field.
506 (md_assemble): Add support for OT_csuffixF.
507 (NCE): Replace macro with...
508 (NCE_tag, NCE, NCEF): New macros.
509 (nCE): Replace macro with...
510 (nCE_tag, nCE, nCEF): New macros.
511 (insns): Add support for VFP insns or VFP versions of insns msr,
512 mrs, vsqrt, vdiv, vnmul, vnmla, vnmls, vcmp, vcmpe, vpush, vpop,
513 vcvtz, vmul, vmla, vmls, vadd, vsub, vabs, vneg, vldm, vldmia,
514 vldbdb, vstm, vstmia, vstmdb, vldr, vstr, vcvt, vmov. Group shared
515 VFP/Neon insns together.
517 2006-06-07 Alan Modra <amodra@bigpond.net.au>
518 Ladislav Michl <ladis@linux-mips.org>
520 * app.c: Don't include headers already included by as.h.
522 * atof-generic.c: Likewise.
524 * dwarf2dbg.c: Likewise.
526 * input-file.c: Likewise.
527 * input-scrub.c: Likewise.
529 * output-file.c: Likewise.
532 * config/bfin-lex.l: Likewise.
533 * config/obj-coff.h: Likewise.
534 * config/obj-elf.h: Likewise.
535 * config/obj-som.h: Likewise.
536 * config/tc-arc.c: Likewise.
537 * config/tc-arm.c: Likewise.
538 * config/tc-avr.c: Likewise.
539 * config/tc-bfin.c: Likewise.
540 * config/tc-cris.c: Likewise.
541 * config/tc-d10v.c: Likewise.
542 * config/tc-d30v.c: Likewise.
543 * config/tc-dlx.h: Likewise.
544 * config/tc-fr30.c: Likewise.
545 * config/tc-frv.c: Likewise.
546 * config/tc-h8300.c: Likewise.
547 * config/tc-hppa.c: Likewise.
548 * config/tc-i370.c: Likewise.
549 * config/tc-i860.c: Likewise.
550 * config/tc-i960.c: Likewise.
551 * config/tc-ip2k.c: Likewise.
552 * config/tc-iq2000.c: Likewise.
553 * config/tc-m32c.c: Likewise.
554 * config/tc-m32r.c: Likewise.
555 * config/tc-maxq.c: Likewise.
556 * config/tc-mcore.c: Likewise.
557 * config/tc-mips.c: Likewise.
558 * config/tc-mmix.c: Likewise.
559 * config/tc-mn10200.c: Likewise.
560 * config/tc-mn10300.c: Likewise.
561 * config/tc-msp430.c: Likewise.
562 * config/tc-mt.c: Likewise.
563 * config/tc-ns32k.c: Likewise.
564 * config/tc-openrisc.c: Likewise.
565 * config/tc-ppc.c: Likewise.
566 * config/tc-s390.c: Likewise.
567 * config/tc-sh.c: Likewise.
568 * config/tc-sh64.c: Likewise.
569 * config/tc-sparc.c: Likewise.
570 * config/tc-tic30.c: Likewise.
571 * config/tc-tic4x.c: Likewise.
572 * config/tc-tic54x.c: Likewise.
573 * config/tc-v850.c: Likewise.
574 * config/tc-vax.c: Likewise.
575 * config/tc-xc16x.c: Likewise.
576 * config/tc-xstormy16.c: Likewise.
577 * config/tc-xtensa.c: Likewise.
578 * config/tc-z80.c: Likewise.
579 * config/tc-z8k.c: Likewise.
580 * macro.h: Don't include sb.h or ansidecl.h.
581 * sb.h: Don't include stdio.h or ansidecl.h.
582 * cond.c: Include sb.h.
583 * itbl-lex.l: Include as.h instead of other system headers.
584 * itbl-parse.y: Likewise.
585 * itbl-ops.c: Similarly.
586 * itbl-ops.h: Don't include as.h or ansidecl.h.
587 * config/bfin-defs.h: Don't include bfd.h or as.h.
588 * config/bfin-parse.y: Include as.h instead of other system headers.
590 2006-06-06 Ben Elliston <bje@au.ibm.com>
591 Anton Blanchard <anton@samba.org>
593 * config/tc-ppc.c (parse_cpu): Handle "-mpower6".
594 (md_show_usage): Document it.
595 (ppc_setup_opcodes): Test power6 opcode flag bits.
596 * doc/c-ppc.texi (PowerPC-Opts): Document "-mpower6".
598 2006-06-06 Thiemo Seufer <ths@mips.com>
599 Chao-ying Fu <fu@mips.com>
601 * config/tc-mips.c (ISA_SUPPORTS_DSP64): New macro.
602 (CPU_HAS_MIPS3D, CPU_HAS_MDMX, CPU_HAS_DSP, CPU_HAS_MT): Delete.
603 (macro_build): Update comment.
604 (mips_ip): Allow DSP64 instructions for MIPS64R2.
605 (mips_after_parse_args): Remove uses of CPU_HAS_MIPS3D and
607 (mips_cpu_info): Fix formatting. Add MIPS_CPU_ASE_MIPS3D and
608 MIPS_CPU_ASE_MDMX flags for sb1.
610 2006-06-05 Thiemo Seufer <ths@mips.com>
612 * config/tc-mips.c (macro_build): Use INSERT_OPERAND wherew
614 (mips16_macro_build): Use MIPS16_INSERT_OPERAND where appropriate.
615 (mips_ip): Make overflowed/underflowed constant arguments in DSP
616 and MT instructions a fatal error. Use INSERT_OPERAND where
617 appropriate. Improve warnings for break and wait code overflows.
618 Use symbolic constant of OP_MASK_COPZ.
619 (mips16_ip): Use MIPS16_INSERT_OPERAND where appropriate.
621 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
623 * po/Make-in (top_builddir): Define.
625 2006-06-02 Joseph S. Myers <joseph@codesourcery.com>
627 * doc/Makefile.am (TEXI2DVI): Define.
628 * doc/Makefile.in: Regenerate.
629 * doc/c-arc.texi: Fix typo.
631 2006-06-01 Alan Modra <amodra@bigpond.net.au>
633 * config/obj-ieee.c: Delete.
634 * config/obj-ieee.h: Delete.
635 * Makefile.am (OBJ_FORMATS): Remove ieee.
636 (OBJ_FORMAT_CFILES, OBJ_FORMAT_HFILES): Similarly.
637 (obj-ieee.o): Remove rule.
638 * Makefile.in: Regenerate.
639 * configure.in (atof): Remove tahoe.
640 (OBJ_MAYBE_IEEE): Don't define.
641 * configure: Regenerate.
642 * config.in: Regenerate.
643 * doc/Makefile.in: Regenerate.
644 * po/POTFILES.in: Regenerate.
646 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
648 * Makefile.am: Replace INTLLIBS and INTLDEPS with LIBINTL
649 and LIBINTL_DEP everywhere.
651 (INCLUDES, DEP_INCLUDES): Use @INCINTL@.
652 * acinclude.m4: Include new gettext macros.
653 * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
654 Remove local code for po/Makefile.
655 * Makefile.in, configure, doc/Makefile.in: Regenerated.
657 2006-05-30 Nick Clifton <nickc@redhat.com>
659 * po/es.po: Updated Spanish translation.
661 2006-05-06 Denis Chertykov <denisc@overta.ru>
663 * doc/c-avr.texi: New file.
664 * doc/Makefile.am (CPU_DOCS): Add c-avr.texi
665 * doc/all.texi: Set AVR
666 * doc/as.texinfo: Include c-avr.texi
668 2006-05-28 Jie Zhang <jie.zhang@analog.com>
670 * config/bfin-parse.y (check_macfunc): Loose the condition of
671 calling check_multiply_halfregs ().
673 2006-05-25 Jie Zhang <jie.zhang@analog.com>
675 * config/bfin-parse.y (asm_1): Better check and deal with
676 vector and scalar Multiply 16-Bit Operands instructions.
678 2006-05-24 Nick Clifton <nickc@redhat.com>
680 * config/tc-hppa.c: Convert to ISO C90 format.
681 * config/tc-hppa.h: Likewise.
683 2006-05-24 Carlos O'Donell <carlos@systemhalted.org>
684 Randolph Chung <randolph@tausq.org>
686 * config/tc-hppa.c (is_tls_gdidx, is_tls_ldidx, is_tls_dtpoff,
687 is_tls_ieoff, is_tls_leoff): Define.
688 (fix_new_hppa): Handle TLS.
689 (cons_fix_new_hppa): Likewise.
691 (md_apply_fix): Handle TLS relocs.
692 * config/tc-hppa.h (hppa_fix_adjustable): Handle TLS.
694 2006-05-24 Bjoern Haase <bjoern.m.haase@web.de>
696 * config/tc-avr.c: Add new cpu targets avr6, avr2560 and avr2561.
698 2006-05-23 Thiemo Seufer <ths@mips.com>
699 David Ung <davidu@mips.com>
700 Nigel Stephens <nigel@mips.com>
703 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS): Rename.
704 (ISA_SUPPORTS_DSP_ASE, ISA_SUPPORTS_MT_ASE, ISA_HAS_64BIT_FPRS,
705 ISA_HAS_MXHC1): New macros.
706 (HAVE_32BIT_FPRS): Use ISA_HAS_64BIT_FPRS instead of
707 ISA_HAS_64BIT_REGS. Formatting fixes. Improved comments.
708 (mips_cpu_info): Change to use combined ASE/IS_ISA flag.
709 (MIPS_CPU_IS_ISA, MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP,
710 MIPS_CPU_ASE_MT, MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX): New defines.
711 (mips_after_parse_args): Change default handling of float register
712 size to account for 32bit code with 64bit FP. Better sanity checking
713 of ISA/ASE/ABI option combinations.
714 (s_mipsset): Support switching of GPR and FPR sizes via
715 .set {g,f}p={32,64,default}. Better sanity checking for .set ASE
717 (mips_elf_final_processing): We should record the use of 64bit FP
718 registers in 32bit code but we don't, because ELF header flags are
720 (mips_cpu_info_table): Add ASE flags for CPUs with mandatory ASE
721 extensions. Add 4ksc, 4kec, 4kem, 4kep, 4ksd, m4kp, 24kec, 24kef,
722 24kex, 34kc, 34kf, 34kx, 25kf CPU definitions.
723 (mips_cpu_info_from_isa): Use MIPS_CPU_IS_ISA.
724 * doc/c-mips.texi: Document .set {g,f}p={32,64,default}. Document
725 missing -march options. Document .set arch=CPU. Move .set smartmips
726 to ASE page. Use @code for .set FOO examples.
728 2006-05-23 Jie Zhang <jie.zhang@analog.com>
730 * config/tc-bfin.c (bfin_start_line_hook): Bump line counters
733 2006-05-23 Jie Zhang <jie.zhang@analog.com>
735 * config/bfin-defs.h (bfin_equals): Remove declaration.
736 * config/bfin-parse.y (asm_1): Remove "expr ASSIGN expr".
737 * config/tc-bfin.c (bfin_name_is_register): Remove.
738 (bfin_equals): Remove.
739 * config/tc-bfin.h (TC_EQUAL_IN_INSN): Redefine as 1.
740 (bfin_name_is_register): Remove declaration.
742 2006-05-19 Thiemo Seufer <ths@mips.com>
743 Nigel Stephens <nigel@mips.com>
745 * config/tc-mipc.c (ISA_HAS_ODD_SINGLE_FPR): New define.
746 (mips_oddfpreg_ok): New function.
749 2006-05-19 Thiemo Seufer <ths@mips.com>
750 David Ung <davidu@mips.com>
752 * config/tc-mips.h (tc_mips_regname_to_dw2regnum): Declare.
753 * config/tc-mipc.c (ABI_NEEDS_64BIT_REGS, ISA_HAS_64BIT_REGS,
754 ISA_HAS_DROR, ISA_HAS_ROR): Reformat.
755 (regname, RTYPE_MASK, RTYPE_NUM, RTYPE_FPU, RTYPE_FCC, RTYPE_VEC,
756 RTYPE_GP, RTYPE_CP0, RTYPE_PC, RTYPE_ACC, RTYPE_CCC, RNUM_MASK,
757 RWARN, GENERIC_REGISTER_NUMBERS, FPU_REGISTER_NAMES,
758 FPU_CONDITION_CODE_NAMES, COPROC_CONDITION_CODE_NAMES,
759 N32N64_SYMBOLIC_REGISTER_NAMES, O32_SYMBOLIC_REGISTER_NAMES,
760 SYMBOLIC_REGISTER_NAMES, MIPS16_SPECIAL_REGISTER_NAMES,
761 MDMX_VECTOR_REGISTER_NAMES, MIPS_DSP_ACCUMULATOR_NAMES, reg_names,
762 reg_names_o32, reg_names_n32n64): Define register classes.
763 (reg_lookup): New function, use register classes.
764 (md_begin): Reserve register names in the symbol table. Simplify
766 (mips_ip): Fix comment formatting. Handle symbolic COP0 registers.
768 (mips16_ip): Use reg_lookup.
769 (tc_get_register): Likewise.
770 (tc_mips_regname_to_dw2regnum): New function.
772 2006-05-19 Thiemo Seufer <ths@mips.com>
774 * config/tc-arm.c, config/tc-arm.h (tc_arm_regname_to_dw2regnum):
775 Un-constify string argument.
776 * config/tc-i386.c, config/tc-i386.h (tc_x86_regname_to_dw2regnum):
778 * config/tc-m68k.c, config/tc-m68k.h (tc_m68k_regname_to_dw2regnum):
780 * config/tc-ppc.c, config/tc-ppc.h (tc_ppc_regname_to_dw2regnum):
782 * config/tc-s390.c, config/tc-s390.h (tc_s390_regname_to_dw2regnum):
784 * config/tc-sh.c, config/tc-sh.h (sh_regname_to_dw2regnum):
786 * config/tc-sparc.c, config/tc-sparc.h (sparc_regname_to_dw2regnum):
789 2006-05-19 Nathan Sidwell <nathan@codesourcery.com>
791 * gas/config/tc-m68k.c (m68k_init_arch): Move checking of
792 cfloat/m68881 to correct architecture before using it.
794 2006-05-16 Bjoern Haase <bjoern.m.haase@web.de>
796 * config/tc-avr.h (TC_VALIDATE_FIX): Allow fixups for immediate
799 2006-05-15 Paul Brook <paul@codesourcery.com>
801 * config/tc-arm.c (arm_adjust_symtab): Use
802 bfd_is_arm_special_symbol_name.
804 2006-05-15 Bob Wilson <bob.wilson@acm.org>
806 * config/tc-xtensa.c (is_direct_call_opcode, is_branch_jmp_to_next,
807 xg_assemble_vliw_tokens, xtensa_mark_narrow_branches,
808 xtensa_fix_short_loop_frags, is_local_forward_loop, relax_frag_immed):
809 Handle errors from calls to xtensa_opcode_is_* functions.
811 2006-05-14 Thiemo Seufer <ths@mips.com>
813 * config/tc-mips.c (macro_build): Test for currently active
815 (mips16_ip): Reject invalid opcodes.
817 2006-05-11 Carlos O'Donell <carlos@codesourcery.com>
819 * doc/as.texinfo: Rename "Index" to "AS Index",
820 and "ABORT" to "ABORT (COFF)".
822 2006-05-11 Paul Brook <paul@codesourcery.com>
824 * config/tc-arm.c (parse_half): New function.
825 (operand_parse_code): Remove OP_Iffff. Add OP_HALF.
826 (parse_operands): Ditto.
827 (do_mov16): Reject invalid relocations.
828 (do_t_mov16): Ditto. Use Thumb reloc numbers.
829 (insns): Replace Iffff with HALF.
830 (md_apply_fix): Add MOVW and MOVT relocs.
831 (tc_gen_reloc): Ditto.
832 * doc/c-arm.texi: Document relocation operators
834 2006-05-11 Paul Brook <paul@codesourcery.com>
836 * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
838 2006-05-11 Thiemo Seufer <ths@mips.com>
840 * config/tc-mips.c (append_insn): Don't check the range of j or
843 2006-05-11 Pedro Alves <pedro_alves@portugalmail.pt>
845 * config/tc-arm.c (md_pcrel_from_section): Force a bias for
846 relocs against external symbols for WinCE targets.
847 (md_apply_fix): Likewise.
849 2006-05-09 David Ung <davidu@mips.com>
851 * config/tc-mips.c (append_insn): Only warn about an out-of-range
854 2006-05-09 Nick Clifton <nickc@redhat.com>
856 * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups
857 against symbols which are not going to be placed into the symbol
860 2006-05-09 Ben Elliston <bje@au.ibm.com>
862 * expr.c (operand): Remove `if (0 && ..)' statement and
863 subsequently unused target_op label. Collapse `if (1 || ..)'
865 * app.c (do_scrub_chars): Remove unused case 0, as it is handled
866 separately above the switch.
868 2006-05-08 Nick Clifton <nickc@redhat.com>
871 * config/tc-msp430.c (line_separator_character): Define as |.
873 2006-05-08 Thiemo Seufer <ths@mips.com>
874 Nigel Stephens <nigel@mips.com>
875 David Ung <davidu@mips.com>
877 * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
878 (mips_opts): Likewise.
879 (file_ase_smartmips): New variable.
880 (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
881 (macro_build): Handle SmartMIPS instructions.
883 (md_longopts): Add argument handling for smartmips.
884 (md_parse_options, mips_after_parse_args): Likewise.
885 (s_mipsset): Add .set smartmips support.
886 (md_show_usage): Document -msmartmips/-mno-smartmips.
887 * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
889 * doc/c-mips.texi: Likewise.
891 2006-05-08 Alan Modra <amodra@bigpond.net.au>
893 * write.c (relax_segment): Add pass count arg. Don't error on
894 negative org/space on first two passes.
895 (relax_seg_info): New struct.
896 (relax_seg, write_object_file): Adjust.
897 * write.h (relax_segment): Update prototype.
899 2006-05-05 Julian Brown <julian@codesourcery.com>
901 * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
903 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
904 architecture version checks.
905 (insns): Allow overlapping instructions to be used in VFP mode.
907 2006-05-05 H.J. Lu <hongjiu.lu@intel.com>
910 * config/obj-elf.c (obj_elf_change_section): Allow user
911 specified SHF_ALPHA_GPREL.
913 2006-05-05 Bjoern Haase <bjoern.m.haase@web.de>
915 * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups
916 for PMEM related expressions.
918 2006-05-05 Nick Clifton <nickc@redhat.com>
921 * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the
922 insertion of a directory separator character into a string at a
923 given offset. Uses heuristics to decide when to use a backslash
924 character rather than a forward-slash character.
925 (dwarf2_directive_loc): Use the macro.
926 (out_debug_info): Likewise.
928 2006-05-05 Thiemo Seufer <ths@mips.com>
929 David Ung <davidu@mips.com>
931 * config/tc-mips.c (macro_build): Add case 'k' to handle cache
933 (macro): Add new case M_CACHE_AB.
935 2006-05-04 Kazu Hirata <kazu@codesourcery.com>
937 * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
938 (opcode_lookup): Issue a warning for opcode with
939 OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated
940 identical to OT_cinfix3.
941 (TxC3w, TC3w, tC3w): New.
942 (insns): Use tC3w and TC3w for comparison instructions with
945 2006-05-04 Alan Modra <amodra@bigpond.net.au>
947 * subsegs.h (struct frchain): Delete frch_seg.
948 (frchain_root): Delete.
949 (seg_info): Define as macro.
950 * subsegs.c (frchain_root): Delete.
951 (abs_seg_info, und_seg_info, absolute_frchain): Delete.
952 (subsegs_begin, subseg_change): Adjust for above.
953 (subseg_set_rest): Likewise. Add new frchain structs to seginfo
954 rather than to one big list.
955 (subseg_get): Don't special case abs, und sections.
956 (subseg_new, subseg_force_new): Don't set frchainP here.
958 (subsegs_print_statistics): Adjust frag chain control list traversal.
959 * debug.c (dmp_frags): Likewise.
960 * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
961 at frchain_root. Make use of known frchain ordering.
962 (last_frag_for_seg): Likewise.
963 (get_frag_fix): Likewise. Add seg param.
964 (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
965 * write.c (chain_frchains_together_1): Adjust for struct frchain.
966 (SUB_SEGMENT_ALIGN): Likewise.
967 (subsegs_finish): Adjust frchain list traversal.
968 * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
969 (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
970 (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
971 (xtensa_fix_b_j_loop_end_frags): Likewise.
972 (xtensa_fix_close_loop_end_frags): Likewise.
973 (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
974 (retrieve_segment_info): Delete frch_seg initialisation.
976 2006-05-03 Alan Modra <amodra@bigpond.net.au>
978 * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
979 * config/obj-elf.h (obj_sec_set_private_data): Delete.
980 * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
981 * config/tc-mn10300.c (tc_gen_reloc): Likewise.
983 2006-05-02 Joseph Myers <joseph@codesourcery.com>
985 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
987 (md_apply_fix3): Multiply offset by 4 here for
988 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
990 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
991 Jan Beulich <jbeulich@novell.com>
993 * config/tc-i386.c (output_invalid_buf): Change size for
995 * config/tc-tic30.c (output_invalid_buf): Likewise.
997 * config/tc-i386.c (output_invalid): Cast none-ascii char to
999 * config/tc-tic30.c (output_invalid): Likewise.
1001 2006-05-02 Daniel Jacobowitz <dan@codesourcery.com>
1003 * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
1004 (TEXI2POD): Use AM_MAKEINFOFLAGS.
1005 (asconfig.texi): Don't set top_srcdir.
1006 * doc/as.texinfo: Don't use top_srcdir.
1007 * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
1009 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
1011 * config/tc-i386.c (output_invalid_buf): Change size to 16.
1012 * config/tc-tic30.c (output_invalid_buf): Likewise.
1014 * config/tc-i386.c (output_invalid): Use snprintf instead of
1016 * config/tc-ia64.c (declare_register_set): Likewise.
1017 (emit_one_bundle): Likewise.
1018 (check_dependencies): Likewise.
1019 * config/tc-tic30.c (output_invalid): Likewise.
1021 2006-05-02 Paul Brook <paul@codesourcery.com>
1023 * config/tc-arm.c (arm_optimize_expr): New function.
1024 * config/tc-arm.h (md_optimize_expr): Define
1025 (arm_optimize_expr): Add prototype.
1026 (TC_FORCE_RELOCATION_SUB_SAME): Define.
1028 2006-05-02 Ben Elliston <bje@au.ibm.com>
1030 * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
1033 * sb.h (sb_list_vector): Move to sb.c.
1034 * sb.c (free_list): Use type of sb_list_vector directly.
1035 (sb_build): Fix off-by-one error in assertion about `size'.
1037 2006-05-01 Ben Elliston <bje@au.ibm.com>
1039 * listing.c (listing_listing): Remove useless loop.
1040 * macro.c (macro_expand): Remove is_positional local variable.
1041 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
1042 and simplify surrounding expressions, where possible.
1043 (assign_symbol): Likewise.
1044 (s_weakref): Likewise.
1045 * symbols.c (colon): Likewise.
1047 2006-05-01 James Lemke <jwlemke@wasabisystems.com>
1049 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
1051 2006-04-30 Thiemo Seufer <ths@mips.com>
1052 David Ung <davidu@mips.com>
1054 * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
1055 (mips_immed): New table that records various handling of udi
1056 instruction patterns.
1057 (mips_ip): Adds udi handling.
1059 2006-04-28 Alan Modra <amodra@bigpond.net.au>
1061 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
1062 of list rather than beginning.
1064 2006-04-26 Julian Brown <julian@codesourcery.com>
1066 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
1067 (is_quarter_float): Rename from above. Simplify slightly.
1068 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
1070 (parse_neon_mov): Parse floating-point constants.
1071 (neon_qfloat_bits): Fix encoding.
1072 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
1073 preference to integer encoding when using the F32 type.
1075 2006-04-26 Julian Brown <julian@codesourcery.com>
1077 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
1078 zero-initialising structures containing it will lead to invalid types).
1079 (arm_it): Add vectype to each operand.
1080 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
1082 (neon_typed_alias): New structure. Extra information for typed
1084 (reg_entry): Add neon type info field.
1085 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
1086 Break out alternative syntax for coprocessor registers, etc. into...
1087 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
1088 out from arm_reg_parse.
1089 (parse_neon_type): Move. Return SUCCESS/FAIL.
1090 (first_error): New function. Call to ensure first error which occurs is
1092 (parse_neon_operand_type): Parse exactly one type.
1093 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
1094 (parse_typed_reg_or_scalar): New function. Handle core of both
1095 arm_typed_reg_parse and parse_scalar.
1096 (arm_typed_reg_parse): Parse a register with an optional type.
1097 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
1099 (parse_scalar): Parse a Neon scalar with optional type.
1100 (parse_reg_list): Use first_error.
1101 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
1102 (neon_alias_types_same): New function. Return true if two (alias) types
1104 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
1106 (insert_reg_alias): Return new reg_entry not void.
1107 (insert_neon_reg_alias): New function. Insert type/index information as
1108 well as register for alias.
1109 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
1110 make typed register aliases accordingly.
1111 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
1113 (s_unreq): Delete type information if present.
1114 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
1115 (s_arm_unwind_save_mmxwcg): Likewise.
1116 (s_arm_unwind_movsp): Likewise.
1117 (s_arm_unwind_setfp): Likewise.
1118 (parse_shift): Likewise.
1119 (parse_shifter_operand): Likewise.
1120 (parse_address): Likewise.
1121 (parse_tb): Likewise.
1122 (tc_arm_regname_to_dw2regnum): Likewise.
1123 (md_pseudo_table): Add dn, qn.
1124 (parse_neon_mov): Handle typed operands.
1125 (parse_operands): Likewise.
1126 (neon_type_mask): Add N_SIZ.
1127 (N_ALLMODS): New macro.
1128 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
1129 (el_type_of_type_chk): Add some safeguards.
1130 (modify_types_allowed): Fix logic bug.
1131 (neon_check_type): Handle operands with types.
1132 (neon_three_same): Remove redundant optional arg handling.
1133 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
1134 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
1135 (do_neon_step): Adjust accordingly.
1136 (neon_cmode_for_logic_imm): Use first_error.
1137 (do_neon_bitfield): Call neon_check_type.
1138 (neon_dyadic): Rename to...
1139 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
1140 to allow modification of type of the destination.
1141 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1142 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
1143 (do_neon_compare): Make destination be an untyped bitfield.
1144 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
1145 (neon_mul_mac): Return early in case of errors.
1146 (neon_move_immediate): Use first_error.
1147 (neon_mac_reg_scalar_long): Fix type to include scalar.
1148 (do_neon_dup): Likewise.
1149 (do_neon_mov): Likewise (in several places).
1150 (do_neon_tbl_tbx): Fix type.
1151 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
1152 (do_neon_ld_dup): Exit early in case of errors and/or use
1154 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
1155 Handle .dn/.qn directives.
1156 (REGDEF): Add zero for reg_entry neon field.
1158 2006-04-26 Julian Brown <julian@codesourcery.com>
1160 * config/tc-arm.c (limits.h): Include.
1161 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
1162 (fpu_vfp_v3_or_neon_ext): Declare constants.
1163 (neon_el_type): New enumeration of types for Neon vector elements.
1164 (neon_type_el): New struct. Define type and size of a vector element.
1165 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
1167 (neon_type): Define struct. The type of an instruction.
1168 (arm_it): Add 'vectype' for the current instruction.
1169 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
1170 (vfp_sp_reg_pos): Rename to...
1171 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
1173 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
1174 (Neon D or Q register).
1175 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
1177 (GE_OPT_PREFIX_BIG): Define constant, for use in...
1178 (my_get_expression): Allow above constant as argument to accept
1179 64-bit constants with optional prefix.
1180 (arm_reg_parse): Add extra argument to return the specific type of
1181 register in when either a D or Q register (REG_TYPE_NDQ) is
1182 requested. Can be NULL.
1183 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
1184 (parse_reg_list): Update for new arm_reg_parse args.
1185 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
1186 (parse_neon_el_struct_list): New function. Parse element/structure
1187 register lists for VLD<n>/VST<n> instructions.
1188 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
1189 (s_arm_unwind_save_mmxwr): Likewise.
1190 (s_arm_unwind_save_mmxwcg): Likewise.
1191 (s_arm_unwind_movsp): Likewise.
1192 (s_arm_unwind_setfp): Likewise.
1193 (parse_big_immediate): New function. Parse an immediate, which may be
1194 64 bits wide. Put results in inst.operands[i].
1195 (parse_shift): Update for new arm_reg_parse args.
1196 (parse_address): Likewise. Add parsing of alignment specifiers.
1197 (parse_neon_mov): Parse the operands of a VMOV instruction.
1198 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
1199 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
1200 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
1201 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
1202 (parse_operands): Handle new codes above.
1203 (encode_arm_vfp_sp_reg): Rename to...
1204 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
1205 selected VFP version only supports D0-D15.
1206 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
1207 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
1208 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
1209 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
1210 encode_arm_vfp_reg name, and allow 32 D regs.
1211 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
1212 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
1214 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
1215 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
1216 constant-load and conversion insns introduced with VFPv3.
1217 (neon_tab_entry): New struct.
1218 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
1219 those which are the targets of pseudo-instructions.
1220 (neon_opc): Enumerate opcodes, use as indices into...
1221 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
1222 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
1223 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
1224 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
1226 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
1228 (neon_type_mask): New. Compact type representation for type checking.
1229 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
1230 permitted type combinations.
1231 (N_IGNORE_TYPE): New macro.
1232 (neon_check_shape): New function. Check an instruction shape for
1233 multiple alternatives. Return the specific shape for the current
1235 (neon_modify_type_size): New function. Modify a vector type and size,
1236 depending on the bit mask in argument 1.
1237 (neon_type_promote): New function. Convert a given "key" type (of an
1238 operand) into the correct type for a different operand, based on a bit
1240 (type_chk_of_el_type): New function. Convert a type and size into the
1241 compact representation used for type checking.
1242 (el_type_of_type_ckh): New function. Reverse of above (only when a
1243 single bit is set in the bit mask).
1244 (modify_types_allowed): New function. Alter a mask of allowed types
1245 based on a bit mask of modifications.
1246 (neon_check_type): New function. Check the type of the current
1247 instruction against the variable argument list. The "key" type of the
1248 instruction is returned.
1249 (neon_dp_fixup): New function. Fill in and modify instruction bits for
1250 a Neon data-processing instruction depending on whether we're in ARM
1251 mode or Thumb-2 mode.
1252 (neon_logbits): New function.
1253 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
1254 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
1255 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
1256 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
1257 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
1258 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
1259 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1260 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
1261 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
1262 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
1263 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
1264 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
1265 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
1266 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
1267 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
1268 (neon_move_immediate, do_neon_mvn, neon_mixed_length)
1269 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
1270 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
1271 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
1272 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
1273 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
1274 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
1275 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
1276 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
1277 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
1279 (parse_neon_type): New function. Parse Neon type specifier.
1280 (opcode_lookup): Allow parsing of Neon type specifiers.
1281 (REGNUM2, REGSETH, REGSET2): New macros.
1282 (reg_names): Add new VFPv3 and Neon registers.
1283 (NUF, nUF, NCE, nCE): New macros for opcode table.
1284 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
1285 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
1286 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
1287 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
1288 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
1289 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
1290 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
1291 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
1292 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
1293 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
1294 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
1295 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
1296 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
1297 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
1299 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
1300 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
1301 (arm_option_cpu_value): Add vfp3 and neon.
1302 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
1305 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1307 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
1308 syntax instead of hardcoded opcodes with ".w18" suffixes.
1309 (wide_branch_opcode): New.
1310 (build_transition): Use it to check for wide branch opcodes with
1311 either ".w18" or ".w15" suffixes.
1313 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1315 * config/tc-xtensa.c (xtensa_create_literal_symbol,
1316 xg_assemble_literal, xg_assemble_literal_space): Do not set the
1317 frag's is_literal flag.
1319 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1321 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
1323 2006-04-23 Kazu Hirata <kazu@codesourcery.com>
1325 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
1326 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
1327 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
1328 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
1329 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
1331 2005-04-20 Paul Brook <paul@codesourcery.com>
1333 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
1335 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
1337 2006-04-19 Alan Modra <amodra@bigpond.net.au>
1339 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
1340 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
1341 Make some cpus unsupported on ELF. Run "make dep-am".
1342 * Makefile.in: Regenerate.
1344 2006-04-19 Alan Modra <amodra@bigpond.net.au>
1346 * configure.in (--enable-targets): Indent help message.
1347 * configure: Regenerate.
1349 2006-04-18 H.J. Lu <hongjiu.lu@intel.com>
1352 * config/tc-i386.c (i386_immediate): Check illegal immediate
1355 2006-04-18 Alan Modra <amodra@bigpond.net.au>
1357 * config/tc-i386.c: Formatting.
1358 (output_disp, output_imm): ISO C90 params.
1360 * frags.c (frag_offset_fixed_p): Constify args.
1361 * frags.h (frag_offset_fixed_p): Ditto.
1363 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
1364 (COFF_MAGIC): Delete.
1366 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
1368 2006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
1370 * po/POTFILES.in: Regenerated.
1372 2006-04-16 Mark Mitchell <mark@codesourcery.com>
1374 * doc/as.texinfo: Mention that some .type syntaxes are not
1375 supported on all architectures.
1377 2006-04-14 Sterling Augustine <sterling@tensilica.com>
1379 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
1380 instructions when such transformations have been disabled.
1382 2006-04-10 Sterling Augustine <sterling@tensilica.com>
1384 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
1385 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
1386 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
1387 decoding the loop instructions. Remove current_offset variable.
1388 (xtensa_fix_short_loop_frags): Likewise.
1389 (min_bytes_to_other_loop_end): Remove current_offset argument.
1391 2006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl>
1393 * config/tc-z80.c (z80_optimize_expr): Removed.
1394 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
1396 2006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
1398 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
1399 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
1400 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
1401 atmega644, atmega329, atmega3290, atmega649, atmega6490,
1402 atmega406, atmega640, atmega1280, atmega1281, at90can32,
1403 at90can64, at90usb646, at90usb647, at90usb1286 and
1405 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
1407 2006-04-07 Paul Brook <paul@codesourcery.com>
1409 * config/tc-arm.c (parse_operands): Set default error message.
1411 2006-04-07 Paul Brook <paul@codesourcery.com>
1413 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
1415 2006-04-07 Paul Brook <paul@codesourcery.com>
1417 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
1419 2006-04-07 Paul Brook <paul@codesourcery.com>
1421 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
1422 (move_or_literal_pool): Handle Thumb-2 instructions.
1423 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
1425 2006-04-07 Alan Modra <amodra@bigpond.net.au>
1428 * config/tc-i386.c (match_template): Move 64-bit operand tests
1431 2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
1433 * po/Make-in: Add install-html target.
1434 * Makefile.am: Add install-html and install-html-recursive targets.
1435 * Makefile.in: Regenerate.
1436 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
1437 * configure: Regenerate.
1438 * doc/Makefile.am: Add install-html and install-html-am targets.
1439 * doc/Makefile.in: Regenerate.
1441 2006-04-06 Alan Modra <amodra@bigpond.net.au>
1443 * frags.c (frag_offset_fixed_p): Reinitialise offset before
1446 2006-04-05 Richard Sandiford <richard@codesourcery.com>
1447 Daniel Jacobowitz <dan@codesourcery.com>
1449 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
1450 (GOTT_BASE, GOTT_INDEX): New.
1451 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
1452 GOTT_INDEX when generating VxWorks PIC.
1453 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
1454 use the generic *-*-vxworks* stanza instead.
1456 2006-04-04 Alan Modra <amodra@bigpond.net.au>
1459 * frags.c (frag_offset_fixed_p): New function.
1460 * frags.h (frag_offset_fixed_p): Declare.
1461 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
1462 (resolve_expression): Likewise.
1464 2006-04-03 Sterling Augustine <sterling@tensilica.com>
1466 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
1467 of the same length but different numbers of slots.
1469 2006-03-30 Andreas Schwab <schwab@suse.de>
1471 * configure.in: Fix help string for --enable-targets option.
1472 * configure: Regenerate.
1474 2006-03-28 Nathan Sidwell <nathan@codesourcery.com>
1476 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
1477 (m68k_ip): ... here. Use for all chips. Protect against buffer
1478 overrun and avoid excessive copying.
1480 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
1481 m68020_control_regs, m68040_control_regs, m68060_control_regs,
1482 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
1483 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
1484 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
1485 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
1486 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
1487 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
1488 mcf5282_ctrl, mcfv4e_ctrl): ... these.
1489 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
1490 (struct m68k_cpu): Change chip field to control_regs.
1491 (current_chip): Remove.
1492 (control_regs): New.
1493 (m68k_archs, m68k_extensions): Adjust.
1494 (m68k_cpus): Reorder to be in cpu number order. Adjust.
1495 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
1496 (find_cf_chip): Reimplement for new organization of cpu table.
1497 (select_control_regs): Remove.
1499 (struct save_opts): Save control regs, not chip.
1500 (s_save, s_restore): Adjust.
1501 (m68k_lookup_cpu): Give deprecated warning when necessary.
1502 (m68k_init_arch): Adjust.
1503 (md_show_usage): Adjust for new cpu table organization.
1505 2006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
1507 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
1508 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
1509 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
1511 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
1512 (any_gotrel): New rule.
1513 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
1514 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
1516 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
1517 (bfin_pic_ptr): New function.
1518 (md_pseudo_table): Add it for ".picptr".
1519 (OPTION_FDPIC): New macro.
1520 (md_longopts): Add -mfdpic.
1521 (md_parse_option): Handle it.
1522 (md_begin): Set BFD flags.
1523 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
1524 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
1526 * Makefile.am (bfin-parse.o): Update dependencies.
1527 (DEPTC_bfin_elf): Likewise.
1528 * Makefile.in: Regenerate.
1530 2006-03-25 Richard Sandiford <richard@codesourcery.com>
1532 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
1533 mcfemac instead of mcfmac.
1535 2006-03-23 Michael Matz <matz@suse.de>
1537 * config/tc-i386.c (type_names): Correct placement of 'static'.
1538 (reloc): Map some more relocs to their 64 bit counterpart when
1540 (output_insn): Work around breakage if DEBUG386 is defined.
1541 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
1542 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
1543 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
1544 different from i386.
1545 (output_imm): Ditto.
1546 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
1548 (md_convert_frag): Jumps can now be larger than 2GB away, error
1550 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
1551 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
1553 2006-03-22 Richard Sandiford <richard@codesourcery.com>
1554 Daniel Jacobowitz <dan@codesourcery.com>
1555 Phil Edwards <phil@codesourcery.com>
1556 Zack Weinberg <zack@codesourcery.com>
1557 Mark Mitchell <mark@codesourcery.com>
1558 Nathan Sidwell <nathan@codesourcery.com>
1560 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
1561 (md_begin): Complain about -G being used for PIC. Don't change
1562 the text, data and bss alignments on VxWorks.
1563 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
1564 generating VxWorks PIC.
1565 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
1566 (macro): Likewise, but do not treat la $25 specially for
1567 VxWorks PIC, and do not handle jal.
1568 (OPTION_MVXWORKS_PIC): New macro.
1569 (md_longopts): Add -mvxworks-pic.
1570 (md_parse_option): Don't complain about using PIC and -G together here.
1571 Handle OPTION_MVXWORKS_PIC.
1572 (md_estimate_size_before_relax): Always use the first relaxation
1573 sequence on VxWorks.
1574 * config/tc-mips.h (VXWORKS_PIC): New.
1576 2006-03-21 Paul Brook <paul@codesourcery.com>
1578 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
1580 2006-03-21 Sterling Augustine <sterling@tensilica.com>
1582 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
1583 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
1584 (get_loop_align_size): New.
1585 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
1586 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
1587 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
1588 (get_noop_aligned_address): Use get_loop_align_size.
1589 (get_aligned_diff): Likewise.
1591 2006-03-21 Paul Brook <paul@codesourcery.com>
1593 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
1595 2006-03-20 Paul Brook <paul@codesourcery.com>
1597 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
1598 (do_t_branch): Encode branches inside IT blocks as unconditional.
1599 (do_t_cps): New function.
1600 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
1601 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
1602 (opcode_lookup): Allow conditional suffixes on all instructions in
1604 (md_assemble): Advance condexec state before checking for errors.
1605 (insns): Use do_t_cps.
1607 2006-03-20 Paul Brook <paul@codesourcery.com>
1609 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
1610 outputting the insn.
1612 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1614 * config/tc-vax.c: Update copyright year.
1615 * config/tc-vax.h: Likewise.
1617 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1619 * config/tc-vax.c (md_chars_to_number): Used only locally, so
1621 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
1623 2006-03-17 Paul Brook <paul@codesourcery.com>
1625 * config/tc-arm.c (insns): Add ldm and stm.
1627 2006-03-17 Ben Elliston <bje@au.ibm.com>
1630 * doc/as.texinfo (Ident): Document this directive more thoroughly.
1632 2006-03-16 Paul Brook <paul@codesourcery.com>
1634 * config/tc-arm.c (insns): Add "svc".
1636 2006-03-13 Bob Wilson <bob.wilson@acm.org>
1638 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
1639 flag and avoid double underscore prefixes.
1641 2006-03-10 Paul Brook <paul@codesourcery.com>
1643 * config/tc-arm.c (md_begin): Handle EABIv5.
1644 (arm_eabis): Add EF_ARM_EABI_VER5.
1645 * doc/c-arm.texi: Document -meabi=5.
1647 2006-03-10 Ben Elliston <bje@au.ibm.com>
1649 * app.c (do_scrub_chars): Simplify string handling.
1651 2006-03-07 Richard Sandiford <richard@codesourcery.com>
1652 Daniel Jacobowitz <dan@codesourcery.com>
1653 Zack Weinberg <zack@codesourcery.com>
1654 Nathan Sidwell <nathan@codesourcery.com>
1655 Paul Brook <paul@codesourcery.com>
1656 Ricardo Anguiano <anguiano@codesourcery.com>
1657 Phil Edwards <phil@codesourcery.com>
1659 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
1660 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
1662 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
1663 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
1664 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
1666 2006-03-06 Bob Wilson <bob.wilson@acm.org>
1668 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
1669 even when using the text-section-literals option.
1671 2006-03-06 Nathan Sidwell <nathan@codesourcery.com>
1673 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
1675 (m68k_ip): <case 'J'> Check we have some control regs.
1676 (md_parse_option): Allow raw arch switch.
1677 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
1678 whether 68881 or cfloat was meant by -mfloat.
1679 (md_show_usage): Adjust extension display.
1680 (m68k_elf_final_processing): Adjust.
1682 2006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
1684 * config/tc-avr.c (avr_mod_hash_value): New function.
1685 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
1686 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
1687 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
1688 instead of int avr_ldi_expression: use avr_mod_hash_value instead
1690 (tc_gen_reloc): Handle substractions of symbols, if possible do
1691 fixups, abort otherwise.
1692 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
1693 tc_fix_adjustable): Define.
1695 2006-03-02 James E Wilson <wilson@specifix.com>
1697 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
1698 change the template, then clear md.slot[curr].end_of_insn_group.
1700 2006-02-28 Jan Beulich <jbeulich@novell.com>
1702 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
1704 2006-02-28 Jan Beulich <jbeulich@novell.com>
1707 * macro.c (getstring): Don't treat parentheses special anymore.
1708 (get_any_string): Don't consider '(' and ')' as quoting anymore.
1709 Special-case '(', ')', '[', and ']' when dealing with non-quoting
1712 2006-02-28 Mat <mat@csail.mit.edu>
1714 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
1716 2006-02-27 Jakub Jelinek <jakub@redhat.com>
1718 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
1720 (CFI_signal_frame): Define.
1721 (cfi_pseudo_table): Add .cfi_signal_frame.
1722 (dot_cfi): Handle CFI_signal_frame.
1723 (output_cie): Handle cie->signal_frame.
1724 (select_cie_for_fde): Don't share CIE if signal_frame flag is
1725 different. Copy signal_frame from FDE to newly created CIE.
1726 * doc/as.texinfo: Document .cfi_signal_frame.
1728 2006-02-27 Carlos O'Donell <carlos@codesourcery.com>
1730 * doc/Makefile.am: Add html target.
1731 * doc/Makefile.in: Regenerate.
1732 * po/Make-in: Add html target.
1734 2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
1736 * config/tc-i386.c (output_insn): Support Intel Merom New
1739 * config/tc-i386.h (CpuMNI): New.
1740 (CpuUnknownFlags): Add CpuMNI.
1742 2006-02-24 David S. Miller <davem@sunset.davemloft.net>
1744 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
1745 (hpriv_reg_table): New table for hyperprivileged registers.
1746 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
1749 2006-02-24 DJ Delorie <dj@redhat.com>
1751 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
1752 (tc_gen_reloc): Don't define.
1753 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
1754 (OPTION_LINKRELAX): New.
1755 (md_longopts): Add it.
1757 (md_parse_options): Set it.
1758 (md_assemble): Emit relaxation relocs as needed.
1759 (md_convert_frag): Emit relaxation relocs as needed.
1760 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
1761 (m32c_apply_fix): New.
1762 (tc_gen_reloc): New.
1763 (m32c_force_relocation): Force out jump relocs when relaxing.
1764 (m32c_fix_adjustable): Return false if relaxing.
1766 2006-02-24 Paul Brook <paul@codesourcery.com>
1768 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
1769 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
1770 (struct asm_barrier_opt): Define.
1771 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
1772 (parse_psr): Accept V7M psr names.
1773 (parse_barrier): New function.
1774 (enum operand_parse_code): Add OP_oBARRIER.
1775 (parse_operands): Implement OP_oBARRIER.
1776 (do_barrier): New function.
1777 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
1778 (do_t_cpsi): Add V7M restrictions.
1779 (do_t_mrs, do_t_msr): Validate V7M variants.
1780 (md_assemble): Check for NULL variants.
1781 (v7m_psrs, barrier_opt_names): New tables.
1782 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
1783 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
1784 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
1785 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
1786 (struct cpu_arch_ver_table): Define.
1787 (cpu_arch_ver): New.
1788 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
1789 Tag_CPU_arch_profile.
1790 * doc/c-arm.texi: Document new cpu and arch options.
1792 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1794 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
1796 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1798 * config/tc-ia64.c: Update copyright years.
1800 2006-02-22 H.J. Lu <hongjiu.lu@intel.com>
1802 * config/tc-ia64.c (specify_resource): Add the rule 17 from
1805 2005-02-22 Paul Brook <paul@codesourcery.com>
1807 * config/tc-arm.c (do_pld): Remove incorrect write to
1809 (encode_thumb32_addr_mode): Use correct operand.
1811 2006-02-21 Paul Brook <paul@codesourcery.com>
1813 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
1815 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
1816 Anil Paranjape <anilp1@kpitcummins.com>
1817 Shilin Shakti <shilins@kpitcummins.com>
1819 * Makefile.am: Add xc16x related entry.
1820 * Makefile.in: Regenerate.
1821 * configure.in: Added xc16x related entry.
1822 * configure: Regenerate.
1823 * config/tc-xc16x.h: New file
1824 * config/tc-xc16x.c: New file
1825 * doc/c-xc16x.texi: New file for xc16x
1826 * doc/all.texi: Entry for xc16x
1827 * doc/Makefile.texi: Added c-xc16x.texi
1828 * NEWS: Announce the support for the new target.
1830 2006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
1832 * configure.tgt: set emulation for mips-*-netbsd*
1834 2006-02-14 Jakub Jelinek <jakub@redhat.com>
1836 * config.in: Rebuilt.
1838 2006-02-13 Bob Wilson <bob.wilson@acm.org>
1840 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
1841 from 1, not 0, in error messages.
1842 (md_assemble): Simplify special-case check for ENTRY instructions.
1843 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
1844 operand in error message.
1846 2006-02-13 Joseph S. Myers <joseph@codesourcery.com>
1848 * configure.tgt (arm-*-linux-gnueabi*): Change to
1851 2006-02-10 Nick Clifton <nickc@redhat.com>
1853 * config/tc-crx.c (check_range): Ensure that the sign bit of a
1854 32-bit value is propagated into the upper bits of a 64-bit long.
1856 * config/tc-arc.c (init_opcode_tables): Fix cast.
1857 (arc_extoper, md_operand): Likewise.
1859 2006-02-09 David Heine <dlheine@tensilica.com>
1861 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
1862 each relaxation step.
1864 2006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
1866 * configure.in (CHECK_DECLS): Add vsnprintf.
1867 * configure: Regenerate.
1868 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
1869 include/declare here, but...
1870 * as.h: Move code detecting VARARGS idiom to the top.
1871 (errno.h, stdarg.h, varargs.h, va_list): ...here.
1872 (vsnprintf): Declare if not already declared.
1874 2006-02-08 H.J. Lu <hongjiu.lu@intel.com>
1876 * as.c (close_output_file): New.
1877 (main): Register close_output_file with xatexit before
1878 dump_statistics. Don't call output_file_close.
1880 2006-02-07 Nathan Sidwell <nathan@codesourcery.com>
1882 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
1883 mcf5329_control_regs): New.
1884 (not_current_architecture, selected_arch, selected_cpu): New.
1885 (m68k_archs, m68k_extensions): New.
1886 (archs): Renamed to ...
1887 (m68k_cpus): ... here. Adjust.
1889 (md_pseudo_table): Add arch and cpu directives.
1890 (find_cf_chip, m68k_ip): Adjust table scanning.
1891 (no_68851, no_68881): Remove.
1892 (md_assemble): Lazily initialize.
1893 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
1894 (md_init_after_args): Move functionality to m68k_init_arch.
1895 (mri_chip): Adjust table scanning.
1896 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
1897 options with saner parsing.
1898 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
1899 m68k_init_arch): New.
1900 (s_m68k_cpu, s_m68k_arch): New.
1901 (md_show_usage): Adjust.
1902 (m68k_elf_final_processing): Set CF EF flags.
1903 * config/tc-m68k.h (m68k_init_after_args): Remove.
1904 (tc_init_after_args): Remove.
1905 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
1906 (M68k-Directives): Document .arch and .cpu directives.
1908 2006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl>
1910 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
1911 synonyms for equ and defl.
1912 (z80_cons_fix_new): New function.
1913 (emit_byte): Disallow relative jumps to absolute locations.
1914 (emit_data): Only handle defb, prototype changed, because defb is
1915 now handled as pseudo-op rather than an instruction.
1916 (instab): Entries for defb,defw,db,dw moved from here...
1917 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
1918 Add entries for def24,def32,d24,d32.
1919 (md_assemble): Improved error handling.
1920 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
1921 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
1922 (z80_cons_fix_new): Declare.
1923 * doc/c-z80.texi (defb, db): Mention warning on overflow.
1924 (def24,d24,def32,d32): New pseudo-ops.
1926 2006-02-02 Paul Brook <paul@codesourcery.com>
1928 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
1930 2005-02-02 Paul Brook <paul@codesourcery.com>
1932 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
1933 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
1934 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
1935 T2_OPCODE_RSB): Define.
1936 (thumb32_negate_data_op): New function.
1937 (md_apply_fix): Use it.
1939 2006-01-31 Bob Wilson <bob.wilson@acm.org>
1941 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
1943 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
1944 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
1946 (relaxation_requirements): Add pfinish_frag argument and use it to
1947 replace setting tinsn->record_fix fields.
1948 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
1949 and vinsn_to_insnbuf. Remove references to record_fix and
1950 slot_sub_symbols fields.
1951 (xtensa_mark_narrow_branches): Delete unused code.
1952 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
1954 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
1956 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
1957 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
1958 of the record_fix field. Simplify error messages for unexpected
1960 (set_expr_symbol_offset_diff): Delete.
1962 2006-01-31 Paul Brook <paul@codesourcery.com>
1964 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
1966 2006-01-31 Paul Brook <paul@codesourcery.com>
1967 Richard Earnshaw <rearnsha@arm.com>
1969 * config/tc-arm.c: Use arm_feature_set.
1970 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
1971 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
1972 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
1975 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
1976 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
1977 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
1978 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
1980 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
1981 (arm_opts): Move old cpu/arch options from here...
1982 (arm_legacy_opts): ... to here.
1983 (md_parse_option): Search arm_legacy_opts.
1984 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
1985 (arm_float_abis, arm_eabis): Make const.
1987 2006-01-25 Bob Wilson <bob.wilson@acm.org>
1989 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
1991 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1993 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
1994 in load immediate intruction.
1996 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1998 * config/bfin-parse.y (value_match): Use correct conversion
1999 specifications in template string for __FILE__ and __LINE__.
2003 2006-01-18 Alexandre Oliva <aoliva@redhat.com>
2005 Introduce TLS descriptors for i386 and x86_64.
2006 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
2007 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
2008 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
2009 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
2010 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
2012 (build_modrm_byte): Set up zero modrm for TLS desc calls.
2013 (lex_got): Handle @tlsdesc and @tlscall.
2014 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
2016 2006-01-11 Nick Clifton <nickc@redhat.com>
2018 Fixes for building on 64-bit hosts:
2019 * config/tc-avr.c (mod_index): New union to allow conversion
2020 between pointers and integers.
2021 (md_begin, avr_ldi_expression): Use it.
2022 * config/tc-i370.c (md_assemble): Add cast for argument to print
2024 * config/tc-tic54x.c (subsym_substitute): Likewise.
2025 * config/tc-mn10200.c (md_assemble): Use a union to convert the
2026 opindex field of fr_cgen structure into a pointer so that it can
2027 be stored in a frag.
2028 * config/tc-mn10300.c (md_assemble): Likewise.
2029 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
2031 * config/tc-v850.c: Replace uses of (int) casts with correct
2034 2006-01-09 H.J. Lu <hongjiu.lu@intel.com>
2037 * symbols.c (snapshot_symbol): Don't change a defined symbol.
2039 2006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
2042 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
2043 a local-label reference.
2045 For older changes see ChangeLog-2005
2051 version-control: never
projects / deliverable / binutils-gdb.git / blob