* config/tc-m68hc11.c (md_assemble): Quiet warning.
[deliverable/binutils-gdb.git] / gas / ChangeLog
1 2006-10-23 Alan Modra <amodra@bigpond.net.au>
2
3 * config/tc-m68hc11.c (md_assemble): Quiet warning.
4
5 2006-10-19 Mike Frysinger <vapier@gentoo.org>
6
7 * config/tc-i386.c (md_parse_option): Use CONST_STRNEQ.
8 (x86_64_section_letter): Likewise.
9
10 2006-10-19 Mei Ligang <ligang@sunnorth.com.cn>
11
12 * config/tc-score.c (build_relax_frag): Compute correct
13 tc_frag_data.fixp.
14
15 2006-10-18 Roy Marples <uberlord@gentoo.org>
16
17 * config/tc-sparc.c (md_parse_option): Treat any target starting with
18 elf32-sparc as a viable target for the -32 switch and any target starting with
19 elf64-sparc as a viable target for the -64 switch.
20 (sparc_target_format): For 64-bit ELF flavoured output use ELF_TARGET_FORMAT64
21 while for 32-bit ELF flavoured output use ELF_TARGET_FORMAT.
22 * config/tc-sparc.h (ELF_TARGET_FORMAT, ELF_TARGET_FORMAT64): Define.
23
24 2006-10-17 H.J. Lu <hongjiu.lu@intel.com>
25
26 * configure: Regenerated.
27
28 2006-10-16 Bernd Schmidt <bernd.schmidt@analog.com>
29
30 * input-scrub.c (input_scrub_next_buffer): Use TC_EOL_IN_INSN
31 in addition to testing for '\n'.
32 (TC_EOL_IN_INSN): Provide a default definition if necessary.
33
34 2006-10-13 Sterling Augstine <sterling@tensilica.com>
35
36 * dwarf2dbg.c (out_debug_info): Use TC_DWARF2_EMIT_OFFSET to emit
37 a disjoint DW_AT range.
38
39 2006-10-13 Mei Ligang <ligang@sunnorth.com.cn>
40
41 * config/tc-score.c (md_show_usage): Print -KPIC option usage.
42
43 2006-10-08 Paul Brook <paul@codesourcery.com>
44
45 * config/tc-arm.c (parse_big_immediate): 64-bit host fix.
46 (parse_operands): Use parse_big_immediate for OP_NILO.
47 (neon_cmode_for_logic_imm): Try smaller element sizes.
48 (neon_cmode_for_move_imm): Ditto.
49 (do_neon_logic): Handle .i64 pseudo-op.
50
51 2006-09-29 Alan Modra <amodra@bigpond.net.au>
52
53 * po/POTFILES.in: Regenerate.
54
55 2006-09-28 H.J. Lu <hongjiu.lu@intel.com>
56
57 * config/tc-i386.h (CpuMNI): Renamed to ...
58 (CpuSSSE3): This.
59 (CpuUnknownFlags): Updated.
60 (processor_type): Replace PROCESSOR_YONAH with PROCESSOR_CORE
61 and PROCESSOR_MEROM with PROCESSOR_CORE2.
62 * config/tc-i386.c: Updated.
63 * doc/c-i386.texi: Likewise.
64
65 * config/tc-i386.c (cpu_arch): Add ".ssse3", "core" and "core2".
66
67 2006-09-28 Bridge Wu <mingqiao.wu@gmail.com>
68
69 * config/tc-arm.c (md_apply_fix): Do not clear write_back bit.
70
71 2006-09-27 Nick Clifton <nickc@redhat.com>
72
73 * output-file.c (output_file_close): Prevent an infinite loop
74 reporting that stdoutput could not be closed.
75
76 2006-09-26 Mark Shinwell <shinwell@codesourcery.com>
77 Joseph Myers <joseph@codesourcery.com>
78 Ian Lance Taylor <ian@wasabisystems.com>
79 Ben Elliston <bje@wasabisystems.com>
80
81 * config/tc-arm.c (arm_cext_iwmmxt2): New.
82 (enum operand_parse_code): New code OP_RIWR_I32z.
83 (parse_operands): Handle OP_RIWR_I32z.
84 (do_iwmmxt_wmerge): New function.
85 (do_iwmmxt_wldstd): Handle iwmmxt2 case where second operand is
86 a register.
87 (do_iwmmxt_wrwrwr_or_imm5): New function.
88 (insns): Mark instructions as RIWR_I32z as appropriate.
89 Also add torvsc<b,h,w>, wabs<b,h,w>, wabsdiff<b,h,w>,
90 waddbhus<l,m>, waddhc, waddwc, waddsubhx, wavg4{r}, wmaddu{x,n},
91 wmadds{x,n}, wmerge, wmiaxy{n}, wmiawxy{n}, wmul<sm,um>{r},
92 wmulw<um,sm,l>{r}, wqmiaxy{n}, wqmulm{r}, wqmulwm{r}, wsubaddhx.
93 (md_begin): Handle IWMMXT2.
94 (arm_cpus): Add iwmmxt2.
95 (arm_extensions): Likewise.
96 (arm_archs): Likewise.
97
98 2006-09-25 Bob Wilson <bob.wilson@acm.org>
99
100 * doc/as.texinfo (Overview): Revise description of --keep-locals.
101 Add xref to "Symbol Names".
102 (L): Refer to "local symbols" instead of "local labels". Move
103 definition to "Symbol Names" section; add xref to that section.
104 (Symbol Names): Use "Local Symbol Names" section to define local
105 symbols. Add "Local Labels" heading for description of temporary
106 forward/backward labels, and refer to those as "local labels".
107
108 2006-09-23 H.J. Lu <hongjiu.lu@intel.com>
109
110 PR binutils/3235
111 * config/tc-i386.c (match_template): Check address size prefix
112 to turn Disp64/Disp32/Disp16 operand into Disp32/Disp16/Disp32
113 operand.
114
115 2006-09-22 Alan Modra <amodra@bigpond.net.au>
116
117 * config/tc-ppc.c (ppc_symbol_chars): Remove '+' and '-'.
118
119 2006-09-22 Alan Modra <amodra@bigpond.net.au>
120
121 * as.h (as_perror): Delete declaration.
122 * gdbinit.in (as_perror): Delete breakpoint.
123 * messages.c (as_perror): Delete function.
124 * doc/internals.texi: Remove as_perror description.
125 * listing.c (listing_print: Don't use as_perror.
126 * output-file.c (output_file_create, output_file_close): Likewise.
127 * symbols.c (symbol_create, symbol_clone): Likewise.
128 * write.c (write_contents): Likewise.
129 * config/obj-som.c (obj_som_version, obj_som_copyright): Likewise.
130 * config/tc-tic54x.c (tic54x_mlib): Likewise.
131
132 2006-09-22 Alan Modra <amodra@bigpond.net.au>
133
134 * config/tc-ppc.c (md_section_align): Don't round up address for ELF.
135 (ppc_handle_align): New function.
136 * config/tc-ppc.h (HANDLE_ALIGN): Use ppc_handle_align.
137 (SUB_SEGMENT_ALIGN): Define as zero.
138
139 2006-09-20 Bob Wilson <bob.wilson@acm.org>
140
141 * doc/as.texinfo: Fix cross reference usage, typos and grammar.
142 (Overview): Skip cross reference in man page.
143
144 2006-09-20 Kai Tietz <Kai.Tietz@onevision.com>
145
146 * configure.in: Add new target x86_64-pc-mingw64.
147 * configure: Regenerate.
148 * configure.tgt: Add new target x86_64-pc-mingw64.
149 * config/obj-coff.h: Add handling for TE_PEP target specific code and definitions.
150 * config/tc-i386.c: Add new targets.
151 (md_parse_option): Add targets to OPTION_64.
152 (x86_64_target_format): Add new method for setup proper default target cpu mode.
153 * config/te-pep.h: Add new target definition header.
154 (TE_PEP): New macro: Identifies new target architecture.
155 (COFF_WITH_pex64): Set proper includes in bfd.
156 * NEWS: Mention new target.
157
158 2006-09-18 Bernd Schmidt <bernd.schmidt@analog.com>
159
160 * config/bfin-parse.y (binary): Change sub of const to add of negated
161 const.
162
163 2006-09-17 Mei Ligang <ligang@sunnorth.com.cn>
164
165 * config/tc-score.c: New file.
166 * config/tc-score.h: Newf file.
167 * configure.tgt: Add Score target.
168 * Makefile.am: Add Score files.
169 * Makefile.in: Regenerate.
170 * NEWS: Mention new target support.
171
172 2006-09-16 Paul Brook <paul@codesourcery.com>
173
174 * config/tc-arm.c (s_arm_unwind_movsp): Add offset argument.
175 * doc/c-arm.texi (movsp): Document offset argument.
176
177 2006-09-16 Paul Brook <paul@codesourcery.com>
178
179 * config/tc-arm.c (thumb32_negate_data_op): Consistently use
180 unsigned int to avoid 64-bit host problems.
181
182 2006-09-15 Bernd Schmidt <bernd.schmidt@analog.com>
183
184 * config/bfin-parse.y (binary): Do some more constant folding for
185 additions.
186
187 2006-09-13 Jan Beulich <jbeulich@novell.com>
188
189 * input-file.c (input_file_give_next_buffer): Demote as_bad to
190 as_warn.
191
192 2006-09-13 Alan Modra <amodra@bigpond.net.au>
193
194 PR gas/3165
195 * config/tc-sh (DWARF2_CIE_DATA_ALIGNMENT): Wrap negative number
196 in parens.
197
198 2006-09-13 Alan Modra <amodra@bigpond.net.au>
199
200 * input-file.c (input_file_open): Replace as_perror with as_bad
201 so that gas exits with error on file errors. Correct error
202 message.
203 (input_file_get, input_file_give_next_buffer): Likewise.
204 * input-file.h: Update comment.
205
206 2006-09-11 Tomas Frydrych <dr.tomas@yahoo.co.uk>
207
208 PR gas/3172
209 * config/tc-arm.c (parse_typed_reg_or_scalar): Accept wCg class
210 registers as a sub-class of wC registers.
211
212 2006-09-11 Alan Modra <amodra@bigpond.net.au>
213
214 PR gas/3165
215 * config/tc-mips.h (enum dwarf2_format): Forward declare.
216 (DWARF2_CIE_DATA_ALIGNMENT): Wrap negative number in parens.
217 * config/tc-alpha.h (DWARF2_CIE_DATA_ALIGNMENT): Likewise.
218 * config/tc-arm.h (DWARF2_CIE_DATA_ALIGNMENT): Likewise.
219
220 2006-09-08 Nick Clifton <nickc@redhat.com>
221
222 PR gas/3129
223 * doc/as.texinfo (Macro): Improve documentation about separating
224 macro arguments from following text.
225
226 2006-09-08 Paul Brook <paul@codesourcery.com>
227
228 * config/tc-arm.c (insns): Allow ARM IT pseudo-insn on all cores.
229
230 2006-09-07 Paul Brook <paul@codesourcery.com>
231
232 * config/tc-arm.c (parse_operands): Mark operand as present.
233
234 2006-09-04 Paul Brook <paul@codesourcery.com>
235
236 * config/tc-arm.c (do_neon_dyadic_if_i): Remove.
237 (do_neon_dyadic_if_i_d): Avoid setting U bit.
238 (do_neon_mac_maybe_scalar): Ditto.
239 (do_neon_dyadic_narrow): Force operand type to NT_integer.
240 (insns): Remove out of date comments.
241
242 2006-08-29 Nick Clifton <nickc@redhat.com>
243
244 * read.c (s_align): Initialize the 'stopc' variable to prevent
245 compiler complaints about it being used without being
246 initialized.
247 (s_comm_internal, s_mri_common, s_fail, s_globl, s_space,
248 s_float_space, s_struct, cons_worker, equals): Likewise.
249
250 2006-08-29 Malcolm Parsons <malcolm.parsons@gmail.com>
251
252 * ecoff.c (ecoff_directive_val): Fix message typo.
253 * config/tc-ns32k.c (convert_iif): Likewise.
254 * config/tc-sh64.c (shmedia_check_limits): Likewise.
255
256 2006-08-25 Sterling Augustine <sterling@tensilica.com>
257 Bob Wilson <bob.wilson@acm.org>
258
259 * config/tc-xtensa.c (xtensa_mark_literal_pool_location): Do not check
260 the state of the absolute_literals directive. Remove align frag at
261 the start of the literal pool position.
262
263 2006-08-25 Bob Wilson <bob.wilson@acm.org>
264
265 * doc/c-xtensa.texi: Add @group commands in examples.
266
267 2006-08-24 Bob Wilson <bob.wilson@acm.org>
268
269 * config/tc-xtensa.c (FINI_LITERAL_SECTION_NAME): Delete.
270 (INIT_LITERAL_SECTION_NAME): Delete.
271 (lit_state struct): Remove segment names, init_lit_seg, and
272 fini_lit_seg. Add lit_prefix and current_text_seg.
273 (init_literal_head_h, init_literal_head): Delete.
274 (fini_literal_head_h, fini_literal_head): Delete.
275 (xtensa_begin_directive): Move argument parsing to
276 xtensa_literal_prefix function.
277 (xtensa_end_directive): Deallocate lit_prefix field of lit_state.
278 (xtensa_literal_prefix): Parse the directive argument here and
279 record it in the lit_prefix field. Remove code to derive literal
280 section names.
281 (linkonce_len): New.
282 (get_is_linkonce_section): Use linkonce_len. Check for any
283 ".gnu.linkonce.*" section, not just text sections.
284 (md_begin): Remove initialization of deleted lit_state fields.
285 (xtensa_reorder_segments, xtensa_post_relax_hook): Remove references
286 to init_literal_head and fini_literal_head.
287 (xtensa_move_literals): Likewise. Skip literals for .init and .fini
288 when traversing literal_head list.
289 (match_section_group): New.
290 (cache_literal_section): Rewrite to determine the literal section
291 name on the fly, create the section and return it.
292 (xtensa_switch_to_literal_fragment): Adjust for cache_literal_section.
293 (xtensa_switch_to_non_abs_literal_fragment): Likewise.
294 (xtensa_create_property_segments, xtensa_create_xproperty_segments):
295 Use xtensa_get_property_section from bfd.
296 (retrieve_xtensa_section): Delete.
297 * doc/c-xtensa.texi (Xtensa Options): Fix --text-section-literals
298 description to refer to plural literal sections and add xref to
299 the Literal Directive section.
300 (Literal Directive): Describe new rules for deriving literal section
301 names. Add footnote for special case of .init/.fini with
302 --text-section-literals.
303 (Literal Prefix Directive): Replace old naming rules with xref to the
304 Literal Directive section.
305
306 2006-08-21 Joseph Myers <joseph@codesourcery.com>
307
308 * config/tc-arm.c (s_arm_unwind_save_mmxwr): Correct condition for
309 merging with previous long opcode.
310
311 2006-08-22 Pedro Alves <pedro_alves@portugalmail.pt>
312
313 * Makefile.am (TARG_ENV_HFILES): Add te-wince-pe.h.
314 * Makefile.in: Regenerate.
315 * config/tc-arm.h [TARGET_FORMAT]: ARM wince bfd names were
316 renamed. Adjust.
317
318 2006-08-16 Julian Brown <julian@codesourcery.com>
319
320 * config/tc-arm.c (md_assemble): Improve diagnostic when attempting
321 to use ARM instructions on non-ARM-supporting cores.
322 (autoselect_thumb_from_cpu_variant): New function. Switch on Thumb
323 mode automatically based on cpu variant.
324 (md_begin): Call above function.
325
326 2006-08-16 Julian Brown <julian@codesourcery.com>
327
328 * config/tc-arm.c (opcode_lookup): Allow Neon type suffixes to be
329 recognized in non-unified syntax mode.
330
331 2006-08-15 Thiemo Seufer <ths@mips.com>
332 Nigel Stephens <nigel@mips.com>
333 David Ung <davidu@mips.com>
334
335 * configure.tgt: Handle mips*-sde-elf*.
336
337 2006-08-12 Thiemo Seufer <ths@networkno.de>
338
339 * config/tc-mips.c (mips16_ip): Fix argument register handling
340 for restore instruction.
341
342 2006-08-08 Bob Wilson <bob.wilson@acm.org>
343
344 * dwarf2dbg.c (DWARF2_USE_FIXED_ADVANCE_PC): New.
345 (out_sleb128): New.
346 (out_fixed_inc_line_addr): New.
347 (process_entries): Use out_fixed_inc_line_addr when
348 DWARF2_USE_FIXED_ADVANCE_PC is set.
349 * config/tc-xtensa.h (DWARF2_USE_FIXED_ADVANCE_PC): Define.
350
351 2006-08-08 DJ Delorie <dj@redhat.com>
352
353 * config/tc-sh.c (sh_frob_section): Canonicalize pointers to local
354 vs full symbols so that we never have more than one pointer value
355 for any given symbol in our symbol table.
356
357 2006-08-08 Sterling Augustine <sterling@tensilica.com>
358
359 * dwarf2dbg.c (out_debug_info): Add new parameter ranges_seg
360 and emit DW_AT_ranges when code in compilation unit is not
361 contiguous.
362 (out_debug_abbrev): Emit DW_AT_ranges abbreviation if code in
363 is not contiguous.
364 (dwarf2_finish): Create and pass ranges_seg to out_debug_info.
365 (out_debug_ranges): New function to emit .debug_ranges section
366 when code is not contiguous.
367
368 2006-08-08 Nick Clifton <nickc@redhat.com>
369
370 * config/tc-arm.c (WARN_DEPRECATED): Enable.
371
372 2006-08-05 Pedro Alves <pedro_alves@portugalmail.pt>
373
374 * config/tc-arm.c: Move "dwarf2dbg.h" inclusion out of OBJ_ELF
375 only block.
376 (pe_directive_secrel) [TE_PE]: New function.
377 (md_pseudo_table) [!OBJ_ELF]: Handle 2byte, 4byte, 8byte, file,
378 loc, loc_mark_labels.
379 [TE_PE]: Handle secrel32.
380 (output_relax_insn): Remove OBJ_ELF around dwarf2_emit_insn
381 call.
382 (output_inst): Remove OBJ_ELF around dwarf2_emit_insn call.
383 (arm_frob_label): Remove OBJ_ELF around dwarf2_emit_label call.
384 (md_section_align): Only round section sizes here for AOUT
385 targets.
386 (tc_arm_regname_to_dw2regnum): Move out for OBJ_ELF only block.
387 (tc_pe_dwarf2_emit_offset): New function.
388 (md_apply_fix) [TE_PE]: Handle BFD_RELOC_32_SECREL.
389 (cons_fix_new_arm): Handle O_secrel.
390 * config/tc-arm.h : Move DWARF2_LINE_MIN_INSN_LENGTH,
391 DWARF2_DEFAULT_RETURN_COLUMN and DWARF2_CIE_DATA_ALIGNMENT out
392 of OBJ_ELF only block.
393 [TE_PE]: Define O_secrel, TC_DWARF2_EMIT_OFFSET, and declare
394 tc_pe_dwarf2_emit_offset.
395
396 2006-08-04 Richard Sandiford <richard@codesourcery.com>
397
398 * config/tc-sh.c (apply_full_field_fix): New function.
399 (md_apply_fix): Use it instead of md_number_to_chars. Do not fill
400 in fx_addnumber for BFD_RELOC_32_PLT_PCREL.
401 (tc_gen_reloc): Use fx_addnumber rather than 0 as the default case.
402 * config/tc-sh.h (TARGET_FORMAT): Override for TE_VXWORKS.
403
404 2006-08-03 Nick Clifton <nickc@redhat.com>
405
406 PR gas/2991
407 * config.in: Regenerate.
408
409 2006-08-03 Joseph Myers <joseph@codesourcery.com>
410
411 * config/tc-arm.c (parse_operands): Handle invalid register name
412 for OP_RIWR_RIWC.
413
414 2006-08-03 Joseph Myers <joseph@codesourcery.com>
415
416 * config/tc-arm.c (enum operand_parse_code): Add OP_RIWC_RIWG.
417 (parse_operands): Handle it.
418 (insns): Use it for tmcr and tmrc.
419
420 2006-08-02 Petr Salinger <Petr.Salinger@seznam.cz>
421
422 PR binutils/2983
423 * config/tc-i386.c (md_parse_option): Treat any target starting
424 with elf64_x86_64 as a viable target for the -64 switch.
425 (i386_target_format): For 64-bit ELF flavoured output use
426 ELF_TARGET_FORMAT64.
427 * config/tc-i386.h (ELF_TARGET_FORMAT64): Define.
428
429 2006-08-02 Nick Clifton <nickc@redhat.com>
430
431 PR gas/2991
432 * acinclude.m4 (BFD_BINARY_FOPEN): Import this function from
433 bfd/aclocal.m4.
434 * configure.in: Run BFD_BINARY_FOPEN.
435 * configure: Regenerate.
436 * as.h: Look at USE_BINARY_FOPEN to decide which fopen-*.h header
437 file to include.
438
439 2006-08-01 H.J. Lu <hongjiu.lu@intel.com>
440
441 * config/tc-i386.c (md_assemble): Don't update
442 cpu_arch_isa_flags.
443
444 2006-08-01 Thiemo Seufer <ths@mips.com>
445
446 * config/tc-mips.c (md_section_align): Check ELF-ness at runtime.
447
448 2006-08-01 Thiemo Seufer <ths@mips.com>
449
450 * config/tc-mips.c (macro_build_lui): Fix comment formatting.
451 (md_apply_fix): Likewise. Unify handling of BFD_RELOC_RVA,
452 BFD_RELOC_32 and BFD_RELOC_16.
453 (s_align, s_cpload, s_cplocal, s_cprestore, s_mips_stab,
454 md_convert_frag, md_obj_end): Fix comment formatting.
455
456 2006-07-31 Thiemo Seufer <ths@mips.com>
457
458 * config/tc-mips.c (md_apply_fix, tc_gen_reloc): Remove special
459 handling for BFD_RELOC_MIPS16_JMP.
460
461 2006-07-24 Andreas Schwab <schwab@suse.de>
462
463 PR/2756
464 * read.c (read_a_source_file): Ignore unknown text after line
465 comment character. Fix misleading comment.
466
467 2006-07-24 Ralk Wildenhues <Ralf.Wildenhues@gmx.de>
468
469 * doc/all.texi, doc/as.texinfo, doc/c-arc.texi, doc/c-arm.texi,
470 doc/c-avr.texi, doc/c-bfin.texi, doc/c-i386.texi,
471 doc/c-i960.texi, doc/c-m32r.texi, doc/c-m68k.texi,
472 doc/c-mmix.texi, doc/c-pdp11.texi, doc/c-ppc.texi,
473 doc/c-tic54x.texi, doc/c-v850.texi, doc/c-xtensa.texi,
474 doc/c-z80.texi, doc/internals.texi: Fix some typos.
475
476 2006-07-21 Nick Clifton <nickc@redhat.com>
477
478 * config/tc-sh.c (md_longopts): Add -EL and -EB for use by the
479 linker testsuite.
480
481 2006-07-20 Thiemo Seufer <ths@mips.com>
482 Nigel Stephens <nigel@mips.com>
483
484 * config/tc-mips.c (md_parse_option): Don't infer optimisation
485 options from debug options.
486
487 2006-07-20 Thiemo Seufer <ths@mips.com>
488
489 * config/tc-mips.c (mips_fix_adjustable): Handle BFD_RELOC_MIPS16_JMP.
490 (tc_gen_reloc): Handle mips16 jumps to section symbol offsets.
491
492 2006-07-19 Paul Brook <paul@codesourcery.com>
493
494 * config/tc-arm.c (insns): Fix rbit Arm opcode.
495
496 2006-07-18 Paul Brook <paul@codesourcery.com>
497
498 * tc-arm.c (do_t_add_sub): Use addw/subw when source is PC.
499 (md_convert_frag): Use correct reloc for add_pc. Use
500 BFD_RELOC_ARM_T32_ADD_IMM for normal add/sum.
501 (md_apply_fix): Handle BFD_RELOC_ARM_T32_ADD_IMM.
502 (arm_force_relocation): Handle BFD_RELOC_ARM_T32_ADD_IMM.
503
504 2006-07-17 Mat Hostetter <mat@lcs.mit.edu>
505
506 * symbols.c (report_op_error): Fix pasto. Don't use as_bad_where
507 when file and line unknown.
508
509 2006-07-17 Thiemo Seufer <ths@mips.com>
510
511 * read.c (s_struct): Use IS_ELF.
512 * config/tc-mips.c (md_begin, mips16_mark_labels, mips_ip,
513 md_parse_option, s_change_sec, pic_need_relax, mips_fix_adjustable,
514 tc_gen_reloc, mips_frob_file_after_relocs, s_mips_end, s_mips_frame,
515 s_mips_mask): Likewise.
516
517 2006-07-16 Thiemo Seufer <ths@mips.com>
518 David Ung <davidu@mips.com>
519
520 * read.c (s_struct): Handle ELF section changing.
521 * config/tc-mips.c (s_align): Leave enabling auto-align to the
522 generic code.
523 (s_change_sec): Try section changing only if we output ELF.
524
525 2006-07-15 H.J. Lu <hongjiu.lu@intel.com>
526
527 * config/tc-i386.c (cpu_arch): Remove Cpu086, CpuAthlon and
528 CpuAmdFam10.
529 (smallest_imm_type): Remove Cpu086.
530 (i386_target_format): Likewise.
531
532 * config/tc-i386.h: Remove Cpu086, CpuAthlon and CpuAmdFam10.
533 Update CpuXXX.
534
535 2006-07-13 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
536 Michael Meissner <michael.meissner@amd.com>
537
538 * config/tc-i386.h (PROCESSOR_AMDFAM10): New processor_type.
539 (CpuSSE4a, CpuABM, CpuAmdFam10): New Cpu directives.
540 * config/tc-i386.c (cpu_arch): Add support for AmdFam10
541 architecture.
542 (i386_align_code): Ditto.
543 (md_assemble_code): Add support for insertq/extrq instructions,
544 swapping as needed for intel syntax.
545 (swap_imm_operands): New function to swap immediate operands.
546 (swap_operands): Deal with 4 operand instructions.
547 (build_modrm_byte): Add support for insertq instruction.
548
549 2006-07-13 H.J. Lu <hongjiu.lu@intel.com>
550
551 * config/tc-i386.h (Size64): Fix a typo in comment.
552
553 2006-07-12 Nick Clifton <nickc@redhat.com>
554
555 * config/tc-sh.c (md_apply_fix): Do not allow the generic code in
556 fixup_segment() to repeat a range check on a value that has
557 already been checked here.
558
559 2006-07-07 James E Wilson <wilson@specifix.com>
560
561 * config/tc-mips.c (mips_cpu_info_table): Add sb1a.
562
563 2006-07-06 Mohammed Adnène Trojette <adn@diwi.org>
564 Nick Clifton <nickc@redhat.com>
565
566 PR binutils/2877
567 * doc/as.texi: Fix spelling typo: branchs => branches.
568 * doc/c-m68hc11.texi: Likewise.
569 * config/tc-m68hc11.c: Likewise.
570 Support old spelling of command line switch for backwards
571 compatibility.
572
573 2006-07-04 Thiemo Seufer <ths@mips.com>
574 David Ung <davidu@mips.com>
575
576 * config/tc-mips.c (s_is_linkonce): New function.
577 (mips16_mark_labels): Don't adjust mips16 symbol addresses for
578 weak, external, and linkonce symbols.
579 (pic_need_relax): Use s_is_linkonce.
580
581 2006-06-24 H.J. Lu <hongjiu.lu@intel.com>
582
583 * doc/as.texinfo (Org): Remove space.
584 (P2align): Add "@var{abs-expr},".
585
586 2006-06-23 H.J. Lu <hongjiu.lu@intel.com>
587
588 * config/tc-i386.c (cpu_arch_tune_set): New.
589 (cpu_arch_isa): Likewise.
590 (i386_align_code): Use xchg %ax,%ax for 2 byte nop. Optimize
591 nops with short or long nop sequences based on -march=/.arch
592 and -mtune=.
593 (set_cpu_arch): Set cpu_arch_isa. If cpu_arch_tune_set is 0,
594 set cpu_arch_tune and cpu_arch_tune_flags.
595 (md_parse_option): For -march=, set cpu_arch_isa and set
596 cpu_arch_tune and cpu_arch_tune_flags if cpu_arch_tune_set is
597 0. Set cpu_arch_tune_set to 1 for -mtune=.
598 (i386_target_format): Don't set cpu_arch_tune.
599
600 2006-06-23 Nigel Stephens <nigel@mips.com>
601
602 * config/tc-mips.c (nopic_need_relax): Handle -fdata-sections
603 generated .sbss.* and .gnu.linkonce.sb.*.
604
605 2006-06-23 Thiemo Seufer <ths@mips.com>
606 David Ung <davidu@mips.com>
607
608 * config/tc-mips.h (TC_SEGMENT_INFO_TYPE): Declare per-segment
609 label_list.
610 * config/tc-mips.c (label_list): Define per-segment label_list.
611 (mips_clear_insn_labels, mips_move_labels, mips16_mark_labels,
612 append_insn, s_align, s_cons, s_float_cons, s_gpword, s_gpdword,
613 mips_from_file_after_relocs, mips_define_label): Use per-segment
614 label_list.
615
616 2006-06-22 Thiemo Seufer <ths@mips.com>
617
618 * config/tc-mips.c (ISA_SUPPORTS_MIPS16E): New macro.
619 (append_insn): Use it.
620 (md_apply_fix): Whitespace formatting.
621 (md_begin, append_insn, macro, macro2, mips16_immed, mips_align,
622 mips16_extended_frag): Remove register specifier.
623 (md_convert_frag): Likewise. Use TRUE ans FALSE instead of numeric
624 constants.
625
626 2006-06-21 Mark Shinwell <shinwell@codesourcery.com>
627
628 * config/tc-arm.c (s_arm_unwind_save_vfp_armv6): New. Parse
629 a directive saving VFP registers for ARMv6 or later.
630 (s_arm_unwind_save): Add parameter arch_v6 and call
631 s_arm_unwind_save_vfp or s_arm_unwind_save_vfp_armv6 as
632 appropriate.
633 (md_pseudo_table): Add entry for new "vsave" directive.
634 * doc/c-arm.texi: Correct error in example for "save"
635 directive (fstmdf -> fstmdx). Also document "vsave" directive.
636
637 2006-06-18 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
638 Anatoly Sokolov <aesok@post.ru>
639
640 * config/tc-avr.c (mcu_types): Add support for atmega165p, atmega169p
641 and atmega644p devices. Rename atmega164/atmega324 devices to
642 atmega164p/atmega324p.
643 * doc/c-avr.texi: Document new mcu and arch options.
644
645 2006-06-17 Nick Clifton <nickc@redhat.com>
646
647 * config/tc-arm.c (enum parse_operand_result): Move outside of
648 #ifdef OBJ_ELF so that non-ELF targeted ARM ports can build.
649
650 2006-06-16 H.J. Lu <hongjiu.lu@intel.com>
651
652 * config/tc-i386.h (processor_type): New.
653 (arch_entry): Add type.
654
655 * config/tc-i386.c (cpu_arch_tune): New.
656 (cpu_arch_tune_flags): Likewise.
657 (cpu_arch_isa_flags): Likewise.
658 (cpu_arch): Updated.
659 (set_cpu_arch): Also update cpu_arch_isa_flags.
660 (md_assemble): Update cpu_arch_isa_flags.
661 (OPTION_MARCH): New.
662 (OPTION_MTUNE): Likewise.
663 (md_longopts): Add -march= and -mtune=.
664 (md_parse_option): Support -march= and -mtune=.
665 (md_show_usage): Add -march=CPU/-mtune=CPU.
666 (i386_target_format): Also update cpu_arch_isa_flags,
667 cpu_arch_tune and cpu_arch_tune_flags.
668
669 * doc/as.texinfo: Add -march=CPU/-mtune=CPU.
670
671 * doc/c-i386.texi: Document -march=CPU/-mtune=CPU.
672
673 2006-06-15 Mark Shinwell <shinwell@codesourcery.com>
674
675 * config/tc-arm.c (enum parse_operand_result): New.
676 (struct group_reloc_table_entry): New.
677 (enum group_reloc_type): New.
678 (group_reloc_table): New array.
679 (find_group_reloc_table_entry): New function.
680 (parse_shifter_operand_group_reloc): New function.
681 (parse_address_main): New function, incorporating code
682 from the old parse_address function. To be used via...
683 (parse_address): wrapper for parse_address_main; and
684 (parse_address_group_reloc): new function, likewise.
685 (enum operand_parse_code): New codes OP_SHG, OP_ADDRGLDR,
686 OP_ADDRGLDRS, OP_ADDRGLDC.
687 (parse_operands): Support for these new operand codes.
688 New macro po_misc_or_fail_no_backtrack.
689 (encode_arm_cp_address): Preserve group relocations.
690 (insns): Modify to use the above operand codes where group
691 relocations are permitted.
692 (md_apply_fix): Handle the group relocations
693 ALU_PC_G0_NC through LDC_SB_G2.
694 (tc_gen_reloc): Likewise.
695 (arm_force_relocation): Leave group relocations for the linker.
696 (arm_fix_adjustable): Likewise.
697
698 2006-06-15 Julian Brown <julian@codesourcery.com>
699
700 * config/tc-arm.c (do_vfp_nsyn_ldr_str): Remove, fold into...
701 (do_neon_ldr_str): Always defer to VFP encoding routines, which handle
702 relocs properly.
703
704 2006-06-12 H.J. Lu <hongjiu.lu@intel.com>
705
706 * config/tc-i386.c (process_suffix): Don't add rex64 for
707 "xchg %rax,%rax".
708
709 2006-06-09 Thiemo Seufer <ths@mips.com>
710
711 * config/tc-mips.c (mips_ip): Maintain argument count.
712
713 2006-06-09 Alan Modra <amodra@bigpond.net.au>
714
715 * config/tc-iq2000.c: Include sb.h.
716
717 2006-06-08 Nigel Stephens <nigel@mips.com>
718
719 * config/tc-mips.c (mips_pseudo_table): Add "origin" and "repeat"
720 aliases for better compatibility with SGI tools.
721
722 2006-06-08 Alan Modra <amodra@bigpond.net.au>
723
724 * configure.in (BFDLIB, BFDVER_H, ALL_OBJ_DEPS): Delete.
725 * Makefile.am (GASLIBS): Expand @BFDLIB@.
726 (BFDVER_H): Delete.
727 (OBJS): Expand @ALL_OBJ_DEPS@. Depend on all fopen-*.h variants.
728 (obj-aout.o): Depend on $(DEP_@target_get_type@_aout)
729 (obj-coff.o, obj-ecoff.o, obj-elf.o): Similarly.
730 Run "make dep-am".
731 * dep-in.sed: Don't substitute bfdver.h. Do remove symcat.h.
732 * Makefile.in: Regenerate.
733 * doc/Makefile.in: Regenerate.
734 * configure: Regenerate.
735
736 2006-06-07 Joseph S. Myers <joseph@codesourcery.com>
737
738 * po/Make-in (pdf, ps): New dummy targets.
739
740 2006-06-07 Julian Brown <julian@codesourcery.com>
741
742 * config/tc-arm.c (stdarg.h): include.
743 (arm_it): Add uncond_value field. Add isvec and issingle to operand
744 array.
745 (arm_reg_type): Add REG_TYPE_VFSD (single or double VFP reg) and
746 REG_TYPE_NSDQ (single, double or quad vector reg).
747 (reg_expected_msgs): Update.
748 (BAD_FPU): Add macro for unsupported FPU instruction error.
749 (parse_neon_type): Support 'd' as an alias for .f64.
750 (parse_typed_reg_or_scalar): Support REG_TYPE_VFSD, REG_TYPE_NSDQ
751 sets of registers.
752 (parse_vfp_reg_list): Don't update first arg on error.
753 (parse_neon_mov): Support extra syntax for VFP moves.
754 (operand_parse_code): Add OP_RVSD, OP_RNSDQ, OP_VRSDLST, OP_RVSD_IO,
755 OP_RNSDQ_RNSC, OP_RVC_PSR, OP_APSR_RR, OP_oRNSDQ.
756 (parse_operands): Support isvec, issingle operands fields, new parse
757 codes above.
758 (do_vfp_nsyn_mrs, do_vfp_nsyn_msr): New functions. Support VFP mrs,
759 msr variants.
760 (do_mrs, do_msr, do_t_mrs, do_t_msr): Add support for above.
761 (NEON_ENC_TAB): Add vnmul, vnmla, vnmls, vcmp, vcmpz, vcmpe, vcmpez.
762 (NEON_ENC_SINGLE, NEON_ENC_DOUBLE): Define macros.
763 (NEON_SHAPE_DEF): New macro. Define table of possible instruction
764 shapes.
765 (neon_shape): Redefine in terms of above.
766 (neon_shape_class): New enumeration, table of shape classes.
767 (neon_shape_el): New enumeration. One element of a shape.
768 (neon_shape_el_size): Register widths of above, where appropriate.
769 (neon_shape_info): New struct. Info for shape table.
770 (neon_shape_tab): New array.
771 (neon_type_mask): Add N_F64, N_VFP. Update N_MAX_NONSPECIAL.
772 (neon_check_shape): Rewrite as...
773 (neon_select_shape): New function to classify instruction shapes,
774 driven by new table neon_shape_tab array.
775 (neon_quad): New function. Return 1 if shape should set Q flag in
776 instructions (or equivalent), 0 otherwise.
777 (type_chk_of_el_type): Support F64.
778 (el_type_of_type_chk): Likewise.
779 (neon_check_type): Add support for VFP type checking (VFP data
780 elements fill their containing registers).
781 (do_vfp_cond_or_thumb): Fill in condition field in ARM mode, or 0xE
782 in thumb mode for VFP instructions.
783 (do_vfp_nsyn_opcode): New function. Look up the opcode in argument,
784 and encode the current instruction as if it were that opcode.
785 (try_vfp_nsyn): New. If this looks like a VFP instruction with ARGS
786 arguments, call function in PFN.
787 (do_vfp_nsyn_add_sub, do_vfp_nsyn_mla_mls, do_vfp_nsyn_mul)
788 (do_vfp_nsyn_abs_neg, do_vfp_nsyn_ldm_stm, do_vfp_nsyn_ldr_str)
789 (do_vfp_nsyn_sqrt, do_vfp_nsyn_div, do_vfp_nsyn_nmul)
790 (do_vfp_nsyn_cmp, nsyn_insert_sp, do_vfp_nsyn_push)
791 (do_vfp_nsyn_pop, do_vfp_nsyn_cvt, do_vfp_nsyn_cvtz): New functions.
792 Redirect Neon-syntax VFP instructions to VFP instruction handlers.
793 (do_neon_dyadic_i_su, do_neon_dyadic_i64_su, do_neon_shl_imm)
794 (do_neon_qshl_imm, do_neon_logic, do_neon_bitfield)
795 (neon_dyadic_misc, neon_compare, do_neon_tst, do_neon_qdmulh)
796 (do_neon_fcmp_absolute, do_neon_step, do_neon_sli, do_neon_sri)
797 (do_neon_qshlu_imm, neon_move_immediate, do_neon_mvn, do_neon_ext)
798 (do_neon_rev, do_neon_dup, do_neon_rshift_round_imm, do_neon_trn)
799 (do_neon_zip_uzp, do_neon_sat_abs_neg, do_neon_pair_long)
800 (do_neon_recip_est, do_neon_cls, do_neon_clz, do_neon_cnt)
801 (do_neon_swp): Use neon_select_shape not neon_check_shape. Use
802 neon_quad.
803 (vfp_or_neon_is_neon): New function. Call if a mnemonic shared
804 between VFP and Neon turns out to belong to Neon. Perform
805 architecture check and fill in condition field if appropriate.
806 (do_neon_addsub_if_i, do_neon_mac_maybe_scalar, do_neon_abs_neg)
807 (do_neon_cvt): Add support for VFP variants of instructions.
808 (neon_cvt_flavour): Extend to cover VFP conversions.
809 (do_neon_mov): Rewrite to use neon_select_shape. Add support for VFP
810 vmov variants.
811 (do_neon_ldr_str): Handle single-precision VFP load/store.
812 (do_neon_ld_st_interleave, do_neon_ld_st_lane, do_neon_ld_dup): Use
813 NS_NULL not NS_IGNORE.
814 (opcode_tag): Add OT_csuffixF for operands which either take a
815 conditional suffix, or have 0xF in the condition field.
816 (md_assemble): Add support for OT_csuffixF.
817 (NCE): Replace macro with...
818 (NCE_tag, NCE, NCEF): New macros.
819 (nCE): Replace macro with...
820 (nCE_tag, nCE, nCEF): New macros.
821 (insns): Add support for VFP insns or VFP versions of insns msr,
822 mrs, vsqrt, vdiv, vnmul, vnmla, vnmls, vcmp, vcmpe, vpush, vpop,
823 vcvtz, vmul, vmla, vmls, vadd, vsub, vabs, vneg, vldm, vldmia,
824 vldbdb, vstm, vstmia, vstmdb, vldr, vstr, vcvt, vmov. Group shared
825 VFP/Neon insns together.
826
827 2006-06-07 Alan Modra <amodra@bigpond.net.au>
828 Ladislav Michl <ladis@linux-mips.org>
829
830 * app.c: Don't include headers already included by as.h.
831 * as.c: Likewise.
832 * atof-generic.c: Likewise.
833 * cgen.c: Likewise.
834 * dwarf2dbg.c: Likewise.
835 * expr.c: Likewise.
836 * input-file.c: Likewise.
837 * input-scrub.c: Likewise.
838 * macro.c: Likewise.
839 * output-file.c: Likewise.
840 * read.c: Likewise.
841 * sb.c: Likewise.
842 * config/bfin-lex.l: Likewise.
843 * config/obj-coff.h: Likewise.
844 * config/obj-elf.h: Likewise.
845 * config/obj-som.h: Likewise.
846 * config/tc-arc.c: Likewise.
847 * config/tc-arm.c: Likewise.
848 * config/tc-avr.c: Likewise.
849 * config/tc-bfin.c: Likewise.
850 * config/tc-cris.c: Likewise.
851 * config/tc-d10v.c: Likewise.
852 * config/tc-d30v.c: Likewise.
853 * config/tc-dlx.h: Likewise.
854 * config/tc-fr30.c: Likewise.
855 * config/tc-frv.c: Likewise.
856 * config/tc-h8300.c: Likewise.
857 * config/tc-hppa.c: Likewise.
858 * config/tc-i370.c: Likewise.
859 * config/tc-i860.c: Likewise.
860 * config/tc-i960.c: Likewise.
861 * config/tc-ip2k.c: Likewise.
862 * config/tc-iq2000.c: Likewise.
863 * config/tc-m32c.c: Likewise.
864 * config/tc-m32r.c: Likewise.
865 * config/tc-maxq.c: Likewise.
866 * config/tc-mcore.c: Likewise.
867 * config/tc-mips.c: Likewise.
868 * config/tc-mmix.c: Likewise.
869 * config/tc-mn10200.c: Likewise.
870 * config/tc-mn10300.c: Likewise.
871 * config/tc-msp430.c: Likewise.
872 * config/tc-mt.c: Likewise.
873 * config/tc-ns32k.c: Likewise.
874 * config/tc-openrisc.c: Likewise.
875 * config/tc-ppc.c: Likewise.
876 * config/tc-s390.c: Likewise.
877 * config/tc-sh.c: Likewise.
878 * config/tc-sh64.c: Likewise.
879 * config/tc-sparc.c: Likewise.
880 * config/tc-tic30.c: Likewise.
881 * config/tc-tic4x.c: Likewise.
882 * config/tc-tic54x.c: Likewise.
883 * config/tc-v850.c: Likewise.
884 * config/tc-vax.c: Likewise.
885 * config/tc-xc16x.c: Likewise.
886 * config/tc-xstormy16.c: Likewise.
887 * config/tc-xtensa.c: Likewise.
888 * config/tc-z80.c: Likewise.
889 * config/tc-z8k.c: Likewise.
890 * macro.h: Don't include sb.h or ansidecl.h.
891 * sb.h: Don't include stdio.h or ansidecl.h.
892 * cond.c: Include sb.h.
893 * itbl-lex.l: Include as.h instead of other system headers.
894 * itbl-parse.y: Likewise.
895 * itbl-ops.c: Similarly.
896 * itbl-ops.h: Don't include as.h or ansidecl.h.
897 * config/bfin-defs.h: Don't include bfd.h or as.h.
898 * config/bfin-parse.y: Include as.h instead of other system headers.
899
900 2006-06-06 Ben Elliston <bje@au.ibm.com>
901 Anton Blanchard <anton@samba.org>
902
903 * config/tc-ppc.c (parse_cpu): Handle "-mpower6".
904 (md_show_usage): Document it.
905 (ppc_setup_opcodes): Test power6 opcode flag bits.
906 * doc/c-ppc.texi (PowerPC-Opts): Document "-mpower6".
907
908 2006-06-06 Thiemo Seufer <ths@mips.com>
909 Chao-ying Fu <fu@mips.com>
910
911 * config/tc-mips.c (ISA_SUPPORTS_DSP64): New macro.
912 (CPU_HAS_MIPS3D, CPU_HAS_MDMX, CPU_HAS_DSP, CPU_HAS_MT): Delete.
913 (macro_build): Update comment.
914 (mips_ip): Allow DSP64 instructions for MIPS64R2.
915 (mips_after_parse_args): Remove uses of CPU_HAS_MIPS3D and
916 CPU_HAS_MDMX.
917 (mips_cpu_info): Fix formatting. Add MIPS_CPU_ASE_MIPS3D and
918 MIPS_CPU_ASE_MDMX flags for sb1.
919
920 2006-06-05 Thiemo Seufer <ths@mips.com>
921
922 * config/tc-mips.c (macro_build): Use INSERT_OPERAND wherew
923 appropriate.
924 (mips16_macro_build): Use MIPS16_INSERT_OPERAND where appropriate.
925 (mips_ip): Make overflowed/underflowed constant arguments in DSP
926 and MT instructions a fatal error. Use INSERT_OPERAND where
927 appropriate. Improve warnings for break and wait code overflows.
928 Use symbolic constant of OP_MASK_COPZ.
929 (mips16_ip): Use MIPS16_INSERT_OPERAND where appropriate.
930
931 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
932
933 * po/Make-in (top_builddir): Define.
934
935 2006-06-02 Joseph S. Myers <joseph@codesourcery.com>
936
937 * doc/Makefile.am (TEXI2DVI): Define.
938 * doc/Makefile.in: Regenerate.
939 * doc/c-arc.texi: Fix typo.
940
941 2006-06-01 Alan Modra <amodra@bigpond.net.au>
942
943 * config/obj-ieee.c: Delete.
944 * config/obj-ieee.h: Delete.
945 * Makefile.am (OBJ_FORMATS): Remove ieee.
946 (OBJ_FORMAT_CFILES, OBJ_FORMAT_HFILES): Similarly.
947 (obj-ieee.o): Remove rule.
948 * Makefile.in: Regenerate.
949 * configure.in (atof): Remove tahoe.
950 (OBJ_MAYBE_IEEE): Don't define.
951 * configure: Regenerate.
952 * config.in: Regenerate.
953 * doc/Makefile.in: Regenerate.
954 * po/POTFILES.in: Regenerate.
955
956 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
957
958 * Makefile.am: Replace INTLLIBS and INTLDEPS with LIBINTL
959 and LIBINTL_DEP everywhere.
960 (INTLLIBS): Remove.
961 (INCLUDES, DEP_INCLUDES): Use @INCINTL@.
962 * acinclude.m4: Include new gettext macros.
963 * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
964 Remove local code for po/Makefile.
965 * Makefile.in, configure, doc/Makefile.in: Regenerated.
966
967 2006-05-30 Nick Clifton <nickc@redhat.com>
968
969 * po/es.po: Updated Spanish translation.
970
971 2006-05-06 Denis Chertykov <denisc@overta.ru>
972
973 * doc/c-avr.texi: New file.
974 * doc/Makefile.am (CPU_DOCS): Add c-avr.texi
975 * doc/all.texi: Set AVR
976 * doc/as.texinfo: Include c-avr.texi
977
978 2006-05-28 Jie Zhang <jie.zhang@analog.com>
979
980 * config/bfin-parse.y (check_macfunc): Loose the condition of
981 calling check_multiply_halfregs ().
982
983 2006-05-25 Jie Zhang <jie.zhang@analog.com>
984
985 * config/bfin-parse.y (asm_1): Better check and deal with
986 vector and scalar Multiply 16-Bit Operands instructions.
987
988 2006-05-24 Nick Clifton <nickc@redhat.com>
989
990 * config/tc-hppa.c: Convert to ISO C90 format.
991 * config/tc-hppa.h: Likewise.
992
993 2006-05-24 Carlos O'Donell <carlos@systemhalted.org>
994 Randolph Chung <randolph@tausq.org>
995
996 * config/tc-hppa.c (is_tls_gdidx, is_tls_ldidx, is_tls_dtpoff,
997 is_tls_ieoff, is_tls_leoff): Define.
998 (fix_new_hppa): Handle TLS.
999 (cons_fix_new_hppa): Likewise.
1000 (pa_ip): Likewise.
1001 (md_apply_fix): Handle TLS relocs.
1002 * config/tc-hppa.h (hppa_fix_adjustable): Handle TLS.
1003
1004 2006-05-24 Bjoern Haase <bjoern.m.haase@web.de>
1005
1006 * config/tc-avr.c: Add new cpu targets avr6, avr2560 and avr2561.
1007
1008 2006-05-23 Thiemo Seufer <ths@mips.com>
1009 David Ung <davidu@mips.com>
1010 Nigel Stephens <nigel@mips.com>
1011
1012 [ gas/ChangeLog ]
1013 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS): Rename.
1014 (ISA_SUPPORTS_DSP_ASE, ISA_SUPPORTS_MT_ASE, ISA_HAS_64BIT_FPRS,
1015 ISA_HAS_MXHC1): New macros.
1016 (HAVE_32BIT_FPRS): Use ISA_HAS_64BIT_FPRS instead of
1017 ISA_HAS_64BIT_REGS. Formatting fixes. Improved comments.
1018 (mips_cpu_info): Change to use combined ASE/IS_ISA flag.
1019 (MIPS_CPU_IS_ISA, MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP,
1020 MIPS_CPU_ASE_MT, MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX): New defines.
1021 (mips_after_parse_args): Change default handling of float register
1022 size to account for 32bit code with 64bit FP. Better sanity checking
1023 of ISA/ASE/ABI option combinations.
1024 (s_mipsset): Support switching of GPR and FPR sizes via
1025 .set {g,f}p={32,64,default}. Better sanity checking for .set ASE
1026 options.
1027 (mips_elf_final_processing): We should record the use of 64bit FP
1028 registers in 32bit code but we don't, because ELF header flags are
1029 a scarce ressource.
1030 (mips_cpu_info_table): Add ASE flags for CPUs with mandatory ASE
1031 extensions. Add 4ksc, 4kec, 4kem, 4kep, 4ksd, m4kp, 24kec, 24kef,
1032 24kex, 34kc, 34kf, 34kx, 25kf CPU definitions.
1033 (mips_cpu_info_from_isa): Use MIPS_CPU_IS_ISA.
1034 * doc/c-mips.texi: Document .set {g,f}p={32,64,default}. Document
1035 missing -march options. Document .set arch=CPU. Move .set smartmips
1036 to ASE page. Use @code for .set FOO examples.
1037
1038 2006-05-23 Jie Zhang <jie.zhang@analog.com>
1039
1040 * config/tc-bfin.c (bfin_start_line_hook): Bump line counters
1041 if needed.
1042
1043 2006-05-23 Jie Zhang <jie.zhang@analog.com>
1044
1045 * config/bfin-defs.h (bfin_equals): Remove declaration.
1046 * config/bfin-parse.y (asm_1): Remove "expr ASSIGN expr".
1047 * config/tc-bfin.c (bfin_name_is_register): Remove.
1048 (bfin_equals): Remove.
1049 * config/tc-bfin.h (TC_EQUAL_IN_INSN): Redefine as 1.
1050 (bfin_name_is_register): Remove declaration.
1051
1052 2006-05-19 Thiemo Seufer <ths@mips.com>
1053 Nigel Stephens <nigel@mips.com>
1054
1055 * config/tc-mipc.c (ISA_HAS_ODD_SINGLE_FPR): New define.
1056 (mips_oddfpreg_ok): New function.
1057 (mips_ip): Use it.
1058
1059 2006-05-19 Thiemo Seufer <ths@mips.com>
1060 David Ung <davidu@mips.com>
1061
1062 * config/tc-mips.h (tc_mips_regname_to_dw2regnum): Declare.
1063 * config/tc-mipc.c (ABI_NEEDS_64BIT_REGS, ISA_HAS_64BIT_REGS,
1064 ISA_HAS_DROR, ISA_HAS_ROR): Reformat.
1065 (regname, RTYPE_MASK, RTYPE_NUM, RTYPE_FPU, RTYPE_FCC, RTYPE_VEC,
1066 RTYPE_GP, RTYPE_CP0, RTYPE_PC, RTYPE_ACC, RTYPE_CCC, RNUM_MASK,
1067 RWARN, GENERIC_REGISTER_NUMBERS, FPU_REGISTER_NAMES,
1068 FPU_CONDITION_CODE_NAMES, COPROC_CONDITION_CODE_NAMES,
1069 N32N64_SYMBOLIC_REGISTER_NAMES, O32_SYMBOLIC_REGISTER_NAMES,
1070 SYMBOLIC_REGISTER_NAMES, MIPS16_SPECIAL_REGISTER_NAMES,
1071 MDMX_VECTOR_REGISTER_NAMES, MIPS_DSP_ACCUMULATOR_NAMES, reg_names,
1072 reg_names_o32, reg_names_n32n64): Define register classes.
1073 (reg_lookup): New function, use register classes.
1074 (md_begin): Reserve register names in the symbol table. Simplify
1075 OBJ_ELF defines.
1076 (mips_ip): Fix comment formatting. Handle symbolic COP0 registers.
1077 Use reg_lookup.
1078 (mips16_ip): Use reg_lookup.
1079 (tc_get_register): Likewise.
1080 (tc_mips_regname_to_dw2regnum): New function.
1081
1082 2006-05-19 Thiemo Seufer <ths@mips.com>
1083
1084 * config/tc-arm.c, config/tc-arm.h (tc_arm_regname_to_dw2regnum):
1085 Un-constify string argument.
1086 * config/tc-i386.c, config/tc-i386.h (tc_x86_regname_to_dw2regnum):
1087 Likewise.
1088 * config/tc-m68k.c, config/tc-m68k.h (tc_m68k_regname_to_dw2regnum):
1089 Likewise.
1090 * config/tc-ppc.c, config/tc-ppc.h (tc_ppc_regname_to_dw2regnum):
1091 Likewise.
1092 * config/tc-s390.c, config/tc-s390.h (tc_s390_regname_to_dw2regnum):
1093 Likewise.
1094 * config/tc-sh.c, config/tc-sh.h (sh_regname_to_dw2regnum):
1095 Likewise.
1096 * config/tc-sparc.c, config/tc-sparc.h (sparc_regname_to_dw2regnum):
1097 Likewise.
1098
1099 2006-05-19 Nathan Sidwell <nathan@codesourcery.com>
1100
1101 * gas/config/tc-m68k.c (m68k_init_arch): Move checking of
1102 cfloat/m68881 to correct architecture before using it.
1103
1104 2006-05-16 Bjoern Haase <bjoern.m.haase@web.de>
1105
1106 * config/tc-avr.h (TC_VALIDATE_FIX): Allow fixups for immediate
1107 constant values.
1108
1109 2006-05-15 Paul Brook <paul@codesourcery.com>
1110
1111 * config/tc-arm.c (arm_adjust_symtab): Use
1112 bfd_is_arm_special_symbol_name.
1113
1114 2006-05-15 Bob Wilson <bob.wilson@acm.org>
1115
1116 * config/tc-xtensa.c (is_direct_call_opcode, is_branch_jmp_to_next,
1117 xg_assemble_vliw_tokens, xtensa_mark_narrow_branches,
1118 xtensa_fix_short_loop_frags, is_local_forward_loop, relax_frag_immed):
1119 Handle errors from calls to xtensa_opcode_is_* functions.
1120
1121 2006-05-14 Thiemo Seufer <ths@mips.com>
1122
1123 * config/tc-mips.c (macro_build): Test for currently active
1124 mips16 option.
1125 (mips16_ip): Reject invalid opcodes.
1126
1127 2006-05-11 Carlos O'Donell <carlos@codesourcery.com>
1128
1129 * doc/as.texinfo: Rename "Index" to "AS Index",
1130 and "ABORT" to "ABORT (COFF)".
1131
1132 2006-05-11 Paul Brook <paul@codesourcery.com>
1133
1134 * config/tc-arm.c (parse_half): New function.
1135 (operand_parse_code): Remove OP_Iffff. Add OP_HALF.
1136 (parse_operands): Ditto.
1137 (do_mov16): Reject invalid relocations.
1138 (do_t_mov16): Ditto. Use Thumb reloc numbers.
1139 (insns): Replace Iffff with HALF.
1140 (md_apply_fix): Add MOVW and MOVT relocs.
1141 (tc_gen_reloc): Ditto.
1142 * doc/c-arm.texi: Document relocation operators
1143
1144 2006-05-11 Paul Brook <paul@codesourcery.com>
1145
1146 * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
1147
1148 2006-05-11 Thiemo Seufer <ths@mips.com>
1149
1150 * config/tc-mips.c (append_insn): Don't check the range of j or
1151 jal addresses.
1152
1153 2006-05-11 Pedro Alves <pedro_alves@portugalmail.pt>
1154
1155 * config/tc-arm.c (md_pcrel_from_section): Force a bias for
1156 relocs against external symbols for WinCE targets.
1157 (md_apply_fix): Likewise.
1158
1159 2006-05-09 David Ung <davidu@mips.com>
1160
1161 * config/tc-mips.c (append_insn): Only warn about an out-of-range
1162 j or jal address.
1163
1164 2006-05-09 Nick Clifton <nickc@redhat.com>
1165
1166 * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups
1167 against symbols which are not going to be placed into the symbol
1168 table.
1169
1170 2006-05-09 Ben Elliston <bje@au.ibm.com>
1171
1172 * expr.c (operand): Remove `if (0 && ..)' statement and
1173 subsequently unused target_op label. Collapse `if (1 || ..)'
1174 statement.
1175 * app.c (do_scrub_chars): Remove unused case 0, as it is handled
1176 separately above the switch.
1177
1178 2006-05-08 Nick Clifton <nickc@redhat.com>
1179
1180 PR gas/2623
1181 * config/tc-msp430.c (line_separator_character): Define as |.
1182
1183 2006-05-08 Thiemo Seufer <ths@mips.com>
1184 Nigel Stephens <nigel@mips.com>
1185 David Ung <davidu@mips.com>
1186
1187 * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
1188 (mips_opts): Likewise.
1189 (file_ase_smartmips): New variable.
1190 (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
1191 (macro_build): Handle SmartMIPS instructions.
1192 (mips_ip): Likewise.
1193 (md_longopts): Add argument handling for smartmips.
1194 (md_parse_options, mips_after_parse_args): Likewise.
1195 (s_mipsset): Add .set smartmips support.
1196 (md_show_usage): Document -msmartmips/-mno-smartmips.
1197 * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
1198 .set smartmips.
1199 * doc/c-mips.texi: Likewise.
1200
1201 2006-05-08 Alan Modra <amodra@bigpond.net.au>
1202
1203 * write.c (relax_segment): Add pass count arg. Don't error on
1204 negative org/space on first two passes.
1205 (relax_seg_info): New struct.
1206 (relax_seg, write_object_file): Adjust.
1207 * write.h (relax_segment): Update prototype.
1208
1209 2006-05-05 Julian Brown <julian@codesourcery.com>
1210
1211 * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
1212 checking.
1213 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
1214 architecture version checks.
1215 (insns): Allow overlapping instructions to be used in VFP mode.
1216
1217 2006-05-05 H.J. Lu <hongjiu.lu@intel.com>
1218
1219 PR gas/2598
1220 * config/obj-elf.c (obj_elf_change_section): Allow user
1221 specified SHF_ALPHA_GPREL.
1222
1223 2006-05-05 Bjoern Haase <bjoern.m.haase@web.de>
1224
1225 * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups
1226 for PMEM related expressions.
1227
1228 2006-05-05 Nick Clifton <nickc@redhat.com>
1229
1230 PR gas/2582
1231 * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the
1232 insertion of a directory separator character into a string at a
1233 given offset. Uses heuristics to decide when to use a backslash
1234 character rather than a forward-slash character.
1235 (dwarf2_directive_loc): Use the macro.
1236 (out_debug_info): Likewise.
1237
1238 2006-05-05 Thiemo Seufer <ths@mips.com>
1239 David Ung <davidu@mips.com>
1240
1241 * config/tc-mips.c (macro_build): Add case 'k' to handle cache
1242 instruction.
1243 (macro): Add new case M_CACHE_AB.
1244
1245 2006-05-04 Kazu Hirata <kazu@codesourcery.com>
1246
1247 * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
1248 (opcode_lookup): Issue a warning for opcode with
1249 OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated
1250 identical to OT_cinfix3.
1251 (TxC3w, TC3w, tC3w): New.
1252 (insns): Use tC3w and TC3w for comparison instructions with
1253 's' suffix.
1254
1255 2006-05-04 Alan Modra <amodra@bigpond.net.au>
1256
1257 * subsegs.h (struct frchain): Delete frch_seg.
1258 (frchain_root): Delete.
1259 (seg_info): Define as macro.
1260 * subsegs.c (frchain_root): Delete.
1261 (abs_seg_info, und_seg_info, absolute_frchain): Delete.
1262 (subsegs_begin, subseg_change): Adjust for above.
1263 (subseg_set_rest): Likewise. Add new frchain structs to seginfo
1264 rather than to one big list.
1265 (subseg_get): Don't special case abs, und sections.
1266 (subseg_new, subseg_force_new): Don't set frchainP here.
1267 (seg_info): Delete.
1268 (subsegs_print_statistics): Adjust frag chain control list traversal.
1269 * debug.c (dmp_frags): Likewise.
1270 * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
1271 at frchain_root. Make use of known frchain ordering.
1272 (last_frag_for_seg): Likewise.
1273 (get_frag_fix): Likewise. Add seg param.
1274 (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
1275 * write.c (chain_frchains_together_1): Adjust for struct frchain.
1276 (SUB_SEGMENT_ALIGN): Likewise.
1277 (subsegs_finish): Adjust frchain list traversal.
1278 * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
1279 (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
1280 (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
1281 (xtensa_fix_b_j_loop_end_frags): Likewise.
1282 (xtensa_fix_close_loop_end_frags): Likewise.
1283 (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
1284 (retrieve_segment_info): Delete frch_seg initialisation.
1285
1286 2006-05-03 Alan Modra <amodra@bigpond.net.au>
1287
1288 * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
1289 * config/obj-elf.h (obj_sec_set_private_data): Delete.
1290 * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
1291 * config/tc-mn10300.c (tc_gen_reloc): Likewise.
1292
1293 2006-05-02 Joseph Myers <joseph@codesourcery.com>
1294
1295 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
1296 here.
1297 (md_apply_fix3): Multiply offset by 4 here for
1298 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
1299
1300 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
1301 Jan Beulich <jbeulich@novell.com>
1302
1303 * config/tc-i386.c (output_invalid_buf): Change size for
1304 unsigned char.
1305 * config/tc-tic30.c (output_invalid_buf): Likewise.
1306
1307 * config/tc-i386.c (output_invalid): Cast none-ascii char to
1308 unsigned char.
1309 * config/tc-tic30.c (output_invalid): Likewise.
1310
1311 2006-05-02 Daniel Jacobowitz <dan@codesourcery.com>
1312
1313 * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
1314 (TEXI2POD): Use AM_MAKEINFOFLAGS.
1315 (asconfig.texi): Don't set top_srcdir.
1316 * doc/as.texinfo: Don't use top_srcdir.
1317 * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
1318
1319 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
1320
1321 * config/tc-i386.c (output_invalid_buf): Change size to 16.
1322 * config/tc-tic30.c (output_invalid_buf): Likewise.
1323
1324 * config/tc-i386.c (output_invalid): Use snprintf instead of
1325 sprintf.
1326 * config/tc-ia64.c (declare_register_set): Likewise.
1327 (emit_one_bundle): Likewise.
1328 (check_dependencies): Likewise.
1329 * config/tc-tic30.c (output_invalid): Likewise.
1330
1331 2006-05-02 Paul Brook <paul@codesourcery.com>
1332
1333 * config/tc-arm.c (arm_optimize_expr): New function.
1334 * config/tc-arm.h (md_optimize_expr): Define
1335 (arm_optimize_expr): Add prototype.
1336 (TC_FORCE_RELOCATION_SUB_SAME): Define.
1337
1338 2006-05-02 Ben Elliston <bje@au.ibm.com>
1339
1340 * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
1341 field unsigned.
1342
1343 * sb.h (sb_list_vector): Move to sb.c.
1344 * sb.c (free_list): Use type of sb_list_vector directly.
1345 (sb_build): Fix off-by-one error in assertion about `size'.
1346
1347 2006-05-01 Ben Elliston <bje@au.ibm.com>
1348
1349 * listing.c (listing_listing): Remove useless loop.
1350 * macro.c (macro_expand): Remove is_positional local variable.
1351 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
1352 and simplify surrounding expressions, where possible.
1353 (assign_symbol): Likewise.
1354 (s_weakref): Likewise.
1355 * symbols.c (colon): Likewise.
1356
1357 2006-05-01 James Lemke <jwlemke@wasabisystems.com>
1358
1359 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
1360
1361 2006-04-30 Thiemo Seufer <ths@mips.com>
1362 David Ung <davidu@mips.com>
1363
1364 * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
1365 (mips_immed): New table that records various handling of udi
1366 instruction patterns.
1367 (mips_ip): Adds udi handling.
1368
1369 2006-04-28 Alan Modra <amodra@bigpond.net.au>
1370
1371 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
1372 of list rather than beginning.
1373
1374 2006-04-26 Julian Brown <julian@codesourcery.com>
1375
1376 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
1377 (is_quarter_float): Rename from above. Simplify slightly.
1378 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
1379 number.
1380 (parse_neon_mov): Parse floating-point constants.
1381 (neon_qfloat_bits): Fix encoding.
1382 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
1383 preference to integer encoding when using the F32 type.
1384
1385 2006-04-26 Julian Brown <julian@codesourcery.com>
1386
1387 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
1388 zero-initialising structures containing it will lead to invalid types).
1389 (arm_it): Add vectype to each operand.
1390 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
1391 defined field.
1392 (neon_typed_alias): New structure. Extra information for typed
1393 register aliases.
1394 (reg_entry): Add neon type info field.
1395 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
1396 Break out alternative syntax for coprocessor registers, etc. into...
1397 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
1398 out from arm_reg_parse.
1399 (parse_neon_type): Move. Return SUCCESS/FAIL.
1400 (first_error): New function. Call to ensure first error which occurs is
1401 reported.
1402 (parse_neon_operand_type): Parse exactly one type.
1403 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
1404 (parse_typed_reg_or_scalar): New function. Handle core of both
1405 arm_typed_reg_parse and parse_scalar.
1406 (arm_typed_reg_parse): Parse a register with an optional type.
1407 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
1408 result.
1409 (parse_scalar): Parse a Neon scalar with optional type.
1410 (parse_reg_list): Use first_error.
1411 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
1412 (neon_alias_types_same): New function. Return true if two (alias) types
1413 are the same.
1414 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
1415 of elements.
1416 (insert_reg_alias): Return new reg_entry not void.
1417 (insert_neon_reg_alias): New function. Insert type/index information as
1418 well as register for alias.
1419 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
1420 make typed register aliases accordingly.
1421 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
1422 of line.
1423 (s_unreq): Delete type information if present.
1424 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
1425 (s_arm_unwind_save_mmxwcg): Likewise.
1426 (s_arm_unwind_movsp): Likewise.
1427 (s_arm_unwind_setfp): Likewise.
1428 (parse_shift): Likewise.
1429 (parse_shifter_operand): Likewise.
1430 (parse_address): Likewise.
1431 (parse_tb): Likewise.
1432 (tc_arm_regname_to_dw2regnum): Likewise.
1433 (md_pseudo_table): Add dn, qn.
1434 (parse_neon_mov): Handle typed operands.
1435 (parse_operands): Likewise.
1436 (neon_type_mask): Add N_SIZ.
1437 (N_ALLMODS): New macro.
1438 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
1439 (el_type_of_type_chk): Add some safeguards.
1440 (modify_types_allowed): Fix logic bug.
1441 (neon_check_type): Handle operands with types.
1442 (neon_three_same): Remove redundant optional arg handling.
1443 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
1444 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
1445 (do_neon_step): Adjust accordingly.
1446 (neon_cmode_for_logic_imm): Use first_error.
1447 (do_neon_bitfield): Call neon_check_type.
1448 (neon_dyadic): Rename to...
1449 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
1450 to allow modification of type of the destination.
1451 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1452 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
1453 (do_neon_compare): Make destination be an untyped bitfield.
1454 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
1455 (neon_mul_mac): Return early in case of errors.
1456 (neon_move_immediate): Use first_error.
1457 (neon_mac_reg_scalar_long): Fix type to include scalar.
1458 (do_neon_dup): Likewise.
1459 (do_neon_mov): Likewise (in several places).
1460 (do_neon_tbl_tbx): Fix type.
1461 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
1462 (do_neon_ld_dup): Exit early in case of errors and/or use
1463 first_error.
1464 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
1465 Handle .dn/.qn directives.
1466 (REGDEF): Add zero for reg_entry neon field.
1467
1468 2006-04-26 Julian Brown <julian@codesourcery.com>
1469
1470 * config/tc-arm.c (limits.h): Include.
1471 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
1472 (fpu_vfp_v3_or_neon_ext): Declare constants.
1473 (neon_el_type): New enumeration of types for Neon vector elements.
1474 (neon_type_el): New struct. Define type and size of a vector element.
1475 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
1476 instruction.
1477 (neon_type): Define struct. The type of an instruction.
1478 (arm_it): Add 'vectype' for the current instruction.
1479 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
1480 (vfp_sp_reg_pos): Rename to...
1481 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
1482 tags.
1483 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
1484 (Neon D or Q register).
1485 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
1486 register.
1487 (GE_OPT_PREFIX_BIG): Define constant, for use in...
1488 (my_get_expression): Allow above constant as argument to accept
1489 64-bit constants with optional prefix.
1490 (arm_reg_parse): Add extra argument to return the specific type of
1491 register in when either a D or Q register (REG_TYPE_NDQ) is
1492 requested. Can be NULL.
1493 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
1494 (parse_reg_list): Update for new arm_reg_parse args.
1495 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
1496 (parse_neon_el_struct_list): New function. Parse element/structure
1497 register lists for VLD<n>/VST<n> instructions.
1498 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
1499 (s_arm_unwind_save_mmxwr): Likewise.
1500 (s_arm_unwind_save_mmxwcg): Likewise.
1501 (s_arm_unwind_movsp): Likewise.
1502 (s_arm_unwind_setfp): Likewise.
1503 (parse_big_immediate): New function. Parse an immediate, which may be
1504 64 bits wide. Put results in inst.operands[i].
1505 (parse_shift): Update for new arm_reg_parse args.
1506 (parse_address): Likewise. Add parsing of alignment specifiers.
1507 (parse_neon_mov): Parse the operands of a VMOV instruction.
1508 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
1509 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
1510 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
1511 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
1512 (parse_operands): Handle new codes above.
1513 (encode_arm_vfp_sp_reg): Rename to...
1514 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
1515 selected VFP version only supports D0-D15.
1516 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
1517 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
1518 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
1519 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
1520 encode_arm_vfp_reg name, and allow 32 D regs.
1521 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
1522 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
1523 regs.
1524 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
1525 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
1526 constant-load and conversion insns introduced with VFPv3.
1527 (neon_tab_entry): New struct.
1528 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
1529 those which are the targets of pseudo-instructions.
1530 (neon_opc): Enumerate opcodes, use as indices into...
1531 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
1532 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
1533 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
1534 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
1535 neon_enc_tab.
1536 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
1537 Neon instructions.
1538 (neon_type_mask): New. Compact type representation for type checking.
1539 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
1540 permitted type combinations.
1541 (N_IGNORE_TYPE): New macro.
1542 (neon_check_shape): New function. Check an instruction shape for
1543 multiple alternatives. Return the specific shape for the current
1544 instruction.
1545 (neon_modify_type_size): New function. Modify a vector type and size,
1546 depending on the bit mask in argument 1.
1547 (neon_type_promote): New function. Convert a given "key" type (of an
1548 operand) into the correct type for a different operand, based on a bit
1549 mask.
1550 (type_chk_of_el_type): New function. Convert a type and size into the
1551 compact representation used for type checking.
1552 (el_type_of_type_ckh): New function. Reverse of above (only when a
1553 single bit is set in the bit mask).
1554 (modify_types_allowed): New function. Alter a mask of allowed types
1555 based on a bit mask of modifications.
1556 (neon_check_type): New function. Check the type of the current
1557 instruction against the variable argument list. The "key" type of the
1558 instruction is returned.
1559 (neon_dp_fixup): New function. Fill in and modify instruction bits for
1560 a Neon data-processing instruction depending on whether we're in ARM
1561 mode or Thumb-2 mode.
1562 (neon_logbits): New function.
1563 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
1564 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
1565 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
1566 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
1567 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
1568 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
1569 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1570 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
1571 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
1572 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
1573 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
1574 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
1575 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
1576 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
1577 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
1578 (neon_move_immediate, do_neon_mvn, neon_mixed_length)
1579 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
1580 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
1581 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
1582 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
1583 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
1584 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
1585 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
1586 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
1587 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
1588 helpers.
1589 (parse_neon_type): New function. Parse Neon type specifier.
1590 (opcode_lookup): Allow parsing of Neon type specifiers.
1591 (REGNUM2, REGSETH, REGSET2): New macros.
1592 (reg_names): Add new VFPv3 and Neon registers.
1593 (NUF, nUF, NCE, nCE): New macros for opcode table.
1594 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
1595 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
1596 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
1597 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
1598 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
1599 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
1600 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
1601 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
1602 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
1603 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
1604 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
1605 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
1606 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
1607 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
1608 fto[us][lh][sd].
1609 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
1610 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
1611 (arm_option_cpu_value): Add vfp3 and neon.
1612 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
1613 VFPv1 attribute.
1614
1615 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1616
1617 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
1618 syntax instead of hardcoded opcodes with ".w18" suffixes.
1619 (wide_branch_opcode): New.
1620 (build_transition): Use it to check for wide branch opcodes with
1621 either ".w18" or ".w15" suffixes.
1622
1623 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1624
1625 * config/tc-xtensa.c (xtensa_create_literal_symbol,
1626 xg_assemble_literal, xg_assemble_literal_space): Do not set the
1627 frag's is_literal flag.
1628
1629 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1630
1631 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
1632
1633 2006-04-23 Kazu Hirata <kazu@codesourcery.com>
1634
1635 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
1636 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
1637 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
1638 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
1639 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
1640
1641 2005-04-20 Paul Brook <paul@codesourcery.com>
1642
1643 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
1644 all targets.
1645 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
1646
1647 2006-04-19 Alan Modra <amodra@bigpond.net.au>
1648
1649 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
1650 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
1651 Make some cpus unsupported on ELF. Run "make dep-am".
1652 * Makefile.in: Regenerate.
1653
1654 2006-04-19 Alan Modra <amodra@bigpond.net.au>
1655
1656 * configure.in (--enable-targets): Indent help message.
1657 * configure: Regenerate.
1658
1659 2006-04-18 H.J. Lu <hongjiu.lu@intel.com>
1660
1661 PR gas/2533
1662 * config/tc-i386.c (i386_immediate): Check illegal immediate
1663 register operand.
1664
1665 2006-04-18 Alan Modra <amodra@bigpond.net.au>
1666
1667 * config/tc-i386.c: Formatting.
1668 (output_disp, output_imm): ISO C90 params.
1669
1670 * frags.c (frag_offset_fixed_p): Constify args.
1671 * frags.h (frag_offset_fixed_p): Ditto.
1672
1673 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
1674 (COFF_MAGIC): Delete.
1675
1676 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
1677
1678 2006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
1679
1680 * po/POTFILES.in: Regenerated.
1681
1682 2006-04-16 Mark Mitchell <mark@codesourcery.com>
1683
1684 * doc/as.texinfo: Mention that some .type syntaxes are not
1685 supported on all architectures.
1686
1687 2006-04-14 Sterling Augustine <sterling@tensilica.com>
1688
1689 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
1690 instructions when such transformations have been disabled.
1691
1692 2006-04-10 Sterling Augustine <sterling@tensilica.com>
1693
1694 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
1695 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
1696 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
1697 decoding the loop instructions. Remove current_offset variable.
1698 (xtensa_fix_short_loop_frags): Likewise.
1699 (min_bytes_to_other_loop_end): Remove current_offset argument.
1700
1701 2006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl>
1702
1703 * config/tc-z80.c (z80_optimize_expr): Removed.
1704 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
1705
1706 2006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
1707
1708 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
1709 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
1710 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
1711 atmega644, atmega329, atmega3290, atmega649, atmega6490,
1712 atmega406, atmega640, atmega1280, atmega1281, at90can32,
1713 at90can64, at90usb646, at90usb647, at90usb1286 and
1714 at90usb1287.
1715 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
1716
1717 2006-04-07 Paul Brook <paul@codesourcery.com>
1718
1719 * config/tc-arm.c (parse_operands): Set default error message.
1720
1721 2006-04-07 Paul Brook <paul@codesourcery.com>
1722
1723 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
1724
1725 2006-04-07 Paul Brook <paul@codesourcery.com>
1726
1727 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
1728
1729 2006-04-07 Paul Brook <paul@codesourcery.com>
1730
1731 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
1732 (move_or_literal_pool): Handle Thumb-2 instructions.
1733 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
1734
1735 2006-04-07 Alan Modra <amodra@bigpond.net.au>
1736
1737 PR 2512.
1738 * config/tc-i386.c (match_template): Move 64-bit operand tests
1739 inside loop.
1740
1741 2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
1742
1743 * po/Make-in: Add install-html target.
1744 * Makefile.am: Add install-html and install-html-recursive targets.
1745 * Makefile.in: Regenerate.
1746 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
1747 * configure: Regenerate.
1748 * doc/Makefile.am: Add install-html and install-html-am targets.
1749 * doc/Makefile.in: Regenerate.
1750
1751 2006-04-06 Alan Modra <amodra@bigpond.net.au>
1752
1753 * frags.c (frag_offset_fixed_p): Reinitialise offset before
1754 second scan.
1755
1756 2006-04-05 Richard Sandiford <richard@codesourcery.com>
1757 Daniel Jacobowitz <dan@codesourcery.com>
1758
1759 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
1760 (GOTT_BASE, GOTT_INDEX): New.
1761 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
1762 GOTT_INDEX when generating VxWorks PIC.
1763 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
1764 use the generic *-*-vxworks* stanza instead.
1765
1766 2006-04-04 Alan Modra <amodra@bigpond.net.au>
1767
1768 PR 997
1769 * frags.c (frag_offset_fixed_p): New function.
1770 * frags.h (frag_offset_fixed_p): Declare.
1771 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
1772 (resolve_expression): Likewise.
1773
1774 2006-04-03 Sterling Augustine <sterling@tensilica.com>
1775
1776 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
1777 of the same length but different numbers of slots.
1778
1779 2006-03-30 Andreas Schwab <schwab@suse.de>
1780
1781 * configure.in: Fix help string for --enable-targets option.
1782 * configure: Regenerate.
1783
1784 2006-03-28 Nathan Sidwell <nathan@codesourcery.com>
1785
1786 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
1787 (m68k_ip): ... here. Use for all chips. Protect against buffer
1788 overrun and avoid excessive copying.
1789
1790 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
1791 m68020_control_regs, m68040_control_regs, m68060_control_regs,
1792 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
1793 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
1794 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
1795 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
1796 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
1797 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
1798 mcf5282_ctrl, mcfv4e_ctrl): ... these.
1799 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
1800 (struct m68k_cpu): Change chip field to control_regs.
1801 (current_chip): Remove.
1802 (control_regs): New.
1803 (m68k_archs, m68k_extensions): Adjust.
1804 (m68k_cpus): Reorder to be in cpu number order. Adjust.
1805 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
1806 (find_cf_chip): Reimplement for new organization of cpu table.
1807 (select_control_regs): Remove.
1808 (mri_chip): Adjust.
1809 (struct save_opts): Save control regs, not chip.
1810 (s_save, s_restore): Adjust.
1811 (m68k_lookup_cpu): Give deprecated warning when necessary.
1812 (m68k_init_arch): Adjust.
1813 (md_show_usage): Adjust for new cpu table organization.
1814
1815 2006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
1816
1817 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
1818 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
1819 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
1820 "elf/bfin.h".
1821 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
1822 (any_gotrel): New rule.
1823 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
1824 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
1825 "elf/bfin.h".
1826 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
1827 (bfin_pic_ptr): New function.
1828 (md_pseudo_table): Add it for ".picptr".
1829 (OPTION_FDPIC): New macro.
1830 (md_longopts): Add -mfdpic.
1831 (md_parse_option): Handle it.
1832 (md_begin): Set BFD flags.
1833 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
1834 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
1835 us for GOT relocs.
1836 * Makefile.am (bfin-parse.o): Update dependencies.
1837 (DEPTC_bfin_elf): Likewise.
1838 * Makefile.in: Regenerate.
1839
1840 2006-03-25 Richard Sandiford <richard@codesourcery.com>
1841
1842 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
1843 mcfemac instead of mcfmac.
1844
1845 2006-03-23 Michael Matz <matz@suse.de>
1846
1847 * config/tc-i386.c (type_names): Correct placement of 'static'.
1848 (reloc): Map some more relocs to their 64 bit counterpart when
1849 size is 8.
1850 (output_insn): Work around breakage if DEBUG386 is defined.
1851 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
1852 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
1853 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
1854 different from i386.
1855 (output_imm): Ditto.
1856 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
1857 Imm64.
1858 (md_convert_frag): Jumps can now be larger than 2GB away, error
1859 out in that case.
1860 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
1861 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
1862
1863 2006-03-22 Richard Sandiford <richard@codesourcery.com>
1864 Daniel Jacobowitz <dan@codesourcery.com>
1865 Phil Edwards <phil@codesourcery.com>
1866 Zack Weinberg <zack@codesourcery.com>
1867 Mark Mitchell <mark@codesourcery.com>
1868 Nathan Sidwell <nathan@codesourcery.com>
1869
1870 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
1871 (md_begin): Complain about -G being used for PIC. Don't change
1872 the text, data and bss alignments on VxWorks.
1873 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
1874 generating VxWorks PIC.
1875 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
1876 (macro): Likewise, but do not treat la $25 specially for
1877 VxWorks PIC, and do not handle jal.
1878 (OPTION_MVXWORKS_PIC): New macro.
1879 (md_longopts): Add -mvxworks-pic.
1880 (md_parse_option): Don't complain about using PIC and -G together here.
1881 Handle OPTION_MVXWORKS_PIC.
1882 (md_estimate_size_before_relax): Always use the first relaxation
1883 sequence on VxWorks.
1884 * config/tc-mips.h (VXWORKS_PIC): New.
1885
1886 2006-03-21 Paul Brook <paul@codesourcery.com>
1887
1888 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
1889
1890 2006-03-21 Sterling Augustine <sterling@tensilica.com>
1891
1892 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
1893 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
1894 (get_loop_align_size): New.
1895 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
1896 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
1897 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
1898 (get_noop_aligned_address): Use get_loop_align_size.
1899 (get_aligned_diff): Likewise.
1900
1901 2006-03-21 Paul Brook <paul@codesourcery.com>
1902
1903 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
1904
1905 2006-03-20 Paul Brook <paul@codesourcery.com>
1906
1907 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
1908 (do_t_branch): Encode branches inside IT blocks as unconditional.
1909 (do_t_cps): New function.
1910 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
1911 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
1912 (opcode_lookup): Allow conditional suffixes on all instructions in
1913 Thumb mode.
1914 (md_assemble): Advance condexec state before checking for errors.
1915 (insns): Use do_t_cps.
1916
1917 2006-03-20 Paul Brook <paul@codesourcery.com>
1918
1919 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
1920 outputting the insn.
1921
1922 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1923
1924 * config/tc-vax.c: Update copyright year.
1925 * config/tc-vax.h: Likewise.
1926
1927 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1928
1929 * config/tc-vax.c (md_chars_to_number): Used only locally, so
1930 make it static.
1931 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
1932
1933 2006-03-17 Paul Brook <paul@codesourcery.com>
1934
1935 * config/tc-arm.c (insns): Add ldm and stm.
1936
1937 2006-03-17 Ben Elliston <bje@au.ibm.com>
1938
1939 PR gas/2446
1940 * doc/as.texinfo (Ident): Document this directive more thoroughly.
1941
1942 2006-03-16 Paul Brook <paul@codesourcery.com>
1943
1944 * config/tc-arm.c (insns): Add "svc".
1945
1946 2006-03-13 Bob Wilson <bob.wilson@acm.org>
1947
1948 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
1949 flag and avoid double underscore prefixes.
1950
1951 2006-03-10 Paul Brook <paul@codesourcery.com>
1952
1953 * config/tc-arm.c (md_begin): Handle EABIv5.
1954 (arm_eabis): Add EF_ARM_EABI_VER5.
1955 * doc/c-arm.texi: Document -meabi=5.
1956
1957 2006-03-10 Ben Elliston <bje@au.ibm.com>
1958
1959 * app.c (do_scrub_chars): Simplify string handling.
1960
1961 2006-03-07 Richard Sandiford <richard@codesourcery.com>
1962 Daniel Jacobowitz <dan@codesourcery.com>
1963 Zack Weinberg <zack@codesourcery.com>
1964 Nathan Sidwell <nathan@codesourcery.com>
1965 Paul Brook <paul@codesourcery.com>
1966 Ricardo Anguiano <anguiano@codesourcery.com>
1967 Phil Edwards <phil@codesourcery.com>
1968
1969 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
1970 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
1971 R_ARM_ABS12 reloc.
1972 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
1973 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
1974 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
1975
1976 2006-03-06 Bob Wilson <bob.wilson@acm.org>
1977
1978 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
1979 even when using the text-section-literals option.
1980
1981 2006-03-06 Nathan Sidwell <nathan@codesourcery.com>
1982
1983 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
1984 and cf.
1985 (m68k_ip): <case 'J'> Check we have some control regs.
1986 (md_parse_option): Allow raw arch switch.
1987 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
1988 whether 68881 or cfloat was meant by -mfloat.
1989 (md_show_usage): Adjust extension display.
1990 (m68k_elf_final_processing): Adjust.
1991
1992 2006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
1993
1994 * config/tc-avr.c (avr_mod_hash_value): New function.
1995 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
1996 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
1997 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
1998 instead of int avr_ldi_expression: use avr_mod_hash_value instead
1999 of (int).
2000 (tc_gen_reloc): Handle substractions of symbols, if possible do
2001 fixups, abort otherwise.
2002 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
2003 tc_fix_adjustable): Define.
2004
2005 2006-03-02 James E Wilson <wilson@specifix.com>
2006
2007 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
2008 change the template, then clear md.slot[curr].end_of_insn_group.
2009
2010 2006-02-28 Jan Beulich <jbeulich@novell.com>
2011
2012 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
2013
2014 2006-02-28 Jan Beulich <jbeulich@novell.com>
2015
2016 PR/1070
2017 * macro.c (getstring): Don't treat parentheses special anymore.
2018 (get_any_string): Don't consider '(' and ')' as quoting anymore.
2019 Special-case '(', ')', '[', and ']' when dealing with non-quoting
2020 characters.
2021
2022 2006-02-28 Mat <mat@csail.mit.edu>
2023
2024 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
2025
2026 2006-02-27 Jakub Jelinek <jakub@redhat.com>
2027
2028 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
2029 field.
2030 (CFI_signal_frame): Define.
2031 (cfi_pseudo_table): Add .cfi_signal_frame.
2032 (dot_cfi): Handle CFI_signal_frame.
2033 (output_cie): Handle cie->signal_frame.
2034 (select_cie_for_fde): Don't share CIE if signal_frame flag is
2035 different. Copy signal_frame from FDE to newly created CIE.
2036 * doc/as.texinfo: Document .cfi_signal_frame.
2037
2038 2006-02-27 Carlos O'Donell <carlos@codesourcery.com>
2039
2040 * doc/Makefile.am: Add html target.
2041 * doc/Makefile.in: Regenerate.
2042 * po/Make-in: Add html target.
2043
2044 2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
2045
2046 * config/tc-i386.c (output_insn): Support Intel Merom New
2047 Instructions.
2048
2049 * config/tc-i386.h (CpuMNI): New.
2050 (CpuUnknownFlags): Add CpuMNI.
2051
2052 2006-02-24 David S. Miller <davem@sunset.davemloft.net>
2053
2054 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
2055 (hpriv_reg_table): New table for hyperprivileged registers.
2056 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
2057 register encoding.
2058
2059 2006-02-24 DJ Delorie <dj@redhat.com>
2060
2061 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
2062 (tc_gen_reloc): Don't define.
2063 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
2064 (OPTION_LINKRELAX): New.
2065 (md_longopts): Add it.
2066 (m32c_relax): New.
2067 (md_parse_options): Set it.
2068 (md_assemble): Emit relaxation relocs as needed.
2069 (md_convert_frag): Emit relaxation relocs as needed.
2070 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
2071 (m32c_apply_fix): New.
2072 (tc_gen_reloc): New.
2073 (m32c_force_relocation): Force out jump relocs when relaxing.
2074 (m32c_fix_adjustable): Return false if relaxing.
2075
2076 2006-02-24 Paul Brook <paul@codesourcery.com>
2077
2078 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
2079 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
2080 (struct asm_barrier_opt): Define.
2081 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
2082 (parse_psr): Accept V7M psr names.
2083 (parse_barrier): New function.
2084 (enum operand_parse_code): Add OP_oBARRIER.
2085 (parse_operands): Implement OP_oBARRIER.
2086 (do_barrier): New function.
2087 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
2088 (do_t_cpsi): Add V7M restrictions.
2089 (do_t_mrs, do_t_msr): Validate V7M variants.
2090 (md_assemble): Check for NULL variants.
2091 (v7m_psrs, barrier_opt_names): New tables.
2092 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
2093 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
2094 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
2095 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
2096 (struct cpu_arch_ver_table): Define.
2097 (cpu_arch_ver): New.
2098 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
2099 Tag_CPU_arch_profile.
2100 * doc/c-arm.texi: Document new cpu and arch options.
2101
2102 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
2103
2104 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
2105
2106 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
2107
2108 * config/tc-ia64.c: Update copyright years.
2109
2110 2006-02-22 H.J. Lu <hongjiu.lu@intel.com>
2111
2112 * config/tc-ia64.c (specify_resource): Add the rule 17 from
2113 SDM 2.2.
2114
2115 2005-02-22 Paul Brook <paul@codesourcery.com>
2116
2117 * config/tc-arm.c (do_pld): Remove incorrect write to
2118 inst.instruction.
2119 (encode_thumb32_addr_mode): Use correct operand.
2120
2121 2006-02-21 Paul Brook <paul@codesourcery.com>
2122
2123 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
2124
2125 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
2126 Anil Paranjape <anilp1@kpitcummins.com>
2127 Shilin Shakti <shilins@kpitcummins.com>
2128
2129 * Makefile.am: Add xc16x related entry.
2130 * Makefile.in: Regenerate.
2131 * configure.in: Added xc16x related entry.
2132 * configure: Regenerate.
2133 * config/tc-xc16x.h: New file
2134 * config/tc-xc16x.c: New file
2135 * doc/c-xc16x.texi: New file for xc16x
2136 * doc/all.texi: Entry for xc16x
2137 * doc/Makefile.texi: Added c-xc16x.texi
2138 * NEWS: Announce the support for the new target.
2139
2140 2006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
2141
2142 * configure.tgt: set emulation for mips-*-netbsd*
2143
2144 2006-02-14 Jakub Jelinek <jakub@redhat.com>
2145
2146 * config.in: Rebuilt.
2147
2148 2006-02-13 Bob Wilson <bob.wilson@acm.org>
2149
2150 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
2151 from 1, not 0, in error messages.
2152 (md_assemble): Simplify special-case check for ENTRY instructions.
2153 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
2154 operand in error message.
2155
2156 2006-02-13 Joseph S. Myers <joseph@codesourcery.com>
2157
2158 * configure.tgt (arm-*-linux-gnueabi*): Change to
2159 arm-*-linux-*eabi*.
2160
2161 2006-02-10 Nick Clifton <nickc@redhat.com>
2162
2163 * config/tc-crx.c (check_range): Ensure that the sign bit of a
2164 32-bit value is propagated into the upper bits of a 64-bit long.
2165
2166 * config/tc-arc.c (init_opcode_tables): Fix cast.
2167 (arc_extoper, md_operand): Likewise.
2168
2169 2006-02-09 David Heine <dlheine@tensilica.com>
2170
2171 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
2172 each relaxation step.
2173
2174 2006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
2175
2176 * configure.in (CHECK_DECLS): Add vsnprintf.
2177 * configure: Regenerate.
2178 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
2179 include/declare here, but...
2180 * as.h: Move code detecting VARARGS idiom to the top.
2181 (errno.h, stdarg.h, varargs.h, va_list): ...here.
2182 (vsnprintf): Declare if not already declared.
2183
2184 2006-02-08 H.J. Lu <hongjiu.lu@intel.com>
2185
2186 * as.c (close_output_file): New.
2187 (main): Register close_output_file with xatexit before
2188 dump_statistics. Don't call output_file_close.
2189
2190 2006-02-07 Nathan Sidwell <nathan@codesourcery.com>
2191
2192 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
2193 mcf5329_control_regs): New.
2194 (not_current_architecture, selected_arch, selected_cpu): New.
2195 (m68k_archs, m68k_extensions): New.
2196 (archs): Renamed to ...
2197 (m68k_cpus): ... here. Adjust.
2198 (n_arches): Remove.
2199 (md_pseudo_table): Add arch and cpu directives.
2200 (find_cf_chip, m68k_ip): Adjust table scanning.
2201 (no_68851, no_68881): Remove.
2202 (md_assemble): Lazily initialize.
2203 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
2204 (md_init_after_args): Move functionality to m68k_init_arch.
2205 (mri_chip): Adjust table scanning.
2206 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
2207 options with saner parsing.
2208 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
2209 m68k_init_arch): New.
2210 (s_m68k_cpu, s_m68k_arch): New.
2211 (md_show_usage): Adjust.
2212 (m68k_elf_final_processing): Set CF EF flags.
2213 * config/tc-m68k.h (m68k_init_after_args): Remove.
2214 (tc_init_after_args): Remove.
2215 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
2216 (M68k-Directives): Document .arch and .cpu directives.
2217
2218 2006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl>
2219
2220 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
2221 synonyms for equ and defl.
2222 (z80_cons_fix_new): New function.
2223 (emit_byte): Disallow relative jumps to absolute locations.
2224 (emit_data): Only handle defb, prototype changed, because defb is
2225 now handled as pseudo-op rather than an instruction.
2226 (instab): Entries for defb,defw,db,dw moved from here...
2227 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
2228 Add entries for def24,def32,d24,d32.
2229 (md_assemble): Improved error handling.
2230 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
2231 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
2232 (z80_cons_fix_new): Declare.
2233 * doc/c-z80.texi (defb, db): Mention warning on overflow.
2234 (def24,d24,def32,d32): New pseudo-ops.
2235
2236 2006-02-02 Paul Brook <paul@codesourcery.com>
2237
2238 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
2239
2240 2005-02-02 Paul Brook <paul@codesourcery.com>
2241
2242 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
2243 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
2244 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
2245 T2_OPCODE_RSB): Define.
2246 (thumb32_negate_data_op): New function.
2247 (md_apply_fix): Use it.
2248
2249 2006-01-31 Bob Wilson <bob.wilson@acm.org>
2250
2251 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
2252 fields.
2253 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
2254 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
2255 subtracted symbols.
2256 (relaxation_requirements): Add pfinish_frag argument and use it to
2257 replace setting tinsn->record_fix fields.
2258 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
2259 and vinsn_to_insnbuf. Remove references to record_fix and
2260 slot_sub_symbols fields.
2261 (xtensa_mark_narrow_branches): Delete unused code.
2262 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
2263 a symbol.
2264 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
2265 record_fix fields.
2266 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
2267 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
2268 of the record_fix field. Simplify error messages for unexpected
2269 symbolic operands.
2270 (set_expr_symbol_offset_diff): Delete.
2271
2272 2006-01-31 Paul Brook <paul@codesourcery.com>
2273
2274 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
2275
2276 2006-01-31 Paul Brook <paul@codesourcery.com>
2277 Richard Earnshaw <rearnsha@arm.com>
2278
2279 * config/tc-arm.c: Use arm_feature_set.
2280 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
2281 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
2282 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
2283 New variables.
2284 (insns): Use them.
2285 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
2286 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
2287 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
2288 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
2289 feature flags.
2290 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
2291 (arm_opts): Move old cpu/arch options from here...
2292 (arm_legacy_opts): ... to here.
2293 (md_parse_option): Search arm_legacy_opts.
2294 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
2295 (arm_float_abis, arm_eabis): Make const.
2296
2297 2006-01-25 Bob Wilson <bob.wilson@acm.org>
2298
2299 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
2300
2301 2006-01-21 Jie Zhang <jie.zhang@analog.com>
2302
2303 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
2304 in load immediate intruction.
2305
2306 2006-01-21 Jie Zhang <jie.zhang@analog.com>
2307
2308 * config/bfin-parse.y (value_match): Use correct conversion
2309 specifications in template string for __FILE__ and __LINE__.
2310 (binary): Ditto.
2311 (unary): Ditto.
2312
2313 2006-01-18 Alexandre Oliva <aoliva@redhat.com>
2314
2315 Introduce TLS descriptors for i386 and x86_64.
2316 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
2317 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
2318 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
2319 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
2320 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
2321 displacement bits.
2322 (build_modrm_byte): Set up zero modrm for TLS desc calls.
2323 (lex_got): Handle @tlsdesc and @tlscall.
2324 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
2325
2326 2006-01-11 Nick Clifton <nickc@redhat.com>
2327
2328 Fixes for building on 64-bit hosts:
2329 * config/tc-avr.c (mod_index): New union to allow conversion
2330 between pointers and integers.
2331 (md_begin, avr_ldi_expression): Use it.
2332 * config/tc-i370.c (md_assemble): Add cast for argument to print
2333 statement.
2334 * config/tc-tic54x.c (subsym_substitute): Likewise.
2335 * config/tc-mn10200.c (md_assemble): Use a union to convert the
2336 opindex field of fr_cgen structure into a pointer so that it can
2337 be stored in a frag.
2338 * config/tc-mn10300.c (md_assemble): Likewise.
2339 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
2340 types.
2341 * config/tc-v850.c: Replace uses of (int) casts with correct
2342 types.
2343
2344 2006-01-09 H.J. Lu <hongjiu.lu@intel.com>
2345
2346 PR gas/2117
2347 * symbols.c (snapshot_symbol): Don't change a defined symbol.
2348
2349 2006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
2350
2351 PR gas/2101
2352 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
2353 a local-label reference.
2354
2355 For older changes see ChangeLog-2005
2356 \f
2357 Local Variables:
2358 mode: change-log
2359 left-margin: 8
2360 fill-column: 74
2361 version-control: never
2362 End:
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