* config/tc-bfin.c (bfin_start_line_hook): Bump line counters
[deliverable/binutils-gdb.git] / gas / ChangeLog
1 2006-05-23 Jie Zhang <jie.zhang@analog.com>
2
3 * config/tc-bfin.c (bfin_start_line_hook): Bump line counters
4 if needed.
5
6 2006-05-23 Jie Zhang <jie.zhang@analog.com>
7
8 * config/bfin-defs.h (bfin_equals): Remove declaration.
9 * config/bfin-parse.y (asm_1): Remove "expr ASSIGN expr".
10 * config/tc-bfin.c (bfin_name_is_register): Remove.
11 (bfin_equals): Remove.
12 * config/tc-bfin.h (TC_EQUAL_IN_INSN): Redefine as 1.
13 (bfin_name_is_register): Remove declaration.
14
15 2006-05-19 Thiemo Seufer <ths@mips.com>
16 Nigel Stephens <nigel@mips.com>
17
18 * config/tc-mipc.c (ISA_HAS_ODD_SINGLE_FPR): New define.
19 (mips_oddfpreg_ok): New function.
20 (mips_ip): Use it.
21
22 2006-05-19 Thiemo Seufer <ths@mips.com>
23 David Ung <davidu@mips.com>
24
25 * config/tc-mips.h (tc_mips_regname_to_dw2regnum): Declare.
26 * config/tc-mipc.c (ABI_NEEDS_64BIT_REGS, ISA_HAS_64BIT_REGS,
27 ISA_HAS_DROR, ISA_HAS_ROR): Reformat.
28 (regname, RTYPE_MASK, RTYPE_NUM, RTYPE_FPU, RTYPE_FCC, RTYPE_VEC,
29 RTYPE_GP, RTYPE_CP0, RTYPE_PC, RTYPE_ACC, RTYPE_CCC, RNUM_MASK,
30 RWARN, GENERIC_REGISTER_NUMBERS, FPU_REGISTER_NAMES,
31 FPU_CONDITION_CODE_NAMES, COPROC_CONDITION_CODE_NAMES,
32 N32N64_SYMBOLIC_REGISTER_NAMES, O32_SYMBOLIC_REGISTER_NAMES,
33 SYMBOLIC_REGISTER_NAMES, MIPS16_SPECIAL_REGISTER_NAMES,
34 MDMX_VECTOR_REGISTER_NAMES, MIPS_DSP_ACCUMULATOR_NAMES, reg_names,
35 reg_names_o32, reg_names_n32n64): Define register classes.
36 (reg_lookup): New function, use register classes.
37 (md_begin): Reserve register names in the symbol table. Simplify
38 OBJ_ELF defines.
39 (mips_ip): Fix comment formatting. Handle symbolic COP0 registers.
40 Use reg_lookup.
41 (mips16_ip): Use reg_lookup.
42 (tc_get_register): Likewise.
43 (tc_mips_regname_to_dw2regnum): New function.
44
45 2006-05-19 Thiemo Seufer <ths@mips.com>
46
47 * config/tc-arm.c, config/tc-arm.h (tc_arm_regname_to_dw2regnum):
48 Un-constify string argument.
49 * config/tc-i386.c, config/tc-i386.h (tc_x86_regname_to_dw2regnum):
50 Likewise.
51 * config/tc-m68k.c, config/tc-m68k.h (tc_m68k_regname_to_dw2regnum):
52 Likewise.
53 * config/tc-ppc.c, config/tc-ppc.h (tc_ppc_regname_to_dw2regnum):
54 Likewise.
55 * config/tc-s390.c, config/tc-s390.h (tc_s390_regname_to_dw2regnum):
56 Likewise.
57 * config/tc-sh.c, config/tc-sh.h (sh_regname_to_dw2regnum):
58 Likewise.
59 * config/tc-sparc.c, config/tc-sparc.h (sparc_regname_to_dw2regnum):
60 Likewise.
61
62 2006-05-19 Nathan Sidwell <nathan@codesourcery.com>
63
64 * gas/config/tc-m68k.c (m68k_init_arch): Move checking of
65 cfloat/m68881 to correct architecture before using it.
66
67 2006-05-16 Bjoern Haase <bjoern.m.haase@web.de>
68
69 * config/tc-avr.h (TC_VALIDATE_FIX): Allow fixups for immediate
70 constant values.
71
72 2006-05-15 Paul Brook <paul@codesourcery.com>
73
74 * config/tc-arm.c (arm_adjust_symtab): Use
75 bfd_is_arm_special_symbol_name.
76
77 2006-05-15 Bob Wilson <bob.wilson@acm.org>
78
79 * config/tc-xtensa.c (is_direct_call_opcode, is_branch_jmp_to_next,
80 xg_assemble_vliw_tokens, xtensa_mark_narrow_branches,
81 xtensa_fix_short_loop_frags, is_local_forward_loop, relax_frag_immed):
82 Handle errors from calls to xtensa_opcode_is_* functions.
83
84 2006-05-14 Thiemo Seufer <ths@mips.com>
85
86 * config/tc-mips.c (macro_build): Test for currently active
87 mips16 option.
88 (mips16_ip): Reject invalid opcodes.
89
90 2006-05-11 Carlos O'Donell <carlos@codesourcery.com>
91
92 * doc/as.texinfo: Rename "Index" to "AS Index",
93 and "ABORT" to "ABORT (COFF)".
94
95 2006-05-11 Paul Brook <paul@codesourcery.com>
96
97 * config/tc-arm.c (parse_half): New function.
98 (operand_parse_code): Remove OP_Iffff. Add OP_HALF.
99 (parse_operands): Ditto.
100 (do_mov16): Reject invalid relocations.
101 (do_t_mov16): Ditto. Use Thumb reloc numbers.
102 (insns): Replace Iffff with HALF.
103 (md_apply_fix): Add MOVW and MOVT relocs.
104 (tc_gen_reloc): Ditto.
105 * doc/c-arm.texi: Document relocation operators
106
107 2006-05-11 Paul Brook <paul@codesourcery.com>
108
109 * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
110
111 2006-05-11 Thiemo Seufer <ths@mips.com>
112
113 * config/tc-mips.c (append_insn): Don't check the range of j or
114 jal addresses.
115
116 2006-05-11 Pedro Alves <pedro_alves@portugalmail.pt>
117
118 * config/tc-arm.c (md_pcrel_from_section): Force a bias for
119 relocs against external symbols for WinCE targets.
120 (md_apply_fix): Likewise.
121
122 2006-05-09 David Ung <davidu@mips.com>
123
124 * config/tc-mips.c (append_insn): Only warn about an out-of-range
125 j or jal address.
126
127 2006-05-09 Nick Clifton <nickc@redhat.com>
128
129 * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups
130 against symbols which are not going to be placed into the symbol
131 table.
132
133 2006-05-09 Ben Elliston <bje@au.ibm.com>
134
135 * expr.c (operand): Remove `if (0 && ..)' statement and
136 subsequently unused target_op label. Collapse `if (1 || ..)'
137 statement.
138 * app.c (do_scrub_chars): Remove unused case 0, as it is handled
139 separately above the switch.
140
141 2006-05-08 Nick Clifton <nickc@redhat.com>
142
143 PR gas/2623
144 * config/tc-msp430.c (line_separator_character): Define as |.
145
146 2006-05-08 Thiemo Seufer <ths@mips.com>
147 Nigel Stephens <nigel@mips.com>
148 David Ung <davidu@mips.com>
149
150 * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
151 (mips_opts): Likewise.
152 (file_ase_smartmips): New variable.
153 (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
154 (macro_build): Handle SmartMIPS instructions.
155 (mips_ip): Likewise.
156 (md_longopts): Add argument handling for smartmips.
157 (md_parse_options, mips_after_parse_args): Likewise.
158 (s_mipsset): Add .set smartmips support.
159 (md_show_usage): Document -msmartmips/-mno-smartmips.
160 * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
161 .set smartmips.
162 * doc/c-mips.texi: Likewise.
163
164 2006-05-08 Alan Modra <amodra@bigpond.net.au>
165
166 * write.c (relax_segment): Add pass count arg. Don't error on
167 negative org/space on first two passes.
168 (relax_seg_info): New struct.
169 (relax_seg, write_object_file): Adjust.
170 * write.h (relax_segment): Update prototype.
171
172 2006-05-05 Julian Brown <julian@codesourcery.com>
173
174 * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
175 checking.
176 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
177 architecture version checks.
178 (insns): Allow overlapping instructions to be used in VFP mode.
179
180 2006-05-05 H.J. Lu <hongjiu.lu@intel.com>
181
182 PR gas/2598
183 * config/obj-elf.c (obj_elf_change_section): Allow user
184 specified SHF_ALPHA_GPREL.
185
186 2006-05-05 Bjoern Haase <bjoern.m.haase@web.de>
187
188 * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups
189 for PMEM related expressions.
190
191 2006-05-05 Nick Clifton <nickc@redhat.com>
192
193 PR gas/2582
194 * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the
195 insertion of a directory separator character into a string at a
196 given offset. Uses heuristics to decide when to use a backslash
197 character rather than a forward-slash character.
198 (dwarf2_directive_loc): Use the macro.
199 (out_debug_info): Likewise.
200
201 2006-05-05 Thiemo Seufer <ths@mips.com>
202 David Ung <davidu@mips.com>
203
204 * config/tc-mips.c (macro_build): Add case 'k' to handle cache
205 instruction.
206 (macro): Add new case M_CACHE_AB.
207
208 2006-05-04 Kazu Hirata <kazu@codesourcery.com>
209
210 * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
211 (opcode_lookup): Issue a warning for opcode with
212 OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated
213 identical to OT_cinfix3.
214 (TxC3w, TC3w, tC3w): New.
215 (insns): Use tC3w and TC3w for comparison instructions with
216 's' suffix.
217
218 2006-05-04 Alan Modra <amodra@bigpond.net.au>
219
220 * subsegs.h (struct frchain): Delete frch_seg.
221 (frchain_root): Delete.
222 (seg_info): Define as macro.
223 * subsegs.c (frchain_root): Delete.
224 (abs_seg_info, und_seg_info, absolute_frchain): Delete.
225 (subsegs_begin, subseg_change): Adjust for above.
226 (subseg_set_rest): Likewise. Add new frchain structs to seginfo
227 rather than to one big list.
228 (subseg_get): Don't special case abs, und sections.
229 (subseg_new, subseg_force_new): Don't set frchainP here.
230 (seg_info): Delete.
231 (subsegs_print_statistics): Adjust frag chain control list traversal.
232 * debug.c (dmp_frags): Likewise.
233 * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
234 at frchain_root. Make use of known frchain ordering.
235 (last_frag_for_seg): Likewise.
236 (get_frag_fix): Likewise. Add seg param.
237 (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
238 * write.c (chain_frchains_together_1): Adjust for struct frchain.
239 (SUB_SEGMENT_ALIGN): Likewise.
240 (subsegs_finish): Adjust frchain list traversal.
241 * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
242 (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
243 (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
244 (xtensa_fix_b_j_loop_end_frags): Likewise.
245 (xtensa_fix_close_loop_end_frags): Likewise.
246 (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
247 (retrieve_segment_info): Delete frch_seg initialisation.
248
249 2006-05-03 Alan Modra <amodra@bigpond.net.au>
250
251 * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
252 * config/obj-elf.h (obj_sec_set_private_data): Delete.
253 * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
254 * config/tc-mn10300.c (tc_gen_reloc): Likewise.
255
256 2006-05-02 Joseph Myers <joseph@codesourcery.com>
257
258 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
259 here.
260 (md_apply_fix3): Multiply offset by 4 here for
261 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
262
263 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
264 Jan Beulich <jbeulich@novell.com>
265
266 * config/tc-i386.c (output_invalid_buf): Change size for
267 unsigned char.
268 * config/tc-tic30.c (output_invalid_buf): Likewise.
269
270 * config/tc-i386.c (output_invalid): Cast none-ascii char to
271 unsigned char.
272 * config/tc-tic30.c (output_invalid): Likewise.
273
274 2006-05-02 Daniel Jacobowitz <dan@codesourcery.com>
275
276 * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
277 (TEXI2POD): Use AM_MAKEINFOFLAGS.
278 (asconfig.texi): Don't set top_srcdir.
279 * doc/as.texinfo: Don't use top_srcdir.
280 * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
281
282 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
283
284 * config/tc-i386.c (output_invalid_buf): Change size to 16.
285 * config/tc-tic30.c (output_invalid_buf): Likewise.
286
287 * config/tc-i386.c (output_invalid): Use snprintf instead of
288 sprintf.
289 * config/tc-ia64.c (declare_register_set): Likewise.
290 (emit_one_bundle): Likewise.
291 (check_dependencies): Likewise.
292 * config/tc-tic30.c (output_invalid): Likewise.
293
294 2006-05-02 Paul Brook <paul@codesourcery.com>
295
296 * config/tc-arm.c (arm_optimize_expr): New function.
297 * config/tc-arm.h (md_optimize_expr): Define
298 (arm_optimize_expr): Add prototype.
299 (TC_FORCE_RELOCATION_SUB_SAME): Define.
300
301 2006-05-02 Ben Elliston <bje@au.ibm.com>
302
303 * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
304 field unsigned.
305
306 * sb.h (sb_list_vector): Move to sb.c.
307 * sb.c (free_list): Use type of sb_list_vector directly.
308 (sb_build): Fix off-by-one error in assertion about `size'.
309
310 2006-05-01 Ben Elliston <bje@au.ibm.com>
311
312 * listing.c (listing_listing): Remove useless loop.
313 * macro.c (macro_expand): Remove is_positional local variable.
314 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
315 and simplify surrounding expressions, where possible.
316 (assign_symbol): Likewise.
317 (s_weakref): Likewise.
318 * symbols.c (colon): Likewise.
319
320 2006-05-01 James Lemke <jwlemke@wasabisystems.com>
321
322 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
323
324 2006-04-30 Thiemo Seufer <ths@mips.com>
325 David Ung <davidu@mips.com>
326
327 * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
328 (mips_immed): New table that records various handling of udi
329 instruction patterns.
330 (mips_ip): Adds udi handling.
331
332 2006-04-28 Alan Modra <amodra@bigpond.net.au>
333
334 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
335 of list rather than beginning.
336
337 2006-04-26 Julian Brown <julian@codesourcery.com>
338
339 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
340 (is_quarter_float): Rename from above. Simplify slightly.
341 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
342 number.
343 (parse_neon_mov): Parse floating-point constants.
344 (neon_qfloat_bits): Fix encoding.
345 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
346 preference to integer encoding when using the F32 type.
347
348 2006-04-26 Julian Brown <julian@codesourcery.com>
349
350 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
351 zero-initialising structures containing it will lead to invalid types).
352 (arm_it): Add vectype to each operand.
353 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
354 defined field.
355 (neon_typed_alias): New structure. Extra information for typed
356 register aliases.
357 (reg_entry): Add neon type info field.
358 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
359 Break out alternative syntax for coprocessor registers, etc. into...
360 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
361 out from arm_reg_parse.
362 (parse_neon_type): Move. Return SUCCESS/FAIL.
363 (first_error): New function. Call to ensure first error which occurs is
364 reported.
365 (parse_neon_operand_type): Parse exactly one type.
366 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
367 (parse_typed_reg_or_scalar): New function. Handle core of both
368 arm_typed_reg_parse and parse_scalar.
369 (arm_typed_reg_parse): Parse a register with an optional type.
370 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
371 result.
372 (parse_scalar): Parse a Neon scalar with optional type.
373 (parse_reg_list): Use first_error.
374 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
375 (neon_alias_types_same): New function. Return true if two (alias) types
376 are the same.
377 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
378 of elements.
379 (insert_reg_alias): Return new reg_entry not void.
380 (insert_neon_reg_alias): New function. Insert type/index information as
381 well as register for alias.
382 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
383 make typed register aliases accordingly.
384 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
385 of line.
386 (s_unreq): Delete type information if present.
387 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
388 (s_arm_unwind_save_mmxwcg): Likewise.
389 (s_arm_unwind_movsp): Likewise.
390 (s_arm_unwind_setfp): Likewise.
391 (parse_shift): Likewise.
392 (parse_shifter_operand): Likewise.
393 (parse_address): Likewise.
394 (parse_tb): Likewise.
395 (tc_arm_regname_to_dw2regnum): Likewise.
396 (md_pseudo_table): Add dn, qn.
397 (parse_neon_mov): Handle typed operands.
398 (parse_operands): Likewise.
399 (neon_type_mask): Add N_SIZ.
400 (N_ALLMODS): New macro.
401 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
402 (el_type_of_type_chk): Add some safeguards.
403 (modify_types_allowed): Fix logic bug.
404 (neon_check_type): Handle operands with types.
405 (neon_three_same): Remove redundant optional arg handling.
406 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
407 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
408 (do_neon_step): Adjust accordingly.
409 (neon_cmode_for_logic_imm): Use first_error.
410 (do_neon_bitfield): Call neon_check_type.
411 (neon_dyadic): Rename to...
412 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
413 to allow modification of type of the destination.
414 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
415 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
416 (do_neon_compare): Make destination be an untyped bitfield.
417 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
418 (neon_mul_mac): Return early in case of errors.
419 (neon_move_immediate): Use first_error.
420 (neon_mac_reg_scalar_long): Fix type to include scalar.
421 (do_neon_dup): Likewise.
422 (do_neon_mov): Likewise (in several places).
423 (do_neon_tbl_tbx): Fix type.
424 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
425 (do_neon_ld_dup): Exit early in case of errors and/or use
426 first_error.
427 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
428 Handle .dn/.qn directives.
429 (REGDEF): Add zero for reg_entry neon field.
430
431 2006-04-26 Julian Brown <julian@codesourcery.com>
432
433 * config/tc-arm.c (limits.h): Include.
434 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
435 (fpu_vfp_v3_or_neon_ext): Declare constants.
436 (neon_el_type): New enumeration of types for Neon vector elements.
437 (neon_type_el): New struct. Define type and size of a vector element.
438 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
439 instruction.
440 (neon_type): Define struct. The type of an instruction.
441 (arm_it): Add 'vectype' for the current instruction.
442 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
443 (vfp_sp_reg_pos): Rename to...
444 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
445 tags.
446 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
447 (Neon D or Q register).
448 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
449 register.
450 (GE_OPT_PREFIX_BIG): Define constant, for use in...
451 (my_get_expression): Allow above constant as argument to accept
452 64-bit constants with optional prefix.
453 (arm_reg_parse): Add extra argument to return the specific type of
454 register in when either a D or Q register (REG_TYPE_NDQ) is
455 requested. Can be NULL.
456 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
457 (parse_reg_list): Update for new arm_reg_parse args.
458 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
459 (parse_neon_el_struct_list): New function. Parse element/structure
460 register lists for VLD<n>/VST<n> instructions.
461 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
462 (s_arm_unwind_save_mmxwr): Likewise.
463 (s_arm_unwind_save_mmxwcg): Likewise.
464 (s_arm_unwind_movsp): Likewise.
465 (s_arm_unwind_setfp): Likewise.
466 (parse_big_immediate): New function. Parse an immediate, which may be
467 64 bits wide. Put results in inst.operands[i].
468 (parse_shift): Update for new arm_reg_parse args.
469 (parse_address): Likewise. Add parsing of alignment specifiers.
470 (parse_neon_mov): Parse the operands of a VMOV instruction.
471 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
472 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
473 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
474 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
475 (parse_operands): Handle new codes above.
476 (encode_arm_vfp_sp_reg): Rename to...
477 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
478 selected VFP version only supports D0-D15.
479 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
480 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
481 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
482 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
483 encode_arm_vfp_reg name, and allow 32 D regs.
484 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
485 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
486 regs.
487 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
488 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
489 constant-load and conversion insns introduced with VFPv3.
490 (neon_tab_entry): New struct.
491 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
492 those which are the targets of pseudo-instructions.
493 (neon_opc): Enumerate opcodes, use as indices into...
494 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
495 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
496 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
497 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
498 neon_enc_tab.
499 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
500 Neon instructions.
501 (neon_type_mask): New. Compact type representation for type checking.
502 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
503 permitted type combinations.
504 (N_IGNORE_TYPE): New macro.
505 (neon_check_shape): New function. Check an instruction shape for
506 multiple alternatives. Return the specific shape for the current
507 instruction.
508 (neon_modify_type_size): New function. Modify a vector type and size,
509 depending on the bit mask in argument 1.
510 (neon_type_promote): New function. Convert a given "key" type (of an
511 operand) into the correct type for a different operand, based on a bit
512 mask.
513 (type_chk_of_el_type): New function. Convert a type and size into the
514 compact representation used for type checking.
515 (el_type_of_type_ckh): New function. Reverse of above (only when a
516 single bit is set in the bit mask).
517 (modify_types_allowed): New function. Alter a mask of allowed types
518 based on a bit mask of modifications.
519 (neon_check_type): New function. Check the type of the current
520 instruction against the variable argument list. The "key" type of the
521 instruction is returned.
522 (neon_dp_fixup): New function. Fill in and modify instruction bits for
523 a Neon data-processing instruction depending on whether we're in ARM
524 mode or Thumb-2 mode.
525 (neon_logbits): New function.
526 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
527 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
528 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
529 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
530 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
531 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
532 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
533 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
534 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
535 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
536 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
537 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
538 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
539 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
540 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
541 (neon_move_immediate, do_neon_mvn, neon_mixed_length)
542 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
543 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
544 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
545 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
546 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
547 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
548 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
549 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
550 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
551 helpers.
552 (parse_neon_type): New function. Parse Neon type specifier.
553 (opcode_lookup): Allow parsing of Neon type specifiers.
554 (REGNUM2, REGSETH, REGSET2): New macros.
555 (reg_names): Add new VFPv3 and Neon registers.
556 (NUF, nUF, NCE, nCE): New macros for opcode table.
557 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
558 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
559 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
560 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
561 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
562 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
563 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
564 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
565 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
566 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
567 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
568 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
569 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
570 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
571 fto[us][lh][sd].
572 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
573 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
574 (arm_option_cpu_value): Add vfp3 and neon.
575 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
576 VFPv1 attribute.
577
578 2006-04-25 Bob Wilson <bob.wilson@acm.org>
579
580 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
581 syntax instead of hardcoded opcodes with ".w18" suffixes.
582 (wide_branch_opcode): New.
583 (build_transition): Use it to check for wide branch opcodes with
584 either ".w18" or ".w15" suffixes.
585
586 2006-04-25 Bob Wilson <bob.wilson@acm.org>
587
588 * config/tc-xtensa.c (xtensa_create_literal_symbol,
589 xg_assemble_literal, xg_assemble_literal_space): Do not set the
590 frag's is_literal flag.
591
592 2006-04-25 Bob Wilson <bob.wilson@acm.org>
593
594 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
595
596 2006-04-23 Kazu Hirata <kazu@codesourcery.com>
597
598 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
599 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
600 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
601 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
602 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
603
604 2005-04-20 Paul Brook <paul@codesourcery.com>
605
606 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
607 all targets.
608 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
609
610 2006-04-19 Alan Modra <amodra@bigpond.net.au>
611
612 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
613 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
614 Make some cpus unsupported on ELF. Run "make dep-am".
615 * Makefile.in: Regenerate.
616
617 2006-04-19 Alan Modra <amodra@bigpond.net.au>
618
619 * configure.in (--enable-targets): Indent help message.
620 * configure: Regenerate.
621
622 2006-04-18 H.J. Lu <hongjiu.lu@intel.com>
623
624 PR gas/2533
625 * config/tc-i386.c (i386_immediate): Check illegal immediate
626 register operand.
627
628 2006-04-18 Alan Modra <amodra@bigpond.net.au>
629
630 * config/tc-i386.c: Formatting.
631 (output_disp, output_imm): ISO C90 params.
632
633 * frags.c (frag_offset_fixed_p): Constify args.
634 * frags.h (frag_offset_fixed_p): Ditto.
635
636 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
637 (COFF_MAGIC): Delete.
638
639 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
640
641 2006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
642
643 * po/POTFILES.in: Regenerated.
644
645 2006-04-16 Mark Mitchell <mark@codesourcery.com>
646
647 * doc/as.texinfo: Mention that some .type syntaxes are not
648 supported on all architectures.
649
650 2006-04-14 Sterling Augustine <sterling@tensilica.com>
651
652 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
653 instructions when such transformations have been disabled.
654
655 2006-04-10 Sterling Augustine <sterling@tensilica.com>
656
657 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
658 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
659 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
660 decoding the loop instructions. Remove current_offset variable.
661 (xtensa_fix_short_loop_frags): Likewise.
662 (min_bytes_to_other_loop_end): Remove current_offset argument.
663
664 2006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl>
665
666 * config/tc-z80.c (z80_optimize_expr): Removed.
667 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
668
669 2006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
670
671 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
672 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
673 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
674 atmega644, atmega329, atmega3290, atmega649, atmega6490,
675 atmega406, atmega640, atmega1280, atmega1281, at90can32,
676 at90can64, at90usb646, at90usb647, at90usb1286 and
677 at90usb1287.
678 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
679
680 2006-04-07 Paul Brook <paul@codesourcery.com>
681
682 * config/tc-arm.c (parse_operands): Set default error message.
683
684 2006-04-07 Paul Brook <paul@codesourcery.com>
685
686 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
687
688 2006-04-07 Paul Brook <paul@codesourcery.com>
689
690 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
691
692 2006-04-07 Paul Brook <paul@codesourcery.com>
693
694 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
695 (move_or_literal_pool): Handle Thumb-2 instructions.
696 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
697
698 2006-04-07 Alan Modra <amodra@bigpond.net.au>
699
700 PR 2512.
701 * config/tc-i386.c (match_template): Move 64-bit operand tests
702 inside loop.
703
704 2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
705
706 * po/Make-in: Add install-html target.
707 * Makefile.am: Add install-html and install-html-recursive targets.
708 * Makefile.in: Regenerate.
709 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
710 * configure: Regenerate.
711 * doc/Makefile.am: Add install-html and install-html-am targets.
712 * doc/Makefile.in: Regenerate.
713
714 2006-04-06 Alan Modra <amodra@bigpond.net.au>
715
716 * frags.c (frag_offset_fixed_p): Reinitialise offset before
717 second scan.
718
719 2006-04-05 Richard Sandiford <richard@codesourcery.com>
720 Daniel Jacobowitz <dan@codesourcery.com>
721
722 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
723 (GOTT_BASE, GOTT_INDEX): New.
724 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
725 GOTT_INDEX when generating VxWorks PIC.
726 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
727 use the generic *-*-vxworks* stanza instead.
728
729 2006-04-04 Alan Modra <amodra@bigpond.net.au>
730
731 PR 997
732 * frags.c (frag_offset_fixed_p): New function.
733 * frags.h (frag_offset_fixed_p): Declare.
734 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
735 (resolve_expression): Likewise.
736
737 2006-04-03 Sterling Augustine <sterling@tensilica.com>
738
739 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
740 of the same length but different numbers of slots.
741
742 2006-03-30 Andreas Schwab <schwab@suse.de>
743
744 * configure.in: Fix help string for --enable-targets option.
745 * configure: Regenerate.
746
747 2006-03-28 Nathan Sidwell <nathan@codesourcery.com>
748
749 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
750 (m68k_ip): ... here. Use for all chips. Protect against buffer
751 overrun and avoid excessive copying.
752
753 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
754 m68020_control_regs, m68040_control_regs, m68060_control_regs,
755 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
756 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
757 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
758 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
759 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
760 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
761 mcf5282_ctrl, mcfv4e_ctrl): ... these.
762 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
763 (struct m68k_cpu): Change chip field to control_regs.
764 (current_chip): Remove.
765 (control_regs): New.
766 (m68k_archs, m68k_extensions): Adjust.
767 (m68k_cpus): Reorder to be in cpu number order. Adjust.
768 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
769 (find_cf_chip): Reimplement for new organization of cpu table.
770 (select_control_regs): Remove.
771 (mri_chip): Adjust.
772 (struct save_opts): Save control regs, not chip.
773 (s_save, s_restore): Adjust.
774 (m68k_lookup_cpu): Give deprecated warning when necessary.
775 (m68k_init_arch): Adjust.
776 (md_show_usage): Adjust for new cpu table organization.
777
778 2006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
779
780 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
781 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
782 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
783 "elf/bfin.h".
784 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
785 (any_gotrel): New rule.
786 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
787 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
788 "elf/bfin.h".
789 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
790 (bfin_pic_ptr): New function.
791 (md_pseudo_table): Add it for ".picptr".
792 (OPTION_FDPIC): New macro.
793 (md_longopts): Add -mfdpic.
794 (md_parse_option): Handle it.
795 (md_begin): Set BFD flags.
796 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
797 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
798 us for GOT relocs.
799 * Makefile.am (bfin-parse.o): Update dependencies.
800 (DEPTC_bfin_elf): Likewise.
801 * Makefile.in: Regenerate.
802
803 2006-03-25 Richard Sandiford <richard@codesourcery.com>
804
805 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
806 mcfemac instead of mcfmac.
807
808 2006-03-23 Michael Matz <matz@suse.de>
809
810 * config/tc-i386.c (type_names): Correct placement of 'static'.
811 (reloc): Map some more relocs to their 64 bit counterpart when
812 size is 8.
813 (output_insn): Work around breakage if DEBUG386 is defined.
814 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
815 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
816 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
817 different from i386.
818 (output_imm): Ditto.
819 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
820 Imm64.
821 (md_convert_frag): Jumps can now be larger than 2GB away, error
822 out in that case.
823 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
824 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
825
826 2006-03-22 Richard Sandiford <richard@codesourcery.com>
827 Daniel Jacobowitz <dan@codesourcery.com>
828 Phil Edwards <phil@codesourcery.com>
829 Zack Weinberg <zack@codesourcery.com>
830 Mark Mitchell <mark@codesourcery.com>
831 Nathan Sidwell <nathan@codesourcery.com>
832
833 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
834 (md_begin): Complain about -G being used for PIC. Don't change
835 the text, data and bss alignments on VxWorks.
836 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
837 generating VxWorks PIC.
838 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
839 (macro): Likewise, but do not treat la $25 specially for
840 VxWorks PIC, and do not handle jal.
841 (OPTION_MVXWORKS_PIC): New macro.
842 (md_longopts): Add -mvxworks-pic.
843 (md_parse_option): Don't complain about using PIC and -G together here.
844 Handle OPTION_MVXWORKS_PIC.
845 (md_estimate_size_before_relax): Always use the first relaxation
846 sequence on VxWorks.
847 * config/tc-mips.h (VXWORKS_PIC): New.
848
849 2006-03-21 Paul Brook <paul@codesourcery.com>
850
851 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
852
853 2006-03-21 Sterling Augustine <sterling@tensilica.com>
854
855 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
856 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
857 (get_loop_align_size): New.
858 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
859 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
860 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
861 (get_noop_aligned_address): Use get_loop_align_size.
862 (get_aligned_diff): Likewise.
863
864 2006-03-21 Paul Brook <paul@codesourcery.com>
865
866 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
867
868 2006-03-20 Paul Brook <paul@codesourcery.com>
869
870 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
871 (do_t_branch): Encode branches inside IT blocks as unconditional.
872 (do_t_cps): New function.
873 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
874 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
875 (opcode_lookup): Allow conditional suffixes on all instructions in
876 Thumb mode.
877 (md_assemble): Advance condexec state before checking for errors.
878 (insns): Use do_t_cps.
879
880 2006-03-20 Paul Brook <paul@codesourcery.com>
881
882 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
883 outputting the insn.
884
885 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
886
887 * config/tc-vax.c: Update copyright year.
888 * config/tc-vax.h: Likewise.
889
890 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
891
892 * config/tc-vax.c (md_chars_to_number): Used only locally, so
893 make it static.
894 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
895
896 2006-03-17 Paul Brook <paul@codesourcery.com>
897
898 * config/tc-arm.c (insns): Add ldm and stm.
899
900 2006-03-17 Ben Elliston <bje@au.ibm.com>
901
902 PR gas/2446
903 * doc/as.texinfo (Ident): Document this directive more thoroughly.
904
905 2006-03-16 Paul Brook <paul@codesourcery.com>
906
907 * config/tc-arm.c (insns): Add "svc".
908
909 2006-03-13 Bob Wilson <bob.wilson@acm.org>
910
911 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
912 flag and avoid double underscore prefixes.
913
914 2006-03-10 Paul Brook <paul@codesourcery.com>
915
916 * config/tc-arm.c (md_begin): Handle EABIv5.
917 (arm_eabis): Add EF_ARM_EABI_VER5.
918 * doc/c-arm.texi: Document -meabi=5.
919
920 2006-03-10 Ben Elliston <bje@au.ibm.com>
921
922 * app.c (do_scrub_chars): Simplify string handling.
923
924 2006-03-07 Richard Sandiford <richard@codesourcery.com>
925 Daniel Jacobowitz <dan@codesourcery.com>
926 Zack Weinberg <zack@codesourcery.com>
927 Nathan Sidwell <nathan@codesourcery.com>
928 Paul Brook <paul@codesourcery.com>
929 Ricardo Anguiano <anguiano@codesourcery.com>
930 Phil Edwards <phil@codesourcery.com>
931
932 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
933 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
934 R_ARM_ABS12 reloc.
935 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
936 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
937 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
938
939 2006-03-06 Bob Wilson <bob.wilson@acm.org>
940
941 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
942 even when using the text-section-literals option.
943
944 2006-03-06 Nathan Sidwell <nathan@codesourcery.com>
945
946 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
947 and cf.
948 (m68k_ip): <case 'J'> Check we have some control regs.
949 (md_parse_option): Allow raw arch switch.
950 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
951 whether 68881 or cfloat was meant by -mfloat.
952 (md_show_usage): Adjust extension display.
953 (m68k_elf_final_processing): Adjust.
954
955 2006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
956
957 * config/tc-avr.c (avr_mod_hash_value): New function.
958 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
959 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
960 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
961 instead of int avr_ldi_expression: use avr_mod_hash_value instead
962 of (int).
963 (tc_gen_reloc): Handle substractions of symbols, if possible do
964 fixups, abort otherwise.
965 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
966 tc_fix_adjustable): Define.
967
968 2006-03-02 James E Wilson <wilson@specifix.com>
969
970 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
971 change the template, then clear md.slot[curr].end_of_insn_group.
972
973 2006-02-28 Jan Beulich <jbeulich@novell.com>
974
975 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
976
977 2006-02-28 Jan Beulich <jbeulich@novell.com>
978
979 PR/1070
980 * macro.c (getstring): Don't treat parentheses special anymore.
981 (get_any_string): Don't consider '(' and ')' as quoting anymore.
982 Special-case '(', ')', '[', and ']' when dealing with non-quoting
983 characters.
984
985 2006-02-28 Mat <mat@csail.mit.edu>
986
987 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
988
989 2006-02-27 Jakub Jelinek <jakub@redhat.com>
990
991 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
992 field.
993 (CFI_signal_frame): Define.
994 (cfi_pseudo_table): Add .cfi_signal_frame.
995 (dot_cfi): Handle CFI_signal_frame.
996 (output_cie): Handle cie->signal_frame.
997 (select_cie_for_fde): Don't share CIE if signal_frame flag is
998 different. Copy signal_frame from FDE to newly created CIE.
999 * doc/as.texinfo: Document .cfi_signal_frame.
1000
1001 2006-02-27 Carlos O'Donell <carlos@codesourcery.com>
1002
1003 * doc/Makefile.am: Add html target.
1004 * doc/Makefile.in: Regenerate.
1005 * po/Make-in: Add html target.
1006
1007 2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
1008
1009 * config/tc-i386.c (output_insn): Support Intel Merom New
1010 Instructions.
1011
1012 * config/tc-i386.h (CpuMNI): New.
1013 (CpuUnknownFlags): Add CpuMNI.
1014
1015 2006-02-24 David S. Miller <davem@sunset.davemloft.net>
1016
1017 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
1018 (hpriv_reg_table): New table for hyperprivileged registers.
1019 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
1020 register encoding.
1021
1022 2006-02-24 DJ Delorie <dj@redhat.com>
1023
1024 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
1025 (tc_gen_reloc): Don't define.
1026 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
1027 (OPTION_LINKRELAX): New.
1028 (md_longopts): Add it.
1029 (m32c_relax): New.
1030 (md_parse_options): Set it.
1031 (md_assemble): Emit relaxation relocs as needed.
1032 (md_convert_frag): Emit relaxation relocs as needed.
1033 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
1034 (m32c_apply_fix): New.
1035 (tc_gen_reloc): New.
1036 (m32c_force_relocation): Force out jump relocs when relaxing.
1037 (m32c_fix_adjustable): Return false if relaxing.
1038
1039 2006-02-24 Paul Brook <paul@codesourcery.com>
1040
1041 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
1042 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
1043 (struct asm_barrier_opt): Define.
1044 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
1045 (parse_psr): Accept V7M psr names.
1046 (parse_barrier): New function.
1047 (enum operand_parse_code): Add OP_oBARRIER.
1048 (parse_operands): Implement OP_oBARRIER.
1049 (do_barrier): New function.
1050 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
1051 (do_t_cpsi): Add V7M restrictions.
1052 (do_t_mrs, do_t_msr): Validate V7M variants.
1053 (md_assemble): Check for NULL variants.
1054 (v7m_psrs, barrier_opt_names): New tables.
1055 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
1056 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
1057 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
1058 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
1059 (struct cpu_arch_ver_table): Define.
1060 (cpu_arch_ver): New.
1061 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
1062 Tag_CPU_arch_profile.
1063 * doc/c-arm.texi: Document new cpu and arch options.
1064
1065 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1066
1067 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
1068
1069 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1070
1071 * config/tc-ia64.c: Update copyright years.
1072
1073 2006-02-22 H.J. Lu <hongjiu.lu@intel.com>
1074
1075 * config/tc-ia64.c (specify_resource): Add the rule 17 from
1076 SDM 2.2.
1077
1078 2005-02-22 Paul Brook <paul@codesourcery.com>
1079
1080 * config/tc-arm.c (do_pld): Remove incorrect write to
1081 inst.instruction.
1082 (encode_thumb32_addr_mode): Use correct operand.
1083
1084 2006-02-21 Paul Brook <paul@codesourcery.com>
1085
1086 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
1087
1088 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
1089 Anil Paranjape <anilp1@kpitcummins.com>
1090 Shilin Shakti <shilins@kpitcummins.com>
1091
1092 * Makefile.am: Add xc16x related entry.
1093 * Makefile.in: Regenerate.
1094 * configure.in: Added xc16x related entry.
1095 * configure: Regenerate.
1096 * config/tc-xc16x.h: New file
1097 * config/tc-xc16x.c: New file
1098 * doc/c-xc16x.texi: New file for xc16x
1099 * doc/all.texi: Entry for xc16x
1100 * doc/Makefile.texi: Added c-xc16x.texi
1101 * NEWS: Announce the support for the new target.
1102
1103 2006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
1104
1105 * configure.tgt: set emulation for mips-*-netbsd*
1106
1107 2006-02-14 Jakub Jelinek <jakub@redhat.com>
1108
1109 * config.in: Rebuilt.
1110
1111 2006-02-13 Bob Wilson <bob.wilson@acm.org>
1112
1113 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
1114 from 1, not 0, in error messages.
1115 (md_assemble): Simplify special-case check for ENTRY instructions.
1116 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
1117 operand in error message.
1118
1119 2006-02-13 Joseph S. Myers <joseph@codesourcery.com>
1120
1121 * configure.tgt (arm-*-linux-gnueabi*): Change to
1122 arm-*-linux-*eabi*.
1123
1124 2006-02-10 Nick Clifton <nickc@redhat.com>
1125
1126 * config/tc-crx.c (check_range): Ensure that the sign bit of a
1127 32-bit value is propagated into the upper bits of a 64-bit long.
1128
1129 * config/tc-arc.c (init_opcode_tables): Fix cast.
1130 (arc_extoper, md_operand): Likewise.
1131
1132 2006-02-09 David Heine <dlheine@tensilica.com>
1133
1134 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
1135 each relaxation step.
1136
1137 2006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
1138
1139 * configure.in (CHECK_DECLS): Add vsnprintf.
1140 * configure: Regenerate.
1141 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
1142 include/declare here, but...
1143 * as.h: Move code detecting VARARGS idiom to the top.
1144 (errno.h, stdarg.h, varargs.h, va_list): ...here.
1145 (vsnprintf): Declare if not already declared.
1146
1147 2006-02-08 H.J. Lu <hongjiu.lu@intel.com>
1148
1149 * as.c (close_output_file): New.
1150 (main): Register close_output_file with xatexit before
1151 dump_statistics. Don't call output_file_close.
1152
1153 2006-02-07 Nathan Sidwell <nathan@codesourcery.com>
1154
1155 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
1156 mcf5329_control_regs): New.
1157 (not_current_architecture, selected_arch, selected_cpu): New.
1158 (m68k_archs, m68k_extensions): New.
1159 (archs): Renamed to ...
1160 (m68k_cpus): ... here. Adjust.
1161 (n_arches): Remove.
1162 (md_pseudo_table): Add arch and cpu directives.
1163 (find_cf_chip, m68k_ip): Adjust table scanning.
1164 (no_68851, no_68881): Remove.
1165 (md_assemble): Lazily initialize.
1166 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
1167 (md_init_after_args): Move functionality to m68k_init_arch.
1168 (mri_chip): Adjust table scanning.
1169 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
1170 options with saner parsing.
1171 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
1172 m68k_init_arch): New.
1173 (s_m68k_cpu, s_m68k_arch): New.
1174 (md_show_usage): Adjust.
1175 (m68k_elf_final_processing): Set CF EF flags.
1176 * config/tc-m68k.h (m68k_init_after_args): Remove.
1177 (tc_init_after_args): Remove.
1178 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
1179 (M68k-Directives): Document .arch and .cpu directives.
1180
1181 2006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl>
1182
1183 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
1184 synonyms for equ and defl.
1185 (z80_cons_fix_new): New function.
1186 (emit_byte): Disallow relative jumps to absolute locations.
1187 (emit_data): Only handle defb, prototype changed, because defb is
1188 now handled as pseudo-op rather than an instruction.
1189 (instab): Entries for defb,defw,db,dw moved from here...
1190 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
1191 Add entries for def24,def32,d24,d32.
1192 (md_assemble): Improved error handling.
1193 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
1194 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
1195 (z80_cons_fix_new): Declare.
1196 * doc/c-z80.texi (defb, db): Mention warning on overflow.
1197 (def24,d24,def32,d32): New pseudo-ops.
1198
1199 2006-02-02 Paul Brook <paul@codesourcery.com>
1200
1201 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
1202
1203 2005-02-02 Paul Brook <paul@codesourcery.com>
1204
1205 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
1206 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
1207 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
1208 T2_OPCODE_RSB): Define.
1209 (thumb32_negate_data_op): New function.
1210 (md_apply_fix): Use it.
1211
1212 2006-01-31 Bob Wilson <bob.wilson@acm.org>
1213
1214 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
1215 fields.
1216 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
1217 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
1218 subtracted symbols.
1219 (relaxation_requirements): Add pfinish_frag argument and use it to
1220 replace setting tinsn->record_fix fields.
1221 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
1222 and vinsn_to_insnbuf. Remove references to record_fix and
1223 slot_sub_symbols fields.
1224 (xtensa_mark_narrow_branches): Delete unused code.
1225 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
1226 a symbol.
1227 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
1228 record_fix fields.
1229 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
1230 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
1231 of the record_fix field. Simplify error messages for unexpected
1232 symbolic operands.
1233 (set_expr_symbol_offset_diff): Delete.
1234
1235 2006-01-31 Paul Brook <paul@codesourcery.com>
1236
1237 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
1238
1239 2006-01-31 Paul Brook <paul@codesourcery.com>
1240 Richard Earnshaw <rearnsha@arm.com>
1241
1242 * config/tc-arm.c: Use arm_feature_set.
1243 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
1244 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
1245 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
1246 New variables.
1247 (insns): Use them.
1248 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
1249 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
1250 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
1251 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
1252 feature flags.
1253 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
1254 (arm_opts): Move old cpu/arch options from here...
1255 (arm_legacy_opts): ... to here.
1256 (md_parse_option): Search arm_legacy_opts.
1257 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
1258 (arm_float_abis, arm_eabis): Make const.
1259
1260 2006-01-25 Bob Wilson <bob.wilson@acm.org>
1261
1262 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
1263
1264 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1265
1266 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
1267 in load immediate intruction.
1268
1269 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1270
1271 * config/bfin-parse.y (value_match): Use correct conversion
1272 specifications in template string for __FILE__ and __LINE__.
1273 (binary): Ditto.
1274 (unary): Ditto.
1275
1276 2006-01-18 Alexandre Oliva <aoliva@redhat.com>
1277
1278 Introduce TLS descriptors for i386 and x86_64.
1279 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
1280 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
1281 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
1282 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
1283 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
1284 displacement bits.
1285 (build_modrm_byte): Set up zero modrm for TLS desc calls.
1286 (lex_got): Handle @tlsdesc and @tlscall.
1287 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
1288
1289 2006-01-11 Nick Clifton <nickc@redhat.com>
1290
1291 Fixes for building on 64-bit hosts:
1292 * config/tc-avr.c (mod_index): New union to allow conversion
1293 between pointers and integers.
1294 (md_begin, avr_ldi_expression): Use it.
1295 * config/tc-i370.c (md_assemble): Add cast for argument to print
1296 statement.
1297 * config/tc-tic54x.c (subsym_substitute): Likewise.
1298 * config/tc-mn10200.c (md_assemble): Use a union to convert the
1299 opindex field of fr_cgen structure into a pointer so that it can
1300 be stored in a frag.
1301 * config/tc-mn10300.c (md_assemble): Likewise.
1302 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
1303 types.
1304 * config/tc-v850.c: Replace uses of (int) casts with correct
1305 types.
1306
1307 2006-01-09 H.J. Lu <hongjiu.lu@intel.com>
1308
1309 PR gas/2117
1310 * symbols.c (snapshot_symbol): Don't change a defined symbol.
1311
1312 2006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
1313
1314 PR gas/2101
1315 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
1316 a local-label reference.
1317
1318 For older changes see ChangeLog-2005
1319 \f
1320 Local Variables:
1321 mode: change-log
1322 left-margin: 8
1323 fill-column: 74
1324 version-control: never
1325 End:
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