1 2006-09-20 Bob Wilson <bob.wilson@acm.org>
3 * doc/as.texinfo: Fix cross reference usage, typos and grammar.
4 (Overview): Skip cross reference in man page.
6 2006-09-20 Kai Tietz <Kai.Tietz@onevision.com>
8 * configure.in: Add new target x86_64-pc-mingw64.
9 * configure: Regenerate.
10 * configure.tgt: Add new target x86_64-pc-mingw64.
11 * config/obj-coff.h: Add handling for TE_PEP target specific code and definitions.
12 * config/tc-i386.c: Add new targets.
13 (md_parse_option): Add targets to OPTION_64.
14 (x86_64_target_format): Add new method for setup proper default target cpu mode.
15 * config/te-pep.h: Add new target definition header.
16 (TE_PEP): New macro: Identifies new target architecture.
17 (COFF_WITH_pex64): Set proper includes in bfd.
18 * NEWS: Mention new target.
20 2006-09-18 Bernd Schmidt <bernd.schmidt@analog.com>
22 * config/bfin-parse.y (binary): Change sub of const to add of negated
25 2006-09-17 Mei Ligang <ligang@sunnorth.com.cn>
27 * config/tc-score.c: New file.
28 * config/tc-score.h: Newf file.
29 * configure.tgt: Add Score target.
30 * Makefile.am: Add Score files.
31 * Makefile.in: Regenerate.
32 * NEWS: Mention new target support.
34 2006-09-16 Paul Brook <paul@codesourcery.com>
36 * config/tc-arm.c (s_arm_unwind_movsp): Add offset argument.
37 * doc/c-arm.texi (movsp): Document offset argument.
39 2006-09-16 Paul Brook <paul@codesourcery.com>
41 * config/tc-arm.c (thumb32_negate_data_op): Consistently use
42 unsigned int to avoid 64-bit host problems.
44 2006-09-15 Bernd Schmidt <bernd.schmidt@analog.com>
46 * config/bfin-parse.y (binary): Do some more constant folding for
49 2006-09-13 Jan Beulich <jbeulich@novell.com>
51 * input-file.c (input_file_give_next_buffer): Demote as_bad to
54 2006-09-13 Alan Modra <amodra@bigpond.net.au>
57 * config/tc-sh (DWARF2_CIE_DATA_ALIGNMENT): Wrap negative number
60 2006-09-13 Alan Modra <amodra@bigpond.net.au>
62 * input-file.c (input_file_open): Replace as_perror with as_bad
63 so that gas exits with error on file errors. Correct error
65 (input_file_get, input_file_give_next_buffer): Likewise.
66 * input-file.h: Update comment.
68 2006-09-11 Tomas Frydrych <dr.tomas@yahoo.co.uk>
71 * config/tc-arm.c (parse_typed_reg_or_scalar): Accept wCg class
72 registers as a sub-class of wC registers.
74 2006-09-11 Alan Modra <amodra@bigpond.net.au>
77 * config/tc-mips.h (enum dwarf2_format): Forward declare.
78 (DWARF2_CIE_DATA_ALIGNMENT): Wrap negative number in parens.
79 * config/tc-alpha.h (DWARF2_CIE_DATA_ALIGNMENT): Likewise.
80 * config/tc-arm.h (DWARF2_CIE_DATA_ALIGNMENT): Likewise.
82 2006-09-08 Nick Clifton <nickc@redhat.com>
85 * doc/as.texinfo (Macro): Improve documentation about separating
86 macro arguments from following text.
88 2006-09-08 Paul Brook <paul@codesourcery.com>
90 * config/tc-arm.c (insns): Allow ARM IT pseudo-insn on all cores.
92 2006-09-07 Paul Brook <paul@codesourcery.com>
94 * config/tc-arm.c (parse_operands): Mark operand as present.
96 2006-09-04 Paul Brook <paul@codesourcery.com>
98 * config/tc-arm.c (do_neon_dyadic_if_i): Remove.
99 (do_neon_dyadic_if_i_d): Avoid setting U bit.
100 (do_neon_mac_maybe_scalar): Ditto.
101 (do_neon_dyadic_narrow): Force operand type to NT_integer.
102 (insns): Remove out of date comments.
104 2006-08-29 Nick Clifton <nickc@redhat.com>
106 * read.c (s_align): Initialize the 'stopc' variable to prevent
107 compiler complaints about it being used without being
109 (s_comm_internal, s_mri_common, s_fail, s_globl, s_space,
110 s_float_space, s_struct, cons_worker, equals): Likewise.
112 2006-08-29 Malcolm Parsons <malcolm.parsons@gmail.com>
114 * ecoff.c (ecoff_directive_val): Fix message typo.
115 * config/tc-ns32k.c (convert_iif): Likewise.
116 * config/tc-sh64.c (shmedia_check_limits): Likewise.
118 2006-08-25 Sterling Augustine <sterling@tensilica.com>
119 Bob Wilson <bob.wilson@acm.org>
121 * config/tc-xtensa.c (xtensa_mark_literal_pool_location): Do not check
122 the state of the absolute_literals directive. Remove align frag at
123 the start of the literal pool position.
125 2006-08-25 Bob Wilson <bob.wilson@acm.org>
127 * doc/c-xtensa.texi: Add @group commands in examples.
129 2006-08-24 Bob Wilson <bob.wilson@acm.org>
131 * config/tc-xtensa.c (FINI_LITERAL_SECTION_NAME): Delete.
132 (INIT_LITERAL_SECTION_NAME): Delete.
133 (lit_state struct): Remove segment names, init_lit_seg, and
134 fini_lit_seg. Add lit_prefix and current_text_seg.
135 (init_literal_head_h, init_literal_head): Delete.
136 (fini_literal_head_h, fini_literal_head): Delete.
137 (xtensa_begin_directive): Move argument parsing to
138 xtensa_literal_prefix function.
139 (xtensa_end_directive): Deallocate lit_prefix field of lit_state.
140 (xtensa_literal_prefix): Parse the directive argument here and
141 record it in the lit_prefix field. Remove code to derive literal
144 (get_is_linkonce_section): Use linkonce_len. Check for any
145 ".gnu.linkonce.*" section, not just text sections.
146 (md_begin): Remove initialization of deleted lit_state fields.
147 (xtensa_reorder_segments, xtensa_post_relax_hook): Remove references
148 to init_literal_head and fini_literal_head.
149 (xtensa_move_literals): Likewise. Skip literals for .init and .fini
150 when traversing literal_head list.
151 (match_section_group): New.
152 (cache_literal_section): Rewrite to determine the literal section
153 name on the fly, create the section and return it.
154 (xtensa_switch_to_literal_fragment): Adjust for cache_literal_section.
155 (xtensa_switch_to_non_abs_literal_fragment): Likewise.
156 (xtensa_create_property_segments, xtensa_create_xproperty_segments):
157 Use xtensa_get_property_section from bfd.
158 (retrieve_xtensa_section): Delete.
159 * doc/c-xtensa.texi (Xtensa Options): Fix --text-section-literals
160 description to refer to plural literal sections and add xref to
161 the Literal Directive section.
162 (Literal Directive): Describe new rules for deriving literal section
163 names. Add footnote for special case of .init/.fini with
164 --text-section-literals.
165 (Literal Prefix Directive): Replace old naming rules with xref to the
166 Literal Directive section.
168 2006-08-21 Joseph Myers <joseph@codesourcery.com>
170 * config/tc-arm.c (s_arm_unwind_save_mmxwr): Correct condition for
171 merging with previous long opcode.
173 2006-08-22 Pedro Alves <pedro_alves@portugalmail.pt>
175 * Makefile.am (TARG_ENV_HFILES): Add te-wince-pe.h.
176 * Makefile.in: Regenerate.
177 * config/tc-arm.h [TARGET_FORMAT]: ARM wince bfd names were
180 2006-08-16 Julian Brown <julian@codesourcery.com>
182 * config/tc-arm.c (md_assemble): Improve diagnostic when attempting
183 to use ARM instructions on non-ARM-supporting cores.
184 (autoselect_thumb_from_cpu_variant): New function. Switch on Thumb
185 mode automatically based on cpu variant.
186 (md_begin): Call above function.
188 2006-08-16 Julian Brown <julian@codesourcery.com>
190 * config/tc-arm.c (opcode_lookup): Allow Neon type suffixes to be
191 recognized in non-unified syntax mode.
193 2006-08-15 Thiemo Seufer <ths@mips.com>
194 Nigel Stephens <nigel@mips.com>
195 David Ung <davidu@mips.com>
197 * configure.tgt: Handle mips*-sde-elf*.
199 2006-08-12 Thiemo Seufer <ths@networkno.de>
201 * config/tc-mips.c (mips16_ip): Fix argument register handling
202 for restore instruction.
204 2006-08-08 Bob Wilson <bob.wilson@acm.org>
206 * dwarf2dbg.c (DWARF2_USE_FIXED_ADVANCE_PC): New.
208 (out_fixed_inc_line_addr): New.
209 (process_entries): Use out_fixed_inc_line_addr when
210 DWARF2_USE_FIXED_ADVANCE_PC is set.
211 * config/tc-xtensa.h (DWARF2_USE_FIXED_ADVANCE_PC): Define.
213 2006-08-08 DJ Delorie <dj@redhat.com>
215 * config/tc-sh.c (sh_frob_section): Canonicalize pointers to local
216 vs full symbols so that we never have more than one pointer value
217 for any given symbol in our symbol table.
219 2006-08-08 Sterling Augustine <sterling@tensilica.com>
221 * dwarf2dbg.c (out_debug_info): Add new parameter ranges_seg
222 and emit DW_AT_ranges when code in compilation unit is not
224 (out_debug_abbrev): Emit DW_AT_ranges abbreviation if code in
226 (dwarf2_finish): Create and pass ranges_seg to out_debug_info.
227 (out_debug_ranges): New function to emit .debug_ranges section
228 when code is not contiguous.
230 2006-08-08 Nick Clifton <nickc@redhat.com>
232 * config/tc-arm.c (WARN_DEPRECATED): Enable.
234 2006-08-05 Pedro Alves <pedro_alves@portugalmail.pt>
236 * config/tc-arm.c: Move "dwarf2dbg.h" inclusion out of OBJ_ELF
238 (pe_directive_secrel) [TE_PE]: New function.
239 (md_pseudo_table) [!OBJ_ELF]: Handle 2byte, 4byte, 8byte, file,
240 loc, loc_mark_labels.
241 [TE_PE]: Handle secrel32.
242 (output_relax_insn): Remove OBJ_ELF around dwarf2_emit_insn
244 (output_inst): Remove OBJ_ELF around dwarf2_emit_insn call.
245 (arm_frob_label): Remove OBJ_ELF around dwarf2_emit_label call.
246 (md_section_align): Only round section sizes here for AOUT
248 (tc_arm_regname_to_dw2regnum): Move out for OBJ_ELF only block.
249 (tc_pe_dwarf2_emit_offset): New function.
250 (md_apply_fix) [TE_PE]: Handle BFD_RELOC_32_SECREL.
251 (cons_fix_new_arm): Handle O_secrel.
252 * config/tc-arm.h : Move DWARF2_LINE_MIN_INSN_LENGTH,
253 DWARF2_DEFAULT_RETURN_COLUMN and DWARF2_CIE_DATA_ALIGNMENT out
254 of OBJ_ELF only block.
255 [TE_PE]: Define O_secrel, TC_DWARF2_EMIT_OFFSET, and declare
256 tc_pe_dwarf2_emit_offset.
258 2006-08-04 Richard Sandiford <richard@codesourcery.com>
260 * config/tc-sh.c (apply_full_field_fix): New function.
261 (md_apply_fix): Use it instead of md_number_to_chars. Do not fill
262 in fx_addnumber for BFD_RELOC_32_PLT_PCREL.
263 (tc_gen_reloc): Use fx_addnumber rather than 0 as the default case.
264 * config/tc-sh.h (TARGET_FORMAT): Override for TE_VXWORKS.
266 2006-08-03 Nick Clifton <nickc@redhat.com>
269 * config.in: Regenerate.
271 2006-08-03 Joseph Myers <joseph@codesourcery.com>
273 * config/tc-arm.c (parse_operands): Handle invalid register name
276 2006-08-03 Joseph Myers <joseph@codesourcery.com>
278 * config/tc-arm.c (enum operand_parse_code): Add OP_RIWC_RIWG.
279 (parse_operands): Handle it.
280 (insns): Use it for tmcr and tmrc.
282 2006-08-02 Petr Salinger <Petr.Salinger@seznam.cz>
285 * config/tc-i386.c (md_parse_option): Treat any target starting
286 with elf64_x86_64 as a viable target for the -64 switch.
287 (i386_target_format): For 64-bit ELF flavoured output use
289 * config/tc-i386.h (ELF_TARGET_FORMAT64): Define.
291 2006-08-02 Nick Clifton <nickc@redhat.com>
294 * acinclude.m4 (BFD_BINARY_FOPEN): Import this function from
296 * configure.in: Run BFD_BINARY_FOPEN.
297 * configure: Regenerate.
298 * as.h: Look at USE_BINARY_FOPEN to decide which fopen-*.h header
301 2006-08-01 H.J. Lu <hongjiu.lu@intel.com>
303 * config/tc-i386.c (md_assemble): Don't update
306 2006-08-01 Thiemo Seufer <ths@mips.com>
308 * config/tc-mips.c (md_section_align): Check ELF-ness at runtime.
310 2006-08-01 Thiemo Seufer <ths@mips.com>
312 * config/tc-mips.c (macro_build_lui): Fix comment formatting.
313 (md_apply_fix): Likewise. Unify handling of BFD_RELOC_RVA,
314 BFD_RELOC_32 and BFD_RELOC_16.
315 (s_align, s_cpload, s_cplocal, s_cprestore, s_mips_stab,
316 md_convert_frag, md_obj_end): Fix comment formatting.
318 2006-07-31 Thiemo Seufer <ths@mips.com>
320 * config/tc-mips.c (md_apply_fix, tc_gen_reloc): Remove special
321 handling for BFD_RELOC_MIPS16_JMP.
323 2006-07-24 Andreas Schwab <schwab@suse.de>
326 * read.c (read_a_source_file): Ignore unknown text after line
327 comment character. Fix misleading comment.
329 2006-07-24 Ralk Wildenhues <Ralf.Wildenhues@gmx.de>
331 * doc/all.texi, doc/as.texinfo, doc/c-arc.texi, doc/c-arm.texi,
332 doc/c-avr.texi, doc/c-bfin.texi, doc/c-i386.texi,
333 doc/c-i960.texi, doc/c-m32r.texi, doc/c-m68k.texi,
334 doc/c-mmix.texi, doc/c-pdp11.texi, doc/c-ppc.texi,
335 doc/c-tic54x.texi, doc/c-v850.texi, doc/c-xtensa.texi,
336 doc/c-z80.texi, doc/internals.texi: Fix some typos.
338 2006-07-21 Nick Clifton <nickc@redhat.com>
340 * config/tc-sh.c (md_longopts): Add -EL and -EB for use by the
343 2006-07-20 Thiemo Seufer <ths@mips.com>
344 Nigel Stephens <nigel@mips.com>
346 * config/tc-mips.c (md_parse_option): Don't infer optimisation
347 options from debug options.
349 2006-07-20 Thiemo Seufer <ths@mips.com>
351 * config/tc-mips.c (mips_fix_adjustable): Handle BFD_RELOC_MIPS16_JMP.
352 (tc_gen_reloc): Handle mips16 jumps to section symbol offsets.
354 2006-07-19 Paul Brook <paul@codesourcery.com>
356 * config/tc-arm.c (insns): Fix rbit Arm opcode.
358 2006-07-18 Paul Brook <paul@codesourcery.com>
360 * tc-arm.c (do_t_add_sub): Use addw/subw when source is PC.
361 (md_convert_frag): Use correct reloc for add_pc. Use
362 BFD_RELOC_ARM_T32_ADD_IMM for normal add/sum.
363 (md_apply_fix): Handle BFD_RELOC_ARM_T32_ADD_IMM.
364 (arm_force_relocation): Handle BFD_RELOC_ARM_T32_ADD_IMM.
366 2006-07-17 Mat Hostetter <mat@lcs.mit.edu>
368 * symbols.c (report_op_error): Fix pasto. Don't use as_bad_where
369 when file and line unknown.
371 2006-07-17 Thiemo Seufer <ths@mips.com>
373 * read.c (s_struct): Use IS_ELF.
374 * config/tc-mips.c (md_begin, mips16_mark_labels, mips_ip,
375 md_parse_option, s_change_sec, pic_need_relax, mips_fix_adjustable,
376 tc_gen_reloc, mips_frob_file_after_relocs, s_mips_end, s_mips_frame,
377 s_mips_mask): Likewise.
379 2006-07-16 Thiemo Seufer <ths@mips.com>
380 David Ung <davidu@mips.com>
382 * read.c (s_struct): Handle ELF section changing.
383 * config/tc-mips.c (s_align): Leave enabling auto-align to the
385 (s_change_sec): Try section changing only if we output ELF.
387 2006-07-15 H.J. Lu <hongjiu.lu@intel.com>
389 * config/tc-i386.c (cpu_arch): Remove Cpu086, CpuAthlon and
391 (smallest_imm_type): Remove Cpu086.
392 (i386_target_format): Likewise.
394 * config/tc-i386.h: Remove Cpu086, CpuAthlon and CpuAmdFam10.
397 2006-07-13 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
398 Michael Meissner <michael.meissner@amd.com>
400 * config/tc-i386.h (PROCESSOR_AMDFAM10): New processor_type.
401 (CpuSSE4a, CpuABM, CpuAmdFam10): New Cpu directives.
402 * config/tc-i386.c (cpu_arch): Add support for AmdFam10
404 (i386_align_code): Ditto.
405 (md_assemble_code): Add support for insertq/extrq instructions,
406 swapping as needed for intel syntax.
407 (swap_imm_operands): New function to swap immediate operands.
408 (swap_operands): Deal with 4 operand instructions.
409 (build_modrm_byte): Add support for insertq instruction.
411 2006-07-13 H.J. Lu <hongjiu.lu@intel.com>
413 * config/tc-i386.h (Size64): Fix a typo in comment.
415 2006-07-12 Nick Clifton <nickc@redhat.com>
417 * config/tc-sh.c (md_apply_fix): Do not allow the generic code in
418 fixup_segment() to repeat a range check on a value that has
419 already been checked here.
421 2006-07-07 James E Wilson <wilson@specifix.com>
423 * config/tc-mips.c (mips_cpu_info_table): Add sb1a.
425 2006-07-06 Mohammed Adnène Trojette <adn@diwi.org>
426 Nick Clifton <nickc@redhat.com>
429 * doc/as.texi: Fix spelling typo: branchs => branches.
430 * doc/c-m68hc11.texi: Likewise.
431 * config/tc-m68hc11.c: Likewise.
432 Support old spelling of command line switch for backwards
435 2006-07-04 Thiemo Seufer <ths@mips.com>
436 David Ung <davidu@mips.com>
438 * config/tc-mips.c (s_is_linkonce): New function.
439 (mips16_mark_labels): Don't adjust mips16 symbol addresses for
440 weak, external, and linkonce symbols.
441 (pic_need_relax): Use s_is_linkonce.
443 2006-06-24 H.J. Lu <hongjiu.lu@intel.com>
445 * doc/as.texinfo (Org): Remove space.
446 (P2align): Add "@var{abs-expr},".
448 2006-06-23 H.J. Lu <hongjiu.lu@intel.com>
450 * config/tc-i386.c (cpu_arch_tune_set): New.
451 (cpu_arch_isa): Likewise.
452 (i386_align_code): Use xchg %ax,%ax for 2 byte nop. Optimize
453 nops with short or long nop sequences based on -march=/.arch
455 (set_cpu_arch): Set cpu_arch_isa. If cpu_arch_tune_set is 0,
456 set cpu_arch_tune and cpu_arch_tune_flags.
457 (md_parse_option): For -march=, set cpu_arch_isa and set
458 cpu_arch_tune and cpu_arch_tune_flags if cpu_arch_tune_set is
459 0. Set cpu_arch_tune_set to 1 for -mtune=.
460 (i386_target_format): Don't set cpu_arch_tune.
462 2006-06-23 Nigel Stephens <nigel@mips.com>
464 * config/tc-mips.c (nopic_need_relax): Handle -fdata-sections
465 generated .sbss.* and .gnu.linkonce.sb.*.
467 2006-06-23 Thiemo Seufer <ths@mips.com>
468 David Ung <davidu@mips.com>
470 * config/tc-mips.h (TC_SEGMENT_INFO_TYPE): Declare per-segment
472 * config/tc-mips.c (label_list): Define per-segment label_list.
473 (mips_clear_insn_labels, mips_move_labels, mips16_mark_labels,
474 append_insn, s_align, s_cons, s_float_cons, s_gpword, s_gpdword,
475 mips_from_file_after_relocs, mips_define_label): Use per-segment
478 2006-06-22 Thiemo Seufer <ths@mips.com>
480 * config/tc-mips.c (ISA_SUPPORTS_MIPS16E): New macro.
481 (append_insn): Use it.
482 (md_apply_fix): Whitespace formatting.
483 (md_begin, append_insn, macro, macro2, mips16_immed, mips_align,
484 mips16_extended_frag): Remove register specifier.
485 (md_convert_frag): Likewise. Use TRUE ans FALSE instead of numeric
488 2006-06-21 Mark Shinwell <shinwell@codesourcery.com>
490 * config/tc-arm.c (s_arm_unwind_save_vfp_armv6): New. Parse
491 a directive saving VFP registers for ARMv6 or later.
492 (s_arm_unwind_save): Add parameter arch_v6 and call
493 s_arm_unwind_save_vfp or s_arm_unwind_save_vfp_armv6 as
495 (md_pseudo_table): Add entry for new "vsave" directive.
496 * doc/c-arm.texi: Correct error in example for "save"
497 directive (fstmdf -> fstmdx). Also document "vsave" directive.
499 2006-06-18 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
500 Anatoly Sokolov <aesok@post.ru>
502 * config/tc-avr.c (mcu_types): Add support for atmega165p, atmega169p
503 and atmega644p devices. Rename atmega164/atmega324 devices to
504 atmega164p/atmega324p.
505 * doc/c-avr.texi: Document new mcu and arch options.
507 2006-06-17 Nick Clifton <nickc@redhat.com>
509 * config/tc-arm.c (enum parse_operand_result): Move outside of
510 #ifdef OBJ_ELF so that non-ELF targeted ARM ports can build.
512 2006-06-16 H.J. Lu <hongjiu.lu@intel.com>
514 * config/tc-i386.h (processor_type): New.
515 (arch_entry): Add type.
517 * config/tc-i386.c (cpu_arch_tune): New.
518 (cpu_arch_tune_flags): Likewise.
519 (cpu_arch_isa_flags): Likewise.
521 (set_cpu_arch): Also update cpu_arch_isa_flags.
522 (md_assemble): Update cpu_arch_isa_flags.
524 (OPTION_MTUNE): Likewise.
525 (md_longopts): Add -march= and -mtune=.
526 (md_parse_option): Support -march= and -mtune=.
527 (md_show_usage): Add -march=CPU/-mtune=CPU.
528 (i386_target_format): Also update cpu_arch_isa_flags,
529 cpu_arch_tune and cpu_arch_tune_flags.
531 * doc/as.texinfo: Add -march=CPU/-mtune=CPU.
533 * doc/c-i386.texi: Document -march=CPU/-mtune=CPU.
535 2006-06-15 Mark Shinwell <shinwell@codesourcery.com>
537 * config/tc-arm.c (enum parse_operand_result): New.
538 (struct group_reloc_table_entry): New.
539 (enum group_reloc_type): New.
540 (group_reloc_table): New array.
541 (find_group_reloc_table_entry): New function.
542 (parse_shifter_operand_group_reloc): New function.
543 (parse_address_main): New function, incorporating code
544 from the old parse_address function. To be used via...
545 (parse_address): wrapper for parse_address_main; and
546 (parse_address_group_reloc): new function, likewise.
547 (enum operand_parse_code): New codes OP_SHG, OP_ADDRGLDR,
548 OP_ADDRGLDRS, OP_ADDRGLDC.
549 (parse_operands): Support for these new operand codes.
550 New macro po_misc_or_fail_no_backtrack.
551 (encode_arm_cp_address): Preserve group relocations.
552 (insns): Modify to use the above operand codes where group
553 relocations are permitted.
554 (md_apply_fix): Handle the group relocations
555 ALU_PC_G0_NC through LDC_SB_G2.
556 (tc_gen_reloc): Likewise.
557 (arm_force_relocation): Leave group relocations for the linker.
558 (arm_fix_adjustable): Likewise.
560 2006-06-15 Julian Brown <julian@codesourcery.com>
562 * config/tc-arm.c (do_vfp_nsyn_ldr_str): Remove, fold into...
563 (do_neon_ldr_str): Always defer to VFP encoding routines, which handle
566 2006-06-12 H.J. Lu <hongjiu.lu@intel.com>
568 * config/tc-i386.c (process_suffix): Don't add rex64 for
571 2006-06-09 Thiemo Seufer <ths@mips.com>
573 * config/tc-mips.c (mips_ip): Maintain argument count.
575 2006-06-09 Alan Modra <amodra@bigpond.net.au>
577 * config/tc-iq2000.c: Include sb.h.
579 2006-06-08 Nigel Stephens <nigel@mips.com>
581 * config/tc-mips.c (mips_pseudo_table): Add "origin" and "repeat"
582 aliases for better compatibility with SGI tools.
584 2006-06-08 Alan Modra <amodra@bigpond.net.au>
586 * configure.in (BFDLIB, BFDVER_H, ALL_OBJ_DEPS): Delete.
587 * Makefile.am (GASLIBS): Expand @BFDLIB@.
589 (OBJS): Expand @ALL_OBJ_DEPS@. Depend on all fopen-*.h variants.
590 (obj-aout.o): Depend on $(DEP_@target_get_type@_aout)
591 (obj-coff.o, obj-ecoff.o, obj-elf.o): Similarly.
593 * dep-in.sed: Don't substitute bfdver.h. Do remove symcat.h.
594 * Makefile.in: Regenerate.
595 * doc/Makefile.in: Regenerate.
596 * configure: Regenerate.
598 2006-06-07 Joseph S. Myers <joseph@codesourcery.com>
600 * po/Make-in (pdf, ps): New dummy targets.
602 2006-06-07 Julian Brown <julian@codesourcery.com>
604 * config/tc-arm.c (stdarg.h): include.
605 (arm_it): Add uncond_value field. Add isvec and issingle to operand
607 (arm_reg_type): Add REG_TYPE_VFSD (single or double VFP reg) and
608 REG_TYPE_NSDQ (single, double or quad vector reg).
609 (reg_expected_msgs): Update.
610 (BAD_FPU): Add macro for unsupported FPU instruction error.
611 (parse_neon_type): Support 'd' as an alias for .f64.
612 (parse_typed_reg_or_scalar): Support REG_TYPE_VFSD, REG_TYPE_NSDQ
614 (parse_vfp_reg_list): Don't update first arg on error.
615 (parse_neon_mov): Support extra syntax for VFP moves.
616 (operand_parse_code): Add OP_RVSD, OP_RNSDQ, OP_VRSDLST, OP_RVSD_IO,
617 OP_RNSDQ_RNSC, OP_RVC_PSR, OP_APSR_RR, OP_oRNSDQ.
618 (parse_operands): Support isvec, issingle operands fields, new parse
620 (do_vfp_nsyn_mrs, do_vfp_nsyn_msr): New functions. Support VFP mrs,
622 (do_mrs, do_msr, do_t_mrs, do_t_msr): Add support for above.
623 (NEON_ENC_TAB): Add vnmul, vnmla, vnmls, vcmp, vcmpz, vcmpe, vcmpez.
624 (NEON_ENC_SINGLE, NEON_ENC_DOUBLE): Define macros.
625 (NEON_SHAPE_DEF): New macro. Define table of possible instruction
627 (neon_shape): Redefine in terms of above.
628 (neon_shape_class): New enumeration, table of shape classes.
629 (neon_shape_el): New enumeration. One element of a shape.
630 (neon_shape_el_size): Register widths of above, where appropriate.
631 (neon_shape_info): New struct. Info for shape table.
632 (neon_shape_tab): New array.
633 (neon_type_mask): Add N_F64, N_VFP. Update N_MAX_NONSPECIAL.
634 (neon_check_shape): Rewrite as...
635 (neon_select_shape): New function to classify instruction shapes,
636 driven by new table neon_shape_tab array.
637 (neon_quad): New function. Return 1 if shape should set Q flag in
638 instructions (or equivalent), 0 otherwise.
639 (type_chk_of_el_type): Support F64.
640 (el_type_of_type_chk): Likewise.
641 (neon_check_type): Add support for VFP type checking (VFP data
642 elements fill their containing registers).
643 (do_vfp_cond_or_thumb): Fill in condition field in ARM mode, or 0xE
644 in thumb mode for VFP instructions.
645 (do_vfp_nsyn_opcode): New function. Look up the opcode in argument,
646 and encode the current instruction as if it were that opcode.
647 (try_vfp_nsyn): New. If this looks like a VFP instruction with ARGS
648 arguments, call function in PFN.
649 (do_vfp_nsyn_add_sub, do_vfp_nsyn_mla_mls, do_vfp_nsyn_mul)
650 (do_vfp_nsyn_abs_neg, do_vfp_nsyn_ldm_stm, do_vfp_nsyn_ldr_str)
651 (do_vfp_nsyn_sqrt, do_vfp_nsyn_div, do_vfp_nsyn_nmul)
652 (do_vfp_nsyn_cmp, nsyn_insert_sp, do_vfp_nsyn_push)
653 (do_vfp_nsyn_pop, do_vfp_nsyn_cvt, do_vfp_nsyn_cvtz): New functions.
654 Redirect Neon-syntax VFP instructions to VFP instruction handlers.
655 (do_neon_dyadic_i_su, do_neon_dyadic_i64_su, do_neon_shl_imm)
656 (do_neon_qshl_imm, do_neon_logic, do_neon_bitfield)
657 (neon_dyadic_misc, neon_compare, do_neon_tst, do_neon_qdmulh)
658 (do_neon_fcmp_absolute, do_neon_step, do_neon_sli, do_neon_sri)
659 (do_neon_qshlu_imm, neon_move_immediate, do_neon_mvn, do_neon_ext)
660 (do_neon_rev, do_neon_dup, do_neon_rshift_round_imm, do_neon_trn)
661 (do_neon_zip_uzp, do_neon_sat_abs_neg, do_neon_pair_long)
662 (do_neon_recip_est, do_neon_cls, do_neon_clz, do_neon_cnt)
663 (do_neon_swp): Use neon_select_shape not neon_check_shape. Use
665 (vfp_or_neon_is_neon): New function. Call if a mnemonic shared
666 between VFP and Neon turns out to belong to Neon. Perform
667 architecture check and fill in condition field if appropriate.
668 (do_neon_addsub_if_i, do_neon_mac_maybe_scalar, do_neon_abs_neg)
669 (do_neon_cvt): Add support for VFP variants of instructions.
670 (neon_cvt_flavour): Extend to cover VFP conversions.
671 (do_neon_mov): Rewrite to use neon_select_shape. Add support for VFP
673 (do_neon_ldr_str): Handle single-precision VFP load/store.
674 (do_neon_ld_st_interleave, do_neon_ld_st_lane, do_neon_ld_dup): Use
675 NS_NULL not NS_IGNORE.
676 (opcode_tag): Add OT_csuffixF for operands which either take a
677 conditional suffix, or have 0xF in the condition field.
678 (md_assemble): Add support for OT_csuffixF.
679 (NCE): Replace macro with...
680 (NCE_tag, NCE, NCEF): New macros.
681 (nCE): Replace macro with...
682 (nCE_tag, nCE, nCEF): New macros.
683 (insns): Add support for VFP insns or VFP versions of insns msr,
684 mrs, vsqrt, vdiv, vnmul, vnmla, vnmls, vcmp, vcmpe, vpush, vpop,
685 vcvtz, vmul, vmla, vmls, vadd, vsub, vabs, vneg, vldm, vldmia,
686 vldbdb, vstm, vstmia, vstmdb, vldr, vstr, vcvt, vmov. Group shared
687 VFP/Neon insns together.
689 2006-06-07 Alan Modra <amodra@bigpond.net.au>
690 Ladislav Michl <ladis@linux-mips.org>
692 * app.c: Don't include headers already included by as.h.
694 * atof-generic.c: Likewise.
696 * dwarf2dbg.c: Likewise.
698 * input-file.c: Likewise.
699 * input-scrub.c: Likewise.
701 * output-file.c: Likewise.
704 * config/bfin-lex.l: Likewise.
705 * config/obj-coff.h: Likewise.
706 * config/obj-elf.h: Likewise.
707 * config/obj-som.h: Likewise.
708 * config/tc-arc.c: Likewise.
709 * config/tc-arm.c: Likewise.
710 * config/tc-avr.c: Likewise.
711 * config/tc-bfin.c: Likewise.
712 * config/tc-cris.c: Likewise.
713 * config/tc-d10v.c: Likewise.
714 * config/tc-d30v.c: Likewise.
715 * config/tc-dlx.h: Likewise.
716 * config/tc-fr30.c: Likewise.
717 * config/tc-frv.c: Likewise.
718 * config/tc-h8300.c: Likewise.
719 * config/tc-hppa.c: Likewise.
720 * config/tc-i370.c: Likewise.
721 * config/tc-i860.c: Likewise.
722 * config/tc-i960.c: Likewise.
723 * config/tc-ip2k.c: Likewise.
724 * config/tc-iq2000.c: Likewise.
725 * config/tc-m32c.c: Likewise.
726 * config/tc-m32r.c: Likewise.
727 * config/tc-maxq.c: Likewise.
728 * config/tc-mcore.c: Likewise.
729 * config/tc-mips.c: Likewise.
730 * config/tc-mmix.c: Likewise.
731 * config/tc-mn10200.c: Likewise.
732 * config/tc-mn10300.c: Likewise.
733 * config/tc-msp430.c: Likewise.
734 * config/tc-mt.c: Likewise.
735 * config/tc-ns32k.c: Likewise.
736 * config/tc-openrisc.c: Likewise.
737 * config/tc-ppc.c: Likewise.
738 * config/tc-s390.c: Likewise.
739 * config/tc-sh.c: Likewise.
740 * config/tc-sh64.c: Likewise.
741 * config/tc-sparc.c: Likewise.
742 * config/tc-tic30.c: Likewise.
743 * config/tc-tic4x.c: Likewise.
744 * config/tc-tic54x.c: Likewise.
745 * config/tc-v850.c: Likewise.
746 * config/tc-vax.c: Likewise.
747 * config/tc-xc16x.c: Likewise.
748 * config/tc-xstormy16.c: Likewise.
749 * config/tc-xtensa.c: Likewise.
750 * config/tc-z80.c: Likewise.
751 * config/tc-z8k.c: Likewise.
752 * macro.h: Don't include sb.h or ansidecl.h.
753 * sb.h: Don't include stdio.h or ansidecl.h.
754 * cond.c: Include sb.h.
755 * itbl-lex.l: Include as.h instead of other system headers.
756 * itbl-parse.y: Likewise.
757 * itbl-ops.c: Similarly.
758 * itbl-ops.h: Don't include as.h or ansidecl.h.
759 * config/bfin-defs.h: Don't include bfd.h or as.h.
760 * config/bfin-parse.y: Include as.h instead of other system headers.
762 2006-06-06 Ben Elliston <bje@au.ibm.com>
763 Anton Blanchard <anton@samba.org>
765 * config/tc-ppc.c (parse_cpu): Handle "-mpower6".
766 (md_show_usage): Document it.
767 (ppc_setup_opcodes): Test power6 opcode flag bits.
768 * doc/c-ppc.texi (PowerPC-Opts): Document "-mpower6".
770 2006-06-06 Thiemo Seufer <ths@mips.com>
771 Chao-ying Fu <fu@mips.com>
773 * config/tc-mips.c (ISA_SUPPORTS_DSP64): New macro.
774 (CPU_HAS_MIPS3D, CPU_HAS_MDMX, CPU_HAS_DSP, CPU_HAS_MT): Delete.
775 (macro_build): Update comment.
776 (mips_ip): Allow DSP64 instructions for MIPS64R2.
777 (mips_after_parse_args): Remove uses of CPU_HAS_MIPS3D and
779 (mips_cpu_info): Fix formatting. Add MIPS_CPU_ASE_MIPS3D and
780 MIPS_CPU_ASE_MDMX flags for sb1.
782 2006-06-05 Thiemo Seufer <ths@mips.com>
784 * config/tc-mips.c (macro_build): Use INSERT_OPERAND wherew
786 (mips16_macro_build): Use MIPS16_INSERT_OPERAND where appropriate.
787 (mips_ip): Make overflowed/underflowed constant arguments in DSP
788 and MT instructions a fatal error. Use INSERT_OPERAND where
789 appropriate. Improve warnings for break and wait code overflows.
790 Use symbolic constant of OP_MASK_COPZ.
791 (mips16_ip): Use MIPS16_INSERT_OPERAND where appropriate.
793 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
795 * po/Make-in (top_builddir): Define.
797 2006-06-02 Joseph S. Myers <joseph@codesourcery.com>
799 * doc/Makefile.am (TEXI2DVI): Define.
800 * doc/Makefile.in: Regenerate.
801 * doc/c-arc.texi: Fix typo.
803 2006-06-01 Alan Modra <amodra@bigpond.net.au>
805 * config/obj-ieee.c: Delete.
806 * config/obj-ieee.h: Delete.
807 * Makefile.am (OBJ_FORMATS): Remove ieee.
808 (OBJ_FORMAT_CFILES, OBJ_FORMAT_HFILES): Similarly.
809 (obj-ieee.o): Remove rule.
810 * Makefile.in: Regenerate.
811 * configure.in (atof): Remove tahoe.
812 (OBJ_MAYBE_IEEE): Don't define.
813 * configure: Regenerate.
814 * config.in: Regenerate.
815 * doc/Makefile.in: Regenerate.
816 * po/POTFILES.in: Regenerate.
818 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
820 * Makefile.am: Replace INTLLIBS and INTLDEPS with LIBINTL
821 and LIBINTL_DEP everywhere.
823 (INCLUDES, DEP_INCLUDES): Use @INCINTL@.
824 * acinclude.m4: Include new gettext macros.
825 * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
826 Remove local code for po/Makefile.
827 * Makefile.in, configure, doc/Makefile.in: Regenerated.
829 2006-05-30 Nick Clifton <nickc@redhat.com>
831 * po/es.po: Updated Spanish translation.
833 2006-05-06 Denis Chertykov <denisc@overta.ru>
835 * doc/c-avr.texi: New file.
836 * doc/Makefile.am (CPU_DOCS): Add c-avr.texi
837 * doc/all.texi: Set AVR
838 * doc/as.texinfo: Include c-avr.texi
840 2006-05-28 Jie Zhang <jie.zhang@analog.com>
842 * config/bfin-parse.y (check_macfunc): Loose the condition of
843 calling check_multiply_halfregs ().
845 2006-05-25 Jie Zhang <jie.zhang@analog.com>
847 * config/bfin-parse.y (asm_1): Better check and deal with
848 vector and scalar Multiply 16-Bit Operands instructions.
850 2006-05-24 Nick Clifton <nickc@redhat.com>
852 * config/tc-hppa.c: Convert to ISO C90 format.
853 * config/tc-hppa.h: Likewise.
855 2006-05-24 Carlos O'Donell <carlos@systemhalted.org>
856 Randolph Chung <randolph@tausq.org>
858 * config/tc-hppa.c (is_tls_gdidx, is_tls_ldidx, is_tls_dtpoff,
859 is_tls_ieoff, is_tls_leoff): Define.
860 (fix_new_hppa): Handle TLS.
861 (cons_fix_new_hppa): Likewise.
863 (md_apply_fix): Handle TLS relocs.
864 * config/tc-hppa.h (hppa_fix_adjustable): Handle TLS.
866 2006-05-24 Bjoern Haase <bjoern.m.haase@web.de>
868 * config/tc-avr.c: Add new cpu targets avr6, avr2560 and avr2561.
870 2006-05-23 Thiemo Seufer <ths@mips.com>
871 David Ung <davidu@mips.com>
872 Nigel Stephens <nigel@mips.com>
875 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS): Rename.
876 (ISA_SUPPORTS_DSP_ASE, ISA_SUPPORTS_MT_ASE, ISA_HAS_64BIT_FPRS,
877 ISA_HAS_MXHC1): New macros.
878 (HAVE_32BIT_FPRS): Use ISA_HAS_64BIT_FPRS instead of
879 ISA_HAS_64BIT_REGS. Formatting fixes. Improved comments.
880 (mips_cpu_info): Change to use combined ASE/IS_ISA flag.
881 (MIPS_CPU_IS_ISA, MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP,
882 MIPS_CPU_ASE_MT, MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX): New defines.
883 (mips_after_parse_args): Change default handling of float register
884 size to account for 32bit code with 64bit FP. Better sanity checking
885 of ISA/ASE/ABI option combinations.
886 (s_mipsset): Support switching of GPR and FPR sizes via
887 .set {g,f}p={32,64,default}. Better sanity checking for .set ASE
889 (mips_elf_final_processing): We should record the use of 64bit FP
890 registers in 32bit code but we don't, because ELF header flags are
892 (mips_cpu_info_table): Add ASE flags for CPUs with mandatory ASE
893 extensions. Add 4ksc, 4kec, 4kem, 4kep, 4ksd, m4kp, 24kec, 24kef,
894 24kex, 34kc, 34kf, 34kx, 25kf CPU definitions.
895 (mips_cpu_info_from_isa): Use MIPS_CPU_IS_ISA.
896 * doc/c-mips.texi: Document .set {g,f}p={32,64,default}. Document
897 missing -march options. Document .set arch=CPU. Move .set smartmips
898 to ASE page. Use @code for .set FOO examples.
900 2006-05-23 Jie Zhang <jie.zhang@analog.com>
902 * config/tc-bfin.c (bfin_start_line_hook): Bump line counters
905 2006-05-23 Jie Zhang <jie.zhang@analog.com>
907 * config/bfin-defs.h (bfin_equals): Remove declaration.
908 * config/bfin-parse.y (asm_1): Remove "expr ASSIGN expr".
909 * config/tc-bfin.c (bfin_name_is_register): Remove.
910 (bfin_equals): Remove.
911 * config/tc-bfin.h (TC_EQUAL_IN_INSN): Redefine as 1.
912 (bfin_name_is_register): Remove declaration.
914 2006-05-19 Thiemo Seufer <ths@mips.com>
915 Nigel Stephens <nigel@mips.com>
917 * config/tc-mipc.c (ISA_HAS_ODD_SINGLE_FPR): New define.
918 (mips_oddfpreg_ok): New function.
921 2006-05-19 Thiemo Seufer <ths@mips.com>
922 David Ung <davidu@mips.com>
924 * config/tc-mips.h (tc_mips_regname_to_dw2regnum): Declare.
925 * config/tc-mipc.c (ABI_NEEDS_64BIT_REGS, ISA_HAS_64BIT_REGS,
926 ISA_HAS_DROR, ISA_HAS_ROR): Reformat.
927 (regname, RTYPE_MASK, RTYPE_NUM, RTYPE_FPU, RTYPE_FCC, RTYPE_VEC,
928 RTYPE_GP, RTYPE_CP0, RTYPE_PC, RTYPE_ACC, RTYPE_CCC, RNUM_MASK,
929 RWARN, GENERIC_REGISTER_NUMBERS, FPU_REGISTER_NAMES,
930 FPU_CONDITION_CODE_NAMES, COPROC_CONDITION_CODE_NAMES,
931 N32N64_SYMBOLIC_REGISTER_NAMES, O32_SYMBOLIC_REGISTER_NAMES,
932 SYMBOLIC_REGISTER_NAMES, MIPS16_SPECIAL_REGISTER_NAMES,
933 MDMX_VECTOR_REGISTER_NAMES, MIPS_DSP_ACCUMULATOR_NAMES, reg_names,
934 reg_names_o32, reg_names_n32n64): Define register classes.
935 (reg_lookup): New function, use register classes.
936 (md_begin): Reserve register names in the symbol table. Simplify
938 (mips_ip): Fix comment formatting. Handle symbolic COP0 registers.
940 (mips16_ip): Use reg_lookup.
941 (tc_get_register): Likewise.
942 (tc_mips_regname_to_dw2regnum): New function.
944 2006-05-19 Thiemo Seufer <ths@mips.com>
946 * config/tc-arm.c, config/tc-arm.h (tc_arm_regname_to_dw2regnum):
947 Un-constify string argument.
948 * config/tc-i386.c, config/tc-i386.h (tc_x86_regname_to_dw2regnum):
950 * config/tc-m68k.c, config/tc-m68k.h (tc_m68k_regname_to_dw2regnum):
952 * config/tc-ppc.c, config/tc-ppc.h (tc_ppc_regname_to_dw2regnum):
954 * config/tc-s390.c, config/tc-s390.h (tc_s390_regname_to_dw2regnum):
956 * config/tc-sh.c, config/tc-sh.h (sh_regname_to_dw2regnum):
958 * config/tc-sparc.c, config/tc-sparc.h (sparc_regname_to_dw2regnum):
961 2006-05-19 Nathan Sidwell <nathan@codesourcery.com>
963 * gas/config/tc-m68k.c (m68k_init_arch): Move checking of
964 cfloat/m68881 to correct architecture before using it.
966 2006-05-16 Bjoern Haase <bjoern.m.haase@web.de>
968 * config/tc-avr.h (TC_VALIDATE_FIX): Allow fixups for immediate
971 2006-05-15 Paul Brook <paul@codesourcery.com>
973 * config/tc-arm.c (arm_adjust_symtab): Use
974 bfd_is_arm_special_symbol_name.
976 2006-05-15 Bob Wilson <bob.wilson@acm.org>
978 * config/tc-xtensa.c (is_direct_call_opcode, is_branch_jmp_to_next,
979 xg_assemble_vliw_tokens, xtensa_mark_narrow_branches,
980 xtensa_fix_short_loop_frags, is_local_forward_loop, relax_frag_immed):
981 Handle errors from calls to xtensa_opcode_is_* functions.
983 2006-05-14 Thiemo Seufer <ths@mips.com>
985 * config/tc-mips.c (macro_build): Test for currently active
987 (mips16_ip): Reject invalid opcodes.
989 2006-05-11 Carlos O'Donell <carlos@codesourcery.com>
991 * doc/as.texinfo: Rename "Index" to "AS Index",
992 and "ABORT" to "ABORT (COFF)".
994 2006-05-11 Paul Brook <paul@codesourcery.com>
996 * config/tc-arm.c (parse_half): New function.
997 (operand_parse_code): Remove OP_Iffff. Add OP_HALF.
998 (parse_operands): Ditto.
999 (do_mov16): Reject invalid relocations.
1000 (do_t_mov16): Ditto. Use Thumb reloc numbers.
1001 (insns): Replace Iffff with HALF.
1002 (md_apply_fix): Add MOVW and MOVT relocs.
1003 (tc_gen_reloc): Ditto.
1004 * doc/c-arm.texi: Document relocation operators
1006 2006-05-11 Paul Brook <paul@codesourcery.com>
1008 * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
1010 2006-05-11 Thiemo Seufer <ths@mips.com>
1012 * config/tc-mips.c (append_insn): Don't check the range of j or
1015 2006-05-11 Pedro Alves <pedro_alves@portugalmail.pt>
1017 * config/tc-arm.c (md_pcrel_from_section): Force a bias for
1018 relocs against external symbols for WinCE targets.
1019 (md_apply_fix): Likewise.
1021 2006-05-09 David Ung <davidu@mips.com>
1023 * config/tc-mips.c (append_insn): Only warn about an out-of-range
1026 2006-05-09 Nick Clifton <nickc@redhat.com>
1028 * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups
1029 against symbols which are not going to be placed into the symbol
1032 2006-05-09 Ben Elliston <bje@au.ibm.com>
1034 * expr.c (operand): Remove `if (0 && ..)' statement and
1035 subsequently unused target_op label. Collapse `if (1 || ..)'
1037 * app.c (do_scrub_chars): Remove unused case 0, as it is handled
1038 separately above the switch.
1040 2006-05-08 Nick Clifton <nickc@redhat.com>
1043 * config/tc-msp430.c (line_separator_character): Define as |.
1045 2006-05-08 Thiemo Seufer <ths@mips.com>
1046 Nigel Stephens <nigel@mips.com>
1047 David Ung <davidu@mips.com>
1049 * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
1050 (mips_opts): Likewise.
1051 (file_ase_smartmips): New variable.
1052 (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
1053 (macro_build): Handle SmartMIPS instructions.
1054 (mips_ip): Likewise.
1055 (md_longopts): Add argument handling for smartmips.
1056 (md_parse_options, mips_after_parse_args): Likewise.
1057 (s_mipsset): Add .set smartmips support.
1058 (md_show_usage): Document -msmartmips/-mno-smartmips.
1059 * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
1061 * doc/c-mips.texi: Likewise.
1063 2006-05-08 Alan Modra <amodra@bigpond.net.au>
1065 * write.c (relax_segment): Add pass count arg. Don't error on
1066 negative org/space on first two passes.
1067 (relax_seg_info): New struct.
1068 (relax_seg, write_object_file): Adjust.
1069 * write.h (relax_segment): Update prototype.
1071 2006-05-05 Julian Brown <julian@codesourcery.com>
1073 * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
1075 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
1076 architecture version checks.
1077 (insns): Allow overlapping instructions to be used in VFP mode.
1079 2006-05-05 H.J. Lu <hongjiu.lu@intel.com>
1082 * config/obj-elf.c (obj_elf_change_section): Allow user
1083 specified SHF_ALPHA_GPREL.
1085 2006-05-05 Bjoern Haase <bjoern.m.haase@web.de>
1087 * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups
1088 for PMEM related expressions.
1090 2006-05-05 Nick Clifton <nickc@redhat.com>
1093 * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the
1094 insertion of a directory separator character into a string at a
1095 given offset. Uses heuristics to decide when to use a backslash
1096 character rather than a forward-slash character.
1097 (dwarf2_directive_loc): Use the macro.
1098 (out_debug_info): Likewise.
1100 2006-05-05 Thiemo Seufer <ths@mips.com>
1101 David Ung <davidu@mips.com>
1103 * config/tc-mips.c (macro_build): Add case 'k' to handle cache
1105 (macro): Add new case M_CACHE_AB.
1107 2006-05-04 Kazu Hirata <kazu@codesourcery.com>
1109 * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
1110 (opcode_lookup): Issue a warning for opcode with
1111 OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated
1112 identical to OT_cinfix3.
1113 (TxC3w, TC3w, tC3w): New.
1114 (insns): Use tC3w and TC3w for comparison instructions with
1117 2006-05-04 Alan Modra <amodra@bigpond.net.au>
1119 * subsegs.h (struct frchain): Delete frch_seg.
1120 (frchain_root): Delete.
1121 (seg_info): Define as macro.
1122 * subsegs.c (frchain_root): Delete.
1123 (abs_seg_info, und_seg_info, absolute_frchain): Delete.
1124 (subsegs_begin, subseg_change): Adjust for above.
1125 (subseg_set_rest): Likewise. Add new frchain structs to seginfo
1126 rather than to one big list.
1127 (subseg_get): Don't special case abs, und sections.
1128 (subseg_new, subseg_force_new): Don't set frchainP here.
1130 (subsegs_print_statistics): Adjust frag chain control list traversal.
1131 * debug.c (dmp_frags): Likewise.
1132 * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
1133 at frchain_root. Make use of known frchain ordering.
1134 (last_frag_for_seg): Likewise.
1135 (get_frag_fix): Likewise. Add seg param.
1136 (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
1137 * write.c (chain_frchains_together_1): Adjust for struct frchain.
1138 (SUB_SEGMENT_ALIGN): Likewise.
1139 (subsegs_finish): Adjust frchain list traversal.
1140 * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
1141 (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
1142 (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
1143 (xtensa_fix_b_j_loop_end_frags): Likewise.
1144 (xtensa_fix_close_loop_end_frags): Likewise.
1145 (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
1146 (retrieve_segment_info): Delete frch_seg initialisation.
1148 2006-05-03 Alan Modra <amodra@bigpond.net.au>
1150 * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
1151 * config/obj-elf.h (obj_sec_set_private_data): Delete.
1152 * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
1153 * config/tc-mn10300.c (tc_gen_reloc): Likewise.
1155 2006-05-02 Joseph Myers <joseph@codesourcery.com>
1157 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
1159 (md_apply_fix3): Multiply offset by 4 here for
1160 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
1162 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
1163 Jan Beulich <jbeulich@novell.com>
1165 * config/tc-i386.c (output_invalid_buf): Change size for
1167 * config/tc-tic30.c (output_invalid_buf): Likewise.
1169 * config/tc-i386.c (output_invalid): Cast none-ascii char to
1171 * config/tc-tic30.c (output_invalid): Likewise.
1173 2006-05-02 Daniel Jacobowitz <dan@codesourcery.com>
1175 * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
1176 (TEXI2POD): Use AM_MAKEINFOFLAGS.
1177 (asconfig.texi): Don't set top_srcdir.
1178 * doc/as.texinfo: Don't use top_srcdir.
1179 * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
1181 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
1183 * config/tc-i386.c (output_invalid_buf): Change size to 16.
1184 * config/tc-tic30.c (output_invalid_buf): Likewise.
1186 * config/tc-i386.c (output_invalid): Use snprintf instead of
1188 * config/tc-ia64.c (declare_register_set): Likewise.
1189 (emit_one_bundle): Likewise.
1190 (check_dependencies): Likewise.
1191 * config/tc-tic30.c (output_invalid): Likewise.
1193 2006-05-02 Paul Brook <paul@codesourcery.com>
1195 * config/tc-arm.c (arm_optimize_expr): New function.
1196 * config/tc-arm.h (md_optimize_expr): Define
1197 (arm_optimize_expr): Add prototype.
1198 (TC_FORCE_RELOCATION_SUB_SAME): Define.
1200 2006-05-02 Ben Elliston <bje@au.ibm.com>
1202 * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
1205 * sb.h (sb_list_vector): Move to sb.c.
1206 * sb.c (free_list): Use type of sb_list_vector directly.
1207 (sb_build): Fix off-by-one error in assertion about `size'.
1209 2006-05-01 Ben Elliston <bje@au.ibm.com>
1211 * listing.c (listing_listing): Remove useless loop.
1212 * macro.c (macro_expand): Remove is_positional local variable.
1213 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
1214 and simplify surrounding expressions, where possible.
1215 (assign_symbol): Likewise.
1216 (s_weakref): Likewise.
1217 * symbols.c (colon): Likewise.
1219 2006-05-01 James Lemke <jwlemke@wasabisystems.com>
1221 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
1223 2006-04-30 Thiemo Seufer <ths@mips.com>
1224 David Ung <davidu@mips.com>
1226 * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
1227 (mips_immed): New table that records various handling of udi
1228 instruction patterns.
1229 (mips_ip): Adds udi handling.
1231 2006-04-28 Alan Modra <amodra@bigpond.net.au>
1233 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
1234 of list rather than beginning.
1236 2006-04-26 Julian Brown <julian@codesourcery.com>
1238 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
1239 (is_quarter_float): Rename from above. Simplify slightly.
1240 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
1242 (parse_neon_mov): Parse floating-point constants.
1243 (neon_qfloat_bits): Fix encoding.
1244 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
1245 preference to integer encoding when using the F32 type.
1247 2006-04-26 Julian Brown <julian@codesourcery.com>
1249 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
1250 zero-initialising structures containing it will lead to invalid types).
1251 (arm_it): Add vectype to each operand.
1252 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
1254 (neon_typed_alias): New structure. Extra information for typed
1256 (reg_entry): Add neon type info field.
1257 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
1258 Break out alternative syntax for coprocessor registers, etc. into...
1259 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
1260 out from arm_reg_parse.
1261 (parse_neon_type): Move. Return SUCCESS/FAIL.
1262 (first_error): New function. Call to ensure first error which occurs is
1264 (parse_neon_operand_type): Parse exactly one type.
1265 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
1266 (parse_typed_reg_or_scalar): New function. Handle core of both
1267 arm_typed_reg_parse and parse_scalar.
1268 (arm_typed_reg_parse): Parse a register with an optional type.
1269 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
1271 (parse_scalar): Parse a Neon scalar with optional type.
1272 (parse_reg_list): Use first_error.
1273 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
1274 (neon_alias_types_same): New function. Return true if two (alias) types
1276 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
1278 (insert_reg_alias): Return new reg_entry not void.
1279 (insert_neon_reg_alias): New function. Insert type/index information as
1280 well as register for alias.
1281 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
1282 make typed register aliases accordingly.
1283 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
1285 (s_unreq): Delete type information if present.
1286 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
1287 (s_arm_unwind_save_mmxwcg): Likewise.
1288 (s_arm_unwind_movsp): Likewise.
1289 (s_arm_unwind_setfp): Likewise.
1290 (parse_shift): Likewise.
1291 (parse_shifter_operand): Likewise.
1292 (parse_address): Likewise.
1293 (parse_tb): Likewise.
1294 (tc_arm_regname_to_dw2regnum): Likewise.
1295 (md_pseudo_table): Add dn, qn.
1296 (parse_neon_mov): Handle typed operands.
1297 (parse_operands): Likewise.
1298 (neon_type_mask): Add N_SIZ.
1299 (N_ALLMODS): New macro.
1300 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
1301 (el_type_of_type_chk): Add some safeguards.
1302 (modify_types_allowed): Fix logic bug.
1303 (neon_check_type): Handle operands with types.
1304 (neon_three_same): Remove redundant optional arg handling.
1305 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
1306 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
1307 (do_neon_step): Adjust accordingly.
1308 (neon_cmode_for_logic_imm): Use first_error.
1309 (do_neon_bitfield): Call neon_check_type.
1310 (neon_dyadic): Rename to...
1311 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
1312 to allow modification of type of the destination.
1313 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1314 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
1315 (do_neon_compare): Make destination be an untyped bitfield.
1316 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
1317 (neon_mul_mac): Return early in case of errors.
1318 (neon_move_immediate): Use first_error.
1319 (neon_mac_reg_scalar_long): Fix type to include scalar.
1320 (do_neon_dup): Likewise.
1321 (do_neon_mov): Likewise (in several places).
1322 (do_neon_tbl_tbx): Fix type.
1323 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
1324 (do_neon_ld_dup): Exit early in case of errors and/or use
1326 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
1327 Handle .dn/.qn directives.
1328 (REGDEF): Add zero for reg_entry neon field.
1330 2006-04-26 Julian Brown <julian@codesourcery.com>
1332 * config/tc-arm.c (limits.h): Include.
1333 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
1334 (fpu_vfp_v3_or_neon_ext): Declare constants.
1335 (neon_el_type): New enumeration of types for Neon vector elements.
1336 (neon_type_el): New struct. Define type and size of a vector element.
1337 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
1339 (neon_type): Define struct. The type of an instruction.
1340 (arm_it): Add 'vectype' for the current instruction.
1341 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
1342 (vfp_sp_reg_pos): Rename to...
1343 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
1345 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
1346 (Neon D or Q register).
1347 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
1349 (GE_OPT_PREFIX_BIG): Define constant, for use in...
1350 (my_get_expression): Allow above constant as argument to accept
1351 64-bit constants with optional prefix.
1352 (arm_reg_parse): Add extra argument to return the specific type of
1353 register in when either a D or Q register (REG_TYPE_NDQ) is
1354 requested. Can be NULL.
1355 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
1356 (parse_reg_list): Update for new arm_reg_parse args.
1357 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
1358 (parse_neon_el_struct_list): New function. Parse element/structure
1359 register lists for VLD<n>/VST<n> instructions.
1360 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
1361 (s_arm_unwind_save_mmxwr): Likewise.
1362 (s_arm_unwind_save_mmxwcg): Likewise.
1363 (s_arm_unwind_movsp): Likewise.
1364 (s_arm_unwind_setfp): Likewise.
1365 (parse_big_immediate): New function. Parse an immediate, which may be
1366 64 bits wide. Put results in inst.operands[i].
1367 (parse_shift): Update for new arm_reg_parse args.
1368 (parse_address): Likewise. Add parsing of alignment specifiers.
1369 (parse_neon_mov): Parse the operands of a VMOV instruction.
1370 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
1371 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
1372 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
1373 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
1374 (parse_operands): Handle new codes above.
1375 (encode_arm_vfp_sp_reg): Rename to...
1376 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
1377 selected VFP version only supports D0-D15.
1378 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
1379 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
1380 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
1381 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
1382 encode_arm_vfp_reg name, and allow 32 D regs.
1383 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
1384 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
1386 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
1387 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
1388 constant-load and conversion insns introduced with VFPv3.
1389 (neon_tab_entry): New struct.
1390 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
1391 those which are the targets of pseudo-instructions.
1392 (neon_opc): Enumerate opcodes, use as indices into...
1393 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
1394 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
1395 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
1396 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
1398 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
1400 (neon_type_mask): New. Compact type representation for type checking.
1401 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
1402 permitted type combinations.
1403 (N_IGNORE_TYPE): New macro.
1404 (neon_check_shape): New function. Check an instruction shape for
1405 multiple alternatives. Return the specific shape for the current
1407 (neon_modify_type_size): New function. Modify a vector type and size,
1408 depending on the bit mask in argument 1.
1409 (neon_type_promote): New function. Convert a given "key" type (of an
1410 operand) into the correct type for a different operand, based on a bit
1412 (type_chk_of_el_type): New function. Convert a type and size into the
1413 compact representation used for type checking.
1414 (el_type_of_type_ckh): New function. Reverse of above (only when a
1415 single bit is set in the bit mask).
1416 (modify_types_allowed): New function. Alter a mask of allowed types
1417 based on a bit mask of modifications.
1418 (neon_check_type): New function. Check the type of the current
1419 instruction against the variable argument list. The "key" type of the
1420 instruction is returned.
1421 (neon_dp_fixup): New function. Fill in and modify instruction bits for
1422 a Neon data-processing instruction depending on whether we're in ARM
1423 mode or Thumb-2 mode.
1424 (neon_logbits): New function.
1425 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
1426 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
1427 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
1428 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
1429 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
1430 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
1431 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1432 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
1433 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
1434 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
1435 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
1436 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
1437 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
1438 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
1439 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
1440 (neon_move_immediate, do_neon_mvn, neon_mixed_length)
1441 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
1442 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
1443 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
1444 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
1445 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
1446 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
1447 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
1448 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
1449 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
1451 (parse_neon_type): New function. Parse Neon type specifier.
1452 (opcode_lookup): Allow parsing of Neon type specifiers.
1453 (REGNUM2, REGSETH, REGSET2): New macros.
1454 (reg_names): Add new VFPv3 and Neon registers.
1455 (NUF, nUF, NCE, nCE): New macros for opcode table.
1456 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
1457 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
1458 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
1459 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
1460 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
1461 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
1462 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
1463 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
1464 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
1465 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
1466 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
1467 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
1468 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
1469 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
1471 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
1472 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
1473 (arm_option_cpu_value): Add vfp3 and neon.
1474 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
1477 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1479 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
1480 syntax instead of hardcoded opcodes with ".w18" suffixes.
1481 (wide_branch_opcode): New.
1482 (build_transition): Use it to check for wide branch opcodes with
1483 either ".w18" or ".w15" suffixes.
1485 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1487 * config/tc-xtensa.c (xtensa_create_literal_symbol,
1488 xg_assemble_literal, xg_assemble_literal_space): Do not set the
1489 frag's is_literal flag.
1491 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1493 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
1495 2006-04-23 Kazu Hirata <kazu@codesourcery.com>
1497 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
1498 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
1499 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
1500 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
1501 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
1503 2005-04-20 Paul Brook <paul@codesourcery.com>
1505 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
1507 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
1509 2006-04-19 Alan Modra <amodra@bigpond.net.au>
1511 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
1512 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
1513 Make some cpus unsupported on ELF. Run "make dep-am".
1514 * Makefile.in: Regenerate.
1516 2006-04-19 Alan Modra <amodra@bigpond.net.au>
1518 * configure.in (--enable-targets): Indent help message.
1519 * configure: Regenerate.
1521 2006-04-18 H.J. Lu <hongjiu.lu@intel.com>
1524 * config/tc-i386.c (i386_immediate): Check illegal immediate
1527 2006-04-18 Alan Modra <amodra@bigpond.net.au>
1529 * config/tc-i386.c: Formatting.
1530 (output_disp, output_imm): ISO C90 params.
1532 * frags.c (frag_offset_fixed_p): Constify args.
1533 * frags.h (frag_offset_fixed_p): Ditto.
1535 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
1536 (COFF_MAGIC): Delete.
1538 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
1540 2006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
1542 * po/POTFILES.in: Regenerated.
1544 2006-04-16 Mark Mitchell <mark@codesourcery.com>
1546 * doc/as.texinfo: Mention that some .type syntaxes are not
1547 supported on all architectures.
1549 2006-04-14 Sterling Augustine <sterling@tensilica.com>
1551 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
1552 instructions when such transformations have been disabled.
1554 2006-04-10 Sterling Augustine <sterling@tensilica.com>
1556 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
1557 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
1558 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
1559 decoding the loop instructions. Remove current_offset variable.
1560 (xtensa_fix_short_loop_frags): Likewise.
1561 (min_bytes_to_other_loop_end): Remove current_offset argument.
1563 2006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl>
1565 * config/tc-z80.c (z80_optimize_expr): Removed.
1566 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
1568 2006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
1570 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
1571 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
1572 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
1573 atmega644, atmega329, atmega3290, atmega649, atmega6490,
1574 atmega406, atmega640, atmega1280, atmega1281, at90can32,
1575 at90can64, at90usb646, at90usb647, at90usb1286 and
1577 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
1579 2006-04-07 Paul Brook <paul@codesourcery.com>
1581 * config/tc-arm.c (parse_operands): Set default error message.
1583 2006-04-07 Paul Brook <paul@codesourcery.com>
1585 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
1587 2006-04-07 Paul Brook <paul@codesourcery.com>
1589 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
1591 2006-04-07 Paul Brook <paul@codesourcery.com>
1593 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
1594 (move_or_literal_pool): Handle Thumb-2 instructions.
1595 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
1597 2006-04-07 Alan Modra <amodra@bigpond.net.au>
1600 * config/tc-i386.c (match_template): Move 64-bit operand tests
1603 2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
1605 * po/Make-in: Add install-html target.
1606 * Makefile.am: Add install-html and install-html-recursive targets.
1607 * Makefile.in: Regenerate.
1608 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
1609 * configure: Regenerate.
1610 * doc/Makefile.am: Add install-html and install-html-am targets.
1611 * doc/Makefile.in: Regenerate.
1613 2006-04-06 Alan Modra <amodra@bigpond.net.au>
1615 * frags.c (frag_offset_fixed_p): Reinitialise offset before
1618 2006-04-05 Richard Sandiford <richard@codesourcery.com>
1619 Daniel Jacobowitz <dan@codesourcery.com>
1621 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
1622 (GOTT_BASE, GOTT_INDEX): New.
1623 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
1624 GOTT_INDEX when generating VxWorks PIC.
1625 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
1626 use the generic *-*-vxworks* stanza instead.
1628 2006-04-04 Alan Modra <amodra@bigpond.net.au>
1631 * frags.c (frag_offset_fixed_p): New function.
1632 * frags.h (frag_offset_fixed_p): Declare.
1633 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
1634 (resolve_expression): Likewise.
1636 2006-04-03 Sterling Augustine <sterling@tensilica.com>
1638 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
1639 of the same length but different numbers of slots.
1641 2006-03-30 Andreas Schwab <schwab@suse.de>
1643 * configure.in: Fix help string for --enable-targets option.
1644 * configure: Regenerate.
1646 2006-03-28 Nathan Sidwell <nathan@codesourcery.com>
1648 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
1649 (m68k_ip): ... here. Use for all chips. Protect against buffer
1650 overrun and avoid excessive copying.
1652 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
1653 m68020_control_regs, m68040_control_regs, m68060_control_regs,
1654 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
1655 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
1656 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
1657 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
1658 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
1659 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
1660 mcf5282_ctrl, mcfv4e_ctrl): ... these.
1661 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
1662 (struct m68k_cpu): Change chip field to control_regs.
1663 (current_chip): Remove.
1664 (control_regs): New.
1665 (m68k_archs, m68k_extensions): Adjust.
1666 (m68k_cpus): Reorder to be in cpu number order. Adjust.
1667 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
1668 (find_cf_chip): Reimplement for new organization of cpu table.
1669 (select_control_regs): Remove.
1671 (struct save_opts): Save control regs, not chip.
1672 (s_save, s_restore): Adjust.
1673 (m68k_lookup_cpu): Give deprecated warning when necessary.
1674 (m68k_init_arch): Adjust.
1675 (md_show_usage): Adjust for new cpu table organization.
1677 2006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
1679 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
1680 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
1681 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
1683 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
1684 (any_gotrel): New rule.
1685 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
1686 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
1688 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
1689 (bfin_pic_ptr): New function.
1690 (md_pseudo_table): Add it for ".picptr".
1691 (OPTION_FDPIC): New macro.
1692 (md_longopts): Add -mfdpic.
1693 (md_parse_option): Handle it.
1694 (md_begin): Set BFD flags.
1695 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
1696 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
1698 * Makefile.am (bfin-parse.o): Update dependencies.
1699 (DEPTC_bfin_elf): Likewise.
1700 * Makefile.in: Regenerate.
1702 2006-03-25 Richard Sandiford <richard@codesourcery.com>
1704 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
1705 mcfemac instead of mcfmac.
1707 2006-03-23 Michael Matz <matz@suse.de>
1709 * config/tc-i386.c (type_names): Correct placement of 'static'.
1710 (reloc): Map some more relocs to their 64 bit counterpart when
1712 (output_insn): Work around breakage if DEBUG386 is defined.
1713 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
1714 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
1715 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
1716 different from i386.
1717 (output_imm): Ditto.
1718 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
1720 (md_convert_frag): Jumps can now be larger than 2GB away, error
1722 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
1723 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
1725 2006-03-22 Richard Sandiford <richard@codesourcery.com>
1726 Daniel Jacobowitz <dan@codesourcery.com>
1727 Phil Edwards <phil@codesourcery.com>
1728 Zack Weinberg <zack@codesourcery.com>
1729 Mark Mitchell <mark@codesourcery.com>
1730 Nathan Sidwell <nathan@codesourcery.com>
1732 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
1733 (md_begin): Complain about -G being used for PIC. Don't change
1734 the text, data and bss alignments on VxWorks.
1735 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
1736 generating VxWorks PIC.
1737 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
1738 (macro): Likewise, but do not treat la $25 specially for
1739 VxWorks PIC, and do not handle jal.
1740 (OPTION_MVXWORKS_PIC): New macro.
1741 (md_longopts): Add -mvxworks-pic.
1742 (md_parse_option): Don't complain about using PIC and -G together here.
1743 Handle OPTION_MVXWORKS_PIC.
1744 (md_estimate_size_before_relax): Always use the first relaxation
1745 sequence on VxWorks.
1746 * config/tc-mips.h (VXWORKS_PIC): New.
1748 2006-03-21 Paul Brook <paul@codesourcery.com>
1750 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
1752 2006-03-21 Sterling Augustine <sterling@tensilica.com>
1754 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
1755 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
1756 (get_loop_align_size): New.
1757 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
1758 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
1759 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
1760 (get_noop_aligned_address): Use get_loop_align_size.
1761 (get_aligned_diff): Likewise.
1763 2006-03-21 Paul Brook <paul@codesourcery.com>
1765 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
1767 2006-03-20 Paul Brook <paul@codesourcery.com>
1769 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
1770 (do_t_branch): Encode branches inside IT blocks as unconditional.
1771 (do_t_cps): New function.
1772 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
1773 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
1774 (opcode_lookup): Allow conditional suffixes on all instructions in
1776 (md_assemble): Advance condexec state before checking for errors.
1777 (insns): Use do_t_cps.
1779 2006-03-20 Paul Brook <paul@codesourcery.com>
1781 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
1782 outputting the insn.
1784 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1786 * config/tc-vax.c: Update copyright year.
1787 * config/tc-vax.h: Likewise.
1789 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1791 * config/tc-vax.c (md_chars_to_number): Used only locally, so
1793 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
1795 2006-03-17 Paul Brook <paul@codesourcery.com>
1797 * config/tc-arm.c (insns): Add ldm and stm.
1799 2006-03-17 Ben Elliston <bje@au.ibm.com>
1802 * doc/as.texinfo (Ident): Document this directive more thoroughly.
1804 2006-03-16 Paul Brook <paul@codesourcery.com>
1806 * config/tc-arm.c (insns): Add "svc".
1808 2006-03-13 Bob Wilson <bob.wilson@acm.org>
1810 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
1811 flag and avoid double underscore prefixes.
1813 2006-03-10 Paul Brook <paul@codesourcery.com>
1815 * config/tc-arm.c (md_begin): Handle EABIv5.
1816 (arm_eabis): Add EF_ARM_EABI_VER5.
1817 * doc/c-arm.texi: Document -meabi=5.
1819 2006-03-10 Ben Elliston <bje@au.ibm.com>
1821 * app.c (do_scrub_chars): Simplify string handling.
1823 2006-03-07 Richard Sandiford <richard@codesourcery.com>
1824 Daniel Jacobowitz <dan@codesourcery.com>
1825 Zack Weinberg <zack@codesourcery.com>
1826 Nathan Sidwell <nathan@codesourcery.com>
1827 Paul Brook <paul@codesourcery.com>
1828 Ricardo Anguiano <anguiano@codesourcery.com>
1829 Phil Edwards <phil@codesourcery.com>
1831 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
1832 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
1834 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
1835 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
1836 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
1838 2006-03-06 Bob Wilson <bob.wilson@acm.org>
1840 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
1841 even when using the text-section-literals option.
1843 2006-03-06 Nathan Sidwell <nathan@codesourcery.com>
1845 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
1847 (m68k_ip): <case 'J'> Check we have some control regs.
1848 (md_parse_option): Allow raw arch switch.
1849 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
1850 whether 68881 or cfloat was meant by -mfloat.
1851 (md_show_usage): Adjust extension display.
1852 (m68k_elf_final_processing): Adjust.
1854 2006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
1856 * config/tc-avr.c (avr_mod_hash_value): New function.
1857 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
1858 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
1859 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
1860 instead of int avr_ldi_expression: use avr_mod_hash_value instead
1862 (tc_gen_reloc): Handle substractions of symbols, if possible do
1863 fixups, abort otherwise.
1864 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
1865 tc_fix_adjustable): Define.
1867 2006-03-02 James E Wilson <wilson@specifix.com>
1869 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
1870 change the template, then clear md.slot[curr].end_of_insn_group.
1872 2006-02-28 Jan Beulich <jbeulich@novell.com>
1874 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
1876 2006-02-28 Jan Beulich <jbeulich@novell.com>
1879 * macro.c (getstring): Don't treat parentheses special anymore.
1880 (get_any_string): Don't consider '(' and ')' as quoting anymore.
1881 Special-case '(', ')', '[', and ']' when dealing with non-quoting
1884 2006-02-28 Mat <mat@csail.mit.edu>
1886 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
1888 2006-02-27 Jakub Jelinek <jakub@redhat.com>
1890 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
1892 (CFI_signal_frame): Define.
1893 (cfi_pseudo_table): Add .cfi_signal_frame.
1894 (dot_cfi): Handle CFI_signal_frame.
1895 (output_cie): Handle cie->signal_frame.
1896 (select_cie_for_fde): Don't share CIE if signal_frame flag is
1897 different. Copy signal_frame from FDE to newly created CIE.
1898 * doc/as.texinfo: Document .cfi_signal_frame.
1900 2006-02-27 Carlos O'Donell <carlos@codesourcery.com>
1902 * doc/Makefile.am: Add html target.
1903 * doc/Makefile.in: Regenerate.
1904 * po/Make-in: Add html target.
1906 2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
1908 * config/tc-i386.c (output_insn): Support Intel Merom New
1911 * config/tc-i386.h (CpuMNI): New.
1912 (CpuUnknownFlags): Add CpuMNI.
1914 2006-02-24 David S. Miller <davem@sunset.davemloft.net>
1916 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
1917 (hpriv_reg_table): New table for hyperprivileged registers.
1918 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
1921 2006-02-24 DJ Delorie <dj@redhat.com>
1923 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
1924 (tc_gen_reloc): Don't define.
1925 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
1926 (OPTION_LINKRELAX): New.
1927 (md_longopts): Add it.
1929 (md_parse_options): Set it.
1930 (md_assemble): Emit relaxation relocs as needed.
1931 (md_convert_frag): Emit relaxation relocs as needed.
1932 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
1933 (m32c_apply_fix): New.
1934 (tc_gen_reloc): New.
1935 (m32c_force_relocation): Force out jump relocs when relaxing.
1936 (m32c_fix_adjustable): Return false if relaxing.
1938 2006-02-24 Paul Brook <paul@codesourcery.com>
1940 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
1941 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
1942 (struct asm_barrier_opt): Define.
1943 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
1944 (parse_psr): Accept V7M psr names.
1945 (parse_barrier): New function.
1946 (enum operand_parse_code): Add OP_oBARRIER.
1947 (parse_operands): Implement OP_oBARRIER.
1948 (do_barrier): New function.
1949 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
1950 (do_t_cpsi): Add V7M restrictions.
1951 (do_t_mrs, do_t_msr): Validate V7M variants.
1952 (md_assemble): Check for NULL variants.
1953 (v7m_psrs, barrier_opt_names): New tables.
1954 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
1955 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
1956 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
1957 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
1958 (struct cpu_arch_ver_table): Define.
1959 (cpu_arch_ver): New.
1960 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
1961 Tag_CPU_arch_profile.
1962 * doc/c-arm.texi: Document new cpu and arch options.
1964 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1966 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
1968 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1970 * config/tc-ia64.c: Update copyright years.
1972 2006-02-22 H.J. Lu <hongjiu.lu@intel.com>
1974 * config/tc-ia64.c (specify_resource): Add the rule 17 from
1977 2005-02-22 Paul Brook <paul@codesourcery.com>
1979 * config/tc-arm.c (do_pld): Remove incorrect write to
1981 (encode_thumb32_addr_mode): Use correct operand.
1983 2006-02-21 Paul Brook <paul@codesourcery.com>
1985 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
1987 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
1988 Anil Paranjape <anilp1@kpitcummins.com>
1989 Shilin Shakti <shilins@kpitcummins.com>
1991 * Makefile.am: Add xc16x related entry.
1992 * Makefile.in: Regenerate.
1993 * configure.in: Added xc16x related entry.
1994 * configure: Regenerate.
1995 * config/tc-xc16x.h: New file
1996 * config/tc-xc16x.c: New file
1997 * doc/c-xc16x.texi: New file for xc16x
1998 * doc/all.texi: Entry for xc16x
1999 * doc/Makefile.texi: Added c-xc16x.texi
2000 * NEWS: Announce the support for the new target.
2002 2006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
2004 * configure.tgt: set emulation for mips-*-netbsd*
2006 2006-02-14 Jakub Jelinek <jakub@redhat.com>
2008 * config.in: Rebuilt.
2010 2006-02-13 Bob Wilson <bob.wilson@acm.org>
2012 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
2013 from 1, not 0, in error messages.
2014 (md_assemble): Simplify special-case check for ENTRY instructions.
2015 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
2016 operand in error message.
2018 2006-02-13 Joseph S. Myers <joseph@codesourcery.com>
2020 * configure.tgt (arm-*-linux-gnueabi*): Change to
2023 2006-02-10 Nick Clifton <nickc@redhat.com>
2025 * config/tc-crx.c (check_range): Ensure that the sign bit of a
2026 32-bit value is propagated into the upper bits of a 64-bit long.
2028 * config/tc-arc.c (init_opcode_tables): Fix cast.
2029 (arc_extoper, md_operand): Likewise.
2031 2006-02-09 David Heine <dlheine@tensilica.com>
2033 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
2034 each relaxation step.
2036 2006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
2038 * configure.in (CHECK_DECLS): Add vsnprintf.
2039 * configure: Regenerate.
2040 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
2041 include/declare here, but...
2042 * as.h: Move code detecting VARARGS idiom to the top.
2043 (errno.h, stdarg.h, varargs.h, va_list): ...here.
2044 (vsnprintf): Declare if not already declared.
2046 2006-02-08 H.J. Lu <hongjiu.lu@intel.com>
2048 * as.c (close_output_file): New.
2049 (main): Register close_output_file with xatexit before
2050 dump_statistics. Don't call output_file_close.
2052 2006-02-07 Nathan Sidwell <nathan@codesourcery.com>
2054 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
2055 mcf5329_control_regs): New.
2056 (not_current_architecture, selected_arch, selected_cpu): New.
2057 (m68k_archs, m68k_extensions): New.
2058 (archs): Renamed to ...
2059 (m68k_cpus): ... here. Adjust.
2061 (md_pseudo_table): Add arch and cpu directives.
2062 (find_cf_chip, m68k_ip): Adjust table scanning.
2063 (no_68851, no_68881): Remove.
2064 (md_assemble): Lazily initialize.
2065 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
2066 (md_init_after_args): Move functionality to m68k_init_arch.
2067 (mri_chip): Adjust table scanning.
2068 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
2069 options with saner parsing.
2070 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
2071 m68k_init_arch): New.
2072 (s_m68k_cpu, s_m68k_arch): New.
2073 (md_show_usage): Adjust.
2074 (m68k_elf_final_processing): Set CF EF flags.
2075 * config/tc-m68k.h (m68k_init_after_args): Remove.
2076 (tc_init_after_args): Remove.
2077 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
2078 (M68k-Directives): Document .arch and .cpu directives.
2080 2006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl>
2082 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
2083 synonyms for equ and defl.
2084 (z80_cons_fix_new): New function.
2085 (emit_byte): Disallow relative jumps to absolute locations.
2086 (emit_data): Only handle defb, prototype changed, because defb is
2087 now handled as pseudo-op rather than an instruction.
2088 (instab): Entries for defb,defw,db,dw moved from here...
2089 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
2090 Add entries for def24,def32,d24,d32.
2091 (md_assemble): Improved error handling.
2092 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
2093 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
2094 (z80_cons_fix_new): Declare.
2095 * doc/c-z80.texi (defb, db): Mention warning on overflow.
2096 (def24,d24,def32,d32): New pseudo-ops.
2098 2006-02-02 Paul Brook <paul@codesourcery.com>
2100 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
2102 2005-02-02 Paul Brook <paul@codesourcery.com>
2104 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
2105 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
2106 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
2107 T2_OPCODE_RSB): Define.
2108 (thumb32_negate_data_op): New function.
2109 (md_apply_fix): Use it.
2111 2006-01-31 Bob Wilson <bob.wilson@acm.org>
2113 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
2115 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
2116 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
2118 (relaxation_requirements): Add pfinish_frag argument and use it to
2119 replace setting tinsn->record_fix fields.
2120 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
2121 and vinsn_to_insnbuf. Remove references to record_fix and
2122 slot_sub_symbols fields.
2123 (xtensa_mark_narrow_branches): Delete unused code.
2124 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
2126 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
2128 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
2129 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
2130 of the record_fix field. Simplify error messages for unexpected
2132 (set_expr_symbol_offset_diff): Delete.
2134 2006-01-31 Paul Brook <paul@codesourcery.com>
2136 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
2138 2006-01-31 Paul Brook <paul@codesourcery.com>
2139 Richard Earnshaw <rearnsha@arm.com>
2141 * config/tc-arm.c: Use arm_feature_set.
2142 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
2143 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
2144 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
2147 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
2148 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
2149 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
2150 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
2152 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
2153 (arm_opts): Move old cpu/arch options from here...
2154 (arm_legacy_opts): ... to here.
2155 (md_parse_option): Search arm_legacy_opts.
2156 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
2157 (arm_float_abis, arm_eabis): Make const.
2159 2006-01-25 Bob Wilson <bob.wilson@acm.org>
2161 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
2163 2006-01-21 Jie Zhang <jie.zhang@analog.com>
2165 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
2166 in load immediate intruction.
2168 2006-01-21 Jie Zhang <jie.zhang@analog.com>
2170 * config/bfin-parse.y (value_match): Use correct conversion
2171 specifications in template string for __FILE__ and __LINE__.
2175 2006-01-18 Alexandre Oliva <aoliva@redhat.com>
2177 Introduce TLS descriptors for i386 and x86_64.
2178 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
2179 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
2180 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
2181 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
2182 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
2184 (build_modrm_byte): Set up zero modrm for TLS desc calls.
2185 (lex_got): Handle @tlsdesc and @tlscall.
2186 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
2188 2006-01-11 Nick Clifton <nickc@redhat.com>
2190 Fixes for building on 64-bit hosts:
2191 * config/tc-avr.c (mod_index): New union to allow conversion
2192 between pointers and integers.
2193 (md_begin, avr_ldi_expression): Use it.
2194 * config/tc-i370.c (md_assemble): Add cast for argument to print
2196 * config/tc-tic54x.c (subsym_substitute): Likewise.
2197 * config/tc-mn10200.c (md_assemble): Use a union to convert the
2198 opindex field of fr_cgen structure into a pointer so that it can
2199 be stored in a frag.
2200 * config/tc-mn10300.c (md_assemble): Likewise.
2201 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
2203 * config/tc-v850.c: Replace uses of (int) casts with correct
2206 2006-01-09 H.J. Lu <hongjiu.lu@intel.com>
2209 * symbols.c (snapshot_symbol): Don't change a defined symbol.
2211 2006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
2214 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
2215 a local-label reference.
2217 For older changes see ChangeLog-2005
2223 version-control: never