1 2006-05-24 Nick Clifton <nickc@redhat.com>
3 * config/tc-hppa.c: Convert to ISO C90 format.
4 * config/tc-hppa.h: Likewise.
6 2006-05-24 Carlos O'Donell <carlos@systemhalted.org>
7 Randolph Chung <randolph@tausq.org>
9 * config/tc-hppa.c (is_tls_gdidx, is_tls_ldidx, is_tls_dtpoff,
10 is_tls_ieoff, is_tls_leoff): Define.
11 (fix_new_hppa): Handle TLS.
12 (cons_fix_new_hppa): Likewise.
14 (md_apply_fix): Handle TLS relocs.
15 * config/tc-hppa.h (hppa_fix_adjustable): Handle TLS.
17 2006-05-24 Bjoern Haase <bjoern.m.haase@web.de>
19 * config/tc-avr.c: Add new cpu targets avr6, avr2560 and avr2561.
21 2006-05-23 Thiemo Seufer <ths@mips.com>
22 David Ung <davidu@mips.com>
23 Nigel Stephens <nigel@mips.com>
26 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS): Rename.
27 (ISA_SUPPORTS_DSP_ASE, ISA_SUPPORTS_MT_ASE, ISA_HAS_64BIT_FPRS,
28 ISA_HAS_MXHC1): New macros.
29 (HAVE_32BIT_FPRS): Use ISA_HAS_64BIT_FPRS instead of
30 ISA_HAS_64BIT_REGS. Formatting fixes. Improved comments.
31 (mips_cpu_info): Change to use combined ASE/IS_ISA flag.
32 (MIPS_CPU_IS_ISA, MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP,
33 MIPS_CPU_ASE_MT, MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX): New defines.
34 (mips_after_parse_args): Change default handling of float register
35 size to account for 32bit code with 64bit FP. Better sanity checking
36 of ISA/ASE/ABI option combinations.
37 (s_mipsset): Support switching of GPR and FPR sizes via
38 .set {g,f}p={32,64,default}. Better sanity checking for .set ASE
40 (mips_elf_final_processing): We should record the use of 64bit FP
41 registers in 32bit code but we don't, because ELF header flags are
43 (mips_cpu_info_table): Add ASE flags for CPUs with mandatory ASE
44 extensions. Add 4ksc, 4kec, 4kem, 4kep, 4ksd, m4kp, 24kec, 24kef,
45 24kex, 34kc, 34kf, 34kx, 25kf CPU definitions.
46 (mips_cpu_info_from_isa): Use MIPS_CPU_IS_ISA.
47 * doc/c-mips.texi: Document .set {g,f}p={32,64,default}. Document
48 missing -march options. Document .set arch=CPU. Move .set smartmips
49 to ASE page. Use @code for .set FOO examples.
51 2006-05-23 Jie Zhang <jie.zhang@analog.com>
53 * config/tc-bfin.c (bfin_start_line_hook): Bump line counters
56 2006-05-23 Jie Zhang <jie.zhang@analog.com>
58 * config/bfin-defs.h (bfin_equals): Remove declaration.
59 * config/bfin-parse.y (asm_1): Remove "expr ASSIGN expr".
60 * config/tc-bfin.c (bfin_name_is_register): Remove.
61 (bfin_equals): Remove.
62 * config/tc-bfin.h (TC_EQUAL_IN_INSN): Redefine as 1.
63 (bfin_name_is_register): Remove declaration.
65 2006-05-19 Thiemo Seufer <ths@mips.com>
66 Nigel Stephens <nigel@mips.com>
68 * config/tc-mipc.c (ISA_HAS_ODD_SINGLE_FPR): New define.
69 (mips_oddfpreg_ok): New function.
72 2006-05-19 Thiemo Seufer <ths@mips.com>
73 David Ung <davidu@mips.com>
75 * config/tc-mips.h (tc_mips_regname_to_dw2regnum): Declare.
76 * config/tc-mipc.c (ABI_NEEDS_64BIT_REGS, ISA_HAS_64BIT_REGS,
77 ISA_HAS_DROR, ISA_HAS_ROR): Reformat.
78 (regname, RTYPE_MASK, RTYPE_NUM, RTYPE_FPU, RTYPE_FCC, RTYPE_VEC,
79 RTYPE_GP, RTYPE_CP0, RTYPE_PC, RTYPE_ACC, RTYPE_CCC, RNUM_MASK,
80 RWARN, GENERIC_REGISTER_NUMBERS, FPU_REGISTER_NAMES,
81 FPU_CONDITION_CODE_NAMES, COPROC_CONDITION_CODE_NAMES,
82 N32N64_SYMBOLIC_REGISTER_NAMES, O32_SYMBOLIC_REGISTER_NAMES,
83 SYMBOLIC_REGISTER_NAMES, MIPS16_SPECIAL_REGISTER_NAMES,
84 MDMX_VECTOR_REGISTER_NAMES, MIPS_DSP_ACCUMULATOR_NAMES, reg_names,
85 reg_names_o32, reg_names_n32n64): Define register classes.
86 (reg_lookup): New function, use register classes.
87 (md_begin): Reserve register names in the symbol table. Simplify
89 (mips_ip): Fix comment formatting. Handle symbolic COP0 registers.
91 (mips16_ip): Use reg_lookup.
92 (tc_get_register): Likewise.
93 (tc_mips_regname_to_dw2regnum): New function.
95 2006-05-19 Thiemo Seufer <ths@mips.com>
97 * config/tc-arm.c, config/tc-arm.h (tc_arm_regname_to_dw2regnum):
98 Un-constify string argument.
99 * config/tc-i386.c, config/tc-i386.h (tc_x86_regname_to_dw2regnum):
101 * config/tc-m68k.c, config/tc-m68k.h (tc_m68k_regname_to_dw2regnum):
103 * config/tc-ppc.c, config/tc-ppc.h (tc_ppc_regname_to_dw2regnum):
105 * config/tc-s390.c, config/tc-s390.h (tc_s390_regname_to_dw2regnum):
107 * config/tc-sh.c, config/tc-sh.h (sh_regname_to_dw2regnum):
109 * config/tc-sparc.c, config/tc-sparc.h (sparc_regname_to_dw2regnum):
112 2006-05-19 Nathan Sidwell <nathan@codesourcery.com>
114 * gas/config/tc-m68k.c (m68k_init_arch): Move checking of
115 cfloat/m68881 to correct architecture before using it.
117 2006-05-16 Bjoern Haase <bjoern.m.haase@web.de>
119 * config/tc-avr.h (TC_VALIDATE_FIX): Allow fixups for immediate
122 2006-05-15 Paul Brook <paul@codesourcery.com>
124 * config/tc-arm.c (arm_adjust_symtab): Use
125 bfd_is_arm_special_symbol_name.
127 2006-05-15 Bob Wilson <bob.wilson@acm.org>
129 * config/tc-xtensa.c (is_direct_call_opcode, is_branch_jmp_to_next,
130 xg_assemble_vliw_tokens, xtensa_mark_narrow_branches,
131 xtensa_fix_short_loop_frags, is_local_forward_loop, relax_frag_immed):
132 Handle errors from calls to xtensa_opcode_is_* functions.
134 2006-05-14 Thiemo Seufer <ths@mips.com>
136 * config/tc-mips.c (macro_build): Test for currently active
138 (mips16_ip): Reject invalid opcodes.
140 2006-05-11 Carlos O'Donell <carlos@codesourcery.com>
142 * doc/as.texinfo: Rename "Index" to "AS Index",
143 and "ABORT" to "ABORT (COFF)".
145 2006-05-11 Paul Brook <paul@codesourcery.com>
147 * config/tc-arm.c (parse_half): New function.
148 (operand_parse_code): Remove OP_Iffff. Add OP_HALF.
149 (parse_operands): Ditto.
150 (do_mov16): Reject invalid relocations.
151 (do_t_mov16): Ditto. Use Thumb reloc numbers.
152 (insns): Replace Iffff with HALF.
153 (md_apply_fix): Add MOVW and MOVT relocs.
154 (tc_gen_reloc): Ditto.
155 * doc/c-arm.texi: Document relocation operators
157 2006-05-11 Paul Brook <paul@codesourcery.com>
159 * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
161 2006-05-11 Thiemo Seufer <ths@mips.com>
163 * config/tc-mips.c (append_insn): Don't check the range of j or
166 2006-05-11 Pedro Alves <pedro_alves@portugalmail.pt>
168 * config/tc-arm.c (md_pcrel_from_section): Force a bias for
169 relocs against external symbols for WinCE targets.
170 (md_apply_fix): Likewise.
172 2006-05-09 David Ung <davidu@mips.com>
174 * config/tc-mips.c (append_insn): Only warn about an out-of-range
177 2006-05-09 Nick Clifton <nickc@redhat.com>
179 * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups
180 against symbols which are not going to be placed into the symbol
183 2006-05-09 Ben Elliston <bje@au.ibm.com>
185 * expr.c (operand): Remove `if (0 && ..)' statement and
186 subsequently unused target_op label. Collapse `if (1 || ..)'
188 * app.c (do_scrub_chars): Remove unused case 0, as it is handled
189 separately above the switch.
191 2006-05-08 Nick Clifton <nickc@redhat.com>
194 * config/tc-msp430.c (line_separator_character): Define as |.
196 2006-05-08 Thiemo Seufer <ths@mips.com>
197 Nigel Stephens <nigel@mips.com>
198 David Ung <davidu@mips.com>
200 * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
201 (mips_opts): Likewise.
202 (file_ase_smartmips): New variable.
203 (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
204 (macro_build): Handle SmartMIPS instructions.
206 (md_longopts): Add argument handling for smartmips.
207 (md_parse_options, mips_after_parse_args): Likewise.
208 (s_mipsset): Add .set smartmips support.
209 (md_show_usage): Document -msmartmips/-mno-smartmips.
210 * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
212 * doc/c-mips.texi: Likewise.
214 2006-05-08 Alan Modra <amodra@bigpond.net.au>
216 * write.c (relax_segment): Add pass count arg. Don't error on
217 negative org/space on first two passes.
218 (relax_seg_info): New struct.
219 (relax_seg, write_object_file): Adjust.
220 * write.h (relax_segment): Update prototype.
222 2006-05-05 Julian Brown <julian@codesourcery.com>
224 * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
226 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
227 architecture version checks.
228 (insns): Allow overlapping instructions to be used in VFP mode.
230 2006-05-05 H.J. Lu <hongjiu.lu@intel.com>
233 * config/obj-elf.c (obj_elf_change_section): Allow user
234 specified SHF_ALPHA_GPREL.
236 2006-05-05 Bjoern Haase <bjoern.m.haase@web.de>
238 * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups
239 for PMEM related expressions.
241 2006-05-05 Nick Clifton <nickc@redhat.com>
244 * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the
245 insertion of a directory separator character into a string at a
246 given offset. Uses heuristics to decide when to use a backslash
247 character rather than a forward-slash character.
248 (dwarf2_directive_loc): Use the macro.
249 (out_debug_info): Likewise.
251 2006-05-05 Thiemo Seufer <ths@mips.com>
252 David Ung <davidu@mips.com>
254 * config/tc-mips.c (macro_build): Add case 'k' to handle cache
256 (macro): Add new case M_CACHE_AB.
258 2006-05-04 Kazu Hirata <kazu@codesourcery.com>
260 * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
261 (opcode_lookup): Issue a warning for opcode with
262 OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated
263 identical to OT_cinfix3.
264 (TxC3w, TC3w, tC3w): New.
265 (insns): Use tC3w and TC3w for comparison instructions with
268 2006-05-04 Alan Modra <amodra@bigpond.net.au>
270 * subsegs.h (struct frchain): Delete frch_seg.
271 (frchain_root): Delete.
272 (seg_info): Define as macro.
273 * subsegs.c (frchain_root): Delete.
274 (abs_seg_info, und_seg_info, absolute_frchain): Delete.
275 (subsegs_begin, subseg_change): Adjust for above.
276 (subseg_set_rest): Likewise. Add new frchain structs to seginfo
277 rather than to one big list.
278 (subseg_get): Don't special case abs, und sections.
279 (subseg_new, subseg_force_new): Don't set frchainP here.
281 (subsegs_print_statistics): Adjust frag chain control list traversal.
282 * debug.c (dmp_frags): Likewise.
283 * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
284 at frchain_root. Make use of known frchain ordering.
285 (last_frag_for_seg): Likewise.
286 (get_frag_fix): Likewise. Add seg param.
287 (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
288 * write.c (chain_frchains_together_1): Adjust for struct frchain.
289 (SUB_SEGMENT_ALIGN): Likewise.
290 (subsegs_finish): Adjust frchain list traversal.
291 * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
292 (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
293 (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
294 (xtensa_fix_b_j_loop_end_frags): Likewise.
295 (xtensa_fix_close_loop_end_frags): Likewise.
296 (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
297 (retrieve_segment_info): Delete frch_seg initialisation.
299 2006-05-03 Alan Modra <amodra@bigpond.net.au>
301 * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
302 * config/obj-elf.h (obj_sec_set_private_data): Delete.
303 * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
304 * config/tc-mn10300.c (tc_gen_reloc): Likewise.
306 2006-05-02 Joseph Myers <joseph@codesourcery.com>
308 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
310 (md_apply_fix3): Multiply offset by 4 here for
311 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
313 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
314 Jan Beulich <jbeulich@novell.com>
316 * config/tc-i386.c (output_invalid_buf): Change size for
318 * config/tc-tic30.c (output_invalid_buf): Likewise.
320 * config/tc-i386.c (output_invalid): Cast none-ascii char to
322 * config/tc-tic30.c (output_invalid): Likewise.
324 2006-05-02 Daniel Jacobowitz <dan@codesourcery.com>
326 * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
327 (TEXI2POD): Use AM_MAKEINFOFLAGS.
328 (asconfig.texi): Don't set top_srcdir.
329 * doc/as.texinfo: Don't use top_srcdir.
330 * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
332 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
334 * config/tc-i386.c (output_invalid_buf): Change size to 16.
335 * config/tc-tic30.c (output_invalid_buf): Likewise.
337 * config/tc-i386.c (output_invalid): Use snprintf instead of
339 * config/tc-ia64.c (declare_register_set): Likewise.
340 (emit_one_bundle): Likewise.
341 (check_dependencies): Likewise.
342 * config/tc-tic30.c (output_invalid): Likewise.
344 2006-05-02 Paul Brook <paul@codesourcery.com>
346 * config/tc-arm.c (arm_optimize_expr): New function.
347 * config/tc-arm.h (md_optimize_expr): Define
348 (arm_optimize_expr): Add prototype.
349 (TC_FORCE_RELOCATION_SUB_SAME): Define.
351 2006-05-02 Ben Elliston <bje@au.ibm.com>
353 * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
356 * sb.h (sb_list_vector): Move to sb.c.
357 * sb.c (free_list): Use type of sb_list_vector directly.
358 (sb_build): Fix off-by-one error in assertion about `size'.
360 2006-05-01 Ben Elliston <bje@au.ibm.com>
362 * listing.c (listing_listing): Remove useless loop.
363 * macro.c (macro_expand): Remove is_positional local variable.
364 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
365 and simplify surrounding expressions, where possible.
366 (assign_symbol): Likewise.
367 (s_weakref): Likewise.
368 * symbols.c (colon): Likewise.
370 2006-05-01 James Lemke <jwlemke@wasabisystems.com>
372 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
374 2006-04-30 Thiemo Seufer <ths@mips.com>
375 David Ung <davidu@mips.com>
377 * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
378 (mips_immed): New table that records various handling of udi
379 instruction patterns.
380 (mips_ip): Adds udi handling.
382 2006-04-28 Alan Modra <amodra@bigpond.net.au>
384 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
385 of list rather than beginning.
387 2006-04-26 Julian Brown <julian@codesourcery.com>
389 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
390 (is_quarter_float): Rename from above. Simplify slightly.
391 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
393 (parse_neon_mov): Parse floating-point constants.
394 (neon_qfloat_bits): Fix encoding.
395 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
396 preference to integer encoding when using the F32 type.
398 2006-04-26 Julian Brown <julian@codesourcery.com>
400 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
401 zero-initialising structures containing it will lead to invalid types).
402 (arm_it): Add vectype to each operand.
403 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
405 (neon_typed_alias): New structure. Extra information for typed
407 (reg_entry): Add neon type info field.
408 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
409 Break out alternative syntax for coprocessor registers, etc. into...
410 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
411 out from arm_reg_parse.
412 (parse_neon_type): Move. Return SUCCESS/FAIL.
413 (first_error): New function. Call to ensure first error which occurs is
415 (parse_neon_operand_type): Parse exactly one type.
416 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
417 (parse_typed_reg_or_scalar): New function. Handle core of both
418 arm_typed_reg_parse and parse_scalar.
419 (arm_typed_reg_parse): Parse a register with an optional type.
420 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
422 (parse_scalar): Parse a Neon scalar with optional type.
423 (parse_reg_list): Use first_error.
424 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
425 (neon_alias_types_same): New function. Return true if two (alias) types
427 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
429 (insert_reg_alias): Return new reg_entry not void.
430 (insert_neon_reg_alias): New function. Insert type/index information as
431 well as register for alias.
432 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
433 make typed register aliases accordingly.
434 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
436 (s_unreq): Delete type information if present.
437 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
438 (s_arm_unwind_save_mmxwcg): Likewise.
439 (s_arm_unwind_movsp): Likewise.
440 (s_arm_unwind_setfp): Likewise.
441 (parse_shift): Likewise.
442 (parse_shifter_operand): Likewise.
443 (parse_address): Likewise.
444 (parse_tb): Likewise.
445 (tc_arm_regname_to_dw2regnum): Likewise.
446 (md_pseudo_table): Add dn, qn.
447 (parse_neon_mov): Handle typed operands.
448 (parse_operands): Likewise.
449 (neon_type_mask): Add N_SIZ.
450 (N_ALLMODS): New macro.
451 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
452 (el_type_of_type_chk): Add some safeguards.
453 (modify_types_allowed): Fix logic bug.
454 (neon_check_type): Handle operands with types.
455 (neon_three_same): Remove redundant optional arg handling.
456 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
457 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
458 (do_neon_step): Adjust accordingly.
459 (neon_cmode_for_logic_imm): Use first_error.
460 (do_neon_bitfield): Call neon_check_type.
461 (neon_dyadic): Rename to...
462 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
463 to allow modification of type of the destination.
464 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
465 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
466 (do_neon_compare): Make destination be an untyped bitfield.
467 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
468 (neon_mul_mac): Return early in case of errors.
469 (neon_move_immediate): Use first_error.
470 (neon_mac_reg_scalar_long): Fix type to include scalar.
471 (do_neon_dup): Likewise.
472 (do_neon_mov): Likewise (in several places).
473 (do_neon_tbl_tbx): Fix type.
474 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
475 (do_neon_ld_dup): Exit early in case of errors and/or use
477 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
478 Handle .dn/.qn directives.
479 (REGDEF): Add zero for reg_entry neon field.
481 2006-04-26 Julian Brown <julian@codesourcery.com>
483 * config/tc-arm.c (limits.h): Include.
484 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
485 (fpu_vfp_v3_or_neon_ext): Declare constants.
486 (neon_el_type): New enumeration of types for Neon vector elements.
487 (neon_type_el): New struct. Define type and size of a vector element.
488 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
490 (neon_type): Define struct. The type of an instruction.
491 (arm_it): Add 'vectype' for the current instruction.
492 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
493 (vfp_sp_reg_pos): Rename to...
494 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
496 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
497 (Neon D or Q register).
498 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
500 (GE_OPT_PREFIX_BIG): Define constant, for use in...
501 (my_get_expression): Allow above constant as argument to accept
502 64-bit constants with optional prefix.
503 (arm_reg_parse): Add extra argument to return the specific type of
504 register in when either a D or Q register (REG_TYPE_NDQ) is
505 requested. Can be NULL.
506 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
507 (parse_reg_list): Update for new arm_reg_parse args.
508 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
509 (parse_neon_el_struct_list): New function. Parse element/structure
510 register lists for VLD<n>/VST<n> instructions.
511 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
512 (s_arm_unwind_save_mmxwr): Likewise.
513 (s_arm_unwind_save_mmxwcg): Likewise.
514 (s_arm_unwind_movsp): Likewise.
515 (s_arm_unwind_setfp): Likewise.
516 (parse_big_immediate): New function. Parse an immediate, which may be
517 64 bits wide. Put results in inst.operands[i].
518 (parse_shift): Update for new arm_reg_parse args.
519 (parse_address): Likewise. Add parsing of alignment specifiers.
520 (parse_neon_mov): Parse the operands of a VMOV instruction.
521 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
522 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
523 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
524 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
525 (parse_operands): Handle new codes above.
526 (encode_arm_vfp_sp_reg): Rename to...
527 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
528 selected VFP version only supports D0-D15.
529 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
530 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
531 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
532 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
533 encode_arm_vfp_reg name, and allow 32 D regs.
534 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
535 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
537 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
538 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
539 constant-load and conversion insns introduced with VFPv3.
540 (neon_tab_entry): New struct.
541 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
542 those which are the targets of pseudo-instructions.
543 (neon_opc): Enumerate opcodes, use as indices into...
544 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
545 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
546 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
547 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
549 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
551 (neon_type_mask): New. Compact type representation for type checking.
552 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
553 permitted type combinations.
554 (N_IGNORE_TYPE): New macro.
555 (neon_check_shape): New function. Check an instruction shape for
556 multiple alternatives. Return the specific shape for the current
558 (neon_modify_type_size): New function. Modify a vector type and size,
559 depending on the bit mask in argument 1.
560 (neon_type_promote): New function. Convert a given "key" type (of an
561 operand) into the correct type for a different operand, based on a bit
563 (type_chk_of_el_type): New function. Convert a type and size into the
564 compact representation used for type checking.
565 (el_type_of_type_ckh): New function. Reverse of above (only when a
566 single bit is set in the bit mask).
567 (modify_types_allowed): New function. Alter a mask of allowed types
568 based on a bit mask of modifications.
569 (neon_check_type): New function. Check the type of the current
570 instruction against the variable argument list. The "key" type of the
571 instruction is returned.
572 (neon_dp_fixup): New function. Fill in and modify instruction bits for
573 a Neon data-processing instruction depending on whether we're in ARM
574 mode or Thumb-2 mode.
575 (neon_logbits): New function.
576 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
577 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
578 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
579 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
580 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
581 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
582 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
583 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
584 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
585 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
586 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
587 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
588 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
589 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
590 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
591 (neon_move_immediate, do_neon_mvn, neon_mixed_length)
592 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
593 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
594 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
595 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
596 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
597 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
598 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
599 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
600 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
602 (parse_neon_type): New function. Parse Neon type specifier.
603 (opcode_lookup): Allow parsing of Neon type specifiers.
604 (REGNUM2, REGSETH, REGSET2): New macros.
605 (reg_names): Add new VFPv3 and Neon registers.
606 (NUF, nUF, NCE, nCE): New macros for opcode table.
607 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
608 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
609 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
610 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
611 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
612 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
613 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
614 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
615 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
616 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
617 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
618 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
619 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
620 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
622 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
623 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
624 (arm_option_cpu_value): Add vfp3 and neon.
625 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
628 2006-04-25 Bob Wilson <bob.wilson@acm.org>
630 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
631 syntax instead of hardcoded opcodes with ".w18" suffixes.
632 (wide_branch_opcode): New.
633 (build_transition): Use it to check for wide branch opcodes with
634 either ".w18" or ".w15" suffixes.
636 2006-04-25 Bob Wilson <bob.wilson@acm.org>
638 * config/tc-xtensa.c (xtensa_create_literal_symbol,
639 xg_assemble_literal, xg_assemble_literal_space): Do not set the
640 frag's is_literal flag.
642 2006-04-25 Bob Wilson <bob.wilson@acm.org>
644 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
646 2006-04-23 Kazu Hirata <kazu@codesourcery.com>
648 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
649 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
650 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
651 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
652 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
654 2005-04-20 Paul Brook <paul@codesourcery.com>
656 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
658 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
660 2006-04-19 Alan Modra <amodra@bigpond.net.au>
662 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
663 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
664 Make some cpus unsupported on ELF. Run "make dep-am".
665 * Makefile.in: Regenerate.
667 2006-04-19 Alan Modra <amodra@bigpond.net.au>
669 * configure.in (--enable-targets): Indent help message.
670 * configure: Regenerate.
672 2006-04-18 H.J. Lu <hongjiu.lu@intel.com>
675 * config/tc-i386.c (i386_immediate): Check illegal immediate
678 2006-04-18 Alan Modra <amodra@bigpond.net.au>
680 * config/tc-i386.c: Formatting.
681 (output_disp, output_imm): ISO C90 params.
683 * frags.c (frag_offset_fixed_p): Constify args.
684 * frags.h (frag_offset_fixed_p): Ditto.
686 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
687 (COFF_MAGIC): Delete.
689 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
691 2006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
693 * po/POTFILES.in: Regenerated.
695 2006-04-16 Mark Mitchell <mark@codesourcery.com>
697 * doc/as.texinfo: Mention that some .type syntaxes are not
698 supported on all architectures.
700 2006-04-14 Sterling Augustine <sterling@tensilica.com>
702 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
703 instructions when such transformations have been disabled.
705 2006-04-10 Sterling Augustine <sterling@tensilica.com>
707 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
708 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
709 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
710 decoding the loop instructions. Remove current_offset variable.
711 (xtensa_fix_short_loop_frags): Likewise.
712 (min_bytes_to_other_loop_end): Remove current_offset argument.
714 2006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl>
716 * config/tc-z80.c (z80_optimize_expr): Removed.
717 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
719 2006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
721 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
722 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
723 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
724 atmega644, atmega329, atmega3290, atmega649, atmega6490,
725 atmega406, atmega640, atmega1280, atmega1281, at90can32,
726 at90can64, at90usb646, at90usb647, at90usb1286 and
728 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
730 2006-04-07 Paul Brook <paul@codesourcery.com>
732 * config/tc-arm.c (parse_operands): Set default error message.
734 2006-04-07 Paul Brook <paul@codesourcery.com>
736 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
738 2006-04-07 Paul Brook <paul@codesourcery.com>
740 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
742 2006-04-07 Paul Brook <paul@codesourcery.com>
744 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
745 (move_or_literal_pool): Handle Thumb-2 instructions.
746 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
748 2006-04-07 Alan Modra <amodra@bigpond.net.au>
751 * config/tc-i386.c (match_template): Move 64-bit operand tests
754 2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
756 * po/Make-in: Add install-html target.
757 * Makefile.am: Add install-html and install-html-recursive targets.
758 * Makefile.in: Regenerate.
759 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
760 * configure: Regenerate.
761 * doc/Makefile.am: Add install-html and install-html-am targets.
762 * doc/Makefile.in: Regenerate.
764 2006-04-06 Alan Modra <amodra@bigpond.net.au>
766 * frags.c (frag_offset_fixed_p): Reinitialise offset before
769 2006-04-05 Richard Sandiford <richard@codesourcery.com>
770 Daniel Jacobowitz <dan@codesourcery.com>
772 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
773 (GOTT_BASE, GOTT_INDEX): New.
774 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
775 GOTT_INDEX when generating VxWorks PIC.
776 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
777 use the generic *-*-vxworks* stanza instead.
779 2006-04-04 Alan Modra <amodra@bigpond.net.au>
782 * frags.c (frag_offset_fixed_p): New function.
783 * frags.h (frag_offset_fixed_p): Declare.
784 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
785 (resolve_expression): Likewise.
787 2006-04-03 Sterling Augustine <sterling@tensilica.com>
789 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
790 of the same length but different numbers of slots.
792 2006-03-30 Andreas Schwab <schwab@suse.de>
794 * configure.in: Fix help string for --enable-targets option.
795 * configure: Regenerate.
797 2006-03-28 Nathan Sidwell <nathan@codesourcery.com>
799 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
800 (m68k_ip): ... here. Use for all chips. Protect against buffer
801 overrun and avoid excessive copying.
803 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
804 m68020_control_regs, m68040_control_regs, m68060_control_regs,
805 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
806 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
807 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
808 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
809 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
810 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
811 mcf5282_ctrl, mcfv4e_ctrl): ... these.
812 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
813 (struct m68k_cpu): Change chip field to control_regs.
814 (current_chip): Remove.
816 (m68k_archs, m68k_extensions): Adjust.
817 (m68k_cpus): Reorder to be in cpu number order. Adjust.
818 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
819 (find_cf_chip): Reimplement for new organization of cpu table.
820 (select_control_regs): Remove.
822 (struct save_opts): Save control regs, not chip.
823 (s_save, s_restore): Adjust.
824 (m68k_lookup_cpu): Give deprecated warning when necessary.
825 (m68k_init_arch): Adjust.
826 (md_show_usage): Adjust for new cpu table organization.
828 2006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
830 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
831 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
832 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
834 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
835 (any_gotrel): New rule.
836 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
837 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
839 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
840 (bfin_pic_ptr): New function.
841 (md_pseudo_table): Add it for ".picptr".
842 (OPTION_FDPIC): New macro.
843 (md_longopts): Add -mfdpic.
844 (md_parse_option): Handle it.
845 (md_begin): Set BFD flags.
846 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
847 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
849 * Makefile.am (bfin-parse.o): Update dependencies.
850 (DEPTC_bfin_elf): Likewise.
851 * Makefile.in: Regenerate.
853 2006-03-25 Richard Sandiford <richard@codesourcery.com>
855 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
856 mcfemac instead of mcfmac.
858 2006-03-23 Michael Matz <matz@suse.de>
860 * config/tc-i386.c (type_names): Correct placement of 'static'.
861 (reloc): Map some more relocs to their 64 bit counterpart when
863 (output_insn): Work around breakage if DEBUG386 is defined.
864 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
865 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
866 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
869 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
871 (md_convert_frag): Jumps can now be larger than 2GB away, error
873 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
874 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
876 2006-03-22 Richard Sandiford <richard@codesourcery.com>
877 Daniel Jacobowitz <dan@codesourcery.com>
878 Phil Edwards <phil@codesourcery.com>
879 Zack Weinberg <zack@codesourcery.com>
880 Mark Mitchell <mark@codesourcery.com>
881 Nathan Sidwell <nathan@codesourcery.com>
883 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
884 (md_begin): Complain about -G being used for PIC. Don't change
885 the text, data and bss alignments on VxWorks.
886 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
887 generating VxWorks PIC.
888 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
889 (macro): Likewise, but do not treat la $25 specially for
890 VxWorks PIC, and do not handle jal.
891 (OPTION_MVXWORKS_PIC): New macro.
892 (md_longopts): Add -mvxworks-pic.
893 (md_parse_option): Don't complain about using PIC and -G together here.
894 Handle OPTION_MVXWORKS_PIC.
895 (md_estimate_size_before_relax): Always use the first relaxation
897 * config/tc-mips.h (VXWORKS_PIC): New.
899 2006-03-21 Paul Brook <paul@codesourcery.com>
901 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
903 2006-03-21 Sterling Augustine <sterling@tensilica.com>
905 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
906 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
907 (get_loop_align_size): New.
908 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
909 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
910 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
911 (get_noop_aligned_address): Use get_loop_align_size.
912 (get_aligned_diff): Likewise.
914 2006-03-21 Paul Brook <paul@codesourcery.com>
916 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
918 2006-03-20 Paul Brook <paul@codesourcery.com>
920 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
921 (do_t_branch): Encode branches inside IT blocks as unconditional.
922 (do_t_cps): New function.
923 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
924 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
925 (opcode_lookup): Allow conditional suffixes on all instructions in
927 (md_assemble): Advance condexec state before checking for errors.
928 (insns): Use do_t_cps.
930 2006-03-20 Paul Brook <paul@codesourcery.com>
932 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
935 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
937 * config/tc-vax.c: Update copyright year.
938 * config/tc-vax.h: Likewise.
940 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
942 * config/tc-vax.c (md_chars_to_number): Used only locally, so
944 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
946 2006-03-17 Paul Brook <paul@codesourcery.com>
948 * config/tc-arm.c (insns): Add ldm and stm.
950 2006-03-17 Ben Elliston <bje@au.ibm.com>
953 * doc/as.texinfo (Ident): Document this directive more thoroughly.
955 2006-03-16 Paul Brook <paul@codesourcery.com>
957 * config/tc-arm.c (insns): Add "svc".
959 2006-03-13 Bob Wilson <bob.wilson@acm.org>
961 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
962 flag and avoid double underscore prefixes.
964 2006-03-10 Paul Brook <paul@codesourcery.com>
966 * config/tc-arm.c (md_begin): Handle EABIv5.
967 (arm_eabis): Add EF_ARM_EABI_VER5.
968 * doc/c-arm.texi: Document -meabi=5.
970 2006-03-10 Ben Elliston <bje@au.ibm.com>
972 * app.c (do_scrub_chars): Simplify string handling.
974 2006-03-07 Richard Sandiford <richard@codesourcery.com>
975 Daniel Jacobowitz <dan@codesourcery.com>
976 Zack Weinberg <zack@codesourcery.com>
977 Nathan Sidwell <nathan@codesourcery.com>
978 Paul Brook <paul@codesourcery.com>
979 Ricardo Anguiano <anguiano@codesourcery.com>
980 Phil Edwards <phil@codesourcery.com>
982 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
983 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
985 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
986 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
987 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
989 2006-03-06 Bob Wilson <bob.wilson@acm.org>
991 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
992 even when using the text-section-literals option.
994 2006-03-06 Nathan Sidwell <nathan@codesourcery.com>
996 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
998 (m68k_ip): <case 'J'> Check we have some control regs.
999 (md_parse_option): Allow raw arch switch.
1000 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
1001 whether 68881 or cfloat was meant by -mfloat.
1002 (md_show_usage): Adjust extension display.
1003 (m68k_elf_final_processing): Adjust.
1005 2006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
1007 * config/tc-avr.c (avr_mod_hash_value): New function.
1008 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
1009 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
1010 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
1011 instead of int avr_ldi_expression: use avr_mod_hash_value instead
1013 (tc_gen_reloc): Handle substractions of symbols, if possible do
1014 fixups, abort otherwise.
1015 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
1016 tc_fix_adjustable): Define.
1018 2006-03-02 James E Wilson <wilson@specifix.com>
1020 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
1021 change the template, then clear md.slot[curr].end_of_insn_group.
1023 2006-02-28 Jan Beulich <jbeulich@novell.com>
1025 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
1027 2006-02-28 Jan Beulich <jbeulich@novell.com>
1030 * macro.c (getstring): Don't treat parentheses special anymore.
1031 (get_any_string): Don't consider '(' and ')' as quoting anymore.
1032 Special-case '(', ')', '[', and ']' when dealing with non-quoting
1035 2006-02-28 Mat <mat@csail.mit.edu>
1037 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
1039 2006-02-27 Jakub Jelinek <jakub@redhat.com>
1041 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
1043 (CFI_signal_frame): Define.
1044 (cfi_pseudo_table): Add .cfi_signal_frame.
1045 (dot_cfi): Handle CFI_signal_frame.
1046 (output_cie): Handle cie->signal_frame.
1047 (select_cie_for_fde): Don't share CIE if signal_frame flag is
1048 different. Copy signal_frame from FDE to newly created CIE.
1049 * doc/as.texinfo: Document .cfi_signal_frame.
1051 2006-02-27 Carlos O'Donell <carlos@codesourcery.com>
1053 * doc/Makefile.am: Add html target.
1054 * doc/Makefile.in: Regenerate.
1055 * po/Make-in: Add html target.
1057 2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
1059 * config/tc-i386.c (output_insn): Support Intel Merom New
1062 * config/tc-i386.h (CpuMNI): New.
1063 (CpuUnknownFlags): Add CpuMNI.
1065 2006-02-24 David S. Miller <davem@sunset.davemloft.net>
1067 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
1068 (hpriv_reg_table): New table for hyperprivileged registers.
1069 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
1072 2006-02-24 DJ Delorie <dj@redhat.com>
1074 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
1075 (tc_gen_reloc): Don't define.
1076 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
1077 (OPTION_LINKRELAX): New.
1078 (md_longopts): Add it.
1080 (md_parse_options): Set it.
1081 (md_assemble): Emit relaxation relocs as needed.
1082 (md_convert_frag): Emit relaxation relocs as needed.
1083 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
1084 (m32c_apply_fix): New.
1085 (tc_gen_reloc): New.
1086 (m32c_force_relocation): Force out jump relocs when relaxing.
1087 (m32c_fix_adjustable): Return false if relaxing.
1089 2006-02-24 Paul Brook <paul@codesourcery.com>
1091 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
1092 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
1093 (struct asm_barrier_opt): Define.
1094 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
1095 (parse_psr): Accept V7M psr names.
1096 (parse_barrier): New function.
1097 (enum operand_parse_code): Add OP_oBARRIER.
1098 (parse_operands): Implement OP_oBARRIER.
1099 (do_barrier): New function.
1100 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
1101 (do_t_cpsi): Add V7M restrictions.
1102 (do_t_mrs, do_t_msr): Validate V7M variants.
1103 (md_assemble): Check for NULL variants.
1104 (v7m_psrs, barrier_opt_names): New tables.
1105 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
1106 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
1107 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
1108 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
1109 (struct cpu_arch_ver_table): Define.
1110 (cpu_arch_ver): New.
1111 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
1112 Tag_CPU_arch_profile.
1113 * doc/c-arm.texi: Document new cpu and arch options.
1115 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1117 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
1119 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1121 * config/tc-ia64.c: Update copyright years.
1123 2006-02-22 H.J. Lu <hongjiu.lu@intel.com>
1125 * config/tc-ia64.c (specify_resource): Add the rule 17 from
1128 2005-02-22 Paul Brook <paul@codesourcery.com>
1130 * config/tc-arm.c (do_pld): Remove incorrect write to
1132 (encode_thumb32_addr_mode): Use correct operand.
1134 2006-02-21 Paul Brook <paul@codesourcery.com>
1136 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
1138 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
1139 Anil Paranjape <anilp1@kpitcummins.com>
1140 Shilin Shakti <shilins@kpitcummins.com>
1142 * Makefile.am: Add xc16x related entry.
1143 * Makefile.in: Regenerate.
1144 * configure.in: Added xc16x related entry.
1145 * configure: Regenerate.
1146 * config/tc-xc16x.h: New file
1147 * config/tc-xc16x.c: New file
1148 * doc/c-xc16x.texi: New file for xc16x
1149 * doc/all.texi: Entry for xc16x
1150 * doc/Makefile.texi: Added c-xc16x.texi
1151 * NEWS: Announce the support for the new target.
1153 2006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
1155 * configure.tgt: set emulation for mips-*-netbsd*
1157 2006-02-14 Jakub Jelinek <jakub@redhat.com>
1159 * config.in: Rebuilt.
1161 2006-02-13 Bob Wilson <bob.wilson@acm.org>
1163 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
1164 from 1, not 0, in error messages.
1165 (md_assemble): Simplify special-case check for ENTRY instructions.
1166 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
1167 operand in error message.
1169 2006-02-13 Joseph S. Myers <joseph@codesourcery.com>
1171 * configure.tgt (arm-*-linux-gnueabi*): Change to
1174 2006-02-10 Nick Clifton <nickc@redhat.com>
1176 * config/tc-crx.c (check_range): Ensure that the sign bit of a
1177 32-bit value is propagated into the upper bits of a 64-bit long.
1179 * config/tc-arc.c (init_opcode_tables): Fix cast.
1180 (arc_extoper, md_operand): Likewise.
1182 2006-02-09 David Heine <dlheine@tensilica.com>
1184 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
1185 each relaxation step.
1187 2006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
1189 * configure.in (CHECK_DECLS): Add vsnprintf.
1190 * configure: Regenerate.
1191 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
1192 include/declare here, but...
1193 * as.h: Move code detecting VARARGS idiom to the top.
1194 (errno.h, stdarg.h, varargs.h, va_list): ...here.
1195 (vsnprintf): Declare if not already declared.
1197 2006-02-08 H.J. Lu <hongjiu.lu@intel.com>
1199 * as.c (close_output_file): New.
1200 (main): Register close_output_file with xatexit before
1201 dump_statistics. Don't call output_file_close.
1203 2006-02-07 Nathan Sidwell <nathan@codesourcery.com>
1205 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
1206 mcf5329_control_regs): New.
1207 (not_current_architecture, selected_arch, selected_cpu): New.
1208 (m68k_archs, m68k_extensions): New.
1209 (archs): Renamed to ...
1210 (m68k_cpus): ... here. Adjust.
1212 (md_pseudo_table): Add arch and cpu directives.
1213 (find_cf_chip, m68k_ip): Adjust table scanning.
1214 (no_68851, no_68881): Remove.
1215 (md_assemble): Lazily initialize.
1216 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
1217 (md_init_after_args): Move functionality to m68k_init_arch.
1218 (mri_chip): Adjust table scanning.
1219 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
1220 options with saner parsing.
1221 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
1222 m68k_init_arch): New.
1223 (s_m68k_cpu, s_m68k_arch): New.
1224 (md_show_usage): Adjust.
1225 (m68k_elf_final_processing): Set CF EF flags.
1226 * config/tc-m68k.h (m68k_init_after_args): Remove.
1227 (tc_init_after_args): Remove.
1228 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
1229 (M68k-Directives): Document .arch and .cpu directives.
1231 2006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl>
1233 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
1234 synonyms for equ and defl.
1235 (z80_cons_fix_new): New function.
1236 (emit_byte): Disallow relative jumps to absolute locations.
1237 (emit_data): Only handle defb, prototype changed, because defb is
1238 now handled as pseudo-op rather than an instruction.
1239 (instab): Entries for defb,defw,db,dw moved from here...
1240 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
1241 Add entries for def24,def32,d24,d32.
1242 (md_assemble): Improved error handling.
1243 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
1244 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
1245 (z80_cons_fix_new): Declare.
1246 * doc/c-z80.texi (defb, db): Mention warning on overflow.
1247 (def24,d24,def32,d32): New pseudo-ops.
1249 2006-02-02 Paul Brook <paul@codesourcery.com>
1251 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
1253 2005-02-02 Paul Brook <paul@codesourcery.com>
1255 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
1256 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
1257 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
1258 T2_OPCODE_RSB): Define.
1259 (thumb32_negate_data_op): New function.
1260 (md_apply_fix): Use it.
1262 2006-01-31 Bob Wilson <bob.wilson@acm.org>
1264 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
1266 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
1267 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
1269 (relaxation_requirements): Add pfinish_frag argument and use it to
1270 replace setting tinsn->record_fix fields.
1271 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
1272 and vinsn_to_insnbuf. Remove references to record_fix and
1273 slot_sub_symbols fields.
1274 (xtensa_mark_narrow_branches): Delete unused code.
1275 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
1277 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
1279 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
1280 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
1281 of the record_fix field. Simplify error messages for unexpected
1283 (set_expr_symbol_offset_diff): Delete.
1285 2006-01-31 Paul Brook <paul@codesourcery.com>
1287 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
1289 2006-01-31 Paul Brook <paul@codesourcery.com>
1290 Richard Earnshaw <rearnsha@arm.com>
1292 * config/tc-arm.c: Use arm_feature_set.
1293 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
1294 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
1295 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
1298 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
1299 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
1300 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
1301 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
1303 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
1304 (arm_opts): Move old cpu/arch options from here...
1305 (arm_legacy_opts): ... to here.
1306 (md_parse_option): Search arm_legacy_opts.
1307 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
1308 (arm_float_abis, arm_eabis): Make const.
1310 2006-01-25 Bob Wilson <bob.wilson@acm.org>
1312 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
1314 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1316 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
1317 in load immediate intruction.
1319 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1321 * config/bfin-parse.y (value_match): Use correct conversion
1322 specifications in template string for __FILE__ and __LINE__.
1326 2006-01-18 Alexandre Oliva <aoliva@redhat.com>
1328 Introduce TLS descriptors for i386 and x86_64.
1329 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
1330 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
1331 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
1332 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
1333 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
1335 (build_modrm_byte): Set up zero modrm for TLS desc calls.
1336 (lex_got): Handle @tlsdesc and @tlscall.
1337 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
1339 2006-01-11 Nick Clifton <nickc@redhat.com>
1341 Fixes for building on 64-bit hosts:
1342 * config/tc-avr.c (mod_index): New union to allow conversion
1343 between pointers and integers.
1344 (md_begin, avr_ldi_expression): Use it.
1345 * config/tc-i370.c (md_assemble): Add cast for argument to print
1347 * config/tc-tic54x.c (subsym_substitute): Likewise.
1348 * config/tc-mn10200.c (md_assemble): Use a union to convert the
1349 opindex field of fr_cgen structure into a pointer so that it can
1350 be stored in a frag.
1351 * config/tc-mn10300.c (md_assemble): Likewise.
1352 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
1354 * config/tc-v850.c: Replace uses of (int) casts with correct
1357 2006-01-09 H.J. Lu <hongjiu.lu@intel.com>
1360 * symbols.c (snapshot_symbol): Don't change a defined symbol.
1362 2006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
1365 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
1366 a local-label reference.
1368 For older changes see ChangeLog-2005
1374 version-control: never