1 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
3 * doc/c-mips.texi (MIPS Stabs): Remove section.
5 2013-06-20 Richard Sandiford <rdsandiford@googlemail.com>
7 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS, ISA_SUPPORTS_DSP_ASE)
8 (ISA_SUPPORTS_DSP64_ASE, ISA_SUPPORTS_DSPR2_ASE, ISA_SUPPORTS_EVA_ASE)
9 (ISA_SUPPORTS_MT_ASE, ISA_SUPPORTS_MCU_ASE, ISA_SUPPORTS_VIRT_ASE)
10 (ISA_SUPPORTS_VIRT64_ASE): Delete.
11 (mips_ase): New structure.
12 (mips_ases): New table.
13 (FP64_ASES): New macro.
14 (mips_ase_groups): New array.
15 (mips_isa_rev, mips_ase_mask, mips_check_isa_supports_ase)
16 (mips_check_isa_supports_ases, mips_set_ase, mips_lookup_ase): New
18 (is_opcode_valid): Use mips_ases to get the 64-bit ASE flags.
19 (md_parse_option): Use mips_ases and mips_set_ase instead of
20 separate case statements for each ASE option.
21 (mips_after_parse_args): Use FP64_ASES. Use
22 mips_check_isa_supports_ases to check the ASEs against
24 (s_mipsset): Use mips_ases and mips_set_ase instead of
25 separate if statements for each ASE option. Use
26 mips_check_isa_supports_ases, even when a non-ASE option
29 2013-06-19 Greta Yorsh <Greta.Yorsh@arm.com>
31 * config/tc-arm.c (arm_cpus): Add support for Cortex-A12.
33 2013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
35 * config/tc-mips.c (md_shortopts, options, md_longopts)
36 (md_longopts_size): Move earlier in file.
38 2013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
40 * config/tc-mips.c (mips_set_options): Replace separate "ase_*" fields
41 with a single "ase" bitmask.
42 (mips_opts): Update accordingly.
43 (file_ase, file_ase_explicit): New variables.
44 (file_ase_mips3d, file_ase_mdmx, file_ase_smartmips, file_ase_dsp)
45 (file_ase_dspr2, file_ase_eva, file_ase_mt, file_ase_virt): Delete.
46 (ISA_HAS_ROR): Adjust for mips_set_options change.
47 (is_opcode_valid): Take the base ase mask directly from mips_opts.
48 (mips_ip): Adjust for mips_set_options change.
49 (md_parse_option): Likewise. Update file_ase_explicit.
50 (mips_after_parse_args): Adjust for mips_set_options change.
51 Use bitmask operations to select the default ASEs. Set file_ase
52 rather than individual per-ASE variables.
53 (s_mipsset): Adjust for mips_set_options change.
54 (mips_elf_final_processing): Test file_ase rather than
55 file_ase_mdmx. Remove commented-out code.
57 2013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
59 * config/tc-mips.c (mips_cpu_info): Add an "ase" field.
60 (MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, MIPS_CPU_ASE_MT)
61 (MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX, MIPS_CPU_ASE_DSPR2)
62 (MIPS_CPU_ASE_MCU, MIPS_CPU_ASE_VIRT, MIPS_CPU_ASE_EVA): Delete.
63 (mips_after_parse_args): Use the new "ase" field to choose
65 (mips_cpu_info_table): Move ASEs from the "flags" field to the
68 2013-06-18 Richard Earnshaw <rearnsha@arm.com>
70 * config/tc-arm.c (symbol_preemptible): New function.
71 (relax_branch): Use it.
73 2013-06-17 Catherine Moore <clm@codesourcery.com>
74 Maciej W. Rozycki <macro@codesourcery.com>
75 Chao-Ying Fu <fu@mips.com>
77 * config/tc-mips.c (mips_set_options): Add ase_eva.
78 (mips_set_options mips_opts): Add ase_eva.
79 (file_ase_eva): Declare.
80 (ISA_SUPPORTS_EVA_ASE): Define.
81 (IS_SEXT_9BIT_NUM): Define.
82 (MIPS_CPU_ASE_EVA): Define.
83 (is_opcode_valid): Add support for ase_eva.
84 (macro_build): Likewise.
86 (validate_mips_insn): Likewise.
87 (validate_micromips_insn): Likewise.
89 (options): Add OPTION_EVA and OPTION_NO_EVA.
90 (md_longopts): Add -meva and -mno-eva.
91 (md_parse_option): Process new options.
92 (mips_after_parse_args): Check for valid EVA combinations.
93 (s_mipsset): Likewise.
95 2013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
97 * dwarf2dbg.h (dwarf2_move_insn): Declare.
98 * dwarf2dbg.c (line_subseg): Add pmove_tail.
99 (get_line_subseg): Add create_p argument. Initialize pmove_tail.
100 (dwarf2_gen_line_info_1): Update call accordingly.
101 (dwarf2_move_insn): New function.
102 * config/tc-mips.c (append_insn): Use dwarf2_move_insn.
104 2013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
108 2011-09-05 Richard Sandiford <rdsandiford@googlemail.com>
111 * dwarf2dbg.c (pending_lines, pending_lines_tail): New variables.
112 (dwarf2_gen_line_info_1): Delete.
113 (dwarf2_push_line, dwarf2_flush_pending_lines): New functions.
114 (dwarf2_gen_line_info, dwarf2_emit_label): Use them.
115 (dwarf2_consume_line_info): Call dwarf2_flush_pending_lines.
116 (dwarf2_directive_loc): Push previous .locs instead of generating
119 2013-06-13 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
121 * config/tc-mips.c (ISA_SUPPORTS_VIRT_ASE): Support micromips.
122 (ISA_SUPPORTS_VIRT64_ASE): Support 64-bit micromips.
124 2013-06-13 Nick Clifton <nickc@redhat.com>
127 * config/tc-m68k.h (TC_CHECK_ADJUSTED_BROKEN_DOT_WORD): Define.
128 * config/tc-m68k.c (tc_m68k_check_adjusted_broken_word): New
129 function. Generates an error if the adjusted offset is out of a
132 2013-06-12 Sandra Loosemore <sandra@codesourcery.com>
134 * config/tc-nios2.c (md_apply_fix): Mask constant
135 BFD_RELOC_NIOS2_HIADJ16 value to 16 bits.
137 2013-06-10 Maciej W. Rozycki <macro@codesourcery.com>
139 * config/tc-mips.c (append_insn): Don't do branch relaxation for
140 MIPS-3D instructions either.
141 (md_convert_frag): Update the COPx branch mask accordingly.
143 * config/tc-mips.c (md_show_usage): Document --[no-]relax-branch
145 * doc/as.texinfo (Overview): Add --relax-branch and
147 * doc/c-mips.texi (MIPS Opts): Document --relax-branch and
150 2013-06-09 Sandra Loosemore <sandra@codesourcery.com>
152 * config/tc-nios2.c (nios2_parse_args): Allow trap argument to
155 2013-06-08 Catherine Moore <clm@codesourcery.com>
157 * config/tc-mips.c (is_opcode_valid): Build ASE mask.
158 (is_opcode_valid_16): Pass ase value to opcode_is_member.
159 (append_insn): Change INSN_xxxx to ASE_xxxx.
161 2013-06-01 George Thomas <george.thomas@atmel.com>
163 * gas/config/tc-avr.c: Change ISA for devices with USB support to
166 2013-05-31 H.J. Lu <hongjiu.lu@intel.com>
168 * config/tc-i386.c (md_begin): Don't align text/data/bss sections
171 2013-05-31 Paul Brook <paul@codesourcery.com>
174 * config/tc-mips.c (s_ehword): New.
176 2013-05-30 Paul Brook <paul@codesourcery.com>
178 * config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH.
180 2013-05-29 Maciej W. Rozycki <macro@codesourcery.com>
182 * write.c (resolve_reloc_expr_symbols): On REL targets don't
183 convert relocs who have no relocatable field either. Rephrase
184 the conditional so that the PC-relative check is only applied
187 2013-05-28 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
189 * config/tc-mips.c (macro) <ld>: Don't use $zero for address
192 2013-05-28 Yufeng Zhang <yufeng.zhang@arm.com>
194 * config/tc-aarch64.c (reloc_table): Update to use
195 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 instead of
196 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE.
197 (md_apply_fix): Likewise.
198 (aarch64_force_relocation): Likewise.
200 2013-05-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
202 * config/tc-arm.c (it_fsm_post_encode): Improve
203 warning messages about deprecated IT block formats.
205 2013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com>
207 * config/tc-aarch64.c (md_apply_fix): Move value range checking
208 inside fx_done condition.
210 2013-05-22 Jürgen Urban <JuergenUrban@gmx.de>
212 * config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB.
214 2013-05-20 Peter Bergner <bergner@vnet.ibm.com>
216 * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error
217 and clean up warning when using PRINT_OPCODE_TABLE.
219 2013-05-20 Alan Modra <amodra@gmail.com>
221 * config/tc-ppc.c (md_apply_fix): Hoist code common to insn
222 and data fixups performing shift/high adjust/sign extension on
223 fieldval. Sink fx_pcrel handling and checks. Use fixP->fx_size
224 when writing data fixups rather than recalculating size.
226 2013-05-16 Jan-Benedict Glaw <jbglaw@lug-owl.de>
228 * doc/c-msp430.texi: Fix typo.
230 2013-05-16 Tristan Gingold <gingold@adacore.com>
232 * config/tc-ppc.c (ppc_is_toc_sym): Symbols of class XMC_TC
233 are also TOC symbols.
235 2013-05-16 Nick Clifton <nickc@redhat.com>
237 * config/tc-msp430.c: Make -mmcu recognise more part numbers.
238 Add -mcpu command to specify core type.
239 * doc/c-msp430.texi: Update documentation.
241 2013-05-09 Andrew Pinski <apinski@cavium.com>
243 * config/tc-mips.c (struct mips_set_options): New ase_virt field.
244 (mips_opts): Update for the new field.
245 (file_ase_virt): New variable.
246 (ISA_SUPPORTS_VIRT_ASE): New macro.
247 (ISA_SUPPORTS_VIRT64_ASE): New macro.
248 (MIPS_CPU_ASE_VIRT): New define.
249 (is_opcode_valid): Handle ase_virt.
250 (macro_build): Handle "+J".
251 (validate_mips_insn): Likewise.
253 (enum options): Add OPTION_VIRT and OPTION_NO_VIRT.
254 (md_longopts): Add mvirt and mnovirt
255 (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT.
256 (mips_after_parse_args): Handle ase_virt field.
257 (s_mipsset): Handle "virt" and "novirt".
258 (mips_elf_final_processing): Add a comment about virt ASE might need
260 (md_show_usage): Print out the usage of -mvirt and mno-virt options.
261 * doc/c-mips.texi: Document -mvirt and -mno-virt.
262 Document ".set virt" and ".set novirt".
264 2013-05-09 Alan Modra <amodra@gmail.com>
266 * config/tc-ppc.c (md_apply_fix): Sign extend fieldval under
267 control of operand flag bits.
269 2013-05-07 Alan Modra <amodra@gmail.com>
271 * config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro.
272 (PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D): Likewise.
273 (PPC_VLE_HI16A, PPC_VLE_HI16D): Likewise.
274 (PPC_VLE_HA16A, PPC_VLE_HA16D): Likewise.
275 (md_apply_fix): Set fx_no_overflow for assorted relocations.
276 Shift and sign-extend fieldval for use by some VLE reloc
277 operand->insert functions.
279 2013-05-06 Paul Brook <paul@codesourcery.com>
280 Catherine Moore <clm@codesourcery.com>
282 * config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL.
283 (limited_pcrel_reloc_p): Likewise.
284 (md_apply_fix): Likewise.
285 (tc_gen_reloc): Likewise.
287 2013-05-06 Richard Sandiford <rdsandiford@googlemail.com>
289 * config/tc-mips.c (limited_pcrel_reloc_p): New function.
290 (mips_fix_adjustable): Adjust pc-relative check to use
293 2013-05-02 Richard Sandiford <rdsandiford@googlemail.com>
295 * config/tc-mips.c (mips_pseudo_table): Add stabd and stabs entries.
296 (s_mips_stab): Do not restrict to stabn only.
298 2013-05-02 Nick Clifton <nickc@redhat.com>
300 * config/tc-msp430.c: Add support for the MSP430X architecture.
301 Add code to insert a NOP instruction after any instruction that
302 might change the interrupt state.
303 Add support for the LARGE memory model.
304 Add code to initialise the .MSP430.attributes section.
305 * config/tc-msp430.h: Add support for the MSP430X architecture.
306 * doc/c-msp430.texi: Document the new -mL and -mN command line
308 * NEWS: Mention support for the MSP430X architecture.
310 2013-05-01 Maciej W. Rozycki <macro@codesourcery.com>
312 * configure.tgt: Replace alpha*-*-linuxecoff* pattern with
313 alpha*-*-linux*ecoff*.
315 2013-04-30 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
317 * config/tc-mips.c (mips_ip): Add sizelo.
318 For "+C", "+G", and "+H", set sizelo and compare against it.
320 2013-04-29 Nick Clifton <nickc@redhat.com>
322 * as.c (Options): Add -gdwarf-sections.
323 (parse_args): Likewise.
324 * as.h (flag_dwarf_sections): Declare.
325 * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes.
326 (process_entries): When -gdwarf-sections is enabled generate
327 fragmentary .debug_line sections.
328 (out_debug_line): Set the section for the .debug_line section end
330 * doc/as.texinfo: Document -gdwarf-sections.
331 * NEWS: Mention -gdwarf-sections.
333 2013-04-26 Christian Groessler <chris@groessler.org>
335 * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdline
336 according to the target parameter. Don't call s_segm since s_segm
337 calls bfd_set_arch_mach using stdoutput, but stdoutput isn't
339 (md_begin): Call s_segm according to target parameter from command
342 2013-04-25 Alan Modra <amodra@gmail.com>
344 * configure.in: Allow little-endian linux.
345 * configure: Regenerate.
347 2013-04-24 Sandra Loosemore <sandra@codesourcery.com>
349 * config/tc-nios2.c (nios2_control_register_arg_p): Rename
350 "fstatus" control register to "eccinj".
352 2013-04-19 Kai Tietz <ktietz@redhat.com>
354 * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin.
356 2013-04-15 Julian Brown <julian@codesourcery.com>
358 * expr.c (add_to_result, subtract_from_result): Make global.
359 * expr.h (add_to_result, subtract_from_result): Add prototypes.
360 * config/tc-sh.c (sh_optimize_expr): Use add_to_result,
361 subtract_from_result to handle extra bit of precision for .sleb128
364 2013-04-10 Julian Brown <julian@codesourcery.com>
366 * read.c (convert_to_bignum): Add sign parameter. Use it
367 instead of X_unsigned to determine sign of resulting bignum.
368 (emit_expr): Pass extra argument to convert_to_bignum.
369 (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass
370 X_extrabit to convert_to_bignum.
371 (parse_bitfield_cons): Set X_extrabit.
372 * expr.c (make_expr_symbol, expr_build_uconstant, operand):
373 Initialise X_extrabit field as appropriate.
374 (add_to_result): New.
375 (subtract_from_result): New.
377 * expr.h (expressionS): Add X_extrabit field.
379 2013-04-10 Jan Beulich <jbeulich@suse.com>
381 * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base
382 register being PC when is_t or writeback, and use distinct
383 diagnostic for the latter case.
385 2013-04-10 Jan Beulich <jbeulich@suse.com>
387 * gas/config/tc-arm.c (parse_operands): Re-write
389 (do_barrier): Remove bogus constraint().
390 (do_t_barrier): Remove.
392 2013-04-09 Joerg Wunsch <joerg.wunsch@atmel.com>
394 * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2,
395 ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2,
397 * gas/doc/c-avr.texi (-mmcu documentation): Likewise.
399 2013-04-09 Jan Beulich <jbeulich@suse.com>
401 * gas/config/tc-arm.c (do_vmrs): Accept all control registers.
402 Use local variable Rt in more places.
403 (do_vmsr): Accept all control registers.
405 2013-04-09 Jan Beulich <jbeulich@suse.com>
407 * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix
408 if there was none specified for moves between scalar and core
411 2013-04-09 Jan Beulich <jbeulich@suse.com>
413 * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the
416 2013-04-08 Jan Beulich <jbeulich@suse.com>
418 * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for
421 2013-04-08 Jan Beulich <jbeulich@suse.com>
423 * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq
426 2013-04-03 Alan Modra <amodra@gmail.com>
428 * doc/as.texinfo: Add support to generate man options for h8300.
429 * doc/c-h8300.texi: Likewise.
431 2013-03-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
433 * config/tc-arm.c (arm_cpus): Add support for Cortex-A53 and
436 2013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com>
439 * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array.
441 2013-03-26 Nick Clifton <nickc@redhat.com>
444 * listing.c (rebuffer_line): Rewrite to avoid seeking back to the
445 start of the file each time.
448 * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for
451 2013-03-26 Douglas B Rupp <rupp@gnat.com>
453 * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment
456 2013-03-21 Will Newton <will.newton@linaro.org>
458 * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all
459 pc-relative str instructions in Thumb mode.
461 2013-03-21 Michael Schewe <michael.schewe@gmx.net>
463 * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
464 @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
466 * config/tc-h8300.h: Remove duplicated defines.
468 2013-03-21 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
471 * tc-avr.c (mcu_has_3_byte_pc): New function.
472 (tc_cfi_frame_initial_instructions): Call it to find return
475 2013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com>
478 * config/tc-tic6x.c (tic6x_try_encode): Handle
479 tic6x_coding_dreg_(msb|lsb) field coding types and use it to
480 encode register pair numbers when required.
482 2013-03-15 Will Newton <will.newton@linaro.org>
484 * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register
485 in vstr in Thumb mode for pre-ARMv7 cores.
487 2013-03-14 Andreas Schwab <schwab@suse.de>
489 * doc/c-arc.texi (ARC Directives): Revert last change and use
490 @itemize instead of @table.
491 * doc/c-arm.texi (ARM-Instruction-Set): Likewise.
493 2013-03-14 Nick Clifton <nickc@redhat.com>
496 * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a
497 NULL message, instead just check ARM_CPU_IS_ANY directly.
499 2013-03-14 Nick Clifton <nickc@redhat.com>
502 * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet
504 * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text
505 to the @item directives.
506 (ARM-Neon-Alignment): Move to correct place in the document.
507 * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
509 * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
512 2013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
514 * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o'
515 case. Add default BAD_CASE to switch.
517 2013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
519 * config/tc-nios2.c (nios2_assemble_args_ds): New function.
520 (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
522 2013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
524 * config/tc-arm.c (crc_ext_armv8): New feature set.
525 (UNPRED_REG): New macro.
526 (do_crc32_1): New function.
527 (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
528 do_crc32ch, do_crc32cw): Likewise.
530 (insns): Add entries for crc32 mnemonics.
531 (arm_extensions): Add entry for crc.
533 2013-03-08 Chung-Lin Tang <cltang@codesourcery.com>
535 * write.h (struct fix): Add fx_dot_frag field.
537 * write.c (dot_frag): New variable.
538 (fix_new_internal): Set fx_dot_frag field with dot_frag.
539 (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
540 * expr.c (expr): Save value of frag_now in dot_frag when setting
542 * read.c (emit_expr): Likewise. Delete comments.
544 2013-03-07 H.J. Lu <hongjiu.lu@intel.com>
546 * config/tc-i386.c (flag_code_names): Removed.
547 (i386_index_check): Rewrote.
549 2013-03-05 Yufeng Zhang <yufeng.zhang@arm.com>
551 * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
553 (aarch64_double_precision_fmovable): New function.
554 (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
555 function; handle hexadecimal representation of IEEE754 encoding.
556 (parse_operands): Update the call to parse_aarch64_imm_float.
558 2013-02-28 H.J. Lu <hongjiu.lu@intel.com>
560 * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
561 (check_hle): Updated.
562 (md_assemble): Likewise.
563 (parse_insn): Likewise.
565 2013-02-28 H.J. Lu <hongjiu.lu@intel.com>
567 * config/tc-i386.c (_i386_insn): Add rep_prefix.
568 (md_assemble): Check if REP prefix is OK.
569 (parse_insn): Remove expecting_string_instruction. Set
572 2013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
574 * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
576 2013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
578 * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
579 for system registers.
581 2013-02-27 DJ Delorie <dj@redhat.com>
583 * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
584 (rl78_op): Handle %code().
585 (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
586 (tc_gen_reloc): Likwise; convert to a computed reloc.
587 (md_apply_fix): Likewise.
589 2013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
591 * config/rl78-parse.y: Fix encoding of DIVWU insn.
593 2013-02-25 Terry Guo <terry.guo@arm.com>
595 * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
596 * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
597 list of accepted CPUs.
599 2013-02-19 H.J. Lu <hongjiu.lu@intel.com>
602 * config/tc-i386.c (cpu_arch): Add ".smap".
604 * doc/c-i386.texi: Document smap.
606 2013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
608 * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
609 mips_assembling_insn appropriately.
610 (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
612 2013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
614 * config/tc-mips.c (append_insn): Correct indentation, remove
617 2013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
619 * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
621 2013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
623 * configure.tgt: Add nios2-*-rtems*.
625 2013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
627 * config/tc-aarch64.c (md_begin): Change to check if 'name' is
630 2013-02-09 Jürgen Urban <JuergenUrban@gmx.de>
632 * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
633 (macro): Use it. Assert that trunc.w.s is not used for r5900.
635 2013-02-08 Yi-Hsiu, Hsu <ahsu@marvell.com>
637 * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4
640 2013-02-06 Sandra Loosemore <sandra@codesourcery.com>
641 Andrew Jenner <andrew@codesourcery.com>
643 Based on patches from Altera Corporation.
645 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
646 (TARGET_CPU_HFILES): Add config/tc-nios2.h.
647 * Makefile.in: Regenerated.
648 * configure.tgt: Add case for nios2*-linux*.
649 * config/obj-elf.c: Conditionally include elf/nios2.h.
650 * config/tc-nios2.c: New file.
651 * config/tc-nios2.h: New file.
652 * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
653 * doc/Makefile.in: Regenerated.
654 * doc/all.texi: Set NIOSII.
655 * doc/as.texinfo (Overview): Add Nios II options.
656 (Machine Dependencies): Include c-nios2.texi.
657 * doc/c-nios2.texi: New file.
658 * NEWS: Note Altera Nios II support.
660 2013-02-06 Alan Modra <amodra@gmail.com>
663 * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
664 Don't skip fixups with fx_subsy non-NULL.
665 * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
666 with fx_subsy non-NULL.
668 2013-02-04 H.J. Lu <hongjiu.lu@intel.com>
670 * doc/c-metag.texi: Add "@c man" markers.
672 2013-02-04 Alan Modra <amodra@gmail.com>
674 * write.c (fixup_segment): Return void. Delete seg_reloc_count
676 (TC_ADJUST_RELOC_COUNT): Delete.
677 * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
679 2013-02-04 Alan Modra <amodra@gmail.com>
681 * po/POTFILES.in: Regenerate.
683 2013-01-30 Markos Chandras <markos.chandras@imgtec.com>
685 * config/tc-metag.c: Make SWAP instruction less permissive with
688 2013-01-29 DJ Delorie <dj@redhat.com>
690 * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
691 relocs in .word/.etc statements.
693 2013-01-29 Roland McGrath <mcgrathr@google.com>
695 * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
696 immediate value for 8-bit offset" error so it shows line info.
698 2013-01-24 Joseph Myers <joseph@codesourcery.com>
700 * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
703 2013-01-24 Nick Clifton <nickc@redhat.com>
705 * config/tc-v850.c: Add support for e3v5 architecture.
706 * doc/c-v850.texi: Mention new support.
708 2013-01-23 Nick Clifton <nickc@redhat.com>
711 * config/tc-avr.c: Include dwarf2dbg.h.
713 2013-01-18 H.J. Lu <hongjiu.lu@intel.com>
715 * config/tc-i386.c (reloc): Support size relocation only for ELF.
716 (tc_i386_fix_adjustable): Likewise.
718 (tc_gen_reloc): Likewise.
720 2013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
722 * config/tc-aarch64.c (output_operand_error_record): Change to output
723 the out-of-range error message as value-expected message if there is
724 only one single value in the expected range.
725 (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
726 LSL #0 as a programmer-friendly feature.
728 2013-01-16 H.J. Lu <hongjiu.lu@intel.com>
730 * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
731 (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
732 BFD_RELOC_64_SIZE relocations.
733 (lex_got): Support "symbol@SIZE" and don't create GOT symbol
735 (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
736 relocations against local symbols.
738 2013-01-16 Alan Modra <amodra@gmail.com>
740 * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
741 finding some sort of toc syntax error, and break to avoid
742 compiler uninit warning.
744 2013-01-15 H.J. Lu <hongjiu.lu@intel.com>
747 * config/tc-i386.c (lex_got): Increment length by 1 if the
748 relocation token is removed.
750 2013-01-15 Nick Clifton <nickc@redhat.com>
752 * config/tc-v850.c (md_assemble): Allow signed values for
755 2013-01-11 Sean Keys <skeys@ipdatasys.com>
757 * config/tc-xgate.c (md_begin): Fix mistake made when going from
760 2013-01-10 Peter Bergner <bergner@vnet.ibm.com>
762 * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
763 * doc/c-ppc.texi (PowerPC-Opts): Likewise.
764 * config/tc-ppc.c (md_show_usage): Likewise.
765 (ppc_handle_align): Handle power8's group ending nop.
767 2013-01-10 Sean Keys <skeys@ipdatasys.com>
769 * config/tc-xgate.c (md_begin): Fix the printing of opcodes so
770 that the assember exits after the opcodes have been printed.
772 2013-01-10 H.J. Lu <hongjiu.lu@intel.com>
774 * app.c: Remove trailing white spaces.
778 * dw2gencfi.c: Likewise.
779 * dwarf2dbg.h: Likewise.
781 * input-file.c: Likewise.
782 * itbl-lex.h: Likewise.
783 * output-file.c: Likewise.
786 * subsegs.c: Likewise.
787 * symbols.c: Likewise.
789 * config/tc-i386.c: Likewise.
790 * doc/Makefile.am: Likewise.
791 * doc/Makefile.in: Likewise.
792 * doc/c-aarch64.texi: Likewise.
793 * doc/c-alpha.texi: Likewise.
794 * doc/c-arc.texi: Likewise.
795 * doc/c-arm.texi: Likewise.
796 * doc/c-avr.texi: Likewise.
797 * doc/c-bfin.texi: Likewise.
798 * doc/c-cr16.texi: Likewise.
799 * doc/c-d10v.texi: Likewise.
800 * doc/c-d30v.texi: Likewise.
801 * doc/c-h8300.texi: Likewise.
802 * doc/c-hppa.texi: Likewise.
803 * doc/c-i370.texi: Likewise.
804 * doc/c-i386.texi: Likewise.
805 * doc/c-i860.texi: Likewise.
806 * doc/c-m32c.texi: Likewise.
807 * doc/c-m32r.texi: Likewise.
808 * doc/c-m68hc11.texi: Likewise.
809 * doc/c-m68k.texi: Likewise.
810 * doc/c-microblaze.texi: Likewise.
811 * doc/c-mips.texi: Likewise.
812 * doc/c-msp430.texi: Likewise.
813 * doc/c-mt.texi: Likewise.
814 * doc/c-s390.texi: Likewise.
815 * doc/c-score.texi: Likewise.
816 * doc/c-sh.texi: Likewise.
817 * doc/c-sh64.texi: Likewise.
818 * doc/c-tic54x.texi: Likewise.
819 * doc/c-tic6x.texi: Likewise.
820 * doc/c-v850.texi: Likewise.
821 * doc/c-xc16x.texi: Likewise.
822 * doc/c-xgate.texi: Likewise.
823 * doc/c-xtensa.texi: Likewise.
824 * doc/c-z80.texi: Likewise.
825 * doc/internals.texi: Likewise.
827 2013-01-10 Roland McGrath <mcgrathr@google.com>
829 * hash.c (hash_new_sized): Make it global.
830 * hash.h: Declare it.
831 * macro.c (define_macro): Use hash_new_sized instead of hash_new,
834 2013-01-10 Will Newton <will.newton@imgtec.com>
836 * Makefile.am: Add Meta.
837 * Makefile.in: Regenerate.
838 * config/tc-metag.c: New file.
839 * config/tc-metag.h: New file.
840 * configure.tgt: Add Meta.
841 * doc/Makefile.am: Add Meta.
842 * doc/Makefile.in: Regenerate.
843 * doc/all.texi: Add Meta.
844 * doc/as.texiinfo: Document Meta options.
845 * doc/c-metag.texi: New file.
847 2013-01-09 Steve Ellcey <sellcey@mips.com>
849 * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
851 * config/tc-mips.c (internalError): Remove, replace with abort.
853 2013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
855 * config/tc-aarch64.c (parse_operands): Change to compare the result
856 of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
858 2013-01-07 Nick Clifton <nickc@redhat.com>
861 * config/tc-arm.c (skip_past_char): Skip whitespace before the
862 anticipated character.
863 * config/tc-arm.c (parse_address_main): Delete skip of whitespace
864 here as it is no longer needed.
866 2013-01-06 Andreas Schwab <schwab@linux-m68k.org>
868 * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
869 * doc/c-score.texi (SCORE-Opts): Likewise.
870 * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
872 2013-01-04 Juergen Urban <JuergenUrban@gmx.de>
874 * config/tc-mips.c: Add support for MIPS r5900.
875 Add M_LQ_AB and M_SQ_AB to support large values for instructions
877 (can_swap_branch_p, get_append_method): Detect some conditional
878 short loops to fix a bug on the r5900 by NOP in the branch delay
880 (M_MUL): Support 3 operands in multu on r5900.
881 (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
882 (s_mipsset): Force 32 bit floating point on r5900.
883 (mips_ip): Check parameter range of instructions mfps and mtps on
885 * configure.in: Detect CPU type when target string contains r5900
886 (e.g. mips64r5900el-linux-gnu).
888 2013-01-02 H.J. Lu <hongjiu.lu@intel.com>
890 * as.c (parse_args): Update copyright year to 2013.
892 2013-01-02 Yufeng Zhang <yufeng.zhang@arm.com>
894 * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
897 2013-01-02 Nick Clifton <nickc@redhat.com>
900 * config/tc-arm.c (parse_address_main): Skip whitespace before a
903 For older changes see ChangeLog-2012
905 Copyright (C) 2013 Free Software Foundation, Inc.
907 Copying and distribution of this file, with or without modification,
908 are permitted in any medium without royalty provided the copyright
909 notice and this notice are preserved.
915 version-control: never