1 2006-07-16 Thiemo Seufer <ths@mips.com>
2 David Ung <davidu@mips.com>
4 * read.c (s_struct): Handle ELF section changing.
5 * config/tc-mips.c (s_align): Leave enabling auto-align to the
7 (s_change_sec): Try section changing only if we output ELF.
9 2006-07-15 H.J. Lu <hongjiu.lu@intel.com>
11 * config/tc-i386.c (cpu_arch): Remove Cpu086, CpuAthlon and
13 (smallest_imm_type): Remove Cpu086.
14 (i386_target_format): Likewise.
16 * config/tc-i386.h: Remove Cpu086, CpuAthlon and CpuAmdFam10.
19 2006-07-13 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
20 Michael Meissner <michael.meissner@amd.com>
22 * config/tc-i386.h (PROCESSOR_AMDFAM10): New processor_type.
23 (CpuSSE4a, CpuABM, CpuAmdFam10): New Cpu directives.
24 * config/tc-i386.c (cpu_arch): Add support for AmdFam10
26 (i386_align_code): Ditto.
27 (md_assemble_code): Add support for insertq/extrq instructions,
28 swapping as needed for intel syntax.
29 (swap_imm_operands): New function to swap immediate operands.
30 (swap_operands): Deal with 4 operand instructions.
31 (build_modrm_byte): Add support for insertq instruction.
33 2006-07-13 H.J. Lu <hongjiu.lu@intel.com>
35 * config/tc-i386.h (Size64): Fix a typo in comment.
37 2006-07-12 Nick Clifton <nickc@redhat.com>
39 * config/tc-sh.c (md_apply_fix): Do not allow the generic code in
40 fixup_segment() to repeat a range check on a value that has
41 already been checked here.
43 2006-07-07 James E Wilson <wilson@specifix.com>
45 * config/tc-mips.c (mips_cpu_info_table): Add sb1a.
47 2006-07-06 Mohammed Adnène Trojette <adn@diwi.org>
48 Nick Clifton <nickc@redhat.com>
51 * doc/as.texi: Fix spelling typo: branchs => branches.
52 * doc/c-m68hc11.texi: Likewise.
53 * config/tc-m68hc11.c: Likewise.
54 Support old spelling of command line switch for backwards
57 2006-07-04 Thiemo Seufer <ths@mips.com>
58 David Ung <davidu@mips.com>
60 * config/tc-mips.c (s_is_linkonce): New function.
61 (mips16_mark_labels): Don't adjust mips16 symbol addresses for
62 weak, external, and linkonce symbols.
63 (pic_need_relax): Use s_is_linkonce.
65 2006-06-24 H.J. Lu <hongjiu.lu@intel.com>
67 * doc/as.texinfo (Org): Remove space.
68 (P2align): Add "@var{abs-expr},".
70 2006-06-23 H.J. Lu <hongjiu.lu@intel.com>
72 * config/tc-i386.c (cpu_arch_tune_set): New.
73 (cpu_arch_isa): Likewise.
74 (i386_align_code): Use xchg %ax,%ax for 2 byte nop. Optimize
75 nops with short or long nop sequences based on -march=/.arch
77 (set_cpu_arch): Set cpu_arch_isa. If cpu_arch_tune_set is 0,
78 set cpu_arch_tune and cpu_arch_tune_flags.
79 (md_parse_option): For -march=, set cpu_arch_isa and set
80 cpu_arch_tune and cpu_arch_tune_flags if cpu_arch_tune_set is
81 0. Set cpu_arch_tune_set to 1 for -mtune=.
82 (i386_target_format): Don't set cpu_arch_tune.
84 2006-06-23 Nigel Stephens <nigel@mips.com>
86 * config/tc-mips.c (nopic_need_relax): Handle -fdata-sections
87 generated .sbss.* and .gnu.linkonce.sb.*.
89 2006-06-23 Thiemo Seufer <ths@mips.com>
90 David Ung <davidu@mips.com>
92 * config/tc-mips.h (TC_SEGMENT_INFO_TYPE): Declare per-segment
94 * config/tc-mips.c (label_list): Define per-segment label_list.
95 (mips_clear_insn_labels, mips_move_labels, mips16_mark_labels,
96 append_insn, s_align, s_cons, s_float_cons, s_gpword, s_gpdword,
97 mips_from_file_after_relocs, mips_define_label): Use per-segment
100 2006-06-22 Thiemo Seufer <ths@mips.com>
102 * config/tc-mips.c (ISA_SUPPORTS_MIPS16E): New macro.
103 (append_insn): Use it.
104 (md_apply_fix): Whitespace formatting.
105 (md_begin, append_insn, macro, macro2, mips16_immed, mips_align,
106 mips16_extended_frag): Remove register specifier.
107 (md_convert_frag): Likewise. Use TRUE ans FALSE instead of numeric
110 2006-06-21 Mark Shinwell <shinwell@codesourcery.com>
112 * config/tc-arm.c (s_arm_unwind_save_vfp_armv6): New. Parse
113 a directive saving VFP registers for ARMv6 or later.
114 (s_arm_unwind_save): Add parameter arch_v6 and call
115 s_arm_unwind_save_vfp or s_arm_unwind_save_vfp_armv6 as
117 (md_pseudo_table): Add entry for new "vsave" directive.
118 * doc/c-arm.texi: Correct error in example for "save"
119 directive (fstmdf -> fstmdx). Also document "vsave" directive.
121 2006-06-18 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
122 Anatoly Sokolov <aesok@post.ru>
124 * config/tc-avr.c (mcu_types): Add support for atmega165p, atmega169p
125 and atmega644p devices. Rename atmega164/atmega324 devices to
126 atmega164p/atmega324p.
127 * doc/c-avr.texi: Document new mcu and arch options.
129 2006-06-17 Nick Clifton <nickc@redhat.com>
131 * config/tc-arm.c (enum parse_operand_result): Move outside of
132 #ifdef OBJ_ELF so that non-ELF targeted ARM ports can build.
134 2006-06-16 H.J. Lu <hongjiu.lu@intel.com>
136 * config/tc-i386.h (processor_type): New.
137 (arch_entry): Add type.
139 * config/tc-i386.c (cpu_arch_tune): New.
140 (cpu_arch_tune_flags): Likewise.
141 (cpu_arch_isa_flags): Likewise.
143 (set_cpu_arch): Also update cpu_arch_isa_flags.
144 (md_assemble): Update cpu_arch_isa_flags.
146 (OPTION_MTUNE): Likewise.
147 (md_longopts): Add -march= and -mtune=.
148 (md_parse_option): Support -march= and -mtune=.
149 (md_show_usage): Add -march=CPU/-mtune=CPU.
150 (i386_target_format): Also update cpu_arch_isa_flags,
151 cpu_arch_tune and cpu_arch_tune_flags.
153 * doc/as.texinfo: Add -march=CPU/-mtune=CPU.
155 * doc/c-i386.texi: Document -march=CPU/-mtune=CPU.
157 2006-06-15 Mark Shinwell <shinwell@codesourcery.com>
159 * config/tc-arm.c (enum parse_operand_result): New.
160 (struct group_reloc_table_entry): New.
161 (enum group_reloc_type): New.
162 (group_reloc_table): New array.
163 (find_group_reloc_table_entry): New function.
164 (parse_shifter_operand_group_reloc): New function.
165 (parse_address_main): New function, incorporating code
166 from the old parse_address function. To be used via...
167 (parse_address): wrapper for parse_address_main; and
168 (parse_address_group_reloc): new function, likewise.
169 (enum operand_parse_code): New codes OP_SHG, OP_ADDRGLDR,
170 OP_ADDRGLDRS, OP_ADDRGLDC.
171 (parse_operands): Support for these new operand codes.
172 New macro po_misc_or_fail_no_backtrack.
173 (encode_arm_cp_address): Preserve group relocations.
174 (insns): Modify to use the above operand codes where group
175 relocations are permitted.
176 (md_apply_fix): Handle the group relocations
177 ALU_PC_G0_NC through LDC_SB_G2.
178 (tc_gen_reloc): Likewise.
179 (arm_force_relocation): Leave group relocations for the linker.
180 (arm_fix_adjustable): Likewise.
182 2006-06-15 Julian Brown <julian@codesourcery.com>
184 * config/tc-arm.c (do_vfp_nsyn_ldr_str): Remove, fold into...
185 (do_neon_ldr_str): Always defer to VFP encoding routines, which handle
188 2006-06-12 H.J. Lu <hongjiu.lu@intel.com>
190 * config/tc-i386.c (process_suffix): Don't add rex64 for
193 2006-06-09 Thiemo Seufer <ths@mips.com>
195 * config/tc-mips.c (mips_ip): Maintain argument count.
197 2006-06-09 Alan Modra <amodra@bigpond.net.au>
199 * config/tc-iq2000.c: Include sb.h.
201 2006-06-08 Nigel Stephens <nigel@mips.com>
203 * config/tc-mips.c (mips_pseudo_table): Add "origin" and "repeat"
204 aliases for better compatibility with SGI tools.
206 2006-06-08 Alan Modra <amodra@bigpond.net.au>
208 * configure.in (BFDLIB, BFDVER_H, ALL_OBJ_DEPS): Delete.
209 * Makefile.am (GASLIBS): Expand @BFDLIB@.
211 (OBJS): Expand @ALL_OBJ_DEPS@. Depend on all fopen-*.h variants.
212 (obj-aout.o): Depend on $(DEP_@target_get_type@_aout)
213 (obj-coff.o, obj-ecoff.o, obj-elf.o): Similarly.
215 * dep-in.sed: Don't substitute bfdver.h. Do remove symcat.h.
216 * Makefile.in: Regenerate.
217 * doc/Makefile.in: Regenerate.
218 * configure: Regenerate.
220 2006-06-07 Joseph S. Myers <joseph@codesourcery.com>
222 * po/Make-in (pdf, ps): New dummy targets.
224 2006-06-07 Julian Brown <julian@codesourcery.com>
226 * config/tc-arm.c (stdarg.h): include.
227 (arm_it): Add uncond_value field. Add isvec and issingle to operand
229 (arm_reg_type): Add REG_TYPE_VFSD (single or double VFP reg) and
230 REG_TYPE_NSDQ (single, double or quad vector reg).
231 (reg_expected_msgs): Update.
232 (BAD_FPU): Add macro for unsupported FPU instruction error.
233 (parse_neon_type): Support 'd' as an alias for .f64.
234 (parse_typed_reg_or_scalar): Support REG_TYPE_VFSD, REG_TYPE_NSDQ
236 (parse_vfp_reg_list): Don't update first arg on error.
237 (parse_neon_mov): Support extra syntax for VFP moves.
238 (operand_parse_code): Add OP_RVSD, OP_RNSDQ, OP_VRSDLST, OP_RVSD_IO,
239 OP_RNSDQ_RNSC, OP_RVC_PSR, OP_APSR_RR, OP_oRNSDQ.
240 (parse_operands): Support isvec, issingle operands fields, new parse
242 (do_vfp_nsyn_mrs, do_vfp_nsyn_msr): New functions. Support VFP mrs,
244 (do_mrs, do_msr, do_t_mrs, do_t_msr): Add support for above.
245 (NEON_ENC_TAB): Add vnmul, vnmla, vnmls, vcmp, vcmpz, vcmpe, vcmpez.
246 (NEON_ENC_SINGLE, NEON_ENC_DOUBLE): Define macros.
247 (NEON_SHAPE_DEF): New macro. Define table of possible instruction
249 (neon_shape): Redefine in terms of above.
250 (neon_shape_class): New enumeration, table of shape classes.
251 (neon_shape_el): New enumeration. One element of a shape.
252 (neon_shape_el_size): Register widths of above, where appropriate.
253 (neon_shape_info): New struct. Info for shape table.
254 (neon_shape_tab): New array.
255 (neon_type_mask): Add N_F64, N_VFP. Update N_MAX_NONSPECIAL.
256 (neon_check_shape): Rewrite as...
257 (neon_select_shape): New function to classify instruction shapes,
258 driven by new table neon_shape_tab array.
259 (neon_quad): New function. Return 1 if shape should set Q flag in
260 instructions (or equivalent), 0 otherwise.
261 (type_chk_of_el_type): Support F64.
262 (el_type_of_type_chk): Likewise.
263 (neon_check_type): Add support for VFP type checking (VFP data
264 elements fill their containing registers).
265 (do_vfp_cond_or_thumb): Fill in condition field in ARM mode, or 0xE
266 in thumb mode for VFP instructions.
267 (do_vfp_nsyn_opcode): New function. Look up the opcode in argument,
268 and encode the current instruction as if it were that opcode.
269 (try_vfp_nsyn): New. If this looks like a VFP instruction with ARGS
270 arguments, call function in PFN.
271 (do_vfp_nsyn_add_sub, do_vfp_nsyn_mla_mls, do_vfp_nsyn_mul)
272 (do_vfp_nsyn_abs_neg, do_vfp_nsyn_ldm_stm, do_vfp_nsyn_ldr_str)
273 (do_vfp_nsyn_sqrt, do_vfp_nsyn_div, do_vfp_nsyn_nmul)
274 (do_vfp_nsyn_cmp, nsyn_insert_sp, do_vfp_nsyn_push)
275 (do_vfp_nsyn_pop, do_vfp_nsyn_cvt, do_vfp_nsyn_cvtz): New functions.
276 Redirect Neon-syntax VFP instructions to VFP instruction handlers.
277 (do_neon_dyadic_i_su, do_neon_dyadic_i64_su, do_neon_shl_imm)
278 (do_neon_qshl_imm, do_neon_logic, do_neon_bitfield)
279 (neon_dyadic_misc, neon_compare, do_neon_tst, do_neon_qdmulh)
280 (do_neon_fcmp_absolute, do_neon_step, do_neon_sli, do_neon_sri)
281 (do_neon_qshlu_imm, neon_move_immediate, do_neon_mvn, do_neon_ext)
282 (do_neon_rev, do_neon_dup, do_neon_rshift_round_imm, do_neon_trn)
283 (do_neon_zip_uzp, do_neon_sat_abs_neg, do_neon_pair_long)
284 (do_neon_recip_est, do_neon_cls, do_neon_clz, do_neon_cnt)
285 (do_neon_swp): Use neon_select_shape not neon_check_shape. Use
287 (vfp_or_neon_is_neon): New function. Call if a mnemonic shared
288 between VFP and Neon turns out to belong to Neon. Perform
289 architecture check and fill in condition field if appropriate.
290 (do_neon_addsub_if_i, do_neon_mac_maybe_scalar, do_neon_abs_neg)
291 (do_neon_cvt): Add support for VFP variants of instructions.
292 (neon_cvt_flavour): Extend to cover VFP conversions.
293 (do_neon_mov): Rewrite to use neon_select_shape. Add support for VFP
295 (do_neon_ldr_str): Handle single-precision VFP load/store.
296 (do_neon_ld_st_interleave, do_neon_ld_st_lane, do_neon_ld_dup): Use
297 NS_NULL not NS_IGNORE.
298 (opcode_tag): Add OT_csuffixF for operands which either take a
299 conditional suffix, or have 0xF in the condition field.
300 (md_assemble): Add support for OT_csuffixF.
301 (NCE): Replace macro with...
302 (NCE_tag, NCE, NCEF): New macros.
303 (nCE): Replace macro with...
304 (nCE_tag, nCE, nCEF): New macros.
305 (insns): Add support for VFP insns or VFP versions of insns msr,
306 mrs, vsqrt, vdiv, vnmul, vnmla, vnmls, vcmp, vcmpe, vpush, vpop,
307 vcvtz, vmul, vmla, vmls, vadd, vsub, vabs, vneg, vldm, vldmia,
308 vldbdb, vstm, vstmia, vstmdb, vldr, vstr, vcvt, vmov. Group shared
309 VFP/Neon insns together.
311 2006-06-07 Alan Modra <amodra@bigpond.net.au>
312 Ladislav Michl <ladis@linux-mips.org>
314 * app.c: Don't include headers already included by as.h.
316 * atof-generic.c: Likewise.
318 * dwarf2dbg.c: Likewise.
320 * input-file.c: Likewise.
321 * input-scrub.c: Likewise.
323 * output-file.c: Likewise.
326 * config/bfin-lex.l: Likewise.
327 * config/obj-coff.h: Likewise.
328 * config/obj-elf.h: Likewise.
329 * config/obj-som.h: Likewise.
330 * config/tc-arc.c: Likewise.
331 * config/tc-arm.c: Likewise.
332 * config/tc-avr.c: Likewise.
333 * config/tc-bfin.c: Likewise.
334 * config/tc-cris.c: Likewise.
335 * config/tc-d10v.c: Likewise.
336 * config/tc-d30v.c: Likewise.
337 * config/tc-dlx.h: Likewise.
338 * config/tc-fr30.c: Likewise.
339 * config/tc-frv.c: Likewise.
340 * config/tc-h8300.c: Likewise.
341 * config/tc-hppa.c: Likewise.
342 * config/tc-i370.c: Likewise.
343 * config/tc-i860.c: Likewise.
344 * config/tc-i960.c: Likewise.
345 * config/tc-ip2k.c: Likewise.
346 * config/tc-iq2000.c: Likewise.
347 * config/tc-m32c.c: Likewise.
348 * config/tc-m32r.c: Likewise.
349 * config/tc-maxq.c: Likewise.
350 * config/tc-mcore.c: Likewise.
351 * config/tc-mips.c: Likewise.
352 * config/tc-mmix.c: Likewise.
353 * config/tc-mn10200.c: Likewise.
354 * config/tc-mn10300.c: Likewise.
355 * config/tc-msp430.c: Likewise.
356 * config/tc-mt.c: Likewise.
357 * config/tc-ns32k.c: Likewise.
358 * config/tc-openrisc.c: Likewise.
359 * config/tc-ppc.c: Likewise.
360 * config/tc-s390.c: Likewise.
361 * config/tc-sh.c: Likewise.
362 * config/tc-sh64.c: Likewise.
363 * config/tc-sparc.c: Likewise.
364 * config/tc-tic30.c: Likewise.
365 * config/tc-tic4x.c: Likewise.
366 * config/tc-tic54x.c: Likewise.
367 * config/tc-v850.c: Likewise.
368 * config/tc-vax.c: Likewise.
369 * config/tc-xc16x.c: Likewise.
370 * config/tc-xstormy16.c: Likewise.
371 * config/tc-xtensa.c: Likewise.
372 * config/tc-z80.c: Likewise.
373 * config/tc-z8k.c: Likewise.
374 * macro.h: Don't include sb.h or ansidecl.h.
375 * sb.h: Don't include stdio.h or ansidecl.h.
376 * cond.c: Include sb.h.
377 * itbl-lex.l: Include as.h instead of other system headers.
378 * itbl-parse.y: Likewise.
379 * itbl-ops.c: Similarly.
380 * itbl-ops.h: Don't include as.h or ansidecl.h.
381 * config/bfin-defs.h: Don't include bfd.h or as.h.
382 * config/bfin-parse.y: Include as.h instead of other system headers.
384 2006-06-06 Ben Elliston <bje@au.ibm.com>
385 Anton Blanchard <anton@samba.org>
387 * config/tc-ppc.c (parse_cpu): Handle "-mpower6".
388 (md_show_usage): Document it.
389 (ppc_setup_opcodes): Test power6 opcode flag bits.
390 * doc/c-ppc.texi (PowerPC-Opts): Document "-mpower6".
392 2006-06-06 Thiemo Seufer <ths@mips.com>
393 Chao-ying Fu <fu@mips.com>
395 * config/tc-mips.c (ISA_SUPPORTS_DSP64): New macro.
396 (CPU_HAS_MIPS3D, CPU_HAS_MDMX, CPU_HAS_DSP, CPU_HAS_MT): Delete.
397 (macro_build): Update comment.
398 (mips_ip): Allow DSP64 instructions for MIPS64R2.
399 (mips_after_parse_args): Remove uses of CPU_HAS_MIPS3D and
401 (mips_cpu_info): Fix formatting. Add MIPS_CPU_ASE_MIPS3D and
402 MIPS_CPU_ASE_MDMX flags for sb1.
404 2006-06-05 Thiemo Seufer <ths@mips.com>
406 * config/tc-mips.c (macro_build): Use INSERT_OPERAND wherew
408 (mips16_macro_build): Use MIPS16_INSERT_OPERAND where appropriate.
409 (mips_ip): Make overflowed/underflowed constant arguments in DSP
410 and MT instructions a fatal error. Use INSERT_OPERAND where
411 appropriate. Improve warnings for break and wait code overflows.
412 Use symbolic constant of OP_MASK_COPZ.
413 (mips16_ip): Use MIPS16_INSERT_OPERAND where appropriate.
415 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
417 * po/Make-in (top_builddir): Define.
419 2006-06-02 Joseph S. Myers <joseph@codesourcery.com>
421 * doc/Makefile.am (TEXI2DVI): Define.
422 * doc/Makefile.in: Regenerate.
423 * doc/c-arc.texi: Fix typo.
425 2006-06-01 Alan Modra <amodra@bigpond.net.au>
427 * config/obj-ieee.c: Delete.
428 * config/obj-ieee.h: Delete.
429 * Makefile.am (OBJ_FORMATS): Remove ieee.
430 (OBJ_FORMAT_CFILES, OBJ_FORMAT_HFILES): Similarly.
431 (obj-ieee.o): Remove rule.
432 * Makefile.in: Regenerate.
433 * configure.in (atof): Remove tahoe.
434 (OBJ_MAYBE_IEEE): Don't define.
435 * configure: Regenerate.
436 * config.in: Regenerate.
437 * doc/Makefile.in: Regenerate.
438 * po/POTFILES.in: Regenerate.
440 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
442 * Makefile.am: Replace INTLLIBS and INTLDEPS with LIBINTL
443 and LIBINTL_DEP everywhere.
445 (INCLUDES, DEP_INCLUDES): Use @INCINTL@.
446 * acinclude.m4: Include new gettext macros.
447 * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
448 Remove local code for po/Makefile.
449 * Makefile.in, configure, doc/Makefile.in: Regenerated.
451 2006-05-30 Nick Clifton <nickc@redhat.com>
453 * po/es.po: Updated Spanish translation.
455 2006-05-06 Denis Chertykov <denisc@overta.ru>
457 * doc/c-avr.texi: New file.
458 * doc/Makefile.am (CPU_DOCS): Add c-avr.texi
459 * doc/all.texi: Set AVR
460 * doc/as.texinfo: Include c-avr.texi
462 2006-05-28 Jie Zhang <jie.zhang@analog.com>
464 * config/bfin-parse.y (check_macfunc): Loose the condition of
465 calling check_multiply_halfregs ().
467 2006-05-25 Jie Zhang <jie.zhang@analog.com>
469 * config/bfin-parse.y (asm_1): Better check and deal with
470 vector and scalar Multiply 16-Bit Operands instructions.
472 2006-05-24 Nick Clifton <nickc@redhat.com>
474 * config/tc-hppa.c: Convert to ISO C90 format.
475 * config/tc-hppa.h: Likewise.
477 2006-05-24 Carlos O'Donell <carlos@systemhalted.org>
478 Randolph Chung <randolph@tausq.org>
480 * config/tc-hppa.c (is_tls_gdidx, is_tls_ldidx, is_tls_dtpoff,
481 is_tls_ieoff, is_tls_leoff): Define.
482 (fix_new_hppa): Handle TLS.
483 (cons_fix_new_hppa): Likewise.
485 (md_apply_fix): Handle TLS relocs.
486 * config/tc-hppa.h (hppa_fix_adjustable): Handle TLS.
488 2006-05-24 Bjoern Haase <bjoern.m.haase@web.de>
490 * config/tc-avr.c: Add new cpu targets avr6, avr2560 and avr2561.
492 2006-05-23 Thiemo Seufer <ths@mips.com>
493 David Ung <davidu@mips.com>
494 Nigel Stephens <nigel@mips.com>
497 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS): Rename.
498 (ISA_SUPPORTS_DSP_ASE, ISA_SUPPORTS_MT_ASE, ISA_HAS_64BIT_FPRS,
499 ISA_HAS_MXHC1): New macros.
500 (HAVE_32BIT_FPRS): Use ISA_HAS_64BIT_FPRS instead of
501 ISA_HAS_64BIT_REGS. Formatting fixes. Improved comments.
502 (mips_cpu_info): Change to use combined ASE/IS_ISA flag.
503 (MIPS_CPU_IS_ISA, MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP,
504 MIPS_CPU_ASE_MT, MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX): New defines.
505 (mips_after_parse_args): Change default handling of float register
506 size to account for 32bit code with 64bit FP. Better sanity checking
507 of ISA/ASE/ABI option combinations.
508 (s_mipsset): Support switching of GPR and FPR sizes via
509 .set {g,f}p={32,64,default}. Better sanity checking for .set ASE
511 (mips_elf_final_processing): We should record the use of 64bit FP
512 registers in 32bit code but we don't, because ELF header flags are
514 (mips_cpu_info_table): Add ASE flags for CPUs with mandatory ASE
515 extensions. Add 4ksc, 4kec, 4kem, 4kep, 4ksd, m4kp, 24kec, 24kef,
516 24kex, 34kc, 34kf, 34kx, 25kf CPU definitions.
517 (mips_cpu_info_from_isa): Use MIPS_CPU_IS_ISA.
518 * doc/c-mips.texi: Document .set {g,f}p={32,64,default}. Document
519 missing -march options. Document .set arch=CPU. Move .set smartmips
520 to ASE page. Use @code for .set FOO examples.
522 2006-05-23 Jie Zhang <jie.zhang@analog.com>
524 * config/tc-bfin.c (bfin_start_line_hook): Bump line counters
527 2006-05-23 Jie Zhang <jie.zhang@analog.com>
529 * config/bfin-defs.h (bfin_equals): Remove declaration.
530 * config/bfin-parse.y (asm_1): Remove "expr ASSIGN expr".
531 * config/tc-bfin.c (bfin_name_is_register): Remove.
532 (bfin_equals): Remove.
533 * config/tc-bfin.h (TC_EQUAL_IN_INSN): Redefine as 1.
534 (bfin_name_is_register): Remove declaration.
536 2006-05-19 Thiemo Seufer <ths@mips.com>
537 Nigel Stephens <nigel@mips.com>
539 * config/tc-mipc.c (ISA_HAS_ODD_SINGLE_FPR): New define.
540 (mips_oddfpreg_ok): New function.
543 2006-05-19 Thiemo Seufer <ths@mips.com>
544 David Ung <davidu@mips.com>
546 * config/tc-mips.h (tc_mips_regname_to_dw2regnum): Declare.
547 * config/tc-mipc.c (ABI_NEEDS_64BIT_REGS, ISA_HAS_64BIT_REGS,
548 ISA_HAS_DROR, ISA_HAS_ROR): Reformat.
549 (regname, RTYPE_MASK, RTYPE_NUM, RTYPE_FPU, RTYPE_FCC, RTYPE_VEC,
550 RTYPE_GP, RTYPE_CP0, RTYPE_PC, RTYPE_ACC, RTYPE_CCC, RNUM_MASK,
551 RWARN, GENERIC_REGISTER_NUMBERS, FPU_REGISTER_NAMES,
552 FPU_CONDITION_CODE_NAMES, COPROC_CONDITION_CODE_NAMES,
553 N32N64_SYMBOLIC_REGISTER_NAMES, O32_SYMBOLIC_REGISTER_NAMES,
554 SYMBOLIC_REGISTER_NAMES, MIPS16_SPECIAL_REGISTER_NAMES,
555 MDMX_VECTOR_REGISTER_NAMES, MIPS_DSP_ACCUMULATOR_NAMES, reg_names,
556 reg_names_o32, reg_names_n32n64): Define register classes.
557 (reg_lookup): New function, use register classes.
558 (md_begin): Reserve register names in the symbol table. Simplify
560 (mips_ip): Fix comment formatting. Handle symbolic COP0 registers.
562 (mips16_ip): Use reg_lookup.
563 (tc_get_register): Likewise.
564 (tc_mips_regname_to_dw2regnum): New function.
566 2006-05-19 Thiemo Seufer <ths@mips.com>
568 * config/tc-arm.c, config/tc-arm.h (tc_arm_regname_to_dw2regnum):
569 Un-constify string argument.
570 * config/tc-i386.c, config/tc-i386.h (tc_x86_regname_to_dw2regnum):
572 * config/tc-m68k.c, config/tc-m68k.h (tc_m68k_regname_to_dw2regnum):
574 * config/tc-ppc.c, config/tc-ppc.h (tc_ppc_regname_to_dw2regnum):
576 * config/tc-s390.c, config/tc-s390.h (tc_s390_regname_to_dw2regnum):
578 * config/tc-sh.c, config/tc-sh.h (sh_regname_to_dw2regnum):
580 * config/tc-sparc.c, config/tc-sparc.h (sparc_regname_to_dw2regnum):
583 2006-05-19 Nathan Sidwell <nathan@codesourcery.com>
585 * gas/config/tc-m68k.c (m68k_init_arch): Move checking of
586 cfloat/m68881 to correct architecture before using it.
588 2006-05-16 Bjoern Haase <bjoern.m.haase@web.de>
590 * config/tc-avr.h (TC_VALIDATE_FIX): Allow fixups for immediate
593 2006-05-15 Paul Brook <paul@codesourcery.com>
595 * config/tc-arm.c (arm_adjust_symtab): Use
596 bfd_is_arm_special_symbol_name.
598 2006-05-15 Bob Wilson <bob.wilson@acm.org>
600 * config/tc-xtensa.c (is_direct_call_opcode, is_branch_jmp_to_next,
601 xg_assemble_vliw_tokens, xtensa_mark_narrow_branches,
602 xtensa_fix_short_loop_frags, is_local_forward_loop, relax_frag_immed):
603 Handle errors from calls to xtensa_opcode_is_* functions.
605 2006-05-14 Thiemo Seufer <ths@mips.com>
607 * config/tc-mips.c (macro_build): Test for currently active
609 (mips16_ip): Reject invalid opcodes.
611 2006-05-11 Carlos O'Donell <carlos@codesourcery.com>
613 * doc/as.texinfo: Rename "Index" to "AS Index",
614 and "ABORT" to "ABORT (COFF)".
616 2006-05-11 Paul Brook <paul@codesourcery.com>
618 * config/tc-arm.c (parse_half): New function.
619 (operand_parse_code): Remove OP_Iffff. Add OP_HALF.
620 (parse_operands): Ditto.
621 (do_mov16): Reject invalid relocations.
622 (do_t_mov16): Ditto. Use Thumb reloc numbers.
623 (insns): Replace Iffff with HALF.
624 (md_apply_fix): Add MOVW and MOVT relocs.
625 (tc_gen_reloc): Ditto.
626 * doc/c-arm.texi: Document relocation operators
628 2006-05-11 Paul Brook <paul@codesourcery.com>
630 * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
632 2006-05-11 Thiemo Seufer <ths@mips.com>
634 * config/tc-mips.c (append_insn): Don't check the range of j or
637 2006-05-11 Pedro Alves <pedro_alves@portugalmail.pt>
639 * config/tc-arm.c (md_pcrel_from_section): Force a bias for
640 relocs against external symbols for WinCE targets.
641 (md_apply_fix): Likewise.
643 2006-05-09 David Ung <davidu@mips.com>
645 * config/tc-mips.c (append_insn): Only warn about an out-of-range
648 2006-05-09 Nick Clifton <nickc@redhat.com>
650 * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups
651 against symbols which are not going to be placed into the symbol
654 2006-05-09 Ben Elliston <bje@au.ibm.com>
656 * expr.c (operand): Remove `if (0 && ..)' statement and
657 subsequently unused target_op label. Collapse `if (1 || ..)'
659 * app.c (do_scrub_chars): Remove unused case 0, as it is handled
660 separately above the switch.
662 2006-05-08 Nick Clifton <nickc@redhat.com>
665 * config/tc-msp430.c (line_separator_character): Define as |.
667 2006-05-08 Thiemo Seufer <ths@mips.com>
668 Nigel Stephens <nigel@mips.com>
669 David Ung <davidu@mips.com>
671 * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
672 (mips_opts): Likewise.
673 (file_ase_smartmips): New variable.
674 (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
675 (macro_build): Handle SmartMIPS instructions.
677 (md_longopts): Add argument handling for smartmips.
678 (md_parse_options, mips_after_parse_args): Likewise.
679 (s_mipsset): Add .set smartmips support.
680 (md_show_usage): Document -msmartmips/-mno-smartmips.
681 * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
683 * doc/c-mips.texi: Likewise.
685 2006-05-08 Alan Modra <amodra@bigpond.net.au>
687 * write.c (relax_segment): Add pass count arg. Don't error on
688 negative org/space on first two passes.
689 (relax_seg_info): New struct.
690 (relax_seg, write_object_file): Adjust.
691 * write.h (relax_segment): Update prototype.
693 2006-05-05 Julian Brown <julian@codesourcery.com>
695 * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
697 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
698 architecture version checks.
699 (insns): Allow overlapping instructions to be used in VFP mode.
701 2006-05-05 H.J. Lu <hongjiu.lu@intel.com>
704 * config/obj-elf.c (obj_elf_change_section): Allow user
705 specified SHF_ALPHA_GPREL.
707 2006-05-05 Bjoern Haase <bjoern.m.haase@web.de>
709 * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups
710 for PMEM related expressions.
712 2006-05-05 Nick Clifton <nickc@redhat.com>
715 * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the
716 insertion of a directory separator character into a string at a
717 given offset. Uses heuristics to decide when to use a backslash
718 character rather than a forward-slash character.
719 (dwarf2_directive_loc): Use the macro.
720 (out_debug_info): Likewise.
722 2006-05-05 Thiemo Seufer <ths@mips.com>
723 David Ung <davidu@mips.com>
725 * config/tc-mips.c (macro_build): Add case 'k' to handle cache
727 (macro): Add new case M_CACHE_AB.
729 2006-05-04 Kazu Hirata <kazu@codesourcery.com>
731 * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
732 (opcode_lookup): Issue a warning for opcode with
733 OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated
734 identical to OT_cinfix3.
735 (TxC3w, TC3w, tC3w): New.
736 (insns): Use tC3w and TC3w for comparison instructions with
739 2006-05-04 Alan Modra <amodra@bigpond.net.au>
741 * subsegs.h (struct frchain): Delete frch_seg.
742 (frchain_root): Delete.
743 (seg_info): Define as macro.
744 * subsegs.c (frchain_root): Delete.
745 (abs_seg_info, und_seg_info, absolute_frchain): Delete.
746 (subsegs_begin, subseg_change): Adjust for above.
747 (subseg_set_rest): Likewise. Add new frchain structs to seginfo
748 rather than to one big list.
749 (subseg_get): Don't special case abs, und sections.
750 (subseg_new, subseg_force_new): Don't set frchainP here.
752 (subsegs_print_statistics): Adjust frag chain control list traversal.
753 * debug.c (dmp_frags): Likewise.
754 * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
755 at frchain_root. Make use of known frchain ordering.
756 (last_frag_for_seg): Likewise.
757 (get_frag_fix): Likewise. Add seg param.
758 (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
759 * write.c (chain_frchains_together_1): Adjust for struct frchain.
760 (SUB_SEGMENT_ALIGN): Likewise.
761 (subsegs_finish): Adjust frchain list traversal.
762 * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
763 (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
764 (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
765 (xtensa_fix_b_j_loop_end_frags): Likewise.
766 (xtensa_fix_close_loop_end_frags): Likewise.
767 (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
768 (retrieve_segment_info): Delete frch_seg initialisation.
770 2006-05-03 Alan Modra <amodra@bigpond.net.au>
772 * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
773 * config/obj-elf.h (obj_sec_set_private_data): Delete.
774 * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
775 * config/tc-mn10300.c (tc_gen_reloc): Likewise.
777 2006-05-02 Joseph Myers <joseph@codesourcery.com>
779 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
781 (md_apply_fix3): Multiply offset by 4 here for
782 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
784 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
785 Jan Beulich <jbeulich@novell.com>
787 * config/tc-i386.c (output_invalid_buf): Change size for
789 * config/tc-tic30.c (output_invalid_buf): Likewise.
791 * config/tc-i386.c (output_invalid): Cast none-ascii char to
793 * config/tc-tic30.c (output_invalid): Likewise.
795 2006-05-02 Daniel Jacobowitz <dan@codesourcery.com>
797 * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
798 (TEXI2POD): Use AM_MAKEINFOFLAGS.
799 (asconfig.texi): Don't set top_srcdir.
800 * doc/as.texinfo: Don't use top_srcdir.
801 * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
803 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
805 * config/tc-i386.c (output_invalid_buf): Change size to 16.
806 * config/tc-tic30.c (output_invalid_buf): Likewise.
808 * config/tc-i386.c (output_invalid): Use snprintf instead of
810 * config/tc-ia64.c (declare_register_set): Likewise.
811 (emit_one_bundle): Likewise.
812 (check_dependencies): Likewise.
813 * config/tc-tic30.c (output_invalid): Likewise.
815 2006-05-02 Paul Brook <paul@codesourcery.com>
817 * config/tc-arm.c (arm_optimize_expr): New function.
818 * config/tc-arm.h (md_optimize_expr): Define
819 (arm_optimize_expr): Add prototype.
820 (TC_FORCE_RELOCATION_SUB_SAME): Define.
822 2006-05-02 Ben Elliston <bje@au.ibm.com>
824 * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
827 * sb.h (sb_list_vector): Move to sb.c.
828 * sb.c (free_list): Use type of sb_list_vector directly.
829 (sb_build): Fix off-by-one error in assertion about `size'.
831 2006-05-01 Ben Elliston <bje@au.ibm.com>
833 * listing.c (listing_listing): Remove useless loop.
834 * macro.c (macro_expand): Remove is_positional local variable.
835 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
836 and simplify surrounding expressions, where possible.
837 (assign_symbol): Likewise.
838 (s_weakref): Likewise.
839 * symbols.c (colon): Likewise.
841 2006-05-01 James Lemke <jwlemke@wasabisystems.com>
843 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
845 2006-04-30 Thiemo Seufer <ths@mips.com>
846 David Ung <davidu@mips.com>
848 * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
849 (mips_immed): New table that records various handling of udi
850 instruction patterns.
851 (mips_ip): Adds udi handling.
853 2006-04-28 Alan Modra <amodra@bigpond.net.au>
855 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
856 of list rather than beginning.
858 2006-04-26 Julian Brown <julian@codesourcery.com>
860 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
861 (is_quarter_float): Rename from above. Simplify slightly.
862 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
864 (parse_neon_mov): Parse floating-point constants.
865 (neon_qfloat_bits): Fix encoding.
866 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
867 preference to integer encoding when using the F32 type.
869 2006-04-26 Julian Brown <julian@codesourcery.com>
871 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
872 zero-initialising structures containing it will lead to invalid types).
873 (arm_it): Add vectype to each operand.
874 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
876 (neon_typed_alias): New structure. Extra information for typed
878 (reg_entry): Add neon type info field.
879 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
880 Break out alternative syntax for coprocessor registers, etc. into...
881 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
882 out from arm_reg_parse.
883 (parse_neon_type): Move. Return SUCCESS/FAIL.
884 (first_error): New function. Call to ensure first error which occurs is
886 (parse_neon_operand_type): Parse exactly one type.
887 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
888 (parse_typed_reg_or_scalar): New function. Handle core of both
889 arm_typed_reg_parse and parse_scalar.
890 (arm_typed_reg_parse): Parse a register with an optional type.
891 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
893 (parse_scalar): Parse a Neon scalar with optional type.
894 (parse_reg_list): Use first_error.
895 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
896 (neon_alias_types_same): New function. Return true if two (alias) types
898 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
900 (insert_reg_alias): Return new reg_entry not void.
901 (insert_neon_reg_alias): New function. Insert type/index information as
902 well as register for alias.
903 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
904 make typed register aliases accordingly.
905 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
907 (s_unreq): Delete type information if present.
908 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
909 (s_arm_unwind_save_mmxwcg): Likewise.
910 (s_arm_unwind_movsp): Likewise.
911 (s_arm_unwind_setfp): Likewise.
912 (parse_shift): Likewise.
913 (parse_shifter_operand): Likewise.
914 (parse_address): Likewise.
915 (parse_tb): Likewise.
916 (tc_arm_regname_to_dw2regnum): Likewise.
917 (md_pseudo_table): Add dn, qn.
918 (parse_neon_mov): Handle typed operands.
919 (parse_operands): Likewise.
920 (neon_type_mask): Add N_SIZ.
921 (N_ALLMODS): New macro.
922 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
923 (el_type_of_type_chk): Add some safeguards.
924 (modify_types_allowed): Fix logic bug.
925 (neon_check_type): Handle operands with types.
926 (neon_three_same): Remove redundant optional arg handling.
927 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
928 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
929 (do_neon_step): Adjust accordingly.
930 (neon_cmode_for_logic_imm): Use first_error.
931 (do_neon_bitfield): Call neon_check_type.
932 (neon_dyadic): Rename to...
933 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
934 to allow modification of type of the destination.
935 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
936 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
937 (do_neon_compare): Make destination be an untyped bitfield.
938 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
939 (neon_mul_mac): Return early in case of errors.
940 (neon_move_immediate): Use first_error.
941 (neon_mac_reg_scalar_long): Fix type to include scalar.
942 (do_neon_dup): Likewise.
943 (do_neon_mov): Likewise (in several places).
944 (do_neon_tbl_tbx): Fix type.
945 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
946 (do_neon_ld_dup): Exit early in case of errors and/or use
948 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
949 Handle .dn/.qn directives.
950 (REGDEF): Add zero for reg_entry neon field.
952 2006-04-26 Julian Brown <julian@codesourcery.com>
954 * config/tc-arm.c (limits.h): Include.
955 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
956 (fpu_vfp_v3_or_neon_ext): Declare constants.
957 (neon_el_type): New enumeration of types for Neon vector elements.
958 (neon_type_el): New struct. Define type and size of a vector element.
959 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
961 (neon_type): Define struct. The type of an instruction.
962 (arm_it): Add 'vectype' for the current instruction.
963 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
964 (vfp_sp_reg_pos): Rename to...
965 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
967 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
968 (Neon D or Q register).
969 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
971 (GE_OPT_PREFIX_BIG): Define constant, for use in...
972 (my_get_expression): Allow above constant as argument to accept
973 64-bit constants with optional prefix.
974 (arm_reg_parse): Add extra argument to return the specific type of
975 register in when either a D or Q register (REG_TYPE_NDQ) is
976 requested. Can be NULL.
977 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
978 (parse_reg_list): Update for new arm_reg_parse args.
979 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
980 (parse_neon_el_struct_list): New function. Parse element/structure
981 register lists for VLD<n>/VST<n> instructions.
982 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
983 (s_arm_unwind_save_mmxwr): Likewise.
984 (s_arm_unwind_save_mmxwcg): Likewise.
985 (s_arm_unwind_movsp): Likewise.
986 (s_arm_unwind_setfp): Likewise.
987 (parse_big_immediate): New function. Parse an immediate, which may be
988 64 bits wide. Put results in inst.operands[i].
989 (parse_shift): Update for new arm_reg_parse args.
990 (parse_address): Likewise. Add parsing of alignment specifiers.
991 (parse_neon_mov): Parse the operands of a VMOV instruction.
992 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
993 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
994 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
995 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
996 (parse_operands): Handle new codes above.
997 (encode_arm_vfp_sp_reg): Rename to...
998 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
999 selected VFP version only supports D0-D15.
1000 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
1001 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
1002 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
1003 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
1004 encode_arm_vfp_reg name, and allow 32 D regs.
1005 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
1006 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
1008 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
1009 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
1010 constant-load and conversion insns introduced with VFPv3.
1011 (neon_tab_entry): New struct.
1012 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
1013 those which are the targets of pseudo-instructions.
1014 (neon_opc): Enumerate opcodes, use as indices into...
1015 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
1016 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
1017 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
1018 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
1020 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
1022 (neon_type_mask): New. Compact type representation for type checking.
1023 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
1024 permitted type combinations.
1025 (N_IGNORE_TYPE): New macro.
1026 (neon_check_shape): New function. Check an instruction shape for
1027 multiple alternatives. Return the specific shape for the current
1029 (neon_modify_type_size): New function. Modify a vector type and size,
1030 depending on the bit mask in argument 1.
1031 (neon_type_promote): New function. Convert a given "key" type (of an
1032 operand) into the correct type for a different operand, based on a bit
1034 (type_chk_of_el_type): New function. Convert a type and size into the
1035 compact representation used for type checking.
1036 (el_type_of_type_ckh): New function. Reverse of above (only when a
1037 single bit is set in the bit mask).
1038 (modify_types_allowed): New function. Alter a mask of allowed types
1039 based on a bit mask of modifications.
1040 (neon_check_type): New function. Check the type of the current
1041 instruction against the variable argument list. The "key" type of the
1042 instruction is returned.
1043 (neon_dp_fixup): New function. Fill in and modify instruction bits for
1044 a Neon data-processing instruction depending on whether we're in ARM
1045 mode or Thumb-2 mode.
1046 (neon_logbits): New function.
1047 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
1048 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
1049 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
1050 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
1051 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
1052 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
1053 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1054 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
1055 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
1056 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
1057 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
1058 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
1059 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
1060 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
1061 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
1062 (neon_move_immediate, do_neon_mvn, neon_mixed_length)
1063 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
1064 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
1065 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
1066 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
1067 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
1068 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
1069 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
1070 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
1071 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
1073 (parse_neon_type): New function. Parse Neon type specifier.
1074 (opcode_lookup): Allow parsing of Neon type specifiers.
1075 (REGNUM2, REGSETH, REGSET2): New macros.
1076 (reg_names): Add new VFPv3 and Neon registers.
1077 (NUF, nUF, NCE, nCE): New macros for opcode table.
1078 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
1079 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
1080 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
1081 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
1082 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
1083 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
1084 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
1085 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
1086 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
1087 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
1088 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
1089 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
1090 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
1091 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
1093 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
1094 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
1095 (arm_option_cpu_value): Add vfp3 and neon.
1096 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
1099 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1101 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
1102 syntax instead of hardcoded opcodes with ".w18" suffixes.
1103 (wide_branch_opcode): New.
1104 (build_transition): Use it to check for wide branch opcodes with
1105 either ".w18" or ".w15" suffixes.
1107 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1109 * config/tc-xtensa.c (xtensa_create_literal_symbol,
1110 xg_assemble_literal, xg_assemble_literal_space): Do not set the
1111 frag's is_literal flag.
1113 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1115 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
1117 2006-04-23 Kazu Hirata <kazu@codesourcery.com>
1119 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
1120 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
1121 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
1122 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
1123 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
1125 2005-04-20 Paul Brook <paul@codesourcery.com>
1127 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
1129 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
1131 2006-04-19 Alan Modra <amodra@bigpond.net.au>
1133 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
1134 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
1135 Make some cpus unsupported on ELF. Run "make dep-am".
1136 * Makefile.in: Regenerate.
1138 2006-04-19 Alan Modra <amodra@bigpond.net.au>
1140 * configure.in (--enable-targets): Indent help message.
1141 * configure: Regenerate.
1143 2006-04-18 H.J. Lu <hongjiu.lu@intel.com>
1146 * config/tc-i386.c (i386_immediate): Check illegal immediate
1149 2006-04-18 Alan Modra <amodra@bigpond.net.au>
1151 * config/tc-i386.c: Formatting.
1152 (output_disp, output_imm): ISO C90 params.
1154 * frags.c (frag_offset_fixed_p): Constify args.
1155 * frags.h (frag_offset_fixed_p): Ditto.
1157 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
1158 (COFF_MAGIC): Delete.
1160 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
1162 2006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
1164 * po/POTFILES.in: Regenerated.
1166 2006-04-16 Mark Mitchell <mark@codesourcery.com>
1168 * doc/as.texinfo: Mention that some .type syntaxes are not
1169 supported on all architectures.
1171 2006-04-14 Sterling Augustine <sterling@tensilica.com>
1173 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
1174 instructions when such transformations have been disabled.
1176 2006-04-10 Sterling Augustine <sterling@tensilica.com>
1178 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
1179 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
1180 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
1181 decoding the loop instructions. Remove current_offset variable.
1182 (xtensa_fix_short_loop_frags): Likewise.
1183 (min_bytes_to_other_loop_end): Remove current_offset argument.
1185 2006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl>
1187 * config/tc-z80.c (z80_optimize_expr): Removed.
1188 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
1190 2006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
1192 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
1193 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
1194 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
1195 atmega644, atmega329, atmega3290, atmega649, atmega6490,
1196 atmega406, atmega640, atmega1280, atmega1281, at90can32,
1197 at90can64, at90usb646, at90usb647, at90usb1286 and
1199 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
1201 2006-04-07 Paul Brook <paul@codesourcery.com>
1203 * config/tc-arm.c (parse_operands): Set default error message.
1205 2006-04-07 Paul Brook <paul@codesourcery.com>
1207 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
1209 2006-04-07 Paul Brook <paul@codesourcery.com>
1211 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
1213 2006-04-07 Paul Brook <paul@codesourcery.com>
1215 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
1216 (move_or_literal_pool): Handle Thumb-2 instructions.
1217 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
1219 2006-04-07 Alan Modra <amodra@bigpond.net.au>
1222 * config/tc-i386.c (match_template): Move 64-bit operand tests
1225 2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
1227 * po/Make-in: Add install-html target.
1228 * Makefile.am: Add install-html and install-html-recursive targets.
1229 * Makefile.in: Regenerate.
1230 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
1231 * configure: Regenerate.
1232 * doc/Makefile.am: Add install-html and install-html-am targets.
1233 * doc/Makefile.in: Regenerate.
1235 2006-04-06 Alan Modra <amodra@bigpond.net.au>
1237 * frags.c (frag_offset_fixed_p): Reinitialise offset before
1240 2006-04-05 Richard Sandiford <richard@codesourcery.com>
1241 Daniel Jacobowitz <dan@codesourcery.com>
1243 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
1244 (GOTT_BASE, GOTT_INDEX): New.
1245 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
1246 GOTT_INDEX when generating VxWorks PIC.
1247 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
1248 use the generic *-*-vxworks* stanza instead.
1250 2006-04-04 Alan Modra <amodra@bigpond.net.au>
1253 * frags.c (frag_offset_fixed_p): New function.
1254 * frags.h (frag_offset_fixed_p): Declare.
1255 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
1256 (resolve_expression): Likewise.
1258 2006-04-03 Sterling Augustine <sterling@tensilica.com>
1260 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
1261 of the same length but different numbers of slots.
1263 2006-03-30 Andreas Schwab <schwab@suse.de>
1265 * configure.in: Fix help string for --enable-targets option.
1266 * configure: Regenerate.
1268 2006-03-28 Nathan Sidwell <nathan@codesourcery.com>
1270 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
1271 (m68k_ip): ... here. Use for all chips. Protect against buffer
1272 overrun and avoid excessive copying.
1274 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
1275 m68020_control_regs, m68040_control_regs, m68060_control_regs,
1276 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
1277 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
1278 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
1279 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
1280 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
1281 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
1282 mcf5282_ctrl, mcfv4e_ctrl): ... these.
1283 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
1284 (struct m68k_cpu): Change chip field to control_regs.
1285 (current_chip): Remove.
1286 (control_regs): New.
1287 (m68k_archs, m68k_extensions): Adjust.
1288 (m68k_cpus): Reorder to be in cpu number order. Adjust.
1289 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
1290 (find_cf_chip): Reimplement for new organization of cpu table.
1291 (select_control_regs): Remove.
1293 (struct save_opts): Save control regs, not chip.
1294 (s_save, s_restore): Adjust.
1295 (m68k_lookup_cpu): Give deprecated warning when necessary.
1296 (m68k_init_arch): Adjust.
1297 (md_show_usage): Adjust for new cpu table organization.
1299 2006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
1301 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
1302 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
1303 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
1305 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
1306 (any_gotrel): New rule.
1307 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
1308 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
1310 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
1311 (bfin_pic_ptr): New function.
1312 (md_pseudo_table): Add it for ".picptr".
1313 (OPTION_FDPIC): New macro.
1314 (md_longopts): Add -mfdpic.
1315 (md_parse_option): Handle it.
1316 (md_begin): Set BFD flags.
1317 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
1318 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
1320 * Makefile.am (bfin-parse.o): Update dependencies.
1321 (DEPTC_bfin_elf): Likewise.
1322 * Makefile.in: Regenerate.
1324 2006-03-25 Richard Sandiford <richard@codesourcery.com>
1326 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
1327 mcfemac instead of mcfmac.
1329 2006-03-23 Michael Matz <matz@suse.de>
1331 * config/tc-i386.c (type_names): Correct placement of 'static'.
1332 (reloc): Map some more relocs to their 64 bit counterpart when
1334 (output_insn): Work around breakage if DEBUG386 is defined.
1335 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
1336 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
1337 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
1338 different from i386.
1339 (output_imm): Ditto.
1340 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
1342 (md_convert_frag): Jumps can now be larger than 2GB away, error
1344 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
1345 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
1347 2006-03-22 Richard Sandiford <richard@codesourcery.com>
1348 Daniel Jacobowitz <dan@codesourcery.com>
1349 Phil Edwards <phil@codesourcery.com>
1350 Zack Weinberg <zack@codesourcery.com>
1351 Mark Mitchell <mark@codesourcery.com>
1352 Nathan Sidwell <nathan@codesourcery.com>
1354 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
1355 (md_begin): Complain about -G being used for PIC. Don't change
1356 the text, data and bss alignments on VxWorks.
1357 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
1358 generating VxWorks PIC.
1359 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
1360 (macro): Likewise, but do not treat la $25 specially for
1361 VxWorks PIC, and do not handle jal.
1362 (OPTION_MVXWORKS_PIC): New macro.
1363 (md_longopts): Add -mvxworks-pic.
1364 (md_parse_option): Don't complain about using PIC and -G together here.
1365 Handle OPTION_MVXWORKS_PIC.
1366 (md_estimate_size_before_relax): Always use the first relaxation
1367 sequence on VxWorks.
1368 * config/tc-mips.h (VXWORKS_PIC): New.
1370 2006-03-21 Paul Brook <paul@codesourcery.com>
1372 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
1374 2006-03-21 Sterling Augustine <sterling@tensilica.com>
1376 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
1377 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
1378 (get_loop_align_size): New.
1379 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
1380 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
1381 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
1382 (get_noop_aligned_address): Use get_loop_align_size.
1383 (get_aligned_diff): Likewise.
1385 2006-03-21 Paul Brook <paul@codesourcery.com>
1387 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
1389 2006-03-20 Paul Brook <paul@codesourcery.com>
1391 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
1392 (do_t_branch): Encode branches inside IT blocks as unconditional.
1393 (do_t_cps): New function.
1394 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
1395 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
1396 (opcode_lookup): Allow conditional suffixes on all instructions in
1398 (md_assemble): Advance condexec state before checking for errors.
1399 (insns): Use do_t_cps.
1401 2006-03-20 Paul Brook <paul@codesourcery.com>
1403 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
1404 outputting the insn.
1406 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1408 * config/tc-vax.c: Update copyright year.
1409 * config/tc-vax.h: Likewise.
1411 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1413 * config/tc-vax.c (md_chars_to_number): Used only locally, so
1415 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
1417 2006-03-17 Paul Brook <paul@codesourcery.com>
1419 * config/tc-arm.c (insns): Add ldm and stm.
1421 2006-03-17 Ben Elliston <bje@au.ibm.com>
1424 * doc/as.texinfo (Ident): Document this directive more thoroughly.
1426 2006-03-16 Paul Brook <paul@codesourcery.com>
1428 * config/tc-arm.c (insns): Add "svc".
1430 2006-03-13 Bob Wilson <bob.wilson@acm.org>
1432 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
1433 flag and avoid double underscore prefixes.
1435 2006-03-10 Paul Brook <paul@codesourcery.com>
1437 * config/tc-arm.c (md_begin): Handle EABIv5.
1438 (arm_eabis): Add EF_ARM_EABI_VER5.
1439 * doc/c-arm.texi: Document -meabi=5.
1441 2006-03-10 Ben Elliston <bje@au.ibm.com>
1443 * app.c (do_scrub_chars): Simplify string handling.
1445 2006-03-07 Richard Sandiford <richard@codesourcery.com>
1446 Daniel Jacobowitz <dan@codesourcery.com>
1447 Zack Weinberg <zack@codesourcery.com>
1448 Nathan Sidwell <nathan@codesourcery.com>
1449 Paul Brook <paul@codesourcery.com>
1450 Ricardo Anguiano <anguiano@codesourcery.com>
1451 Phil Edwards <phil@codesourcery.com>
1453 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
1454 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
1456 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
1457 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
1458 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
1460 2006-03-06 Bob Wilson <bob.wilson@acm.org>
1462 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
1463 even when using the text-section-literals option.
1465 2006-03-06 Nathan Sidwell <nathan@codesourcery.com>
1467 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
1469 (m68k_ip): <case 'J'> Check we have some control regs.
1470 (md_parse_option): Allow raw arch switch.
1471 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
1472 whether 68881 or cfloat was meant by -mfloat.
1473 (md_show_usage): Adjust extension display.
1474 (m68k_elf_final_processing): Adjust.
1476 2006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
1478 * config/tc-avr.c (avr_mod_hash_value): New function.
1479 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
1480 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
1481 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
1482 instead of int avr_ldi_expression: use avr_mod_hash_value instead
1484 (tc_gen_reloc): Handle substractions of symbols, if possible do
1485 fixups, abort otherwise.
1486 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
1487 tc_fix_adjustable): Define.
1489 2006-03-02 James E Wilson <wilson@specifix.com>
1491 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
1492 change the template, then clear md.slot[curr].end_of_insn_group.
1494 2006-02-28 Jan Beulich <jbeulich@novell.com>
1496 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
1498 2006-02-28 Jan Beulich <jbeulich@novell.com>
1501 * macro.c (getstring): Don't treat parentheses special anymore.
1502 (get_any_string): Don't consider '(' and ')' as quoting anymore.
1503 Special-case '(', ')', '[', and ']' when dealing with non-quoting
1506 2006-02-28 Mat <mat@csail.mit.edu>
1508 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
1510 2006-02-27 Jakub Jelinek <jakub@redhat.com>
1512 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
1514 (CFI_signal_frame): Define.
1515 (cfi_pseudo_table): Add .cfi_signal_frame.
1516 (dot_cfi): Handle CFI_signal_frame.
1517 (output_cie): Handle cie->signal_frame.
1518 (select_cie_for_fde): Don't share CIE if signal_frame flag is
1519 different. Copy signal_frame from FDE to newly created CIE.
1520 * doc/as.texinfo: Document .cfi_signal_frame.
1522 2006-02-27 Carlos O'Donell <carlos@codesourcery.com>
1524 * doc/Makefile.am: Add html target.
1525 * doc/Makefile.in: Regenerate.
1526 * po/Make-in: Add html target.
1528 2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
1530 * config/tc-i386.c (output_insn): Support Intel Merom New
1533 * config/tc-i386.h (CpuMNI): New.
1534 (CpuUnknownFlags): Add CpuMNI.
1536 2006-02-24 David S. Miller <davem@sunset.davemloft.net>
1538 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
1539 (hpriv_reg_table): New table for hyperprivileged registers.
1540 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
1543 2006-02-24 DJ Delorie <dj@redhat.com>
1545 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
1546 (tc_gen_reloc): Don't define.
1547 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
1548 (OPTION_LINKRELAX): New.
1549 (md_longopts): Add it.
1551 (md_parse_options): Set it.
1552 (md_assemble): Emit relaxation relocs as needed.
1553 (md_convert_frag): Emit relaxation relocs as needed.
1554 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
1555 (m32c_apply_fix): New.
1556 (tc_gen_reloc): New.
1557 (m32c_force_relocation): Force out jump relocs when relaxing.
1558 (m32c_fix_adjustable): Return false if relaxing.
1560 2006-02-24 Paul Brook <paul@codesourcery.com>
1562 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
1563 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
1564 (struct asm_barrier_opt): Define.
1565 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
1566 (parse_psr): Accept V7M psr names.
1567 (parse_barrier): New function.
1568 (enum operand_parse_code): Add OP_oBARRIER.
1569 (parse_operands): Implement OP_oBARRIER.
1570 (do_barrier): New function.
1571 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
1572 (do_t_cpsi): Add V7M restrictions.
1573 (do_t_mrs, do_t_msr): Validate V7M variants.
1574 (md_assemble): Check for NULL variants.
1575 (v7m_psrs, barrier_opt_names): New tables.
1576 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
1577 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
1578 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
1579 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
1580 (struct cpu_arch_ver_table): Define.
1581 (cpu_arch_ver): New.
1582 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
1583 Tag_CPU_arch_profile.
1584 * doc/c-arm.texi: Document new cpu and arch options.
1586 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1588 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
1590 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1592 * config/tc-ia64.c: Update copyright years.
1594 2006-02-22 H.J. Lu <hongjiu.lu@intel.com>
1596 * config/tc-ia64.c (specify_resource): Add the rule 17 from
1599 2005-02-22 Paul Brook <paul@codesourcery.com>
1601 * config/tc-arm.c (do_pld): Remove incorrect write to
1603 (encode_thumb32_addr_mode): Use correct operand.
1605 2006-02-21 Paul Brook <paul@codesourcery.com>
1607 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
1609 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
1610 Anil Paranjape <anilp1@kpitcummins.com>
1611 Shilin Shakti <shilins@kpitcummins.com>
1613 * Makefile.am: Add xc16x related entry.
1614 * Makefile.in: Regenerate.
1615 * configure.in: Added xc16x related entry.
1616 * configure: Regenerate.
1617 * config/tc-xc16x.h: New file
1618 * config/tc-xc16x.c: New file
1619 * doc/c-xc16x.texi: New file for xc16x
1620 * doc/all.texi: Entry for xc16x
1621 * doc/Makefile.texi: Added c-xc16x.texi
1622 * NEWS: Announce the support for the new target.
1624 2006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
1626 * configure.tgt: set emulation for mips-*-netbsd*
1628 2006-02-14 Jakub Jelinek <jakub@redhat.com>
1630 * config.in: Rebuilt.
1632 2006-02-13 Bob Wilson <bob.wilson@acm.org>
1634 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
1635 from 1, not 0, in error messages.
1636 (md_assemble): Simplify special-case check for ENTRY instructions.
1637 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
1638 operand in error message.
1640 2006-02-13 Joseph S. Myers <joseph@codesourcery.com>
1642 * configure.tgt (arm-*-linux-gnueabi*): Change to
1645 2006-02-10 Nick Clifton <nickc@redhat.com>
1647 * config/tc-crx.c (check_range): Ensure that the sign bit of a
1648 32-bit value is propagated into the upper bits of a 64-bit long.
1650 * config/tc-arc.c (init_opcode_tables): Fix cast.
1651 (arc_extoper, md_operand): Likewise.
1653 2006-02-09 David Heine <dlheine@tensilica.com>
1655 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
1656 each relaxation step.
1658 2006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
1660 * configure.in (CHECK_DECLS): Add vsnprintf.
1661 * configure: Regenerate.
1662 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
1663 include/declare here, but...
1664 * as.h: Move code detecting VARARGS idiom to the top.
1665 (errno.h, stdarg.h, varargs.h, va_list): ...here.
1666 (vsnprintf): Declare if not already declared.
1668 2006-02-08 H.J. Lu <hongjiu.lu@intel.com>
1670 * as.c (close_output_file): New.
1671 (main): Register close_output_file with xatexit before
1672 dump_statistics. Don't call output_file_close.
1674 2006-02-07 Nathan Sidwell <nathan@codesourcery.com>
1676 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
1677 mcf5329_control_regs): New.
1678 (not_current_architecture, selected_arch, selected_cpu): New.
1679 (m68k_archs, m68k_extensions): New.
1680 (archs): Renamed to ...
1681 (m68k_cpus): ... here. Adjust.
1683 (md_pseudo_table): Add arch and cpu directives.
1684 (find_cf_chip, m68k_ip): Adjust table scanning.
1685 (no_68851, no_68881): Remove.
1686 (md_assemble): Lazily initialize.
1687 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
1688 (md_init_after_args): Move functionality to m68k_init_arch.
1689 (mri_chip): Adjust table scanning.
1690 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
1691 options with saner parsing.
1692 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
1693 m68k_init_arch): New.
1694 (s_m68k_cpu, s_m68k_arch): New.
1695 (md_show_usage): Adjust.
1696 (m68k_elf_final_processing): Set CF EF flags.
1697 * config/tc-m68k.h (m68k_init_after_args): Remove.
1698 (tc_init_after_args): Remove.
1699 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
1700 (M68k-Directives): Document .arch and .cpu directives.
1702 2006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl>
1704 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
1705 synonyms for equ and defl.
1706 (z80_cons_fix_new): New function.
1707 (emit_byte): Disallow relative jumps to absolute locations.
1708 (emit_data): Only handle defb, prototype changed, because defb is
1709 now handled as pseudo-op rather than an instruction.
1710 (instab): Entries for defb,defw,db,dw moved from here...
1711 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
1712 Add entries for def24,def32,d24,d32.
1713 (md_assemble): Improved error handling.
1714 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
1715 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
1716 (z80_cons_fix_new): Declare.
1717 * doc/c-z80.texi (defb, db): Mention warning on overflow.
1718 (def24,d24,def32,d32): New pseudo-ops.
1720 2006-02-02 Paul Brook <paul@codesourcery.com>
1722 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
1724 2005-02-02 Paul Brook <paul@codesourcery.com>
1726 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
1727 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
1728 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
1729 T2_OPCODE_RSB): Define.
1730 (thumb32_negate_data_op): New function.
1731 (md_apply_fix): Use it.
1733 2006-01-31 Bob Wilson <bob.wilson@acm.org>
1735 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
1737 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
1738 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
1740 (relaxation_requirements): Add pfinish_frag argument and use it to
1741 replace setting tinsn->record_fix fields.
1742 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
1743 and vinsn_to_insnbuf. Remove references to record_fix and
1744 slot_sub_symbols fields.
1745 (xtensa_mark_narrow_branches): Delete unused code.
1746 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
1748 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
1750 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
1751 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
1752 of the record_fix field. Simplify error messages for unexpected
1754 (set_expr_symbol_offset_diff): Delete.
1756 2006-01-31 Paul Brook <paul@codesourcery.com>
1758 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
1760 2006-01-31 Paul Brook <paul@codesourcery.com>
1761 Richard Earnshaw <rearnsha@arm.com>
1763 * config/tc-arm.c: Use arm_feature_set.
1764 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
1765 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
1766 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
1769 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
1770 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
1771 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
1772 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
1774 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
1775 (arm_opts): Move old cpu/arch options from here...
1776 (arm_legacy_opts): ... to here.
1777 (md_parse_option): Search arm_legacy_opts.
1778 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
1779 (arm_float_abis, arm_eabis): Make const.
1781 2006-01-25 Bob Wilson <bob.wilson@acm.org>
1783 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
1785 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1787 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
1788 in load immediate intruction.
1790 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1792 * config/bfin-parse.y (value_match): Use correct conversion
1793 specifications in template string for __FILE__ and __LINE__.
1797 2006-01-18 Alexandre Oliva <aoliva@redhat.com>
1799 Introduce TLS descriptors for i386 and x86_64.
1800 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
1801 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
1802 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
1803 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
1804 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
1806 (build_modrm_byte): Set up zero modrm for TLS desc calls.
1807 (lex_got): Handle @tlsdesc and @tlscall.
1808 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
1810 2006-01-11 Nick Clifton <nickc@redhat.com>
1812 Fixes for building on 64-bit hosts:
1813 * config/tc-avr.c (mod_index): New union to allow conversion
1814 between pointers and integers.
1815 (md_begin, avr_ldi_expression): Use it.
1816 * config/tc-i370.c (md_assemble): Add cast for argument to print
1818 * config/tc-tic54x.c (subsym_substitute): Likewise.
1819 * config/tc-mn10200.c (md_assemble): Use a union to convert the
1820 opindex field of fr_cgen structure into a pointer so that it can
1821 be stored in a frag.
1822 * config/tc-mn10300.c (md_assemble): Likewise.
1823 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
1825 * config/tc-v850.c: Replace uses of (int) casts with correct
1828 2006-01-09 H.J. Lu <hongjiu.lu@intel.com>
1831 * symbols.c (snapshot_symbol): Don't change a defined symbol.
1833 2006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
1836 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
1837 a local-label reference.
1839 For older changes see ChangeLog-2005
1845 version-control: never