1 2006-05-11 Paul Brook <paul@codesourcery.com>
3 * config/tc-arm.c (parse_half): New function.
4 (operand_parse_code): Remove OP_Iffff. Add OP_HALF.
5 (parse_operands): Ditto.
6 (do_mov16): Reject invalid relocations.
7 (do_t_mov16): Ditto. Use Thumb reloc numbers.
8 (insns): Replace Iffff with HALF.
9 (md_apply_fix): Add MOVW and MOVT relocs.
10 (tc_gen_reloc): Ditto.
11 * doc/c-arm.texi: Document relocation operators
13 2006-05-11 Paul Brook <paul@codesourcery.com>
15 * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
17 2006-05-11 Thiemo Seufer <ths@mips.com>
19 * config/tc-mips.c (append_insn): Don't check the range of j or
22 2006-05-11 Pedro Alves <pedro_alves@portugalmail.pt>
24 * config/tc-arm.c (md_pcrel_from_section): Force a bias for
25 relocs against external symbols for WinCE targets.
26 (md_apply_fix): Likewise.
28 2006-05-09 David Ung <davidu@mips.com>
30 * config/tc-mips.c (append_insn): Only warn about an out-of-range
33 2006-05-09 Nick Clifton <nickc@redhat.com>
35 * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups
36 against symbols which are not going to be placed into the symbol
39 2006-05-09 Ben Elliston <bje@au.ibm.com>
41 * expr.c (operand): Remove `if (0 && ..)' statement and
42 subsequently unused target_op label. Collapse `if (1 || ..)'
44 * app.c (do_scrub_chars): Remove unused case 0, as it is handled
45 separately above the switch.
47 2006-05-08 Nick Clifton <nickc@redhat.com>
50 * config/tc-msp430.c (line_separator_character): Define as |.
52 2006-05-08 Thiemo Seufer <ths@mips.com>
53 Nigel Stephens <nigel@mips.com>
54 David Ung <davidu@mips.com>
56 * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
57 (mips_opts): Likewise.
58 (file_ase_smartmips): New variable.
59 (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
60 (macro_build): Handle SmartMIPS instructions.
62 (md_longopts): Add argument handling for smartmips.
63 (md_parse_options, mips_after_parse_args): Likewise.
64 (s_mipsset): Add .set smartmips support.
65 (md_show_usage): Document -msmartmips/-mno-smartmips.
66 * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
68 * doc/c-mips.texi: Likewise.
70 2006-05-08 Alan Modra <amodra@bigpond.net.au>
72 * write.c (relax_segment): Add pass count arg. Don't error on
73 negative org/space on first two passes.
74 (relax_seg_info): New struct.
75 (relax_seg, write_object_file): Adjust.
76 * write.h (relax_segment): Update prototype.
78 2006-05-05 Julian Brown <julian@codesourcery.com>
80 * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
82 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
83 architecture version checks.
84 (insns): Allow overlapping instructions to be used in VFP mode.
86 2006-05-05 H.J. Lu <hongjiu.lu@intel.com>
89 * config/obj-elf.c (obj_elf_change_section): Allow user
90 specified SHF_ALPHA_GPREL.
92 2006-05-05 Bjoern Haase <bjoern.m.haase@web.de>
94 * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups
95 for PMEM related expressions.
97 2006-05-05 Nick Clifton <nickc@redhat.com>
100 * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the
101 insertion of a directory separator character into a string at a
102 given offset. Uses heuristics to decide when to use a backslash
103 character rather than a forward-slash character.
104 (dwarf2_directive_loc): Use the macro.
105 (out_debug_info): Likewise.
107 2006-05-05 Thiemo Seufer <ths@mips.com>
108 David Ung <davidu@mips.com>
110 * config/tc-mips.c (macro_build): Add case 'k' to handle cache
112 (macro): Add new case M_CACHE_AB.
114 2006-05-04 Kazu Hirata <kazu@codesourcery.com>
116 * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
117 (opcode_lookup): Issue a warning for opcode with
118 OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated
119 identical to OT_cinfix3.
120 (TxC3w, TC3w, tC3w): New.
121 (insns): Use tC3w and TC3w for comparison instructions with
124 2006-05-04 Alan Modra <amodra@bigpond.net.au>
126 * subsegs.h (struct frchain): Delete frch_seg.
127 (frchain_root): Delete.
128 (seg_info): Define as macro.
129 * subsegs.c (frchain_root): Delete.
130 (abs_seg_info, und_seg_info, absolute_frchain): Delete.
131 (subsegs_begin, subseg_change): Adjust for above.
132 (subseg_set_rest): Likewise. Add new frchain structs to seginfo
133 rather than to one big list.
134 (subseg_get): Don't special case abs, und sections.
135 (subseg_new, subseg_force_new): Don't set frchainP here.
137 (subsegs_print_statistics): Adjust frag chain control list traversal.
138 * debug.c (dmp_frags): Likewise.
139 * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
140 at frchain_root. Make use of known frchain ordering.
141 (last_frag_for_seg): Likewise.
142 (get_frag_fix): Likewise. Add seg param.
143 (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
144 * write.c (chain_frchains_together_1): Adjust for struct frchain.
145 (SUB_SEGMENT_ALIGN): Likewise.
146 (subsegs_finish): Adjust frchain list traversal.
147 * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
148 (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
149 (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
150 (xtensa_fix_b_j_loop_end_frags): Likewise.
151 (xtensa_fix_close_loop_end_frags): Likewise.
152 (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
153 (retrieve_segment_info): Delete frch_seg initialisation.
155 2006-05-03 Alan Modra <amodra@bigpond.net.au>
157 * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
158 * config/obj-elf.h (obj_sec_set_private_data): Delete.
159 * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
160 * config/tc-mn10300.c (tc_gen_reloc): Likewise.
162 2006-05-02 Joseph Myers <joseph@codesourcery.com>
164 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
166 (md_apply_fix3): Multiply offset by 4 here for
167 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
169 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
170 Jan Beulich <jbeulich@novell.com>
172 * config/tc-i386.c (output_invalid_buf): Change size for
174 * config/tc-tic30.c (output_invalid_buf): Likewise.
176 * config/tc-i386.c (output_invalid): Cast none-ascii char to
178 * config/tc-tic30.c (output_invalid): Likewise.
180 2006-05-02 Daniel Jacobowitz <dan@codesourcery.com>
182 * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
183 (TEXI2POD): Use AM_MAKEINFOFLAGS.
184 (asconfig.texi): Don't set top_srcdir.
185 * doc/as.texinfo: Don't use top_srcdir.
186 * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
188 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
190 * config/tc-i386.c (output_invalid_buf): Change size to 16.
191 * config/tc-tic30.c (output_invalid_buf): Likewise.
193 * config/tc-i386.c (output_invalid): Use snprintf instead of
195 * config/tc-ia64.c (declare_register_set): Likewise.
196 (emit_one_bundle): Likewise.
197 (check_dependencies): Likewise.
198 * config/tc-tic30.c (output_invalid): Likewise.
200 2006-05-02 Paul Brook <paul@codesourcery.com>
202 * config/tc-arm.c (arm_optimize_expr): New function.
203 * config/tc-arm.h (md_optimize_expr): Define
204 (arm_optimize_expr): Add prototype.
205 (TC_FORCE_RELOCATION_SUB_SAME): Define.
207 2006-05-02 Ben Elliston <bje@au.ibm.com>
209 * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
212 * sb.h (sb_list_vector): Move to sb.c.
213 * sb.c (free_list): Use type of sb_list_vector directly.
214 (sb_build): Fix off-by-one error in assertion about `size'.
216 2006-05-01 Ben Elliston <bje@au.ibm.com>
218 * listing.c (listing_listing): Remove useless loop.
219 * macro.c (macro_expand): Remove is_positional local variable.
220 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
221 and simplify surrounding expressions, where possible.
222 (assign_symbol): Likewise.
223 (s_weakref): Likewise.
224 * symbols.c (colon): Likewise.
226 2006-05-01 James Lemke <jwlemke@wasabisystems.com>
228 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
230 2006-04-30 Thiemo Seufer <ths@mips.com>
231 David Ung <davidu@mips.com>
233 * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
234 (mips_immed): New table that records various handling of udi
235 instruction patterns.
236 (mips_ip): Adds udi handling.
238 2006-04-28 Alan Modra <amodra@bigpond.net.au>
240 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
241 of list rather than beginning.
243 2006-04-26 Julian Brown <julian@codesourcery.com>
245 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
246 (is_quarter_float): Rename from above. Simplify slightly.
247 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
249 (parse_neon_mov): Parse floating-point constants.
250 (neon_qfloat_bits): Fix encoding.
251 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
252 preference to integer encoding when using the F32 type.
254 2006-04-26 Julian Brown <julian@codesourcery.com>
256 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
257 zero-initialising structures containing it will lead to invalid types).
258 (arm_it): Add vectype to each operand.
259 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
261 (neon_typed_alias): New structure. Extra information for typed
263 (reg_entry): Add neon type info field.
264 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
265 Break out alternative syntax for coprocessor registers, etc. into...
266 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
267 out from arm_reg_parse.
268 (parse_neon_type): Move. Return SUCCESS/FAIL.
269 (first_error): New function. Call to ensure first error which occurs is
271 (parse_neon_operand_type): Parse exactly one type.
272 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
273 (parse_typed_reg_or_scalar): New function. Handle core of both
274 arm_typed_reg_parse and parse_scalar.
275 (arm_typed_reg_parse): Parse a register with an optional type.
276 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
278 (parse_scalar): Parse a Neon scalar with optional type.
279 (parse_reg_list): Use first_error.
280 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
281 (neon_alias_types_same): New function. Return true if two (alias) types
283 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
285 (insert_reg_alias): Return new reg_entry not void.
286 (insert_neon_reg_alias): New function. Insert type/index information as
287 well as register for alias.
288 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
289 make typed register aliases accordingly.
290 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
292 (s_unreq): Delete type information if present.
293 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
294 (s_arm_unwind_save_mmxwcg): Likewise.
295 (s_arm_unwind_movsp): Likewise.
296 (s_arm_unwind_setfp): Likewise.
297 (parse_shift): Likewise.
298 (parse_shifter_operand): Likewise.
299 (parse_address): Likewise.
300 (parse_tb): Likewise.
301 (tc_arm_regname_to_dw2regnum): Likewise.
302 (md_pseudo_table): Add dn, qn.
303 (parse_neon_mov): Handle typed operands.
304 (parse_operands): Likewise.
305 (neon_type_mask): Add N_SIZ.
306 (N_ALLMODS): New macro.
307 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
308 (el_type_of_type_chk): Add some safeguards.
309 (modify_types_allowed): Fix logic bug.
310 (neon_check_type): Handle operands with types.
311 (neon_three_same): Remove redundant optional arg handling.
312 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
313 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
314 (do_neon_step): Adjust accordingly.
315 (neon_cmode_for_logic_imm): Use first_error.
316 (do_neon_bitfield): Call neon_check_type.
317 (neon_dyadic): Rename to...
318 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
319 to allow modification of type of the destination.
320 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
321 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
322 (do_neon_compare): Make destination be an untyped bitfield.
323 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
324 (neon_mul_mac): Return early in case of errors.
325 (neon_move_immediate): Use first_error.
326 (neon_mac_reg_scalar_long): Fix type to include scalar.
327 (do_neon_dup): Likewise.
328 (do_neon_mov): Likewise (in several places).
329 (do_neon_tbl_tbx): Fix type.
330 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
331 (do_neon_ld_dup): Exit early in case of errors and/or use
333 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
334 Handle .dn/.qn directives.
335 (REGDEF): Add zero for reg_entry neon field.
337 2006-04-26 Julian Brown <julian@codesourcery.com>
339 * config/tc-arm.c (limits.h): Include.
340 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
341 (fpu_vfp_v3_or_neon_ext): Declare constants.
342 (neon_el_type): New enumeration of types for Neon vector elements.
343 (neon_type_el): New struct. Define type and size of a vector element.
344 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
346 (neon_type): Define struct. The type of an instruction.
347 (arm_it): Add 'vectype' for the current instruction.
348 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
349 (vfp_sp_reg_pos): Rename to...
350 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
352 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
353 (Neon D or Q register).
354 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
356 (GE_OPT_PREFIX_BIG): Define constant, for use in...
357 (my_get_expression): Allow above constant as argument to accept
358 64-bit constants with optional prefix.
359 (arm_reg_parse): Add extra argument to return the specific type of
360 register in when either a D or Q register (REG_TYPE_NDQ) is
361 requested. Can be NULL.
362 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
363 (parse_reg_list): Update for new arm_reg_parse args.
364 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
365 (parse_neon_el_struct_list): New function. Parse element/structure
366 register lists for VLD<n>/VST<n> instructions.
367 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
368 (s_arm_unwind_save_mmxwr): Likewise.
369 (s_arm_unwind_save_mmxwcg): Likewise.
370 (s_arm_unwind_movsp): Likewise.
371 (s_arm_unwind_setfp): Likewise.
372 (parse_big_immediate): New function. Parse an immediate, which may be
373 64 bits wide. Put results in inst.operands[i].
374 (parse_shift): Update for new arm_reg_parse args.
375 (parse_address): Likewise. Add parsing of alignment specifiers.
376 (parse_neon_mov): Parse the operands of a VMOV instruction.
377 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
378 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
379 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
380 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
381 (parse_operands): Handle new codes above.
382 (encode_arm_vfp_sp_reg): Rename to...
383 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
384 selected VFP version only supports D0-D15.
385 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
386 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
387 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
388 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
389 encode_arm_vfp_reg name, and allow 32 D regs.
390 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
391 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
393 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
394 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
395 constant-load and conversion insns introduced with VFPv3.
396 (neon_tab_entry): New struct.
397 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
398 those which are the targets of pseudo-instructions.
399 (neon_opc): Enumerate opcodes, use as indices into...
400 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
401 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
402 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
403 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
405 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
407 (neon_type_mask): New. Compact type representation for type checking.
408 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
409 permitted type combinations.
410 (N_IGNORE_TYPE): New macro.
411 (neon_check_shape): New function. Check an instruction shape for
412 multiple alternatives. Return the specific shape for the current
414 (neon_modify_type_size): New function. Modify a vector type and size,
415 depending on the bit mask in argument 1.
416 (neon_type_promote): New function. Convert a given "key" type (of an
417 operand) into the correct type for a different operand, based on a bit
419 (type_chk_of_el_type): New function. Convert a type and size into the
420 compact representation used for type checking.
421 (el_type_of_type_ckh): New function. Reverse of above (only when a
422 single bit is set in the bit mask).
423 (modify_types_allowed): New function. Alter a mask of allowed types
424 based on a bit mask of modifications.
425 (neon_check_type): New function. Check the type of the current
426 instruction against the variable argument list. The "key" type of the
427 instruction is returned.
428 (neon_dp_fixup): New function. Fill in and modify instruction bits for
429 a Neon data-processing instruction depending on whether we're in ARM
430 mode or Thumb-2 mode.
431 (neon_logbits): New function.
432 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
433 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
434 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
435 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
436 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
437 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
438 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
439 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
440 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
441 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
442 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
443 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
444 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
445 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
446 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
447 (neon_move_immediate, do_neon_mvn, neon_mixed_length)
448 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
449 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
450 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
451 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
452 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
453 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
454 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
455 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
456 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
458 (parse_neon_type): New function. Parse Neon type specifier.
459 (opcode_lookup): Allow parsing of Neon type specifiers.
460 (REGNUM2, REGSETH, REGSET2): New macros.
461 (reg_names): Add new VFPv3 and Neon registers.
462 (NUF, nUF, NCE, nCE): New macros for opcode table.
463 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
464 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
465 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
466 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
467 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
468 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
469 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
470 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
471 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
472 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
473 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
474 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
475 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
476 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
478 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
479 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
480 (arm_option_cpu_value): Add vfp3 and neon.
481 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
484 2006-04-25 Bob Wilson <bob.wilson@acm.org>
486 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
487 syntax instead of hardcoded opcodes with ".w18" suffixes.
488 (wide_branch_opcode): New.
489 (build_transition): Use it to check for wide branch opcodes with
490 either ".w18" or ".w15" suffixes.
492 2006-04-25 Bob Wilson <bob.wilson@acm.org>
494 * config/tc-xtensa.c (xtensa_create_literal_symbol,
495 xg_assemble_literal, xg_assemble_literal_space): Do not set the
496 frag's is_literal flag.
498 2006-04-25 Bob Wilson <bob.wilson@acm.org>
500 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
502 2006-04-23 Kazu Hirata <kazu@codesourcery.com>
504 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
505 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
506 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
507 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
508 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
510 2005-04-20 Paul Brook <paul@codesourcery.com>
512 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
514 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
516 2006-04-19 Alan Modra <amodra@bigpond.net.au>
518 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
519 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
520 Make some cpus unsupported on ELF. Run "make dep-am".
521 * Makefile.in: Regenerate.
523 2006-04-19 Alan Modra <amodra@bigpond.net.au>
525 * configure.in (--enable-targets): Indent help message.
526 * configure: Regenerate.
528 2006-04-18 H.J. Lu <hongjiu.lu@intel.com>
531 * config/tc-i386.c (i386_immediate): Check illegal immediate
534 2006-04-18 Alan Modra <amodra@bigpond.net.au>
536 * config/tc-i386.c: Formatting.
537 (output_disp, output_imm): ISO C90 params.
539 * frags.c (frag_offset_fixed_p): Constify args.
540 * frags.h (frag_offset_fixed_p): Ditto.
542 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
543 (COFF_MAGIC): Delete.
545 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
547 2006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
549 * po/POTFILES.in: Regenerated.
551 2006-04-16 Mark Mitchell <mark@codesourcery.com>
553 * doc/as.texinfo: Mention that some .type syntaxes are not
554 supported on all architectures.
556 2006-04-14 Sterling Augustine <sterling@tensilica.com>
558 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
559 instructions when such transformations have been disabled.
561 2006-04-10 Sterling Augustine <sterling@tensilica.com>
563 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
564 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
565 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
566 decoding the loop instructions. Remove current_offset variable.
567 (xtensa_fix_short_loop_frags): Likewise.
568 (min_bytes_to_other_loop_end): Remove current_offset argument.
570 2006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl>
572 * config/tc-z80.c (z80_optimize_expr): Removed.
573 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
575 2006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
577 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
578 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
579 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
580 atmega644, atmega329, atmega3290, atmega649, atmega6490,
581 atmega406, atmega640, atmega1280, atmega1281, at90can32,
582 at90can64, at90usb646, at90usb647, at90usb1286 and
584 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
586 2006-04-07 Paul Brook <paul@codesourcery.com>
588 * config/tc-arm.c (parse_operands): Set default error message.
590 2006-04-07 Paul Brook <paul@codesourcery.com>
592 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
594 2006-04-07 Paul Brook <paul@codesourcery.com>
596 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
598 2006-04-07 Paul Brook <paul@codesourcery.com>
600 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
601 (move_or_literal_pool): Handle Thumb-2 instructions.
602 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
604 2006-04-07 Alan Modra <amodra@bigpond.net.au>
607 * config/tc-i386.c (match_template): Move 64-bit operand tests
610 2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
612 * po/Make-in: Add install-html target.
613 * Makefile.am: Add install-html and install-html-recursive targets.
614 * Makefile.in: Regenerate.
615 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
616 * configure: Regenerate.
617 * doc/Makefile.am: Add install-html and install-html-am targets.
618 * doc/Makefile.in: Regenerate.
620 2006-04-06 Alan Modra <amodra@bigpond.net.au>
622 * frags.c (frag_offset_fixed_p): Reinitialise offset before
625 2006-04-05 Richard Sandiford <richard@codesourcery.com>
626 Daniel Jacobowitz <dan@codesourcery.com>
628 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
629 (GOTT_BASE, GOTT_INDEX): New.
630 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
631 GOTT_INDEX when generating VxWorks PIC.
632 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
633 use the generic *-*-vxworks* stanza instead.
635 2006-04-04 Alan Modra <amodra@bigpond.net.au>
638 * frags.c (frag_offset_fixed_p): New function.
639 * frags.h (frag_offset_fixed_p): Declare.
640 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
641 (resolve_expression): Likewise.
643 2006-04-03 Sterling Augustine <sterling@tensilica.com>
645 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
646 of the same length but different numbers of slots.
648 2006-03-30 Andreas Schwab <schwab@suse.de>
650 * configure.in: Fix help string for --enable-targets option.
651 * configure: Regenerate.
653 2006-03-28 Nathan Sidwell <nathan@codesourcery.com>
655 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
656 (m68k_ip): ... here. Use for all chips. Protect against buffer
657 overrun and avoid excessive copying.
659 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
660 m68020_control_regs, m68040_control_regs, m68060_control_regs,
661 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
662 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
663 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
664 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
665 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
666 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
667 mcf5282_ctrl, mcfv4e_ctrl): ... these.
668 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
669 (struct m68k_cpu): Change chip field to control_regs.
670 (current_chip): Remove.
672 (m68k_archs, m68k_extensions): Adjust.
673 (m68k_cpus): Reorder to be in cpu number order. Adjust.
674 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
675 (find_cf_chip): Reimplement for new organization of cpu table.
676 (select_control_regs): Remove.
678 (struct save_opts): Save control regs, not chip.
679 (s_save, s_restore): Adjust.
680 (m68k_lookup_cpu): Give deprecated warning when necessary.
681 (m68k_init_arch): Adjust.
682 (md_show_usage): Adjust for new cpu table organization.
684 2006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
686 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
687 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
688 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
690 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
691 (any_gotrel): New rule.
692 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
693 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
695 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
696 (bfin_pic_ptr): New function.
697 (md_pseudo_table): Add it for ".picptr".
698 (OPTION_FDPIC): New macro.
699 (md_longopts): Add -mfdpic.
700 (md_parse_option): Handle it.
701 (md_begin): Set BFD flags.
702 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
703 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
705 * Makefile.am (bfin-parse.o): Update dependencies.
706 (DEPTC_bfin_elf): Likewise.
707 * Makefile.in: Regenerate.
709 2006-03-25 Richard Sandiford <richard@codesourcery.com>
711 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
712 mcfemac instead of mcfmac.
714 2006-03-23 Michael Matz <matz@suse.de>
716 * config/tc-i386.c (type_names): Correct placement of 'static'.
717 (reloc): Map some more relocs to their 64 bit counterpart when
719 (output_insn): Work around breakage if DEBUG386 is defined.
720 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
721 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
722 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
725 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
727 (md_convert_frag): Jumps can now be larger than 2GB away, error
729 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
730 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
732 2006-03-22 Richard Sandiford <richard@codesourcery.com>
733 Daniel Jacobowitz <dan@codesourcery.com>
734 Phil Edwards <phil@codesourcery.com>
735 Zack Weinberg <zack@codesourcery.com>
736 Mark Mitchell <mark@codesourcery.com>
737 Nathan Sidwell <nathan@codesourcery.com>
739 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
740 (md_begin): Complain about -G being used for PIC. Don't change
741 the text, data and bss alignments on VxWorks.
742 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
743 generating VxWorks PIC.
744 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
745 (macro): Likewise, but do not treat la $25 specially for
746 VxWorks PIC, and do not handle jal.
747 (OPTION_MVXWORKS_PIC): New macro.
748 (md_longopts): Add -mvxworks-pic.
749 (md_parse_option): Don't complain about using PIC and -G together here.
750 Handle OPTION_MVXWORKS_PIC.
751 (md_estimate_size_before_relax): Always use the first relaxation
753 * config/tc-mips.h (VXWORKS_PIC): New.
755 2006-03-21 Paul Brook <paul@codesourcery.com>
757 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
759 2006-03-21 Sterling Augustine <sterling@tensilica.com>
761 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
762 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
763 (get_loop_align_size): New.
764 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
765 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
766 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
767 (get_noop_aligned_address): Use get_loop_align_size.
768 (get_aligned_diff): Likewise.
770 2006-03-21 Paul Brook <paul@codesourcery.com>
772 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
774 2006-03-20 Paul Brook <paul@codesourcery.com>
776 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
777 (do_t_branch): Encode branches inside IT blocks as unconditional.
778 (do_t_cps): New function.
779 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
780 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
781 (opcode_lookup): Allow conditional suffixes on all instructions in
783 (md_assemble): Advance condexec state before checking for errors.
784 (insns): Use do_t_cps.
786 2006-03-20 Paul Brook <paul@codesourcery.com>
788 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
791 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
793 * config/tc-vax.c: Update copyright year.
794 * config/tc-vax.h: Likewise.
796 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
798 * config/tc-vax.c (md_chars_to_number): Used only locally, so
800 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
802 2006-03-17 Paul Brook <paul@codesourcery.com>
804 * config/tc-arm.c (insns): Add ldm and stm.
806 2006-03-17 Ben Elliston <bje@au.ibm.com>
809 * doc/as.texinfo (Ident): Document this directive more thoroughly.
811 2006-03-16 Paul Brook <paul@codesourcery.com>
813 * config/tc-arm.c (insns): Add "svc".
815 2006-03-13 Bob Wilson <bob.wilson@acm.org>
817 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
818 flag and avoid double underscore prefixes.
820 2006-03-10 Paul Brook <paul@codesourcery.com>
822 * config/tc-arm.c (md_begin): Handle EABIv5.
823 (arm_eabis): Add EF_ARM_EABI_VER5.
824 * doc/c-arm.texi: Document -meabi=5.
826 2006-03-10 Ben Elliston <bje@au.ibm.com>
828 * app.c (do_scrub_chars): Simplify string handling.
830 2006-03-07 Richard Sandiford <richard@codesourcery.com>
831 Daniel Jacobowitz <dan@codesourcery.com>
832 Zack Weinberg <zack@codesourcery.com>
833 Nathan Sidwell <nathan@codesourcery.com>
834 Paul Brook <paul@codesourcery.com>
835 Ricardo Anguiano <anguiano@codesourcery.com>
836 Phil Edwards <phil@codesourcery.com>
838 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
839 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
841 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
842 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
843 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
845 2006-03-06 Bob Wilson <bob.wilson@acm.org>
847 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
848 even when using the text-section-literals option.
850 2006-03-06 Nathan Sidwell <nathan@codesourcery.com>
852 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
854 (m68k_ip): <case 'J'> Check we have some control regs.
855 (md_parse_option): Allow raw arch switch.
856 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
857 whether 68881 or cfloat was meant by -mfloat.
858 (md_show_usage): Adjust extension display.
859 (m68k_elf_final_processing): Adjust.
861 2006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
863 * config/tc-avr.c (avr_mod_hash_value): New function.
864 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
865 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
866 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
867 instead of int avr_ldi_expression: use avr_mod_hash_value instead
869 (tc_gen_reloc): Handle substractions of symbols, if possible do
870 fixups, abort otherwise.
871 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
872 tc_fix_adjustable): Define.
874 2006-03-02 James E Wilson <wilson@specifix.com>
876 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
877 change the template, then clear md.slot[curr].end_of_insn_group.
879 2006-02-28 Jan Beulich <jbeulich@novell.com>
881 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
883 2006-02-28 Jan Beulich <jbeulich@novell.com>
886 * macro.c (getstring): Don't treat parentheses special anymore.
887 (get_any_string): Don't consider '(' and ')' as quoting anymore.
888 Special-case '(', ')', '[', and ']' when dealing with non-quoting
891 2006-02-28 Mat <mat@csail.mit.edu>
893 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
895 2006-02-27 Jakub Jelinek <jakub@redhat.com>
897 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
899 (CFI_signal_frame): Define.
900 (cfi_pseudo_table): Add .cfi_signal_frame.
901 (dot_cfi): Handle CFI_signal_frame.
902 (output_cie): Handle cie->signal_frame.
903 (select_cie_for_fde): Don't share CIE if signal_frame flag is
904 different. Copy signal_frame from FDE to newly created CIE.
905 * doc/as.texinfo: Document .cfi_signal_frame.
907 2006-02-27 Carlos O'Donell <carlos@codesourcery.com>
909 * doc/Makefile.am: Add html target.
910 * doc/Makefile.in: Regenerate.
911 * po/Make-in: Add html target.
913 2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
915 * config/tc-i386.c (output_insn): Support Intel Merom New
918 * config/tc-i386.h (CpuMNI): New.
919 (CpuUnknownFlags): Add CpuMNI.
921 2006-02-24 David S. Miller <davem@sunset.davemloft.net>
923 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
924 (hpriv_reg_table): New table for hyperprivileged registers.
925 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
928 2006-02-24 DJ Delorie <dj@redhat.com>
930 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
931 (tc_gen_reloc): Don't define.
932 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
933 (OPTION_LINKRELAX): New.
934 (md_longopts): Add it.
936 (md_parse_options): Set it.
937 (md_assemble): Emit relaxation relocs as needed.
938 (md_convert_frag): Emit relaxation relocs as needed.
939 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
940 (m32c_apply_fix): New.
942 (m32c_force_relocation): Force out jump relocs when relaxing.
943 (m32c_fix_adjustable): Return false if relaxing.
945 2006-02-24 Paul Brook <paul@codesourcery.com>
947 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
948 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
949 (struct asm_barrier_opt): Define.
950 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
951 (parse_psr): Accept V7M psr names.
952 (parse_barrier): New function.
953 (enum operand_parse_code): Add OP_oBARRIER.
954 (parse_operands): Implement OP_oBARRIER.
955 (do_barrier): New function.
956 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
957 (do_t_cpsi): Add V7M restrictions.
958 (do_t_mrs, do_t_msr): Validate V7M variants.
959 (md_assemble): Check for NULL variants.
960 (v7m_psrs, barrier_opt_names): New tables.
961 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
962 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
963 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
964 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
965 (struct cpu_arch_ver_table): Define.
967 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
968 Tag_CPU_arch_profile.
969 * doc/c-arm.texi: Document new cpu and arch options.
971 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
973 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
975 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
977 * config/tc-ia64.c: Update copyright years.
979 2006-02-22 H.J. Lu <hongjiu.lu@intel.com>
981 * config/tc-ia64.c (specify_resource): Add the rule 17 from
984 2005-02-22 Paul Brook <paul@codesourcery.com>
986 * config/tc-arm.c (do_pld): Remove incorrect write to
988 (encode_thumb32_addr_mode): Use correct operand.
990 2006-02-21 Paul Brook <paul@codesourcery.com>
992 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
994 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
995 Anil Paranjape <anilp1@kpitcummins.com>
996 Shilin Shakti <shilins@kpitcummins.com>
998 * Makefile.am: Add xc16x related entry.
999 * Makefile.in: Regenerate.
1000 * configure.in: Added xc16x related entry.
1001 * configure: Regenerate.
1002 * config/tc-xc16x.h: New file
1003 * config/tc-xc16x.c: New file
1004 * doc/c-xc16x.texi: New file for xc16x
1005 * doc/all.texi: Entry for xc16x
1006 * doc/Makefile.texi: Added c-xc16x.texi
1007 * NEWS: Announce the support for the new target.
1009 2006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
1011 * configure.tgt: set emulation for mips-*-netbsd*
1013 2006-02-14 Jakub Jelinek <jakub@redhat.com>
1015 * config.in: Rebuilt.
1017 2006-02-13 Bob Wilson <bob.wilson@acm.org>
1019 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
1020 from 1, not 0, in error messages.
1021 (md_assemble): Simplify special-case check for ENTRY instructions.
1022 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
1023 operand in error message.
1025 2006-02-13 Joseph S. Myers <joseph@codesourcery.com>
1027 * configure.tgt (arm-*-linux-gnueabi*): Change to
1030 2006-02-10 Nick Clifton <nickc@redhat.com>
1032 * config/tc-crx.c (check_range): Ensure that the sign bit of a
1033 32-bit value is propagated into the upper bits of a 64-bit long.
1035 * config/tc-arc.c (init_opcode_tables): Fix cast.
1036 (arc_extoper, md_operand): Likewise.
1038 2006-02-09 David Heine <dlheine@tensilica.com>
1040 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
1041 each relaxation step.
1043 2006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
1045 * configure.in (CHECK_DECLS): Add vsnprintf.
1046 * configure: Regenerate.
1047 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
1048 include/declare here, but...
1049 * as.h: Move code detecting VARARGS idiom to the top.
1050 (errno.h, stdarg.h, varargs.h, va_list): ...here.
1051 (vsnprintf): Declare if not already declared.
1053 2006-02-08 H.J. Lu <hongjiu.lu@intel.com>
1055 * as.c (close_output_file): New.
1056 (main): Register close_output_file with xatexit before
1057 dump_statistics. Don't call output_file_close.
1059 2006-02-07 Nathan Sidwell <nathan@codesourcery.com>
1061 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
1062 mcf5329_control_regs): New.
1063 (not_current_architecture, selected_arch, selected_cpu): New.
1064 (m68k_archs, m68k_extensions): New.
1065 (archs): Renamed to ...
1066 (m68k_cpus): ... here. Adjust.
1068 (md_pseudo_table): Add arch and cpu directives.
1069 (find_cf_chip, m68k_ip): Adjust table scanning.
1070 (no_68851, no_68881): Remove.
1071 (md_assemble): Lazily initialize.
1072 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
1073 (md_init_after_args): Move functionality to m68k_init_arch.
1074 (mri_chip): Adjust table scanning.
1075 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
1076 options with saner parsing.
1077 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
1078 m68k_init_arch): New.
1079 (s_m68k_cpu, s_m68k_arch): New.
1080 (md_show_usage): Adjust.
1081 (m68k_elf_final_processing): Set CF EF flags.
1082 * config/tc-m68k.h (m68k_init_after_args): Remove.
1083 (tc_init_after_args): Remove.
1084 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
1085 (M68k-Directives): Document .arch and .cpu directives.
1087 2006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl>
1089 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
1090 synonyms for equ and defl.
1091 (z80_cons_fix_new): New function.
1092 (emit_byte): Disallow relative jumps to absolute locations.
1093 (emit_data): Only handle defb, prototype changed, because defb is
1094 now handled as pseudo-op rather than an instruction.
1095 (instab): Entries for defb,defw,db,dw moved from here...
1096 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
1097 Add entries for def24,def32,d24,d32.
1098 (md_assemble): Improved error handling.
1099 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
1100 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
1101 (z80_cons_fix_new): Declare.
1102 * doc/c-z80.texi (defb, db): Mention warning on overflow.
1103 (def24,d24,def32,d32): New pseudo-ops.
1105 2006-02-02 Paul Brook <paul@codesourcery.com>
1107 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
1109 2005-02-02 Paul Brook <paul@codesourcery.com>
1111 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
1112 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
1113 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
1114 T2_OPCODE_RSB): Define.
1115 (thumb32_negate_data_op): New function.
1116 (md_apply_fix): Use it.
1118 2006-01-31 Bob Wilson <bob.wilson@acm.org>
1120 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
1122 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
1123 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
1125 (relaxation_requirements): Add pfinish_frag argument and use it to
1126 replace setting tinsn->record_fix fields.
1127 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
1128 and vinsn_to_insnbuf. Remove references to record_fix and
1129 slot_sub_symbols fields.
1130 (xtensa_mark_narrow_branches): Delete unused code.
1131 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
1133 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
1135 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
1136 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
1137 of the record_fix field. Simplify error messages for unexpected
1139 (set_expr_symbol_offset_diff): Delete.
1141 2006-01-31 Paul Brook <paul@codesourcery.com>
1143 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
1145 2006-01-31 Paul Brook <paul@codesourcery.com>
1146 Richard Earnshaw <rearnsha@arm.com>
1148 * config/tc-arm.c: Use arm_feature_set.
1149 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
1150 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
1151 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
1154 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
1155 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
1156 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
1157 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
1159 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
1160 (arm_opts): Move old cpu/arch options from here...
1161 (arm_legacy_opts): ... to here.
1162 (md_parse_option): Search arm_legacy_opts.
1163 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
1164 (arm_float_abis, arm_eabis): Make const.
1166 2006-01-25 Bob Wilson <bob.wilson@acm.org>
1168 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
1170 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1172 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
1173 in load immediate intruction.
1175 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1177 * config/bfin-parse.y (value_match): Use correct conversion
1178 specifications in template string for __FILE__ and __LINE__.
1182 2006-01-18 Alexandre Oliva <aoliva@redhat.com>
1184 Introduce TLS descriptors for i386 and x86_64.
1185 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
1186 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
1187 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
1188 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
1189 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
1191 (build_modrm_byte): Set up zero modrm for TLS desc calls.
1192 (lex_got): Handle @tlsdesc and @tlscall.
1193 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
1195 2006-01-11 Nick Clifton <nickc@redhat.com>
1197 Fixes for building on 64-bit hosts:
1198 * config/tc-avr.c (mod_index): New union to allow conversion
1199 between pointers and integers.
1200 (md_begin, avr_ldi_expression): Use it.
1201 * config/tc-i370.c (md_assemble): Add cast for argument to print
1203 * config/tc-tic54x.c (subsym_substitute): Likewise.
1204 * config/tc-mn10200.c (md_assemble): Use a union to convert the
1205 opindex field of fr_cgen structure into a pointer so that it can
1206 be stored in a frag.
1207 * config/tc-mn10300.c (md_assemble): Likewise.
1208 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
1210 * config/tc-v850.c: Replace uses of (int) casts with correct
1213 2006-01-09 H.J. Lu <hongjiu.lu@intel.com>
1216 * symbols.c (snapshot_symbol): Don't change a defined symbol.
1218 2006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
1221 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
1222 a local-label reference.
1224 For older changes see ChangeLog-2005
1230 version-control: never