gas/ChangeLog

   1 2006-06-02  Joseph S. Myers  <joseph@codesourcery.com>
   2
   3         * doc/Makefile.am (TEXI2DVI): Define.
   4         * doc/Makefile.in: Regenerate.
   5         * doc/c-arc.texi: Fix typo.
   6
   7 2006-06-01  Alan Modra  <amodra@bigpond.net.au>
   8
   9         * config/obj-ieee.c: Delete.
  10         * config/obj-ieee.h: Delete.
  11         * Makefile.am (OBJ_FORMATS): Remove ieee.
  12         (OBJ_FORMAT_CFILES, OBJ_FORMAT_HFILES): Similarly.
  13         (obj-ieee.o): Remove rule.
  14         * Makefile.in: Regenerate.
  15         * configure.in (atof): Remove tahoe.
  16         (OBJ_MAYBE_IEEE): Don't define.
  17         * configure: Regenerate.
  18         * config.in: Regenerate.
  19         * doc/Makefile.in: Regenerate.
  20         * po/POTFILES.in: Regenerate.
  21
  22 2006-05-31  Daniel Jacobowitz  <dan@codesourcery.com>
  23
  24         * Makefile.am: Replace INTLLIBS and INTLDEPS with LIBINTL
  25         and LIBINTL_DEP everywhere.
  26         (INTLLIBS): Remove.
  27         (INCLUDES, DEP_INCLUDES): Use @INCINTL@.
  28         * acinclude.m4: Include new gettext macros.
  29         * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
  30         Remove local code for po/Makefile.
  31         * Makefile.in, configure, doc/Makefile.in: Regenerated.
  32
  33 2006-05-30  Nick Clifton  <nickc@redhat.com>
  34
  35         * po/es.po: Updated Spanish translation.
  36
  37 2006-05-06  Denis Chertykov  <denisc@overta.ru>
  38
  39         * doc/c-avr.texi: New file.
  40         * doc/Makefile.am (CPU_DOCS): Add c-avr.texi
  41         * doc/all.texi: Set AVR
  42         * doc/as.texinfo: Include c-avr.texi
  43
  44 2006-05-28  Jie Zhang  <jie.zhang@analog.com>
  45
  46         * config/bfin-parse.y (check_macfunc): Loose the condition of
  47         calling check_multiply_halfregs ().
  48
  49 2006-05-25  Jie Zhang  <jie.zhang@analog.com>
  50
  51         * config/bfin-parse.y (asm_1): Better check and deal with
  52         vector and scalar Multiply 16-Bit Operands instructions.
  53
  54 2006-05-24  Nick Clifton  <nickc@redhat.com>
  55
  56         * config/tc-hppa.c: Convert to ISO C90 format.
  57         * config/tc-hppa.h: Likewise.
  58
  59 2006-05-24  Carlos O'Donell  <carlos@systemhalted.org>
  60             Randolph Chung  <randolph@tausq.org>
  61
  62         * config/tc-hppa.c (is_tls_gdidx, is_tls_ldidx, is_tls_dtpoff,
  63         is_tls_ieoff, is_tls_leoff): Define.
  64         (fix_new_hppa): Handle TLS.
  65         (cons_fix_new_hppa): Likewise.
  66         (pa_ip): Likewise.
  67         (md_apply_fix): Handle TLS relocs.
  68         * config/tc-hppa.h (hppa_fix_adjustable): Handle TLS.
  69
  70 2006-05-24  Bjoern Haase  <bjoern.m.haase@web.de>
  71
  72         * config/tc-avr.c: Add new cpu targets avr6, avr2560 and avr2561.
  73
  74 2006-05-23  Thiemo Seufer  <ths@mips.com>
  75             David Ung  <davidu@mips.com>
  76             Nigel Stephens  <nigel@mips.com>
  77
  78         [ gas/ChangeLog ]
  79         * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS): Rename.
  80         (ISA_SUPPORTS_DSP_ASE, ISA_SUPPORTS_MT_ASE, ISA_HAS_64BIT_FPRS,
  81         ISA_HAS_MXHC1): New macros.
  82         (HAVE_32BIT_FPRS): Use ISA_HAS_64BIT_FPRS instead of
  83         ISA_HAS_64BIT_REGS.  Formatting fixes.  Improved comments.
  84         (mips_cpu_info): Change to use combined ASE/IS_ISA flag.
  85         (MIPS_CPU_IS_ISA, MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP,
  86         MIPS_CPU_ASE_MT, MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX): New defines.
  87         (mips_after_parse_args): Change default handling of float register
  88         size to account for 32bit code with 64bit FP. Better sanity checking
  89         of ISA/ASE/ABI option combinations.
  90         (s_mipsset): Support switching of GPR and FPR sizes via
  91         .set {g,f}p={32,64,default}. Better sanity checking for .set ASE
  92         options.
  93         (mips_elf_final_processing): We should record the use of 64bit FP
  94         registers in 32bit code but we don't, because ELF header flags are
  95         a scarce ressource.
  96         (mips_cpu_info_table): Add ASE flags for CPUs with mandatory ASE
  97         extensions. Add 4ksc, 4kec, 4kem, 4kep, 4ksd, m4kp, 24kec, 24kef,
  98         24kex, 34kc, 34kf, 34kx, 25kf CPU definitions.
  99         (mips_cpu_info_from_isa): Use MIPS_CPU_IS_ISA.
 100         * doc/c-mips.texi: Document .set {g,f}p={32,64,default}. Document
 101         missing -march options. Document .set arch=CPU. Move .set smartmips
 102         to ASE page. Use @code for .set FOO examples.
 103
 104 2006-05-23  Jie Zhang  <jie.zhang@analog.com>
 105
 106         * config/tc-bfin.c (bfin_start_line_hook): Bump line counters
 107         if needed.
 108
 109 2006-05-23  Jie Zhang  <jie.zhang@analog.com>
 110
 111         * config/bfin-defs.h (bfin_equals): Remove declaration.
 112         * config/bfin-parse.y (asm_1): Remove "expr ASSIGN expr".
 113         * config/tc-bfin.c (bfin_name_is_register): Remove.
 114         (bfin_equals): Remove.
 115         * config/tc-bfin.h (TC_EQUAL_IN_INSN): Redefine as 1.
 116         (bfin_name_is_register): Remove declaration.
 117
 118 2006-05-19  Thiemo Seufer  <ths@mips.com>
 119             Nigel Stephens  <nigel@mips.com>
 120
 121         * config/tc-mipc.c (ISA_HAS_ODD_SINGLE_FPR): New define.
 122         (mips_oddfpreg_ok): New function.
 123         (mips_ip): Use it.
 124
 125 2006-05-19  Thiemo Seufer  <ths@mips.com>
 126             David Ung  <davidu@mips.com>
 127
 128         * config/tc-mips.h (tc_mips_regname_to_dw2regnum): Declare.
 129         * config/tc-mipc.c (ABI_NEEDS_64BIT_REGS, ISA_HAS_64BIT_REGS,
 130         ISA_HAS_DROR, ISA_HAS_ROR): Reformat.
 131         (regname, RTYPE_MASK, RTYPE_NUM, RTYPE_FPU, RTYPE_FCC, RTYPE_VEC,
 132         RTYPE_GP, RTYPE_CP0, RTYPE_PC, RTYPE_ACC, RTYPE_CCC, RNUM_MASK,
 133         RWARN, GENERIC_REGISTER_NUMBERS, FPU_REGISTER_NAMES,
 134         FPU_CONDITION_CODE_NAMES, COPROC_CONDITION_CODE_NAMES,
 135         N32N64_SYMBOLIC_REGISTER_NAMES, O32_SYMBOLIC_REGISTER_NAMES,
 136         SYMBOLIC_REGISTER_NAMES, MIPS16_SPECIAL_REGISTER_NAMES,
 137         MDMX_VECTOR_REGISTER_NAMES, MIPS_DSP_ACCUMULATOR_NAMES, reg_names,
 138         reg_names_o32, reg_names_n32n64): Define register classes.
 139         (reg_lookup): New function, use register classes.
 140         (md_begin): Reserve register names in the symbol table. Simplify
 141         OBJ_ELF defines.
 142         (mips_ip): Fix comment formatting. Handle symbolic COP0 registers.
 143         Use reg_lookup.
 144         (mips16_ip): Use reg_lookup.
 145         (tc_get_register): Likewise.
 146         (tc_mips_regname_to_dw2regnum): New function.
 147
 148 2006-05-19  Thiemo Seufer  <ths@mips.com>
 149
 150         * config/tc-arm.c, config/tc-arm.h (tc_arm_regname_to_dw2regnum):
 151         Un-constify string argument.
 152         * config/tc-i386.c, config/tc-i386.h (tc_x86_regname_to_dw2regnum):
 153         Likewise.
 154         * config/tc-m68k.c, config/tc-m68k.h (tc_m68k_regname_to_dw2regnum):
 155         Likewise.
 156         * config/tc-ppc.c, config/tc-ppc.h (tc_ppc_regname_to_dw2regnum):
 157         Likewise.
 158         * config/tc-s390.c, config/tc-s390.h (tc_s390_regname_to_dw2regnum):
 159         Likewise.
 160         * config/tc-sh.c, config/tc-sh.h (sh_regname_to_dw2regnum):
 161         Likewise.
 162         * config/tc-sparc.c, config/tc-sparc.h (sparc_regname_to_dw2regnum):
 163         Likewise.
 164
 165 2006-05-19  Nathan Sidwell  <nathan@codesourcery.com>
 166
 167         * gas/config/tc-m68k.c (m68k_init_arch): Move checking of
 168         cfloat/m68881 to correct architecture before using it.
 169
 170 2006-05-16  Bjoern Haase  <bjoern.m.haase@web.de>
 171
 172         * config/tc-avr.h (TC_VALIDATE_FIX): Allow fixups for immediate
 173         constant values.
 174
 175 2006-05-15  Paul Brook  <paul@codesourcery.com>
 176
 177         * config/tc-arm.c (arm_adjust_symtab): Use
 178         bfd_is_arm_special_symbol_name.
 179
 180 2006-05-15  Bob Wilson  <bob.wilson@acm.org>
 181
 182         * config/tc-xtensa.c (is_direct_call_opcode, is_branch_jmp_to_next,
 183         xg_assemble_vliw_tokens, xtensa_mark_narrow_branches,
 184         xtensa_fix_short_loop_frags, is_local_forward_loop, relax_frag_immed):
 185         Handle errors from calls to xtensa_opcode_is_* functions.
 186
 187 2006-05-14  Thiemo Seufer  <ths@mips.com>
 188
 189         * config/tc-mips.c (macro_build): Test for currently active
 190         mips16 option.
 191         (mips16_ip): Reject invalid opcodes.
 192
 193 2006-05-11  Carlos O'Donell  <carlos@codesourcery.com>
 194
 195         * doc/as.texinfo: Rename "Index" to "AS Index",
 196         and "ABORT" to "ABORT (COFF)".
 197
 198 2006-05-11  Paul Brook  <paul@codesourcery.com>
 199
 200         * config/tc-arm.c (parse_half): New function.
 201         (operand_parse_code): Remove OP_Iffff.  Add OP_HALF.
 202         (parse_operands): Ditto.
 203         (do_mov16): Reject invalid relocations.
 204         (do_t_mov16): Ditto.  Use Thumb reloc numbers.
 205         (insns): Replace Iffff with HALF.
 206         (md_apply_fix): Add MOVW and MOVT relocs.
 207         (tc_gen_reloc): Ditto.
 208         * doc/c-arm.texi: Document relocation operators
 209
 210 2006-05-11  Paul Brook  <paul@codesourcery.com>
 211
 212         * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
 213
 214 2006-05-11  Thiemo Seufer  <ths@mips.com>
 215
 216         * config/tc-mips.c (append_insn): Don't check the range of j or
 217         jal addresses.
 218
 219 2006-05-11  Pedro Alves  <pedro_alves@portugalmail.pt>
 220
 221         * config/tc-arm.c (md_pcrel_from_section): Force a bias for
 222         relocs against external symbols for WinCE targets.
 223         (md_apply_fix): Likewise.
 224
 225 2006-05-09  David Ung  <davidu@mips.com>
 226
 227         * config/tc-mips.c (append_insn): Only warn about an out-of-range
 228         j or jal address.
 229
 230 2006-05-09  Nick Clifton  <nickc@redhat.com>
 231
 232         * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups
 233         against symbols which are not going to be placed into the symbol
 234         table.
 235
 236 2006-05-09  Ben Elliston  <bje@au.ibm.com>
 237
 238         * expr.c (operand): Remove `if (0 && ..)' statement and
 239         subsequently unused target_op label.  Collapse `if (1 || ..)'
 240         statement.
 241         * app.c (do_scrub_chars): Remove unused case 0, as it is handled
 242         separately above the switch.
 243
 244 2006-05-08  Nick Clifton  <nickc@redhat.com>
 245
 246         PR gas/2623
 247         * config/tc-msp430.c (line_separator_character): Define as |.
 248
 249 2006-05-08  Thiemo Seufer  <ths@mips.com>
 250             Nigel Stephens  <nigel@mips.com>
 251             David Ung  <davidu@mips.com>
 252
 253         * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
 254         (mips_opts): Likewise.
 255         (file_ase_smartmips): New variable.
 256         (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
 257         (macro_build): Handle SmartMIPS instructions.
 258         (mips_ip): Likewise.
 259         (md_longopts): Add argument handling for smartmips.
 260         (md_parse_options, mips_after_parse_args): Likewise.
 261         (s_mipsset): Add .set smartmips support.
 262         (md_show_usage): Document -msmartmips/-mno-smartmips.
 263         * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
 264         .set smartmips.
 265         * doc/c-mips.texi: Likewise.
 266
 267 2006-05-08  Alan Modra  <amodra@bigpond.net.au>
 268
 269         * write.c (relax_segment): Add pass count arg.  Don't error on
 270         negative org/space on first two passes.
 271         (relax_seg_info): New struct.
 272         (relax_seg, write_object_file): Adjust.
 273         * write.h (relax_segment): Update prototype.
 274
 275 2006-05-05  Julian Brown  <julian@codesourcery.com>
 276
 277         * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
 278         checking.
 279         (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
 280         architecture version checks.
 281         (insns): Allow overlapping instructions to be used in VFP mode.
 282
 283 2006-05-05  H.J. Lu  <hongjiu.lu@intel.com>
 284
 285         PR gas/2598
 286         * config/obj-elf.c (obj_elf_change_section): Allow user
 287         specified SHF_ALPHA_GPREL.
 288
 289 2006-05-05  Bjoern Haase  <bjoern.m.haase@web.de>
 290
 291         * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define.  Disable fixups
 292         for PMEM related expressions.
 293
 294 2006-05-05  Nick Clifton  <nickc@redhat.com>
 295
 296         PR gas/2582
 297         * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro.  Handles the
 298         insertion of a directory separator character into a string at a
 299         given offset.  Uses heuristics to decide when to use a backslash
 300         character rather than a forward-slash character.
 301         (dwarf2_directive_loc): Use the macro.
 302         (out_debug_info): Likewise.
 303
 304 2006-05-05  Thiemo Seufer  <ths@mips.com>
 305             David Ung  <davidu@mips.com>
 306
 307         * config/tc-mips.c (macro_build): Add case 'k' to handle cache
 308         instruction.
 309         (macro): Add new case M_CACHE_AB.
 310
 311 2006-05-04  Kazu Hirata  <kazu@codesourcery.com>
 312
 313         * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
 314         (opcode_lookup): Issue a warning for opcode with
 315         OT_cinfix3_deprecated.  Otherwise treat OT_cinfix3_deprecated
 316         identical to OT_cinfix3.
 317         (TxC3w, TC3w, tC3w): New.
 318         (insns): Use tC3w and TC3w for comparison instructions with
 319         's' suffix.
 320
 321 2006-05-04  Alan Modra  <amodra@bigpond.net.au>
 322
 323         * subsegs.h (struct frchain): Delete frch_seg.
 324         (frchain_root): Delete.
 325         (seg_info): Define as macro.
 326         * subsegs.c (frchain_root): Delete.
 327         (abs_seg_info, und_seg_info, absolute_frchain): Delete.
 328         (subsegs_begin, subseg_change): Adjust for above.
 329         (subseg_set_rest): Likewise.  Add new frchain structs to seginfo
 330         rather than to one big list.
 331         (subseg_get): Don't special case abs, und sections.
 332         (subseg_new, subseg_force_new): Don't set frchainP here.
 333         (seg_info): Delete.
 334         (subsegs_print_statistics): Adjust frag chain control list traversal.
 335         * debug.c (dmp_frags):  Likewise.
 336         * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
 337         at frchain_root.  Make use of known frchain ordering.
 338         (last_frag_for_seg): Likewise.
 339         (get_frag_fix): Likewise.  Add seg param.
 340         (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
 341         * write.c (chain_frchains_together_1): Adjust for struct frchain.
 342         (SUB_SEGMENT_ALIGN): Likewise.
 343         (subsegs_finish): Adjust frchain list traversal.
 344         * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
 345         (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
 346         (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
 347         (xtensa_fix_b_j_loop_end_frags): Likewise.
 348         (xtensa_fix_close_loop_end_frags): Likewise.
 349         (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
 350         (retrieve_segment_info): Delete frch_seg initialisation.
 351
 352 2006-05-03  Alan Modra  <amodra@bigpond.net.au>
 353
 354         * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
 355         * config/obj-elf.h (obj_sec_set_private_data): Delete.
 356         * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
 357         * config/tc-mn10300.c (tc_gen_reloc): Likewise.
 358
 359 2006-05-02  Joseph Myers  <joseph@codesourcery.com>
 360
 361         * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
 362         here.
 363         (md_apply_fix3): Multiply offset by 4 here for
 364         BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
 365
 366 2006-05-02  H.J. Lu  <hongjiu.lu@intel.com>
 367             Jan Beulich  <jbeulich@novell.com>
 368
 369         * config/tc-i386.c (output_invalid_buf): Change size for
 370         unsigned char.
 371         * config/tc-tic30.c (output_invalid_buf): Likewise.
 372
 373         * config/tc-i386.c (output_invalid): Cast none-ascii char to
 374         unsigned char.
 375         * config/tc-tic30.c (output_invalid): Likewise.
 376
 377 2006-05-02  Daniel Jacobowitz  <dan@codesourcery.com>
 378
 379         * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
 380         (TEXI2POD): Use AM_MAKEINFOFLAGS.
 381         (asconfig.texi): Don't set top_srcdir.
 382         * doc/as.texinfo: Don't use top_srcdir.
 383         * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
 384
 385 2006-05-02  H.J. Lu  <hongjiu.lu@intel.com>
 386
 387         * config/tc-i386.c (output_invalid_buf): Change size to 16.
 388         * config/tc-tic30.c (output_invalid_buf): Likewise.
 389
 390         * config/tc-i386.c (output_invalid): Use snprintf instead of
 391         sprintf.
 392         * config/tc-ia64.c (declare_register_set): Likewise.
 393         (emit_one_bundle): Likewise.
 394         (check_dependencies): Likewise.
 395         * config/tc-tic30.c (output_invalid): Likewise.
 396
 397 2006-05-02  Paul Brook  <paul@codesourcery.com>
 398
 399         * config/tc-arm.c (arm_optimize_expr): New function.
 400         * config/tc-arm.h (md_optimize_expr): Define
 401         (arm_optimize_expr): Add prototype.
 402         (TC_FORCE_RELOCATION_SUB_SAME): Define.
 403
 404 2006-05-02  Ben Elliston  <bje@au.ibm.com>
 405
 406         * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
 407         field unsigned.
 408
 409         * sb.h (sb_list_vector): Move to sb.c.
 410         * sb.c (free_list): Use type of sb_list_vector directly.
 411         (sb_build): Fix off-by-one error in assertion about `size'.
 412
 413 2006-05-01  Ben Elliston  <bje@au.ibm.com>
 414
 415         * listing.c (listing_listing): Remove useless loop.
 416         * macro.c (macro_expand): Remove is_positional local variable.
 417         * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
 418         and simplify surrounding expressions, where possible.
 419         (assign_symbol): Likewise.
 420         (s_weakref): Likewise.
 421         * symbols.c (colon): Likewise.
 422
 423 2006-05-01  James Lemke  <jwlemke@wasabisystems.com>
 424
 425         * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
 426
 427 2006-04-30  Thiemo Seufer  <ths@mips.com>
 428             David Ung  <davidu@mips.com>
 429
 430         * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
 431         (mips_immed): New table that records various handling of udi
 432         instruction patterns.
 433         (mips_ip): Adds udi handling.
 434
 435 2006-04-28  Alan Modra  <amodra@bigpond.net.au>
 436
 437         * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
 438         of list rather than beginning.
 439
 440 2006-04-26  Julian Brown  <julian@codesourcery.com>
 441
 442         * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
 443         (is_quarter_float): Rename from above. Simplify slightly.
 444         (parse_qfloat_immediate): Parse a "quarter precision" floating-point
 445         number.
 446         (parse_neon_mov): Parse floating-point constants.
 447         (neon_qfloat_bits): Fix encoding.
 448         (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
 449         preference to integer encoding when using the F32 type.
 450
 451 2006-04-26  Julian Brown  <julian@codesourcery.com>
 452
 453         * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
 454         zero-initialising structures containing it will lead to invalid types).
 455         (arm_it): Add vectype to each operand.
 456         (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
 457         defined field.
 458         (neon_typed_alias): New structure. Extra information for typed
 459         register aliases.
 460         (reg_entry): Add neon type info field.
 461         (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
 462         Break out alternative syntax for coprocessor registers, etc. into...
 463         (arm_reg_alt_syntax): New function. Alternate syntax handling broken
 464         out from arm_reg_parse.
 465         (parse_neon_type): Move. Return SUCCESS/FAIL.
 466         (first_error): New function. Call to ensure first error which occurs is
 467         reported.
 468         (parse_neon_operand_type): Parse exactly one type.
 469         (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
 470         (parse_typed_reg_or_scalar): New function. Handle core of both
 471         arm_typed_reg_parse and parse_scalar.
 472         (arm_typed_reg_parse): Parse a register with an optional type.
 473         (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
 474         result.
 475         (parse_scalar): Parse a Neon scalar with optional type.
 476         (parse_reg_list): Use first_error.
 477         (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
 478         (neon_alias_types_same): New function. Return true if two (alias) types
 479         are the same.
 480         (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
 481         of elements.
 482         (insert_reg_alias): Return new reg_entry not void.
 483         (insert_neon_reg_alias): New function. Insert type/index information as
 484         well as register for alias.
 485         (create_neon_reg_alias): New function. Parse .dn/.qn directives and
 486         make typed register aliases accordingly.
 487         (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
 488         of line.
 489         (s_unreq): Delete type information if present.
 490         (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
 491         (s_arm_unwind_save_mmxwcg): Likewise.
 492         (s_arm_unwind_movsp): Likewise.
 493         (s_arm_unwind_setfp): Likewise.
 494         (parse_shift): Likewise.
 495         (parse_shifter_operand): Likewise.
 496         (parse_address): Likewise.
 497         (parse_tb): Likewise.
 498         (tc_arm_regname_to_dw2regnum): Likewise.
 499         (md_pseudo_table): Add dn, qn.
 500         (parse_neon_mov): Handle typed operands.
 501         (parse_operands): Likewise.
 502         (neon_type_mask): Add N_SIZ.
 503         (N_ALLMODS): New macro.
 504         (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
 505         (el_type_of_type_chk): Add some safeguards.
 506         (modify_types_allowed): Fix logic bug.
 507         (neon_check_type): Handle operands with types.
 508         (neon_three_same): Remove redundant optional arg handling.
 509         (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
 510         (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
 511         (do_neon_step): Adjust accordingly.
 512         (neon_cmode_for_logic_imm): Use first_error.
 513         (do_neon_bitfield): Call neon_check_type.
 514         (neon_dyadic): Rename to...
 515         (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
 516         to allow modification of type of the destination.
 517         (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
 518         (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
 519         (do_neon_compare): Make destination be an untyped bitfield.
 520         (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
 521         (neon_mul_mac): Return early in case of errors.
 522         (neon_move_immediate): Use first_error.
 523         (neon_mac_reg_scalar_long): Fix type to include scalar.
 524         (do_neon_dup): Likewise.
 525         (do_neon_mov): Likewise (in several places).
 526         (do_neon_tbl_tbx): Fix type.
 527         (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
 528         (do_neon_ld_dup): Exit early in case of errors and/or use
 529         first_error.
 530         (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
 531         Handle .dn/.qn directives.
 532         (REGDEF): Add zero for reg_entry neon field.
 533
 534 2006-04-26  Julian Brown  <julian@codesourcery.com>
 535
 536         * config/tc-arm.c (limits.h): Include.
 537         (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
 538         (fpu_vfp_v3_or_neon_ext): Declare constants.
 539         (neon_el_type): New enumeration of types for Neon vector elements.
 540         (neon_type_el): New struct. Define type and size of a vector element.
 541         (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
 542         instruction.
 543         (neon_type): Define struct. The type of an instruction.
 544         (arm_it): Add 'vectype' for the current instruction.
 545         (isscalar, immisalign, regisimm, isquad): New predicates for operands.
 546         (vfp_sp_reg_pos): Rename to...
 547         (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
 548         tags.
 549         (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
 550         (Neon D or Q register).
 551         (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
 552         register.
 553         (GE_OPT_PREFIX_BIG): Define constant, for use in...
 554         (my_get_expression): Allow above constant as argument to accept
 555         64-bit constants with optional prefix.
 556         (arm_reg_parse): Add extra argument to return the specific type of
 557         register in when either a D or Q register (REG_TYPE_NDQ) is
 558         requested. Can be NULL.
 559         (parse_scalar): New function. Parse Neon scalar (vector reg and index).
 560         (parse_reg_list): Update for new arm_reg_parse args.
 561         (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
 562         (parse_neon_el_struct_list): New function. Parse element/structure
 563         register lists for VLD<n>/VST<n> instructions.
 564         (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
 565         (s_arm_unwind_save_mmxwr): Likewise.
 566         (s_arm_unwind_save_mmxwcg): Likewise.
 567         (s_arm_unwind_movsp): Likewise.
 568         (s_arm_unwind_setfp): Likewise.
 569         (parse_big_immediate): New function. Parse an immediate, which may be
 570         64 bits wide. Put results in inst.operands[i].
 571         (parse_shift): Update for new arm_reg_parse args.
 572         (parse_address): Likewise. Add parsing of alignment specifiers.
 573         (parse_neon_mov): Parse the operands of a VMOV instruction.
 574         (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
 575         OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
 576         OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
 577         OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
 578         (parse_operands): Handle new codes above.
 579         (encode_arm_vfp_sp_reg): Rename to...
 580         (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
 581         selected VFP version only supports D0-D15.
 582         (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
 583         (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
 584         (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
 585         (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
 586         encode_arm_vfp_reg name, and allow 32 D regs.
 587         (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
 588         (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
 589         regs.
 590         (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
 591         (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
 592         constant-load and conversion insns introduced with VFPv3.
 593         (neon_tab_entry): New struct.
 594         (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
 595         those which are the targets of pseudo-instructions.
 596         (neon_opc): Enumerate opcodes, use as indices into...
 597         (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
 598         (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
 599         (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
 600         (NEON_ENC_DUP): Define meaningful helper macros to look up values in
 601         neon_enc_tab.
 602         (neon_shape): Enumerate shapes (permitted register widths, etc.) for
 603         Neon instructions.
 604         (neon_type_mask): New. Compact type representation for type checking.
 605         (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
 606         permitted type combinations.
 607         (N_IGNORE_TYPE): New macro.
 608         (neon_check_shape): New function. Check an instruction shape for
 609         multiple alternatives. Return the specific shape for the current
 610         instruction.
 611         (neon_modify_type_size): New function. Modify a vector type and size,
 612         depending on the bit mask in argument 1.
 613         (neon_type_promote): New function. Convert a given "key" type (of an
 614         operand) into the correct type for a different operand, based on a bit
 615         mask.
 616         (type_chk_of_el_type): New function. Convert a type and size into the
 617         compact representation used for type checking.
 618         (el_type_of_type_ckh): New function. Reverse of above (only when a
 619         single bit is set in the bit mask).
 620         (modify_types_allowed): New function. Alter a mask of allowed types
 621         based on a bit mask of modifications.
 622         (neon_check_type): New function. Check the type of the current
 623         instruction against the variable argument list. The "key" type of the
 624         instruction is returned.
 625         (neon_dp_fixup): New function. Fill in and modify instruction bits for
 626         a Neon data-processing instruction depending on whether we're in ARM
 627         mode or Thumb-2 mode.
 628         (neon_logbits): New function.
 629         (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
 630         (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
 631         (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
 632         (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
 633         (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
 634         (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
 635         (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
 636         (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
 637         (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
 638         (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
 639         (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
 640         (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
 641         (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
 642         (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
 643         (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
 644         (neon_move_immediate, do_neon_mvn, neon_mixed_length)
 645         (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
 646         (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
 647         (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
 648         (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
 649         (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
 650         (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
 651         (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
 652         (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
 653         (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
 654         helpers.
 655         (parse_neon_type): New function. Parse Neon type specifier.
 656         (opcode_lookup): Allow parsing of Neon type specifiers.
 657         (REGNUM2, REGSETH, REGSET2): New macros.
 658         (reg_names): Add new VFPv3 and Neon registers.
 659         (NUF, nUF, NCE, nCE): New macros for opcode table.
 660         (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
 661         fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
 662         fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
 663         Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
 664         vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
 665         vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
 666         vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
 667         vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr,  v{r}sra, vsli,
 668         vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
 669         vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
 670         vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
 671         vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
 672         vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
 673         vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
 674         fto[us][lh][sd].
 675         (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
 676         (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
 677         (arm_option_cpu_value): Add vfp3 and neon.
 678         (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
 679         VFPv1 attribute.
 680
 681 2006-04-25  Bob Wilson  <bob.wilson@acm.org>
 682
 683         * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
 684         syntax instead of hardcoded opcodes with ".w18" suffixes.
 685         (wide_branch_opcode): New.
 686         (build_transition): Use it to check for wide branch opcodes with
 687         either ".w18" or ".w15" suffixes.
 688
 689 2006-04-25  Bob Wilson  <bob.wilson@acm.org>
 690
 691         * config/tc-xtensa.c (xtensa_create_literal_symbol,
 692         xg_assemble_literal, xg_assemble_literal_space): Do not set the
 693         frag's is_literal flag.
 694
 695 2006-04-25  Bob Wilson  <bob.wilson@acm.org>
 696
 697         * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
 698
 699 2006-04-23  Kazu Hirata  <kazu@codesourcery.com>
 700
 701         * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
 702         config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
 703         config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
 704         config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
 705         config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
 706
 707 2005-04-20  Paul Brook  <paul@codesourcery.com>
 708
 709         * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
 710         all targets.
 711         (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
 712
 713 2006-04-19  Alan Modra  <amodra@bigpond.net.au>
 714
 715         * Makefile.am (CPU_TYPES): Add maxq and mt.  Sort.
 716         (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
 717         Make some cpus unsupported on ELF.  Run "make dep-am".
 718         * Makefile.in: Regenerate.
 719
 720 2006-04-19  Alan Modra  <amodra@bigpond.net.au>
 721
 722         * configure.in (--enable-targets): Indent help message.
 723         * configure: Regenerate.
 724
 725 2006-04-18  H.J. Lu  <hongjiu.lu@intel.com>
 726
 727         PR gas/2533
 728         * config/tc-i386.c (i386_immediate): Check illegal immediate
 729         register operand.
 730
 731 2006-04-18  Alan Modra  <amodra@bigpond.net.au>
 732
 733         * config/tc-i386.c: Formatting.
 734         (output_disp, output_imm): ISO C90 params.
 735
 736         * frags.c (frag_offset_fixed_p): Constify args.
 737         * frags.h (frag_offset_fixed_p): Ditto.
 738
 739         * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
 740         (COFF_MAGIC): Delete.
 741
 742         * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
 743
 744 2006-04-16  Daniel Jacobowitz  <dan@codesourcery.com>
 745
 746         * po/POTFILES.in: Regenerated.
 747
 748 2006-04-16  Mark Mitchell  <mark@codesourcery.com>
 749
 750         * doc/as.texinfo: Mention that some .type syntaxes are not
 751         supported on all architectures.
 752
 753 2006-04-14  Sterling Augustine  <sterling@tensilica.com>
 754
 755         * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
 756         instructions when such transformations have been disabled.
 757
 758 2006-04-10  Sterling Augustine  <sterling@tensilica.com>
 759
 760         * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
 761         symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
 762         (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
 763         decoding the loop instructions.  Remove current_offset variable.
 764         (xtensa_fix_short_loop_frags): Likewise.
 765         (min_bytes_to_other_loop_end): Remove current_offset argument.
 766
 767 2006-04-09  Arnold Metselaar  <arnold.metselaar@planet.nl>
 768
 769         * config/tc-z80.c (z80_optimize_expr): Removed.
 770         * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
 771
 772 2006-04-07  Joerg Wunsch <j.gnu@uriah.heep.sax.de>
 773
 774         * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
 775         attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
 776         attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
 777         atmega644, atmega329, atmega3290, atmega649, atmega6490,
 778         atmega406, atmega640, atmega1280, atmega1281, at90can32,
 779         at90can64, at90usb646, at90usb647, at90usb1286 and
 780         at90usb1287.
 781         Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
 782
 783 2006-04-07  Paul Brook  <paul@codesourcery.com>
 784
 785         * config/tc-arm.c (parse_operands): Set default error message.
 786
 787 2006-04-07  Paul Brook  <paul@codesourcery.com>
 788
 789         * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
 790
 791 2006-04-07  Paul Brook  <paul@codesourcery.com>
 792
 793         * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
 794
 795 2006-04-07  Paul Brook  <paul@codesourcery.com>
 796
 797         * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
 798         (move_or_literal_pool): Handle Thumb-2 instructions.
 799         (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
 800
 801 2006-04-07  Alan Modra  <amodra@bigpond.net.au>
 802
 803         PR 2512.
 804         * config/tc-i386.c (match_template): Move 64-bit operand tests
 805         inside loop.
 806
 807 2006-04-06  Carlos O'Donell  <carlos@codesourcery.com>
 808
 809         * po/Make-in: Add install-html target.
 810         * Makefile.am: Add install-html and install-html-recursive targets.
 811         * Makefile.in: Regenerate.
 812         * configure.in: AC_SUBST datarootdir, docdir, htmldir.
 813         * configure: Regenerate.
 814         * doc/Makefile.am: Add install-html and install-html-am targets.
 815         * doc/Makefile.in: Regenerate.
 816
 817 2006-04-06  Alan Modra  <amodra@bigpond.net.au>
 818
 819         * frags.c (frag_offset_fixed_p): Reinitialise offset before
 820         second scan.
 821
 822 2006-04-05  Richard Sandiford  <richard@codesourcery.com>
 823             Daniel Jacobowitz  <dan@codesourcery.com>
 824
 825         * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
 826         (GOTT_BASE, GOTT_INDEX): New.
 827         (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
 828         GOTT_INDEX when generating VxWorks PIC.
 829         * configure.tgt (sparc*-*-vxworks*): Remove this special case;
 830         use the generic *-*-vxworks* stanza instead.
 831
 832 2006-04-04  Alan Modra  <amodra@bigpond.net.au>
 833
 834         PR 997
 835         * frags.c (frag_offset_fixed_p): New function.
 836         * frags.h (frag_offset_fixed_p): Declare.
 837         * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
 838         (resolve_expression): Likewise.
 839
 840 2006-04-03  Sterling Augustine  <sterling@tensilica.com>
 841
 842         * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
 843         of the same length but different numbers of slots.
 844
 845 2006-03-30  Andreas Schwab  <schwab@suse.de>
 846
 847         * configure.in: Fix help string for --enable-targets option.
 848         * configure: Regenerate.
 849
 850 2006-03-28  Nathan Sidwell  <nathan@codesourcery.com>
 851
 852         * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
 853         (m68k_ip): ... here.  Use for all chips.  Protect against buffer
 854         overrun and avoid excessive copying.
 855
 856         * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
 857         m68020_control_regs, m68040_control_regs, m68060_control_regs,
 858         mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
 859         mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
 860         mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
 861         (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
 862         mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
 863         mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
 864         mcf5282_ctrl, mcfv4e_ctrl): ... these.
 865         (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
 866         (struct m68k_cpu): Change chip field to control_regs.
 867         (current_chip): Remove.
 868         (control_regs): New.
 869         (m68k_archs, m68k_extensions): Adjust.
 870         (m68k_cpus): Reorder to be in cpu number order.  Adjust.
 871         (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
 872         (find_cf_chip): Reimplement for new organization of cpu table.
 873         (select_control_regs): Remove.
 874         (mri_chip): Adjust.
 875         (struct save_opts): Save control regs, not chip.
 876         (s_save, s_restore): Adjust.
 877         (m68k_lookup_cpu): Give deprecated warning when necessary.
 878         (m68k_init_arch): Adjust.
 879         (md_show_usage): Adjust for new cpu table organization.
 880
 881 2006-03-25  Bernd Schmidt  <bernd.schmidt@analog.com>
 882
 883         * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
 884         * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
 885         * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
 886         "elf/bfin.h".
 887         (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
 888         (any_gotrel): New rule.
 889         (got): Use it, and create Expr_Node_GOT_Reloc nodes.
 890         * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
 891         "elf/bfin.h".
 892         (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
 893         (bfin_pic_ptr): New function.
 894         (md_pseudo_table): Add it for ".picptr".
 895         (OPTION_FDPIC): New macro.
 896         (md_longopts): Add -mfdpic.
 897         (md_parse_option): Handle it.
 898         (md_begin): Set BFD flags.
 899         (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
 900         (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
 901         us for GOT relocs.
 902         * Makefile.am (bfin-parse.o): Update dependencies.
 903         (DEPTC_bfin_elf): Likewise.
 904         * Makefile.in: Regenerate.
 905
 906 2006-03-25  Richard Sandiford  <richard@codesourcery.com>
 907
 908         * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
 909         mcfemac instead of mcfmac.
 910
 911 2006-03-23  Michael Matz  <matz@suse.de>
 912
 913         * config/tc-i386.c (type_names): Correct placement of 'static'.
 914         (reloc): Map some more relocs to their 64 bit counterpart when
 915         size is 8.
 916         (output_insn): Work around breakage if DEBUG386 is defined.
 917         (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
 918         needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
 919         BFD_RELOC_X86_64_GOTPC32.  Also x86-64 handles pcrel addressing
 920         different from i386.
 921         (output_imm): Ditto.
 922         (lex_got): Recognize @PLTOFF and @GOTPLT.  Make @GOT accept also
 923         Imm64.
 924         (md_convert_frag): Jumps can now be larger than 2GB away, error
 925         out in that case.
 926         (tc_gen_reloc): New relocs are passed through.  BFD_RELOC_64
 927         and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
 928
 929 2006-03-22  Richard Sandiford  <richard@codesourcery.com>
 930             Daniel Jacobowitz  <dan@codesourcery.com>
 931             Phil Edwards  <phil@codesourcery.com>
 932             Zack Weinberg  <zack@codesourcery.com>
 933             Mark Mitchell  <mark@codesourcery.com>
 934             Nathan Sidwell  <nathan@codesourcery.com>
 935
 936         * config/tc-mips.c (mips_target_format): Handle vxworks targets.
 937         (md_begin): Complain about -G being used for PIC.  Don't change
 938         the text, data and bss alignments on VxWorks.
 939         (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
 940         generating VxWorks PIC.
 941         (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
 942         (macro): Likewise, but do not treat la $25 specially for
 943         VxWorks PIC, and do not handle jal.
 944         (OPTION_MVXWORKS_PIC): New macro.
 945         (md_longopts): Add -mvxworks-pic.
 946         (md_parse_option): Don't complain about using PIC and -G together here.
 947         Handle OPTION_MVXWORKS_PIC.
 948         (md_estimate_size_before_relax): Always use the first relaxation
 949         sequence on VxWorks.
 950         * config/tc-mips.h (VXWORKS_PIC): New.
 951
 952 2006-03-21  Paul Brook  <paul@codesourcery.com>
 953
 954         * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
 955
 956 2006-03-21  Sterling Augustine  <sterling@tensilica.com>
 957
 958         * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
 959         (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
 960         (get_loop_align_size): New.
 961         (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
 962         (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
 963         (get_text_align_power): Rewrite to handle inputs in the range 2-8.
 964         (get_noop_aligned_address): Use get_loop_align_size.
 965         (get_aligned_diff): Likewise.
 966
 967 2006-03-21  Paul Brook  <paul@codesourcery.com>
 968
 969         * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
 970
 971 2006-03-20  Paul Brook  <paul@codesourcery.com>
 972
 973         * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
 974         (do_t_branch): Encode branches inside IT blocks as unconditional.
 975         (do_t_cps): New function.
 976         (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
 977         do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
 978         (opcode_lookup): Allow conditional suffixes on all instructions in
 979         Thumb mode.
 980         (md_assemble): Advance condexec state before checking for errors.
 981         (insns): Use do_t_cps.
 982
 983 2006-03-20  Paul Brook  <paul@codesourcery.com>
 984
 985         * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
 986         outputting the insn.
 987
 988 2006-03-18  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 989
 990         * config/tc-vax.c: Update copyright year.
 991         * config/tc-vax.h: Likewise.
 992
 993 2006-03-18  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 994
 995         * config/tc-vax.c (md_chars_to_number): Used only locally, so
 996         make it static.
 997         * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
 998
 999 2006-03-17  Paul Brook  <paul@codesourcery.com>
1000
1001         * config/tc-arm.c (insns): Add ldm and stm.
1002
1003 2006-03-17  Ben Elliston  <bje@au.ibm.com>
1004
1005         PR gas/2446
1006         * doc/as.texinfo (Ident): Document this directive more thoroughly.
1007
1008 2006-03-16  Paul Brook  <paul@codesourcery.com>
1009
1010         * config/tc-arm.c (insns): Add "svc".
1011
1012 2006-03-13  Bob Wilson  <bob.wilson@acm.org>
1013
1014         * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
1015         flag and avoid double underscore prefixes.
1016
1017 2006-03-10  Paul Brook  <paul@codesourcery.com>
1018
1019         * config/tc-arm.c (md_begin): Handle EABIv5.
1020         (arm_eabis): Add EF_ARM_EABI_VER5.
1021         * doc/c-arm.texi: Document -meabi=5.
1022
1023 2006-03-10  Ben Elliston  <bje@au.ibm.com>
1024
1025         * app.c (do_scrub_chars): Simplify string handling.
1026
1027 2006-03-07  Richard Sandiford  <richard@codesourcery.com>
1028             Daniel Jacobowitz  <dan@codesourcery.com>
1029             Zack Weinberg  <zack@codesourcery.com>
1030             Nathan Sidwell  <nathan@codesourcery.com>
1031             Paul Brook  <paul@codesourcery.com>
1032             Ricardo Anguiano  <anguiano@codesourcery.com>
1033             Phil Edwards  <phil@codesourcery.com>
1034
1035         * config/tc-arm.c (md_apply_fix): Install a value of zero into a
1036         BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
1037         R_ARM_ABS12 reloc.
1038         (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
1039         relocs, but adjust by md_pcrel_from_section.  Create R_ARM_ABS12
1040         relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
1041
1042 2006-03-06  Bob Wilson  <bob.wilson@acm.org>
1043
1044         * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
1045         even when using the text-section-literals option.
1046
1047 2006-03-06  Nathan Sidwell  <nathan@codesourcery.com>
1048
1049         * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
1050         and cf.
1051         (m68k_ip): <case 'J'> Check we have some control regs.
1052         (md_parse_option): Allow raw arch switch.
1053         (m68k_init_arch): Better detection of arch/cpu mismatch.  Detect
1054         whether 68881 or cfloat was meant by -mfloat.
1055         (md_show_usage): Adjust extension display.
1056         (m68k_elf_final_processing): Adjust.
1057
1058 2006-03-03  Bjoern Haase  <bjoern.m.haase@web.de>
1059
1060         * config/tc-avr.c (avr_mod_hash_value): New function.
1061         (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
1062         BFD_RELOC_MS8_LDI for hlo8() and hhi8()
1063         (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
1064         instead of int avr_ldi_expression: use avr_mod_hash_value instead
1065         of (int).
1066         (tc_gen_reloc): Handle substractions of symbols, if possible do
1067         fixups, abort otherwise.
1068         * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
1069         tc_fix_adjustable): Define.
1070
1071 2006-03-02  James E Wilson  <wilson@specifix.com>
1072
1073         * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
1074         change the template, then clear md.slot[curr].end_of_insn_group.
1075
1076 2006-02-28  Jan Beulich  <jbeulich@novell.com>
1077
1078         * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
1079
1080 2006-02-28  Jan Beulich  <jbeulich@novell.com>
1081
1082         PR/1070
1083         * macro.c (getstring): Don't treat parentheses special anymore.
1084         (get_any_string): Don't consider '(' and ')' as quoting anymore.
1085         Special-case '(', ')', '[', and ']' when dealing with non-quoting
1086         characters.
1087
1088 2006-02-28  Mat <mat@csail.mit.edu>
1089
1090         * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
1091
1092 2006-02-27  Jakub Jelinek  <jakub@redhat.com>
1093
1094         * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
1095         field.
1096         (CFI_signal_frame): Define.
1097         (cfi_pseudo_table): Add .cfi_signal_frame.
1098         (dot_cfi): Handle CFI_signal_frame.
1099         (output_cie): Handle cie->signal_frame.
1100         (select_cie_for_fde): Don't share CIE if signal_frame flag is
1101         different.  Copy signal_frame from FDE to newly created CIE.
1102         * doc/as.texinfo: Document .cfi_signal_frame.
1103
1104 2006-02-27  Carlos O'Donell  <carlos@codesourcery.com>
1105
1106         * doc/Makefile.am: Add html target.
1107         * doc/Makefile.in: Regenerate.
1108         * po/Make-in: Add html target.
1109
1110 2006-02-27  H.J. Lu <hongjiu.lu@intel.com>
1111
1112         * config/tc-i386.c (output_insn): Support Intel Merom New
1113         Instructions.
1114
1115         * config/tc-i386.h (CpuMNI): New.
1116         (CpuUnknownFlags): Add CpuMNI.
1117
1118 2006-02-24  David S. Miller  <davem@sunset.davemloft.net>
1119
1120         * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
1121         (hpriv_reg_table): New table for hyperprivileged registers.
1122         (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
1123         register encoding.
1124
1125 2006-02-24  DJ Delorie  <dj@redhat.com>
1126
1127         * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
1128         (tc_gen_reloc): Don't define.
1129         * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
1130         (OPTION_LINKRELAX): New.
1131         (md_longopts): Add it.
1132         (m32c_relax): New.
1133         (md_parse_options): Set it.
1134         (md_assemble): Emit relaxation relocs as needed.
1135         (md_convert_frag): Emit relaxation relocs as needed.
1136         (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
1137         (m32c_apply_fix): New.
1138         (tc_gen_reloc): New.
1139         (m32c_force_relocation): Force out jump relocs when relaxing.
1140         (m32c_fix_adjustable): Return false if relaxing.
1141
1142 2006-02-24  Paul Brook  <paul@codesourcery.com>
1143
1144         * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
1145         arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
1146         (struct asm_barrier_opt): Define.
1147         (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
1148         (parse_psr): Accept V7M psr names.
1149         (parse_barrier): New function.
1150         (enum operand_parse_code): Add OP_oBARRIER.
1151         (parse_operands): Implement OP_oBARRIER.
1152         (do_barrier): New function.
1153         (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
1154         (do_t_cpsi): Add V7M restrictions.
1155         (do_t_mrs, do_t_msr): Validate V7M variants.
1156         (md_assemble): Check for NULL variants.
1157         (v7m_psrs, barrier_opt_names): New tables.
1158         (insns): Add V7 instructions.  Mark V6 instructions absent from V7M.
1159         (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
1160         (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
1161         (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
1162         (struct cpu_arch_ver_table): Define.
1163         (cpu_arch_ver): New.
1164         (aeabi_set_public_attributes): Use cpu_arch_ver.  Set
1165         Tag_CPU_arch_profile.
1166         * doc/c-arm.texi: Document new cpu and arch options.
1167
1168 2006-02-23  H.J. Lu  <hongjiu.lu@intel.com>
1169
1170         * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
1171
1172 2006-02-23  H.J. Lu  <hongjiu.lu@intel.com>
1173
1174         * config/tc-ia64.c: Update copyright years.
1175
1176 2006-02-22  H.J. Lu  <hongjiu.lu@intel.com>
1177
1178         * config/tc-ia64.c (specify_resource): Add the rule 17 from
1179         SDM 2.2.
1180
1181 2005-02-22  Paul Brook  <paul@codesourcery.com>
1182
1183         * config/tc-arm.c (do_pld): Remove incorrect write to
1184         inst.instruction.
1185         (encode_thumb32_addr_mode): Use correct operand.
1186
1187 2006-02-21  Paul Brook  <paul@codesourcery.com>
1188
1189         * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
1190
1191 2006-02-17  Shrirang Khisti  <shrirangk@kpitcummins.com>
1192             Anil Paranjape   <anilp1@kpitcummins.com>
1193             Shilin Shakti    <shilins@kpitcummins.com>
1194
1195         * Makefile.am: Add xc16x related entry.
1196         * Makefile.in: Regenerate.
1197         * configure.in: Added xc16x related entry.
1198         * configure: Regenerate.
1199         * config/tc-xc16x.h: New file
1200         * config/tc-xc16x.c: New file
1201         * doc/c-xc16x.texi: New file for xc16x
1202         * doc/all.texi: Entry for xc16x
1203         * doc/Makefile.texi: Added c-xc16x.texi
1204         * NEWS: Announce the support for the new target.
1205
1206 2006-02-16  Nick Hudson  <nick.hudson@dsl.pipex.com>
1207
1208         * configure.tgt: set emulation for mips-*-netbsd*
1209
1210 2006-02-14  Jakub Jelinek  <jakub@redhat.com>
1211
1212         * config.in: Rebuilt.
1213
1214 2006-02-13  Bob Wilson  <bob.wilson@acm.org>
1215
1216         * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
1217         from 1, not 0, in error messages.
1218         (md_assemble): Simplify special-case check for ENTRY instructions.
1219         (tinsn_has_invalid_symbolic_operands): Do not include opcode and
1220         operand in error message.
1221
1222 2006-02-13  Joseph S. Myers  <joseph@codesourcery.com>
1223
1224         * configure.tgt (arm-*-linux-gnueabi*): Change to
1225         arm-*-linux-*eabi*.
1226
1227 2006-02-10  Nick Clifton  <nickc@redhat.com>
1228
1229         * config/tc-crx.c (check_range): Ensure that the sign bit of a
1230         32-bit value is propagated into the upper bits of a 64-bit long.
1231
1232         * config/tc-arc.c (init_opcode_tables): Fix cast.
1233         (arc_extoper, md_operand): Likewise.
1234
1235 2006-02-09  David Heine  <dlheine@tensilica.com>
1236
1237         * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
1238         each relaxation step.
1239
1240 2006-02-09  Eric Botcazou  <ebotcazou@libertysurf.fr>
1241
1242         * configure.in (CHECK_DECLS): Add vsnprintf.
1243         * configure: Regenerate.
1244         * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
1245         include/declare here, but...
1246         * as.h: Move code detecting VARARGS idiom to the top.
1247         (errno.h, stdarg.h, varargs.h, va_list): ...here.
1248         (vsnprintf): Declare if not already declared.
1249
1250 2006-02-08  H.J. Lu  <hongjiu.lu@intel.com>
1251
1252         * as.c (close_output_file): New.
1253         (main): Register close_output_file with xatexit before
1254         dump_statistics. Don't call output_file_close.
1255
1256 2006-02-07  Nathan Sidwell  <nathan@codesourcery.com>
1257
1258         * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
1259         mcf5329_control_regs): New.
1260         (not_current_architecture, selected_arch, selected_cpu): New.
1261         (m68k_archs, m68k_extensions): New.
1262         (archs): Renamed to ...
1263         (m68k_cpus): ... here.  Adjust.
1264         (n_arches): Remove.
1265         (md_pseudo_table): Add arch and cpu directives.
1266         (find_cf_chip, m68k_ip): Adjust table scanning.
1267         (no_68851, no_68881): Remove.
1268         (md_assemble): Lazily initialize.
1269         (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
1270         (md_init_after_args): Move functionality to m68k_init_arch.
1271         (mri_chip): Adjust table scanning.
1272         (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
1273         options with saner parsing.
1274         (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
1275         m68k_init_arch): New.
1276         (s_m68k_cpu, s_m68k_arch): New.
1277         (md_show_usage): Adjust.
1278         (m68k_elf_final_processing): Set CF EF flags.
1279         * config/tc-m68k.h (m68k_init_after_args): Remove.
1280         (tc_init_after_args): Remove.
1281         * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
1282         (M68k-Directives): Document .arch and .cpu directives.
1283
1284 2006-02-05  Arnold Metselaar  <arnold.metselaar@planet.nl>
1285
1286         * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
1287         synonyms for equ and defl.
1288         (z80_cons_fix_new): New function.
1289         (emit_byte): Disallow relative jumps to absolute locations.
1290         (emit_data): Only handle defb, prototype changed, because defb is
1291         now handled as pseudo-op rather than an instruction.
1292         (instab): Entries for defb,defw,db,dw moved from here...
1293         (md_pseudo_table): ... to here, use generic cons() for defw,dw.
1294         Add entries for def24,def32,d24,d32.
1295         (md_assemble): Improved error handling.
1296         (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
1297         * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
1298         (z80_cons_fix_new): Declare.
1299         * doc/c-z80.texi (defb, db): Mention warning on overflow.
1300         (def24,d24,def32,d32): New pseudo-ops.
1301
1302 2006-02-02  Paul Brook  <paul@codesourcery.com>
1303
1304         * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
1305
1306 2005-02-02  Paul Brook  <paul@codesourcery.com>
1307
1308         * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
1309         T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
1310         T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
1311         T2_OPCODE_RSB): Define.
1312         (thumb32_negate_data_op): New function.
1313         (md_apply_fix): Use it.
1314
1315 2006-01-31  Bob Wilson  <bob.wilson@acm.org>
1316
1317         * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
1318         fields.
1319         * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
1320         * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
1321         subtracted symbols.
1322         (relaxation_requirements): Add pfinish_frag argument and use it to
1323         replace setting tinsn->record_fix fields.
1324         (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
1325         and vinsn_to_insnbuf.  Remove references to record_fix and
1326         slot_sub_symbols fields.
1327         (xtensa_mark_narrow_branches): Delete unused code.
1328         (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
1329         a symbol.
1330         (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
1331         record_fix fields.
1332         (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
1333         (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
1334         of the record_fix field.  Simplify error messages for unexpected
1335         symbolic operands.
1336         (set_expr_symbol_offset_diff): Delete.
1337
1338 2006-01-31  Paul Brook  <paul@codesourcery.com>
1339
1340         * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
1341
1342 2006-01-31  Paul Brook  <paul@codesourcery.com>
1343         Richard Earnshaw <rearnsha@arm.com>
1344
1345         * config/tc-arm.c: Use arm_feature_set.
1346         (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
1347         arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
1348         fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
1349         New variables.
1350         (insns): Use them.
1351         (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
1352         md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
1353         arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
1354         s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
1355         feature flags.
1356         (arm_legacy_option_table, arm_option_cpu_value_table): New types.
1357         (arm_opts): Move old cpu/arch options from here...
1358         (arm_legacy_opts): ... to here.
1359         (md_parse_option): Search arm_legacy_opts.
1360         (arm_cpus, arm_archs, arm_extensions, arm_fpus)
1361         (arm_float_abis, arm_eabis): Make const.
1362
1363 2006-01-25  Bob Wilson  <bob.wilson@acm.org>
1364
1365         * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
1366
1367 2006-01-21  Jie Zhang  <jie.zhang@analog.com>
1368
1369         * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
1370         in load immediate intruction.
1371
1372 2006-01-21  Jie Zhang  <jie.zhang@analog.com>
1373
1374         * config/bfin-parse.y (value_match): Use correct conversion
1375         specifications in template string for __FILE__ and __LINE__.
1376         (binary): Ditto.
1377         (unary): Ditto.
1378
1379 2006-01-18  Alexandre Oliva  <aoliva@redhat.com>
1380
1381         Introduce TLS descriptors for i386 and x86_64.
1382         * config/tc-i386.c (tc_i386_fix_adjustable): Handle
1383         BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
1384         BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
1385         (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
1386         BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
1387         displacement bits.
1388         (build_modrm_byte): Set up zero modrm for TLS desc calls.
1389         (lex_got): Handle @tlsdesc and @tlscall.
1390         (md_apply_fix, tc_gen_reloc): Handle the new relocations.
1391
1392 2006-01-11  Nick Clifton  <nickc@redhat.com>
1393
1394         Fixes for building on 64-bit hosts:
1395         * config/tc-avr.c (mod_index): New union to allow conversion
1396         between pointers and integers.
1397         (md_begin, avr_ldi_expression): Use it.
1398         * config/tc-i370.c (md_assemble): Add cast for argument to print
1399         statement.
1400         * config/tc-tic54x.c (subsym_substitute): Likewise.
1401         * config/tc-mn10200.c (md_assemble): Use a union to convert the
1402         opindex field of fr_cgen structure into a pointer so that it can
1403         be stored in a frag.
1404         * config/tc-mn10300.c (md_assemble): Likewise.
1405         * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
1406         types.
1407         * config/tc-v850.c: Replace uses of (int) casts with correct
1408         types.
1409
1410 2006-01-09  H.J. Lu  <hongjiu.lu@intel.com>
1411
1412         PR gas/2117
1413         * symbols.c (snapshot_symbol): Don't change a defined symbol.
1414
1415 2006-01-03  Hans-Peter Nilsson  <hp@bitrange.com>
1416
1417         PR gas/2101
1418         * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
1419         a local-label reference.
1420
1421 For older changes see ChangeLog-2005
1422 \f
1423 Local Variables:
1424 mode: change-log
1425 left-margin: 8
1426 fill-column: 74
1427 version-control: never
1428 End: