1 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
3 * config/tc-mips.c (gprel16_reloc_p): New function.
4 (macro_read_relocs): Assume BFD_RELOC_LO16 if all relocs are
6 (offset_high_part, small_offset_p): New functions.
7 (nacro): Use them. Remove *_OB and *_DOB cases. For single-
8 register load and store macros, handle the 16-bit offset case first.
9 If a 16-bit offset is not suitable for the instruction we're
10 generating, load it into the temporary register using
11 ADDRESS_ADDI_INSN. Make the M_LI_DD code fall through into the
12 M_L_DAB code once the address has been constructed. For double load
13 and store macros, again handle the 16-bit offset case first.
14 If the second register cannot be accessed from the same high
15 part as the first, load it into AT using ADDRESS_ADDI_INSN.
16 Fix the handling of LD in cases where the first register is the
17 same as the base. Also handle the case where the offset is
18 not 16 bits and the second register cannot be accessed from the
19 same high part as the first. For unaligned loads and stores,
20 fuse the offbits == 12 and old "ab" handling. Apply this handling
21 whenever the second offset needs a different high part from the first.
22 Construct the offset using ADDRESS_ADDI_INSN where possible,
23 for offbits == 16 as well as offbits == 12. Use offset_reloc
24 when constructing the individual loads and stores.
25 (mips_ip): Set up imm_expr, imm2_expr, offset_expr, imm_reloc
26 and offset_reloc before matching against a particular opcode.
27 Handle elided 'A' constants. Allow 'A' constants to use
30 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
32 * config/tc-mips.c (validate_mips_insn): Remove "[" and "]" handling.
33 (mips_ip): Likewise. Do not set is_mdmx for INSN_5400 instructions.
34 Check constraints on the VR5400 RZU.OB, SLL.OB and SRL.OB instructions.
36 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
38 * config/tc-mips.c (mips_ip): Preserve the real bit number for "+p".
39 Require the msb to be <= 31 for "+s". Check that the size is <= 31
40 for both "+s" and "+S".
42 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
44 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn):
45 (mips_ip, mips16_ip): Handle "+i".
47 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
49 * config/tc-mips.c (mips32_to_micromips_reg_h_map): Delete.
50 (micromips_to_32_reg_h_map): Rename to...
51 (micromips_to_32_reg_h_map1): ...this.
52 (micromips_to_32_reg_i_map): Rename to...
53 (micromips_to_32_reg_h_map2): ...this.
54 (mips_lookup_reg_pair): New function.
55 (gpr_write_mask, macro): Adjust after above renaming.
56 (validate_micromips_insn): Remove "mi" handling.
57 (mips_ip): Likewise. Parse both registers in a pair for "mh".
59 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
61 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn)
62 (mips_ip): Remove "+D" and "+T" handling.
64 2013-07-05 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
66 * config/tc-s390.c (md_gather_operands, md_apply_fix): Support new
69 2013-07-03 Marcus Shawcroft <marcus.shawcroft@arm.com>
71 * config/tc-aarch64.c (reloc_table): Merge got_prel19 into got.
73 2013-07-02 Marcus Shawcroft <marcus.shawcroft@arm.com>
75 * config/tc-aarch64.c (md_apply_fix): Reorder case values.
76 (aarch64_force_relocation): Likewise.
78 2013-07-02 Alan Modra <amodra@gmail.com>
80 * config/tc-ppc.c (ppc_elf_adjust_symtab): Don't make .TOC. weak.
82 2013-06-26 Maciej W. Rozycki <macro@codesourcery.com>
84 * doc/as.texinfo (Overview): Remove @samp from MIPS ISA names.
85 * doc/c-mips.texi (MIPS Options): Remove @sc from MIPS ISA names.
86 Replace @sc{mips16} with literal `MIPS16'.
87 (MIPS ISA): Replace @sc{mips3} with literal `MIPS III'.
89 2013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
91 * config/tc-aarch64.c (reloc_table): Replace
92 BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with
93 BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to
94 BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and
95 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC.
96 (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC,
97 BFD_RELOC_AARCH64_LD32_GOT_LO12_NC,
98 BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC,
99 BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC,
100 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and
101 BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC.
102 (aarch64_force_relocation): Likewise.
104 2013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
106 * config/tc-aarch64.c (ilp32_p): New static variable.
107 (elf64_aarch64_target_format): Return the target according to the
109 (md_begin): Determine 'mach' according to the value of 'ilp32_p'.
110 (aarch64_opts): Add support for options '-milp32' and '-mlp64'.
111 (aarch64_dwarf2_addr_size): New function.
112 * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration.
113 (DWARF2_ADDR_SIZE): New define.
115 2013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
117 * doc/c-mips.texi: Use ISA instead of @sc{isa}.
119 2013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
121 * config/tc-mips.c (validate_mips_insn): Use STYPE rather than SHAMT.
123 2013-06-25 Maciej W. Rozycki <macro@codesourcery.com>
125 * config/tc-mips.c (mips_set_options): Add insn32 member.
126 (mips_opts): Initialize it.
127 (NOP_INSN, NOP_INSN_SIZE): Handle insn32 mode.
128 (options): Add OPTION_INSN32 and OPTION_NO_INSN32 enum values.
129 (md_longopts): Add "minsn32" and "mno-insn32" options.
130 (is_size_valid): Handle insn32 mode.
131 (md_assemble): Pass instruction string down to macro.
132 (brk_fmt): Add second dimension and insn32 mode initializers.
133 (mfhl_fmt): Likewise.
134 (BRK_FMT, MFHL_FMT): Handle insn32 mode.
135 (macro_build) <'c'>: Handle microMIPS 32-bit BREAK encoding.
136 (macro_build_jalr, move_register): Handle insn32 mode.
137 (macro_build_branch_rs): Likewise.
138 (macro): Handle insn32 mode.
139 <M_JRADDIUSP>, <M_JRC>, <M_MOVEP>: New cases.
140 (mips_ip): Handle insn32 mode.
141 (md_parse_option): Handle OPTION_INSN32 and OPTION_NO_INSN32.
142 (s_mipsset): Handle "insn32" and "noinsn32" pseudo-ops.
143 (mips_handle_align): Handle insn32 mode.
144 (md_show_usage): Add -minsn32 and -mno-insn32.
146 * doc/as.texinfo (Target MIPS options): Add -minsn32 and
148 (-minsn32, -mno-insn32): New options.
149 * doc/c-mips.texi (MIPS Opts): Add -minsn32 and -mno-insn32
151 (MIPS assembly options): New node. Document .set insn32 and
153 (MIPS-Dependent): List the new node.
155 2013-06-25 Nick Clifton <nickc@redhat.com>
157 * config/tc-msp430.c (msp430_srcoperand): Do not allow the use of
158 the PC in indirect addressing on 430xv2 parts.
159 (msp430_operands): Add version test to hardware bug encoding
162 2013-06-24 Roland McGrath <mcgrathr@google.com>
164 * config/tc-arm.c (parse_reg_list): Use skip_past_char for '}',
165 so it skips whitespace before it.
166 (s_arm_unwind_save_mmxwr, s_arm_unwind_save_mmxwcg): Likewise.
168 * config/tc-arm.c (arm_symbol_chars): Include '{' and '}'.
169 (arm_reg_parse_multi): Skip whitespace first.
170 (parse_reg_list): Likewise.
171 (parse_vfp_reg_list): Likewise.
172 (s_arm_unwind_save_mmxwcg): Likewise.
174 2013-06-24 Nick Clifton <nickc@redhat.com>
177 * config/tc-arm.c (do_t_smc): Mark as ending an IT block.
179 2013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
181 * config/tc-mips.c (mips_ip): Fix swapped bit numbers in comments.
183 2013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
185 * config/tc-mips.c: Assert that offsetT and valueT are at least
187 (GPR_SMIN, GPR_SMAX): New macros.
188 (macro, mips_ip): Remove code for 4-byte valueT and offsetT.
190 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
192 * config/tc-mips.c: Remove OBJ_ELF, OBJ_MAYBE_ELF and IS_ELF
193 conditions. Remove any code deselected by them.
194 (s_mips_frame, s_mips_mask): Handle ECOFF_DEBUGGING case first.
196 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
198 * NEWS: Note removal of ECOFF support.
199 * doc/as.texinfo (--emulation): Update for the removal of MIPS ECOFF.
200 * Makefile.am (TARG_ENV_HFILES): Remove config/te-lnews.h.
201 (MULTI_CFILES): Remove config/e-mipsecoff.c.
202 * Makefile.in: Regenerate.
203 * configure.in: Remove MIPS ECOFF references.
204 (mips-sony-bsd*, mips-*-bsd*, mips-*-lnews*-ecoff, mips-*-*-ecoff):
206 (mips-*-irix5*-*, mips*-*-linux*-*, mips*-*-freebsd*)
207 (mips*-*-kfreebsd*-gnu, mips-*-*-elf): Fold into...
208 (mips-*-*): ...this single case.
209 (mipsbecoff, mipslecoff, mipsecoff): Remove emulations. Expect
210 MIPS emulations to be e-mipself*.
211 * configure: Regenerate.
212 * configure.tgt (mips-sony-bsd*, mips-*-ultrix*, mips-*-osf*)
213 (mips-*-ecoff*, mips-*-pe*, mips-*-irix*, ips-*-lnews*, mips-*-riscos*)
214 (mips-*-sysv*): Remove coff and ecoff cases.
215 * as.c (mipsbecoff, mipslecoff, mipsecoff): Remove.
216 * ecoff.c: Remove reference to MIPS ECOFF.
217 * config/e-mipsecoff.c, config/te-lnews.h: Delete files.
218 * config/tc-mips.c (ECOFF_LITTLE_FORMAT): Delete.
219 (RDATA_SECTION_NAME, mips_target_form): Remove COFF and ECOFF cases.
220 (mips_hi_fixup): Tweak comment.
221 (append_insn): Require a howto.
222 (mips_after_parse_args): Remove OBJ_MAYBE_ECOFF code.
224 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
226 * doc/as.texinfo: Use MIPS rather than @sc{mips} throughout.
227 Use "CPU" instead of "cpu".
228 * doc/c-mips.texi: Likewise.
229 (MIPS Opts): Rename to MIPS Options.
230 (MIPS option stack): Rename to MIPS Option Stack.
231 (MIPS ASE instruction generation overrides): Rename to
232 MIPS ASE Instruction Generation Overrides (for now).
233 (MIPS floating-point): Rename to MIPS Floating-Point.
235 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
237 * doc/c-mips.texi (MIPS Macros): New section.
238 (MIPS Object): Replace with...
239 (MIPS Small Data): ...this new section.
241 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
243 * doc/c-mips.texi (MIPS symbol sizes): Move section further up file.
244 Capitalize name. Use @kindex instead of @cindex for .set entries.
246 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
248 * doc/c-mips.texi (MIPS Stabs): Remove section.
250 2013-06-20 Richard Sandiford <rdsandiford@googlemail.com>
252 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS, ISA_SUPPORTS_DSP_ASE)
253 (ISA_SUPPORTS_DSP64_ASE, ISA_SUPPORTS_DSPR2_ASE, ISA_SUPPORTS_EVA_ASE)
254 (ISA_SUPPORTS_MT_ASE, ISA_SUPPORTS_MCU_ASE, ISA_SUPPORTS_VIRT_ASE)
255 (ISA_SUPPORTS_VIRT64_ASE): Delete.
256 (mips_ase): New structure.
257 (mips_ases): New table.
258 (FP64_ASES): New macro.
259 (mips_ase_groups): New array.
260 (mips_isa_rev, mips_ase_mask, mips_check_isa_supports_ase)
261 (mips_check_isa_supports_ases, mips_set_ase, mips_lookup_ase): New
263 (is_opcode_valid): Use mips_ases to get the 64-bit ASE flags.
264 (md_parse_option): Use mips_ases and mips_set_ase instead of
265 separate case statements for each ASE option.
266 (mips_after_parse_args): Use FP64_ASES. Use
267 mips_check_isa_supports_ases to check the ASEs against
269 (s_mipsset): Use mips_ases and mips_set_ase instead of
270 separate if statements for each ASE option. Use
271 mips_check_isa_supports_ases, even when a non-ASE option
274 2013-06-19 Greta Yorsh <Greta.Yorsh@arm.com>
276 * config/tc-arm.c (arm_cpus): Add support for Cortex-A12.
278 2013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
280 * config/tc-mips.c (md_shortopts, options, md_longopts)
281 (md_longopts_size): Move earlier in file.
283 2013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
285 * config/tc-mips.c (mips_set_options): Replace separate "ase_*" fields
286 with a single "ase" bitmask.
287 (mips_opts): Update accordingly.
288 (file_ase, file_ase_explicit): New variables.
289 (file_ase_mips3d, file_ase_mdmx, file_ase_smartmips, file_ase_dsp)
290 (file_ase_dspr2, file_ase_eva, file_ase_mt, file_ase_virt): Delete.
291 (ISA_HAS_ROR): Adjust for mips_set_options change.
292 (is_opcode_valid): Take the base ase mask directly from mips_opts.
293 (mips_ip): Adjust for mips_set_options change.
294 (md_parse_option): Likewise. Update file_ase_explicit.
295 (mips_after_parse_args): Adjust for mips_set_options change.
296 Use bitmask operations to select the default ASEs. Set file_ase
297 rather than individual per-ASE variables.
298 (s_mipsset): Adjust for mips_set_options change.
299 (mips_elf_final_processing): Test file_ase rather than
300 file_ase_mdmx. Remove commented-out code.
302 2013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
304 * config/tc-mips.c (mips_cpu_info): Add an "ase" field.
305 (MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, MIPS_CPU_ASE_MT)
306 (MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX, MIPS_CPU_ASE_DSPR2)
307 (MIPS_CPU_ASE_MCU, MIPS_CPU_ASE_VIRT, MIPS_CPU_ASE_EVA): Delete.
308 (mips_after_parse_args): Use the new "ase" field to choose
310 (mips_cpu_info_table): Move ASEs from the "flags" field to the
313 2013-06-18 Richard Earnshaw <rearnsha@arm.com>
315 * config/tc-arm.c (symbol_preemptible): New function.
316 (relax_branch): Use it.
318 2013-06-17 Catherine Moore <clm@codesourcery.com>
319 Maciej W. Rozycki <macro@codesourcery.com>
320 Chao-Ying Fu <fu@mips.com>
322 * config/tc-mips.c (mips_set_options): Add ase_eva.
323 (mips_set_options mips_opts): Add ase_eva.
324 (file_ase_eva): Declare.
325 (ISA_SUPPORTS_EVA_ASE): Define.
326 (IS_SEXT_9BIT_NUM): Define.
327 (MIPS_CPU_ASE_EVA): Define.
328 (is_opcode_valid): Add support for ase_eva.
329 (macro_build): Likewise.
331 (validate_mips_insn): Likewise.
332 (validate_micromips_insn): Likewise.
334 (options): Add OPTION_EVA and OPTION_NO_EVA.
335 (md_longopts): Add -meva and -mno-eva.
336 (md_parse_option): Process new options.
337 (mips_after_parse_args): Check for valid EVA combinations.
338 (s_mipsset): Likewise.
340 2013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
342 * dwarf2dbg.h (dwarf2_move_insn): Declare.
343 * dwarf2dbg.c (line_subseg): Add pmove_tail.
344 (get_line_subseg): Add create_p argument. Initialize pmove_tail.
345 (dwarf2_gen_line_info_1): Update call accordingly.
346 (dwarf2_move_insn): New function.
347 * config/tc-mips.c (append_insn): Use dwarf2_move_insn.
349 2013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
353 2011-09-05 Richard Sandiford <rdsandiford@googlemail.com>
356 * dwarf2dbg.c (pending_lines, pending_lines_tail): New variables.
357 (dwarf2_gen_line_info_1): Delete.
358 (dwarf2_push_line, dwarf2_flush_pending_lines): New functions.
359 (dwarf2_gen_line_info, dwarf2_emit_label): Use them.
360 (dwarf2_consume_line_info): Call dwarf2_flush_pending_lines.
361 (dwarf2_directive_loc): Push previous .locs instead of generating
364 2013-06-13 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
366 * config/tc-mips.c (ISA_SUPPORTS_VIRT_ASE): Support micromips.
367 (ISA_SUPPORTS_VIRT64_ASE): Support 64-bit micromips.
369 2013-06-13 Nick Clifton <nickc@redhat.com>
372 * config/tc-m68k.h (TC_CHECK_ADJUSTED_BROKEN_DOT_WORD): Define.
373 * config/tc-m68k.c (tc_m68k_check_adjusted_broken_word): New
374 function. Generates an error if the adjusted offset is out of a
377 2013-06-12 Sandra Loosemore <sandra@codesourcery.com>
379 * config/tc-nios2.c (md_apply_fix): Mask constant
380 BFD_RELOC_NIOS2_HIADJ16 value to 16 bits.
382 2013-06-10 Maciej W. Rozycki <macro@codesourcery.com>
384 * config/tc-mips.c (append_insn): Don't do branch relaxation for
385 MIPS-3D instructions either.
386 (md_convert_frag): Update the COPx branch mask accordingly.
388 * config/tc-mips.c (md_show_usage): Document --[no-]relax-branch
390 * doc/as.texinfo (Overview): Add --relax-branch and
392 * doc/c-mips.texi (MIPS Opts): Document --relax-branch and
395 2013-06-09 Sandra Loosemore <sandra@codesourcery.com>
397 * config/tc-nios2.c (nios2_parse_args): Allow trap argument to
400 2013-06-08 Catherine Moore <clm@codesourcery.com>
402 * config/tc-mips.c (is_opcode_valid): Build ASE mask.
403 (is_opcode_valid_16): Pass ase value to opcode_is_member.
404 (append_insn): Change INSN_xxxx to ASE_xxxx.
406 2013-06-01 George Thomas <george.thomas@atmel.com>
408 * gas/config/tc-avr.c: Change ISA for devices with USB support to
411 2013-05-31 H.J. Lu <hongjiu.lu@intel.com>
413 * config/tc-i386.c (md_begin): Don't align text/data/bss sections
416 2013-05-31 Paul Brook <paul@codesourcery.com>
419 * config/tc-mips.c (s_ehword): New.
421 2013-05-30 Paul Brook <paul@codesourcery.com>
423 * config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH.
425 2013-05-29 Maciej W. Rozycki <macro@codesourcery.com>
427 * write.c (resolve_reloc_expr_symbols): On REL targets don't
428 convert relocs who have no relocatable field either. Rephrase
429 the conditional so that the PC-relative check is only applied
432 2013-05-28 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
434 * config/tc-mips.c (macro) <ld>: Don't use $zero for address
437 2013-05-28 Yufeng Zhang <yufeng.zhang@arm.com>
439 * config/tc-aarch64.c (reloc_table): Update to use
440 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 instead of
441 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE.
442 (md_apply_fix): Likewise.
443 (aarch64_force_relocation): Likewise.
445 2013-05-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
447 * config/tc-arm.c (it_fsm_post_encode): Improve
448 warning messages about deprecated IT block formats.
450 2013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com>
452 * config/tc-aarch64.c (md_apply_fix): Move value range checking
453 inside fx_done condition.
455 2013-05-22 Jürgen Urban <JuergenUrban@gmx.de>
457 * config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB.
459 2013-05-20 Peter Bergner <bergner@vnet.ibm.com>
461 * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error
462 and clean up warning when using PRINT_OPCODE_TABLE.
464 2013-05-20 Alan Modra <amodra@gmail.com>
466 * config/tc-ppc.c (md_apply_fix): Hoist code common to insn
467 and data fixups performing shift/high adjust/sign extension on
468 fieldval. Sink fx_pcrel handling and checks. Use fixP->fx_size
469 when writing data fixups rather than recalculating size.
471 2013-05-16 Jan-Benedict Glaw <jbglaw@lug-owl.de>
473 * doc/c-msp430.texi: Fix typo.
475 2013-05-16 Tristan Gingold <gingold@adacore.com>
477 * config/tc-ppc.c (ppc_is_toc_sym): Symbols of class XMC_TC
478 are also TOC symbols.
480 2013-05-16 Nick Clifton <nickc@redhat.com>
482 * config/tc-msp430.c: Make -mmcu recognise more part numbers.
483 Add -mcpu command to specify core type.
484 * doc/c-msp430.texi: Update documentation.
486 2013-05-09 Andrew Pinski <apinski@cavium.com>
488 * config/tc-mips.c (struct mips_set_options): New ase_virt field.
489 (mips_opts): Update for the new field.
490 (file_ase_virt): New variable.
491 (ISA_SUPPORTS_VIRT_ASE): New macro.
492 (ISA_SUPPORTS_VIRT64_ASE): New macro.
493 (MIPS_CPU_ASE_VIRT): New define.
494 (is_opcode_valid): Handle ase_virt.
495 (macro_build): Handle "+J".
496 (validate_mips_insn): Likewise.
498 (enum options): Add OPTION_VIRT and OPTION_NO_VIRT.
499 (md_longopts): Add mvirt and mnovirt
500 (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT.
501 (mips_after_parse_args): Handle ase_virt field.
502 (s_mipsset): Handle "virt" and "novirt".
503 (mips_elf_final_processing): Add a comment about virt ASE might need
505 (md_show_usage): Print out the usage of -mvirt and mno-virt options.
506 * doc/c-mips.texi: Document -mvirt and -mno-virt.
507 Document ".set virt" and ".set novirt".
509 2013-05-09 Alan Modra <amodra@gmail.com>
511 * config/tc-ppc.c (md_apply_fix): Sign extend fieldval under
512 control of operand flag bits.
514 2013-05-07 Alan Modra <amodra@gmail.com>
516 * config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro.
517 (PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D): Likewise.
518 (PPC_VLE_HI16A, PPC_VLE_HI16D): Likewise.
519 (PPC_VLE_HA16A, PPC_VLE_HA16D): Likewise.
520 (md_apply_fix): Set fx_no_overflow for assorted relocations.
521 Shift and sign-extend fieldval for use by some VLE reloc
522 operand->insert functions.
524 2013-05-06 Paul Brook <paul@codesourcery.com>
525 Catherine Moore <clm@codesourcery.com>
527 * config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL.
528 (limited_pcrel_reloc_p): Likewise.
529 (md_apply_fix): Likewise.
530 (tc_gen_reloc): Likewise.
532 2013-05-06 Richard Sandiford <rdsandiford@googlemail.com>
534 * config/tc-mips.c (limited_pcrel_reloc_p): New function.
535 (mips_fix_adjustable): Adjust pc-relative check to use
538 2013-05-02 Richard Sandiford <rdsandiford@googlemail.com>
540 * config/tc-mips.c (mips_pseudo_table): Add stabd and stabs entries.
541 (s_mips_stab): Do not restrict to stabn only.
543 2013-05-02 Nick Clifton <nickc@redhat.com>
545 * config/tc-msp430.c: Add support for the MSP430X architecture.
546 Add code to insert a NOP instruction after any instruction that
547 might change the interrupt state.
548 Add support for the LARGE memory model.
549 Add code to initialise the .MSP430.attributes section.
550 * config/tc-msp430.h: Add support for the MSP430X architecture.
551 * doc/c-msp430.texi: Document the new -mL and -mN command line
553 * NEWS: Mention support for the MSP430X architecture.
555 2013-05-01 Maciej W. Rozycki <macro@codesourcery.com>
557 * configure.tgt: Replace alpha*-*-linuxecoff* pattern with
558 alpha*-*-linux*ecoff*.
560 2013-04-30 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
562 * config/tc-mips.c (mips_ip): Add sizelo.
563 For "+C", "+G", and "+H", set sizelo and compare against it.
565 2013-04-29 Nick Clifton <nickc@redhat.com>
567 * as.c (Options): Add -gdwarf-sections.
568 (parse_args): Likewise.
569 * as.h (flag_dwarf_sections): Declare.
570 * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes.
571 (process_entries): When -gdwarf-sections is enabled generate
572 fragmentary .debug_line sections.
573 (out_debug_line): Set the section for the .debug_line section end
575 * doc/as.texinfo: Document -gdwarf-sections.
576 * NEWS: Mention -gdwarf-sections.
578 2013-04-26 Christian Groessler <chris@groessler.org>
580 * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdline
581 according to the target parameter. Don't call s_segm since s_segm
582 calls bfd_set_arch_mach using stdoutput, but stdoutput isn't
584 (md_begin): Call s_segm according to target parameter from command
587 2013-04-25 Alan Modra <amodra@gmail.com>
589 * configure.in: Allow little-endian linux.
590 * configure: Regenerate.
592 2013-04-24 Sandra Loosemore <sandra@codesourcery.com>
594 * config/tc-nios2.c (nios2_control_register_arg_p): Rename
595 "fstatus" control register to "eccinj".
597 2013-04-19 Kai Tietz <ktietz@redhat.com>
599 * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin.
601 2013-04-15 Julian Brown <julian@codesourcery.com>
603 * expr.c (add_to_result, subtract_from_result): Make global.
604 * expr.h (add_to_result, subtract_from_result): Add prototypes.
605 * config/tc-sh.c (sh_optimize_expr): Use add_to_result,
606 subtract_from_result to handle extra bit of precision for .sleb128
609 2013-04-10 Julian Brown <julian@codesourcery.com>
611 * read.c (convert_to_bignum): Add sign parameter. Use it
612 instead of X_unsigned to determine sign of resulting bignum.
613 (emit_expr): Pass extra argument to convert_to_bignum.
614 (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass
615 X_extrabit to convert_to_bignum.
616 (parse_bitfield_cons): Set X_extrabit.
617 * expr.c (make_expr_symbol, expr_build_uconstant, operand):
618 Initialise X_extrabit field as appropriate.
619 (add_to_result): New.
620 (subtract_from_result): New.
622 * expr.h (expressionS): Add X_extrabit field.
624 2013-04-10 Jan Beulich <jbeulich@suse.com>
626 * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base
627 register being PC when is_t or writeback, and use distinct
628 diagnostic for the latter case.
630 2013-04-10 Jan Beulich <jbeulich@suse.com>
632 * gas/config/tc-arm.c (parse_operands): Re-write
634 (do_barrier): Remove bogus constraint().
635 (do_t_barrier): Remove.
637 2013-04-09 Joerg Wunsch <joerg.wunsch@atmel.com>
639 * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2,
640 ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2,
642 * gas/doc/c-avr.texi (-mmcu documentation): Likewise.
644 2013-04-09 Jan Beulich <jbeulich@suse.com>
646 * gas/config/tc-arm.c (do_vmrs): Accept all control registers.
647 Use local variable Rt in more places.
648 (do_vmsr): Accept all control registers.
650 2013-04-09 Jan Beulich <jbeulich@suse.com>
652 * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix
653 if there was none specified for moves between scalar and core
656 2013-04-09 Jan Beulich <jbeulich@suse.com>
658 * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the
661 2013-04-08 Jan Beulich <jbeulich@suse.com>
663 * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for
666 2013-04-08 Jan Beulich <jbeulich@suse.com>
668 * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq
671 2013-04-03 Alan Modra <amodra@gmail.com>
673 * doc/as.texinfo: Add support to generate man options for h8300.
674 * doc/c-h8300.texi: Likewise.
676 2013-03-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
678 * config/tc-arm.c (arm_cpus): Add support for Cortex-A53 and
681 2013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com>
684 * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array.
686 2013-03-26 Nick Clifton <nickc@redhat.com>
689 * listing.c (rebuffer_line): Rewrite to avoid seeking back to the
690 start of the file each time.
693 * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for
696 2013-03-26 Douglas B Rupp <rupp@gnat.com>
698 * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment
701 2013-03-21 Will Newton <will.newton@linaro.org>
703 * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all
704 pc-relative str instructions in Thumb mode.
706 2013-03-21 Michael Schewe <michael.schewe@gmx.net>
708 * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
709 @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
711 * config/tc-h8300.h: Remove duplicated defines.
713 2013-03-21 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
716 * tc-avr.c (mcu_has_3_byte_pc): New function.
717 (tc_cfi_frame_initial_instructions): Call it to find return
720 2013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com>
723 * config/tc-tic6x.c (tic6x_try_encode): Handle
724 tic6x_coding_dreg_(msb|lsb) field coding types and use it to
725 encode register pair numbers when required.
727 2013-03-15 Will Newton <will.newton@linaro.org>
729 * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register
730 in vstr in Thumb mode for pre-ARMv7 cores.
732 2013-03-14 Andreas Schwab <schwab@suse.de>
734 * doc/c-arc.texi (ARC Directives): Revert last change and use
735 @itemize instead of @table.
736 * doc/c-arm.texi (ARM-Instruction-Set): Likewise.
738 2013-03-14 Nick Clifton <nickc@redhat.com>
741 * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a
742 NULL message, instead just check ARM_CPU_IS_ANY directly.
744 2013-03-14 Nick Clifton <nickc@redhat.com>
747 * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet
749 * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text
750 to the @item directives.
751 (ARM-Neon-Alignment): Move to correct place in the document.
752 * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
754 * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
757 2013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
759 * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o'
760 case. Add default BAD_CASE to switch.
762 2013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
764 * config/tc-nios2.c (nios2_assemble_args_ds): New function.
765 (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
767 2013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
769 * config/tc-arm.c (crc_ext_armv8): New feature set.
770 (UNPRED_REG): New macro.
771 (do_crc32_1): New function.
772 (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
773 do_crc32ch, do_crc32cw): Likewise.
775 (insns): Add entries for crc32 mnemonics.
776 (arm_extensions): Add entry for crc.
778 2013-03-08 Chung-Lin Tang <cltang@codesourcery.com>
780 * write.h (struct fix): Add fx_dot_frag field.
782 * write.c (dot_frag): New variable.
783 (fix_new_internal): Set fx_dot_frag field with dot_frag.
784 (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
785 * expr.c (expr): Save value of frag_now in dot_frag when setting
787 * read.c (emit_expr): Likewise. Delete comments.
789 2013-03-07 H.J. Lu <hongjiu.lu@intel.com>
791 * config/tc-i386.c (flag_code_names): Removed.
792 (i386_index_check): Rewrote.
794 2013-03-05 Yufeng Zhang <yufeng.zhang@arm.com>
796 * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
798 (aarch64_double_precision_fmovable): New function.
799 (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
800 function; handle hexadecimal representation of IEEE754 encoding.
801 (parse_operands): Update the call to parse_aarch64_imm_float.
803 2013-02-28 H.J. Lu <hongjiu.lu@intel.com>
805 * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
806 (check_hle): Updated.
807 (md_assemble): Likewise.
808 (parse_insn): Likewise.
810 2013-02-28 H.J. Lu <hongjiu.lu@intel.com>
812 * config/tc-i386.c (_i386_insn): Add rep_prefix.
813 (md_assemble): Check if REP prefix is OK.
814 (parse_insn): Remove expecting_string_instruction. Set
817 2013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
819 * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
821 2013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
823 * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
824 for system registers.
826 2013-02-27 DJ Delorie <dj@redhat.com>
828 * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
829 (rl78_op): Handle %code().
830 (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
831 (tc_gen_reloc): Likwise; convert to a computed reloc.
832 (md_apply_fix): Likewise.
834 2013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
836 * config/rl78-parse.y: Fix encoding of DIVWU insn.
838 2013-02-25 Terry Guo <terry.guo@arm.com>
840 * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
841 * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
842 list of accepted CPUs.
844 2013-02-19 H.J. Lu <hongjiu.lu@intel.com>
847 * config/tc-i386.c (cpu_arch): Add ".smap".
849 * doc/c-i386.texi: Document smap.
851 2013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
853 * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
854 mips_assembling_insn appropriately.
855 (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
857 2013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
859 * config/tc-mips.c (append_insn): Correct indentation, remove
862 2013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
864 * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
866 2013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
868 * configure.tgt: Add nios2-*-rtems*.
870 2013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
872 * config/tc-aarch64.c (md_begin): Change to check if 'name' is
875 2013-02-09 Jürgen Urban <JuergenUrban@gmx.de>
877 * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
878 (macro): Use it. Assert that trunc.w.s is not used for r5900.
880 2013-02-08 Yi-Hsiu, Hsu <ahsu@marvell.com>
882 * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4
885 2013-02-06 Sandra Loosemore <sandra@codesourcery.com>
886 Andrew Jenner <andrew@codesourcery.com>
888 Based on patches from Altera Corporation.
890 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
891 (TARGET_CPU_HFILES): Add config/tc-nios2.h.
892 * Makefile.in: Regenerated.
893 * configure.tgt: Add case for nios2*-linux*.
894 * config/obj-elf.c: Conditionally include elf/nios2.h.
895 * config/tc-nios2.c: New file.
896 * config/tc-nios2.h: New file.
897 * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
898 * doc/Makefile.in: Regenerated.
899 * doc/all.texi: Set NIOSII.
900 * doc/as.texinfo (Overview): Add Nios II options.
901 (Machine Dependencies): Include c-nios2.texi.
902 * doc/c-nios2.texi: New file.
903 * NEWS: Note Altera Nios II support.
905 2013-02-06 Alan Modra <amodra@gmail.com>
908 * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
909 Don't skip fixups with fx_subsy non-NULL.
910 * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
911 with fx_subsy non-NULL.
913 2013-02-04 H.J. Lu <hongjiu.lu@intel.com>
915 * doc/c-metag.texi: Add "@c man" markers.
917 2013-02-04 Alan Modra <amodra@gmail.com>
919 * write.c (fixup_segment): Return void. Delete seg_reloc_count
921 (TC_ADJUST_RELOC_COUNT): Delete.
922 * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
924 2013-02-04 Alan Modra <amodra@gmail.com>
926 * po/POTFILES.in: Regenerate.
928 2013-01-30 Markos Chandras <markos.chandras@imgtec.com>
930 * config/tc-metag.c: Make SWAP instruction less permissive with
933 2013-01-29 DJ Delorie <dj@redhat.com>
935 * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
936 relocs in .word/.etc statements.
938 2013-01-29 Roland McGrath <mcgrathr@google.com>
940 * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
941 immediate value for 8-bit offset" error so it shows line info.
943 2013-01-24 Joseph Myers <joseph@codesourcery.com>
945 * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
948 2013-01-24 Nick Clifton <nickc@redhat.com>
950 * config/tc-v850.c: Add support for e3v5 architecture.
951 * doc/c-v850.texi: Mention new support.
953 2013-01-23 Nick Clifton <nickc@redhat.com>
956 * config/tc-avr.c: Include dwarf2dbg.h.
958 2013-01-18 H.J. Lu <hongjiu.lu@intel.com>
960 * config/tc-i386.c (reloc): Support size relocation only for ELF.
961 (tc_i386_fix_adjustable): Likewise.
963 (tc_gen_reloc): Likewise.
965 2013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
967 * config/tc-aarch64.c (output_operand_error_record): Change to output
968 the out-of-range error message as value-expected message if there is
969 only one single value in the expected range.
970 (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
971 LSL #0 as a programmer-friendly feature.
973 2013-01-16 H.J. Lu <hongjiu.lu@intel.com>
975 * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
976 (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
977 BFD_RELOC_64_SIZE relocations.
978 (lex_got): Support "symbol@SIZE" and don't create GOT symbol
980 (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
981 relocations against local symbols.
983 2013-01-16 Alan Modra <amodra@gmail.com>
985 * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
986 finding some sort of toc syntax error, and break to avoid
987 compiler uninit warning.
989 2013-01-15 H.J. Lu <hongjiu.lu@intel.com>
992 * config/tc-i386.c (lex_got): Increment length by 1 if the
993 relocation token is removed.
995 2013-01-15 Nick Clifton <nickc@redhat.com>
997 * config/tc-v850.c (md_assemble): Allow signed values for
1000 2013-01-11 Sean Keys <skeys@ipdatasys.com>
1002 * config/tc-xgate.c (md_begin): Fix mistake made when going from
1005 2013-01-10 Peter Bergner <bergner@vnet.ibm.com>
1007 * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
1008 * doc/c-ppc.texi (PowerPC-Opts): Likewise.
1009 * config/tc-ppc.c (md_show_usage): Likewise.
1010 (ppc_handle_align): Handle power8's group ending nop.
1012 2013-01-10 Sean Keys <skeys@ipdatasys.com>
1014 * config/tc-xgate.c (md_begin): Fix the printing of opcodes so
1015 that the assember exits after the opcodes have been printed.
1017 2013-01-10 H.J. Lu <hongjiu.lu@intel.com>
1019 * app.c: Remove trailing white spaces.
1023 * dw2gencfi.c: Likewise.
1024 * dwarf2dbg.h: Likewise.
1025 * ecoff.c: Likewise.
1026 * input-file.c: Likewise.
1027 * itbl-lex.h: Likewise.
1028 * output-file.c: Likewise.
1031 * subsegs.c: Likewise.
1032 * symbols.c: Likewise.
1033 * write.c: Likewise.
1034 * config/tc-i386.c: Likewise.
1035 * doc/Makefile.am: Likewise.
1036 * doc/Makefile.in: Likewise.
1037 * doc/c-aarch64.texi: Likewise.
1038 * doc/c-alpha.texi: Likewise.
1039 * doc/c-arc.texi: Likewise.
1040 * doc/c-arm.texi: Likewise.
1041 * doc/c-avr.texi: Likewise.
1042 * doc/c-bfin.texi: Likewise.
1043 * doc/c-cr16.texi: Likewise.
1044 * doc/c-d10v.texi: Likewise.
1045 * doc/c-d30v.texi: Likewise.
1046 * doc/c-h8300.texi: Likewise.
1047 * doc/c-hppa.texi: Likewise.
1048 * doc/c-i370.texi: Likewise.
1049 * doc/c-i386.texi: Likewise.
1050 * doc/c-i860.texi: Likewise.
1051 * doc/c-m32c.texi: Likewise.
1052 * doc/c-m32r.texi: Likewise.
1053 * doc/c-m68hc11.texi: Likewise.
1054 * doc/c-m68k.texi: Likewise.
1055 * doc/c-microblaze.texi: Likewise.
1056 * doc/c-mips.texi: Likewise.
1057 * doc/c-msp430.texi: Likewise.
1058 * doc/c-mt.texi: Likewise.
1059 * doc/c-s390.texi: Likewise.
1060 * doc/c-score.texi: Likewise.
1061 * doc/c-sh.texi: Likewise.
1062 * doc/c-sh64.texi: Likewise.
1063 * doc/c-tic54x.texi: Likewise.
1064 * doc/c-tic6x.texi: Likewise.
1065 * doc/c-v850.texi: Likewise.
1066 * doc/c-xc16x.texi: Likewise.
1067 * doc/c-xgate.texi: Likewise.
1068 * doc/c-xtensa.texi: Likewise.
1069 * doc/c-z80.texi: Likewise.
1070 * doc/internals.texi: Likewise.
1072 2013-01-10 Roland McGrath <mcgrathr@google.com>
1074 * hash.c (hash_new_sized): Make it global.
1075 * hash.h: Declare it.
1076 * macro.c (define_macro): Use hash_new_sized instead of hash_new,
1079 2013-01-10 Will Newton <will.newton@imgtec.com>
1081 * Makefile.am: Add Meta.
1082 * Makefile.in: Regenerate.
1083 * config/tc-metag.c: New file.
1084 * config/tc-metag.h: New file.
1085 * configure.tgt: Add Meta.
1086 * doc/Makefile.am: Add Meta.
1087 * doc/Makefile.in: Regenerate.
1088 * doc/all.texi: Add Meta.
1089 * doc/as.texiinfo: Document Meta options.
1090 * doc/c-metag.texi: New file.
1092 2013-01-09 Steve Ellcey <sellcey@mips.com>
1094 * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
1096 * config/tc-mips.c (internalError): Remove, replace with abort.
1098 2013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
1100 * config/tc-aarch64.c (parse_operands): Change to compare the result
1101 of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
1103 2013-01-07 Nick Clifton <nickc@redhat.com>
1106 * config/tc-arm.c (skip_past_char): Skip whitespace before the
1107 anticipated character.
1108 * config/tc-arm.c (parse_address_main): Delete skip of whitespace
1109 here as it is no longer needed.
1111 2013-01-06 Andreas Schwab <schwab@linux-m68k.org>
1113 * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
1114 * doc/c-score.texi (SCORE-Opts): Likewise.
1115 * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
1117 2013-01-04 Juergen Urban <JuergenUrban@gmx.de>
1119 * config/tc-mips.c: Add support for MIPS r5900.
1120 Add M_LQ_AB and M_SQ_AB to support large values for instructions
1122 (can_swap_branch_p, get_append_method): Detect some conditional
1123 short loops to fix a bug on the r5900 by NOP in the branch delay
1125 (M_MUL): Support 3 operands in multu on r5900.
1126 (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
1127 (s_mipsset): Force 32 bit floating point on r5900.
1128 (mips_ip): Check parameter range of instructions mfps and mtps on
1130 * configure.in: Detect CPU type when target string contains r5900
1131 (e.g. mips64r5900el-linux-gnu).
1133 2013-01-02 H.J. Lu <hongjiu.lu@intel.com>
1135 * as.c (parse_args): Update copyright year to 2013.
1137 2013-01-02 Yufeng Zhang <yufeng.zhang@arm.com>
1139 * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
1142 2013-01-02 Nick Clifton <nickc@redhat.com>
1145 * config/tc-arm.c (parse_address_main): Skip whitespace before a
1148 For older changes see ChangeLog-2012
1150 Copyright (C) 2013 Free Software Foundation, Inc.
1152 Copying and distribution of this file, with or without modification,
1153 are permitted in any medium without royalty provided the copyright
1154 notice and this notice are preserved.
1160 version-control: never