3 * arm-symbianelf support removed.
5 * Add support for Realm Management Extension (RME) for AArch64.
9 * Add support for Intel AVX VNNI instructions.
11 * Add support for Intel HRESET instruction.
13 * Add support for Intel UINTR instructions.
15 * Support non-absolute segment values for i386 lcall and ljmp.
17 * When setting the link order attribute of ELF sections, it is now possible to
18 use a numeric section index instead of symbol name.
20 * Add support for Cortex-A78, Cortex-A78AE, Cortex-A78C and Cortex-X1 for
22 Add support for Cortex-R82, Neoverse V1, and Neoverse N2 for ARM.
24 * Add support for ETMv4 (Embedded Trace Macrocell), ETE (Embedded Trace
25 Extension), TRBE (Trace Buffer Extension)and BRBE (Branch Record Buffer
26 Extension) system registers for AArch64.
28 * Add support for Armv8-R and Armv8.7-A AArch64.
30 * Add support for DSB memory nXS barrier, WFET and WFIT instruction for Armv8.7
33 * Add support for +flagm feature for -march in Armv8.4 AArch64.
35 * Add support for +ls64 feature for -march in Armv8.7 AArch64. Add atomic
36 64-byte load/store instructions for this feature.
38 * Add support for +pauth (Pointer Authentication) feature for -march in
41 * Add support for Intel TDX instructions.
43 * Add support for Intel Key Locker instructions.
45 * Added a .nop directive to generate a single no-op instruction in a target
46 neutral manner. This instruction does have an effect on DWARF line number
47 generation, if that is active.
49 * Removed --reduce-memory-overheads and --hash-size as gas now
50 uses hash tables that can be expand and shrink automatically.
52 * Add {disp16} pseudo prefix to x86 assembler.
54 * Add support for Intel AMX instructions.
56 * Configure with --enable-x86-used-note by default for Linux/x86.
58 * Add support for the SHF_GNU_RETAIN flag, which can be applied to
59 sections using the 'R' flag in the .section directive.
60 SHF_GNU_RETAIN specifies that the section should not be garbage
61 collected by the linker. It requires the GNU or FreeBSD ELF OSABIs.
65 * X86 NaCl target support is removed.
67 * Extend .symver directive to update visibility of the original symbol
68 and assign one original symbol to different versioned symbols.
70 * Add support for Intel SERIALIZE and TSXLDTRK instructions.
72 * Add -mlfence-after-load=, -mlfence-before-indirect-branch= and
73 -mlfence-before-ret= options to x86 assembler to help mitigate
76 * Add --gdwarf-5 option to the assembler to generate DWARF 5 debug output
77 (if such output is being generated). Added the ability to generate
78 version 5 .debug_line sections.
80 * Add -mbig-obj support to i386 MingW targets.
84 * Add -malign-branch-boundary=NUM, -malign-branch=TYPE[+TYPE...],
85 -malign-branch-prefix-size=NUM and -mbranches-within-32B-boundaries
86 options to x86 assembler to align branches within a fixed boundary
87 with segment prefixes or NOPs.
89 * Add support for Zilog eZ80 and Zilog Z180 CPUs.
91 * Add support for z80-elf target.
93 * Add support for relocation of each byte or word of multibyte value to Z80
94 targets (just use right shift to 0, 8, 16, or 24 bits or AND operation
95 with 0xff/0xffff mask): ld a, label >> 16 \ ld hl, label & 0xffff
97 * Add SDCC support for Z80 targets.
101 * Add support for the Arm Scalable Vector Extension version 2 (SVE2)
104 * Add support for the Arm Transactional Memory Extension (TME)
107 * Add support for the Armv8.1-M Mainline and M-profile Vector Extension (MVE)
110 * For MIPS, Add -m[no-]fix-loongson3-llsc option to fix (or not) Loongson3
111 LLSC Errata. Add a --enable-mips-fix-loongson3-llsc=[yes|no] configure
112 time option to set the default behavior. Set the default if the configure
113 option is not used to "no".
115 * Add support for the Arm Cortex-A76AE, Cortex-A77 and Cortex-M35P
118 * Add support for the AArch64 Cortex-A34, Cortex-A65, Cortex-A65AE,
119 Cortex-A76AE, and Cortex-A77 processors.
121 * Add .float16 directive for both Arm and AArch64 to allow encoding of 16-bit
122 floating point literals. Add .float16_format directive and
123 -mfp16-format=[ieee|alternative] option for Arm to control the format of the
126 * Add --gdwarf-cie-version command line flag. This allows control over which
127 version of DWARF CIE the assembler creates.
131 * Add -mvexwig=[0|1] option to x86 assembler to control encoding of
132 VEX.W-ignored (WIG) VEX instructions.
134 * Add -mx86-used-note=[yes|no] option to generate (or not) x86 GNU property
135 notes. Add a --enable-x86-used-note configure time option to set the
136 default behavior. Set the default if the configure option is not used
139 * Add support for the MIPS Loongson EXTensions R2 (EXT2) instructions.
141 * Add support for the MIPS Loongson EXTensions (EXT) instructions.
143 * Add support for the MIPS Loongson Content Address Memory (CAM) ASE.
145 * Add support for the C-SKY processor series.
147 * Add support for the MIPS Loongson MultiMedia extensions Instructions (MMI)
152 * The ADR and ADRL pseudo-instructions supported by the ARM assembler
153 now only set the bottom bit of the address of thumb function symbols
154 if the -mthumb-interwork command line option is active.
156 * Add support for the MIPS Global INValidate (GINV) ASE.
158 * Add support for the MIPS Cyclic Redudancy Check (CRC) ASE.
160 * Add support for the Freescale S12Z architecture.
162 * Add --generate-missing-build-notes=[yes|no] option to create (or not) GNU
163 Build Attribute notes if none are present in the input sources. Add a
164 --enable-generate-build-notes=[yes|no] configure time option to set the
165 default behaviour. Set the default if the configure option is not used
168 * Remove -mold-gcc command-line option for x86 targets.
170 * Add -O[2|s] command-line options to x86 assembler to enable alternate
171 shorter instruction encoding.
173 * Add support for .nops directive. It is currently supported only for
178 * Add support for loaction views in DWARF debug line information.
182 * Add support for ELF SHF_GNU_MBIND.
184 * Add support for the WebAssembly file format and wasm32 ELF conversion.
186 * PowerPC gas now checks that the correct register class is used in
187 instructions. For instance, "addi %f4,%cr3,%r31" warns three times
188 that the registers are invalid.
190 * Add support for the Texas Instruments PRU processor.
192 * Support for the ARMv8-R architecture and Cortex-R52 processor has been
193 added to the ARM port.
197 * Add support for the RISC-V architecture.
199 * Add support for the ARM Cortex-M23 and Cortex-M33 processors.
203 * Default to --enable-compressed-debug-sections=gas for Linux/x86 targets.
205 * Add --no-pad-sections to stop the assembler from padding the end of output
206 sections up to their alignment boundary.
208 * Support for the ARMv8-M architecture has been added to the ARM port. Support
209 for the ARMv8-M Security and DSP Extensions has also been added to the ARM
212 * ARC backend accepts .extInstruction, .extCondCode, .extAuxRegister, and
213 .extCoreRegister pseudo-ops that allow an user to define custom
214 instructions, conditional codes, auxiliary and core registers.
216 * Add a configure option --enable-elf-stt-common to decide whether ELF
217 assembler should generate common symbols with the STT_COMMON type by
218 default. Default to no.
220 * New command-line option --elf-stt-common= for ELF targets to control
221 whether to generate common symbols with the STT_COMMON type.
223 * Add ability to set section flags and types via numeric values for ELF
226 * Add a configure option --enable-x86-relax-relocations to decide whether
227 x86 assembler should generate relax relocations by default. Default to
228 yes, except for x86 Solaris targets older than Solaris 12.
230 * New command-line option -mrelax-relocations= for x86 target to control
231 whether to generate relax relocations.
233 * New command-line option -mfence-as-lock-add=yes for x86 target to encode
234 lfence, mfence and sfence as "lock addl $0x0, (%[re]sp)".
236 * Add assembly-time relaxation option for ARC cpus.
238 * Add --with-cpu=TYPE configure option for ARC gas. This allows the default
239 cpu type to be adjusted at configure time.
243 * Add a configure option --enable-compressed-debug-sections={all,gas} to
244 decide whether DWARF debug sections should be compressed by default.
246 * Add support for the ARC EM/HS, and ARC600/700 architectures. Remove
247 assembler support for Argonaut RISC architectures.
249 * Symbol and label names can now be enclosed in double quotes (") which allows
250 them to contain characters that are not part of valid symbol names in high
253 * Added the correctly spelled -march=armv6kz, for ARMv6KZ support. The
254 previous spelling, -march=armv6zk, is still accepted.
256 * Support for the ARMv8.1 architecture has been added to the Aarch64 port.
257 Support for the individual ARMv8.1 Adv.SIMD, LOR and PAN architecture
258 extensions has also been added to the Aarch64 port.
260 * Support for the ARMv8.1 architecture has been added to the ARM port. Support
261 for the individual ARMv8.1 Adv.SIMD and PAN architecture extensions has also
262 been added to the ARM port.
264 * Extend --compress-debug-sections option to support
265 --compress-debug-sections=[none|zlib|zlib-gnu|zlib-gabi] for ELF
268 * --compress-debug-sections is turned on for Linux/x86 by default.
272 * Add support for the AVR Tiny microcontrollers.
274 * Replace support for openrisc and or32 with support for or1k.
276 * Enhanced the ARM port to accept the assembler output from the CodeComposer
277 Studio tool. Support is enabled via the new command-line option -mccs.
279 * Add support for the Andes NDS32.
283 * Add support for the Texas Instruments MSP430X processor.
285 * Add -gdwarf-sections command-line option to enable per-code-section
286 generation of DWARF .debug_line sections.
288 * Add support for Altera Nios II.
290 * Add support for the Imagination Technologies Meta processor.
292 * Add support for the v850e3v5.
294 * Remove assembler support for MIPS ECOFF targets.
298 * Add support for the 64-bit ARM architecture: AArch64.
300 * Add support for S12X processor.
302 * Add support for the VLE extension to the PowerPC architecture.
304 * Add support for the Freescale XGATE architecture.
306 * Add support for .bundle_align_mode, .bundle_lock, and .bundle_unlock
307 directives. These are currently available only for x86 and ARM targets.
309 * Add support for the Renesas RL78 architecture.
311 * Add support for the Adapteva EPIPHANY architecture.
313 * For x86, allow 'rep bsf', 'rep bsr', and 'rep ret' syntax.
317 * Add support for the Tilera TILEPro and TILE-Gx architectures.
321 * Gas no longer requires doubling of ampersands in macros.
323 * Add support for the TMS320C6000 (TI C6X) processor family.
325 * GAS now understands an extended syntax in the .section directive flags
326 for COFF targets that allows the section's alignment to be specified. This
327 feature has also been backported to the 2.20 release series, starting with
330 * Add support for the Renesas RX processor.
332 * New command-line option, --compress-debug-sections, which requests
333 compression of DWARF debug information sections in the relocatable output
334 file. Compressed debug sections are supported by readelf, objdump, and
335 gold, but not currently by Gnu ld.
339 * Added support for v850e2 and v850e2v3.
341 * GNU/Linux targets now supports "gnu_unique_object" as a value in the .type
342 pseudo op. It marks the symbol as being globally unique in the entire
345 * ARM assembler now supports .inst[.nw] pseudo-ops to insert opcodes specified
346 in binary rather than text.
348 * Add support for common symbol alignment to PE formats.
350 * Add support for the new discriminator column in the DWARF line table,
351 with a discriminator operand for the .loc directive.
353 * Add support for Sunplus score architecture.
355 * The .type pseudo-op now accepts a type of STT_GNU_IFUNC which can be used to
356 indicate that if the symbol is the target of a relocation, its value should
357 not be use. Instead the function should be invoked and its result used as
360 * Add support for Lattice Mico32 (lm32) architecture.
362 * Add support for Xilinx MicroBlaze architecture.
366 * New pseudo op .cfi_val_encoded_addr, to record constant addresses in unwind
367 tables without runtime relocation.
369 * New command-line option, -h-tick-hex, for sh, m32c, and h8/300 targets, which
370 adds compatibility with H'00 style hex constants.
372 * New command-line option, -msse-check=[none|error|warning], for x86
375 * New sub-option added to the assembler's -a command-line switch to
376 generate a listing output. The 'g' sub-option will insert into the listing
377 various information about the assembly, such as assembler version, the
378 command-line options used, and a time stamp.
380 * New command-line option -msse2avx for x86 target to encode SSE
381 instructions with VEX prefix.
383 * Add Intel XSAVE, EPT, MOVBE, AES, PCLMUL, AVX/FMA support for x86 target.
385 * New command-line options, -march=CPU[,+EXTENSION...], -mtune=CPU,
386 -mmnemonic=[att|intel], -msyntax=[att|intel], -mindex-reg,
387 -mnaked-reg and -mold-gcc, for x86 targets.
389 * Support for generating wide character strings has been added via the new
390 pseudo ops: .string16, .string32 and .string64.
392 * Support for SSE5 has been added to the i386 port.
396 * The GAS sources are now released under the GPLv3.
398 * Support for the National Semiconductor CR16 target has been added.
400 * Added gas .reloc pseudo. This is a low-level interface for creating
403 * Add support for x86_64 PE+ target.
405 * Add support for Score target.
409 * Support for the Infineon XC16X has been added by KPIT Cummins Infosystems.
411 * Support for ms2 architecture has been added.
413 * Support for the Z80 processor family has been added.
415 * Add support for the "@<file>" syntax to the command line, so that extra
416 switches can be read from <file>.
418 * The SH target supports a new command-line switch --enable-reg-prefix which,
419 if enabled, will allow register names to be optionally prefixed with a $
420 character. This allows register names to be distinguished from label names.
422 * Macros with a variable number of arguments are now supported. See the
423 documentation for how this works.
425 * Added --reduce-memory-overheads switch to reduce the size of the hash
426 tables used, at the expense of longer assembly times, and
427 --hash-size=<NUMBER> to set the size of the hash tables used by gas.
429 * Macro names and macro parameter names can now be any identifier that would
430 also be legal as a symbol elsewhere. For macro parameter names, this is
431 known to cause problems in certain sources when the respective target uses
432 characters inconsistently, and thus macro parameter references may no longer
433 be recognized as such (see the documentation for details).
435 * Support the .f_floating, .d_floating, .g_floating and .h_floating directives
436 for the VAX target in order to be more compatible with the VAX MACRO
439 * New command-line option -mtune=[itanium1|itanium2] for IA64 targets.
443 * Redefinition of macros now results in an error.
445 * New command-line option -mhint.b=[ok|warning|error] for IA64 targets.
447 * New command-line option -munwind-check=[warning|error] for IA64
450 * The IA64 port now uses automatic dependency violation removal as its default
453 * Port to MAXQ processor contributed by HCL Tech.
455 * Added support for generating unwind tables for ARM ELF targets.
457 * Add a -g command-line option to generate debug information in the target's
458 preferred debug format.
460 * Support for the crx-elf target added.
462 * Support for the sh-symbianelf target added.
464 * Added a pseudo-op (.secrel32) to generate 32 bit section relative relocations
465 on pe[i]-i386; required for this target's DWARF 2 support.
467 * Support for Motorola MCF521x/5249/547x/548x added.
469 * Support for ColdFire EMAC instructions added and Motorola syntax for MAC/EMAC
472 * New command-line option -mno-shared for MIPS ELF targets.
474 * New command-line option --alternate and pseudo-ops .altmacro and .noaltmacro
475 added to enter (and leave) alternate macro syntax mode.
479 * The MIPS -membedded-pic option (Embedded-PIC code generation) is
480 deprecated and will be removed in a future release.
482 * Added PIC m32r Linux (ELF) and support to M32R assembler.
484 * Added support for ARM V6.
486 * Added support for sh4a and variants.
488 * Support for Renesas M32R2 added.
490 * Limited support for Mapping Symbols as specified in the ARM ELF
491 specification has been added to the arm assembler.
493 * On ARM architectures, added a new gas directive ".unreq" that undoes
494 definitions created by ".req".
496 * Support for Motorola ColdFire MCF528x added.
498 * Added --gstabs+ switch to enable the generation of STABS debug format
499 information with GNU extensions.
501 * Added support for MIPS64 Release 2.
503 * Added support for v850e1.
505 * Added -n switch for x86 assembler. By default, x86 GAS replaces
506 multiple nop instructions used for alignment within code sections
507 with multi-byte nop instructions such as leal 0(%esi,1),%esi. This
508 switch disables the optimization.
510 * Removed -n option from MIPS assembler. It was not useful, and confused the
511 existing -non_shared option.
515 * Added support for MIPS32 Release 2.
517 * Added support for Xtensa architecture.
519 * Support for Intel's iWMMXt processor (an ARM variant) added.
521 * An assembler test generator has been contributed and an example file that
522 uses it (gas/testsuite/gas/all/test-gen.c and test-exmaple.c).
524 * Support for SH2E added.
526 * GASP has now been removed.
528 * Support for Texas Instruments TMS320C4x and TMS320C3x series of
529 DSP's contributed by Michael Hayes and Svein E. Seldal.
531 * Support for the Ubicom IP2xxx microcontroller added.
535 * Support for the Fujitsu FRV architecture added by Red Hat. Models for FR400
538 * Support for DLX processor added.
540 * GASP has now been deprecated and will be removed in a future release. Use
541 the macro facilities in GAS instead.
543 * GASP now correctly parses floating point numbers. Unless the base is
544 explicitly specified, they are interpreted as decimal numbers regardless of
545 the currently specified base.
549 * Support for Don Knuth's MMIX, by Hans-Peter Nilsson.
551 * Support for the OpenRISC 32-bit embedded processor by OpenCores.
553 * The ARM assembler now accepts -march=..., -mcpu=... and -mfpu=... for
554 specifying the target instruction set. The old method of specifying the
555 target processor has been deprecated, but is still accepted for
558 * Support for the VFP floating-point instruction set has been added to
561 * New psuedo op: .incbin to include a set of binary data at a given point
562 in the assembly. Contributed by Anders Norlander.
564 * The MIPS assembler now accepts -march/-mtune. -mcpu has been deprecated
565 but still works for compatability.
567 * The MIPS assembler no longer issues a warning by default when it
568 generates a nop instruction from a macro. The new command-line option
569 -n will turn on the warning.
573 * Support for PDP-11 and 2.11BSD a.out format, by Lars Brinkhoff.
575 * x86 gas now supports the full Pentium4 instruction set.
577 * Support for AMD x86-64 architecture, by Jan Hubicka, SuSE Labs.
579 * Support for Motorola 68HC11 and 68HC12.
581 * Support for Texas Instruments TMS320C54x (tic54x).
585 * Support for i860, by Jason Eckhardt.
587 * Support for CRIS (Axis Communications ETRAX series).
589 * x86 gas has a new .arch pseudo op to specify the target CPU architecture.
591 * x86 gas -q command-line option quietens warnings about register size changes
592 due to suffix, indirect jmp/call without `*', stand-alone prefixes, and
593 translating various deprecated floating point instructions.
597 * Support for the ARM msr instruction was changed to only allow an immediate
598 operand when altering the flags field.
600 * Support for ATMEL AVR.
602 * Support for IBM 370 ELF. Somewhat experimental.
604 * Support for numbers with suffixes.
606 * Added support for breaking to the end of repeat loops.
608 * Added support for parallel instruction syntax (DOUBLEBAR_PARALLEL).
610 * New .elseif pseudo-op added.
612 * New --fatal-warnings option.
614 * picoJava architecture support added.
616 * Motorola MCore 210 processor support added.
618 * A new pseudo-op .intel_syntax has been implemented to allow gas to parse i386
619 assembly programs with intel syntax.
621 * New pseudo-ops .func,.endfunc to aid in debugging user-written assembler code.
623 * Added -gdwarf2 option to generate DWARF 2 debugging information.
625 * Full 16-bit mode support for i386.
627 * Greatly improved instruction operand checking for i386. This change will
628 produce errors or warnings on incorrect assembly code that previous versions
629 of gas accepted. If you get unexpected messages from code that worked with
630 older versions of gas, please double check the code before reporting a bug.
632 * Weak symbol support added for COFF targets.
634 * Mitsubishi D30V support added.
636 * Texas Instruments c80 (tms320c80) support added.
638 * i960 ELF support added.
640 * ARM ELF support added.
644 * Texas Instruments c30 (tms320c30) support added.
646 * The assembler now optimizes the exception frame information generated by egcs
647 and gcc 2.8. The new --traditional-format option disables this optimization.
649 * Added --gstabs option to generate stabs debugging information.
651 * The -a option takes a new suboption, m (e.g., -alm) to expand macros in a
654 * Added -MD option to print dependencies.
658 * BeOS support added.
660 * MIPS16 support added.
662 * Motorola ColdFire 5200 support added (configure for m68k and use -m5200).
664 * Alpha/VMS support added.
666 * m68k options --base-size-default-16, --base-size-default-32,
667 --disp-size-default-16, and --disp-size-default-32 added.
669 * The alignment directives now take an optional third argument, which is the
670 maximum number of bytes to skip. If doing the alignment would require
671 skipping more than the given number of bytes, the alignment is not done at
674 * The ELF assembler has a new pseudo-op, .symver, used for symbol versioning.
676 * The -a option takes a new suboption, c (e.g., -alc), to skip false
677 conditionals in listings.
679 * Added new pseudo-op, .equiv; it's like .equ, except that it is an error if
680 the symbol is already defined.
684 * The PowerPC assembler now allows the use of symbolic register names (r0,
685 etc.) if -mregnames is used. Symbolic names preceded by a '%' (%r0, etc.)
686 can be used any time. PowerPC 860 move to/from SPR instructions have been
689 * Alpha Linux (ELF) support added.
691 * PowerPC ELF support added.
693 * m68k Linux (ELF) support added.
695 * i960 Hx/Jx support added.
697 * i386/PowerPC gnu-win32 support added.
699 * SCO ELF support added. For OpenServer 5 targets (i386-unknown-sco3.2v5) the
700 default is to build COFF-only support. To get a set of tools that generate
701 ELF (they'll understand both COFF and ELF), you must configure with
702 target=i386-unknown-sco3.2v5elf.
704 * m88k-motorola-sysv3* support added.
708 * Gas now directly supports macros, without requiring GASP.
710 * Gas now has an MRI assembler compatibility mode. Use -M or --mri to select
711 MRI mode. The pseudo-op ``.mri 1'' will switch into the MRI mode until the
712 ``.mri 0'' is seen; this can be convenient for inline assembler code.
714 * Added --defsym SYM=VALUE option.
716 * Added -mips4 support to MIPS assembler.
718 * Added PIC support to Solaris and SPARC SunOS 4 assembler.
722 * Converted this directory to use an autoconf-generated configure script.
724 * ARM support, from Richard Earnshaw.
726 * Updated VMS support, from Pat Rankin, including considerably improved
729 * Support for the control registers in the 68060.
731 * Handles (ignores) a new directive ".this_GCC_requires_the_GNU_assembler", to
732 provide for possible future gcc changes, for targets where gas provides some
733 features not available in the native assembler. If the native assembler is
734 used, it should become obvious pretty quickly what the problem is.
736 * Usage message is available with "--help".
738 * The GNU Assembler Preprocessor (gasp) is included. (Actually, it was in 2.3
739 also, but didn't get into the NEWS file.)
741 * Weak symbol support for a.out.
743 * A bug in the listing code which could cause an infinite loop has been fixed.
744 Bugs in listings when generating a COFF object file have also been fixed.
746 * Initial i386-svr4 PIC implementation from Eric Youngdale, based on code by
749 * Improved Alpha support. Immediate constants can have a much larger range
750 now. Support for the 21164 has been contributed by Digital.
752 * Updated ns32k (pc532-mach, netbsd532) support from Ian Dall.
756 * Mach i386 support, by David Mackenzie and Ken Raeburn.
758 * RS/6000 and PowerPC support by Ian Taylor.
760 * VMS command scripts (make-gas.com, config-gas.com) have been worked on a bit,
761 based on mail received from various people. The `-h#' option should work
764 * HP-PA work, by Jeff Law. Note, for the PA, gas-2.3 has been designed to work
765 with gdb-4.12 and gcc-2.6. As gcc-2.6 has not been released yet, a special
766 version of gcc-2.5.8 has been patched to work with gas-2.3. You can retrieve
767 this special version of gcc-2.5.8 via anonymous ftp from jaguar.cs.utah.edu
768 in the "dist" directory.
770 * Vax support in gas fixed for BSD, so it builds and seems to run a couple
771 simple tests okay. I haven't put it through extensive testing. (GNU make is
772 currently required for BSD 4.3 builds.)
774 * Support for the DEC Alpha, running OSF/1 (ECOFF format). The gas support is
775 based on code donated by CMU, which used an a.out-based format. I'm afraid
776 the alpha-a.out support is pretty badly mangled, and much of it removed;
777 making it work will require rewriting it as BFD support for the format anyways.
781 * The test suites have been fixed up a bit, so that they should work with a
782 couple different versions of expect and dejagnu.
784 * Symbols' values are now handled internally as expressions, permitting more
785 flexibility in evaluating them in some cases. Some details of relocation
786 handling have also changed, and simple constant pool management has been
787 added, to make the Alpha port easier.
789 * New option "--statistics" for printing out program run times. This is
790 intended to be used with the gcc "-Q" option, which prints out times spent in
791 various phases of compilation. (You should be able to get all of them
792 printed out with "gcc -Q -Wa,--statistics", I think.)
796 * RS/6000 AIX and MIPS SGI Irix 5 support has been added.
798 * Configurations that are still in development (and therefore are convenient to
799 have listed in configure.in) still get rejected without a minor change to
800 gas/Makefile.in, so people not doing development work shouldn't get the
801 impression that support for such configurations is actually believed to be
804 * The program name (usually "as") is printed when a fatal error message is
805 displayed. This should prevent some confusion about the source of occasional
806 messages about "internal errors".
808 * ELF support is falling into place. Support for the 386 should be working.
809 Support for SPARC Solaris is in. HPPA support from Utah is being integrated.
811 * Symbol values are maintained as expressions instead of being immediately
812 boiled down to add-symbol, sub-symbol, and constant. This permits slightly
813 more complex calculations involving symbols whose values are not alreadey
816 * DBX-style debugging info ("stabs") is now supported for COFF formats.
817 If any stabs directives are seen in the source, GAS will create two new
818 sections: a ".stab" and a ".stabstr" section. The format of the .stab
819 section is nearly identical to the a.out symbol format, and .stabstr is
820 its string table. For this to be useful, you must have configured GCC
821 to generate stabs (by defining DBX_DEBUGGING_INFO), and must have a GDB
822 that can use the stab sections (4.11 or later).
824 * LynxOS, on i386 and m68k platforms, is now supported. SPARC LynxOS
825 support is in progress.
829 * Several small fixes for i386-aix (PS/2) support from Minh Tran-Le have been
830 incorporated, but not well tested yet.
832 * Altered the opcode table split for m68k; it should require less VM to compile
835 * Some minor adjustments to add (Convergent Technologies') Miniframe support,
836 suggested by Ronald Cole.
838 * HPPA support (running OSF only, not HPUX) has been contributed by Utah. This
839 includes improved ELF support, which I've started adapting for SPARC Solaris
840 2.x. Integration isn't completely, so it probably won't work.
842 * HP9000/300 support, donated by HP, has been merged in.
844 * Ian Taylor has finished the MIPS ECOFF (Ultrix, Irix) support.
846 * Better error messages for unsupported configurations (e.g., hppa-hpux).
848 * Test suite framework is starting to become reasonable.
854 * Some more merging of BFD and ELF code, but ELF still doesn't work.
858 * BFD merge is partly done. Adventurous souls may try giving configure the
859 "--with-bfd-assembler" option. Currently, ELF format requires it, a.out
860 format accepts it; SPARC CPU accepts it. It's the default only for OS "elf"
861 or "solaris". (ELF isn't really supported yet. It needs work. I've got
862 some code from Utah for HP-PA ELF, and from DG for m88k ELF, but they're not
865 * The 68K opcode table has been split in half. It should now compile under gcc
866 without consuming ridiculous amounts of memory.
868 * A couple data structures have been reduced in size. This should result in
869 saving a little bit of space at runtime.
871 * Support for MIPS, from OSF and Ralph Campbell, has been merged in. The OSF
872 code provided ROSE format support, which I haven't merged in yet. (I can
873 make it available, if anyone wants to try it out.) Ralph's code, for BSD
874 4.4, supports a.out format. We don't have ECOFF support in just yet; it's
877 * Support for the Hitachi H8/500 has been added.
879 * VMS host and target support should be working now, thanks chiefly to Eric
884 * For m68k, support for more processors has been added: 68040, CPU32, 68851.
886 * For i386, .align is now power-of-two; was number-of-bytes.
888 * For m68k, "%" is now accepted before register names. For COFF format, which
889 doesn't use underscore prefixes for C labels, it is required, so variable "a0"
890 can be distinguished from the register.
892 * Last public release was 1.38. Lots of configuration changes since then, lots
893 of new CPUs and formats, lots of bugs fixed.
896 Copyright (C) 2012-2021 Free Software Foundation, Inc.
898 Copying and distribution of this file, with or without modification,
899 are permitted in any medium without royalty provided the copyright
900 notice and this notice are preserved.