CSKY: Add version flag in eflag and fix bug in disassembling register.
[deliverable/binutils-gdb.git] / gas / NEWS
1 -*- text -*-
2
3 * Add support for Intel AVX VNNI instructions.
4
5 * Add support for Intel HRESET instruction.
6
7 * Add support for Intel UINTR instructions.
8
9 * Support non-absolute segment values for i386 lcall and ljmp.
10
11 * When setting the link order attribute of ELF sections, it is now possible to
12 use a numeric section index instead of symbol name.
13
14 * Add support for Cortex-A78, Cortex-A78AE and Cortex-X1 for AArch64 and ARM.
15 Add support for Cortex-R82, Neoverse V1, and Neoverse N2 for ARM.
16
17 * Add support for ETMv4 (Embedded Trace Macrocell), ETE (Embedded Trace
18 Extension), TRBE (Trace Buffer Extension), CSRE (Call Stack Recorder
19 Extension) and BRBE (Branch Record Buffer Extension) system registers for
20 AArch64.
21
22 * Add support for Armv8-R AArch64.
23
24 * Add support for Intel TDX instructions.
25
26 * Add support for Intel Key Locker instructions.
27
28 * Added a .nop directive to generate a single no-op instruction in a target
29 neutral manner. This instruction does have an effect on DWARF line number
30 generation, if that is active.
31
32 * Removed --reduce-memory-overheads and --hash-size as gas now
33 uses hash tables that can be expand and shrink automatically.
34
35 * Add {disp16} pseudo prefix to x86 assembler.
36
37 * Add support for Intel AMX instructions.
38
39 * Configure with --enable-x86-used-note by default for Linux/x86.
40
41 Changes in 2.35:
42
43 * X86 NaCl target support is removed.
44
45 * Extend .symver directive to update visibility of the original symbol
46 and assign one original symbol to different versioned symbols.
47
48 * Add support for Intel SERIALIZE and TSXLDTRK instructions.
49
50 * Add -mlfence-after-load=, -mlfence-before-indirect-branch= and
51 -mlfence-before-ret= options to x86 assembler to help mitigate
52 CVE-2020-0551.
53
54 * Add --gdwarf-5 option to the assembler to generate DWARF 5 debug output
55 (if such output is being generated). Added the ability to generate
56 version 5 .debug_line sections.
57
58 * Add -mbig-obj support to i386 MingW targets.
59
60 Changes in 2.34:
61
62 * Add -malign-branch-boundary=NUM, -malign-branch=TYPE[+TYPE...],
63 -malign-branch-prefix-size=NUM and -mbranches-within-32B-boundaries
64 options to x86 assembler to align branches within a fixed boundary
65 with segment prefixes or NOPs.
66
67 * Add support for Zilog eZ80 and Zilog Z180 CPUs.
68
69 * Add support for z80-elf target.
70
71 * Add support for relocation of each byte or word of multibyte value to Z80
72 targets (just use right shift to 0, 8, 16, or 24 bits or AND operation
73 with 0xff/0xffff mask): ld a, label >> 16 \ ld hl, label & 0xffff
74
75 * Add SDCC support for Z80 targets.
76
77 Changes in 2.33:
78
79 * Add support for the Arm Scalable Vector Extension version 2 (SVE2)
80 instructions.
81
82 * Add support for the Arm Transactional Memory Extension (TME)
83 instructions.
84
85 * Add support for the Armv8.1-M Mainline and M-profile Vector Extension (MVE)
86 instructions.
87
88 * For MIPS, Add -m[no-]fix-loongson3-llsc option to fix (or not) Loongson3
89 LLSC Errata. Add a --enable-mips-fix-loongson3-llsc=[yes|no] configure
90 time option to set the default behavior. Set the default if the configure
91 option is not used to "no".
92
93 * Add support for the Arm Cortex-A76AE, Cortex-A77 and Cortex-M35P
94 processors.
95
96 * Add support for the AArch64 Cortex-A34, Cortex-A65, Cortex-A65AE,
97 Cortex-A76AE, and Cortex-A77 processors.
98
99 * Add .float16 directive for both Arm and AArch64 to allow encoding of 16-bit
100 floating point literals. Add .float16_format directive and
101 -mfp16-format=[ieee|alternative] option for Arm to control the format of the
102 encoding.
103
104 * Add --gdwarf-cie-version command line flag. This allows control over which
105 version of DWARF CIE the assembler creates.
106
107 Changes in 2.32:
108
109 * Add -mvexwig=[0|1] option to x86 assembler to control encoding of
110 VEX.W-ignored (WIG) VEX instructions.
111
112 * Add -mx86-used-note=[yes|no] option to generate (or not) x86 GNU property
113 notes. Add a --enable-x86-used-note configure time option to set the
114 default behavior. Set the default if the configure option is not used
115 to "no".
116
117 * Add support for the MIPS Loongson EXTensions R2 (EXT2) instructions.
118
119 * Add support for the MIPS Loongson EXTensions (EXT) instructions.
120
121 * Add support for the MIPS Loongson Content Address Memory (CAM) ASE.
122
123 * Add support for the C-SKY processor series.
124
125 * Add support for the MIPS Loongson MultiMedia extensions Instructions (MMI)
126 ASE.
127
128 Changes in 2.31:
129
130 * The ADR and ADRL pseudo-instructions supported by the ARM assembler
131 now only set the bottom bit of the address of thumb function symbols
132 if the -mthumb-interwork command line option is active.
133
134 * Add support for the MIPS Global INValidate (GINV) ASE.
135
136 * Add support for the MIPS Cyclic Redudancy Check (CRC) ASE.
137
138 * Add support for the Freescale S12Z architecture.
139
140 * Add --generate-missing-build-notes=[yes|no] option to create (or not) GNU
141 Build Attribute notes if none are present in the input sources. Add a
142 --enable-generate-build-notes=[yes|no] configure time option to set the
143 default behaviour. Set the default if the configure option is not used
144 to "no".
145
146 * Remove -mold-gcc command-line option for x86 targets.
147
148 * Add -O[2|s] command-line options to x86 assembler to enable alternate
149 shorter instruction encoding.
150
151 * Add support for .nops directive. It is currently supported only for
152 x86 targets.
153
154 Changes in 2.30:
155
156 * Add support for loaction views in DWARF debug line information.
157
158 Changes in 2.29:
159
160 * Add support for ELF SHF_GNU_MBIND.
161
162 * Add support for the WebAssembly file format and wasm32 ELF conversion.
163
164 * PowerPC gas now checks that the correct register class is used in
165 instructions. For instance, "addi %f4,%cr3,%r31" warns three times
166 that the registers are invalid.
167
168 * Add support for the Texas Instruments PRU processor.
169
170 * Support for the ARMv8-R architecture and Cortex-R52 processor has been
171 added to the ARM port.
172
173 Changes in 2.28:
174
175 * Add support for the RISC-V architecture.
176
177 * Add support for the ARM Cortex-M23 and Cortex-M33 processors.
178
179 Changes in 2.27:
180
181 * Default to --enable-compressed-debug-sections=gas for Linux/x86 targets.
182
183 * Add --no-pad-sections to stop the assembler from padding the end of output
184 sections up to their alignment boundary.
185
186 * Support for the ARMv8-M architecture has been added to the ARM port. Support
187 for the ARMv8-M Security and DSP Extensions has also been added to the ARM
188 port.
189
190 * ARC backend accepts .extInstruction, .extCondCode, .extAuxRegister, and
191 .extCoreRegister pseudo-ops that allow an user to define custom
192 instructions, conditional codes, auxiliary and core registers.
193
194 * Add a configure option --enable-elf-stt-common to decide whether ELF
195 assembler should generate common symbols with the STT_COMMON type by
196 default. Default to no.
197
198 * New command-line option --elf-stt-common= for ELF targets to control
199 whether to generate common symbols with the STT_COMMON type.
200
201 * Add ability to set section flags and types via numeric values for ELF
202 based targets.
203
204 * Add a configure option --enable-x86-relax-relocations to decide whether
205 x86 assembler should generate relax relocations by default. Default to
206 yes, except for x86 Solaris targets older than Solaris 12.
207
208 * New command-line option -mrelax-relocations= for x86 target to control
209 whether to generate relax relocations.
210
211 * New command-line option -mfence-as-lock-add=yes for x86 target to encode
212 lfence, mfence and sfence as "lock addl $0x0, (%[re]sp)".
213
214 * Add assembly-time relaxation option for ARC cpus.
215
216 * Add --with-cpu=TYPE configure option for ARC gas. This allows the default
217 cpu type to be adjusted at configure time.
218
219 Changes in 2.26:
220
221 * Add a configure option --enable-compressed-debug-sections={all,gas} to
222 decide whether DWARF debug sections should be compressed by default.
223
224 * Add support for the ARC EM/HS, and ARC600/700 architectures. Remove
225 assembler support for Argonaut RISC architectures.
226
227 * Symbol and label names can now be enclosed in double quotes (") which allows
228 them to contain characters that are not part of valid symbol names in high
229 level languages.
230
231 * Added the correctly spelled -march=armv6kz, for ARMv6KZ support. The
232 previous spelling, -march=armv6zk, is still accepted.
233
234 * Support for the ARMv8.1 architecture has been added to the Aarch64 port.
235 Support for the individual ARMv8.1 Adv.SIMD, LOR and PAN architecture
236 extensions has also been added to the Aarch64 port.
237
238 * Support for the ARMv8.1 architecture has been added to the ARM port. Support
239 for the individual ARMv8.1 Adv.SIMD and PAN architecture extensions has also
240 been added to the ARM port.
241
242 * Extend --compress-debug-sections option to support
243 --compress-debug-sections=[none|zlib|zlib-gnu|zlib-gabi] for ELF
244 targets.
245
246 * --compress-debug-sections is turned on for Linux/x86 by default.
247
248 Changes in 2.25:
249
250 * Add support for the AVR Tiny microcontrollers.
251
252 * Replace support for openrisc and or32 with support for or1k.
253
254 * Enhanced the ARM port to accept the assembler output from the CodeComposer
255 Studio tool. Support is enabled via the new command-line option -mccs.
256
257 * Add support for the Andes NDS32.
258
259 Changes in 2.24:
260
261 * Add support for the Texas Instruments MSP430X processor.
262
263 * Add -gdwarf-sections command-line option to enable per-code-section
264 generation of DWARF .debug_line sections.
265
266 * Add support for Altera Nios II.
267
268 * Add support for the Imagination Technologies Meta processor.
269
270 * Add support for the v850e3v5.
271
272 * Remove assembler support for MIPS ECOFF targets.
273
274 Changes in 2.23:
275
276 * Add support for the 64-bit ARM architecture: AArch64.
277
278 * Add support for S12X processor.
279
280 * Add support for the VLE extension to the PowerPC architecture.
281
282 * Add support for the Freescale XGATE architecture.
283
284 * Add support for .bundle_align_mode, .bundle_lock, and .bundle_unlock
285 directives. These are currently available only for x86 and ARM targets.
286
287 * Add support for the Renesas RL78 architecture.
288
289 * Add support for the Adapteva EPIPHANY architecture.
290
291 * For x86, allow 'rep bsf', 'rep bsr', and 'rep ret' syntax.
292
293 Changes in 2.22:
294
295 * Add support for the Tilera TILEPro and TILE-Gx architectures.
296
297 Changes in 2.21:
298
299 * Gas no longer requires doubling of ampersands in macros.
300
301 * Add support for the TMS320C6000 (TI C6X) processor family.
302
303 * GAS now understands an extended syntax in the .section directive flags
304 for COFF targets that allows the section's alignment to be specified. This
305 feature has also been backported to the 2.20 release series, starting with
306 2.20.1.
307
308 * Add support for the Renesas RX processor.
309
310 * New command-line option, --compress-debug-sections, which requests
311 compression of DWARF debug information sections in the relocatable output
312 file. Compressed debug sections are supported by readelf, objdump, and
313 gold, but not currently by Gnu ld.
314
315 Changes in 2.20:
316
317 * Added support for v850e2 and v850e2v3.
318
319 * GNU/Linux targets now supports "gnu_unique_object" as a value in the .type
320 pseudo op. It marks the symbol as being globally unique in the entire
321 process.
322
323 * ARM assembler now supports .inst[.nw] pseudo-ops to insert opcodes specified
324 in binary rather than text.
325
326 * Add support for common symbol alignment to PE formats.
327
328 * Add support for the new discriminator column in the DWARF line table,
329 with a discriminator operand for the .loc directive.
330
331 * Add support for Sunplus score architecture.
332
333 * The .type pseudo-op now accepts a type of STT_GNU_IFUNC which can be used to
334 indicate that if the symbol is the target of a relocation, its value should
335 not be use. Instead the function should be invoked and its result used as
336 the value.
337
338 * Add support for Lattice Mico32 (lm32) architecture.
339
340 * Add support for Xilinx MicroBlaze architecture.
341
342 Changes in 2.19:
343
344 * New pseudo op .cfi_val_encoded_addr, to record constant addresses in unwind
345 tables without runtime relocation.
346
347 * New command-line option, -h-tick-hex, for sh, m32c, and h8/300 targets, which
348 adds compatibility with H'00 style hex constants.
349
350 * New command-line option, -msse-check=[none|error|warning], for x86
351 targets.
352
353 * New sub-option added to the assembler's -a command-line switch to
354 generate a listing output. The 'g' sub-option will insert into the listing
355 various information about the assembly, such as assembler version, the
356 command-line options used, and a time stamp.
357
358 * New command-line option -msse2avx for x86 target to encode SSE
359 instructions with VEX prefix.
360
361 * Add Intel XSAVE, EPT, MOVBE, AES, PCLMUL, AVX/FMA support for x86 target.
362
363 * New command-line options, -march=CPU[,+EXTENSION...], -mtune=CPU,
364 -mmnemonic=[att|intel], -msyntax=[att|intel], -mindex-reg,
365 -mnaked-reg and -mold-gcc, for x86 targets.
366
367 * Support for generating wide character strings has been added via the new
368 pseudo ops: .string16, .string32 and .string64.
369
370 * Support for SSE5 has been added to the i386 port.
371
372 Changes in 2.18:
373
374 * The GAS sources are now released under the GPLv3.
375
376 * Support for the National Semiconductor CR16 target has been added.
377
378 * Added gas .reloc pseudo. This is a low-level interface for creating
379 relocations.
380
381 * Add support for x86_64 PE+ target.
382
383 * Add support for Score target.
384
385 Changes in 2.17:
386
387 * Support for the Infineon XC16X has been added by KPIT Cummins Infosystems.
388
389 * Support for ms2 architecture has been added.
390
391 * Support for the Z80 processor family has been added.
392
393 * Add support for the "@<file>" syntax to the command line, so that extra
394 switches can be read from <file>.
395
396 * The SH target supports a new command-line switch --enable-reg-prefix which,
397 if enabled, will allow register names to be optionally prefixed with a $
398 character. This allows register names to be distinguished from label names.
399
400 * Macros with a variable number of arguments are now supported. See the
401 documentation for how this works.
402
403 * Added --reduce-memory-overheads switch to reduce the size of the hash
404 tables used, at the expense of longer assembly times, and
405 --hash-size=<NUMBER> to set the size of the hash tables used by gas.
406
407 * Macro names and macro parameter names can now be any identifier that would
408 also be legal as a symbol elsewhere. For macro parameter names, this is
409 known to cause problems in certain sources when the respective target uses
410 characters inconsistently, and thus macro parameter references may no longer
411 be recognized as such (see the documentation for details).
412
413 * Support the .f_floating, .d_floating, .g_floating and .h_floating directives
414 for the VAX target in order to be more compatible with the VAX MACRO
415 assembler.
416
417 * New command-line option -mtune=[itanium1|itanium2] for IA64 targets.
418
419 Changes in 2.16:
420
421 * Redefinition of macros now results in an error.
422
423 * New command-line option -mhint.b=[ok|warning|error] for IA64 targets.
424
425 * New command-line option -munwind-check=[warning|error] for IA64
426 targets.
427
428 * The IA64 port now uses automatic dependency violation removal as its default
429 mode.
430
431 * Port to MAXQ processor contributed by HCL Tech.
432
433 * Added support for generating unwind tables for ARM ELF targets.
434
435 * Add a -g command-line option to generate debug information in the target's
436 preferred debug format.
437
438 * Support for the crx-elf target added.
439
440 * Support for the sh-symbianelf target added.
441
442 * Added a pseudo-op (.secrel32) to generate 32 bit section relative relocations
443 on pe[i]-i386; required for this target's DWARF 2 support.
444
445 * Support for Motorola MCF521x/5249/547x/548x added.
446
447 * Support for ColdFire EMAC instructions added and Motorola syntax for MAC/EMAC
448 instrucitons.
449
450 * New command-line option -mno-shared for MIPS ELF targets.
451
452 * New command-line option --alternate and pseudo-ops .altmacro and .noaltmacro
453 added to enter (and leave) alternate macro syntax mode.
454
455 Changes in 2.15:
456
457 * The MIPS -membedded-pic option (Embedded-PIC code generation) is
458 deprecated and will be removed in a future release.
459
460 * Added PIC m32r Linux (ELF) and support to M32R assembler.
461
462 * Added support for ARM V6.
463
464 * Added support for sh4a and variants.
465
466 * Support for Renesas M32R2 added.
467
468 * Limited support for Mapping Symbols as specified in the ARM ELF
469 specification has been added to the arm assembler.
470
471 * On ARM architectures, added a new gas directive ".unreq" that undoes
472 definitions created by ".req".
473
474 * Support for Motorola ColdFire MCF528x added.
475
476 * Added --gstabs+ switch to enable the generation of STABS debug format
477 information with GNU extensions.
478
479 * Added support for MIPS64 Release 2.
480
481 * Added support for v850e1.
482
483 * Added -n switch for x86 assembler. By default, x86 GAS replaces
484 multiple nop instructions used for alignment within code sections
485 with multi-byte nop instructions such as leal 0(%esi,1),%esi. This
486 switch disables the optimization.
487
488 * Removed -n option from MIPS assembler. It was not useful, and confused the
489 existing -non_shared option.
490
491 Changes in 2.14:
492
493 * Added support for MIPS32 Release 2.
494
495 * Added support for Xtensa architecture.
496
497 * Support for Intel's iWMMXt processor (an ARM variant) added.
498
499 * An assembler test generator has been contributed and an example file that
500 uses it (gas/testsuite/gas/all/test-gen.c and test-exmaple.c).
501
502 * Support for SH2E added.
503
504 * GASP has now been removed.
505
506 * Support for Texas Instruments TMS320C4x and TMS320C3x series of
507 DSP's contributed by Michael Hayes and Svein E. Seldal.
508
509 * Support for the Ubicom IP2xxx microcontroller added.
510
511 Changes in 2.13:
512
513 * Support for the Fujitsu FRV architecture added by Red Hat. Models for FR400
514 and FR500 included.
515
516 * Support for DLX processor added.
517
518 * GASP has now been deprecated and will be removed in a future release. Use
519 the macro facilities in GAS instead.
520
521 * GASP now correctly parses floating point numbers. Unless the base is
522 explicitly specified, they are interpreted as decimal numbers regardless of
523 the currently specified base.
524
525 Changes in 2.12:
526
527 * Support for Don Knuth's MMIX, by Hans-Peter Nilsson.
528
529 * Support for the OpenRISC 32-bit embedded processor by OpenCores.
530
531 * The ARM assembler now accepts -march=..., -mcpu=... and -mfpu=... for
532 specifying the target instruction set. The old method of specifying the
533 target processor has been deprecated, but is still accepted for
534 compatibility.
535
536 * Support for the VFP floating-point instruction set has been added to
537 the ARM assembler.
538
539 * New psuedo op: .incbin to include a set of binary data at a given point
540 in the assembly. Contributed by Anders Norlander.
541
542 * The MIPS assembler now accepts -march/-mtune. -mcpu has been deprecated
543 but still works for compatability.
544
545 * The MIPS assembler no longer issues a warning by default when it
546 generates a nop instruction from a macro. The new command-line option
547 -n will turn on the warning.
548
549 Changes in 2.11:
550
551 * Support for PDP-11 and 2.11BSD a.out format, by Lars Brinkhoff.
552
553 * x86 gas now supports the full Pentium4 instruction set.
554
555 * Support for AMD x86-64 architecture, by Jan Hubicka, SuSE Labs.
556
557 * Support for Motorola 68HC11 and 68HC12.
558
559 * Support for Texas Instruments TMS320C54x (tic54x).
560
561 * Support for IA-64.
562
563 * Support for i860, by Jason Eckhardt.
564
565 * Support for CRIS (Axis Communications ETRAX series).
566
567 * x86 gas has a new .arch pseudo op to specify the target CPU architecture.
568
569 * x86 gas -q command-line option quietens warnings about register size changes
570 due to suffix, indirect jmp/call without `*', stand-alone prefixes, and
571 translating various deprecated floating point instructions.
572
573 Changes in 2.10:
574
575 * Support for the ARM msr instruction was changed to only allow an immediate
576 operand when altering the flags field.
577
578 * Support for ATMEL AVR.
579
580 * Support for IBM 370 ELF. Somewhat experimental.
581
582 * Support for numbers with suffixes.
583
584 * Added support for breaking to the end of repeat loops.
585
586 * Added support for parallel instruction syntax (DOUBLEBAR_PARALLEL).
587
588 * New .elseif pseudo-op added.
589
590 * New --fatal-warnings option.
591
592 * picoJava architecture support added.
593
594 * Motorola MCore 210 processor support added.
595
596 * A new pseudo-op .intel_syntax has been implemented to allow gas to parse i386
597 assembly programs with intel syntax.
598
599 * New pseudo-ops .func,.endfunc to aid in debugging user-written assembler code.
600
601 * Added -gdwarf2 option to generate DWARF 2 debugging information.
602
603 * Full 16-bit mode support for i386.
604
605 * Greatly improved instruction operand checking for i386. This change will
606 produce errors or warnings on incorrect assembly code that previous versions
607 of gas accepted. If you get unexpected messages from code that worked with
608 older versions of gas, please double check the code before reporting a bug.
609
610 * Weak symbol support added for COFF targets.
611
612 * Mitsubishi D30V support added.
613
614 * Texas Instruments c80 (tms320c80) support added.
615
616 * i960 ELF support added.
617
618 * ARM ELF support added.
619
620 Changes in 2.9:
621
622 * Texas Instruments c30 (tms320c30) support added.
623
624 * The assembler now optimizes the exception frame information generated by egcs
625 and gcc 2.8. The new --traditional-format option disables this optimization.
626
627 * Added --gstabs option to generate stabs debugging information.
628
629 * The -a option takes a new suboption, m (e.g., -alm) to expand macros in a
630 listing.
631
632 * Added -MD option to print dependencies.
633
634 Changes in 2.8:
635
636 * BeOS support added.
637
638 * MIPS16 support added.
639
640 * Motorola ColdFire 5200 support added (configure for m68k and use -m5200).
641
642 * Alpha/VMS support added.
643
644 * m68k options --base-size-default-16, --base-size-default-32,
645 --disp-size-default-16, and --disp-size-default-32 added.
646
647 * The alignment directives now take an optional third argument, which is the
648 maximum number of bytes to skip. If doing the alignment would require
649 skipping more than the given number of bytes, the alignment is not done at
650 all.
651
652 * The ELF assembler has a new pseudo-op, .symver, used for symbol versioning.
653
654 * The -a option takes a new suboption, c (e.g., -alc), to skip false
655 conditionals in listings.
656
657 * Added new pseudo-op, .equiv; it's like .equ, except that it is an error if
658 the symbol is already defined.
659
660 Changes in 2.7:
661
662 * The PowerPC assembler now allows the use of symbolic register names (r0,
663 etc.) if -mregnames is used. Symbolic names preceded by a '%' (%r0, etc.)
664 can be used any time. PowerPC 860 move to/from SPR instructions have been
665 added.
666
667 * Alpha Linux (ELF) support added.
668
669 * PowerPC ELF support added.
670
671 * m68k Linux (ELF) support added.
672
673 * i960 Hx/Jx support added.
674
675 * i386/PowerPC gnu-win32 support added.
676
677 * SCO ELF support added. For OpenServer 5 targets (i386-unknown-sco3.2v5) the
678 default is to build COFF-only support. To get a set of tools that generate
679 ELF (they'll understand both COFF and ELF), you must configure with
680 target=i386-unknown-sco3.2v5elf.
681
682 * m88k-motorola-sysv3* support added.
683
684 Changes in 2.6:
685
686 * Gas now directly supports macros, without requiring GASP.
687
688 * Gas now has an MRI assembler compatibility mode. Use -M or --mri to select
689 MRI mode. The pseudo-op ``.mri 1'' will switch into the MRI mode until the
690 ``.mri 0'' is seen; this can be convenient for inline assembler code.
691
692 * Added --defsym SYM=VALUE option.
693
694 * Added -mips4 support to MIPS assembler.
695
696 * Added PIC support to Solaris and SPARC SunOS 4 assembler.
697
698 Changes in 2.4:
699
700 * Converted this directory to use an autoconf-generated configure script.
701
702 * ARM support, from Richard Earnshaw.
703
704 * Updated VMS support, from Pat Rankin, including considerably improved
705 debugging support.
706
707 * Support for the control registers in the 68060.
708
709 * Handles (ignores) a new directive ".this_GCC_requires_the_GNU_assembler", to
710 provide for possible future gcc changes, for targets where gas provides some
711 features not available in the native assembler. If the native assembler is
712 used, it should become obvious pretty quickly what the problem is.
713
714 * Usage message is available with "--help".
715
716 * The GNU Assembler Preprocessor (gasp) is included. (Actually, it was in 2.3
717 also, but didn't get into the NEWS file.)
718
719 * Weak symbol support for a.out.
720
721 * A bug in the listing code which could cause an infinite loop has been fixed.
722 Bugs in listings when generating a COFF object file have also been fixed.
723
724 * Initial i386-svr4 PIC implementation from Eric Youngdale, based on code by
725 Paul Kranenburg.
726
727 * Improved Alpha support. Immediate constants can have a much larger range
728 now. Support for the 21164 has been contributed by Digital.
729
730 * Updated ns32k (pc532-mach, netbsd532) support from Ian Dall.
731
732 Changes in 2.3:
733
734 * Mach i386 support, by David Mackenzie and Ken Raeburn.
735
736 * RS/6000 and PowerPC support by Ian Taylor.
737
738 * VMS command scripts (make-gas.com, config-gas.com) have been worked on a bit,
739 based on mail received from various people. The `-h#' option should work
740 again too.
741
742 * HP-PA work, by Jeff Law. Note, for the PA, gas-2.3 has been designed to work
743 with gdb-4.12 and gcc-2.6. As gcc-2.6 has not been released yet, a special
744 version of gcc-2.5.8 has been patched to work with gas-2.3. You can retrieve
745 this special version of gcc-2.5.8 via anonymous ftp from jaguar.cs.utah.edu
746 in the "dist" directory.
747
748 * Vax support in gas fixed for BSD, so it builds and seems to run a couple
749 simple tests okay. I haven't put it through extensive testing. (GNU make is
750 currently required for BSD 4.3 builds.)
751
752 * Support for the DEC Alpha, running OSF/1 (ECOFF format). The gas support is
753 based on code donated by CMU, which used an a.out-based format. I'm afraid
754 the alpha-a.out support is pretty badly mangled, and much of it removed;
755 making it work will require rewriting it as BFD support for the format anyways.
756
757 * Irix 5 support.
758
759 * The test suites have been fixed up a bit, so that they should work with a
760 couple different versions of expect and dejagnu.
761
762 * Symbols' values are now handled internally as expressions, permitting more
763 flexibility in evaluating them in some cases. Some details of relocation
764 handling have also changed, and simple constant pool management has been
765 added, to make the Alpha port easier.
766
767 * New option "--statistics" for printing out program run times. This is
768 intended to be used with the gcc "-Q" option, which prints out times spent in
769 various phases of compilation. (You should be able to get all of them
770 printed out with "gcc -Q -Wa,--statistics", I think.)
771
772 Changes in 2.2:
773
774 * RS/6000 AIX and MIPS SGI Irix 5 support has been added.
775
776 * Configurations that are still in development (and therefore are convenient to
777 have listed in configure.in) still get rejected without a minor change to
778 gas/Makefile.in, so people not doing development work shouldn't get the
779 impression that support for such configurations is actually believed to be
780 reliable.
781
782 * The program name (usually "as") is printed when a fatal error message is
783 displayed. This should prevent some confusion about the source of occasional
784 messages about "internal errors".
785
786 * ELF support is falling into place. Support for the 386 should be working.
787 Support for SPARC Solaris is in. HPPA support from Utah is being integrated.
788
789 * Symbol values are maintained as expressions instead of being immediately
790 boiled down to add-symbol, sub-symbol, and constant. This permits slightly
791 more complex calculations involving symbols whose values are not alreadey
792 known.
793
794 * DBX-style debugging info ("stabs") is now supported for COFF formats.
795 If any stabs directives are seen in the source, GAS will create two new
796 sections: a ".stab" and a ".stabstr" section. The format of the .stab
797 section is nearly identical to the a.out symbol format, and .stabstr is
798 its string table. For this to be useful, you must have configured GCC
799 to generate stabs (by defining DBX_DEBUGGING_INFO), and must have a GDB
800 that can use the stab sections (4.11 or later).
801
802 * LynxOS, on i386 and m68k platforms, is now supported. SPARC LynxOS
803 support is in progress.
804
805 Changes in 2.1:
806
807 * Several small fixes for i386-aix (PS/2) support from Minh Tran-Le have been
808 incorporated, but not well tested yet.
809
810 * Altered the opcode table split for m68k; it should require less VM to compile
811 with gcc now.
812
813 * Some minor adjustments to add (Convergent Technologies') Miniframe support,
814 suggested by Ronald Cole.
815
816 * HPPA support (running OSF only, not HPUX) has been contributed by Utah. This
817 includes improved ELF support, which I've started adapting for SPARC Solaris
818 2.x. Integration isn't completely, so it probably won't work.
819
820 * HP9000/300 support, donated by HP, has been merged in.
821
822 * Ian Taylor has finished the MIPS ECOFF (Ultrix, Irix) support.
823
824 * Better error messages for unsupported configurations (e.g., hppa-hpux).
825
826 * Test suite framework is starting to become reasonable.
827
828 Changes in 2.0:
829
830 * Mostly bug fixes.
831
832 * Some more merging of BFD and ELF code, but ELF still doesn't work.
833
834 Changes in 1.94:
835
836 * BFD merge is partly done. Adventurous souls may try giving configure the
837 "--with-bfd-assembler" option. Currently, ELF format requires it, a.out
838 format accepts it; SPARC CPU accepts it. It's the default only for OS "elf"
839 or "solaris". (ELF isn't really supported yet. It needs work. I've got
840 some code from Utah for HP-PA ELF, and from DG for m88k ELF, but they're not
841 fully merged yet.)
842
843 * The 68K opcode table has been split in half. It should now compile under gcc
844 without consuming ridiculous amounts of memory.
845
846 * A couple data structures have been reduced in size. This should result in
847 saving a little bit of space at runtime.
848
849 * Support for MIPS, from OSF and Ralph Campbell, has been merged in. The OSF
850 code provided ROSE format support, which I haven't merged in yet. (I can
851 make it available, if anyone wants to try it out.) Ralph's code, for BSD
852 4.4, supports a.out format. We don't have ECOFF support in just yet; it's
853 coming.
854
855 * Support for the Hitachi H8/500 has been added.
856
857 * VMS host and target support should be working now, thanks chiefly to Eric
858 Youngdale.
859
860 Changes in 1.93.01:
861
862 * For m68k, support for more processors has been added: 68040, CPU32, 68851.
863
864 * For i386, .align is now power-of-two; was number-of-bytes.
865
866 * For m68k, "%" is now accepted before register names. For COFF format, which
867 doesn't use underscore prefixes for C labels, it is required, so variable "a0"
868 can be distinguished from the register.
869
870 * Last public release was 1.38. Lots of configuration changes since then, lots
871 of new CPUs and formats, lots of bugs fixed.
872
873 \f
874 Copyright (C) 2012-2020 Free Software Foundation, Inc.
875
876 Copying and distribution of this file, with or without modification,
877 are permitted in any medium without royalty provided the copyright
878 notice and this notice are preserved.
879
880 Local variables:
881 fill-column: 79
882 End:
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