gas/NOTES

   1 -*- text -*-
   2
   3 PORTING:
   4
   5 Sorry, no description of the interfaces is written up yet.  Look at existing
   6 back ends and work from there.
   7
   8 New hosts: If your host system has a strange header file setup, create a
   9 config/ho-foo.h file for it and include the appropriate header files or
  10 definitions there.  If your host has a broken compiler, or some broken macros
  11 in header files, create a host-specific file and repair the damage there.
  12 (See, for example, ho-rs6000.h.  The "assert" macro on that system doesn't work
  13 right, and a flag is set to rewrite an expression in tc-m68k.c that the native
  14 compiler mis-compiles.)
  15
  16 New target formats: Look at the BFD_ASSEMBLER code.  The a.out code might be a
  17 fair example.  There are no "good" examples yet, unfortunately, nor any good
  18 documentation of the changes.
  19
  20 New target processors: Check first to see if the BFD_ASSEMBLER interface is
  21 supported by the file format code you need to use.
  22
  23 New environments: ???
  24
  25 DOCUMENTATION:
  26
  27 The internals of gas need documenting.  (Actually, there is some documentation
  28 in doc/as.texinfo, but it's *way* out of date.)
  29
  30 The documentation should also contain a "Trouble" section similar to gcc's
  31 manual: real bugs, common problems, incompatibilities, etc.
  32
  33 Anyone want to offer to maintain a man page?
  34
  35 BFD CONVERSION:
  36
  37 The "#ifdef BFD_ASSEMBLER" code is on its way in; the "#ifndef BFD_ASSEMBLER"
  38 code is on its way out.  The new code uses BFD data structures, and calls BFD
  39 for anything that needs to be written to the output file.  The old code did all
  40 the writing itself, or in a couple of cases, used BFD as a slightly higher
  41 level than stdio (i.e., bfd_seek, bfd_write -- these are not the preferred
  42 interface).
  43
  44 Because of this, some of this code is messy.  Lots of ifdef's, and the
  45 non-BFD_ASSEMBLER version often has multiple conditional tests inside it for
  46 various processors or formats.  As the various targets get converted over,
  47 these will gradually go away.
  48
  49 As of the moment I'm editing this file, only the "sun4" and "decstation-bsd"
  50 targets can really use the BFD code.  Other back ends still need merging or
  51 touching up.
  52
  53 TO DO:
  54
  55 Remove DONTDEF code, commented-out code.
  56
  57 Eliminate, as much as possible, anything not in config that is conditionalized
  58 on a CPU, format, or environment.
  59
  60 Merge COFF support into one version, supporting all the pseudo-ops used in
  61 either versions now, but using BFD for high-level operations.  (See second
  62 following item.)  Currently there are two versions (plus the new BFD code),
  63 which support different features, and are used on different targets.
  64
  65 Convert remaining a.out/b.out targets to using the BFD_ASSEMBLER code by
  66 default.
  67
  68 Finish conversion to using BFD for all object file writing.  (This is the
  69 BFD_ASSEMBLER code, not BFD or BFD_HEADERS.)  VMS might be the tough one here,
  70 since there's no BFD support for it at all yet.  Eliminate the old code.  Some
  71 of this can be done target by target, so doing a target where the CPU or
  72 format already supports BFD_ASSEMBLER mode may be easiest.
  73
  74 Fix lots of uses of empty strings to use null pointers.  Will improve
  75 efficiency, and should make code clearer too.
  76
  77 Clean up comments; lots of 'em are one previous maintainer griping about
  78 another previous maintainer, unrelated to the code.  (And with no names,
  79 they're not so fun to read. :-)
  80
  81 For sparc: "call 0" becomes "jmpl %g0,%l7", and similarly for absolute
  82 addresses in -4096...4095.  (Solaris assembler does this.  No
  83 relocation required, no absolute symbol needed.)  For addresses
  84 outside the range, for COFF, keep generating an absolute symbol to use
  85 for relocs.
  86
  87 Get Steve to document H8/500 stuff (and others).
  88
  89 Improve test suite.  Incorporate more reported net bugs, and non-confidential
  90 Cygnus customer bugs, and anything else.
  91
  92 Add support for i386/i486 16-bit mode, so operating system initialization code
  93 doesn't require a separate assembler nor lots of `.byte' directives.
  94
  95 See if it's more maintainable (and not too much of a performance loss) to use
  96 a yacc grammar for parsing input.  The lexer will have to be flexible, and the
  97 grammar will have to contain any construct used on any platform, but it may be
  98 easier to maintain, instead of having code in most of the back ends.
  99
 100 PIC support.
 101
 102 Torbjorn Granlund <tege@cygnus.com> writes, regarding alpha .align:
 103
 104    Please make sure the .align directive works as in digital's assembler.
 105    They fill the space with a sequence of "bis $31,$31,$31;ldq_u $31,0($30)"
 106    since these two instructions can dual-issue.  Since .align is ued a lot by
 107    gcc, it is an important optimization.
 108
 109 Torbjorn Granlund <tege@cygnus.com> writes, regarding i386/i486/pentium:
 110
 111    In a new publication from Intel, "Optimization for Intel's 32 bit
 112    Processors", they recommended code alignment on a 16 byte boundary if that
 113    requires less than 8 bytes of fill instructions.  The Pentium is not
 114    affected by such alignment, the 386 wants alignment on a 4 byte boundary.
 115    It is the 486 that is most helped by large alignment.
 116
 117    Recommended nop instructions:
 118    1 byte:  90                     xchg %eax,%eax
 119    2 bytes: 8b c0                  movl %eax,%eax
 120    3 bytes: 8d 76 00               leal 0(%esi),%esi
 121    4 bytes: 8d 74 26 00            leal 0(%esi),%esi
 122    5 bytes: 8b c0 8d 76 00         movl %eax,%eax; leal 0(%esi),%esi
 123    6 bytes: 8d b6 00 00 00 00      leal 0(%esi),%esi
 124    7 bytes: 8d b4 26 00 00 00 00   leal 0(%esi),%esi
 125
 126    Note that `leal 0(%esi),%esi' has a few different encodings...
 127
 128    There are faster instructions for certain lengths, that are not true nops.
 129    If you can determine that a register and the condition code is dead (by
 130    scanning forwards for a register that is written before it is read, and
 131    similar for cc) you can use a `incl reg' for a 3 times faster 1 cycle nop...
 132
 133 (From old "NOTES" file to-do list, not really reviewed:)
 134
 135 fix relocation types for i860, perhaps by adding a ref pointer to fixS?
 136
 137 remove the ifdef's from fx_callj tests?
 138
 139 space tighten sparc alignment?
 140
 141 md_ => tc_
 142
 143 share b.out with a.out.