1 /* m68k-parse.h -- header file for m68k assembler
2 Copyright 1987, 1991, 1992, 1993, 1994, 1995, 1996, 1999, 2000,
3 2003, 2004, 2005, 2006, 2007, 2009 Free Software Foundation, Inc.
5 This file is part of GAS, the GNU Assembler.
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3, or (at your option)
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to the Free
19 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
25 /* This header file defines things which are shared between the
26 operand parser in m68k.y and the m68k assembler proper in
29 /* The various m68k registers. */
31 /* DATA and ADDR have to be contiguous, so that reg-DATA gives
32 0-7==data reg, 8-15==addr reg for operands that take both types.
34 We don't use forms like "ADDR0 = ADDR" here because this file is
35 likely to be used on an Apollo, and the broken Apollo compiler
36 gives an `undefined variable' error if we do that, according to
37 troy@cbme.unsw.edu.au. */
47 DATA0
= 1, /* 1- 8 == data registers 0-7 */
65 FP0
, /* Eight FP registers */
74 COP0
, /* Co-processor #0-#7 */
83 PC
, /* Program counter */
84 ZPC
, /* Hack for Program space, but 0 addressing */
86 CCR
, /* Condition code Reg */
87 ACC
, /* Accumulator Reg0 (EMAC or ACC on MAC). */
88 ACC1
, /* Accumulator Reg 1 (EMAC). */
89 ACC2
, /* Accumulator Reg 2 (EMAC). */
90 ACC3
, /* Accumulator Reg 3 (EMAC). */
91 ACCEXT01
, /* Accumulator extension 0&1 (EMAC). */
92 ACCEXT23
, /* Accumulator extension 2&3 (EMAC). */
93 MACSR
, /* MAC Status Reg */
94 MASK
, /* Modulus Reg */
96 /* These have to be grouped together for the movec instruction to work. */
97 USP
, /* User Stack Pointer */
98 ISP
, /* Interrupt stack pointer */
114 BUSCR
, /* 68060 added these. */
116 ROMBAR
, /* mcf5200 added these. */
117 RAMBAR_ALT
, /* Some CF chips have RAMBAR using
121 MMUBAR
, /* mcfv4e added these. */
122 ROMBAR0
, /* mcfv4e added these. */
123 ROMBAR1
, /* mcfv4e added these. */
124 MPCR
, EDRAMBAR
, SECMBAR
, /* mcfv4e added these. */
125 PCR1U0
, PCR1L0
, PCR1U1
, PCR1L1
,/* mcfv4e added these. */
126 PCR2U0
, PCR2L0
, PCR2U1
, PCR2L1
,/* mcfv4e added these. */
127 PCR3U0
, PCR3L0
, PCR3U1
, PCR3L1
,/* mcfv4e added these. */
128 MBAR0
, MBAR1
, /* mcfv4e added these. */
129 ACR0
, ACR1
, ACR2
, ACR3
, /* mcf5200 added these. */
130 ACR4
, ACR5
, ACR6
, ACR7
, /* mcf54418 added these. */
131 FLASHBAR
, RAMBAR
, /* mcf528x added these. */
132 MBAR2
, /* mcf5249 added this. */
134 RGPIOBAR
, /* mcf54418 added this. */
136 CAC
, /* fido added this. */
138 #define last_movec_reg MBO
139 /* End of movec ordering constraints. */
145 DRP
, /* 68851 or 68030 MMU regs */
167 PSR
, /* aka MMUSR on 68030 (but not MMUSR on 68040)
168 and ACUSR on 68ec030 */
171 IC
, /* instruction cache token */
172 DC
, /* data cache token */
173 NC
, /* no cache token */
174 BC
, /* both caches token */
176 TT0
, /* 68030 access control unit regs */
179 ZDATA0
, /* suppressed data registers. */
188 ZADDR0
, /* suppressed address registers. */
197 /* Upper and lower half of data and address registers. Order *must*
198 be DATAxL, ADDRxL, DATAxU, ADDRxU. */
199 DATA0L
, /* lower half of data registers */
208 ADDR0L
, /* lower half of address registers */
217 DATA0U
, /* upper half of data registers */
226 ADDR0U
, /* upper half of address registers */
236 /* Size information. */
246 /* Word (2 bytes). */
249 /* Longword (4 bytes). */
253 /* The structure used to hold information about an index register. */
257 /* The index register itself. */
258 enum m68k_register reg
;
260 /* The size to use. */
263 /* The value to scale by. */
268 /* The type of a PIC expression. */
272 pic_none
, /* not pic */
273 pic_plt_pcrel
, /* @PLTPC */
274 pic_got_pcrel
, /* @GOTPC */
275 pic_plt_off
, /* @PLT */
276 pic_got_off
, /* @GOT */
277 pic_tls_gd
, /* @TLSGD */
278 pic_tls_ldm
, /* @TLSLDM */
279 pic_tls_ldo
, /* @TLSLDO */
280 pic_tls_ie
, /* @TLSIE */
281 pic_tls_le
/* @TLSLE */
285 /* The structure used to hold information about an expression. */
289 /* The size to use. */
293 /* The type of pic relocation if any. */
294 enum pic_relocation pic_reloc
;
297 /* The expression itself. */
301 /* The operand modes. */
303 enum m68k_operand_type
318 LSH
, /* MAC/EMAC scalefactor '<<'. */
319 RSH
, /* MAC/EMAC scalefactor '>>'. */
323 /* The structure used to hold a parsed operand. */
327 /* The type of operand. */
328 enum m68k_operand_type mode
;
330 /* The main register. */
331 enum m68k_register reg
;
333 /* The register mask for mode REGLST. */
336 /* An error message. */
339 /* The index register. */
340 struct m68k_indexreg index
;
342 /* The displacement. */
343 struct m68k_exp disp
;
345 /* The outer displacement. */
346 struct m68k_exp odisp
;
348 /* Is a trailing '&' added to an <ea>? (for MAC/EMAC mask addressing). */
349 int trailing_ampersand
;
352 #endif /* ! defined (M68K_PARSE_H) */
354 /* The parsing function. */
356 extern int m68k_ip_op (char *, struct m68k_op
*);
358 /* Whether register prefixes are optional. */
359 extern int flag_reg_prefix_optional
;
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