Don't ignore .line directives
[deliverable/binutils-gdb.git] / gas / config / tc-a29k.c
1 /* tc-a29k.c -- Assemble for the AMD 29000.
2 Copyright (C) 1989, 1990, 1991 Free Software Foundation, Inc.
3
4 This file is part of GAS, the GNU Assembler.
5
6 GAS is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
9 any later version.
10
11 GAS is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with GAS; see the file COPYING. If not, write to
18 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
19
20 /* $Id$ */
21
22 /* John Gilmore has reorganized this module somewhat, to make it easier
23 to convert it to new machines' assemblers as desired. There was too
24 much bloody rewriting required before. There still probably is. */
25
26 #include "as.h"
27
28 #include "opcode/a29k.h"
29
30 /* Make it easier to clone this machine desc into another one. */
31 #define machine_opcode a29k_opcode
32 #define machine_opcodes a29k_opcodes
33 #define machine_ip a29k_ip
34 #define machine_it a29k_it
35
36 const relax_typeS md_relax_table[] = { 0 };
37
38 #define IMMEDIATE_BIT 0x01000000 /* Turns RB into Immediate */
39 #define ABSOLUTE_BIT 0x01000000 /* Turns PC-relative to Absolute */
40 #define CE_BIT 0x00800000 /* Coprocessor enable in LOAD */
41 #define UI_BIT 0x00000080 /* Unsigned integer in CONVERT */
42
43 /* handle of the OPCODE hash table */
44 static struct hash_control *op_hash = NULL;
45
46 struct machine_it {
47 char *error;
48 unsigned long opcode;
49 struct nlist *nlistp;
50 expressionS exp;
51 int pcrel;
52 int reloc_offset; /* Offset of reloc within insn */
53 enum reloc_type reloc;
54 } the_insn;
55
56 #ifdef __STDC__
57
58 /* static int getExpression(char *str); */
59 static void machine_ip(char *str);
60 /* static void print_insn(struct machine_it *insn); */
61 static void s_data1(void);
62 static void s_use(void);
63
64 #else /* __STDC__ */
65
66 /* static int getExpression(); */
67 static void machine_ip();
68 /* static void print_insn(); */
69 static void s_data1();
70 static void s_use();
71
72 #endif /* __STDC__ */
73
74 const pseudo_typeS
75 md_pseudo_table[] = {
76 { "align", s_align_bytes, 4 },
77 { "block", s_space, 0 },
78 { "cputype", s_ignore, 0 }, /* CPU as 29000 or 29050 */
79 { "reg", s_lsym, 0 }, /* Register equate, same as equ */
80 { "space", s_ignore, 0 }, /* Listing control */
81 { "sect", s_ignore, 0 }, /* Creation of coff sections */
82 { "use", s_use, 0 },
83 { "word", cons, 4 },
84 { NULL, 0, 0 },
85 };
86
87 int md_short_jump_size = 4;
88 int md_long_jump_size = 4;
89 #if defined(BFD_HEADERS)
90 #ifdef RELSZ
91 int md_reloc_size = RELSZ; /* Coff headers */
92 #else
93 int md_reloc_size = 12; /* something else headers */
94 #endif
95 #else
96 int md_reloc_size = 12; /* Not bfdized*/
97 #endif
98
99 /* This array holds the chars that always start a comment. If the
100 pre-processor is disabled, these aren't very useful */
101 char comment_chars[] = ";";
102
103 /* This array holds the chars that only start a comment at the beginning of
104 a line. If the line seems to have the form '# 123 filename'
105 .line and .file directives will appear in the pre-processed output */
106 /* Note that input_file.c hand checks for '#' at the beginning of the
107 first line of the input file. This is because the compiler outputs
108 #NO_APP at the beginning of its output. */
109 /* Also note that comments like this one will always work */
110 char line_comment_chars[] = "#";
111
112 /* We needed an unused char for line separation to work around the
113 lack of macros, using sed and such. */
114 char line_separator_chars[] = "@";
115
116 /* Chars that can be used to separate mant from exp in floating point nums */
117 char EXP_CHARS[] = "eE";
118
119 /* Chars that mean this number is a floating point constant */
120 /* As in 0f12.456 */
121 /* or 0d1.2345e12 */
122 char FLT_CHARS[] = "rRsSfFdDxXpP";
123
124 /* Also be aware that MAXIMUM_NUMBER_OF_CHARS_FOR_FLOAT may have to be
125 changed in read.c . Ideally it shouldn't have to know about it at all,
126 but nothing is ideal around here.
127 */
128
129 static unsigned char octal[256];
130 #define isoctal(c) octal[c]
131 static unsigned char toHex[256];
132
133 /*
134 * anull bit - causes the branch delay slot instructions to not be executed
135 */
136 #define ANNUL (1 << 29)
137
138 static void
139 s_use()
140 {
141
142 if (strncmp(input_line_pointer, ".text", 5) == 0) {
143 input_line_pointer += 5;
144 s_text();
145 return;
146 }
147 if (strncmp(input_line_pointer, ".data", 5) == 0) {
148 input_line_pointer += 5;
149 s_data();
150 return;
151 }
152 if (strncmp(input_line_pointer, ".data1", 6) == 0) {
153 input_line_pointer += 6;
154 s_data1();
155 return;
156 }
157 /* Literals can't go in the text segment because you can't read
158 from instruction memory on some 29k's. So, into initialized data. */
159 if (strncmp(input_line_pointer, ".lit", 4) == 0) {
160 input_line_pointer += 4;
161 subseg_new(SEG_DATA, 200);
162 demand_empty_rest_of_line();
163 return;
164 }
165
166 as_bad("Unknown segment type");
167 demand_empty_rest_of_line();
168 return;
169 }
170
171 static void
172 s_data1()
173 {
174 subseg_new(SEG_DATA, 1);
175 demand_empty_rest_of_line();
176 return;
177 }
178
179 /* Install symbol definition that maps REGNAME to REGNO.
180 FIXME-SOON: These are not recognized in mixed case. */
181
182 static void
183 insert_sreg (regname, regnum)
184 char *regname;
185 int regnum;
186 {
187 /* FIXME-SOON, put something in these syms so they won't be output to the symbol
188 table of the resulting object file. */
189
190 /* Must be large enough to hold the names of the special registers. */
191 char buf[80];
192 int i;
193
194 symbol_table_insert(symbol_new(regname, SEG_REGISTER, regnum, &zero_address_frag));
195 for (i = 0; regname[i]; i++)
196 buf[i] = islower (regname[i]) ? toupper (regname[i]) : regname[i];
197 buf[i] = '\0';
198
199 symbol_table_insert(symbol_new(buf, SEG_REGISTER, regnum, &zero_address_frag));
200 } /* insert_sreg() */
201
202 /* Install symbol definitions for assorted special registers.
203 See ASM29K Ref page 2-9. */
204
205 void define_some_regs() {
206 #define SREG 256
207
208 /* Protected special-purpose register names */
209 insert_sreg ("vab", SREG+0);
210 insert_sreg ("ops", SREG+1);
211 insert_sreg ("cps", SREG+2);
212 insert_sreg ("cfg", SREG+3);
213 insert_sreg ("cha", SREG+4);
214 insert_sreg ("chd", SREG+5);
215 insert_sreg ("chc", SREG+6);
216 insert_sreg ("rbp", SREG+7);
217 insert_sreg ("tmc", SREG+8);
218 insert_sreg ("tmr", SREG+9);
219 insert_sreg ("pc0", SREG+10);
220 insert_sreg ("pc1", SREG+11);
221 insert_sreg ("pc2", SREG+12);
222 insert_sreg ("mmu", SREG+13);
223 insert_sreg ("lru", SREG+14);
224
225 /* Unprotected special-purpose register names */
226 insert_sreg ("ipc", SREG+128);
227 insert_sreg ("ipa", SREG+129);
228 insert_sreg ("ipb", SREG+130);
229 insert_sreg ("q", SREG+131);
230 insert_sreg ("alu", SREG+132);
231 insert_sreg ("bp", SREG+133);
232 insert_sreg ("fc", SREG+134);
233 insert_sreg ("cr", SREG+135);
234 insert_sreg ("fpe", SREG+160);
235 insert_sreg ("inte",SREG+161);
236 insert_sreg ("fps", SREG+162);
237 /* "", SREG+163); Reserved */
238 insert_sreg ("exop",SREG+164);
239 } /* define_some_regs() */
240
241 /* This function is called once, at assembler startup time. It should
242 set up all the tables, etc. that the MD part of the assembler will need. */
243 void
244 md_begin()
245 {
246 register char *retval = NULL;
247 int lose = 0;
248 register int skipnext = 0;
249 register unsigned int i;
250 register char *strend, *strend2;
251
252 /* Hash up all the opcodes for fast use later. */
253
254 op_hash = hash_new();
255 if (op_hash == NULL)
256 as_fatal("Virtual memory exhausted");
257
258 for (i = 0; i < num_opcodes; i++)
259 {
260 const char *name = machine_opcodes[i].name;
261
262 if (skipnext) {
263 skipnext = 0;
264 continue;
265 }
266
267 /* Hack to avoid multiple opcode entries. We pre-locate all the
268 variations (b/i field and P/A field) and handle them. */
269
270 if (!strcmp (name, machine_opcodes[i+1].name)) {
271 if ((machine_opcodes[i].opcode ^ machine_opcodes[i+1].opcode)
272 != 0x01000000)
273 goto bad_table;
274 strend = machine_opcodes[i ].args+strlen(machine_opcodes[i ].args)-1;
275 strend2 = machine_opcodes[i+1].args+strlen(machine_opcodes[i+1].args)-1;
276 switch (*strend) {
277 case 'b':
278 if (*strend2 != 'i') goto bad_table;
279 break;
280 case 'i':
281 if (*strend2 != 'b') goto bad_table;
282 break;
283 case 'P':
284 if (*strend2 != 'A') goto bad_table;
285 break;
286 case 'A':
287 if (*strend2 != 'P') goto bad_table;
288 break;
289 default:
290 bad_table:
291 fprintf (stderr, "internal error: can't handle opcode %s\n", name);
292 lose = 1;
293 }
294
295 /* OK, this is an i/b or A/P pair. We skip the higher-valued one,
296 and let the code for operand checking handle OR-ing in the bit. */
297 if (machine_opcodes[i].opcode & 1)
298 continue;
299 else
300 skipnext = 1;
301 }
302
303 retval = hash_insert (op_hash, name, &machine_opcodes[i]);
304 if (retval != NULL && *retval != '\0')
305 {
306 fprintf (stderr, "internal error: can't hash `%s': %s\n",
307 machine_opcodes[i].name, retval);
308 lose = 1;
309 }
310 }
311
312 if (lose)
313 as_fatal("Broken assembler. No assembly attempted.");
314
315 for (i = '0'; i < '8'; ++i)
316 octal[i] = 1;
317 for (i = '0'; i <= '9'; ++i)
318 toHex[i] = i - '0';
319 for (i = 'a'; i <= 'f'; ++i)
320 toHex[i] = i + 10 - 'a';
321 for (i = 'A'; i <= 'F'; ++i)
322 toHex[i] = i + 10 - 'A';
323
324 define_some_regs ();
325 }
326
327 void md_end() {
328 return;
329 }
330
331 /* Assemble a single instruction. Its label has already been handled
332 by the generic front end. We just parse opcode and operands, and
333 produce the bytes of data and relocation. */
334
335 void md_assemble(str)
336 char *str;
337 {
338 char *toP;
339 /* !!!! int rsd; */
340
341 know(str);
342 machine_ip(str);
343 toP = frag_more(4);
344 /* put out the opcode */
345 md_number_to_chars(toP, the_insn.opcode, 4);
346
347 /* put out the symbol-dependent stuff */
348 if (the_insn.reloc != NO_RELOC) {
349 fix_new(
350 frag_now, /* which frag */
351 (toP - frag_now->fr_literal + the_insn.reloc_offset), /* where */
352 4, /* size */
353 the_insn.exp.X_add_symbol,
354 the_insn.exp.X_subtract_symbol,
355 the_insn.exp.X_add_number,
356 the_insn.pcrel,
357 the_insn.reloc
358 );
359 }
360 }
361
362 char *
363 parse_operand (s, operandp)
364 char *s;
365 expressionS *operandp;
366 {
367 char *save = input_line_pointer;
368 char *new;
369 segT seg;
370
371 input_line_pointer = s;
372 seg = expr (0, operandp);
373 new = input_line_pointer;
374 input_line_pointer = save;
375
376 switch (seg) {
377 case SEG_ABSOLUTE:
378 case SEG_TEXT:
379 case SEG_DATA:
380 case SEG_BSS:
381 case SEG_UNKNOWN:
382 case SEG_DIFFERENCE:
383 case SEG_BIG:
384 case SEG_REGISTER:
385 return new;
386
387 case SEG_ABSENT:
388 as_bad("Missing operand");
389 return new;
390
391 default:
392 as_bad("Don't understand operand of type %s", segment_name (seg));
393 return new;
394 }
395 }
396
397 /* Instruction parsing. Takes a string containing the opcode.
398 Operands are at input_line_pointer. Output is in the_insn.
399 Warnings or errors are generated. */
400
401 static void
402 machine_ip(str)
403 char *str;
404 {
405 char *s;
406 const char *args;
407 /* !!!! char c; */
408 /* !!!! unsigned long i; */
409 struct machine_opcode *insn;
410 char *argsStart;
411 unsigned long opcode;
412 /* !!!! unsigned int mask; */
413 expressionS the_operand;
414 expressionS *operand = &the_operand;
415 unsigned int reg;
416
417 /* Must handle `div0' opcode. */
418 s = str;
419 if (isalpha(*s))
420 for (; isalnum(*s); ++s)
421 if (isupper (*s))
422 *s = tolower (*s);
423
424 switch (*s) {
425 case '\0':
426 break;
427
428 case ' ': /* FIXME-SOMEDAY more whitespace */
429 *s++ = '\0';
430 break;
431
432 default:
433 as_bad("Unknown opcode: `%s'", str);
434 return;
435 }
436 if ((insn = (struct machine_opcode *) hash_find(op_hash, str)) == NULL) {
437 as_bad("Unknown opcode `%s'.", str);
438 return;
439 }
440 argsStart = s;
441 opcode = insn->opcode;
442 bzero(&the_insn, sizeof(the_insn));
443 the_insn.reloc = NO_RELOC;
444
445 /*
446 * Build the opcode, checking as we go to make
447 * sure that the operands match.
448 *
449 * If an operand matches, we modify the_insn or opcode appropriately,
450 * and do a "continue". If an operand fails to match, we "break".
451 */
452 if (insn->args[0] != '\0')
453 s = parse_operand (s, operand); /* Prime the pump */
454
455 for (args = insn->args; ; ++args) {
456 switch (*args) {
457
458 case '\0': /* end of args */
459 if (*s == '\0') {
460 /* We are truly done. */
461 the_insn.opcode = opcode;
462 return;
463 }
464 as_bad("Too many operands: %s", s);
465 break;
466
467 case ',': /* Must match a comma */
468 if (*s++ == ',') {
469 s = parse_operand (s, operand); /* Parse next opnd */
470 continue;
471 }
472 break;
473
474 case 'v': /* Trap numbers (immediate field) */
475 if (operand->X_seg == SEG_ABSOLUTE) {
476 if (operand->X_add_number < 256) {
477 opcode |= (operand->X_add_number << 16);
478 continue;
479 } else {
480 as_bad("Immediate value of %d is too large",
481 operand->X_add_number);
482 continue;
483 }
484 }
485 the_insn.reloc = RELOC_8;
486 the_insn.reloc_offset = 1; /* BIG-ENDIAN Byte 1 of insn */
487 the_insn.exp = *operand;
488 continue;
489
490 case 'b': /* A general register or 8-bit immediate */
491 case 'i':
492 /* We treat the two cases identically since we mashed
493 them together in the opcode table. */
494 if (operand->X_seg == SEG_REGISTER)
495 goto general_reg;
496
497 opcode |= IMMEDIATE_BIT;
498 if (operand->X_seg == SEG_ABSOLUTE) {
499 if (operand->X_add_number < 256) {
500 opcode |= operand->X_add_number;
501 continue;
502 } else {
503 as_bad("Immediate value of %d is too large",
504 operand->X_add_number);
505 continue;
506 }
507 }
508 the_insn.reloc = RELOC_8;
509 the_insn.reloc_offset = 3; /* BIG-ENDIAN Byte 3 of insn */
510 the_insn.exp = *operand;
511 continue;
512
513 case 'a': /* next operand must be a register */
514 case 'c':
515 general_reg:
516 /* lrNNN or grNNN or %%expr or a user-def register name */
517 if (operand->X_seg != SEG_REGISTER)
518 break; /* Only registers */
519 know (operand->X_add_symbol == 0);
520 know (operand->X_subtract_symbol == 0);
521 reg = operand->X_add_number;
522 if (reg >= SREG)
523 break; /* No special registers */
524
525 /*
526 * Got the register, now figure out where
527 * it goes in the opcode.
528 */
529 switch (*args) {
530 case 'a':
531 opcode |= reg << 8;
532 continue;
533
534 case 'b':
535 case 'i':
536 opcode |= reg;
537 continue;
538
539 case 'c':
540 opcode |= reg << 16;
541 continue;
542 }
543 as_fatal("failed sanity check.");
544 break;
545
546 case 'x': /* 16 bit constant, zero-extended */
547 case 'X': /* 16 bit constant, one-extended */
548 if (operand->X_seg == SEG_ABSOLUTE) {
549 opcode |= (operand->X_add_number & 0xFF) << 0 |
550 ((operand->X_add_number & 0xFF00) << 8);
551 continue;
552 }
553 the_insn.reloc = RELOC_CONST;
554 the_insn.exp = *operand;
555 continue;
556
557 case 'h':
558 if (operand->X_seg == SEG_ABSOLUTE) {
559 opcode |= (operand->X_add_number & 0x00FF0000) >> 16 |
560 (((unsigned long)operand->X_add_number
561 /* avoid sign ext */ & 0xFF000000) >> 8);
562 continue;
563 }
564 the_insn.reloc = RELOC_CONSTH;
565 the_insn.exp = *operand;
566 continue;
567
568 case 'P': /* PC-relative jump address */
569 case 'A': /* Absolute jump address */
570 /* These two are treated together since we folded the
571 opcode table entries together. */
572 if (operand->X_seg == SEG_ABSOLUTE) {
573 opcode |= ABSOLUTE_BIT |
574 (operand->X_add_number & 0x0003FC00) << 6 |
575 ((operand->X_add_number & 0x000003FC) >> 2);
576 continue;
577 }
578 the_insn.reloc = RELOC_JUMPTARG;
579 the_insn.exp = *operand;
580 the_insn.pcrel = 1; /* Assume PC-relative jump */
581 /* FIXME-SOON, Do we figure out whether abs later, after know sym val? */
582 continue;
583
584 case 'e': /* Coprocessor enable bit for LOAD/STORE insn */
585 if (operand->X_seg == SEG_ABSOLUTE) {
586 if (operand->X_add_number == 0)
587 continue;
588 if (operand->X_add_number == 1) {
589 opcode |= CE_BIT;
590 continue;
591 }
592 }
593 break;
594
595 case 'n': /* Control bits for LOAD/STORE instructions */
596 if (operand->X_seg == SEG_ABSOLUTE &&
597 operand->X_add_number < 128) {
598 opcode |= (operand->X_add_number << 16);
599 continue;
600 }
601 break;
602
603 case 's': /* Special register number */
604 if (operand->X_seg != SEG_REGISTER)
605 break; /* Only registers */
606 if (operand->X_add_number < SREG)
607 break; /* Not a special register */
608 opcode |= (operand->X_add_number & 0xFF) << 8;
609 continue;
610
611 case 'u': /* UI bit of CONVERT */
612 if (operand->X_seg == SEG_ABSOLUTE) {
613 if (operand->X_add_number == 0)
614 continue;
615 if (operand->X_add_number == 1) {
616 opcode |= UI_BIT;
617 continue;
618 }
619 }
620 break;
621
622 case 'r': /* RND bits of CONVERT */
623 if (operand->X_seg == SEG_ABSOLUTE &&
624 operand->X_add_number < 8) {
625 opcode |= operand->X_add_number << 4;
626 continue;
627 }
628 break;
629
630 case 'd': /* FD bits of CONVERT */
631 if (operand->X_seg == SEG_ABSOLUTE &&
632 operand->X_add_number < 4) {
633 opcode |= operand->X_add_number << 2;
634 continue;
635 }
636 break;
637
638
639 case 'f': /* FS bits of CONVERT */
640 if (operand->X_seg == SEG_ABSOLUTE &&
641 operand->X_add_number < 4) {
642 opcode |= operand->X_add_number << 0;
643 continue;
644 }
645 break;
646
647 case 'C':
648 if (operand->X_seg == SEG_ABSOLUTE &&
649 operand->X_add_number < 4) {
650 opcode |= operand->X_add_number << 16;
651 continue;
652 }
653 break;
654
655 case 'F':
656 if (operand->X_seg == SEG_ABSOLUTE &&
657 operand->X_add_number < 16) {
658 opcode |= operand->X_add_number << 18;
659 continue;
660 }
661 break;
662
663 default:
664 BAD_CASE (*args);
665 }
666 /* Types or values of args don't match. */
667 as_bad("Invalid operands");
668 return;
669 }
670 }
671
672 /*
673 This is identical to the md_atof in m68k.c. I think this is right,
674 but I'm not sure.
675
676 Turn a string in input_line_pointer into a floating point constant of type
677 type, and store the appropriate bytes in *litP. The number of LITTLENUMS
678 emitted is stored in *sizeP . An error message is returned, or NULL on OK.
679 */
680
681 /* Equal to MAX_PRECISION in atof-ieee.c */
682 #define MAX_LITTLENUMS 6
683
684 char *
685 md_atof(type,litP,sizeP)
686 char type;
687 char *litP;
688 int *sizeP;
689 {
690 int prec;
691 LITTLENUM_TYPE words[MAX_LITTLENUMS];
692 LITTLENUM_TYPE *wordP;
693 char *t;
694
695 switch(type) {
696
697 case 'f':
698 case 'F':
699 case 's':
700 case 'S':
701 prec = 2;
702 break;
703
704 case 'd':
705 case 'D':
706 case 'r':
707 case 'R':
708 prec = 4;
709 break;
710
711 case 'x':
712 case 'X':
713 prec = 6;
714 break;
715
716 case 'p':
717 case 'P':
718 prec = 6;
719 break;
720
721 default:
722 *sizeP=0;
723 return "Bad call to MD_ATOF()";
724 }
725 t=atof_ieee(input_line_pointer,type,words);
726 if(t)
727 input_line_pointer=t;
728 *sizeP=prec * sizeof(LITTLENUM_TYPE);
729 for(wordP=words;prec--;) {
730 md_number_to_chars(litP,(long)(*wordP++),sizeof(LITTLENUM_TYPE));
731 litP+=sizeof(LITTLENUM_TYPE);
732 }
733 return ""; /* Someone should teach Dean about null pointers */
734 }
735
736 /*
737 * Write out big-endian.
738 */
739 void
740 md_number_to_chars(buf,val,n)
741 char *buf;
742 long val;
743 int n;
744 {
745
746 switch(n) {
747
748 case 4:
749 *buf++ = val >> 24;
750 *buf++ = val >> 16;
751 case 2:
752 *buf++ = val >> 8;
753 case 1:
754 *buf = val;
755 break;
756
757 default:
758 as_fatal("failed sanity check.");
759 }
760 return;
761 }
762
763 void md_apply_fix(fixP, val)
764 fixS *fixP;
765 long val;
766 {
767 char *buf = fixP->fx_where + fixP->fx_frag->fr_literal;
768
769 fixP->fx_addnumber = val; /* Remember value for emit_reloc */
770
771
772 know(fixP->fx_size == 4);
773 know(fixP->fx_r_type < NO_RELOC);
774
775 /*
776 * This is a hack. There should be a better way to
777 * handle this.
778 */
779 if (fixP->fx_r_type == RELOC_WDISP30 && fixP->fx_addsy) {
780 val += fixP->fx_where + fixP->fx_frag->fr_address;
781 }
782
783 switch (fixP->fx_r_type) {
784
785 case RELOC_32:
786 buf[0] = val >> 24;
787 buf[1] = val >> 16;
788 buf[2] = val >> 8;
789 buf[3] = val;
790 break;
791
792 case RELOC_8:
793 buf[0] = val;
794 break;
795
796 case RELOC_WDISP30:
797 val = (val >>= 2) + 1;
798 buf[0] |= (val >> 24) & 0x3f;
799 buf[1]= (val >> 16);
800 buf[2] = val >> 8;
801 buf[3] = val;
802 break;
803
804 case RELOC_HI22:
805 buf[1] |= (val >> 26) & 0x3f;
806 buf[2] = val >> 18;
807 buf[3] = val >> 10;
808 break;
809
810 case RELOC_LO10:
811 buf[2] |= (val >> 8) & 0x03;
812 buf[3] = val;
813 break;
814
815 case RELOC_BASE13:
816 buf[2] |= (val >> 8) & 0x1f;
817 buf[3] = val;
818 break;
819
820 case RELOC_WDISP22:
821 val = (val >>= 2) + 1;
822 /* FALLTHROUGH */
823 case RELOC_BASE22:
824 buf[1] |= (val >> 16) & 0x3f;
825 buf[2] = val >> 8;
826 buf[3] = val;
827 break;
828
829 #if 0
830 case RELOC_PC10:
831 case RELOC_PC22:
832 case RELOC_JMP_TBL:
833 case RELOC_SEGOFF16:
834 case RELOC_GLOB_DAT:
835 case RELOC_JMP_SLOT:
836 case RELOC_RELATIVE:
837 #endif
838 case RELOC_JUMPTARG: /* 00XX00XX pattern in a word */
839 buf[1] = val >> 10; /* Holds bits 0003FFFC of address */
840 buf[3] = val >> 2;
841 break;
842
843 case RELOC_CONST: /* 00XX00XX pattern in a word */
844 buf[1] = val >> 8; /* Holds bits 0000XXXX */
845 buf[3] = val;
846 break;
847
848 case RELOC_CONSTH: /* 00XX00XX pattern in a word */
849 buf[1] = val >> 24; /* Holds bits XXXX0000 */
850 buf[3] = val >> 16;
851 break;
852
853 case NO_RELOC:
854 default:
855 as_bad("bad relocation type: 0x%02x", fixP->fx_r_type);
856 break;
857 }
858 return;
859 }
860
861 #ifdef OBJ_COFF
862 short tc_coff_fix2rtype(fixP)
863 fixS *fixP;
864 {
865
866 /* FIXME-NOW: relocation type handling is not yet written for
867 a29k. */
868
869
870 switch (fixP->fx_r_type) {
871 case RELOC_32: return(R_WORD);
872 case RELOC_8: return(R_BYTE);
873 case RELOC_CONST: return (R_ILOHALF);
874 case RELOC_CONSTH: return (R_IHIHALF);
875 case RELOC_JUMPTARG: return (R_IREL);
876 default: printf("need %o3\n", fixP->fx_r_type);
877 abort(0);
878 } /* switch on type */
879
880 return(0);
881 } /* tc_coff_fix2rtype() */
882 #endif /* OBJ_COFF */
883
884 /* should never be called for sparc */
885 void md_create_short_jump(ptr, from_addr, to_addr, frag, to_symbol)
886 char *ptr;
887 long from_addr, to_addr;
888 fragS *frag;
889 symbolS *to_symbol;
890 {
891 as_fatal("a29k_create_short_jmp\n");
892 }
893
894 /* should never be called for 29k */
895 void md_convert_frag(headers, fragP)
896 object_headers *headers;
897 register fragS *fragP;
898 {
899 as_fatal("sparc_convert_frag\n");
900 }
901
902 /* should never be called for 29k */
903 void md_create_long_jump(ptr, from_addr, to_addr, frag, to_symbol)
904 char *ptr;
905 long from_addr,
906 to_addr;
907 fragS *frag;
908 symbolS *to_symbol;
909 {
910 as_fatal("sparc_create_long_jump\n");
911 }
912
913 /* should never be called for sparc */
914 int md_estimate_size_before_relax(fragP, segtype)
915 register fragS *fragP;
916 segT segtype;
917 {
918 as_fatal("sparc_estimate_size_before_relax\n");
919 }
920
921 #if 0
922 /* for debugging only */
923 static void
924 print_insn(insn)
925 struct machine_it *insn;
926 {
927 char *Reloc[] = {
928 "RELOC_8",
929 "RELOC_16",
930 "RELOC_32",
931 "RELOC_DISP8",
932 "RELOC_DISP16",
933 "RELOC_DISP32",
934 "RELOC_WDISP30",
935 "RELOC_WDISP22",
936 "RELOC_HI22",
937 "RELOC_22",
938 "RELOC_13",
939 "RELOC_LO10",
940 "RELOC_SFA_BASE",
941 "RELOC_SFA_OFF13",
942 "RELOC_BASE10",
943 "RELOC_BASE13",
944 "RELOC_BASE22",
945 "RELOC_PC10",
946 "RELOC_PC22",
947 "RELOC_JMP_TBL",
948 "RELOC_SEGOFF16",
949 "RELOC_GLOB_DAT",
950 "RELOC_JMP_SLOT",
951 "RELOC_RELATIVE",
952 "NO_RELOC"
953 };
954
955 if (insn->error) {
956 fprintf(stderr, "ERROR: %s\n");
957 }
958 fprintf(stderr, "opcode=0x%08x\n", insn->opcode);
959 fprintf(stderr, "reloc = %s\n", Reloc[insn->reloc]);
960 fprintf(stderr, "exp = {\n");
961 fprintf(stderr, "\t\tX_add_symbol = %s\n",
962 insn->exp.X_add_symbol ?
963 (S_GET_NAME(insn->exp.X_add_symbol) ?
964 S_GET_NAME(insn->exp.X_add_symbol) : "???") : "0");
965 fprintf(stderr, "\t\tX_sub_symbol = %s\n",
966 insn->exp.X_subtract_symbol ?
967 (S_GET_NAME(insn->exp.X_subtract_symbol) ?
968 S_GET_NAME(insn->exp.X_subtract_symbol) : "???") : "0");
969 fprintf(stderr, "\t\tX_add_number = %d\n",
970 insn->exp.X_add_number);
971 fprintf(stderr, "}\n");
972 return;
973 }
974 #endif
975
976 /* Translate internal representation of relocation info to target format.
977
978 On sparc/29k: first 4 bytes are normal unsigned long address, next three
979 bytes are index, most sig. byte first. Byte 7 is broken up with
980 bit 7 as external, bits 6 & 5 unused, and the lower
981 five bits as relocation type. Next 4 bytes are long addend. */
982 /* Thanx and a tip of the hat to Michael Bloom, mb@ttidca.tti.com */
983
984 #ifdef OBJ_AOUT
985
986 void tc_aout_fix_to_chars(where, fixP, segment_address_in_file)
987 char *where;
988 fixS *fixP;
989 relax_addressT segment_address_in_file;
990 {
991 long r_index;
992
993 know(fixP->fx_r_type < NO_RELOC);
994 know(fixP->fx_addsy != NULL);
995
996 r_index = (S_IS_DEFINED(fixP->fx_addsy)
997 ? S_GET_TYPE(fixP->fx_addsy)
998 : fixP->fx_addsy->sy_number);
999
1000 /* this is easy */
1001 md_number_to_chars(where,
1002 fixP->fx_frag->fr_address + fixP->fx_where - segment_address_in_file,
1003 4);
1004
1005 /* now the fun stuff */
1006 where[4] = (r_index >> 16) & 0x0ff;
1007 where[5] = (r_index >> 8) & 0x0ff;
1008 where[6] = r_index & 0x0ff;
1009 where[7] = (((!S_IS_DEFINED(fixP->fx_addsy)) << 7) & 0x80) | (0 & 0x60) | (fixP->fx_r_type & 0x1F);
1010 /* Also easy */
1011 md_number_to_chars(&where[8], fixP->fx_addnumber, 4);
1012
1013 return;
1014 } /* tc_aout_fix_to_chars() */
1015
1016 #endif /* OBJ_AOUT */
1017
1018 int
1019 md_parse_option(argP,cntP,vecP)
1020 char **argP;
1021 int *cntP;
1022 char ***vecP;
1023 {
1024 return(0);
1025 }
1026
1027
1028 /* Default the values of symbols known that should be "predefined". We
1029 don't bother to predefine them unless you actually use one, since there
1030 are a lot of them. */
1031
1032 symbolS *md_undefined_symbol (name)
1033 char *name;
1034 {
1035 long regnum;
1036 char testbuf[5+ /*SLOP*/ 5];
1037
1038 if (name[0] == 'g' || name[0] == 'G' || name[0] == 'l' || name[0] == 'L')
1039 {
1040 /* Perhaps a global or local register name */
1041 if (name[1] == 'r' || name[1] == 'R')
1042 {
1043 /* Parse the number, make sure it has no extra zeroes or trailing
1044 chars */
1045 regnum = atol(&name[2]);
1046 if (regnum > 127)
1047 return 0;
1048 sprintf(testbuf, "%ld", regnum);
1049 if (strcmp (testbuf, &name[2]) != 0)
1050 return 0; /* gr007 or lr7foo or whatever */
1051
1052 /* We have a wiener! Define and return a new symbol for it. */
1053 if (name[0] == 'l' || name[0] == 'L')
1054 regnum += 128;
1055 return(symbol_new(name, SEG_REGISTER, regnum, &zero_address_frag));
1056 }
1057 }
1058
1059 return 0;
1060 }
1061
1062 /* Parse an operand that is machine-specific. */
1063
1064 void md_operand(expressionP)
1065 expressionS *expressionP;
1066 {
1067
1068 if (input_line_pointer[0] == '%' && input_line_pointer[1] == '%')
1069 {
1070 /* We have a numeric register expression. No biggy. */
1071 input_line_pointer += 2; /* Skip %% */
1072 (void)expression (expressionP);
1073 if (expressionP->X_seg != SEG_ABSOLUTE
1074 || expressionP->X_add_number > 255)
1075 as_bad("Invalid expression after %%%%\n");
1076 expressionP->X_seg = SEG_REGISTER;
1077 }
1078 else if (input_line_pointer[0] == '&')
1079 {
1080 /* We are taking the 'address' of a register...this one is not
1081 in the manual, but it *is* in traps/fpsymbol.h! What they
1082 seem to want is the register number, as an absolute number. */
1083 input_line_pointer++; /* Skip & */
1084 (void)expression (expressionP);
1085 if (expressionP->X_seg != SEG_REGISTER)
1086 as_bad("Invalid register in & expression");
1087 else
1088 expressionP->X_seg = SEG_ABSOLUTE;
1089 }
1090 }
1091
1092 /* Round up a section size to the appropriate boundary. */
1093 long
1094 md_section_align (segment, size)
1095 segT segment;
1096 long size;
1097 {
1098 return size; /* Byte alignment is fine */
1099 }
1100
1101 /* Exactly what point is a PC-relative offset relative TO?
1102 On the 29000, they're relative to the address of the instruction,
1103 which we have set up as the address of the fixup too. */
1104 long md_pcrel_from (fixP)
1105 fixS *fixP;
1106 {
1107 return fixP->fx_where + fixP->fx_frag->fr_address;
1108 }
1109
1110 /*
1111 * Local Variables:
1112 * comment-column: 0
1113 * End:
1114 */
1115
1116 /* end of tc-a29k.c */
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