Fix stupid bugs inserted during expression conversion.
[deliverable/binutils-gdb.git] / gas / config / tc-a29k.c
1 /* tc-a29k.c -- Assemble for the AMD 29000.
2 Copyright (C) 1989, 1990, 1991, 1992, 1993 Free Software Foundation, Inc.
3
4 This file is part of GAS, the GNU Assembler.
5
6 GAS is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
9 any later version.
10
11 GAS is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with GAS; see the file COPYING. If not, write to
18 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
19
20 /* John Gilmore has reorganized this module somewhat, to make it easier
21 to convert it to new machines' assemblers as desired. There was too
22 much bloody rewriting required before. There still probably is. */
23
24 #include "ctype.h"
25 #include "as.h"
26
27 #include "opcode/a29k.h"
28
29 /* Make it easier to clone this machine desc into another one. */
30 #define machine_opcode a29k_opcode
31 #define machine_opcodes a29k_opcodes
32 #define machine_ip a29k_ip
33 #define machine_it a29k_it
34
35 const relax_typeS md_relax_table[] =
36 {0};
37
38 #define IMMEDIATE_BIT 0x01000000 /* Turns RB into Immediate */
39 #define ABSOLUTE_BIT 0x01000000 /* Turns PC-relative to Absolute */
40 #define CE_BIT 0x00800000 /* Coprocessor enable in LOAD */
41 #define UI_BIT 0x00000080 /* Unsigned integer in CONVERT */
42
43 /* handle of the OPCODE hash table */
44 static struct hash_control *op_hash = NULL;
45
46 struct machine_it
47 {
48 char *error;
49 unsigned long opcode;
50 struct nlist *nlistp;
51 expressionS exp;
52 int pcrel;
53 int reloc_offset; /* Offset of reloc within insn */
54
55 int reloc;
56
57
58 }
59
60 the_insn;
61
62 #if __STDC__ == 1
63
64 /* static int getExpression(char *str); */
65 static void machine_ip (char *str);
66 /* static void print_insn(struct machine_it *insn); */
67 static void s_data1 (void);
68 static void s_use (void);
69
70 #else /* not __STDC__ */
71
72 /* static int getExpression(); */
73 static void machine_ip ();
74 /* static void print_insn(); */
75 static void s_data1 ();
76 static void s_use ();
77
78 #endif /* not __STDC__ */
79
80 const pseudo_typeS
81 md_pseudo_table[] =
82 {
83 {"align", s_align_bytes, 4},
84 {"block", s_space, 0},
85 {"cputype", s_ignore, 0}, /* CPU as 29000 or 29050 */
86 {"reg", s_lsym, 0}, /* Register equate, same as equ */
87 {"space", s_ignore, 0}, /* Listing control */
88 {"sect", s_ignore, 0}, /* Creation of coff sections */
89 #ifndef OBJ_COFF
90 /* We can do this right with coff */
91 {"use", s_use, 0},
92 #endif
93 {"word", cons, 4},
94 {NULL, 0, 0},
95 };
96
97 int md_short_jump_size = 4;
98 int md_long_jump_size = 4;
99 #if defined(BFD_HEADERS)
100 #ifdef RELSZ
101 const int md_reloc_size = RELSZ; /* Coff headers */
102 #else
103 const int md_reloc_size = 12; /* something else headers */
104 #endif
105 #else
106 const int md_reloc_size = 12; /* Not bfdized*/
107 #endif
108
109 /* This array holds the chars that always start a comment. If the
110 pre-processor is disabled, these aren't very useful */
111 const char comment_chars[] = ";";
112
113 /* This array holds the chars that only start a comment at the beginning of
114 a line. If the line seems to have the form '# 123 filename'
115 .line and .file directives will appear in the pre-processed output */
116 /* Note that input_file.c hand checks for '#' at the beginning of the
117 first line of the input file. This is because the compiler outputs
118 #NO_APP at the beginning of its output. */
119 /* Also note that comments like this one will always work */
120 const char line_comment_chars[] = "#";
121
122 /* We needed an unused char for line separation to work around the
123 lack of macros, using sed and such. */
124 const char line_separator_chars[] = "@";
125
126 /* Chars that can be used to separate mant from exp in floating point nums */
127 const char EXP_CHARS[] = "eE";
128
129 /* Chars that mean this number is a floating point constant */
130 /* As in 0f12.456 */
131 /* or 0d1.2345e12 */
132 const char FLT_CHARS[] = "rRsSfFdDxXpP";
133
134 /* Also be aware that MAXIMUM_NUMBER_OF_CHARS_FOR_FLOAT may have to be
135 changed in read.c . Ideally it shouldn't have to know about it at all,
136 but nothing is ideal around here.
137 */
138
139 static unsigned char octal[256];
140 #define isoctal(c) octal[c]
141 static unsigned char toHex[256];
142
143 /*
144 * anull bit - causes the branch delay slot instructions to not be executed
145 */
146 #define ANNUL (1 << 29)
147
148 static void
149 s_use ()
150 {
151
152 if (strncmp (input_line_pointer, ".text", 5) == 0)
153 {
154 input_line_pointer += 5;
155 s_text ();
156 return;
157 }
158 if (strncmp (input_line_pointer, ".data", 5) == 0)
159 {
160 input_line_pointer += 5;
161 s_data ();
162 return;
163 }
164 if (strncmp (input_line_pointer, ".data1", 6) == 0)
165 {
166 input_line_pointer += 6;
167 s_data1 ();
168 return;
169 }
170 /* Literals can't go in the text segment because you can't read
171 from instruction memory on some 29k's. So, into initialized data. */
172 if (strncmp (input_line_pointer, ".lit", 4) == 0)
173 {
174 input_line_pointer += 4;
175 subseg_new (SEG_DATA, 200);
176 demand_empty_rest_of_line ();
177 return;
178 }
179
180 as_bad ("Unknown segment type");
181 demand_empty_rest_of_line ();
182 return;
183 }
184
185 static void
186 s_data1 ()
187 {
188 subseg_new (SEG_DATA, 1);
189 demand_empty_rest_of_line ();
190 return;
191 }
192
193 /* Install symbol definition that maps REGNAME to REGNO.
194 FIXME-SOON: These are not recognized in mixed case. */
195
196 static void
197 insert_sreg (regname, regnum)
198 char *regname;
199 int regnum;
200 {
201 /* FIXME-SOON, put something in these syms so they won't be output to the symbol
202 table of the resulting object file. */
203
204 /* Must be large enough to hold the names of the special registers. */
205 char buf[80];
206 int i;
207
208 symbol_table_insert (symbol_new (regname, SEG_REGISTER, regnum, &zero_address_frag));
209 for (i = 0; regname[i]; i++)
210 buf[i] = islower (regname[i]) ? toupper (regname[i]) : regname[i];
211 buf[i] = '\0';
212
213 symbol_table_insert (symbol_new (buf, SEG_REGISTER, regnum, &zero_address_frag));
214 } /* insert_sreg() */
215
216 /* Install symbol definitions for assorted special registers.
217 See ASM29K Ref page 2-9. */
218
219 void
220 define_some_regs ()
221 {
222 #define SREG 256
223
224 /* Protected special-purpose register names */
225 insert_sreg ("vab", SREG + 0);
226 insert_sreg ("ops", SREG + 1);
227 insert_sreg ("cps", SREG + 2);
228 insert_sreg ("cfg", SREG + 3);
229 insert_sreg ("cha", SREG + 4);
230 insert_sreg ("chd", SREG + 5);
231 insert_sreg ("chc", SREG + 6);
232 insert_sreg ("rbp", SREG + 7);
233 insert_sreg ("tmc", SREG + 8);
234 insert_sreg ("tmr", SREG + 9);
235 insert_sreg ("pc0", SREG + 10);
236 insert_sreg ("pc1", SREG + 11);
237 insert_sreg ("pc2", SREG + 12);
238 insert_sreg ("mmu", SREG + 13);
239 insert_sreg ("lru", SREG + 14);
240
241 /* Additional protected special-purpose registers for the 29050 */
242 insert_sreg ("rsn", SREG + 15);
243 insert_sreg ("rma0", SREG + 16);
244 insert_sreg ("rmc0", SREG + 17);
245 insert_sreg ("rma1", SREG + 18);
246 insert_sreg ("rmc1", SREG + 19);
247 insert_sreg ("spc0", SREG + 20);
248 insert_sreg ("spc1", SREG + 21);
249 insert_sreg ("spc2", SREG + 22);
250 insert_sreg ("iba0", SREG + 23);
251 insert_sreg ("ibc0", SREG + 24);
252 insert_sreg ("iba1", SREG + 25);
253 insert_sreg ("ibc1", SREG + 26);
254
255 /* Unprotected special-purpose register names */
256 insert_sreg ("ipc", SREG + 128);
257 insert_sreg ("ipa", SREG + 129);
258 insert_sreg ("ipb", SREG + 130);
259 insert_sreg ("q", SREG + 131);
260 insert_sreg ("alu", SREG + 132);
261 insert_sreg ("bp", SREG + 133);
262 insert_sreg ("fc", SREG + 134);
263 insert_sreg ("cr", SREG + 135);
264 insert_sreg ("fpe", SREG + 160);
265 insert_sreg ("inte", SREG + 161);
266 insert_sreg ("fps", SREG + 162);
267 /* "", SREG+163); Reserved */
268 insert_sreg ("exop", SREG + 164);
269 } /* define_some_regs() */
270
271 /* This function is called once, at assembler startup time. It should
272 set up all the tables, etc. that the MD part of the assembler will need. */
273 void
274 md_begin ()
275 {
276 register char *retval = NULL;
277 int lose = 0;
278 register int skipnext = 0;
279 register unsigned int i;
280 register char *strend, *strend2;
281
282 /* Hash up all the opcodes for fast use later. */
283
284 op_hash = hash_new ();
285
286 for (i = 0; i < num_opcodes; i++)
287 {
288 const char *name = machine_opcodes[i].name;
289
290 if (skipnext)
291 {
292 skipnext = 0;
293 continue;
294 }
295
296 /* Hack to avoid multiple opcode entries. We pre-locate all the
297 variations (b/i field and P/A field) and handle them. */
298
299 if (!strcmp (name, machine_opcodes[i + 1].name))
300 {
301 if ((machine_opcodes[i].opcode ^ machine_opcodes[i + 1].opcode)
302 != 0x01000000)
303 goto bad_table;
304 strend = machine_opcodes[i].args + strlen (machine_opcodes[i].args) - 1;
305 strend2 = machine_opcodes[i + 1].args + strlen (machine_opcodes[i + 1].args) - 1;
306 switch (*strend)
307 {
308 case 'b':
309 if (*strend2 != 'i')
310 goto bad_table;
311 break;
312 case 'i':
313 if (*strend2 != 'b')
314 goto bad_table;
315 break;
316 case 'P':
317 if (*strend2 != 'A')
318 goto bad_table;
319 break;
320 case 'A':
321 if (*strend2 != 'P')
322 goto bad_table;
323 break;
324 default:
325 bad_table:
326 fprintf (stderr, "internal error: can't handle opcode %s\n", name);
327 lose = 1;
328 }
329
330 /* OK, this is an i/b or A/P pair. We skip the higher-valued one,
331 and let the code for operand checking handle OR-ing in the bit. */
332 if (machine_opcodes[i].opcode & 1)
333 continue;
334 else
335 skipnext = 1;
336 }
337
338 retval = hash_insert (op_hash, name, &machine_opcodes[i]);
339 if (retval != NULL && *retval != '\0')
340 {
341 fprintf (stderr, "internal error: can't hash `%s': %s\n",
342 machine_opcodes[i].name, retval);
343 lose = 1;
344 }
345 }
346
347 if (lose)
348 as_fatal ("Broken assembler. No assembly attempted.");
349
350 for (i = '0'; i < '8'; ++i)
351 octal[i] = 1;
352 for (i = '0'; i <= '9'; ++i)
353 toHex[i] = i - '0';
354 for (i = 'a'; i <= 'f'; ++i)
355 toHex[i] = i + 10 - 'a';
356 for (i = 'A'; i <= 'F'; ++i)
357 toHex[i] = i + 10 - 'A';
358
359 define_some_regs ();
360 }
361
362 void
363 md_end ()
364 {
365 return;
366 }
367
368 /* Assemble a single instruction. Its label has already been handled
369 by the generic front end. We just parse opcode and operands, and
370 produce the bytes of data and relocation. */
371
372 void
373 md_assemble (str)
374 char *str;
375 {
376 char *toP;
377 /* !!!! int rsd; */
378
379 know (str);
380 machine_ip (str);
381 toP = frag_more (4);
382 /* put out the opcode */
383 md_number_to_chars (toP, the_insn.opcode, 4);
384
385 /* put out the symbol-dependent stuff */
386 if (the_insn.reloc != NO_RELOC)
387 {
388 fix_new_exp (frag_now,
389 (toP - frag_now->fr_literal + the_insn.reloc_offset),
390 4, /* size */
391 &the_insn.exp,
392 the_insn.pcrel,
393 the_insn.reloc);
394 }
395 }
396
397 char *
398 parse_operand (s, operandp)
399 char *s;
400 expressionS *operandp;
401 {
402 char *save = input_line_pointer;
403 char *new;
404
405 input_line_pointer = s;
406 expression (operandp);
407 if (operandp->X_op == O_absent)
408 as_bad ("missing operand");
409 new = input_line_pointer;
410 input_line_pointer = save;
411 return new;
412 }
413
414 /* Instruction parsing. Takes a string containing the opcode.
415 Operands are at input_line_pointer. Output is in the_insn.
416 Warnings or errors are generated. */
417
418 static void
419 machine_ip (str)
420 char *str;
421 {
422 char *s;
423 const char *args;
424 /* !!!! char c; */
425 /* !!!! unsigned long i; */
426 struct machine_opcode *insn;
427 char *argsStart;
428 unsigned long opcode;
429 /* !!!! unsigned int mask; */
430 expressionS the_operand;
431 expressionS *operand = &the_operand;
432 unsigned int reg;
433
434 /* Must handle `div0' opcode. */
435 s = str;
436 if (isalpha (*s))
437 for (; isalnum (*s); ++s)
438 if (isupper (*s))
439 *s = tolower (*s);
440
441 switch (*s)
442 {
443 case '\0':
444 break;
445
446 case ' ': /* FIXME-SOMEDAY more whitespace */
447 *s++ = '\0';
448 break;
449
450 default:
451 as_bad ("Unknown opcode: `%s'", str);
452 return;
453 }
454 if ((insn = (struct machine_opcode *) hash_find (op_hash, str)) == NULL)
455 {
456 as_bad ("Unknown opcode `%s'.", str);
457 return;
458 }
459 argsStart = s;
460 opcode = insn->opcode;
461 memset (&the_insn, '\0', sizeof (the_insn));
462 the_insn.reloc = NO_RELOC;
463
464 /*
465 * Build the opcode, checking as we go to make
466 * sure that the operands match.
467 *
468 * If an operand matches, we modify the_insn or opcode appropriately,
469 * and do a "continue". If an operand fails to match, we "break".
470 */
471 if (insn->args[0] != '\0')
472 s = parse_operand (s, operand); /* Prime the pump */
473
474 for (args = insn->args;; ++args)
475 {
476 switch (*args)
477 {
478
479 case '\0': /* end of args */
480 if (*s == '\0')
481 {
482 /* We are truly done. */
483 the_insn.opcode = opcode;
484 return;
485 }
486 as_bad ("Too many operands: %s", s);
487 break;
488
489 case ',': /* Must match a comma */
490 if (*s++ == ',')
491 {
492 s = parse_operand (s, operand); /* Parse next opnd */
493 continue;
494 }
495 break;
496
497 case 'v': /* Trap numbers (immediate field) */
498 if (operand->X_op == O_constant)
499 {
500 if (operand->X_add_number < 256)
501 {
502 opcode |= (operand->X_add_number << 16);
503 continue;
504 }
505 else
506 {
507 as_bad ("Immediate value of %d is too large",
508 operand->X_add_number);
509 continue;
510 }
511 }
512 the_insn.reloc = RELOC_8;
513 the_insn.reloc_offset = 1; /* BIG-ENDIAN Byte 1 of insn */
514 the_insn.exp = *operand;
515 continue;
516
517 case 'b': /* A general register or 8-bit immediate */
518 case 'i':
519 /* We treat the two cases identically since we mashed
520 them together in the opcode table. */
521 if (operand->X_op == O_register)
522 goto general_reg;
523
524 opcode |= IMMEDIATE_BIT;
525 if (operand->X_op == O_constant)
526 {
527 if (operand->X_add_number < 256)
528 {
529 opcode |= operand->X_add_number;
530 continue;
531 }
532 else
533 {
534 as_bad ("Immediate value of %d is too large",
535 operand->X_add_number);
536 continue;
537 }
538 }
539 the_insn.reloc = RELOC_8;
540 the_insn.reloc_offset = 3; /* BIG-ENDIAN Byte 3 of insn */
541 the_insn.exp = *operand;
542 continue;
543
544 case 'a': /* next operand must be a register */
545 case 'c':
546 general_reg:
547 /* lrNNN or grNNN or %%expr or a user-def register name */
548 if (operand->X_op != O_register)
549 break; /* Only registers */
550 know (operand->X_add_symbol == 0);
551 know (operand->X_op_symbol == 0);
552 reg = operand->X_add_number;
553 if (reg >= SREG)
554 break; /* No special registers */
555
556 /*
557 * Got the register, now figure out where
558 * it goes in the opcode.
559 */
560 switch (*args)
561 {
562 case 'a':
563 opcode |= reg << 8;
564 continue;
565
566 case 'b':
567 case 'i':
568 opcode |= reg;
569 continue;
570
571 case 'c':
572 opcode |= reg << 16;
573 continue;
574 }
575 as_fatal ("failed sanity check.");
576 break;
577
578 case 'x': /* 16 bit constant, zero-extended */
579 case 'X': /* 16 bit constant, one-extended */
580 if (operand->X_op == O_constant)
581 {
582 opcode |= (operand->X_add_number & 0xFF) << 0 |
583 ((operand->X_add_number & 0xFF00) << 8);
584 continue;
585 }
586 the_insn.reloc = RELOC_CONST;
587 the_insn.exp = *operand;
588 continue;
589
590 case 'h':
591 if (operand->X_op == O_constant)
592 {
593 opcode |= (operand->X_add_number & 0x00FF0000) >> 16 |
594 (((unsigned long) operand->X_add_number
595 /* avoid sign ext */ & 0xFF000000) >> 8);
596 continue;
597 }
598 the_insn.reloc = RELOC_CONSTH;
599 the_insn.exp = *operand;
600 continue;
601
602 case 'P': /* PC-relative jump address */
603 case 'A': /* Absolute jump address */
604 /* These two are treated together since we folded the
605 opcode table entries together. */
606 if (operand->X_op == O_constant)
607 {
608 opcode |= ABSOLUTE_BIT |
609 (operand->X_add_number & 0x0003FC00) << 6 |
610 ((operand->X_add_number & 0x000003FC) >> 2);
611 continue;
612 }
613 the_insn.reloc = RELOC_JUMPTARG;
614 the_insn.exp = *operand;
615 the_insn.pcrel = 1; /* Assume PC-relative jump */
616 /* FIXME-SOON, Do we figure out whether abs later, after know sym val? */
617 continue;
618
619 case 'e': /* Coprocessor enable bit for LOAD/STORE insn */
620 if (operand->X_op == O_constant)
621 {
622 if (operand->X_add_number == 0)
623 continue;
624 if (operand->X_add_number == 1)
625 {
626 opcode |= CE_BIT;
627 continue;
628 }
629 }
630 break;
631
632 case 'n': /* Control bits for LOAD/STORE instructions */
633 if (operand->X_op == O_constant &&
634 operand->X_add_number < 128)
635 {
636 opcode |= (operand->X_add_number << 16);
637 continue;
638 }
639 break;
640
641 case 's': /* Special register number */
642 if (operand->X_op != O_register)
643 break; /* Only registers */
644 if (operand->X_add_number < SREG)
645 break; /* Not a special register */
646 opcode |= (operand->X_add_number & 0xFF) << 8;
647 continue;
648
649 case 'u': /* UI bit of CONVERT */
650 if (operand->X_op == O_constant)
651 {
652 if (operand->X_add_number == 0)
653 continue;
654 if (operand->X_add_number == 1)
655 {
656 opcode |= UI_BIT;
657 continue;
658 }
659 }
660 break;
661
662 case 'r': /* RND bits of CONVERT */
663 if (operand->X_op == O_constant &&
664 operand->X_add_number < 8)
665 {
666 opcode |= operand->X_add_number << 4;
667 continue;
668 }
669 break;
670
671 case 'd': /* FD bits of CONVERT */
672 if (operand->X_op == O_constant &&
673 operand->X_add_number < 4)
674 {
675 opcode |= operand->X_add_number << 2;
676 continue;
677 }
678 break;
679
680
681 case 'f': /* FS bits of CONVERT */
682 if (operand->X_op == O_constant &&
683 operand->X_add_number < 4)
684 {
685 opcode |= operand->X_add_number << 0;
686 continue;
687 }
688 break;
689
690 case 'C':
691 if (operand->X_op == O_constant &&
692 operand->X_add_number < 4)
693 {
694 opcode |= operand->X_add_number << 16;
695 continue;
696 }
697 break;
698
699 case 'F':
700 if (operand->X_op == O_constant &&
701 operand->X_add_number < 16)
702 {
703 opcode |= operand->X_add_number << 18;
704 continue;
705 }
706 break;
707
708 default:
709 BAD_CASE (*args);
710 }
711 /* Types or values of args don't match. */
712 as_bad ("Invalid operands");
713 return;
714 }
715 }
716
717 /*
718 This is identical to the md_atof in m68k.c. I think this is right,
719 but I'm not sure.
720
721 Turn a string in input_line_pointer into a floating point constant of type
722 type, and store the appropriate bytes in *litP. The number of LITTLENUMS
723 emitted is stored in *sizeP . An error message is returned, or NULL on OK.
724 */
725
726 /* Equal to MAX_PRECISION in atof-ieee.c */
727 #define MAX_LITTLENUMS 6
728
729 char *
730 md_atof (type, litP, sizeP)
731 char type;
732 char *litP;
733 int *sizeP;
734 {
735 int prec;
736 LITTLENUM_TYPE words[MAX_LITTLENUMS];
737 LITTLENUM_TYPE *wordP;
738 char *t;
739
740 switch (type)
741 {
742
743 case 'f':
744 case 'F':
745 case 's':
746 case 'S':
747 prec = 2;
748 break;
749
750 case 'd':
751 case 'D':
752 case 'r':
753 case 'R':
754 prec = 4;
755 break;
756
757 case 'x':
758 case 'X':
759 prec = 6;
760 break;
761
762 case 'p':
763 case 'P':
764 prec = 6;
765 break;
766
767 default:
768 *sizeP = 0;
769 return "Bad call to MD_ATOF()";
770 }
771 t = atof_ieee (input_line_pointer, type, words);
772 if (t)
773 input_line_pointer = t;
774 *sizeP = prec * sizeof (LITTLENUM_TYPE);
775 for (wordP = words; prec--;)
776 {
777 md_number_to_chars (litP, (long) (*wordP++), sizeof (LITTLENUM_TYPE));
778 litP += sizeof (LITTLENUM_TYPE);
779 }
780 return ""; /* Someone should teach Dean about null pointers */
781 }
782
783 /*
784 * Write out big-endian.
785 */
786 void
787 md_number_to_chars (buf, val, n)
788 char *buf;
789 valueT val;
790 int n;
791 {
792
793 switch (n)
794 {
795
796 case 4:
797 *buf++ = val >> 24;
798 *buf++ = val >> 16;
799 case 2:
800 *buf++ = val >> 8;
801 case 1:
802 *buf = val;
803 break;
804
805 default:
806 as_fatal ("failed sanity check.");
807 }
808 return;
809 }
810
811 void
812 md_apply_fix (fixP, val)
813 fixS *fixP;
814 long val;
815 {
816 char *buf = fixP->fx_where + fixP->fx_frag->fr_literal;
817
818 fixP->fx_addnumber = val; /* Remember value for emit_reloc */
819
820
821 know (fixP->fx_size == 4);
822 know (fixP->fx_r_type < NO_RELOC);
823
824 /*
825 * This is a hack. There should be a better way to
826 * handle this.
827 */
828 if (fixP->fx_r_type == RELOC_WDISP30 && fixP->fx_addsy)
829 {
830 val += fixP->fx_where + fixP->fx_frag->fr_address;
831 }
832
833 switch (fixP->fx_r_type)
834 {
835
836 case RELOC_32:
837 buf[0] = val >> 24;
838 buf[1] = val >> 16;
839 buf[2] = val >> 8;
840 buf[3] = val;
841 break;
842
843 case RELOC_8:
844 buf[0] = val;
845 break;
846
847 case RELOC_WDISP30:
848 val = (val >>= 2) + 1;
849 buf[0] |= (val >> 24) & 0x3f;
850 buf[1] = (val >> 16);
851 buf[2] = val >> 8;
852 buf[3] = val;
853 break;
854
855 case RELOC_HI22:
856 buf[1] |= (val >> 26) & 0x3f;
857 buf[2] = val >> 18;
858 buf[3] = val >> 10;
859 break;
860
861 case RELOC_LO10:
862 buf[2] |= (val >> 8) & 0x03;
863 buf[3] = val;
864 break;
865
866 case RELOC_BASE13:
867 buf[2] |= (val >> 8) & 0x1f;
868 buf[3] = val;
869 break;
870
871 case RELOC_WDISP22:
872 val = (val >>= 2) + 1;
873 /* FALLTHROUGH */
874 case RELOC_BASE22:
875 buf[1] |= (val >> 16) & 0x3f;
876 buf[2] = val >> 8;
877 buf[3] = val;
878 break;
879
880 #if 0
881 case RELOC_PC10:
882 case RELOC_PC22:
883 case RELOC_JMP_TBL:
884 case RELOC_SEGOFF16:
885 case RELOC_GLOB_DAT:
886 case RELOC_JMP_SLOT:
887 case RELOC_RELATIVE:
888 #endif
889 case RELOC_JUMPTARG: /* 00XX00XX pattern in a word */
890 buf[1] = val >> 10; /* Holds bits 0003FFFC of address */
891 buf[3] = val >> 2;
892 break;
893
894 case RELOC_CONST: /* 00XX00XX pattern in a word */
895 buf[1] = val >> 8; /* Holds bits 0000XXXX */
896 buf[3] = val;
897 break;
898
899 case RELOC_CONSTH: /* 00XX00XX pattern in a word */
900 buf[1] = val >> 24; /* Holds bits XXXX0000 */
901 buf[3] = val >> 16;
902 break;
903
904 case NO_RELOC:
905 default:
906 as_bad ("bad relocation type: 0x%02x", fixP->fx_r_type);
907 break;
908 }
909 return;
910 }
911
912 #ifdef OBJ_COFF
913 short
914 tc_coff_fix2rtype (fixP)
915 fixS *fixP;
916 {
917
918 switch (fixP->fx_r_type)
919 {
920 case RELOC_32:
921 return (R_WORD);
922 case RELOC_8:
923 return (R_BYTE);
924 case RELOC_CONST:
925 return (R_ILOHALF);
926 case RELOC_CONSTH:
927 return (R_IHIHALF);
928 case RELOC_JUMPTARG:
929 return (R_IREL);
930 default:
931 printf ("need %o3\n", fixP->fx_r_type);
932 abort ();
933 } /* switch on type */
934
935 return (0);
936 } /* tc_coff_fix2rtype() */
937
938 #endif /* OBJ_COFF */
939
940 /* should never be called for sparc */
941 void
942 md_create_short_jump (ptr, from_addr, to_addr, frag, to_symbol)
943 char *ptr;
944 addressT from_addr, to_addr;
945 fragS *frag;
946 symbolS *to_symbol;
947 {
948 as_fatal ("a29k_create_short_jmp\n");
949 }
950
951 /* should never be called for 29k */
952 void
953 md_convert_frag (headers, fragP)
954 object_headers *headers;
955 register fragS *fragP;
956 {
957 as_fatal ("sparc_convert_frag\n");
958 }
959
960 /* should never be called for 29k */
961 void
962 md_create_long_jump (ptr, from_addr, to_addr, frag, to_symbol)
963 char *ptr;
964 addressT from_addr;
965 addressT to_addr;
966 fragS *frag;
967 symbolS *to_symbol;
968 {
969 as_fatal ("sparc_create_long_jump\n");
970 }
971
972 /* should never be called for a29k */
973 int
974 md_estimate_size_before_relax (fragP, segtype)
975 register fragS *fragP;
976 segT segtype;
977 {
978 as_fatal ("sparc_estimate_size_before_relax\n");
979 return (0);
980 }
981
982 #if 0
983 /* for debugging only */
984 static void
985 print_insn (insn)
986 struct machine_it *insn;
987 {
988 char *Reloc[] =
989 {
990 "RELOC_8",
991 "RELOC_16",
992 "RELOC_32",
993 "RELOC_DISP8",
994 "RELOC_DISP16",
995 "RELOC_DISP32",
996 "RELOC_WDISP30",
997 "RELOC_WDISP22",
998 "RELOC_HI22",
999 "RELOC_22",
1000 "RELOC_13",
1001 "RELOC_LO10",
1002 "RELOC_SFA_BASE",
1003 "RELOC_SFA_OFF13",
1004 "RELOC_BASE10",
1005 "RELOC_BASE13",
1006 "RELOC_BASE22",
1007 "RELOC_PC10",
1008 "RELOC_PC22",
1009 "RELOC_JMP_TBL",
1010 "RELOC_SEGOFF16",
1011 "RELOC_GLOB_DAT",
1012 "RELOC_JMP_SLOT",
1013 "RELOC_RELATIVE",
1014 "NO_RELOC"
1015 };
1016
1017 if (insn->error)
1018 {
1019 fprintf (stderr, "ERROR: %s\n");
1020 }
1021 fprintf (stderr, "opcode=0x%08x\n", insn->opcode);
1022 fprintf (stderr, "reloc = %s\n", Reloc[insn->reloc]);
1023 fprintf (stderr, "exp = {\n");
1024 fprintf (stderr, "\t\tX_add_symbol = %s\n",
1025 insn->exp.X_add_symbol ?
1026 (S_GET_NAME (insn->exp.X_add_symbol) ?
1027 S_GET_NAME (insn->exp.X_add_symbol) : "???") : "0");
1028 fprintf (stderr, "\t\tX_op_symbol = %s\n",
1029 insn->exp.X_op_symbol ?
1030 (S_GET_NAME (insn->exp.X_op_symbol) ?
1031 S_GET_NAME (insn->exp.X_op_symbol) : "???") : "0");
1032 fprintf (stderr, "\t\tX_add_number = %d\n",
1033 insn->exp.X_add_number);
1034 fprintf (stderr, "}\n");
1035 return;
1036 }
1037
1038 #endif
1039
1040 /* Translate internal representation of relocation info to target format.
1041
1042 On sparc/29k: first 4 bytes are normal unsigned long address, next three
1043 bytes are index, most sig. byte first. Byte 7 is broken up with
1044 bit 7 as external, bits 6 & 5 unused, and the lower
1045 five bits as relocation type. Next 4 bytes are long addend. */
1046 /* Thanx and a tip of the hat to Michael Bloom, mb@ttidca.tti.com */
1047
1048 #ifdef OBJ_AOUT
1049
1050 void
1051 tc_aout_fix_to_chars (where, fixP, segment_address_in_file)
1052 char *where;
1053 fixS *fixP;
1054 relax_addressT segment_address_in_file;
1055 {
1056 long r_symbolnum;
1057
1058 know (fixP->fx_r_type < NO_RELOC);
1059 know (fixP->fx_addsy != NULL);
1060
1061 md_number_to_chars (where,
1062 fixP->fx_frag->fr_address + fixP->fx_where - segment_address_in_file,
1063 4);
1064
1065 r_symbolnum = (S_IS_DEFINED (fixP->fx_addsy)
1066 ? S_GET_TYPE (fixP->fx_addsy)
1067 : fixP->fx_addsy->sy_number);
1068
1069 where[4] = (r_symbolnum >> 16) & 0x0ff;
1070 where[5] = (r_symbolnum >> 8) & 0x0ff;
1071 where[6] = r_symbolnum & 0x0ff;
1072 where[7] = (((!S_IS_DEFINED (fixP->fx_addsy)) << 7) & 0x80) | (0 & 0x60) | (fixP->fx_r_type & 0x1F);
1073 /* Also easy */
1074 md_number_to_chars (&where[8], fixP->fx_addnumber, 4);
1075
1076 return;
1077 } /* tc_aout_fix_to_chars() */
1078
1079 #endif /* OBJ_AOUT */
1080
1081 int
1082 md_parse_option (argP, cntP, vecP)
1083 char **argP;
1084 int *cntP;
1085 char ***vecP;
1086 {
1087 return (0);
1088 }
1089
1090
1091 /* Default the values of symbols known that should be "predefined". We
1092 don't bother to predefine them unless you actually use one, since there
1093 are a lot of them. */
1094
1095 symbolS *
1096 md_undefined_symbol (name)
1097 char *name;
1098 {
1099 long regnum;
1100 char testbuf[5 + /*SLOP*/ 5];
1101
1102 if (name[0] == 'g' || name[0] == 'G' || name[0] == 'l' || name[0] == 'L')
1103 {
1104 /* Perhaps a global or local register name */
1105 if (name[1] == 'r' || name[1] == 'R')
1106 {
1107 /* Parse the number, make sure it has no extra zeroes or trailing
1108 chars */
1109 regnum = atol (&name[2]);
1110 if (regnum > 127)
1111 return 0;
1112 sprintf (testbuf, "%ld", regnum);
1113 if (strcmp (testbuf, &name[2]) != 0)
1114 return 0; /* gr007 or lr7foo or whatever */
1115
1116 /* We have a wiener! Define and return a new symbol for it. */
1117 if (name[0] == 'l' || name[0] == 'L')
1118 regnum += 128;
1119 return (symbol_new (name, SEG_REGISTER, regnum, &zero_address_frag));
1120 }
1121 }
1122
1123 return 0;
1124 }
1125
1126 /* Parse an operand that is machine-specific. */
1127
1128 void
1129 md_operand (expressionP)
1130 expressionS *expressionP;
1131 {
1132
1133 if (input_line_pointer[0] == '%' && input_line_pointer[1] == '%')
1134 {
1135 /* We have a numeric register expression. No biggy. */
1136 input_line_pointer += 2; /* Skip %% */
1137 (void) expression (expressionP);
1138 if (expressionP->X_op != O_constant
1139 || expressionP->X_add_number > 255)
1140 as_bad ("Invalid expression after %%%%\n");
1141 expressionP->X_op = O_register;
1142 }
1143 else if (input_line_pointer[0] == '&')
1144 {
1145 /* We are taking the 'address' of a register...this one is not
1146 in the manual, but it *is* in traps/fpsymbol.h! What they
1147 seem to want is the register number, as an absolute number. */
1148 input_line_pointer++; /* Skip & */
1149 (void) expression (expressionP);
1150 if (expressionP->X_op != O_register)
1151 as_bad ("Invalid register in & expression");
1152 else
1153 expressionP->X_op = O_constant;
1154 }
1155 }
1156
1157 /* Round up a section size to the appropriate boundary. */
1158 valueT
1159 md_section_align (segment, size)
1160 segT segment;
1161 valueT size;
1162 {
1163 return size; /* Byte alignment is fine */
1164 }
1165
1166 /* Exactly what point is a PC-relative offset relative TO?
1167 On the 29000, they're relative to the address of the instruction,
1168 which we have set up as the address of the fixup too. */
1169 long
1170 md_pcrel_from (fixP)
1171 fixS *fixP;
1172 {
1173 return fixP->fx_where + fixP->fx_frag->fr_address;
1174 }
1175
1176 /*
1177 * Local Variables:
1178 * comment-column: 0
1179 * End:
1180 */
1181
1182 /* end of tc-a29k.c */
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