* Extensive changes to permit symbols to contain any expression
[deliverable/binutils-gdb.git] / gas / config / tc-a29k.c
1 /* tc-a29k.c -- Assemble for the AMD 29000.
2 Copyright (C) 1989, 1990, 1991, 1992, 1993 Free Software Foundation, Inc.
3
4 This file is part of GAS, the GNU Assembler.
5
6 GAS is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
9 any later version.
10
11 GAS is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with GAS; see the file COPYING. If not, write to
18 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
19
20 /* John Gilmore has reorganized this module somewhat, to make it easier
21 to convert it to new machines' assemblers as desired. There was too
22 much bloody rewriting required before. There still probably is. */
23
24 #include "ctype.h"
25 #include "as.h"
26
27 #include "opcode/a29k.h"
28
29 /* Make it easier to clone this machine desc into another one. */
30 #define machine_opcode a29k_opcode
31 #define machine_opcodes a29k_opcodes
32 #define machine_ip a29k_ip
33 #define machine_it a29k_it
34
35 const relax_typeS md_relax_table[] =
36 {0};
37
38 #define IMMEDIATE_BIT 0x01000000 /* Turns RB into Immediate */
39 #define ABSOLUTE_BIT 0x01000000 /* Turns PC-relative to Absolute */
40 #define CE_BIT 0x00800000 /* Coprocessor enable in LOAD */
41 #define UI_BIT 0x00000080 /* Unsigned integer in CONVERT */
42
43 /* handle of the OPCODE hash table */
44 static struct hash_control *op_hash = NULL;
45
46 struct machine_it
47 {
48 char *error;
49 unsigned long opcode;
50 struct nlist *nlistp;
51 expressionS exp;
52 int pcrel;
53 int reloc_offset; /* Offset of reloc within insn */
54
55 int reloc;
56
57
58 }
59
60 the_insn;
61
62 #if __STDC__ == 1
63
64 /* static int getExpression(char *str); */
65 static void machine_ip (char *str);
66 /* static void print_insn(struct machine_it *insn); */
67 static void s_data1 (void);
68 static void s_use (void);
69
70 #else /* not __STDC__ */
71
72 /* static int getExpression(); */
73 static void machine_ip ();
74 /* static void print_insn(); */
75 static void s_data1 ();
76 static void s_use ();
77
78 #endif /* not __STDC__ */
79
80 const pseudo_typeS
81 md_pseudo_table[] =
82 {
83 {"align", s_align_bytes, 4},
84 {"block", s_space, 0},
85 {"cputype", s_ignore, 0}, /* CPU as 29000 or 29050 */
86 {"reg", s_lsym, 0}, /* Register equate, same as equ */
87 {"space", s_ignore, 0}, /* Listing control */
88 {"sect", s_ignore, 0}, /* Creation of coff sections */
89 #ifndef OBJ_COFF
90 /* We can do this right with coff */
91 {"use", s_use, 0},
92 #endif
93 {"word", cons, 4},
94 {NULL, 0, 0},
95 };
96
97 int md_short_jump_size = 4;
98 int md_long_jump_size = 4;
99 #if defined(BFD_HEADERS)
100 #ifdef RELSZ
101 const int md_reloc_size = RELSZ; /* Coff headers */
102 #else
103 const int md_reloc_size = 12; /* something else headers */
104 #endif
105 #else
106 const int md_reloc_size = 12; /* Not bfdized*/
107 #endif
108
109 /* This array holds the chars that always start a comment. If the
110 pre-processor is disabled, these aren't very useful */
111 const char comment_chars[] = ";";
112
113 /* This array holds the chars that only start a comment at the beginning of
114 a line. If the line seems to have the form '# 123 filename'
115 .line and .file directives will appear in the pre-processed output */
116 /* Note that input_file.c hand checks for '#' at the beginning of the
117 first line of the input file. This is because the compiler outputs
118 #NO_APP at the beginning of its output. */
119 /* Also note that comments like this one will always work */
120 const char line_comment_chars[] = "#";
121
122 /* We needed an unused char for line separation to work around the
123 lack of macros, using sed and such. */
124 const char line_separator_chars[] = "@";
125
126 /* Chars that can be used to separate mant from exp in floating point nums */
127 const char EXP_CHARS[] = "eE";
128
129 /* Chars that mean this number is a floating point constant */
130 /* As in 0f12.456 */
131 /* or 0d1.2345e12 */
132 const char FLT_CHARS[] = "rRsSfFdDxXpP";
133
134 /* Also be aware that MAXIMUM_NUMBER_OF_CHARS_FOR_FLOAT may have to be
135 changed in read.c . Ideally it shouldn't have to know about it at all,
136 but nothing is ideal around here.
137 */
138
139 static unsigned char octal[256];
140 #define isoctal(c) octal[c]
141 static unsigned char toHex[256];
142
143 /*
144 * anull bit - causes the branch delay slot instructions to not be executed
145 */
146 #define ANNUL (1 << 29)
147
148 static void
149 s_use ()
150 {
151
152 if (strncmp (input_line_pointer, ".text", 5) == 0)
153 {
154 input_line_pointer += 5;
155 s_text ();
156 return;
157 }
158 if (strncmp (input_line_pointer, ".data", 5) == 0)
159 {
160 input_line_pointer += 5;
161 s_data ();
162 return;
163 }
164 if (strncmp (input_line_pointer, ".data1", 6) == 0)
165 {
166 input_line_pointer += 6;
167 s_data1 ();
168 return;
169 }
170 /* Literals can't go in the text segment because you can't read
171 from instruction memory on some 29k's. So, into initialized data. */
172 if (strncmp (input_line_pointer, ".lit", 4) == 0)
173 {
174 input_line_pointer += 4;
175 subseg_new (SEG_DATA, 200);
176 demand_empty_rest_of_line ();
177 return;
178 }
179
180 as_bad ("Unknown segment type");
181 demand_empty_rest_of_line ();
182 return;
183 }
184
185 static void
186 s_data1 ()
187 {
188 subseg_new (SEG_DATA, 1);
189 demand_empty_rest_of_line ();
190 return;
191 }
192
193 /* Install symbol definition that maps REGNAME to REGNO.
194 FIXME-SOON: These are not recognized in mixed case. */
195
196 static void
197 insert_sreg (regname, regnum)
198 char *regname;
199 int regnum;
200 {
201 /* FIXME-SOON, put something in these syms so they won't be output to the symbol
202 table of the resulting object file. */
203
204 /* Must be large enough to hold the names of the special registers. */
205 char buf[80];
206 int i;
207
208 symbol_table_insert (symbol_new (regname, SEG_REGISTER, regnum, &zero_address_frag));
209 for (i = 0; regname[i]; i++)
210 buf[i] = islower (regname[i]) ? toupper (regname[i]) : regname[i];
211 buf[i] = '\0';
212
213 symbol_table_insert (symbol_new (buf, SEG_REGISTER, regnum, &zero_address_frag));
214 } /* insert_sreg() */
215
216 /* Install symbol definitions for assorted special registers.
217 See ASM29K Ref page 2-9. */
218
219 void
220 define_some_regs ()
221 {
222 #define SREG 256
223
224 /* Protected special-purpose register names */
225 insert_sreg ("vab", SREG + 0);
226 insert_sreg ("ops", SREG + 1);
227 insert_sreg ("cps", SREG + 2);
228 insert_sreg ("cfg", SREG + 3);
229 insert_sreg ("cha", SREG + 4);
230 insert_sreg ("chd", SREG + 5);
231 insert_sreg ("chc", SREG + 6);
232 insert_sreg ("rbp", SREG + 7);
233 insert_sreg ("tmc", SREG + 8);
234 insert_sreg ("tmr", SREG + 9);
235 insert_sreg ("pc0", SREG + 10);
236 insert_sreg ("pc1", SREG + 11);
237 insert_sreg ("pc2", SREG + 12);
238 insert_sreg ("mmu", SREG + 13);
239 insert_sreg ("lru", SREG + 14);
240
241 /* Additional protected special-purpose registers for the 29050 */
242 insert_sreg ("rsn", SREG + 15);
243 insert_sreg ("rma0", SREG + 16);
244 insert_sreg ("rmc0", SREG + 17);
245 insert_sreg ("rma1", SREG + 18);
246 insert_sreg ("rmc1", SREG + 19);
247 insert_sreg ("spc0", SREG + 20);
248 insert_sreg ("spc1", SREG + 21);
249 insert_sreg ("spc2", SREG + 22);
250 insert_sreg ("iba0", SREG + 23);
251 insert_sreg ("ibc0", SREG + 24);
252 insert_sreg ("iba1", SREG + 25);
253 insert_sreg ("ibc1", SREG + 26);
254
255 /* Unprotected special-purpose register names */
256 insert_sreg ("ipc", SREG + 128);
257 insert_sreg ("ipa", SREG + 129);
258 insert_sreg ("ipb", SREG + 130);
259 insert_sreg ("q", SREG + 131);
260 insert_sreg ("alu", SREG + 132);
261 insert_sreg ("bp", SREG + 133);
262 insert_sreg ("fc", SREG + 134);
263 insert_sreg ("cr", SREG + 135);
264 insert_sreg ("fpe", SREG + 160);
265 insert_sreg ("inte", SREG + 161);
266 insert_sreg ("fps", SREG + 162);
267 /* "", SREG+163); Reserved */
268 insert_sreg ("exop", SREG + 164);
269 } /* define_some_regs() */
270
271 /* This function is called once, at assembler startup time. It should
272 set up all the tables, etc. that the MD part of the assembler will need. */
273 void
274 md_begin ()
275 {
276 register char *retval = NULL;
277 int lose = 0;
278 register int skipnext = 0;
279 register unsigned int i;
280 register char *strend, *strend2;
281
282 /* Hash up all the opcodes for fast use later. */
283
284 op_hash = hash_new ();
285
286 for (i = 0; i < num_opcodes; i++)
287 {
288 const char *name = machine_opcodes[i].name;
289
290 if (skipnext)
291 {
292 skipnext = 0;
293 continue;
294 }
295
296 /* Hack to avoid multiple opcode entries. We pre-locate all the
297 variations (b/i field and P/A field) and handle them. */
298
299 if (!strcmp (name, machine_opcodes[i + 1].name))
300 {
301 if ((machine_opcodes[i].opcode ^ machine_opcodes[i + 1].opcode)
302 != 0x01000000)
303 goto bad_table;
304 strend = machine_opcodes[i].args + strlen (machine_opcodes[i].args) - 1;
305 strend2 = machine_opcodes[i + 1].args + strlen (machine_opcodes[i + 1].args) - 1;
306 switch (*strend)
307 {
308 case 'b':
309 if (*strend2 != 'i')
310 goto bad_table;
311 break;
312 case 'i':
313 if (*strend2 != 'b')
314 goto bad_table;
315 break;
316 case 'P':
317 if (*strend2 != 'A')
318 goto bad_table;
319 break;
320 case 'A':
321 if (*strend2 != 'P')
322 goto bad_table;
323 break;
324 default:
325 bad_table:
326 fprintf (stderr, "internal error: can't handle opcode %s\n", name);
327 lose = 1;
328 }
329
330 /* OK, this is an i/b or A/P pair. We skip the higher-valued one,
331 and let the code for operand checking handle OR-ing in the bit. */
332 if (machine_opcodes[i].opcode & 1)
333 continue;
334 else
335 skipnext = 1;
336 }
337
338 retval = hash_insert (op_hash, name, &machine_opcodes[i]);
339 if (retval != NULL && *retval != '\0')
340 {
341 fprintf (stderr, "internal error: can't hash `%s': %s\n",
342 machine_opcodes[i].name, retval);
343 lose = 1;
344 }
345 }
346
347 if (lose)
348 as_fatal ("Broken assembler. No assembly attempted.");
349
350 for (i = '0'; i < '8'; ++i)
351 octal[i] = 1;
352 for (i = '0'; i <= '9'; ++i)
353 toHex[i] = i - '0';
354 for (i = 'a'; i <= 'f'; ++i)
355 toHex[i] = i + 10 - 'a';
356 for (i = 'A'; i <= 'F'; ++i)
357 toHex[i] = i + 10 - 'A';
358
359 define_some_regs ();
360 }
361
362 void
363 md_end ()
364 {
365 return;
366 }
367
368 /* Assemble a single instruction. Its label has already been handled
369 by the generic front end. We just parse opcode and operands, and
370 produce the bytes of data and relocation. */
371
372 void
373 md_assemble (str)
374 char *str;
375 {
376 char *toP;
377 /* !!!! int rsd; */
378
379 know (str);
380 machine_ip (str);
381 toP = frag_more (4);
382 /* put out the opcode */
383 md_number_to_chars (toP, the_insn.opcode, 4);
384
385 /* put out the symbol-dependent stuff */
386 if (the_insn.reloc != NO_RELOC)
387 {
388 fix_new_exp (frag_now,
389 (toP - frag_now->fr_literal + the_insn.reloc_offset),
390 4, /* size */
391 &the_insn.exp,
392 the_insn.pcrel,
393 the_insn.reloc);
394 }
395 }
396
397 char *
398 parse_operand (s, operandp)
399 char *s;
400 expressionS *operandp;
401 {
402 char *save = input_line_pointer;
403 char *new;
404
405 input_line_pointer = s;
406 if (expression (operandp) == O_absent)
407 as_bad ("missing operand");
408 new = input_line_pointer;
409 input_line_pointer = save;
410 return new;
411 }
412
413 /* Instruction parsing. Takes a string containing the opcode.
414 Operands are at input_line_pointer. Output is in the_insn.
415 Warnings or errors are generated. */
416
417 static void
418 machine_ip (str)
419 char *str;
420 {
421 char *s;
422 const char *args;
423 /* !!!! char c; */
424 /* !!!! unsigned long i; */
425 struct machine_opcode *insn;
426 char *argsStart;
427 unsigned long opcode;
428 /* !!!! unsigned int mask; */
429 expressionS the_operand;
430 expressionS *operand = &the_operand;
431 unsigned int reg;
432
433 /* Must handle `div0' opcode. */
434 s = str;
435 if (isalpha (*s))
436 for (; isalnum (*s); ++s)
437 if (isupper (*s))
438 *s = tolower (*s);
439
440 switch (*s)
441 {
442 case '\0':
443 break;
444
445 case ' ': /* FIXME-SOMEDAY more whitespace */
446 *s++ = '\0';
447 break;
448
449 default:
450 as_bad ("Unknown opcode: `%s'", str);
451 return;
452 }
453 if ((insn = (struct machine_opcode *) hash_find (op_hash, str)) == NULL)
454 {
455 as_bad ("Unknown opcode `%s'.", str);
456 return;
457 }
458 argsStart = s;
459 opcode = insn->opcode;
460 memset (&the_insn, '\0', sizeof (the_insn));
461 the_insn.reloc = NO_RELOC;
462
463 /*
464 * Build the opcode, checking as we go to make
465 * sure that the operands match.
466 *
467 * If an operand matches, we modify the_insn or opcode appropriately,
468 * and do a "continue". If an operand fails to match, we "break".
469 */
470 if (insn->args[0] != '\0')
471 s = parse_operand (s, operand); /* Prime the pump */
472
473 for (args = insn->args;; ++args)
474 {
475 switch (*args)
476 {
477
478 case '\0': /* end of args */
479 if (*s == '\0')
480 {
481 /* We are truly done. */
482 the_insn.opcode = opcode;
483 return;
484 }
485 as_bad ("Too many operands: %s", s);
486 break;
487
488 case ',': /* Must match a comma */
489 if (*s++ == ',')
490 {
491 s = parse_operand (s, operand); /* Parse next opnd */
492 continue;
493 }
494 break;
495
496 case 'v': /* Trap numbers (immediate field) */
497 if (operand->X_op == O_constant)
498 {
499 if (operand->X_add_number < 256)
500 {
501 opcode |= (operand->X_add_number << 16);
502 continue;
503 }
504 else
505 {
506 as_bad ("Immediate value of %d is too large",
507 operand->X_add_number);
508 continue;
509 }
510 }
511 the_insn.reloc = RELOC_8;
512 the_insn.reloc_offset = 1; /* BIG-ENDIAN Byte 1 of insn */
513 the_insn.exp = *operand;
514 continue;
515
516 case 'b': /* A general register or 8-bit immediate */
517 case 'i':
518 /* We treat the two cases identically since we mashed
519 them together in the opcode table. */
520 if (operand->X_op == O_register)
521 goto general_reg;
522
523 opcode |= IMMEDIATE_BIT;
524 if (operand->X_op == O_constant)
525 {
526 if (operand->X_add_number < 256)
527 {
528 opcode |= operand->X_add_number;
529 continue;
530 }
531 else
532 {
533 as_bad ("Immediate value of %d is too large",
534 operand->X_add_number);
535 continue;
536 }
537 }
538 the_insn.reloc = RELOC_8;
539 the_insn.reloc_offset = 3; /* BIG-ENDIAN Byte 3 of insn */
540 the_insn.exp = *operand;
541 continue;
542
543 case 'a': /* next operand must be a register */
544 case 'c':
545 general_reg:
546 /* lrNNN or grNNN or %%expr or a user-def register name */
547 if (operand->X_op != O_register)
548 break; /* Only registers */
549 know (operand->X_add_symbol == 0);
550 know (operand->X_op_symbol == 0);
551 reg = operand->X_add_number;
552 if (reg >= SREG)
553 break; /* No special registers */
554
555 /*
556 * Got the register, now figure out where
557 * it goes in the opcode.
558 */
559 switch (*args)
560 {
561 case 'a':
562 opcode |= reg << 8;
563 continue;
564
565 case 'b':
566 case 'i':
567 opcode |= reg;
568 continue;
569
570 case 'c':
571 opcode |= reg << 16;
572 continue;
573 }
574 as_fatal ("failed sanity check.");
575 break;
576
577 case 'x': /* 16 bit constant, zero-extended */
578 case 'X': /* 16 bit constant, one-extended */
579 if (operand->X_op == O_constant)
580 {
581 opcode |= (operand->X_add_number & 0xFF) << 0 |
582 ((operand->X_add_number & 0xFF00) << 8);
583 continue;
584 }
585 the_insn.reloc = RELOC_CONST;
586 the_insn.exp = *operand;
587 continue;
588
589 case 'h':
590 if (operand->X_op == O_constant)
591 {
592 opcode |= (operand->X_add_number & 0x00FF0000) >> 16 |
593 (((unsigned long) operand->X_add_number
594 /* avoid sign ext */ & 0xFF000000) >> 8);
595 continue;
596 }
597 the_insn.reloc = RELOC_CONSTH;
598 the_insn.exp = *operand;
599 continue;
600
601 case 'P': /* PC-relative jump address */
602 case 'A': /* Absolute jump address */
603 /* These two are treated together since we folded the
604 opcode table entries together. */
605 if (operand->X_op == O_constant)
606 {
607 opcode |= ABSOLUTE_BIT |
608 (operand->X_add_number & 0x0003FC00) << 6 |
609 ((operand->X_add_number & 0x000003FC) >> 2);
610 continue;
611 }
612 the_insn.reloc = RELOC_JUMPTARG;
613 the_insn.exp = *operand;
614 the_insn.pcrel = 1; /* Assume PC-relative jump */
615 /* FIXME-SOON, Do we figure out whether abs later, after know sym val? */
616 continue;
617
618 case 'e': /* Coprocessor enable bit for LOAD/STORE insn */
619 if (operand->X_op == O_constant)
620 {
621 if (operand->X_add_number == 0)
622 continue;
623 if (operand->X_add_number == 1)
624 {
625 opcode |= CE_BIT;
626 continue;
627 }
628 }
629 break;
630
631 case 'n': /* Control bits for LOAD/STORE instructions */
632 if (operand->X_op == O_constant &&
633 operand->X_add_number < 128)
634 {
635 opcode |= (operand->X_add_number << 16);
636 continue;
637 }
638 break;
639
640 case 's': /* Special register number */
641 if (operand->X_op != O_register)
642 break; /* Only registers */
643 if (operand->X_add_number < SREG)
644 break; /* Not a special register */
645 opcode |= (operand->X_add_number & 0xFF) << 8;
646 continue;
647
648 case 'u': /* UI bit of CONVERT */
649 if (operand->X_op == O_constant)
650 {
651 if (operand->X_add_number == 0)
652 continue;
653 if (operand->X_add_number == 1)
654 {
655 opcode |= UI_BIT;
656 continue;
657 }
658 }
659 break;
660
661 case 'r': /* RND bits of CONVERT */
662 if (operand->X_op == O_constant &&
663 operand->X_add_number < 8)
664 {
665 opcode |= operand->X_add_number << 4;
666 continue;
667 }
668 break;
669
670 case 'd': /* FD bits of CONVERT */
671 if (operand->X_op == O_constant &&
672 operand->X_add_number < 4)
673 {
674 opcode |= operand->X_add_number << 2;
675 continue;
676 }
677 break;
678
679
680 case 'f': /* FS bits of CONVERT */
681 if (operand->X_op == O_constant &&
682 operand->X_add_number < 4)
683 {
684 opcode |= operand->X_add_number << 0;
685 continue;
686 }
687 break;
688
689 case 'C':
690 if (operand->X_op == O_constant &&
691 operand->X_add_number < 4)
692 {
693 opcode |= operand->X_add_number << 16;
694 continue;
695 }
696 break;
697
698 case 'F':
699 if (operand->X_op == O_constant &&
700 operand->X_add_number < 16)
701 {
702 opcode |= operand->X_add_number << 18;
703 continue;
704 }
705 break;
706
707 default:
708 BAD_CASE (*args);
709 }
710 /* Types or values of args don't match. */
711 as_bad ("Invalid operands");
712 return;
713 }
714 }
715
716 /*
717 This is identical to the md_atof in m68k.c. I think this is right,
718 but I'm not sure.
719
720 Turn a string in input_line_pointer into a floating point constant of type
721 type, and store the appropriate bytes in *litP. The number of LITTLENUMS
722 emitted is stored in *sizeP . An error message is returned, or NULL on OK.
723 */
724
725 /* Equal to MAX_PRECISION in atof-ieee.c */
726 #define MAX_LITTLENUMS 6
727
728 char *
729 md_atof (type, litP, sizeP)
730 char type;
731 char *litP;
732 int *sizeP;
733 {
734 int prec;
735 LITTLENUM_TYPE words[MAX_LITTLENUMS];
736 LITTLENUM_TYPE *wordP;
737 char *t;
738
739 switch (type)
740 {
741
742 case 'f':
743 case 'F':
744 case 's':
745 case 'S':
746 prec = 2;
747 break;
748
749 case 'd':
750 case 'D':
751 case 'r':
752 case 'R':
753 prec = 4;
754 break;
755
756 case 'x':
757 case 'X':
758 prec = 6;
759 break;
760
761 case 'p':
762 case 'P':
763 prec = 6;
764 break;
765
766 default:
767 *sizeP = 0;
768 return "Bad call to MD_ATOF()";
769 }
770 t = atof_ieee (input_line_pointer, type, words);
771 if (t)
772 input_line_pointer = t;
773 *sizeP = prec * sizeof (LITTLENUM_TYPE);
774 for (wordP = words; prec--;)
775 {
776 md_number_to_chars (litP, (long) (*wordP++), sizeof (LITTLENUM_TYPE));
777 litP += sizeof (LITTLENUM_TYPE);
778 }
779 return ""; /* Someone should teach Dean about null pointers */
780 }
781
782 /*
783 * Write out big-endian.
784 */
785 void
786 md_number_to_chars (buf, val, n)
787 char *buf;
788 valueT val;
789 int n;
790 {
791
792 switch (n)
793 {
794
795 case 4:
796 *buf++ = val >> 24;
797 *buf++ = val >> 16;
798 case 2:
799 *buf++ = val >> 8;
800 case 1:
801 *buf = val;
802 break;
803
804 default:
805 as_fatal ("failed sanity check.");
806 }
807 return;
808 }
809
810 void
811 md_apply_fix (fixP, val)
812 fixS *fixP;
813 long val;
814 {
815 char *buf = fixP->fx_where + fixP->fx_frag->fr_literal;
816
817 fixP->fx_addnumber = val; /* Remember value for emit_reloc */
818
819
820 know (fixP->fx_size == 4);
821 know (fixP->fx_r_type < NO_RELOC);
822
823 /*
824 * This is a hack. There should be a better way to
825 * handle this.
826 */
827 if (fixP->fx_r_type == RELOC_WDISP30 && fixP->fx_addsy)
828 {
829 val += fixP->fx_where + fixP->fx_frag->fr_address;
830 }
831
832 switch (fixP->fx_r_type)
833 {
834
835 case RELOC_32:
836 buf[0] = val >> 24;
837 buf[1] = val >> 16;
838 buf[2] = val >> 8;
839 buf[3] = val;
840 break;
841
842 case RELOC_8:
843 buf[0] = val;
844 break;
845
846 case RELOC_WDISP30:
847 val = (val >>= 2) + 1;
848 buf[0] |= (val >> 24) & 0x3f;
849 buf[1] = (val >> 16);
850 buf[2] = val >> 8;
851 buf[3] = val;
852 break;
853
854 case RELOC_HI22:
855 buf[1] |= (val >> 26) & 0x3f;
856 buf[2] = val >> 18;
857 buf[3] = val >> 10;
858 break;
859
860 case RELOC_LO10:
861 buf[2] |= (val >> 8) & 0x03;
862 buf[3] = val;
863 break;
864
865 case RELOC_BASE13:
866 buf[2] |= (val >> 8) & 0x1f;
867 buf[3] = val;
868 break;
869
870 case RELOC_WDISP22:
871 val = (val >>= 2) + 1;
872 /* FALLTHROUGH */
873 case RELOC_BASE22:
874 buf[1] |= (val >> 16) & 0x3f;
875 buf[2] = val >> 8;
876 buf[3] = val;
877 break;
878
879 #if 0
880 case RELOC_PC10:
881 case RELOC_PC22:
882 case RELOC_JMP_TBL:
883 case RELOC_SEGOFF16:
884 case RELOC_GLOB_DAT:
885 case RELOC_JMP_SLOT:
886 case RELOC_RELATIVE:
887 #endif
888 case RELOC_JUMPTARG: /* 00XX00XX pattern in a word */
889 buf[1] = val >> 10; /* Holds bits 0003FFFC of address */
890 buf[3] = val >> 2;
891 break;
892
893 case RELOC_CONST: /* 00XX00XX pattern in a word */
894 buf[1] = val >> 8; /* Holds bits 0000XXXX */
895 buf[3] = val;
896 break;
897
898 case RELOC_CONSTH: /* 00XX00XX pattern in a word */
899 buf[1] = val >> 24; /* Holds bits XXXX0000 */
900 buf[3] = val >> 16;
901 break;
902
903 case NO_RELOC:
904 default:
905 as_bad ("bad relocation type: 0x%02x", fixP->fx_r_type);
906 break;
907 }
908 return;
909 }
910
911 #ifdef OBJ_COFF
912 short
913 tc_coff_fix2rtype (fixP)
914 fixS *fixP;
915 {
916
917 switch (fixP->fx_r_type)
918 {
919 case RELOC_32:
920 return (R_WORD);
921 case RELOC_8:
922 return (R_BYTE);
923 case RELOC_CONST:
924 return (R_ILOHALF);
925 case RELOC_CONSTH:
926 return (R_IHIHALF);
927 case RELOC_JUMPTARG:
928 return (R_IREL);
929 default:
930 printf ("need %o3\n", fixP->fx_r_type);
931 abort ();
932 } /* switch on type */
933
934 return (0);
935 } /* tc_coff_fix2rtype() */
936
937 #endif /* OBJ_COFF */
938
939 /* should never be called for sparc */
940 void
941 md_create_short_jump (ptr, from_addr, to_addr, frag, to_symbol)
942 char *ptr;
943 addressT from_addr, to_addr;
944 fragS *frag;
945 symbolS *to_symbol;
946 {
947 as_fatal ("a29k_create_short_jmp\n");
948 }
949
950 /* should never be called for 29k */
951 void
952 md_convert_frag (headers, fragP)
953 object_headers *headers;
954 register fragS *fragP;
955 {
956 as_fatal ("sparc_convert_frag\n");
957 }
958
959 /* should never be called for 29k */
960 void
961 md_create_long_jump (ptr, from_addr, to_addr, frag, to_symbol)
962 char *ptr;
963 addressT from_addr;
964 addressT to_addr;
965 fragS *frag;
966 symbolS *to_symbol;
967 {
968 as_fatal ("sparc_create_long_jump\n");
969 }
970
971 /* should never be called for a29k */
972 int
973 md_estimate_size_before_relax (fragP, segtype)
974 register fragS *fragP;
975 segT segtype;
976 {
977 as_fatal ("sparc_estimate_size_before_relax\n");
978 return (0);
979 }
980
981 #if 0
982 /* for debugging only */
983 static void
984 print_insn (insn)
985 struct machine_it *insn;
986 {
987 char *Reloc[] =
988 {
989 "RELOC_8",
990 "RELOC_16",
991 "RELOC_32",
992 "RELOC_DISP8",
993 "RELOC_DISP16",
994 "RELOC_DISP32",
995 "RELOC_WDISP30",
996 "RELOC_WDISP22",
997 "RELOC_HI22",
998 "RELOC_22",
999 "RELOC_13",
1000 "RELOC_LO10",
1001 "RELOC_SFA_BASE",
1002 "RELOC_SFA_OFF13",
1003 "RELOC_BASE10",
1004 "RELOC_BASE13",
1005 "RELOC_BASE22",
1006 "RELOC_PC10",
1007 "RELOC_PC22",
1008 "RELOC_JMP_TBL",
1009 "RELOC_SEGOFF16",
1010 "RELOC_GLOB_DAT",
1011 "RELOC_JMP_SLOT",
1012 "RELOC_RELATIVE",
1013 "NO_RELOC"
1014 };
1015
1016 if (insn->error)
1017 {
1018 fprintf (stderr, "ERROR: %s\n");
1019 }
1020 fprintf (stderr, "opcode=0x%08x\n", insn->opcode);
1021 fprintf (stderr, "reloc = %s\n", Reloc[insn->reloc]);
1022 fprintf (stderr, "exp = {\n");
1023 fprintf (stderr, "\t\tX_add_symbol = %s\n",
1024 insn->exp.X_add_symbol ?
1025 (S_GET_NAME (insn->exp.X_add_symbol) ?
1026 S_GET_NAME (insn->exp.X_add_symbol) : "???") : "0");
1027 fprintf (stderr, "\t\tX_op_symbol = %s\n",
1028 insn->exp.X_op_symbol ?
1029 (S_GET_NAME (insn->exp.X_op_symbol) ?
1030 S_GET_NAME (insn->exp.X_op_symbol) : "???") : "0");
1031 fprintf (stderr, "\t\tX_add_number = %d\n",
1032 insn->exp.X_add_number);
1033 fprintf (stderr, "}\n");
1034 return;
1035 }
1036
1037 #endif
1038
1039 /* Translate internal representation of relocation info to target format.
1040
1041 On sparc/29k: first 4 bytes are normal unsigned long address, next three
1042 bytes are index, most sig. byte first. Byte 7 is broken up with
1043 bit 7 as external, bits 6 & 5 unused, and the lower
1044 five bits as relocation type. Next 4 bytes are long addend. */
1045 /* Thanx and a tip of the hat to Michael Bloom, mb@ttidca.tti.com */
1046
1047 #ifdef OBJ_AOUT
1048
1049 void
1050 tc_aout_fix_to_chars (where, fixP, segment_address_in_file)
1051 char *where;
1052 fixS *fixP;
1053 relax_addressT segment_address_in_file;
1054 {
1055 long r_symbolnum;
1056
1057 know (fixP->fx_r_type < NO_RELOC);
1058 know (fixP->fx_addsy != NULL);
1059
1060 md_number_to_chars (where,
1061 fixP->fx_frag->fr_address + fixP->fx_where - segment_address_in_file,
1062 4);
1063
1064 r_symbolnum = (S_IS_DEFINED (fixP->fx_addsy)
1065 ? S_GET_TYPE (fixP->fx_addsy)
1066 : fixP->fx_addsy->sy_number);
1067
1068 where[4] = (r_symbolnum >> 16) & 0x0ff;
1069 where[5] = (r_symbolnum >> 8) & 0x0ff;
1070 where[6] = r_symbolnum & 0x0ff;
1071 where[7] = (((!S_IS_DEFINED (fixP->fx_addsy)) << 7) & 0x80) | (0 & 0x60) | (fixP->fx_r_type & 0x1F);
1072 /* Also easy */
1073 md_number_to_chars (&where[8], fixP->fx_addnumber, 4);
1074
1075 return;
1076 } /* tc_aout_fix_to_chars() */
1077
1078 #endif /* OBJ_AOUT */
1079
1080 int
1081 md_parse_option (argP, cntP, vecP)
1082 char **argP;
1083 int *cntP;
1084 char ***vecP;
1085 {
1086 return (0);
1087 }
1088
1089
1090 /* Default the values of symbols known that should be "predefined". We
1091 don't bother to predefine them unless you actually use one, since there
1092 are a lot of them. */
1093
1094 symbolS *
1095 md_undefined_symbol (name)
1096 char *name;
1097 {
1098 long regnum;
1099 char testbuf[5 + /*SLOP*/ 5];
1100
1101 if (name[0] == 'g' || name[0] == 'G' || name[0] == 'l' || name[0] == 'L')
1102 {
1103 /* Perhaps a global or local register name */
1104 if (name[1] == 'r' || name[1] == 'R')
1105 {
1106 /* Parse the number, make sure it has no extra zeroes or trailing
1107 chars */
1108 regnum = atol (&name[2]);
1109 if (regnum > 127)
1110 return 0;
1111 sprintf (testbuf, "%ld", regnum);
1112 if (strcmp (testbuf, &name[2]) != 0)
1113 return 0; /* gr007 or lr7foo or whatever */
1114
1115 /* We have a wiener! Define and return a new symbol for it. */
1116 if (name[0] == 'l' || name[0] == 'L')
1117 regnum += 128;
1118 return (symbol_new (name, SEG_REGISTER, regnum, &zero_address_frag));
1119 }
1120 }
1121
1122 return 0;
1123 }
1124
1125 /* Parse an operand that is machine-specific. */
1126
1127 void
1128 md_operand (expressionP)
1129 expressionS *expressionP;
1130 {
1131
1132 if (input_line_pointer[0] == '%' && input_line_pointer[1] == '%')
1133 {
1134 /* We have a numeric register expression. No biggy. */
1135 input_line_pointer += 2; /* Skip %% */
1136 (void) expression (expressionP);
1137 if (expressionP->X_op != O_constant
1138 || expressionP->X_add_number > 255)
1139 as_bad ("Invalid expression after %%%%\n");
1140 expressionP->X_op = O_register;
1141 }
1142 else if (input_line_pointer[0] == '&')
1143 {
1144 /* We are taking the 'address' of a register...this one is not
1145 in the manual, but it *is* in traps/fpsymbol.h! What they
1146 seem to want is the register number, as an absolute number. */
1147 input_line_pointer++; /* Skip & */
1148 (void) expression (expressionP);
1149 if (expressionP->X_op != O_register)
1150 as_bad ("Invalid register in & expression");
1151 else
1152 expressionP->X_op = O_constant;
1153 }
1154 }
1155
1156 /* Round up a section size to the appropriate boundary. */
1157 valueT
1158 md_section_align (segment, size)
1159 segT segment;
1160 valueT size;
1161 {
1162 return size; /* Byte alignment is fine */
1163 }
1164
1165 /* Exactly what point is a PC-relative offset relative TO?
1166 On the 29000, they're relative to the address of the instruction,
1167 which we have set up as the address of the fixup too. */
1168 long
1169 md_pcrel_from (fixP)
1170 fixS *fixP;
1171 {
1172 return fixP->fx_where + fixP->fx_frag->fr_address;
1173 }
1174
1175 /*
1176 * Local Variables:
1177 * comment-column: 0
1178 * End:
1179 */
1180
1181 /* end of tc-a29k.c */
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