1 /* tc-a29k.c -- Assemble for the AMD 29000.
2 Copyright (C) 1989, 1990, 1991, 1992, 1993 Free Software Foundation, Inc.
4 This file is part of GAS, the GNU Assembler.
6 GAS is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GAS is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GAS; see the file COPYING. If not, write to
18 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
20 /* John Gilmore has reorganized this module somewhat, to make it easier
21 to convert it to new machines' assemblers as desired. There was too
22 much bloody rewriting required before. There still probably is. */
27 #include "opcode/a29k.h"
29 /* Make it easier to clone this machine desc into another one. */
30 #define machine_opcode a29k_opcode
31 #define machine_opcodes a29k_opcodes
32 #define machine_ip a29k_ip
33 #define machine_it a29k_it
35 const relax_typeS md_relax_table
[] =
40 #define IMMEDIATE_BIT 0x01000000 /* Turns RB into Immediate */
41 #define ABSOLUTE_BIT 0x01000000 /* Turns PC-relative to Absolute */
42 #define CE_BIT 0x00800000 /* Coprocessor enable in LOAD */
43 #define UI_BIT 0x00000080 /* Unsigned integer in CONVERT */
45 /* handle of the OPCODE hash table */
46 static struct hash_control
*op_hash
= NULL
;
55 int reloc_offset
; /* Offset of reloc within insn */
61 static void machine_ip
PARAMS ((char *str
));
62 /* static void print_insn PARAMS ((struct machine_it *insn)); */
64 static void s_data1
PARAMS ((void));
65 static void s_use
PARAMS ((int));
71 {"align", s_align_bytes
, 4},
72 {"block", s_space
, 0},
73 {"cputype", s_ignore
, 0}, /* CPU as 29000 or 29050 */
74 {"reg", s_lsym
, 0}, /* Register equate, same as equ */
75 {"space", s_ignore
, 0}, /* Listing control */
76 {"sect", s_ignore
, 0}, /* Creation of coff sections */
78 /* We can do this right with coff. */
85 int md_short_jump_size
= 4;
86 int md_long_jump_size
= 4;
87 #if defined(BFD_HEADERS)
89 const int md_reloc_size
= RELSZ
; /* Coff headers */
91 const int md_reloc_size
= 12; /* something else headers */
94 const int md_reloc_size
= 12; /* Not bfdized*/
97 /* This array holds the chars that always start a comment. If the
98 pre-processor is disabled, these aren't very useful */
99 const char comment_chars
[] = ";";
101 /* This array holds the chars that only start a comment at the beginning of
102 a line. If the line seems to have the form '# 123 filename'
103 .line and .file directives will appear in the pre-processed output */
104 /* Note that input_file.c hand checks for '#' at the beginning of the
105 first line of the input file. This is because the compiler outputs
106 #NO_APP at the beginning of its output. */
107 /* Also note that comments like this one will always work */
108 const char line_comment_chars
[] = "#";
110 /* We needed an unused char for line separation to work around the
111 lack of macros, using sed and such. */
112 const char line_separator_chars
[] = "@";
114 /* Chars that can be used to separate mant from exp in floating point nums */
115 const char EXP_CHARS
[] = "eE";
117 /* Chars that mean this number is a floating point constant */
120 const char FLT_CHARS
[] = "rRsSfFdDxXpP";
122 /* Also be aware that MAXIMUM_NUMBER_OF_CHARS_FOR_FLOAT may have to be
123 changed in read.c. Ideally it shouldn't have to know about it at
124 all, but nothing is ideal around here. */
126 static unsigned char octal
[256];
127 #define isoctal(c) octal[c]
128 static unsigned char toHex
[256];
131 * anull bit - causes the branch delay slot instructions to not be executed
133 #define ANNUL (1 << 29)
141 if (strncmp (input_line_pointer
, ".text", 5) == 0)
143 input_line_pointer
+= 5;
147 if (strncmp (input_line_pointer
, ".data", 5) == 0)
149 input_line_pointer
+= 5;
153 if (strncmp (input_line_pointer
, ".data1", 6) == 0)
155 input_line_pointer
+= 6;
159 /* Literals can't go in the text segment because you can't read from
160 instruction memory on some 29k's. So, into initialized data. */
161 if (strncmp (input_line_pointer
, ".lit", 4) == 0)
163 input_line_pointer
+= 4;
164 subseg_set (SEG_DATA
, 200);
165 demand_empty_rest_of_line ();
169 as_bad ("Unknown segment type");
170 demand_empty_rest_of_line ();
177 subseg_set (SEG_DATA
, 1);
178 demand_empty_rest_of_line ();
182 #endif /* OBJ_COFF */
184 /* Install symbol definition that maps REGNAME to REGNO.
185 FIXME-SOON: These are not recognized in mixed case. */
188 insert_sreg (regname
, regnum
)
192 /* FIXME-SOON, put something in these syms so they won't be output
193 to the symbol table of the resulting object file. */
195 /* Must be large enough to hold the names of the special registers. */
199 symbol_table_insert (symbol_new (regname
, SEG_REGISTER
, (valueT
) regnum
,
200 &zero_address_frag
));
201 for (i
= 0; regname
[i
]; i
++)
202 buf
[i
] = islower (regname
[i
]) ? toupper (regname
[i
]) : regname
[i
];
205 symbol_table_insert (symbol_new (buf
, SEG_REGISTER
, (valueT
) regnum
,
206 &zero_address_frag
));
209 /* Install symbol definitions for assorted special registers.
210 See ASM29K Ref page 2-9. */
217 /* Protected special-purpose register names */
218 insert_sreg ("vab", SREG
+ 0);
219 insert_sreg ("ops", SREG
+ 1);
220 insert_sreg ("cps", SREG
+ 2);
221 insert_sreg ("cfg", SREG
+ 3);
222 insert_sreg ("cha", SREG
+ 4);
223 insert_sreg ("chd", SREG
+ 5);
224 insert_sreg ("chc", SREG
+ 6);
225 insert_sreg ("rbp", SREG
+ 7);
226 insert_sreg ("tmc", SREG
+ 8);
227 insert_sreg ("tmr", SREG
+ 9);
228 insert_sreg ("pc0", SREG
+ 10);
229 insert_sreg ("pc1", SREG
+ 11);
230 insert_sreg ("pc2", SREG
+ 12);
231 insert_sreg ("mmu", SREG
+ 13);
232 insert_sreg ("lru", SREG
+ 14);
234 /* Additional protected special-purpose registers for the 29050 */
235 insert_sreg ("rsn", SREG
+ 15);
236 insert_sreg ("rma0", SREG
+ 16);
237 insert_sreg ("rmc0", SREG
+ 17);
238 insert_sreg ("rma1", SREG
+ 18);
239 insert_sreg ("rmc1", SREG
+ 19);
240 insert_sreg ("spc0", SREG
+ 20);
241 insert_sreg ("spc1", SREG
+ 21);
242 insert_sreg ("spc2", SREG
+ 22);
243 insert_sreg ("iba0", SREG
+ 23);
244 insert_sreg ("ibc0", SREG
+ 24);
245 insert_sreg ("iba1", SREG
+ 25);
246 insert_sreg ("ibc1", SREG
+ 26);
248 /* Unprotected special-purpose register names */
249 insert_sreg ("ipc", SREG
+ 128);
250 insert_sreg ("ipa", SREG
+ 129);
251 insert_sreg ("ipb", SREG
+ 130);
252 insert_sreg ("q", SREG
+ 131);
253 insert_sreg ("alu", SREG
+ 132);
254 insert_sreg ("bp", SREG
+ 133);
255 insert_sreg ("fc", SREG
+ 134);
256 insert_sreg ("cr", SREG
+ 135);
257 insert_sreg ("fpe", SREG
+ 160);
258 insert_sreg ("inte", SREG
+ 161);
259 insert_sreg ("fps", SREG
+ 162);
260 /* "", SREG+163); Reserved */
261 insert_sreg ("exop", SREG
+ 164);
264 /* This function is called once, at assembler startup time. It should
265 set up all the tables, etc., that the MD part of the assembler will
270 register const char *retval
= NULL
;
272 register int skipnext
= 0;
273 register unsigned int i
;
274 register char *strend
, *strend2
;
276 /* Hash up all the opcodes for fast use later. */
278 op_hash
= hash_new ();
280 for (i
= 0; i
< num_opcodes
; i
++)
282 const char *name
= machine_opcodes
[i
].name
;
290 /* Hack to avoid multiple opcode entries. We pre-locate all the
291 variations (b/i field and P/A field) and handle them. */
293 if (!strcmp (name
, machine_opcodes
[i
+ 1].name
))
295 if ((machine_opcodes
[i
].opcode
^ machine_opcodes
[i
+ 1].opcode
)
298 strend
= machine_opcodes
[i
].args
+ strlen (machine_opcodes
[i
].args
) - 1;
299 strend2
= machine_opcodes
[i
+ 1].args
+ strlen (machine_opcodes
[i
+ 1].args
) - 1;
320 fprintf (stderr
, "internal error: can't handle opcode %s\n",
325 /* OK, this is an i/b or A/P pair. We skip the
326 higher-valued one, and let the code for operand checking
327 handle OR-ing in the bit. */
328 if (machine_opcodes
[i
].opcode
& 1)
334 retval
= hash_insert (op_hash
, name
, (PTR
) &machine_opcodes
[i
]);
337 fprintf (stderr
, "internal error: can't hash `%s': %s\n",
338 machine_opcodes
[i
].name
, retval
);
344 as_fatal ("Broken assembler. No assembly attempted.");
346 for (i
= '0'; i
< '8'; ++i
)
348 for (i
= '0'; i
<= '9'; ++i
)
350 for (i
= 'a'; i
<= 'f'; ++i
)
351 toHex
[i
] = i
+ 10 - 'a';
352 for (i
= 'A'; i
<= 'F'; ++i
)
353 toHex
[i
] = i
+ 10 - 'A';
364 /* Assemble a single instruction. Its label has already been handled
365 by the generic front end. We just parse opcode and operands, and
366 produce the bytes of data and relocation. */
377 /* put out the opcode */
378 md_number_to_chars (toP
, the_insn
.opcode
, 4);
380 /* put out the symbol-dependent stuff */
381 if (the_insn
.reloc
!= NO_RELOC
)
383 fix_new_exp (frag_now
,
384 (toP
- frag_now
->fr_literal
+ the_insn
.reloc_offset
),
393 parse_operand (s
, operandp
)
395 expressionS
*operandp
;
397 char *save
= input_line_pointer
;
400 input_line_pointer
= s
;
401 expression (operandp
);
402 if (operandp
->X_op
== O_absent
)
403 as_bad ("missing operand");
404 new = input_line_pointer
;
405 input_line_pointer
= save
;
409 /* Instruction parsing. Takes a string containing the opcode.
410 Operands are at input_line_pointer. Output is in the_insn.
411 Warnings or errors are generated. */
419 struct machine_opcode
*insn
;
421 unsigned long opcode
;
422 expressionS the_operand
;
423 expressionS
*operand
= &the_operand
;
426 /* Must handle `div0' opcode. */
429 for (; isalnum (*s
); ++s
)
438 case ' ': /* FIXME-SOMEDAY more whitespace */
443 as_bad ("Unknown opcode: `%s'", str
);
446 if ((insn
= (struct machine_opcode
*) hash_find (op_hash
, str
)) == NULL
)
448 as_bad ("Unknown opcode `%s'.", str
);
452 opcode
= insn
->opcode
;
453 memset (&the_insn
, '\0', sizeof (the_insn
));
454 the_insn
.reloc
= NO_RELOC
;
456 /* Build the opcode, checking as we go to make sure that the
459 If an operand matches, we modify the_insn or opcode appropriately,
460 and do a "continue". If an operand fails to match, we "break". */
462 if (insn
->args
[0] != '\0')
463 s
= parse_operand (s
, operand
); /* Prime the pump */
465 for (args
= insn
->args
;; ++args
)
470 case '\0': /* end of args */
473 /* We are truly done. */
474 the_insn
.opcode
= opcode
;
477 as_bad ("Too many operands: %s", s
);
480 case ',': /* Must match a comma */
483 s
= parse_operand (s
, operand
); /* Parse next opnd */
488 case 'v': /* Trap numbers (immediate field) */
489 if (operand
->X_op
== O_constant
)
491 if (operand
->X_add_number
< 256)
493 opcode
|= (operand
->X_add_number
<< 16);
498 as_bad ("Immediate value of %ld is too large",
499 (long) operand
->X_add_number
);
503 the_insn
.reloc
= RELOC_8
;
504 the_insn
.reloc_offset
= 1; /* BIG-ENDIAN Byte 1 of insn */
505 the_insn
.exp
= *operand
;
508 case 'b': /* A general register or 8-bit immediate */
510 /* We treat the two cases identically since we mashed
511 them together in the opcode table. */
512 if (operand
->X_op
== O_register
)
515 opcode
|= IMMEDIATE_BIT
;
516 if (operand
->X_op
== O_constant
)
518 if (operand
->X_add_number
< 256)
520 opcode
|= operand
->X_add_number
;
525 as_bad ("Immediate value of %ld is too large",
526 (long) operand
->X_add_number
);
530 the_insn
.reloc
= RELOC_8
;
531 the_insn
.reloc_offset
= 3; /* BIG-ENDIAN Byte 3 of insn */
532 the_insn
.exp
= *operand
;
535 case 'a': /* next operand must be a register */
538 /* lrNNN or grNNN or %%expr or a user-def register name */
539 if (operand
->X_op
!= O_register
)
540 break; /* Only registers */
541 know (operand
->X_add_symbol
== 0);
542 know (operand
->X_op_symbol
== 0);
543 reg
= operand
->X_add_number
;
545 break; /* No special registers */
547 /* Got the register, now figure out where it goes in the
564 as_fatal ("failed sanity check.");
567 case 'x': /* 16 bit constant, zero-extended */
568 case 'X': /* 16 bit constant, one-extended */
569 if (operand
->X_op
== O_constant
)
571 opcode
|= (operand
->X_add_number
& 0xFF) << 0 |
572 ((operand
->X_add_number
& 0xFF00) << 8);
575 the_insn
.reloc
= RELOC_CONST
;
576 the_insn
.exp
= *operand
;
580 if (operand
->X_op
== O_constant
)
582 opcode
|= (operand
->X_add_number
& 0x00FF0000) >> 16 |
583 (((unsigned long) operand
->X_add_number
584 /* avoid sign ext */ & 0xFF000000) >> 8);
587 the_insn
.reloc
= RELOC_CONSTH
;
588 the_insn
.exp
= *operand
;
591 case 'P': /* PC-relative jump address */
592 case 'A': /* Absolute jump address */
593 /* These two are treated together since we folded the
594 opcode table entries together. */
595 if (operand
->X_op
== O_constant
)
597 opcode
|= ABSOLUTE_BIT
|
598 (operand
->X_add_number
& 0x0003FC00) << 6 |
599 ((operand
->X_add_number
& 0x000003FC) >> 2);
602 the_insn
.reloc
= RELOC_JUMPTARG
;
603 the_insn
.exp
= *operand
;
604 the_insn
.pcrel
= 1; /* Assume PC-relative jump */
605 /* FIXME-SOON, Do we figure out whether abs later, after
609 case 'e': /* Coprocessor enable bit for LOAD/STORE insn */
610 if (operand
->X_op
== O_constant
)
612 if (operand
->X_add_number
== 0)
614 if (operand
->X_add_number
== 1)
622 case 'n': /* Control bits for LOAD/STORE instructions */
623 if (operand
->X_op
== O_constant
&&
624 operand
->X_add_number
< 128)
626 opcode
|= (operand
->X_add_number
<< 16);
631 case 's': /* Special register number */
632 if (operand
->X_op
!= O_register
)
633 break; /* Only registers */
634 if (operand
->X_add_number
< SREG
)
635 break; /* Not a special register */
636 opcode
|= (operand
->X_add_number
& 0xFF) << 8;
639 case 'u': /* UI bit of CONVERT */
640 if (operand
->X_op
== O_constant
)
642 if (operand
->X_add_number
== 0)
644 if (operand
->X_add_number
== 1)
652 case 'r': /* RND bits of CONVERT */
653 if (operand
->X_op
== O_constant
&&
654 operand
->X_add_number
< 8)
656 opcode
|= operand
->X_add_number
<< 4;
661 case 'd': /* FD bits of CONVERT */
662 if (operand
->X_op
== O_constant
&&
663 operand
->X_add_number
< 4)
665 opcode
|= operand
->X_add_number
<< 2;
671 case 'f': /* FS bits of CONVERT */
672 if (operand
->X_op
== O_constant
&&
673 operand
->X_add_number
< 4)
675 opcode
|= operand
->X_add_number
<< 0;
681 if (operand
->X_op
== O_constant
&&
682 operand
->X_add_number
< 4)
684 opcode
|= operand
->X_add_number
<< 16;
690 if (operand
->X_op
== O_constant
&&
691 operand
->X_add_number
< 16)
693 opcode
|= operand
->X_add_number
<< 18;
701 /* Types or values of args don't match. */
702 as_bad ("Invalid operands");
707 /* This is identical to the md_atof in m68k.c. I think this is right,
710 Turn a string in input_line_pointer into a floating point constant
711 of type type, and store the appropriate bytes in *litP. The number
712 of LITTLENUMS emitted is stored in *sizeP . An error message is
713 returned, or NULL on OK. */
715 /* Equal to MAX_PRECISION in atof-ieee.c */
716 #define MAX_LITTLENUMS 6
719 md_atof (type
, litP
, sizeP
)
725 LITTLENUM_TYPE words
[MAX_LITTLENUMS
];
726 LITTLENUM_TYPE
*wordP
;
758 return "Bad call to MD_ATOF()";
760 t
= atof_ieee (input_line_pointer
, type
, words
);
762 input_line_pointer
= t
;
763 *sizeP
= prec
* sizeof (LITTLENUM_TYPE
);
764 for (wordP
= words
; prec
--;)
766 md_number_to_chars (litP
, (valueT
) (*wordP
++), sizeof (LITTLENUM_TYPE
));
767 litP
+= sizeof (LITTLENUM_TYPE
);
773 * Write out big-endian.
776 md_number_to_chars (buf
, val
, n
)
795 as_fatal ("failed sanity check.");
801 md_apply_fix (fixP
, val
)
805 char *buf
= fixP
->fx_where
+ fixP
->fx_frag
->fr_literal
;
807 fixP
->fx_addnumber
= val
; /* Remember value for emit_reloc */
810 know (fixP
->fx_size
== 4);
811 know (fixP
->fx_r_type
< NO_RELOC
);
813 /* This is a hack. There should be a better way to handle this. */
814 if (fixP
->fx_r_type
== RELOC_WDISP30
&& fixP
->fx_addsy
)
816 val
+= fixP
->fx_where
+ fixP
->fx_frag
->fr_address
;
819 switch (fixP
->fx_r_type
)
834 val
= (val
>>= 2) + 1;
835 buf
[0] |= (val
>> 24) & 0x3f;
836 buf
[1] = (val
>> 16);
842 buf
[1] |= (val
>> 26) & 0x3f;
848 buf
[2] |= (val
>> 8) & 0x03;
853 buf
[2] |= (val
>> 8) & 0x1f;
858 val
= (val
>>= 2) + 1;
861 buf
[1] |= (val
>> 16) & 0x3f;
875 case RELOC_JUMPTARG
: /* 00XX00XX pattern in a word */
876 buf
[1] = val
>> 10; /* Holds bits 0003FFFC of address */
880 case RELOC_CONST
: /* 00XX00XX pattern in a word */
881 buf
[1] = val
>> 8; /* Holds bits 0000XXXX */
885 case RELOC_CONSTH
: /* 00XX00XX pattern in a word */
886 buf
[1] = val
>> 24; /* Holds bits XXXX0000 */
892 as_bad ("bad relocation type: 0x%02x", fixP
->fx_r_type
);
900 tc_coff_fix2rtype (fixP
)
904 switch (fixP
->fx_r_type
)
917 printf ("need %o3\n", fixP
->fx_r_type
);
919 } /* switch on type */
924 #endif /* OBJ_COFF */
926 /* should never be called for 29k */
928 md_create_short_jump (ptr
, from_addr
, to_addr
, frag
, to_symbol
)
930 addressT from_addr
, to_addr
;
934 as_fatal ("a29k_create_short_jmp\n");
937 /* should never be called for 29k */
939 md_convert_frag (headers
, fragP
)
940 object_headers
*headers
;
941 register fragS
*fragP
;
943 as_fatal ("a29k_convert_frag\n");
946 /* should never be called for 29k */
948 md_create_long_jump (ptr
, from_addr
, to_addr
, frag
, to_symbol
)
955 as_fatal ("a29k_create_long_jump\n");
958 /* should never be called for a29k */
960 md_estimate_size_before_relax (fragP
, segtype
)
961 register fragS
*fragP
;
964 as_fatal ("a29k_estimate_size_before_relax\n");
969 /* for debugging only */
972 struct machine_it
*insn
;
1005 fprintf (stderr
, "ERROR: %s\n");
1007 fprintf (stderr
, "opcode=0x%08x\n", insn
->opcode
);
1008 fprintf (stderr
, "reloc = %s\n", Reloc
[insn
->reloc
]);
1009 fprintf (stderr
, "exp = {\n");
1010 fprintf (stderr
, "\t\tX_add_symbol = %s\n",
1011 insn
->exp
.X_add_symbol
?
1012 (S_GET_NAME (insn
->exp
.X_add_symbol
) ?
1013 S_GET_NAME (insn
->exp
.X_add_symbol
) : "???") : "0");
1014 fprintf (stderr
, "\t\tX_op_symbol = %s\n",
1015 insn
->exp
.X_op_symbol
?
1016 (S_GET_NAME (insn
->exp
.X_op_symbol
) ?
1017 S_GET_NAME (insn
->exp
.X_op_symbol
) : "???") : "0");
1018 fprintf (stderr
, "\t\tX_add_number = %d\n",
1019 insn
->exp
.X_add_number
);
1020 fprintf (stderr
, "}\n");
1026 /* Translate internal representation of relocation info to target format.
1028 On sparc/29k: first 4 bytes are normal unsigned long address, next three
1029 bytes are index, most sig. byte first. Byte 7 is broken up with
1030 bit 7 as external, bits 6 & 5 unused, and the lower
1031 five bits as relocation type. Next 4 bytes are long addend. */
1032 /* Thanx and a tip of the hat to Michael Bloom, mb@ttidca.tti.com */
1037 tc_aout_fix_to_chars (where
, fixP
, segment_address_in_file
)
1040 relax_addressT segment_address_in_file
;
1044 know (fixP
->fx_r_type
< NO_RELOC
);
1045 know (fixP
->fx_addsy
!= NULL
);
1047 md_number_to_chars (where
,
1048 fixP
->fx_frag
->fr_address
+ fixP
->fx_where
- segment_address_in_file
,
1051 r_symbolnum
= (S_IS_DEFINED (fixP
->fx_addsy
)
1052 ? S_GET_TYPE (fixP
->fx_addsy
)
1053 : fixP
->fx_addsy
->sy_number
);
1055 where
[4] = (r_symbolnum
>> 16) & 0x0ff;
1056 where
[5] = (r_symbolnum
>> 8) & 0x0ff;
1057 where
[6] = r_symbolnum
& 0x0ff;
1058 where
[7] = (((!S_IS_DEFINED (fixP
->fx_addsy
)) << 7) & 0x80) | (0 & 0x60) | (fixP
->fx_r_type
& 0x1F);
1060 md_number_to_chars (&where
[8], fixP
->fx_addnumber
, 4);
1063 #endif /* OBJ_AOUT */
1066 md_parse_option (argP
, cntP
, vecP
)
1075 /* Default the values of symbols known that should be "predefined". We
1076 don't bother to predefine them unless you actually use one, since there
1077 are a lot of them. */
1080 md_undefined_symbol (name
)
1084 char testbuf
[5 + /*SLOP*/ 5];
1086 if (name
[0] == 'g' || name
[0] == 'G' || name
[0] == 'l' || name
[0] == 'L')
1088 /* Perhaps a global or local register name */
1089 if (name
[1] == 'r' || name
[1] == 'R')
1091 /* Parse the number, make sure it has no extra zeroes or trailing
1093 regnum
= atol (&name
[2]);
1096 sprintf (testbuf
, "%ld", regnum
);
1097 if (strcmp (testbuf
, &name
[2]) != 0)
1098 return 0; /* gr007 or lr7foo or whatever */
1100 /* We have a wiener! Define and return a new symbol for it. */
1101 if (name
[0] == 'l' || name
[0] == 'L')
1103 return (symbol_new (name
, SEG_REGISTER
, (valueT
) regnum
,
1104 &zero_address_frag
));
1111 /* Parse an operand that is machine-specific. */
1114 md_operand (expressionP
)
1115 expressionS
*expressionP
;
1118 if (input_line_pointer
[0] == '%' && input_line_pointer
[1] == '%')
1120 /* We have a numeric register expression. No biggy. */
1121 input_line_pointer
+= 2; /* Skip %% */
1122 (void) expression (expressionP
);
1123 if (expressionP
->X_op
!= O_constant
1124 || expressionP
->X_add_number
> 255)
1125 as_bad ("Invalid expression after %%%%\n");
1126 expressionP
->X_op
= O_register
;
1128 else if (input_line_pointer
[0] == '&')
1130 /* We are taking the 'address' of a register...this one is not
1131 in the manual, but it *is* in traps/fpsymbol.h! What they
1132 seem to want is the register number, as an absolute number. */
1133 input_line_pointer
++; /* Skip & */
1134 (void) expression (expressionP
);
1135 if (expressionP
->X_op
!= O_register
)
1136 as_bad ("Invalid register in & expression");
1138 expressionP
->X_op
= O_constant
;
1142 /* Round up a section size to the appropriate boundary. */
1144 md_section_align (segment
, size
)
1148 return size
; /* Byte alignment is fine */
1151 /* Exactly what point is a PC-relative offset relative TO?
1152 On the 29000, they're relative to the address of the instruction,
1153 which we have set up as the address of the fixup too. */
1155 md_pcrel_from (fixP
)
1158 return fixP
->fx_where
+ fixP
->fx_frag
->fr_address
;
1161 /* end of tc-a29k.c */