1 /* tc-alpha.c - Processor-specific code for the DEC Alpha AXP CPU.
2 Copyright (C) 1989, 93, 94, 95, 96, 97, 1998 Free Software Foundation, Inc.
3 Contributed by Carnegie Mellon University, 1993.
4 Written by Alessandro Forin, based on earlier gas-1.38 target CPU files.
5 Modified by Ken Raeburn for gas-2.x and ECOFF support.
6 Modified by Richard Henderson for ELF support.
7 Modified by Klaus K"ampf for EVAX (openVMS/Alpha) support.
9 This file is part of GAS, the GNU Assembler.
11 GAS is free software; you can redistribute it and/or modify
12 it under the terms of the GNU General Public License as published by
13 the Free Software Foundation; either version 2, or (at your option)
16 GAS is distributed in the hope that it will be useful,
17 but WITHOUT ANY WARRANTY; without even the implied warranty of
18 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 GNU General Public License for more details.
21 You should have received a copy of the GNU General Public License
22 along with GAS; see the file COPYING. If not, write to the Free
23 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
27 * Mach Operating System
28 * Copyright (c) 1993 Carnegie Mellon University
29 * All Rights Reserved.
31 * Permission to use, copy, modify and distribute this software and its
32 * documentation is hereby granted, provided that both the copyright
33 * notice and this permission notice appear in all copies of the
34 * software, derivative works or modified versions, and any portions
35 * thereof, and that both notices appear in supporting documentation.
37 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS
38 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
39 * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
41 * Carnegie Mellon requests users of this software to return to
43 * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
44 * School of Computer Science
45 * Carnegie Mellon University
46 * Pittsburgh PA 15213-3890
48 * any improvements or extensions that they make and grant Carnegie the
49 * rights to redistribute these changes.
56 #include "opcode/alpha.h"
59 #include "elf/alpha.h"
67 #define MAX_INSN_FIXUPS 2
68 #define MAX_INSN_ARGS 5
73 bfd_reloc_code_real_type reloc
;
80 struct alpha_fixup fixups
[MAX_INSN_FIXUPS
];
85 MACRO_EOA
= 1, MACRO_IR
, MACRO_PIR
, MACRO_CPIR
, MACRO_FPR
, MACRO_EXP
91 void (*emit
) PARAMS ((const expressionS
*, int, const PTR
));
93 enum alpha_macro_arg argsets
[16];
96 /* Two extra symbols we want to see in our input. This is a blatent
97 misuse of the expressionS.X_op field. */
99 #define O_pregister (O_max+1) /* O_register, but in parentheses */
100 #define O_cpregister (O_pregister+1) /* + a leading comma */
102 /* Macros for extracting the type and number of encoded register tokens */
104 #define is_ir_num(x) (((x) & 32) == 0)
105 #define is_fpr_num(x) (((x) & 32) != 0)
106 #define regno(x) ((x) & 31)
108 /* Something odd inherited from the old assembler */
110 #define note_gpreg(R) (alpha_gprmask |= (1 << (R)))
111 #define note_fpreg(R) (alpha_fprmask |= (1 << (R)))
113 /* Predicates for 16- and 32-bit ranges */
114 /* XXX: The non-shift version appears to trigger a compiler bug when
115 cross-assembling from x86 w/ gcc 2.7.2. */
118 #define range_signed_16(x) \
119 (((offsetT)(x) >> 15) == 0 || ((offsetT)(x) >> 15) == -1)
120 #define range_signed_32(x) \
121 (((offsetT)(x) >> 31) == 0 || ((offsetT)(x) >> 31) == -1)
123 #define range_signed_16(x) ((offsetT)(x) >= -(offsetT)0x8000 && \
124 (offsetT)(x) <= (offsetT)0x7FFF)
125 #define range_signed_32(x) ((offsetT)(x) >= -(offsetT)0x80000000 && \
126 (offsetT)(x) <= (offsetT)0x7FFFFFFF)
129 /* Macros for sign extending from 16- and 32-bits. */
130 /* XXX: The cast macros will work on all the systems that I care about,
131 but really a predicate should be found to use the non-cast forms. */
134 #define sign_extend_16(x) ((short)(x))
135 #define sign_extend_32(x) ((int)(x))
137 #define sign_extend_16(x) ((offsetT)(((x) & 0xFFFF) ^ 0x8000) - 0x8000)
138 #define sign_extend_32(x) ((offsetT)(((x) & 0xFFFFFFFF) \
139 ^ 0x80000000) - 0x80000000)
142 /* Macros to build tokens */
144 #define set_tok_reg(t, r) (memset(&(t), 0, sizeof(t)), \
145 (t).X_op = O_register, \
146 (t).X_add_number = (r))
147 #define set_tok_preg(t, r) (memset(&(t), 0, sizeof(t)), \
148 (t).X_op = O_pregister, \
149 (t).X_add_number = (r))
150 #define set_tok_cpreg(t, r) (memset(&(t), 0, sizeof(t)), \
151 (t).X_op = O_cpregister, \
152 (t).X_add_number = (r))
153 #define set_tok_freg(t, r) (memset(&(t), 0, sizeof(t)), \
154 (t).X_op = O_register, \
155 (t).X_add_number = (r)+32)
156 #define set_tok_sym(t, s, a) (memset(&(t), 0, sizeof(t)), \
157 (t).X_op = O_symbol, \
158 (t).X_add_symbol = (s), \
159 (t).X_add_number = (a))
160 #define set_tok_const(t, n) (memset(&(t), 0, sizeof(t)), \
161 (t).X_op = O_constant, \
162 (t).X_add_number = (n))
165 /* Prototypes for all local functions */
167 static int tokenize_arguments
PARAMS ((char *, expressionS
*, int));
168 static const struct alpha_opcode
*find_opcode_match
169 PARAMS ((const struct alpha_opcode
*, const expressionS
*, int *, int *));
170 static const struct alpha_macro
*find_macro_match
171 PARAMS ((const struct alpha_macro
*, const expressionS
*, int *));
172 static unsigned insert_operand
173 PARAMS ((unsigned, const struct alpha_operand
*, offsetT
, char *, unsigned));
174 static void assemble_insn
175 PARAMS ((const struct alpha_opcode
*, const expressionS
*, int,
176 struct alpha_insn
*));
177 static void emit_insn
PARAMS ((struct alpha_insn
*));
178 static void assemble_tokens_to_insn
179 PARAMS ((const char *, const expressionS
*, int, struct alpha_insn
*));
180 static void assemble_tokens
181 PARAMS ((const char *, const expressionS
*, int, int));
183 static int load_expression
184 PARAMS ((int, const expressionS
*, int *, expressionS
*));
186 static void emit_ldgp
PARAMS ((const expressionS
*, int, const PTR
));
187 static void emit_division
PARAMS ((const expressionS
*, int, const PTR
));
188 static void emit_lda
PARAMS ((const expressionS
*, int, const PTR
));
189 static void emit_ldah
PARAMS ((const expressionS
*, int, const PTR
));
190 static void emit_ir_load
PARAMS ((const expressionS
*, int, const PTR
));
191 static void emit_loadstore
PARAMS ((const expressionS
*, int, const PTR
));
192 static void emit_jsrjmp
PARAMS ((const expressionS
*, int, const PTR
));
193 static void emit_ldX
PARAMS ((const expressionS
*, int, const PTR
));
194 static void emit_ldXu
PARAMS ((const expressionS
*, int, const PTR
));
195 static void emit_uldX
PARAMS ((const expressionS
*, int, const PTR
));
196 static void emit_uldXu
PARAMS ((const expressionS
*, int, const PTR
));
197 static void emit_ldil
PARAMS ((const expressionS
*, int, const PTR
));
198 static void emit_stX
PARAMS ((const expressionS
*, int, const PTR
));
199 static void emit_ustX
PARAMS ((const expressionS
*, int, const PTR
));
200 static void emit_sextX
PARAMS ((const expressionS
*, int, const PTR
));
201 static void emit_retjcr
PARAMS ((const expressionS
*, int, const PTR
));
203 static void s_alpha_text
PARAMS ((int));
204 static void s_alpha_data
PARAMS ((int));
206 static void s_alpha_comm
PARAMS ((int));
207 static void s_alpha_rdata
PARAMS ((int));
210 static void s_alpha_sdata
PARAMS ((int));
213 static void s_alpha_section
PARAMS ((int));
214 static void s_alpha_ent
PARAMS ((int));
215 static void s_alpha_end
PARAMS ((int));
216 static void s_alpha_mask
PARAMS ((int));
217 static void s_alpha_frame
PARAMS ((int));
218 static void s_alpha_prologue
PARAMS ((int));
219 static void s_alpha_coff_wrapper
PARAMS ((int));
222 static void s_alpha_section
PARAMS ((int));
224 static void s_alpha_gprel32
PARAMS ((int));
225 static void s_alpha_float_cons
PARAMS ((int));
226 static void s_alpha_proc
PARAMS ((int));
227 static void s_alpha_set
PARAMS ((int));
228 static void s_alpha_base
PARAMS ((int));
229 static void s_alpha_align
PARAMS ((int));
230 static void s_alpha_stringer
PARAMS ((int));
231 static void s_alpha_space
PARAMS ((int));
233 static void create_literal_section
PARAMS ((const char *, segT
*, symbolS
**));
235 static void select_gp_value
PARAMS ((void));
237 static void alpha_align
PARAMS ((int, char *, symbolS
*, int));
240 /* Generic assembler global variables which must be defined by all
243 /* Characters which always start a comment. */
244 const char comment_chars
[] = "#";
246 /* Characters which start a comment at the beginning of a line. */
247 const char line_comment_chars
[] = "#";
249 /* Characters which may be used to separate multiple commands on a
251 const char line_separator_chars
[] = ";";
253 /* Characters which are used to indicate an exponent in a floating
255 const char EXP_CHARS
[] = "eE";
257 /* Characters which mean that a number is a floating point constant,
260 const char FLT_CHARS
[] = "dD";
262 /* XXX: Do all of these really get used on the alpha?? */
263 char FLT_CHARS
[] = "rRsSfFdDxXpP";
267 const char *md_shortopts
= "Fm:g+1h:HG:";
269 const char *md_shortopts
= "Fm:gG:";
272 struct option md_longopts
[] = {
273 #define OPTION_32ADDR (OPTION_MD_BASE)
274 { "32addr", no_argument
, NULL
, OPTION_32ADDR
},
275 #define OPTION_RELAX (OPTION_32ADDR+1)
276 { "relax", no_argument
, NULL
, OPTION_RELAX
},
278 #define OPTION_MDEBUG (OPTION_RELAX+1)
279 #define OPTION_NO_MDEBUG (OPTION_MDEBUG+1)
280 { "mdebug", no_argument
, NULL
, OPTION_MDEBUG
},
281 { "no-mdebug", no_argument
, NULL
, OPTION_NO_MDEBUG
},
283 { NULL
, no_argument
, NULL
, 0 }
286 size_t md_longopts_size
= sizeof(md_longopts
);
291 #define AXP_REG_R16 16
292 #define AXP_REG_R17 17
294 #define AXP_REG_T9 22
296 #define AXP_REG_T10 23
298 #define AXP_REG_T11 24
300 #define AXP_REG_T12 25
301 #define AXP_REG_AI 25
303 #define AXP_REG_FP 29
306 #define AXP_REG_GP AXP_REG_PV
307 #endif /* OBJ_EVAX */
309 /* The cpu for which we are generating code */
310 static unsigned alpha_target
= AXP_OPCODE_BASE
;
311 static const char *alpha_target_name
= "<all>";
313 /* The hash table of instruction opcodes */
314 static struct hash_control
*alpha_opcode_hash
;
316 /* The hash table of macro opcodes */
317 static struct hash_control
*alpha_macro_hash
;
320 /* The $gp relocation symbol */
321 static symbolS
*alpha_gp_symbol
;
323 /* XXX: what is this, and why is it exported? */
324 valueT alpha_gp_value
;
327 /* The current $gp register */
328 static int alpha_gp_register
= AXP_REG_GP
;
330 /* A table of the register symbols */
331 static symbolS
*alpha_register_table
[64];
333 /* Constant sections, or sections of constants */
335 static segT alpha_lita_section
;
336 static segT alpha_lit4_section
;
339 static segT alpha_link_section
;
340 static segT alpha_ctors_section
;
341 static segT alpha_dtors_section
;
343 static segT alpha_lit8_section
;
345 /* Symbols referring to said sections. */
347 static symbolS
*alpha_lita_symbol
;
348 static symbolS
*alpha_lit4_symbol
;
351 static symbolS
*alpha_link_symbol
;
352 static symbolS
*alpha_ctors_symbol
;
353 static symbolS
*alpha_dtors_symbol
;
355 static symbolS
*alpha_lit8_symbol
;
357 /* Literal for .litX+0x8000 within .lita */
359 static offsetT alpha_lit4_literal
;
360 static offsetT alpha_lit8_literal
;
363 /* The active .ent symbol. */
365 static symbolS
*alpha_cur_ent_sym
;
368 /* Is the assembler not allowed to use $at? */
369 static int alpha_noat_on
= 0;
371 /* Are macros enabled? */
372 static int alpha_macros_on
= 1;
374 /* Are floats disabled? */
375 static int alpha_nofloats_on
= 0;
377 /* Are addresses 32 bit? */
378 static int alpha_addr32_on
= 0;
380 /* Symbol labelling the current insn. When the Alpha gas sees
383 and the section happens to not be on an eight byte boundary, it
384 will align both the symbol and the .quad to an eight byte boundary. */
385 static symbolS
*alpha_insn_label
;
387 /* Whether we should automatically align data generation pseudo-ops.
388 .align 0 will turn this off. */
389 static int alpha_auto_align_on
= 1;
391 /* The known current alignment of the current section. */
392 static int alpha_current_align
;
394 /* These are exported to ECOFF code. */
395 unsigned long alpha_gprmask
, alpha_fprmask
;
397 /* Whether the debugging option was seen. */
398 static int alpha_debug
;
401 /* Whether we are emitting an mdebug section. */
402 int alpha_flag_mdebug
= 1;
405 /* Don't fully resolve relocations, allowing code movement in the linker. */
406 static int alpha_flag_relax
;
408 /* What value to give to bfd_set_gp_size. */
409 static int g_switch_value
= 8;
412 /* Collect information about current procedure here. */
414 symbolS
*symbol
; /* proc pdesc symbol */
416 int framereg
; /* register for frame pointer */
417 int framesize
; /* size of frame */
427 static int alpha_flag_hash_long_names
= 0; /* -+ */
428 static int alpha_flag_show_after_trunc
= 0; /* -H */
430 /* If the -+ switch is given, then a hash is appended to any name that is
431 * longer than 64 characters, else longer symbol names are truncated.
436 /* A table of CPU names and opcode sets. */
438 static const struct cpu_type
444 /* Ad hoc convention: cpu number gets palcode, process code doesn't.
445 This supports usage under DU 4.0b that does ".arch ev4", and
446 usage in MILO that does -m21064. Probably something more
447 specific like -m21064-pal should be used, but oh well. */
449 { "21064", AXP_OPCODE_BASE
|AXP_OPCODE_EV4
},
450 { "21064a", AXP_OPCODE_BASE
|AXP_OPCODE_EV4
},
451 { "21066", AXP_OPCODE_BASE
|AXP_OPCODE_EV4
},
452 { "21068", AXP_OPCODE_BASE
|AXP_OPCODE_EV4
},
453 { "21164", AXP_OPCODE_BASE
|AXP_OPCODE_EV5
},
454 /* Do we have CIX extension here? */
455 { "21164a", AXP_OPCODE_BASE
|AXP_OPCODE_EV5
|AXP_OPCODE_BWX
},
456 /* Still same PALcodes? */
457 { "21164pc", (AXP_OPCODE_BASE
|AXP_OPCODE_EV5
|AXP_OPCODE_BWX
459 /* All new PALcodes? Extras? */
460 { "21264", (AXP_OPCODE_BASE
|AXP_OPCODE_BWX
461 |AXP_OPCODE_CIX
|AXP_OPCODE_MAX
) },
463 { "ev4", AXP_OPCODE_BASE
},
464 { "ev45", AXP_OPCODE_BASE
},
465 { "lca45", AXP_OPCODE_BASE
},
466 { "ev5", AXP_OPCODE_BASE
},
467 { "ev56", AXP_OPCODE_BASE
|AXP_OPCODE_BWX
},
468 { "pca56", AXP_OPCODE_BASE
|AXP_OPCODE_BWX
|AXP_OPCODE_MAX
},
469 { "ev6", AXP_OPCODE_BASE
|AXP_OPCODE_BWX
|AXP_OPCODE_CIX
|AXP_OPCODE_MAX
},
471 { "all", AXP_OPCODE_BASE
},
475 /* The macro table */
477 static const struct alpha_macro alpha_macros
[] = {
478 /* Load/Store macros */
479 { "lda", emit_lda
, NULL
,
480 { MACRO_IR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
481 MACRO_IR
, MACRO_EXP
, MACRO_EOA
} },
482 { "ldah", emit_ldah
, NULL
,
483 { MACRO_IR
, MACRO_EXP
, MACRO_EOA
} },
485 { "ldl", emit_ir_load
, "ldl",
486 { MACRO_IR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
487 MACRO_IR
, MACRO_EXP
, MACRO_EOA
} },
488 { "ldl_l", emit_ir_load
, "ldl_l",
489 { MACRO_IR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
490 MACRO_IR
, MACRO_EXP
, MACRO_EOA
} },
491 { "ldq", emit_ir_load
, "ldq",
492 { MACRO_IR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
493 MACRO_IR
, MACRO_EXP
, MACRO_EOA
} },
494 { "ldq_l", emit_ir_load
, "ldq_l",
495 { MACRO_IR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
496 MACRO_IR
, MACRO_EXP
, MACRO_EOA
} },
497 { "ldq_u", emit_ir_load
, "ldq_u",
498 { MACRO_IR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
499 MACRO_IR
, MACRO_EXP
, MACRO_EOA
} },
500 { "ldf", emit_loadstore
, "ldf",
501 { MACRO_FPR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
502 MACRO_FPR
, MACRO_EXP
, MACRO_EOA
} },
503 { "ldg", emit_loadstore
, "ldg",
504 { MACRO_FPR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
505 MACRO_FPR
, MACRO_EXP
, MACRO_EOA
} },
506 { "lds", emit_loadstore
, "lds",
507 { MACRO_FPR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
508 MACRO_FPR
, MACRO_EXP
, MACRO_EOA
} },
509 { "ldt", emit_loadstore
, "ldt",
510 { MACRO_FPR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
511 MACRO_FPR
, MACRO_EXP
, MACRO_EOA
} },
513 { "ldb", emit_ldX
, (PTR
)0,
514 { MACRO_IR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
515 MACRO_IR
, MACRO_EXP
, MACRO_EOA
} },
516 { "ldbu", emit_ldXu
, (PTR
)0,
517 { MACRO_IR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
518 MACRO_IR
, MACRO_EXP
, MACRO_EOA
} },
519 { "ldw", emit_ldX
, (PTR
)1,
520 { MACRO_IR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
521 MACRO_IR
, MACRO_EXP
, MACRO_EOA
} },
522 { "ldwu", emit_ldXu
, (PTR
)1,
523 { MACRO_IR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
524 MACRO_IR
, MACRO_EXP
, MACRO_EOA
} },
526 { "uldw", emit_uldX
, (PTR
)1,
527 { MACRO_IR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
528 MACRO_IR
, MACRO_EXP
, MACRO_EOA
} },
529 { "uldwu", emit_uldXu
, (PTR
)1,
530 { MACRO_IR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
531 MACRO_IR
, MACRO_EXP
, MACRO_EOA
} },
532 { "uldl", emit_uldX
, (PTR
)2,
533 { MACRO_IR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
534 MACRO_IR
, MACRO_EXP
, MACRO_EOA
} },
535 { "uldlu", emit_uldXu
, (PTR
)2,
536 { MACRO_IR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
537 MACRO_IR
, MACRO_EXP
, MACRO_EOA
} },
538 { "uldq", emit_uldXu
, (PTR
)3,
539 { MACRO_IR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
540 MACRO_IR
, MACRO_EXP
, MACRO_EOA
} },
542 { "ldgp", emit_ldgp
, NULL
,
543 { MACRO_IR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
} },
545 { "ldi", emit_lda
, NULL
,
546 { MACRO_IR
, MACRO_EXP
, MACRO_EOA
} },
547 { "ldil", emit_ldil
, NULL
,
548 { MACRO_IR
, MACRO_EXP
, MACRO_EOA
} },
549 { "ldiq", emit_lda
, NULL
,
550 { MACRO_IR
, MACRO_EXP
, MACRO_EOA
} },
552 { "ldif" emit_ldiq
, NULL
,
553 { MACRO_FPR
, MACRO_EXP
, MACRO_EOA
} },
554 { "ldid" emit_ldiq
, NULL
,
555 { MACRO_FPR
, MACRO_EXP
, MACRO_EOA
} },
556 { "ldig" emit_ldiq
, NULL
,
557 { MACRO_FPR
, MACRO_EXP
, MACRO_EOA
} },
558 { "ldis" emit_ldiq
, NULL
,
559 { MACRO_FPR
, MACRO_EXP
, MACRO_EOA
} },
560 { "ldit" emit_ldiq
, NULL
,
561 { MACRO_FPR
, MACRO_EXP
, MACRO_EOA
} },
564 { "stl", emit_loadstore
, "stl",
565 { MACRO_IR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
566 MACRO_IR
, MACRO_EXP
, MACRO_EOA
} },
567 { "stl_c", emit_loadstore
, "stl_c",
568 { MACRO_IR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
569 MACRO_IR
, MACRO_EXP
, MACRO_EOA
} },
570 { "stq", emit_loadstore
, "stq",
571 { MACRO_IR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
572 MACRO_IR
, MACRO_EXP
, MACRO_EOA
} },
573 { "stq_c", emit_loadstore
, "stq_c",
574 { MACRO_IR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
575 MACRO_IR
, MACRO_EXP
, MACRO_EOA
} },
576 { "stq_u", emit_loadstore
, "stq_u",
577 { MACRO_IR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
578 MACRO_IR
, MACRO_EXP
, MACRO_EOA
} },
579 { "stf", emit_loadstore
, "stf",
580 { MACRO_FPR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
581 MACRO_FPR
, MACRO_EXP
, MACRO_EOA
} },
582 { "stg", emit_loadstore
, "stg",
583 { MACRO_FPR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
584 MACRO_FPR
, MACRO_EXP
, MACRO_EOA
} },
585 { "sts", emit_loadstore
, "sts",
586 { MACRO_FPR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
587 MACRO_FPR
, MACRO_EXP
, MACRO_EOA
} },
588 { "stt", emit_loadstore
, "stt",
589 { MACRO_FPR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
590 MACRO_FPR
, MACRO_EXP
, MACRO_EOA
} },
592 { "stb", emit_stX
, (PTR
)0,
593 { MACRO_IR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
594 MACRO_IR
, MACRO_EXP
, MACRO_EOA
} },
595 { "stw", emit_stX
, (PTR
)1,
596 { MACRO_IR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
597 MACRO_IR
, MACRO_EXP
, MACRO_EOA
} },
598 { "ustw", emit_ustX
, (PTR
)1,
599 { MACRO_IR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
600 MACRO_IR
, MACRO_EXP
, MACRO_EOA
} },
601 { "ustl", emit_ustX
, (PTR
)2,
602 { MACRO_IR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
603 MACRO_IR
, MACRO_EXP
, MACRO_EOA
} },
604 { "ustq", emit_ustX
, (PTR
)3,
605 { MACRO_IR
, MACRO_EXP
, MACRO_PIR
, MACRO_EOA
,
606 MACRO_IR
, MACRO_EXP
, MACRO_EOA
} },
608 /* Arithmetic macros */
610 { "absl" emit_absl
, 1, { IR
} },
611 { "absl" emit_absl
, 2, { IR
, IR
} },
612 { "absl" emit_absl
, 2, { EXP
, IR
} },
613 { "absq" emit_absq
, 1, { IR
} },
614 { "absq" emit_absq
, 2, { IR
, IR
} },
615 { "absq" emit_absq
, 2, { EXP
, IR
} },
618 { "sextb", emit_sextX
, (PTR
)0,
619 { MACRO_IR
, MACRO_IR
, MACRO_EOA
,
621 /* MACRO_EXP, MACRO_IR, MACRO_EOA */ } },
622 { "sextw", emit_sextX
, (PTR
)1,
623 { MACRO_IR
, MACRO_IR
, MACRO_EOA
,
625 /* MACRO_EXP, MACRO_IR, MACRO_EOA */ } },
627 { "divl", emit_division
, "__divl",
628 { MACRO_IR
, MACRO_IR
, MACRO_IR
, MACRO_EOA
,
629 MACRO_IR
, MACRO_IR
, MACRO_EOA
,
630 /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
631 MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
632 { "divlu", emit_division
, "__divlu",
633 { MACRO_IR
, MACRO_IR
, MACRO_IR
, MACRO_EOA
,
634 MACRO_IR
, MACRO_IR
, MACRO_EOA
,
635 /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
636 MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
637 { "divq", emit_division
, "__divq",
638 { MACRO_IR
, MACRO_IR
, MACRO_IR
, MACRO_EOA
,
639 MACRO_IR
, MACRO_IR
, MACRO_EOA
,
640 /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
641 MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
642 { "divqu", emit_division
, "__divqu",
643 { MACRO_IR
, MACRO_IR
, MACRO_IR
, MACRO_EOA
,
644 MACRO_IR
, MACRO_IR
, MACRO_EOA
,
645 /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
646 MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
647 { "reml", emit_division
, "__reml",
648 { MACRO_IR
, MACRO_IR
, MACRO_IR
, MACRO_EOA
,
649 MACRO_IR
, MACRO_IR
, MACRO_EOA
,
650 /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
651 MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
652 { "remlu", emit_division
, "__remlu",
653 { MACRO_IR
, MACRO_IR
, MACRO_IR
, MACRO_EOA
,
654 MACRO_IR
, MACRO_IR
, MACRO_EOA
,
655 /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
656 MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
657 { "remq", emit_division
, "__remq",
658 { MACRO_IR
, MACRO_IR
, MACRO_IR
, MACRO_EOA
,
659 MACRO_IR
, MACRO_IR
, MACRO_EOA
,
660 /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
661 MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
662 { "remqu", emit_division
, "__remqu",
663 { MACRO_IR
, MACRO_IR
, MACRO_IR
, MACRO_EOA
,
664 MACRO_IR
, MACRO_IR
, MACRO_EOA
,
665 /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
666 MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
668 { "jsr", emit_jsrjmp
, "jsr",
669 { MACRO_PIR
, MACRO_EXP
, MACRO_EOA
,
670 MACRO_PIR
, MACRO_EOA
,
671 MACRO_IR
, MACRO_EXP
, MACRO_EOA
,
672 MACRO_EXP
, MACRO_EOA
} },
673 { "jmp", emit_jsrjmp
, "jmp",
674 { MACRO_PIR
, MACRO_EXP
, MACRO_EOA
,
675 MACRO_PIR
, MACRO_EOA
,
676 MACRO_IR
, MACRO_EXP
, MACRO_EOA
,
677 MACRO_EXP
, MACRO_EOA
} },
678 { "ret", emit_retjcr
, "ret",
679 { MACRO_IR
, MACRO_EXP
, MACRO_EOA
,
681 MACRO_PIR
, MACRO_EXP
, MACRO_EOA
,
682 MACRO_PIR
, MACRO_EOA
,
683 MACRO_EXP
, MACRO_EOA
,
685 { "jcr", emit_retjcr
, "jcr",
686 { MACRO_IR
, MACRO_EXP
, MACRO_EOA
,
688 MACRO_PIR
, MACRO_EXP
, MACRO_EOA
,
689 MACRO_PIR
, MACRO_EOA
,
690 MACRO_EXP
, MACRO_EOA
,
692 { "jsr_coroutine", emit_retjcr
, "jcr",
693 { MACRO_IR
, MACRO_EXP
, MACRO_EOA
,
695 MACRO_PIR
, MACRO_EXP
, MACRO_EOA
,
696 MACRO_PIR
, MACRO_EOA
,
697 MACRO_EXP
, MACRO_EOA
,
701 static const int alpha_num_macros
702 = sizeof(alpha_macros
) / sizeof(*alpha_macros
);
704 /* Public interface functions */
706 /* This function is called once, at assembler startup time. It sets
707 up all the tables, etc. that the MD part of the assembler will
708 need, that can be determined before arguments are parsed. */
715 /* Create the opcode hash table */
717 alpha_opcode_hash
= hash_new ();
718 for (i
= 0; i
< alpha_num_opcodes
; )
720 const char *name
, *retval
, *slash
;
722 name
= alpha_opcodes
[i
].name
;
723 retval
= hash_insert (alpha_opcode_hash
, name
, (PTR
)&alpha_opcodes
[i
]);
725 as_fatal (_("internal error: can't hash opcode `%s': %s"), name
, retval
);
727 /* Some opcodes include modifiers of various sorts with a "/mod"
728 syntax, like the architecture manual suggests. However, for
729 use with gcc at least, we also need access to those same opcodes
732 if ((slash
= strchr (name
, '/')) != NULL
)
734 char *p
= xmalloc (strlen (name
));
735 memcpy (p
, name
, slash
- name
);
736 strcpy (p
+ (slash
- name
), slash
+ 1);
738 (void)hash_insert(alpha_opcode_hash
, p
, (PTR
)&alpha_opcodes
[i
]);
739 /* Ignore failures -- the opcode table does duplicate some
740 variants in different forms, like "hw_stq" and "hw_st/q". */
743 while (++i
< alpha_num_opcodes
744 && (alpha_opcodes
[i
].name
== name
745 || !strcmp (alpha_opcodes
[i
].name
, name
)))
749 /* Create the macro hash table */
751 alpha_macro_hash
= hash_new ();
752 for (i
= 0; i
< alpha_num_macros
; )
754 const char *name
, *retval
;
756 name
= alpha_macros
[i
].name
;
757 retval
= hash_insert (alpha_macro_hash
, name
, (PTR
)&alpha_macros
[i
]);
759 as_fatal (_("internal error: can't hash macro `%s': %s"), name
, retval
);
761 while (++i
< alpha_num_macros
762 && (alpha_macros
[i
].name
== name
763 || !strcmp (alpha_macros
[i
].name
, name
)))
767 /* Construct symbols for each of the registers */
769 for (i
= 0; i
< 32; ++i
)
772 sprintf(name
, "$%d", i
);
773 alpha_register_table
[i
] = symbol_create(name
, reg_section
, i
,
779 sprintf(name
, "$f%d", i
-32);
780 alpha_register_table
[i
] = symbol_create(name
, reg_section
, i
,
784 /* Create the special symbols and sections we'll be using */
786 /* So .sbss will get used for tiny objects. */
787 bfd_set_gp_size (stdoutput
, g_switch_value
);
790 create_literal_section (".lita", &alpha_lita_section
, &alpha_lita_symbol
);
792 /* For handling the GP, create a symbol that won't be output in the
793 symbol table. We'll edit it out of relocs later. */
794 alpha_gp_symbol
= symbol_create ("<GP value>", alpha_lita_section
, 0x8000,
799 create_literal_section (".link", &alpha_link_section
, &alpha_link_symbol
);
805 segT sec
= subseg_new(".mdebug", (subsegT
)0);
806 bfd_set_section_flags(stdoutput
, sec
, SEC_HAS_CONTENTS
|SEC_READONLY
);
807 bfd_set_section_alignment(stdoutput
, sec
, 3);
811 subseg_set(text_section
, 0);
814 /* The public interface to the instruction assembler. */
820 char opname
[32]; /* current maximum is 13 */
821 expressionS tok
[MAX_INSN_ARGS
];
822 int ntok
, opnamelen
, trunclen
;
824 /* split off the opcode */
825 opnamelen
= strspn (str
, "abcdefghijklmnopqrstuvwxyz_/48");
826 trunclen
= (opnamelen
< sizeof (opname
) - 1
828 : sizeof (opname
) - 1);
829 memcpy (opname
, str
, trunclen
);
830 opname
[trunclen
] = '\0';
832 /* tokenize the rest of the line */
833 if ((ntok
= tokenize_arguments (str
+ opnamelen
, tok
, MAX_INSN_ARGS
)) < 0)
835 as_bad (_("syntax error"));
840 assemble_tokens (opname
, tok
, ntok
, alpha_macros_on
);
843 /* Round up a section's size to the appropriate boundary. */
846 md_section_align (seg
, size
)
850 int align
= bfd_get_section_alignment(stdoutput
, seg
);
851 valueT mask
= ((valueT
)1 << align
) - 1;
853 return (size
+ mask
) & ~mask
;
856 /* Turn a string in input_line_pointer into a floating point constant
857 of type type, and store the appropriate bytes in *litP. The number
858 of LITTLENUMS emitted is stored in *sizeP. An error message is
859 returned, or NULL on OK. */
861 /* Equal to MAX_PRECISION in atof-ieee.c */
862 #define MAX_LITTLENUMS 6
864 extern char *vax_md_atof
PARAMS ((int, char *, int *));
867 md_atof (type
, litP
, sizeP
)
873 LITTLENUM_TYPE words
[MAX_LITTLENUMS
];
874 LITTLENUM_TYPE
*wordP
;
881 /* VAX md_atof doesn't like "G" for some reason. */
885 return vax_md_atof (type
, litP
, sizeP
);
908 return _("Bad call to MD_ATOF()");
910 t
= atof_ieee (input_line_pointer
, type
, words
);
912 input_line_pointer
= t
;
913 *sizeP
= prec
* sizeof (LITTLENUM_TYPE
);
915 for (wordP
= words
+ prec
- 1; prec
--;)
917 md_number_to_chars (litP
, (long) (*wordP
--), sizeof (LITTLENUM_TYPE
));
918 litP
+= sizeof (LITTLENUM_TYPE
);
924 /* Take care of the target-specific command-line options. */
927 md_parse_option (c
, arg
)
934 alpha_nofloats_on
= 1;
946 g_switch_value
= atoi(arg
);
951 const struct cpu_type
*p
;
952 for (p
= cpu_types
; p
->name
; ++p
)
953 if (strcmp(arg
, p
->name
) == 0)
955 alpha_target_name
= p
->name
, alpha_target
= p
->flags
;
958 as_warn(_("Unknown CPU identifier `%s'"), arg
);
964 case '+': /* For g++. Hash any name > 63 chars long. */
965 alpha_flag_hash_long_names
= 1;
968 case 'H': /* Show new symbol after hash truncation */
969 alpha_flag_show_after_trunc
= 1;
972 case 'h': /* for gnu-c/vax compatibility. */
977 alpha_flag_relax
= 1;
982 alpha_flag_mdebug
= 1;
984 case OPTION_NO_MDEBUG
:
985 alpha_flag_mdebug
= 0;
996 /* Print a description of the command-line options that we accept. */
999 md_show_usage (stream
)
1004 -32addr treat addresses as 32-bit values\n\
1005 -F lack floating point instructions support\n\
1006 -m21064 | -m21066 | -m21164 | -m21164a\n\
1007 -mev4 | -mev45 | -mev5 | -mev56 | -mall\n\
1008 specify variant of Alpha architecture\n"),
1013 -+ hash encode (don't truncate) names longer than 64 characters\n\
1014 -H show new symbol after hash truncation\n"),
1019 /* Decide from what point a pc-relative relocation is relative to,
1020 relative to the pc-relative fixup. Er, relatively speaking. */
1023 md_pcrel_from (fixP
)
1026 valueT addr
= fixP
->fx_where
+ fixP
->fx_frag
->fr_address
;
1027 switch (fixP
->fx_r_type
)
1029 case BFD_RELOC_ALPHA_GPDISP
:
1030 case BFD_RELOC_ALPHA_GPDISP_HI16
:
1031 case BFD_RELOC_ALPHA_GPDISP_LO16
:
1034 return fixP
->fx_size
+ addr
;
1038 /* Attempt to simplify or even eliminate a fixup. The return value is
1039 ignored; perhaps it was once meaningful, but now it is historical.
1040 To indicate that a fixup has been eliminated, set fixP->fx_done.
1042 For ELF, here it is that we transform the GPDISP_HI16 reloc we used
1043 internally into the GPDISP reloc used externally. We had to do
1044 this so that we'd have the GPDISP_LO16 reloc as a tag to compute
1045 the distance to the "lda" instruction for setting the addend to
1049 md_apply_fix (fixP
, valueP
)
1053 char * const fixpos
= fixP
->fx_frag
->fr_literal
+ fixP
->fx_where
;
1054 valueT value
= *valueP
;
1055 unsigned image
, size
;
1057 switch (fixP
->fx_r_type
)
1059 /* The GPDISP relocations are processed internally with a symbol
1060 referring to the current function; we need to drop in a value
1061 which, when added to the address of the start of the function,
1062 gives the desired GP. */
1063 case BFD_RELOC_ALPHA_GPDISP_HI16
:
1065 fixS
*next
= fixP
->fx_next
;
1066 assert (next
->fx_r_type
== BFD_RELOC_ALPHA_GPDISP_LO16
);
1068 fixP
->fx_offset
= (next
->fx_frag
->fr_address
+ next
->fx_where
1069 - fixP
->fx_frag
->fr_address
- fixP
->fx_where
);
1071 value
= (value
- sign_extend_16 (value
)) >> 16;
1074 fixP
->fx_r_type
= BFD_RELOC_ALPHA_GPDISP
;
1078 case BFD_RELOC_ALPHA_GPDISP_LO16
:
1079 value
= sign_extend_16 (value
);
1080 fixP
->fx_offset
= 0;
1086 fixP
->fx_addsy
= section_symbol (absolute_section
);
1087 md_number_to_chars (fixpos
, value
, 2);
1092 fixP
->fx_r_type
= BFD_RELOC_16_PCREL
;
1097 fixP
->fx_r_type
= BFD_RELOC_32_PCREL
;
1102 fixP
->fx_r_type
= BFD_RELOC_64_PCREL
;
1105 if (fixP
->fx_pcrel
== 0 && fixP
->fx_addsy
== 0)
1107 md_number_to_chars (fixpos
, value
, size
);
1113 case BFD_RELOC_GPREL32
:
1114 assert (fixP
->fx_subsy
== alpha_gp_symbol
);
1116 /* FIXME: inherited this obliviousness of `value' -- why? */
1117 md_number_to_chars (fixpos
, -alpha_gp_value
, 4);
1121 case BFD_RELOC_GPREL32
:
1125 case BFD_RELOC_23_PCREL_S2
:
1126 if (fixP
->fx_pcrel
== 0 && fixP
->fx_addsy
== 0)
1128 image
= bfd_getl32(fixpos
);
1129 image
= (image
& ~0x1FFFFF) | ((value
>> 2) & 0x1FFFFF);
1134 case BFD_RELOC_ALPHA_HINT
:
1135 if (fixP
->fx_pcrel
== 0 && fixP
->fx_addsy
== 0)
1137 image
= bfd_getl32(fixpos
);
1138 image
= (image
& ~0x3FFF) | ((value
>> 2) & 0x3FFF);
1144 case BFD_RELOC_ALPHA_LITERAL
:
1145 md_number_to_chars (fixpos
, value
, 2);
1148 case BFD_RELOC_ALPHA_LITUSE
:
1152 case BFD_RELOC_ALPHA_ELF_LITERAL
:
1153 case BFD_RELOC_ALPHA_LITUSE
:
1157 case BFD_RELOC_ALPHA_LINKAGE
:
1158 case BFD_RELOC_ALPHA_CODEADDR
:
1164 const struct alpha_operand
*operand
;
1166 if ((int)fixP
->fx_r_type
>= 0)
1167 as_fatal (_("unhandled relocation type %s"),
1168 bfd_get_reloc_code_name (fixP
->fx_r_type
));
1170 assert (-(int)fixP
->fx_r_type
< alpha_num_operands
);
1171 operand
= &alpha_operands
[-(int)fixP
->fx_r_type
];
1173 /* The rest of these fixups only exist internally during symbol
1174 resolution and have no representation in the object file.
1175 Therefore they must be completely resolved as constants. */
1177 if (fixP
->fx_addsy
!= 0
1178 && fixP
->fx_addsy
->bsym
->section
!= absolute_section
)
1179 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
1180 _("non-absolute expression in constant field"));
1182 image
= bfd_getl32(fixpos
);
1183 image
= insert_operand(image
, operand
, (offsetT
)value
,
1184 fixP
->fx_file
, fixP
->fx_line
);
1189 if (fixP
->fx_addsy
!= 0 || fixP
->fx_pcrel
!= 0)
1193 as_warn_where(fixP
->fx_file
, fixP
->fx_line
,
1194 _("type %d reloc done?\n"), (int)fixP
->fx_r_type
);
1199 md_number_to_chars(fixpos
, image
, 4);
1207 * Look for a register name in the given symbol.
1211 md_undefined_symbol(name
)
1216 int is_float
= 0, num
;
1221 if (name
[1] == 'p' && name
[2] == '\0')
1222 return alpha_register_table
[AXP_REG_FP
];
1227 if (!isdigit(*++name
))
1231 case '0': case '1': case '2': case '3': case '4':
1232 case '5': case '6': case '7': case '8': case '9':
1233 if (name
[1] == '\0')
1234 num
= name
[0] - '0';
1235 else if (name
[0] != '0' && isdigit(name
[1]) && name
[2] == '\0')
1237 num
= (name
[0] - '0') * 10 + name
[1] - '0';
1244 if (!alpha_noat_on
&& num
== AXP_REG_AT
)
1245 as_warn(_("Used $at without \".set noat\""));
1246 return alpha_register_table
[num
+ is_float
];
1249 if (name
[1] == 't' && name
[2] == '\0')
1252 as_warn(_("Used $at without \".set noat\""));
1253 return alpha_register_table
[AXP_REG_AT
];
1258 if (name
[1] == 'p' && name
[2] == '\0')
1259 return alpha_register_table
[alpha_gp_register
];
1263 if (name
[1] == 'p' && name
[2] == '\0')
1264 return alpha_register_table
[AXP_REG_SP
];
1272 /* @@@ Magic ECOFF bits. */
1275 alpha_frob_ecoff_data ()
1278 /* $zero and $f31 are read-only */
1279 alpha_gprmask
&= ~1;
1280 alpha_fprmask
&= ~1;
1284 /* Hook to remember a recently defined label so that the auto-align
1285 code can adjust the symbol after we know what alignment will be
1289 alpha_define_label (sym
)
1292 alpha_insn_label
= sym
;
1295 /* Return true if we must always emit a reloc for a type and false if
1296 there is some hope of resolving it a assembly time. */
1299 alpha_force_relocation (f
)
1302 if (alpha_flag_relax
)
1305 switch (f
->fx_r_type
)
1307 case BFD_RELOC_ALPHA_GPDISP_HI16
:
1308 case BFD_RELOC_ALPHA_GPDISP_LO16
:
1309 case BFD_RELOC_ALPHA_GPDISP
:
1311 case BFD_RELOC_ALPHA_LITERAL
:
1314 case BFD_RELOC_ALPHA_ELF_LITERAL
:
1316 case BFD_RELOC_ALPHA_LITUSE
:
1317 case BFD_RELOC_GPREL32
:
1319 case BFD_RELOC_ALPHA_LINKAGE
:
1320 case BFD_RELOC_ALPHA_CODEADDR
:
1324 case BFD_RELOC_23_PCREL_S2
:
1327 case BFD_RELOC_ALPHA_HINT
:
1331 assert((int)f
->fx_r_type
< 0 && -(int)f
->fx_r_type
< alpha_num_operands
);
1336 /* Return true if we can partially resolve a relocation now. */
1339 alpha_fix_adjustable (f
)
1343 /* Prevent all adjustments to global symbols */
1344 if (S_IS_EXTERN (f
->fx_addsy
) || S_IS_WEAK (f
->fx_addsy
))
1348 /* Are there any relocation types for which we must generate a reloc
1349 but we can adjust the values contained within it? */
1350 switch (f
->fx_r_type
)
1352 case BFD_RELOC_ALPHA_GPDISP_HI16
:
1353 case BFD_RELOC_ALPHA_GPDISP_LO16
:
1354 case BFD_RELOC_ALPHA_GPDISP
:
1358 case BFD_RELOC_ALPHA_LITERAL
:
1361 case BFD_RELOC_ALPHA_ELF_LITERAL
:
1364 case BFD_RELOC_ALPHA_LINKAGE
:
1365 case BFD_RELOC_ALPHA_CODEADDR
:
1369 case BFD_RELOC_ALPHA_LITUSE
:
1372 case BFD_RELOC_GPREL32
:
1373 case BFD_RELOC_23_PCREL_S2
:
1376 case BFD_RELOC_ALPHA_HINT
:
1380 assert ((int)f
->fx_r_type
< 0
1381 && - (int)f
->fx_r_type
< alpha_num_operands
);
1387 /* Generate the BFD reloc to be stuck in the object file from the
1388 fixup used internally in the assembler. */
1391 tc_gen_reloc (sec
, fixp
)
1397 reloc
= (arelent
*) xmalloc (sizeof (arelent
));
1398 reloc
->sym_ptr_ptr
= &fixp
->fx_addsy
->bsym
;
1399 reloc
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
1401 /* Make sure none of our internal relocations make it this far.
1402 They'd better have been fully resolved by this point. */
1403 assert ((int)fixp
->fx_r_type
> 0);
1405 reloc
->howto
= bfd_reloc_type_lookup (stdoutput
, fixp
->fx_r_type
);
1406 if (reloc
->howto
== NULL
)
1408 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
1409 _("cannot represent `%s' relocation in object file"),
1410 bfd_get_reloc_code_name (fixp
->fx_r_type
));
1414 if (!fixp
->fx_pcrel
!= !reloc
->howto
->pc_relative
)
1416 as_fatal (_("internal error? cannot generate `%s' relocation"),
1417 bfd_get_reloc_code_name (fixp
->fx_r_type
));
1419 assert (!fixp
->fx_pcrel
== !reloc
->howto
->pc_relative
);
1422 if (fixp
->fx_r_type
== BFD_RELOC_ALPHA_LITERAL
)
1424 /* fake out bfd_perform_relocation. sigh */
1425 reloc
->addend
= -alpha_gp_value
;
1430 reloc
->addend
= fixp
->fx_offset
;
1433 * Ohhh, this is ugly. The problem is that if this is a local global
1434 * symbol, the relocation will entirely be performed at link time, not
1435 * at assembly time. bfd_perform_reloc doesn't know about this sort
1436 * of thing, and as a result we need to fake it out here.
1438 if (S_IS_EXTERN (fixp
->fx_addsy
) && !S_IS_COMMON(fixp
->fx_addsy
))
1439 reloc
->addend
-= fixp
->fx_addsy
->bsym
->value
;
1446 /* Parse a register name off of the input_line and return a register
1447 number. Gets md_undefined_symbol above to do the register name
1450 Only called as a part of processing the ECOFF .frame directive. */
1453 tc_get_register (frame
)
1456 int framereg
= AXP_REG_SP
;
1459 if (*input_line_pointer
== '$')
1461 char *s
= input_line_pointer
;
1462 char c
= get_symbol_end ();
1463 symbolS
*sym
= md_undefined_symbol (s
);
1465 *strchr(s
, '\0') = c
;
1466 if (sym
&& (framereg
= S_GET_VALUE (sym
)) <= 31)
1469 as_warn (_("frame reg expected, using $%d."), framereg
);
1472 note_gpreg (framereg
);
1476 /* This is called before the symbol table is processed. In order to
1477 work with gcc when using mips-tfile, we must keep all local labels.
1478 However, in other cases, we want to discard them. If we were
1479 called with -g, but we didn't see any debugging information, it may
1480 mean that gcc is smuggling debugging information through to
1481 mips-tfile, in which case we must generate all local labels. */
1486 alpha_frob_file_before_adjust ()
1488 if (alpha_debug
!= 0
1489 && ! ecoff_debugging_seen
)
1490 flag_keep_locals
= 1;
1493 #endif /* OBJ_ECOFF */
1495 /* Parse the arguments to an opcode. */
1498 tokenize_arguments (str
, tok
, ntok
)
1503 expressionS
*end_tok
= tok
+ ntok
;
1504 char *old_input_line_pointer
;
1505 int saw_comma
= 0, saw_arg
= 0;
1507 memset (tok
, 0, sizeof (*tok
) * ntok
);
1509 /* Save and restore input_line_pointer around this function */
1510 old_input_line_pointer
= input_line_pointer
;
1511 input_line_pointer
= str
;
1513 while (tok
< end_tok
&& *input_line_pointer
)
1516 switch (*input_line_pointer
)
1522 ++input_line_pointer
;
1523 if (saw_comma
|| !saw_arg
)
1530 char *hold
= input_line_pointer
++;
1532 /* First try for parenthesized register ... */
1534 if (*input_line_pointer
== ')' && tok
->X_op
== O_register
)
1536 tok
->X_op
= (saw_comma
? O_cpregister
: O_pregister
);
1539 ++input_line_pointer
;
1544 /* ... then fall through to plain expression */
1545 input_line_pointer
= hold
;
1549 if (saw_arg
&& !saw_comma
)
1552 if (tok
->X_op
== O_illegal
|| tok
->X_op
== O_absent
)
1565 input_line_pointer
= old_input_line_pointer
;
1566 return ntok
- (end_tok
- tok
);
1569 input_line_pointer
= old_input_line_pointer
;
1573 /* Search forward through all variants of an opcode looking for a
1576 static const struct alpha_opcode
*
1577 find_opcode_match(first_opcode
, tok
, pntok
, pcpumatch
)
1578 const struct alpha_opcode
*first_opcode
;
1579 const expressionS
*tok
;
1583 const struct alpha_opcode
*opcode
= first_opcode
;
1585 int got_cpu_match
= 0;
1589 const unsigned char *opidx
;
1592 /* Don't match opcodes that don't exist on this architecture */
1593 if (!(opcode
->flags
& alpha_target
))
1598 for (opidx
= opcode
->operands
; *opidx
; ++opidx
)
1600 const struct alpha_operand
*operand
= &alpha_operands
[*opidx
];
1602 /* only take input from real operands */
1603 if (operand
->flags
& AXP_OPERAND_FAKE
)
1606 /* when we expect input, make sure we have it */
1609 if ((operand
->flags
& AXP_OPERAND_OPTIONAL_MASK
) == 0)
1614 /* match operand type with expression type */
1615 switch (operand
->flags
& AXP_OPERAND_TYPECHECK_MASK
)
1617 case AXP_OPERAND_IR
:
1618 if (tok
[tokidx
].X_op
!= O_register
1619 || !is_ir_num(tok
[tokidx
].X_add_number
))
1622 case AXP_OPERAND_FPR
:
1623 if (tok
[tokidx
].X_op
!= O_register
1624 || !is_fpr_num(tok
[tokidx
].X_add_number
))
1627 case AXP_OPERAND_IR
|AXP_OPERAND_PARENS
:
1628 if (tok
[tokidx
].X_op
!= O_pregister
1629 || !is_ir_num(tok
[tokidx
].X_add_number
))
1632 case AXP_OPERAND_IR
|AXP_OPERAND_PARENS
|AXP_OPERAND_COMMA
:
1633 if (tok
[tokidx
].X_op
!= O_cpregister
1634 || !is_ir_num(tok
[tokidx
].X_add_number
))
1638 case AXP_OPERAND_RELATIVE
:
1639 case AXP_OPERAND_SIGNED
:
1640 case AXP_OPERAND_UNSIGNED
:
1641 switch (tok
[tokidx
].X_op
)
1653 /* everything else should have been fake */
1659 /* possible match -- did we use all of our input? */
1668 while (++opcode
-alpha_opcodes
< alpha_num_opcodes
1669 && !strcmp(opcode
->name
, first_opcode
->name
));
1672 *pcpumatch
= got_cpu_match
;
1677 /* Search forward through all variants of a macro looking for a syntax
1680 static const struct alpha_macro
*
1681 find_macro_match(first_macro
, tok
, pntok
)
1682 const struct alpha_macro
*first_macro
;
1683 const expressionS
*tok
;
1686 const struct alpha_macro
*macro
= first_macro
;
1691 const enum alpha_macro_arg
*arg
= macro
->argsets
;
1706 if (tokidx
>= ntok
|| tok
[tokidx
].X_op
!= O_register
1707 || !is_ir_num(tok
[tokidx
].X_add_number
))
1712 if (tokidx
>= ntok
|| tok
[tokidx
].X_op
!= O_pregister
1713 || !is_ir_num(tok
[tokidx
].X_add_number
))
1718 if (tokidx
>= ntok
|| tok
[tokidx
].X_op
!= O_cpregister
1719 || !is_ir_num(tok
[tokidx
].X_add_number
))
1724 if (tokidx
>= ntok
|| tok
[tokidx
].X_op
!= O_register
1725 || !is_fpr_num(tok
[tokidx
].X_add_number
))
1733 switch (tok
[tokidx
].X_op
)
1746 while (*arg
!= MACRO_EOA
)
1754 while (++macro
-alpha_macros
< alpha_num_macros
1755 && !strcmp(macro
->name
, first_macro
->name
));
1760 /* Insert an operand value into an instruction. */
1763 insert_operand(insn
, operand
, val
, file
, line
)
1765 const struct alpha_operand
*operand
;
1770 if (operand
->bits
!= 32 && !(operand
->flags
& AXP_OPERAND_NOOVERFLOW
))
1774 if (operand
->flags
& AXP_OPERAND_SIGNED
)
1776 max
= (1 << (operand
->bits
- 1)) - 1;
1777 min
= -(1 << (operand
->bits
- 1));
1781 max
= (1 << operand
->bits
) - 1;
1785 if (val
< min
|| val
> max
)
1788 _("operand out of range (%s not between %d and %d)");
1789 char buf
[sizeof (val
) * 3 + 2];
1791 sprint_value(buf
, val
);
1793 as_warn_where(file
, line
, err
, buf
, min
, max
);
1795 as_warn(err
, buf
, min
, max
);
1799 if (operand
->insert
)
1801 const char *errmsg
= NULL
;
1803 insn
= (*operand
->insert
) (insn
, val
, &errmsg
);
1808 insn
|= ((val
& ((1 << operand
->bits
) - 1)) << operand
->shift
);
1814 * Turn an opcode description and a set of arguments into
1815 * an instruction and a fixup.
1819 assemble_insn(opcode
, tok
, ntok
, insn
)
1820 const struct alpha_opcode
*opcode
;
1821 const expressionS
*tok
;
1823 struct alpha_insn
*insn
;
1825 const unsigned char *argidx
;
1829 memset (insn
, 0, sizeof (*insn
));
1830 image
= opcode
->opcode
;
1832 for (argidx
= opcode
->operands
; *argidx
; ++argidx
)
1834 const struct alpha_operand
*operand
= &alpha_operands
[*argidx
];
1835 const expressionS
*t
;
1837 if (operand
->flags
& AXP_OPERAND_FAKE
)
1839 /* fake operands take no value and generate no fixup */
1840 image
= insert_operand(image
, operand
, 0, NULL
, 0);
1846 switch (operand
->flags
& AXP_OPERAND_OPTIONAL_MASK
)
1848 case AXP_OPERAND_DEFAULT_FIRST
:
1851 case AXP_OPERAND_DEFAULT_SECOND
:
1854 case AXP_OPERAND_DEFAULT_ZERO
:
1856 static const expressionS zero_exp
= { 0, 0, 0, O_constant
, 1 };
1872 image
= insert_operand(image
, operand
, regno(t
->X_add_number
),
1877 image
= insert_operand(image
, operand
, t
->X_add_number
, NULL
, 0);
1882 struct alpha_fixup
*fixup
;
1884 if (insn
->nfixups
>= MAX_INSN_FIXUPS
)
1885 as_fatal(_("too many fixups"));
1887 fixup
= &insn
->fixups
[insn
->nfixups
++];
1890 fixup
->reloc
= operand
->default_reloc
;
1900 * Actually output an instruction with its fixup.
1905 struct alpha_insn
*insn
;
1910 /* Take care of alignment duties */
1911 if (alpha_auto_align_on
&& alpha_current_align
< 2)
1912 alpha_align (2, (char *) NULL
, alpha_insn_label
, 0);
1913 if (alpha_current_align
> 2)
1914 alpha_current_align
= 2;
1915 alpha_insn_label
= NULL
;
1917 /* Write out the instruction. */
1919 md_number_to_chars (f
, insn
->insn
, 4);
1921 /* Apply the fixups in order */
1922 for (i
= 0; i
< insn
->nfixups
; ++i
)
1924 struct alpha_fixup
*fixup
= &insn
->fixups
[i
];
1928 /* Some fixups are only used internally and so have no howto */
1929 if ((int)fixup
->reloc
< 0)
1930 size
= 4, pcrel
= 0;
1932 /* These relocation types are only used internally. */
1933 else if (fixup
->reloc
== BFD_RELOC_ALPHA_GPDISP_HI16
1934 || fixup
->reloc
== BFD_RELOC_ALPHA_GPDISP_LO16
)
1936 size
= 2, pcrel
= 0;
1941 reloc_howto_type
*reloc_howto
1942 = bfd_reloc_type_lookup (stdoutput
, fixup
->reloc
);
1943 assert (reloc_howto
);
1945 size
= bfd_get_reloc_size (reloc_howto
);
1946 pcrel
= reloc_howto
->pc_relative
;
1948 assert (size
>= 1 && size
<= 4);
1950 fixP
= fix_new_exp (frag_now
, f
- frag_now
->fr_literal
, size
,
1951 &fixup
->exp
, pcrel
, fixup
->reloc
);
1953 /* Turn off complaints that the addend is too large for some fixups */
1954 switch (fixup
->reloc
)
1956 case BFD_RELOC_ALPHA_GPDISP_LO16
:
1958 case BFD_RELOC_ALPHA_LITERAL
:
1961 case BFD_RELOC_ALPHA_ELF_LITERAL
:
1963 case BFD_RELOC_GPREL32
:
1964 fixP
->fx_no_overflow
= 1;
1972 /* Given an opcode name and a pre-tokenized set of arguments, assemble
1973 the insn, but do not emit it.
1975 Note that this implies no macros allowed, since we can't store more
1976 than one insn in an insn structure. */
1979 assemble_tokens_to_insn(opname
, tok
, ntok
, insn
)
1981 const expressionS
*tok
;
1983 struct alpha_insn
*insn
;
1985 const struct alpha_opcode
*opcode
;
1987 /* search opcodes */
1988 opcode
= (const struct alpha_opcode
*) hash_find (alpha_opcode_hash
, opname
);
1992 opcode
= find_opcode_match (opcode
, tok
, &ntok
, &cpumatch
);
1995 assemble_insn (opcode
, tok
, ntok
, insn
);
1999 as_bad (_("inappropriate arguments for opcode `%s'"), opname
);
2001 as_bad (_("opcode `%s' not supported for target %s"), opname
,
2005 as_bad (_("unknown opcode `%s'"), opname
);
2008 /* Given an opcode name and a pre-tokenized set of arguments, take the
2009 opcode all the way through emission. */
2012 assemble_tokens (opname
, tok
, ntok
, local_macros_on
)
2014 const expressionS
*tok
;
2016 int local_macros_on
;
2018 int found_something
= 0;
2019 const struct alpha_opcode
*opcode
;
2020 const struct alpha_macro
*macro
;
2024 if (local_macros_on
)
2026 macro
= ((const struct alpha_macro
*)
2027 hash_find (alpha_macro_hash
, opname
));
2030 found_something
= 1;
2031 macro
= find_macro_match (macro
, tok
, &ntok
);
2034 (*macro
->emit
) (tok
, ntok
, macro
->arg
);
2040 /* search opcodes */
2041 opcode
= (const struct alpha_opcode
*) hash_find (alpha_opcode_hash
, opname
);
2044 found_something
= 1;
2045 opcode
= find_opcode_match (opcode
, tok
, &ntok
, &cpumatch
);
2048 struct alpha_insn insn
;
2049 assemble_insn (opcode
, tok
, ntok
, &insn
);
2055 if (found_something
)
2057 as_bad (_("inappropriate arguments for opcode `%s'"), opname
);
2059 as_bad (_("opcode `%s' not supported for target %s"), opname
,
2062 as_bad (_("unknown opcode `%s'"), opname
);
2066 /* Some instruction sets indexed by lg(size) */
2067 static const char * const sextX_op
[] = { "sextb", "sextw", "sextl", NULL
};
2068 static const char * const insXl_op
[] = { "insbl", "inswl", "insll", "insql" };
2069 static const char * const insXh_op
[] = { NULL
, "inswh", "inslh", "insqh" };
2070 static const char * const extXl_op
[] = { "extbl", "extwl", "extll", "extql" };
2071 static const char * const extXh_op
[] = { NULL
, "extwh", "extlh", "extqh" };
2072 static const char * const mskXl_op
[] = { "mskbl", "mskwl", "mskll", "mskql" };
2073 static const char * const mskXh_op
[] = { NULL
, "mskwh", "msklh", "mskqh" };
2074 static const char * const stX_op
[] = { "stb", "stw", "stl", "stq" };
2075 static const char * const ldX_op
[] = { "ldb", "ldw", "ldll", "ldq" };
2076 static const char * const ldXu_op
[] = { "ldbu", "ldwu", NULL
, NULL
};
2078 /* Implement the ldgp macro. */
2081 emit_ldgp (tok
, ntok
, unused
)
2082 const expressionS
*tok
;
2089 #if defined(OBJ_ECOFF) || defined(OBJ_ELF)
2090 /* from "ldgp r1,n(r2)", generate "ldah r1,X(R2); lda r1,Y(r1)"
2091 with appropriate constants and relocations. */
2092 struct alpha_insn insn
;
2093 expressionS newtok
[3];
2096 /* We're going to need this symbol in md_apply_fix(). */
2097 (void) section_symbol (absolute_section
);
2100 if (regno (tok
[2].X_add_number
) == AXP_REG_PV
)
2101 ecoff_set_gp_prolog_size (0);
2105 set_tok_const (newtok
[1], 0);
2108 assemble_tokens_to_insn ("ldah", newtok
, 3, &insn
);
2113 assert (addend
.X_op
== O_constant
);
2114 addend
.X_op
= O_symbol
;
2115 addend
.X_add_symbol
= alpha_gp_symbol
;
2119 insn
.fixups
[0].exp
= addend
;
2120 insn
.fixups
[0].reloc
= BFD_RELOC_ALPHA_GPDISP_HI16
;
2124 set_tok_preg (newtok
[2], tok
[0].X_add_number
);
2126 assemble_tokens_to_insn ("lda", newtok
, 3, &insn
);
2129 addend
.X_add_number
+= 4;
2133 insn
.fixups
[0].exp
= addend
;
2134 insn
.fixups
[0].reloc
= BFD_RELOC_ALPHA_GPDISP_LO16
;
2137 #endif /* OBJ_ECOFF || OBJ_ELF */
2142 /* Add symbol+addend to link pool.
2143 Return offset from basesym to entry in link pool.
2145 Add new fixup only if offset isn't 16bit. */
2148 add_to_link_pool (basesym
, sym
, addend
)
2153 segT current_section
= now_seg
;
2154 int current_subsec
= now_subseg
;
2156 bfd_reloc_code_real_type reloc_type
;
2158 segment_info_type
*seginfo
= seg_info (alpha_link_section
);
2161 offset
= -basesym
->sy_obj
;
2163 /* @@ This assumes all entries in a given section will be of the same
2164 size... Probably correct, but unwise to rely on. */
2165 /* This must always be called with the same subsegment. */
2167 if (seginfo
->frchainP
)
2168 for (fixp
= seginfo
->frchainP
->fix_root
;
2169 fixp
!= (fixS
*) NULL
;
2170 fixp
= fixp
->fx_next
, offset
+= 8)
2172 if (fixp
->fx_addsy
== sym
&& fixp
->fx_offset
== addend
)
2174 if (range_signed_16 (offset
))
2181 /* Not found in 16bit signed range. */
2183 subseg_set (alpha_link_section
, 0);
2187 fix_new (frag_now
, p
- frag_now
->fr_literal
, 8, sym
, addend
, 0,
2190 subseg_set (current_section
, current_subsec
);
2191 seginfo
->literal_pool_size
+= 8;
2195 #endif /* OBJ_EVAX */
2197 /* Load a (partial) expression into a target register.
2199 If poffset is not null, after the call it will either contain
2200 O_constant 0, or a 16-bit offset appropriate for any MEM format
2201 instruction. In addition, pbasereg will be modified to point to
2202 the base register to use in that MEM format instruction.
2204 In any case, *pbasereg should contain a base register to add to the
2205 expression. This will normally be either AXP_REG_ZERO or
2206 alpha_gp_register. Symbol addresses will always be loaded via $gp,
2207 so "foo($0)" is interpreted as adding the address of foo to $0;
2208 i.e. "ldq $targ, LIT($gp); addq $targ, $0, $targ". Odd, perhaps,
2209 but this is what OSF/1 does.
2211 Finally, the return value is true if the calling macro may emit a
2212 LITUSE reloc if otherwise appropriate. */
2215 load_expression (targreg
, exp
, pbasereg
, poffset
)
2217 const expressionS
*exp
;
2219 expressionS
*poffset
;
2221 int emit_lituse
= 0;
2222 offsetT addend
= exp
->X_add_number
;
2223 int basereg
= *pbasereg
;
2224 struct alpha_insn insn
;
2225 expressionS newtok
[3];
2234 /* attempt to reduce .lit load by splitting the offset from
2235 its symbol when possible, but don't create a situation in
2237 if (!range_signed_32 (addend
) &&
2238 (alpha_noat_on
|| targreg
== AXP_REG_AT
))
2240 lit
= add_to_literal_pool (exp
->X_add_symbol
, addend
,
2241 alpha_lita_section
, 8);
2246 lit
= add_to_literal_pool (exp
->X_add_symbol
, 0,
2247 alpha_lita_section
, 8);
2251 as_fatal (_("overflow in literal (.lita) table"));
2253 /* emit "ldq r, lit(gp)" */
2255 if (basereg
!= alpha_gp_register
&& targreg
== basereg
)
2258 as_bad (_("macro requires $at register while noat in effect"));
2259 if (targreg
== AXP_REG_AT
)
2260 as_bad (_("macro requires $at while $at in use"));
2262 set_tok_reg (newtok
[0], AXP_REG_AT
);
2265 set_tok_reg (newtok
[0], targreg
);
2266 set_tok_sym (newtok
[1], alpha_lita_symbol
, lit
);
2267 set_tok_preg (newtok
[2], alpha_gp_register
);
2269 assemble_tokens_to_insn ("ldq", newtok
, 3, &insn
);
2271 assert (insn
.nfixups
== 1);
2272 insn
.fixups
[0].reloc
= BFD_RELOC_ALPHA_LITERAL
;
2273 #endif /* OBJ_ECOFF */
2275 /* emit "ldq r, gotoff(gp)" */
2277 if (basereg
!= alpha_gp_register
&& targreg
== basereg
)
2280 as_bad (_("macro requires $at register while noat in effect"));
2281 if (targreg
== AXP_REG_AT
)
2282 as_bad (_("macro requires $at while $at in use"));
2284 set_tok_reg (newtok
[0], AXP_REG_AT
);
2287 set_tok_reg (newtok
[0], targreg
);
2289 /* XXX: Disable this .got minimizing optimization so that we can get
2290 better instruction offset knowledge in the compiler. This happens
2291 very infrequently anyway. */
2292 if (1 || !range_signed_32 (addend
)
2293 && (alpha_noat_on
|| targreg
== AXP_REG_AT
))
2300 set_tok_sym (newtok
[1], exp
->X_add_symbol
, 0);
2303 set_tok_preg (newtok
[2], alpha_gp_register
);
2305 assemble_tokens_to_insn ("ldq", newtok
, 3, &insn
);
2307 assert (insn
.nfixups
== 1);
2308 insn
.fixups
[0].reloc
= BFD_RELOC_ALPHA_ELF_LITERAL
;
2309 #endif /* OBJ_ELF */
2313 /* Find symbol or symbol pointer in link section. */
2315 if (exp
->X_add_symbol
== alpha_evax_proc
.symbol
)
2317 if (range_signed_16 (addend
))
2319 set_tok_reg (newtok
[0], targreg
);
2320 set_tok_const (newtok
[1], addend
);
2321 set_tok_preg (newtok
[2], basereg
);
2322 assemble_tokens_to_insn ("lda", newtok
, 3, &insn
);
2327 set_tok_reg (newtok
[0], targreg
);
2328 set_tok_const (newtok
[1], 0);
2329 set_tok_preg (newtok
[2], basereg
);
2330 assemble_tokens_to_insn ("lda", newtok
, 3, &insn
);
2335 if (!range_signed_32 (addend
))
2337 link
= add_to_link_pool (alpha_evax_proc
.symbol
,
2338 exp
->X_add_symbol
, addend
);
2343 link
= add_to_link_pool (alpha_evax_proc
.symbol
,
2344 exp
->X_add_symbol
, 0);
2346 set_tok_reg (newtok
[0], targreg
);
2347 set_tok_const (newtok
[1], link
);
2348 set_tok_preg (newtok
[2], basereg
);
2349 assemble_tokens_to_insn ("ldq", newtok
, 3, &insn
);
2351 #endif /* OBJ_EVAX */
2358 if (basereg
!= alpha_gp_register
&& basereg
!= AXP_REG_ZERO
)
2360 /* emit "addq r, base, r" */
2362 set_tok_reg (newtok
[1], basereg
);
2363 set_tok_reg (newtok
[2], targreg
);
2364 assemble_tokens ("addq", newtok
, 3, 0);
2376 /* Assume that this difference expression will be resolved to an
2377 absolute value and that that value will fit in 16 bits. */
2379 set_tok_reg (newtok
[0], targreg
);
2381 set_tok_preg (newtok
[2], basereg
);
2382 assemble_tokens ("lda", newtok
, 3, 0);
2385 set_tok_const (*poffset
, 0);
2389 if (exp
->X_add_number
> 0)
2390 as_bad (_("bignum invalid; zero assumed"));
2392 as_bad (_("floating point number invalid; zero assumed"));
2400 if (!range_signed_32 (addend
))
2404 /* for 64-bit addends, just put it in the literal pool */
2407 /* emit "ldq targreg, lit(basereg)" */
2408 lit
= add_to_link_pool (alpha_evax_proc
.symbol
,
2409 section_symbol (absolute_section
), addend
);
2410 set_tok_reg (newtok
[0], targreg
);
2411 set_tok_const (newtok
[1], lit
);
2412 set_tok_preg (newtok
[2], alpha_gp_register
);
2413 assemble_tokens ("ldq", newtok
, 3, 0);
2416 if (alpha_lit8_section
== NULL
)
2418 create_literal_section (".lit8",
2419 &alpha_lit8_section
,
2420 &alpha_lit8_symbol
);
2423 alpha_lit8_literal
= add_to_literal_pool (alpha_lit8_symbol
, 0x8000,
2424 alpha_lita_section
, 8);
2425 if (alpha_lit8_literal
>= 0x8000)
2426 as_fatal (_("overflow in literal (.lita) table"));
2430 lit
= add_to_literal_pool (NULL
, addend
, alpha_lit8_section
, 8) - 0x8000;
2432 as_fatal (_("overflow in literal (.lit8) table"));
2434 /* emit "lda litreg, .lit8+0x8000" */
2436 if (targreg
== basereg
)
2439 as_bad (_("macro requires $at register while noat in effect"));
2440 if (targreg
== AXP_REG_AT
)
2441 as_bad (_("macro requires $at while $at in use"));
2443 set_tok_reg (newtok
[0], AXP_REG_AT
);
2446 set_tok_reg (newtok
[0], targreg
);
2448 set_tok_sym (newtok
[1], alpha_lita_symbol
, alpha_lit8_literal
);
2451 set_tok_sym (newtok
[1], alpha_lit8_symbol
, 0x8000);
2453 set_tok_preg (newtok
[2], alpha_gp_register
);
2455 assemble_tokens_to_insn ("ldq", newtok
, 3, &insn
);
2457 assert (insn
.nfixups
== 1);
2459 insn
.fixups
[0].reloc
= BFD_RELOC_ALPHA_LITERAL
;
2462 insn
.fixups
[0].reloc
= BFD_RELOC_ALPHA_ELF_LITERAL
;
2467 /* emit "ldq litreg, lit(litreg)" */
2469 set_tok_const (newtok
[1], lit
);
2470 set_tok_preg (newtok
[2], newtok
[0].X_add_number
);
2472 assemble_tokens_to_insn ("ldq", newtok
, 3, &insn
);
2474 assert (insn
.nfixups
< MAX_INSN_FIXUPS
);
2475 if (insn
.nfixups
> 0)
2477 memmove (&insn
.fixups
[1], &insn
.fixups
[0],
2478 sizeof(struct alpha_fixup
) * insn
.nfixups
);
2481 insn
.fixups
[0].reloc
= BFD_RELOC_ALPHA_LITUSE
;
2482 insn
.fixups
[0].exp
.X_op
= O_constant
;
2483 insn
.fixups
[0].exp
.X_add_number
= 1;
2488 /* emit "addq litreg, base, target" */
2490 if (basereg
!= AXP_REG_ZERO
)
2492 set_tok_reg (newtok
[1], basereg
);
2493 set_tok_reg (newtok
[2], targreg
);
2494 assemble_tokens ("addq", newtok
, 3, 0);
2496 #endif /* !OBJ_EVAX */
2499 set_tok_const (*poffset
, 0);
2500 *pbasereg
= targreg
;
2504 offsetT low
, high
, extra
, tmp
;
2506 /* for 32-bit operands, break up the addend */
2508 low
= sign_extend_16 (addend
);
2510 high
= sign_extend_16 (tmp
>> 16);
2512 if (tmp
- (high
<< 16))
2516 high
= sign_extend_16 (tmp
>> 16);
2521 set_tok_reg (newtok
[0], targreg
);
2522 set_tok_preg (newtok
[2], basereg
);
2526 /* emit "ldah r, extra(r) */
2527 set_tok_const (newtok
[1], extra
);
2528 assemble_tokens ("ldah", newtok
, 3, 0);
2529 set_tok_preg (newtok
[2], basereg
= targreg
);
2534 /* emit "ldah r, high(r) */
2535 set_tok_const (newtok
[1], high
);
2536 assemble_tokens ("ldah", newtok
, 3, 0);
2538 set_tok_preg (newtok
[2], basereg
);
2541 if ((low
&& !poffset
) || (!poffset
&& basereg
!= targreg
))
2543 /* emit "lda r, low(base)" */
2544 set_tok_const (newtok
[1], low
);
2545 assemble_tokens ("lda", newtok
, 3, 0);
2551 set_tok_const (*poffset
, low
);
2552 *pbasereg
= basereg
;
2558 /* The lda macro differs from the lda instruction in that it handles
2559 most simple expressions, particualrly symbol address loads and
2563 emit_lda (tok
, ntok
, unused
)
2564 const expressionS
*tok
;
2571 basereg
= (tok
[1].X_op
== O_constant
? AXP_REG_ZERO
: alpha_gp_register
);
2573 basereg
= tok
[2].X_add_number
;
2575 (void) load_expression (tok
[0].X_add_number
, &tok
[1], &basereg
, NULL
);
2578 /* The ldah macro differs from the ldah instruction in that it has $31
2579 as an implied base register. */
2582 emit_ldah (tok
, ntok
, unused
)
2583 const expressionS
*tok
;
2587 expressionS newtok
[3];
2591 set_tok_preg (newtok
[2], AXP_REG_ZERO
);
2593 assemble_tokens ("ldah", newtok
, 3, 0);
2596 /* Handle all "simple" integer register loads -- ldq, ldq_l, ldq_u,
2597 etc. They differ from the real instructions in that they do simple
2598 expressions like the lda macro. */
2601 emit_ir_load (tok
, ntok
, opname
)
2602 const expressionS
*tok
;
2606 int basereg
, lituse
;
2607 expressionS newtok
[3];
2608 struct alpha_insn insn
;
2611 basereg
= (tok
[1].X_op
== O_constant
? AXP_REG_ZERO
: alpha_gp_register
);
2613 basereg
= tok
[2].X_add_number
;
2615 lituse
= load_expression (tok
[0].X_add_number
, &tok
[1], &basereg
,
2619 set_tok_preg (newtok
[2], basereg
);
2621 assemble_tokens_to_insn ((const char *)opname
, newtok
, 3, &insn
);
2625 assert (insn
.nfixups
< MAX_INSN_FIXUPS
);
2626 if (insn
.nfixups
> 0)
2628 memmove (&insn
.fixups
[1], &insn
.fixups
[0],
2629 sizeof(struct alpha_fixup
) * insn
.nfixups
);
2632 insn
.fixups
[0].reloc
= BFD_RELOC_ALPHA_LITUSE
;
2633 insn
.fixups
[0].exp
.X_op
= O_constant
;
2634 insn
.fixups
[0].exp
.X_add_number
= 1;
2640 /* Handle fp register loads, and both integer and fp register stores.
2641 Again, we handle simple expressions. */
2644 emit_loadstore (tok
, ntok
, opname
)
2645 const expressionS
*tok
;
2649 int basereg
, lituse
;
2650 expressionS newtok
[3];
2651 struct alpha_insn insn
;
2654 basereg
= (tok
[1].X_op
== O_constant
? AXP_REG_ZERO
: alpha_gp_register
);
2656 basereg
= tok
[2].X_add_number
;
2658 if (tok
[1].X_op
!= O_constant
|| !range_signed_16(tok
[1].X_add_number
))
2661 as_bad (_("macro requires $at register while noat in effect"));
2663 lituse
= load_expression (AXP_REG_AT
, &tok
[1], &basereg
, &newtok
[1]);
2672 set_tok_preg (newtok
[2], basereg
);
2674 assemble_tokens_to_insn ((const char *)opname
, newtok
, 3, &insn
);
2678 assert (insn
.nfixups
< MAX_INSN_FIXUPS
);
2679 if (insn
.nfixups
> 0)
2681 memmove (&insn
.fixups
[1], &insn
.fixups
[0],
2682 sizeof(struct alpha_fixup
) * insn
.nfixups
);
2685 insn
.fixups
[0].reloc
= BFD_RELOC_ALPHA_LITUSE
;
2686 insn
.fixups
[0].exp
.X_op
= O_constant
;
2687 insn
.fixups
[0].exp
.X_add_number
= 1;
2693 /* Load a half-word or byte as an unsigned value. */
2696 emit_ldXu (tok
, ntok
, vlgsize
)
2697 const expressionS
*tok
;
2701 if (alpha_target
& AXP_OPCODE_BWX
)
2702 emit_ir_load (tok
, ntok
, ldXu_op
[(long)vlgsize
]);
2705 expressionS newtok
[3];
2708 as_bad (_("macro requires $at register while noat in effect"));
2710 /* emit "lda $at, exp" */
2712 memcpy (newtok
, tok
, sizeof (expressionS
) * ntok
);
2713 newtok
[0].X_add_number
= AXP_REG_AT
;
2714 assemble_tokens ("lda", newtok
, ntok
, 1);
2716 /* emit "ldq_u targ, 0($at)" */
2719 set_tok_const (newtok
[1], 0);
2720 set_tok_preg (newtok
[2], AXP_REG_AT
);
2721 assemble_tokens ("ldq_u", newtok
, 3, 1);
2723 /* emit "extXl targ, $at, targ" */
2725 set_tok_reg (newtok
[1], AXP_REG_AT
);
2726 newtok
[2] = newtok
[0];
2727 assemble_tokens (extXl_op
[(long)vlgsize
], newtok
, 3, 1);
2731 /* Load a half-word or byte as a signed value. */
2734 emit_ldX (tok
, ntok
, vlgsize
)
2735 const expressionS
*tok
;
2739 emit_ldXu (tok
, ntok
, vlgsize
);
2740 assemble_tokens (sextX_op
[(long)vlgsize
], tok
, 1, 1);
2743 /* Load an integral value from an unaligned address as an unsigned
2747 emit_uldXu (tok
, ntok
, vlgsize
)
2748 const expressionS
*tok
;
2752 long lgsize
= (long)vlgsize
;
2753 expressionS newtok
[3];
2756 as_bad (_("macro requires $at register while noat in effect"));
2758 /* emit "lda $at, exp" */
2760 memcpy (newtok
, tok
, sizeof (expressionS
) * ntok
);
2761 newtok
[0].X_add_number
= AXP_REG_AT
;
2762 assemble_tokens ("lda", newtok
, ntok
, 1);
2764 /* emit "ldq_u $t9, 0($at)" */
2766 set_tok_reg (newtok
[0], AXP_REG_T9
);
2767 set_tok_const (newtok
[1], 0);
2768 set_tok_preg (newtok
[2], AXP_REG_AT
);
2769 assemble_tokens ("ldq_u", newtok
, 3, 1);
2771 /* emit "ldq_u $t10, size-1($at)" */
2773 set_tok_reg (newtok
[0], AXP_REG_T10
);
2774 set_tok_const (newtok
[1], (1<<lgsize
)-1);
2775 assemble_tokens ("ldq_u", newtok
, 3, 1);
2777 /* emit "extXl $t9, $at, $t9" */
2779 set_tok_reg (newtok
[0], AXP_REG_T9
);
2780 set_tok_reg (newtok
[1], AXP_REG_AT
);
2781 set_tok_reg (newtok
[2], AXP_REG_T9
);
2782 assemble_tokens (extXl_op
[lgsize
], newtok
, 3, 1);
2784 /* emit "extXh $t10, $at, $t10" */
2786 set_tok_reg (newtok
[0], AXP_REG_T10
);
2787 set_tok_reg (newtok
[2], AXP_REG_T10
);
2788 assemble_tokens (extXh_op
[lgsize
], newtok
, 3, 1);
2790 /* emit "or $t9, $t10, targ" */
2792 set_tok_reg (newtok
[0], AXP_REG_T9
);
2793 set_tok_reg (newtok
[1], AXP_REG_T10
);
2795 assemble_tokens ("or", newtok
, 3, 1);
2798 /* Load an integral value from an unaligned address as a signed value.
2799 Note that quads should get funneled to the unsigned load since we
2800 don't have to do the sign extension. */
2803 emit_uldX (tok
, ntok
, vlgsize
)
2804 const expressionS
*tok
;
2808 emit_uldXu (tok
, ntok
, vlgsize
);
2809 assemble_tokens (sextX_op
[(long)vlgsize
], tok
, 1, 1);
2812 /* Implement the ldil macro. */
2815 emit_ldil (tok
, ntok
, unused
)
2816 const expressionS
*tok
;
2820 expressionS newtok
[2];
2822 memcpy (newtok
, tok
, sizeof(newtok
));
2823 newtok
[1].X_add_number
= sign_extend_32 (tok
[1].X_add_number
);
2825 assemble_tokens ("lda", newtok
, ntok
, 1);
2828 /* Store a half-word or byte. */
2831 emit_stX (tok
, ntok
, vlgsize
)
2832 const expressionS
*tok
;
2836 int lgsize
= (int)(long)vlgsize
;
2838 if (alpha_target
& AXP_OPCODE_BWX
)
2839 emit_loadstore (tok
, ntok
, stX_op
[lgsize
]);
2842 expressionS newtok
[3];
2845 as_bad(_("macro requires $at register while noat in effect"));
2847 /* emit "lda $at, exp" */
2849 memcpy (newtok
, tok
, sizeof (expressionS
) * ntok
);
2850 newtok
[0].X_add_number
= AXP_REG_AT
;
2851 assemble_tokens ("lda", newtok
, ntok
, 1);
2853 /* emit "ldq_u $t9, 0($at)" */
2855 set_tok_reg (newtok
[0], AXP_REG_T9
);
2856 set_tok_const (newtok
[1], 0);
2857 set_tok_preg (newtok
[2], AXP_REG_AT
);
2858 assemble_tokens ("ldq_u", newtok
, 3, 1);
2860 /* emit "insXl src, $at, $t10" */
2863 set_tok_reg (newtok
[1], AXP_REG_AT
);
2864 set_tok_reg (newtok
[2], AXP_REG_T10
);
2865 assemble_tokens (insXl_op
[lgsize
], newtok
, 3, 1);
2867 /* emit "mskXl $t9, $at, $t9" */
2869 set_tok_reg (newtok
[0], AXP_REG_T9
);
2870 newtok
[2] = newtok
[0];
2871 assemble_tokens (mskXl_op
[lgsize
], newtok
, 3, 1);
2873 /* emit "or $t9, $t10, $t9" */
2875 set_tok_reg (newtok
[1], AXP_REG_T10
);
2876 assemble_tokens ("or", newtok
, 3, 1);
2878 /* emit "stq_u $t9, 0($at) */
2880 set_tok_const (newtok
[1], 0);
2881 set_tok_preg (newtok
[2], AXP_REG_AT
);
2882 assemble_tokens ("stq_u", newtok
, 3, 1);
2886 /* Store an integer to an unaligned address. */
2889 emit_ustX (tok
, ntok
, vlgsize
)
2890 const expressionS
*tok
;
2894 int lgsize
= (int)(long)vlgsize
;
2895 expressionS newtok
[3];
2897 /* emit "lda $at, exp" */
2899 memcpy (newtok
, tok
, sizeof (expressionS
) * ntok
);
2900 newtok
[0].X_add_number
= AXP_REG_AT
;
2901 assemble_tokens ("lda", newtok
, ntok
, 1);
2903 /* emit "ldq_u $9, 0($at)" */
2905 set_tok_reg (newtok
[0], AXP_REG_T9
);
2906 set_tok_const (newtok
[1], 0);
2907 set_tok_preg (newtok
[2], AXP_REG_AT
);
2908 assemble_tokens ("ldq_u", newtok
, 3, 1);
2910 /* emit "ldq_u $10, size-1($at)" */
2912 set_tok_reg (newtok
[0], AXP_REG_T10
);
2913 set_tok_const (newtok
[1], (1 << lgsize
)-1);
2914 assemble_tokens ("ldq_u", newtok
, 3, 1);
2916 /* emit "insXl src, $at, $t11" */
2919 set_tok_reg (newtok
[1], AXP_REG_AT
);
2920 set_tok_reg (newtok
[2], AXP_REG_T11
);
2921 assemble_tokens (insXl_op
[lgsize
], newtok
, 3, 1);
2923 /* emit "insXh src, $at, $t12" */
2925 set_tok_reg (newtok
[2], AXP_REG_T12
);
2926 assemble_tokens (insXh_op
[lgsize
], newtok
, 3, 1);
2928 /* emit "mskXl $t9, $at, $t9" */
2930 set_tok_reg (newtok
[0], AXP_REG_T9
);
2931 newtok
[2] = newtok
[0];
2932 assemble_tokens (mskXl_op
[lgsize
], newtok
, 3, 1);
2934 /* emit "mskXh $t10, $at, $t10" */
2936 set_tok_reg (newtok
[0], AXP_REG_T10
);
2937 newtok
[2] = newtok
[0];
2938 assemble_tokens (mskXh_op
[lgsize
], newtok
, 3, 1);
2940 /* emit "or $t9, $t11, $t9" */
2942 set_tok_reg (newtok
[0], AXP_REG_T9
);
2943 set_tok_reg (newtok
[1], AXP_REG_T11
);
2944 newtok
[2] = newtok
[0];
2945 assemble_tokens ("or", newtok
, 3, 1);
2947 /* emit "or $t10, $t12, $t10" */
2949 set_tok_reg (newtok
[0], AXP_REG_T10
);
2950 set_tok_reg (newtok
[1], AXP_REG_T12
);
2951 newtok
[2] = newtok
[0];
2952 assemble_tokens ("or", newtok
, 3, 1);
2954 /* emit "stq_u $t9, 0($at)" */
2956 set_tok_reg (newtok
[0], AXP_REG_T9
);
2957 set_tok_const (newtok
[1], 0);
2958 set_tok_preg (newtok
[2], AXP_REG_AT
);
2959 assemble_tokens ("stq_u", newtok
, 3, 1);
2961 /* emit "stq_u $t10, size-1($at)" */
2963 set_tok_reg (newtok
[0], AXP_REG_T10
);
2964 set_tok_const (newtok
[1], (1 << lgsize
)-1);
2965 assemble_tokens ("stq_u", newtok
, 3, 1);
2968 /* Sign extend a half-word or byte. The 32-bit sign extend is
2969 implemented as "addl $31, $r, $t" in the opcode table. */
2972 emit_sextX (tok
, ntok
, vlgsize
)
2973 const expressionS
*tok
;
2977 long lgsize
= (long)vlgsize
;
2979 if (alpha_target
& AXP_OPCODE_BWX
)
2980 assemble_tokens (sextX_op
[lgsize
], tok
, ntok
, 0);
2983 int bitshift
= 64 - 8 * (1 << lgsize
);
2984 expressionS newtok
[3];
2986 /* emit "sll src,bits,dst" */
2989 set_tok_const (newtok
[1], bitshift
);
2990 newtok
[2] = tok
[ntok
- 1];
2991 assemble_tokens ("sll", newtok
, 3, 1);
2993 /* emit "sra dst,bits,dst" */
2995 newtok
[0] = newtok
[2];
2996 assemble_tokens ("sra", newtok
, 3, 1);
3000 /* Implement the division and modulus macros. */
3004 /* Make register usage like in normal procedure call.
3005 Don't clobber PV and RA. */
3008 emit_division (tok
, ntok
, symname
)
3009 const expressionS
*tok
;
3013 /* DIVISION and MODULUS. Yech.
3018 * mov x,R16 # if x != R16
3019 * mov y,R17 # if y != R17
3024 * with appropriate optimizations if R0,R16,R17 are the registers
3025 * specified by the compiler.
3030 expressionS newtok
[3];
3032 xr
= regno (tok
[0].X_add_number
);
3033 yr
= regno (tok
[1].X_add_number
);
3038 rr
= regno (tok
[2].X_add_number
);
3040 /* Move the operands into the right place */
3041 if (yr
== AXP_REG_R16
&& xr
== AXP_REG_R17
)
3043 /* They are in exactly the wrong order -- swap through AT */
3046 as_bad (_("macro requires $at register while noat in effect"));
3048 set_tok_reg (newtok
[0], AXP_REG_R16
);
3049 set_tok_reg (newtok
[1], AXP_REG_AT
);
3050 assemble_tokens ("mov", newtok
, 2, 1);
3052 set_tok_reg (newtok
[0], AXP_REG_R17
);
3053 set_tok_reg (newtok
[1], AXP_REG_R16
);
3054 assemble_tokens ("mov", newtok
, 2, 1);
3056 set_tok_reg (newtok
[0], AXP_REG_AT
);
3057 set_tok_reg (newtok
[1], AXP_REG_R17
);
3058 assemble_tokens ("mov", newtok
, 2, 1);
3062 if (yr
== AXP_REG_R16
)
3064 set_tok_reg (newtok
[0], AXP_REG_R16
);
3065 set_tok_reg (newtok
[1], AXP_REG_R17
);
3066 assemble_tokens ("mov", newtok
, 2, 1);
3069 if (xr
!= AXP_REG_R16
)
3071 set_tok_reg (newtok
[0], xr
);
3072 set_tok_reg (newtok
[1], AXP_REG_R16
);
3073 assemble_tokens ("mov", newtok
, 2, 1);
3076 if (yr
!= AXP_REG_R16
&& yr
!= AXP_REG_R17
)
3078 set_tok_reg (newtok
[0], yr
);
3079 set_tok_reg (newtok
[1], AXP_REG_R17
);
3080 assemble_tokens ("mov", newtok
, 2, 1);
3084 sym
= symbol_find_or_make ((const char *)symname
);
3086 set_tok_reg (newtok
[0], AXP_REG_AT
);
3087 set_tok_sym (newtok
[1], sym
, 0);
3088 assemble_tokens ("lda", newtok
, 2, 1);
3090 /* Call the division routine */
3091 set_tok_reg (newtok
[0], AXP_REG_AT
);
3092 set_tok_cpreg (newtok
[1], AXP_REG_AT
);
3093 set_tok_const (newtok
[2], 0);
3094 assemble_tokens ("jsr", newtok
, 3, 1);
3096 /* Move the result to the right place */
3097 if (rr
!= AXP_REG_R0
)
3099 set_tok_reg (newtok
[0], AXP_REG_R0
);
3100 set_tok_reg (newtok
[1], rr
);
3101 assemble_tokens ("mov", newtok
, 2, 1);
3105 #else /* !OBJ_EVAX */
3108 emit_division (tok
, ntok
, symname
)
3109 const expressionS
*tok
;
3113 /* DIVISION and MODULUS. Yech.
3123 * with appropriate optimizations if t10,t11,t12 are the registers
3124 * specified by the compiler.
3129 expressionS newtok
[3];
3131 xr
= regno (tok
[0].X_add_number
);
3132 yr
= regno (tok
[1].X_add_number
);
3137 rr
= regno (tok
[2].X_add_number
);
3139 sym
= symbol_find_or_make ((const char *)symname
);
3141 /* Move the operands into the right place */
3142 if (yr
== AXP_REG_T10
&& xr
== AXP_REG_T11
)
3144 /* They are in exactly the wrong order -- swap through AT */
3147 as_bad (_("macro requires $at register while noat in effect"));
3149 set_tok_reg (newtok
[0], AXP_REG_T10
);
3150 set_tok_reg (newtok
[1], AXP_REG_AT
);
3151 assemble_tokens ("mov", newtok
, 2, 1);
3153 set_tok_reg (newtok
[0], AXP_REG_T11
);
3154 set_tok_reg (newtok
[1], AXP_REG_T10
);
3155 assemble_tokens ("mov", newtok
, 2, 1);
3157 set_tok_reg (newtok
[0], AXP_REG_AT
);
3158 set_tok_reg (newtok
[1], AXP_REG_T11
);
3159 assemble_tokens ("mov", newtok
, 2, 1);
3163 if (yr
== AXP_REG_T10
)
3165 set_tok_reg (newtok
[0], AXP_REG_T10
);
3166 set_tok_reg (newtok
[1], AXP_REG_T11
);
3167 assemble_tokens ("mov", newtok
, 2, 1);
3170 if (xr
!= AXP_REG_T10
)
3172 set_tok_reg (newtok
[0], xr
);
3173 set_tok_reg (newtok
[1], AXP_REG_T10
);
3174 assemble_tokens ("mov", newtok
, 2, 1);
3177 if (yr
!= AXP_REG_T10
&& yr
!= AXP_REG_T11
)
3179 set_tok_reg (newtok
[0], yr
);
3180 set_tok_reg (newtok
[1], AXP_REG_T11
);
3181 assemble_tokens ("mov", newtok
, 2, 1);
3185 /* Call the division routine */
3186 set_tok_reg (newtok
[0], AXP_REG_T9
);
3187 set_tok_sym (newtok
[1], sym
, 0);
3188 assemble_tokens ("jsr", newtok
, 2, 1);
3190 /* Reload the GP register */
3194 #if defined(OBJ_ECOFF) || defined(OBJ_ELF)
3195 set_tok_reg (newtok
[0], alpha_gp_register
);
3196 set_tok_const (newtok
[1], 0);
3197 set_tok_preg (newtok
[2], AXP_REG_T9
);
3198 assemble_tokens ("ldgp", newtok
, 3, 1);
3201 /* Move the result to the right place */
3202 if (rr
!= AXP_REG_T12
)
3204 set_tok_reg (newtok
[0], AXP_REG_T12
);
3205 set_tok_reg (newtok
[1], rr
);
3206 assemble_tokens ("mov", newtok
, 2, 1);
3210 #endif /* !OBJ_EVAX */
3212 /* The jsr and jmp macros differ from their instruction counterparts
3213 in that they can load the target address and default most
3217 emit_jsrjmp (tok
, ntok
, vopname
)
3218 const expressionS
*tok
;
3222 const char *opname
= (const char *) vopname
;
3223 struct alpha_insn insn
;
3224 expressionS newtok
[3];
3225 int r
, tokidx
= 0, lituse
= 0;
3227 if (tokidx
< ntok
&& tok
[tokidx
].X_op
== O_register
)
3228 r
= regno (tok
[tokidx
++].X_add_number
);
3230 r
= strcmp (opname
, "jmp") == 0 ? AXP_REG_ZERO
: AXP_REG_RA
;
3232 set_tok_reg (newtok
[0], r
);
3234 if (tokidx
< ntok
&&
3235 (tok
[tokidx
].X_op
== O_pregister
|| tok
[tokidx
].X_op
== O_cpregister
))
3236 r
= regno (tok
[tokidx
++].X_add_number
);
3238 /* keep register if jsr $n.<sym> */
3242 int basereg
= alpha_gp_register
;
3243 lituse
= load_expression (r
= AXP_REG_PV
, &tok
[tokidx
], &basereg
, NULL
);
3247 set_tok_cpreg (newtok
[1], r
);
3250 /* FIXME: Add hint relocs to BFD for evax. */
3253 newtok
[2] = tok
[tokidx
];
3256 set_tok_const (newtok
[2], 0);
3258 assemble_tokens_to_insn (opname
, newtok
, 3, &insn
);
3260 /* add the LITUSE fixup */
3263 assert (insn
.nfixups
< MAX_INSN_FIXUPS
);
3264 if (insn
.nfixups
> 0)
3266 memmove (&insn
.fixups
[1], &insn
.fixups
[0],
3267 sizeof(struct alpha_fixup
) * insn
.nfixups
);
3270 insn
.fixups
[0].reloc
= BFD_RELOC_ALPHA_LITUSE
;
3271 insn
.fixups
[0].exp
.X_op
= O_constant
;
3272 insn
.fixups
[0].exp
.X_add_number
= 3;
3278 /* The ret and jcr instructions differ from their instruction
3279 counterparts in that everything can be defaulted. */
3282 emit_retjcr (tok
, ntok
, vopname
)
3283 const expressionS
*tok
;
3287 const char *opname
= (const char *)vopname
;
3288 expressionS newtok
[3];
3291 if (tokidx
< ntok
&& tok
[tokidx
].X_op
== O_register
)
3292 r
= regno (tok
[tokidx
++].X_add_number
);
3296 set_tok_reg (newtok
[0], r
);
3298 if (tokidx
< ntok
&&
3299 (tok
[tokidx
].X_op
== O_pregister
|| tok
[tokidx
].X_op
== O_cpregister
))
3300 r
= regno (tok
[tokidx
++].X_add_number
);
3304 set_tok_cpreg (newtok
[1], r
);
3307 newtok
[2] = tok
[tokidx
];
3309 set_tok_const (newtok
[2], strcmp(opname
, "ret") == 0);
3311 assemble_tokens (opname
, newtok
, 3, 0);
3314 /* Assembler directives */
3316 /* Handle the .text pseudo-op. This is like the usual one, but it
3317 clears alpha_insn_label and restores auto alignment. */
3325 alpha_insn_label
= NULL
;
3326 alpha_auto_align_on
= 1;
3327 alpha_current_align
= 0;
3330 /* Handle the .data pseudo-op. This is like the usual one, but it
3331 clears alpha_insn_label and restores auto alignment. */
3338 alpha_insn_label
= NULL
;
3339 alpha_auto_align_on
= 1;
3340 alpha_current_align
= 0;
3343 #if defined (OBJ_ECOFF) || defined (OBJ_EVAX)
3345 /* Handle the OSF/1 and openVMS .comm pseudo quirks.
3346 openVMS constructs a section for every common symbol. */
3349 s_alpha_comm (ignore
)
3352 register char *name
;
3356 register symbolS
*symbolP
;
3359 segT current_section
= now_seg
;
3360 int current_subsec
= now_subseg
;
3364 name
= input_line_pointer
;
3365 c
= get_symbol_end ();
3367 /* just after name is now '\0' */
3368 p
= input_line_pointer
;
3373 /* Alpha OSF/1 compiler doesn't provide the comma, gcc does. */
3374 if (*input_line_pointer
== ',')
3376 input_line_pointer
++;
3379 if ((temp
= get_absolute_expression ()) < 0)
3381 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp
);
3382 ignore_rest_of_line ();
3387 symbolP
= symbol_find_or_make (name
);
3390 /* Make a section for the common symbol. */
3391 new_seg
= subseg_new (xstrdup (name
), 0);
3397 /* alignment might follow */
3398 if (*input_line_pointer
== ',')
3402 input_line_pointer
++;
3403 align
= get_absolute_expression ();
3404 bfd_set_section_alignment (stdoutput
, new_seg
, align
);
3408 if (S_IS_DEFINED (symbolP
) && ! S_IS_COMMON (symbolP
))
3410 as_bad (_("Ignoring attempt to re-define symbol"));
3411 ignore_rest_of_line ();
3416 if (bfd_section_size (stdoutput
, new_seg
) > 0)
3418 if (bfd_section_size (stdoutput
, new_seg
) != temp
)
3419 as_bad (_("Length of .comm \"%s\" is already %ld. Not changed to %ld."),
3420 S_GET_NAME (symbolP
),
3421 (long) bfd_section_size (stdoutput
, new_seg
),
3425 if (S_GET_VALUE (symbolP
))
3427 if (S_GET_VALUE (symbolP
) != (valueT
) temp
)
3428 as_bad (_("Length of .comm \"%s\" is already %ld. Not changed to %ld."),
3429 S_GET_NAME (symbolP
),
3430 (long) S_GET_VALUE (symbolP
),
3437 subseg_set (new_seg
, 0);
3438 p
= frag_more (temp
);
3439 new_seg
->flags
|= SEC_IS_COMMON
;
3440 if (! S_IS_DEFINED (symbolP
))
3441 symbolP
->bsym
->section
= new_seg
;
3443 S_SET_VALUE (symbolP
, (valueT
) temp
);
3445 S_SET_EXTERNAL (symbolP
);
3449 subseg_set (current_section
, current_subsec
);
3452 know (symbolP
->sy_frag
== &zero_address_frag
);
3454 demand_empty_rest_of_line ();
3457 #endif /* ! OBJ_ELF */
3461 /* Handle the .rdata pseudo-op. This is like the usual one, but it
3462 clears alpha_insn_label and restores auto alignment. */
3465 s_alpha_rdata (ignore
)
3470 temp
= get_absolute_expression ();
3471 subseg_new (".rdata", 0);
3472 demand_empty_rest_of_line ();
3473 alpha_insn_label
= NULL
;
3474 alpha_auto_align_on
= 1;
3475 alpha_current_align
= 0;
3482 /* Handle the .sdata pseudo-op. This is like the usual one, but it
3483 clears alpha_insn_label and restores auto alignment. */
3486 s_alpha_sdata (ignore
)
3491 temp
= get_absolute_expression ();
3492 subseg_new (".sdata", 0);
3493 demand_empty_rest_of_line ();
3494 alpha_insn_label
= NULL
;
3495 alpha_auto_align_on
= 1;
3496 alpha_current_align
= 0;
3502 /* Handle the .section pseudo-op. This is like the usual one, but it
3503 clears alpha_insn_label and restores auto alignment. */
3506 s_alpha_section (ignore
)
3509 obj_elf_section (ignore
);
3511 alpha_insn_label
= NULL
;
3512 alpha_auto_align_on
= 1;
3513 alpha_current_align
= 0;
3520 if (ECOFF_DEBUGGING
)
3521 ecoff_directive_ent (0);
3524 char *name
, name_end
;
3525 name
= input_line_pointer
;
3526 name_end
= get_symbol_end ();
3528 if (! is_name_beginner (*name
))
3530 as_warn (_(".ent directive has no name"));
3531 *input_line_pointer
= name_end
;
3537 if (alpha_cur_ent_sym
)
3538 as_warn (_("nested .ent directives"));
3540 sym
= symbol_find_or_make (name
);
3541 sym
->bsym
->flags
|= BSF_FUNCTION
;
3542 alpha_cur_ent_sym
= sym
;
3544 /* The .ent directive is sometimes followed by a number. Not sure
3545 what it really means, but ignore it. */
3546 *input_line_pointer
= name_end
;
3548 if (*input_line_pointer
== ',')
3550 input_line_pointer
++;
3553 if (isdigit (*input_line_pointer
) || *input_line_pointer
== '-')
3554 (void) get_absolute_expression ();
3556 demand_empty_rest_of_line ();
3564 if (ECOFF_DEBUGGING
)
3565 ecoff_directive_end (0);
3568 char *name
, name_end
;
3569 name
= input_line_pointer
;
3570 name_end
= get_symbol_end ();
3572 if (! is_name_beginner (*name
))
3574 as_warn (_(".end directive has no name"));
3575 *input_line_pointer
= name_end
;
3581 sym
= symbol_find (name
);
3582 if (sym
!= alpha_cur_ent_sym
)
3583 as_warn (_(".end directive names different symbol than .ent"));
3585 /* Create an expression to calculate the size of the function. */
3588 sym
->sy_obj
.size
= (expressionS
*) xmalloc (sizeof (expressionS
));
3589 sym
->sy_obj
.size
->X_op
= O_subtract
;
3590 sym
->sy_obj
.size
->X_add_symbol
3591 = symbol_new ("L0\001", now_seg
, frag_now_fix (), frag_now
);
3592 sym
->sy_obj
.size
->X_op_symbol
= sym
;
3593 sym
->sy_obj
.size
->X_add_number
= 0;
3596 alpha_cur_ent_sym
= NULL
;
3598 *input_line_pointer
= name_end
;
3600 demand_empty_rest_of_line ();
3608 if (ECOFF_DEBUGGING
)
3611 ecoff_directive_fmask (0);
3613 ecoff_directive_mask (0);
3616 ignore_rest_of_line ();
3620 s_alpha_frame (dummy
)
3623 if (ECOFF_DEBUGGING
)
3624 ecoff_directive_frame (0);
3626 ignore_rest_of_line ();
3630 s_alpha_prologue (ignore
)
3636 arg
= get_absolute_expression ();
3637 demand_empty_rest_of_line ();
3639 if (ECOFF_DEBUGGING
)
3640 sym
= ecoff_get_cur_proc_sym ();
3642 sym
= alpha_cur_ent_sym
;
3647 case 0: /* No PV required. */
3648 S_SET_OTHER (sym
, STO_ALPHA_NOPV
);
3650 case 1: /* Std GP load. */
3651 S_SET_OTHER (sym
, STO_ALPHA_STD_GPLOAD
);
3653 case 2: /* Non-std use of PV. */
3657 as_bad (_("Invalid argument %d to .prologue."), arg
);
3663 s_alpha_coff_wrapper (which
)
3666 static void (* const fns
[]) PARAMS ((int)) = {
3667 ecoff_directive_begin
,
3668 ecoff_directive_bend
,
3669 ecoff_directive_def
,
3670 ecoff_directive_dim
,
3671 ecoff_directive_endef
,
3672 ecoff_directive_file
,
3673 ecoff_directive_scl
,
3674 ecoff_directive_tag
,
3675 ecoff_directive_val
,
3676 ecoff_directive_loc
,
3679 assert (which
>= 0 && which
< sizeof(fns
)/sizeof(*fns
));
3681 if (ECOFF_DEBUGGING
)
3685 as_bad (_("ECOFF debugging is disabled."));
3686 ignore_rest_of_line ();
3689 #endif /* OBJ_ELF */
3693 /* Handle the section specific pseudo-op. */
3696 s_alpha_section (secid
)
3700 #define EVAX_SECTION_COUNT 5
3701 static char *section_name
[EVAX_SECTION_COUNT
+1] =
3702 { "NULL", ".rdata", ".comm", ".link", ".ctors", ".dtors" };
3704 if ((secid
<= 0) || (secid
> EVAX_SECTION_COUNT
))
3706 as_fatal (_("Unknown section directive"));
3707 demand_empty_rest_of_line ();
3710 temp
= get_absolute_expression ();
3711 subseg_new (section_name
[secid
], 0);
3712 demand_empty_rest_of_line ();
3713 alpha_insn_label
= NULL
;
3714 alpha_auto_align_on
= 1;
3715 alpha_current_align
= 0;
3719 /* Parse .ent directives. */
3722 s_alpha_ent (ignore
)
3726 expressionS symexpr
;
3728 alpha_evax_proc
.pdsckind
= 0;
3729 alpha_evax_proc
.framereg
= -1;
3730 alpha_evax_proc
.framesize
= 0;
3731 alpha_evax_proc
.rsa_offset
= 0;
3732 alpha_evax_proc
.ra_save
= AXP_REG_RA
;
3733 alpha_evax_proc
.fp_save
= -1;
3734 alpha_evax_proc
.imask
= 0;
3735 alpha_evax_proc
.fmask
= 0;
3736 alpha_evax_proc
.prologue
= 0;
3737 alpha_evax_proc
.type
= 0;
3739 expression (&symexpr
);
3741 if (symexpr
.X_op
!= O_symbol
)
3743 as_fatal (_(".ent directive has no symbol"));
3744 demand_empty_rest_of_line ();
3748 symbol
= make_expr_symbol (&symexpr
);
3749 symbol
->bsym
->flags
|= BSF_FUNCTION
;
3750 alpha_evax_proc
.symbol
= symbol
;
3752 demand_empty_rest_of_line ();
3757 /* Parse .frame <framreg>,<framesize>,RA,<rsa_offset> directives. */
3760 s_alpha_frame (ignore
)
3765 alpha_evax_proc
.framereg
= tc_get_register (1);
3768 if (*input_line_pointer
++ != ','
3769 || get_absolute_expression_and_terminator (&val
) != ',')
3771 as_warn (_("Bad .frame directive 1./2. param"));
3772 --input_line_pointer
;
3773 demand_empty_rest_of_line ();
3777 alpha_evax_proc
.framesize
= val
;
3779 (void) tc_get_register (1);
3781 if (*input_line_pointer
++ != ',')
3783 as_warn (_("Bad .frame directive 3./4. param"));
3784 --input_line_pointer
;
3785 demand_empty_rest_of_line ();
3788 alpha_evax_proc
.rsa_offset
= get_absolute_expression ();
3794 s_alpha_pdesc (ignore
)
3804 segment_info_type
*seginfo
= seg_info (alpha_link_section
);
3806 if (now_seg
!= alpha_link_section
)
3808 as_bad (_(".pdesc directive not in link (.link) section"));
3809 demand_empty_rest_of_line ();
3813 if ((alpha_evax_proc
.symbol
== 0)
3814 || (!S_IS_DEFINED (alpha_evax_proc
.symbol
)))
3816 as_fatal (_(".pdesc has no matching .ent"));
3817 demand_empty_rest_of_line ();
3821 alpha_evax_proc
.symbol
->sy_obj
= (valueT
)seginfo
->literal_pool_size
;
3824 if (exp
.X_op
!= O_symbol
)
3826 as_warn (_(".pdesc directive has no entry symbol"));
3827 demand_empty_rest_of_line ();
3831 entry_sym
= make_expr_symbol (&exp
);
3832 /* Save bfd symbol of proc desc in function symbol. */
3833 alpha_evax_proc
.symbol
->bsym
->udata
.p
= (PTR
)entry_sym
->bsym
;
3836 if (*input_line_pointer
++ != ',')
3838 as_warn (_("No comma after .pdesc <entryname>"));
3839 demand_empty_rest_of_line ();
3844 name
= input_line_pointer
;
3845 name_end
= get_symbol_end ();
3847 if (strncmp(name
, "stack", 5) == 0)
3849 alpha_evax_proc
.pdsckind
= PDSC_S_K_KIND_FP_STACK
;
3851 else if (strncmp(name
, "reg", 3) == 0)
3853 alpha_evax_proc
.pdsckind
= PDSC_S_K_KIND_FP_REGISTER
;
3855 else if (strncmp(name
, "null", 4) == 0)
3857 alpha_evax_proc
.pdsckind
= PDSC_S_K_KIND_NULL
;
3861 as_fatal (_("unknown procedure kind"));
3862 demand_empty_rest_of_line ();
3866 *input_line_pointer
= name_end
;
3867 demand_empty_rest_of_line ();
3869 #ifdef md_flush_pending_output
3870 md_flush_pending_output ();
3873 frag_align (3, 0, 0);
3875 fixp
= fix_new (frag_now
, p
- frag_now
->fr_literal
, 8, 0, 0, 0, 0);
3877 seginfo
->literal_pool_size
+= 16;
3879 *p
= alpha_evax_proc
.pdsckind
3880 | ((alpha_evax_proc
.framereg
== 29) ? PDSC_S_M_BASE_REG_IS_FP
: 0);
3881 *(p
+1) = PDSC_S_M_NATIVE
3882 | PDSC_S_M_NO_JACKET
;
3884 switch (alpha_evax_proc
.pdsckind
)
3886 case PDSC_S_K_KIND_NULL
:
3890 case PDSC_S_K_KIND_FP_REGISTER
:
3891 *(p
+2) = alpha_evax_proc
.fp_save
;
3892 *(p
+3) = alpha_evax_proc
.ra_save
;
3894 case PDSC_S_K_KIND_FP_STACK
:
3895 md_number_to_chars (p
+2, (valueT
)alpha_evax_proc
.rsa_offset
, 2);
3897 default: /* impossible */
3902 *(p
+5) = alpha_evax_proc
.type
& 0x0f;
3904 /* Signature offset. */
3905 md_number_to_chars (p
+6, (valueT
)0, 2);
3907 fix_new_exp (frag_now
, p
-frag_now
->fr_literal
+8, 8, &exp
, 0, BFD_RELOC_64
);
3909 if (alpha_evax_proc
.pdsckind
== PDSC_S_K_KIND_NULL
)
3912 /* Add dummy fix to make add_to_link_pool work. */
3914 fixp
= fix_new (frag_now
, p
- frag_now
->fr_literal
, 8, 0, 0, 0, 0);
3916 seginfo
->literal_pool_size
+= 8;
3918 /* pdesc+16: Size. */
3919 md_number_to_chars (p
, (valueT
)alpha_evax_proc
.framesize
, 4);
3921 md_number_to_chars (p
+4, (valueT
)0, 2);
3924 md_number_to_chars (p
+6, alpha_evax_proc
.prologue
, 2);
3926 if (alpha_evax_proc
.pdsckind
== PDSC_S_K_KIND_FP_REGISTER
)
3929 /* Add dummy fix to make add_to_link_pool work. */
3931 fixp
= fix_new (frag_now
, p
- frag_now
->fr_literal
, 8, 0, 0, 0, 0);
3933 seginfo
->literal_pool_size
+= 8;
3935 /* pdesc+24: register masks. */
3937 md_number_to_chars (p
, alpha_evax_proc
.imask
, 4);
3938 md_number_to_chars (p
+4, alpha_evax_proc
.fmask
, 4);
3944 /* Support for crash debug on vms. */
3947 s_alpha_name (ignore
)
3952 segment_info_type
*seginfo
= seg_info (alpha_link_section
);
3954 if (now_seg
!= alpha_link_section
)
3956 as_bad (_(".name directive not in link (.link) section"));
3957 demand_empty_rest_of_line ();
3962 if (exp
.X_op
!= O_symbol
)
3964 as_warn (_(".name directive has no symbol"));
3965 demand_empty_rest_of_line ();
3969 demand_empty_rest_of_line ();
3971 #ifdef md_flush_pending_output
3972 md_flush_pending_output ();
3975 frag_align (3, 0, 0);
3977 seginfo
->literal_pool_size
+= 8;
3979 fix_new_exp (frag_now
, p
-frag_now
->fr_literal
, 8, &exp
, 0, BFD_RELOC_64
);
3986 s_alpha_linkage (ignore
)
3992 #ifdef md_flush_pending_output
3993 md_flush_pending_output ();
3997 if (exp
.X_op
!= O_symbol
)
3999 as_fatal (_("No symbol after .linkage"));
4003 p
= frag_more (LKP_S_K_SIZE
);
4004 memset (p
, 0, LKP_S_K_SIZE
);
4005 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
, LKP_S_K_SIZE
, &exp
, 0,\
4006 BFD_RELOC_ALPHA_LINKAGE
);
4008 demand_empty_rest_of_line ();
4015 s_alpha_code_address (ignore
)
4021 #ifdef md_flush_pending_output
4022 md_flush_pending_output ();
4026 if (exp
.X_op
!= O_symbol
)
4028 as_fatal (_("No symbol after .code_address"));
4034 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
, 8, &exp
, 0,\
4035 BFD_RELOC_ALPHA_CODEADDR
);
4037 demand_empty_rest_of_line ();
4044 s_alpha_fp_save (ignore
)
4048 alpha_evax_proc
.fp_save
= tc_get_register (1);
4050 demand_empty_rest_of_line ();
4056 s_alpha_mask (ignore
)
4061 if (get_absolute_expression_and_terminator (&val
) != ',')
4063 as_warn (_("Bad .mask directive"));
4064 --input_line_pointer
;
4068 alpha_evax_proc
.imask
= val
;
4069 (void)get_absolute_expression ();
4071 demand_empty_rest_of_line ();
4078 s_alpha_fmask (ignore
)
4083 if (get_absolute_expression_and_terminator (&val
) != ',')
4085 as_warn (_("Bad .fmask directive"));
4086 --input_line_pointer
;
4090 alpha_evax_proc
.fmask
= val
;
4091 (void) get_absolute_expression ();
4093 demand_empty_rest_of_line ();
4099 s_alpha_end (ignore
)
4104 c
= get_symbol_end ();
4105 *input_line_pointer
= c
;
4106 demand_empty_rest_of_line ();
4107 alpha_evax_proc
.symbol
= 0;
4114 s_alpha_file (ignore
)
4119 static char case_hack
[32];
4121 extern char *demand_copy_string
PARAMS ((int *lenP
));
4123 sprintf (case_hack
, "<CASE:%01d%01d>",
4124 alpha_flag_hash_long_names
, alpha_flag_show_after_trunc
);
4126 s
= symbol_find_or_make (case_hack
);
4127 s
->bsym
->flags
|= BSF_FILE
;
4129 get_absolute_expression ();
4130 s
= symbol_find_or_make (demand_copy_string (&length
));
4131 s
->bsym
->flags
|= BSF_FILE
;
4132 demand_empty_rest_of_line ();
4136 #endif /* OBJ_EVAX */
4138 /* Handle the .gprel32 pseudo op. */
4141 s_alpha_gprel32 (ignore
)
4154 e
.X_add_symbol
= section_symbol(absolute_section
);
4167 e
.X_add_symbol
= section_symbol (absolute_section
);
4170 e
.X_op
= O_subtract
;
4171 e
.X_op_symbol
= alpha_gp_symbol
;
4179 if (alpha_auto_align_on
&& alpha_current_align
< 2)
4180 alpha_align (2, (char *) NULL
, alpha_insn_label
, 0);
4181 if (alpha_current_align
> 2)
4182 alpha_current_align
= 2;
4183 alpha_insn_label
= NULL
;
4187 fix_new_exp (frag_now
, p
-frag_now
->fr_literal
, 4,
4188 &e
, 0, BFD_RELOC_GPREL32
);
4191 /* Handle floating point allocation pseudo-ops. This is like the
4192 generic vresion, but it makes sure the current label, if any, is
4193 correctly aligned. */
4196 s_alpha_float_cons (type
)
4223 if (alpha_auto_align_on
&& alpha_current_align
< log_size
)
4224 alpha_align (log_size
, (char *) NULL
, alpha_insn_label
, 0);
4225 if (alpha_current_align
> log_size
)
4226 alpha_current_align
= log_size
;
4227 alpha_insn_label
= NULL
;
4232 /* Handle the .proc pseudo op. We don't really do much with it except
4236 s_alpha_proc (is_static
)
4245 /* Takes ".proc name,nargs" */
4247 name
= input_line_pointer
;
4248 c
= get_symbol_end ();
4249 p
= input_line_pointer
;
4250 symbolP
= symbol_find_or_make (name
);
4253 if (*input_line_pointer
!= ',')
4256 as_warn (_("Expected comma after name \"%s\""), name
);
4259 ignore_rest_of_line ();
4263 input_line_pointer
++;
4264 temp
= get_absolute_expression ();
4266 /* symbolP->sy_other = (signed char) temp; */
4267 as_warn (_("unhandled: .proc %s,%d"), name
, temp
);
4268 demand_empty_rest_of_line ();
4271 /* Handle the .set pseudo op. This is used to turn on and off most of
4272 the assembler features. */
4282 name
= input_line_pointer
;
4283 ch
= get_symbol_end ();
4286 if (s
[0] == 'n' && s
[1] == 'o')
4291 if (!strcmp ("reorder", s
))
4293 else if (!strcmp ("at", s
))
4294 alpha_noat_on
= !yesno
;
4295 else if (!strcmp ("macro", s
))
4296 alpha_macros_on
= yesno
;
4297 else if (!strcmp ("move", s
))
4299 else if (!strcmp ("volatile", s
))
4302 as_warn (_("Tried to .set unrecognized mode `%s'"), name
);
4304 *input_line_pointer
= ch
;
4305 demand_empty_rest_of_line ();
4308 /* Handle the .base pseudo op. This changes the assembler's notion of
4309 the $gp register. */
4312 s_alpha_base (ignore
)
4316 if (first_32bit_quadrant
)
4318 /* not fatal, but it might not work in the end */
4319 as_warn (_("File overrides no-base-register option."));
4320 first_32bit_quadrant
= 0;
4325 if (*input_line_pointer
== '$')
4327 input_line_pointer
++;
4328 if (*input_line_pointer
== 'r')
4329 input_line_pointer
++;
4332 alpha_gp_register
= get_absolute_expression ();
4333 if (alpha_gp_register
< 0 || alpha_gp_register
> 31)
4335 alpha_gp_register
= AXP_REG_GP
;
4336 as_warn (_("Bad base register, using $%d."), alpha_gp_register
);
4339 demand_empty_rest_of_line ();
4342 /* Handle the .align pseudo-op. This aligns to a power of two. It
4343 also adjusts any current instruction label. We treat this the same
4344 way the MIPS port does: .align 0 turns off auto alignment. */
4347 s_alpha_align (ignore
)
4352 long max_alignment
= 15;
4354 align
= get_absolute_expression ();
4355 if (align
> max_alignment
)
4357 align
= max_alignment
;
4358 as_bad (_("Alignment too large: %d. assumed"), align
);
4362 as_warn (_("Alignment negative: 0 assumed"));
4366 if (*input_line_pointer
== ',')
4368 input_line_pointer
++;
4369 fill
= get_absolute_expression ();
4377 alpha_auto_align_on
= 1;
4378 alpha_align (align
, pfill
, alpha_insn_label
, 1);
4382 alpha_auto_align_on
= 0;
4385 demand_empty_rest_of_line ();
4388 /* Hook the normal string processor to reset known alignment. */
4391 s_alpha_stringer (terminate
)
4394 alpha_current_align
= 0;
4395 alpha_insn_label
= NULL
;
4396 stringer (terminate
);
4399 /* Hook the normal space processing to reset known alignment. */
4402 s_alpha_space (ignore
)
4405 alpha_current_align
= 0;
4406 alpha_insn_label
= NULL
;
4410 /* Hook into cons for auto-alignment. */
4413 alpha_cons_align (size
)
4419 while ((size
>>= 1) != 0)
4422 if (alpha_auto_align_on
&& alpha_current_align
< log_size
)
4423 alpha_align (log_size
, (char *) NULL
, alpha_insn_label
, 0);
4424 if (alpha_current_align
> log_size
)
4425 alpha_current_align
= log_size
;
4426 alpha_insn_label
= NULL
;
4429 /* Here come the .uword, .ulong, and .uquad explicitly unaligned
4430 pseudos. We just turn off auto-alignment and call down to cons. */
4433 s_alpha_ucons (bytes
)
4436 int hold
= alpha_auto_align_on
;
4437 alpha_auto_align_on
= 0;
4439 alpha_auto_align_on
= hold
;
4442 /* Switch the working cpu type. */
4445 s_alpha_arch (ignored
)
4449 const struct cpu_type
*p
;
4452 name
= input_line_pointer
;
4453 ch
= get_symbol_end ();
4455 for (p
= cpu_types
; p
->name
; ++p
)
4456 if (strcmp(name
, p
->name
) == 0)
4458 alpha_target_name
= p
->name
, alpha_target
= p
->flags
;
4461 as_warn("Unknown CPU identifier `%s'", name
);
4464 *input_line_pointer
= ch
;
4465 demand_empty_rest_of_line ();
4471 /* print token expression with alpha specific extension. */
4474 alpha_print_token(f
, exp
)
4476 const expressionS
*exp
;
4486 expressionS nexp
= *exp
;
4487 nexp
.X_op
= O_register
;
4488 print_expr (f
, &nexp
);
4493 print_expr (f
, exp
);
4500 /* The target specific pseudo-ops which we support. */
4502 const pseudo_typeS md_pseudo_table
[] =
4505 {"comm", s_alpha_comm
, 0}, /* osf1 compiler does this */
4506 {"rdata", s_alpha_rdata
, 0},
4508 {"text", s_alpha_text
, 0},
4509 {"data", s_alpha_data
, 0},
4511 {"sdata", s_alpha_sdata
, 0},
4514 {"section", s_alpha_section
, 0},
4515 {"section.s", s_alpha_section
, 0},
4516 {"sect", s_alpha_section
, 0},
4517 {"sect.s", s_alpha_section
, 0},
4520 { "pdesc", s_alpha_pdesc
, 0},
4521 { "name", s_alpha_name
, 0},
4522 { "linkage", s_alpha_linkage
, 0},
4523 { "code_address", s_alpha_code_address
, 0},
4524 { "ent", s_alpha_ent
, 0},
4525 { "frame", s_alpha_frame
, 0},
4526 { "fp_save", s_alpha_fp_save
, 0},
4527 { "mask", s_alpha_mask
, 0},
4528 { "fmask", s_alpha_fmask
, 0},
4529 { "end", s_alpha_end
, 0},
4530 { "file", s_alpha_file
, 0},
4531 { "rdata", s_alpha_section
, 1},
4532 { "comm", s_alpha_comm
, 0},
4533 { "link", s_alpha_section
, 3},
4534 { "ctors", s_alpha_section
, 4},
4535 { "dtors", s_alpha_section
, 5},
4538 /* Frame related pseudos. */
4539 {"ent", s_alpha_ent
, 0},
4540 {"end", s_alpha_end
, 0},
4541 {"mask", s_alpha_mask
, 0},
4542 {"fmask", s_alpha_mask
, 1},
4543 {"frame", s_alpha_frame
, 0},
4544 {"prologue", s_alpha_prologue
, 0},
4545 /* COFF debugging related pseudos. */
4546 {"begin", s_alpha_coff_wrapper
, 0},
4547 {"bend", s_alpha_coff_wrapper
, 1},
4548 {"def", s_alpha_coff_wrapper
, 2},
4549 {"dim", s_alpha_coff_wrapper
, 3},
4550 {"endef", s_alpha_coff_wrapper
, 4},
4551 {"file", s_alpha_coff_wrapper
, 5},
4552 {"scl", s_alpha_coff_wrapper
, 6},
4553 {"tag", s_alpha_coff_wrapper
, 7},
4554 {"val", s_alpha_coff_wrapper
, 8},
4555 {"loc", s_alpha_coff_wrapper
, 9},
4557 {"prologue", s_ignore
, 0},
4559 {"gprel32", s_alpha_gprel32
, 0},
4560 {"t_floating", s_alpha_float_cons
, 'd'},
4561 {"s_floating", s_alpha_float_cons
, 'f'},
4562 {"f_floating", s_alpha_float_cons
, 'F'},
4563 {"g_floating", s_alpha_float_cons
, 'G'},
4564 {"d_floating", s_alpha_float_cons
, 'D'},
4566 {"proc", s_alpha_proc
, 0},
4567 {"aproc", s_alpha_proc
, 1},
4568 {"set", s_alpha_set
, 0},
4569 {"reguse", s_ignore
, 0},
4570 {"livereg", s_ignore
, 0},
4571 {"base", s_alpha_base
, 0}, /*??*/
4572 {"option", s_ignore
, 0},
4573 {"aent", s_ignore
, 0},
4574 {"ugen", s_ignore
, 0},
4575 {"eflag", s_ignore
, 0},
4577 {"align", s_alpha_align
, 0},
4578 {"double", s_alpha_float_cons
, 'd'},
4579 {"float", s_alpha_float_cons
, 'f'},
4580 {"single", s_alpha_float_cons
, 'f'},
4581 {"ascii", s_alpha_stringer
, 0},
4582 {"asciz", s_alpha_stringer
, 1},
4583 {"string", s_alpha_stringer
, 1},
4584 {"space", s_alpha_space
, 0},
4585 {"skip", s_alpha_space
, 0},
4586 {"zero", s_alpha_space
, 0},
4588 /* Unaligned data pseudos. */
4589 {"uword", s_alpha_ucons
, 2},
4590 {"ulong", s_alpha_ucons
, 4},
4591 {"uquad", s_alpha_ucons
, 8},
4594 /* Dwarf wants these versions of unaligned. */
4595 {"2byte", s_alpha_ucons
, 2},
4596 {"4byte", s_alpha_ucons
, 4},
4597 {"8byte", s_alpha_ucons
, 8},
4600 /* We don't do any optimizing, so we can safely ignore these. */
4601 {"noalias", s_ignore
, 0},
4602 {"alias", s_ignore
, 0},
4604 {"arch", s_alpha_arch
, 0},
4610 /* Build a BFD section with its flags set appropriately for the .lita,
4611 .lit8, or .lit4 sections. */
4614 create_literal_section (name
, secp
, symp
)
4619 segT current_section
= now_seg
;
4620 int current_subsec
= now_subseg
;
4623 *secp
= new_sec
= subseg_new (name
, 0);
4624 subseg_set (current_section
, current_subsec
);
4625 bfd_set_section_alignment (stdoutput
, new_sec
, 4);
4626 bfd_set_section_flags (stdoutput
, new_sec
,
4627 SEC_RELOC
| SEC_ALLOC
| SEC_LOAD
| SEC_READONLY
4630 S_CLEAR_EXTERNAL (*symp
= section_symbol (new_sec
));
4635 /* @@@ GP selection voodoo. All of this seems overly complicated and
4636 unnecessary; which is the primary reason it's for ECOFF only. */
4645 vma
= bfd_get_section_vma (foo
, sec
);
4646 if (vma
&& vma
< alpha_gp_value
)
4647 alpha_gp_value
= vma
;
4653 assert (alpha_gp_value
== 0);
4655 /* Get minus-one in whatever width... */
4656 alpha_gp_value
= 0; alpha_gp_value
--;
4658 /* Select the smallest VMA of these existing sections. */
4659 maybe_set_gp (alpha_lita_section
);
4661 /* These were disabled before -- should we use them? */
4662 maybe_set_gp (sdata
);
4663 maybe_set_gp (lit8_sec
);
4664 maybe_set_gp (lit4_sec
);
4667 /* @@ Will a simple 0x8000 work here? If not, why not? */
4668 #define GP_ADJUSTMENT (0x8000 - 0x10)
4670 alpha_gp_value
+= GP_ADJUSTMENT
;
4672 S_SET_VALUE (alpha_gp_symbol
, alpha_gp_value
);
4675 printf (_("Chose GP value of %lx\n"), alpha_gp_value
);
4678 #endif /* OBJ_ECOFF */
4680 /* Called internally to handle all alignment needs. This takes care
4681 of eliding calls to frag_align if'n the cached current alignment
4682 says we've already got it, as well as taking care of the auto-align
4683 feature wrt labels. */
4686 alpha_align (n
, pfill
, label
, force
)
4692 if (alpha_current_align
>= n
)
4698 && (bfd_get_section_flags (stdoutput
, now_seg
) & SEC_CODE
) != 0)
4700 static char const unop
[4] = { 0x00, 0x00, 0xe0, 0x2f };
4701 static char const nopunop
[8] = {
4702 0x1f, 0x04, 0xff, 0x47,
4703 0x00, 0x00, 0xe0, 0x2f
4706 /* First, make sure we're on a four-byte boundary, in case
4707 someone has been putting .byte values into the text
4708 section. The DEC assembler silently fills with unaligned
4709 no-op instructions. This will zero-fill, then nop-fill
4710 with proper alignment. */
4711 if (alpha_current_align
< 2)
4712 frag_align (2, 0, 0);
4713 if (alpha_current_align
< 3)
4714 frag_align_pattern (3, unop
, sizeof unop
, 0);
4716 frag_align_pattern (n
, nopunop
, sizeof nopunop
, 0);
4719 frag_align (n
, 0, 0);
4722 frag_align (n
, *pfill
, 0);
4724 alpha_current_align
= n
;
4728 assert (S_GET_SEGMENT (label
) == now_seg
);
4729 label
->sy_frag
= frag_now
;
4730 S_SET_VALUE (label
, (valueT
) frag_now_fix ());
4733 record_alignment(now_seg
, n
);
4735 /* ??? if alpha_flag_relax && force && elf, record the requested alignment
4736 in a reloc for the linker to see. */
4739 /* The Alpha has support for some VAX floating point types, as well as for
4740 IEEE floating point. We consider IEEE to be the primary floating point
4741 format, and sneak in the VAX floating point support here. */
4742 #define md_atof vax_md_atof
4743 #include "config/atof-vax.c"