1 /* tc-avr.c -- Assembler code for the ATMEL AVR
3 Copyright 1999, 2000, 2001, 2002, 2004, 2005, 2006, 2007
4 Free Software Foundation, Inc.
5 Contributed by Denis Chertykov <denisc@overta.ru>
7 This file is part of GAS, the GNU Assembler.
9 GAS is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3, or (at your option)
14 GAS is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with GAS; see the file COPYING. If not, write to
21 the Free Software Foundation, 51 Franklin Street - Fifth Floor,
22 Boston, MA 02110-1301, USA. */
25 #include "safe-ctype.h"
32 int insn_size
; /* In words. */
34 unsigned int bin_opcode
;
37 #define AVR_INSN(NAME, CONSTR, OPCODE, SIZE, ISA, BIN) \
38 {#NAME, CONSTR, SIZE, ISA, BIN},
40 struct avr_opcodes_s avr_opcodes
[] =
42 #include "opcode/avr.h"
46 const char comment_chars
[] = ";";
47 const char line_comment_chars
[] = "#";
48 const char line_separator_chars
[] = "$";
50 const char *md_shortopts
= "m:";
58 /* XXX - devices that don't seem to exist (renamed, replaced with larger
59 ones, or planned but never produced), left here for compatibility.
60 TODO: hide them in show_mcu_list output? */
62 static struct mcu_type_s mcu_types
[] =
64 {"avr1", AVR_ISA_TINY1
, bfd_mach_avr1
},
65 {"avr2", AVR_ISA_TINY2
, bfd_mach_avr2
},
66 {"avr3", AVR_ISA_AVR3
, bfd_mach_avr3
},
67 {"avr4", AVR_ISA_M8
, bfd_mach_avr4
},
68 {"avr5", AVR_ISA_ALL
, bfd_mach_avr5
},
69 {"avr6", AVR_ISA_ALL
, bfd_mach_avr6
},
70 {"at90s1200", AVR_ISA_1200
, bfd_mach_avr1
},
71 {"attiny11", AVR_ISA_TINY1
, bfd_mach_avr1
},
72 {"attiny12", AVR_ISA_TINY1
, bfd_mach_avr1
},
73 {"attiny15", AVR_ISA_TINY1
, bfd_mach_avr1
},
74 {"attiny28", AVR_ISA_TINY1
, bfd_mach_avr1
},
75 {"at90s2313", AVR_ISA_2xxx
, bfd_mach_avr2
},
76 {"at90s2323", AVR_ISA_2xxx
, bfd_mach_avr2
},
77 {"at90s2333", AVR_ISA_2xxx
, bfd_mach_avr2
}, /* XXX -> 4433 */
78 {"at90s2343", AVR_ISA_2xxx
, bfd_mach_avr2
},
79 {"attiny22", AVR_ISA_2xxx
, bfd_mach_avr2
}, /* XXX -> 2343 */
80 {"attiny26", AVR_ISA_2xxx
, bfd_mach_avr2
},
81 {"at90s4433", AVR_ISA_2xxx
, bfd_mach_avr2
},
82 {"at90s4414", AVR_ISA_2xxx
, bfd_mach_avr2
}, /* XXX -> 8515 */
83 {"at90s4434", AVR_ISA_2xxx
, bfd_mach_avr2
}, /* XXX -> 8535 */
84 {"at90s8515", AVR_ISA_2xxx
, bfd_mach_avr2
},
85 {"at90s8535", AVR_ISA_2xxx
, bfd_mach_avr2
},
86 {"at90c8534", AVR_ISA_2xxx
, bfd_mach_avr2
},
87 {"at86rf401", AVR_ISA_RF401
, bfd_mach_avr2
},
88 {"attiny13", AVR_ISA_TINY2
, bfd_mach_avr2
},
89 {"attiny2313", AVR_ISA_TINY2
, bfd_mach_avr2
},
90 {"attiny261", AVR_ISA_TINY2
, bfd_mach_avr2
},
91 {"attiny461", AVR_ISA_TINY2
, bfd_mach_avr2
},
92 {"attiny861", AVR_ISA_TINY2
, bfd_mach_avr2
},
93 {"attiny24", AVR_ISA_TINY2
, bfd_mach_avr2
},
94 {"attiny44", AVR_ISA_TINY2
, bfd_mach_avr2
},
95 {"attiny84", AVR_ISA_TINY2
, bfd_mach_avr2
},
96 {"attiny25", AVR_ISA_TINY2
, bfd_mach_avr2
},
97 {"attiny45", AVR_ISA_TINY2
, bfd_mach_avr2
},
98 {"attiny85", AVR_ISA_TINY2
, bfd_mach_avr2
},
99 {"attiny43u", AVR_ISA_TINY2
, bfd_mach_avr2
},
100 {"attiny48", AVR_ISA_TINY2
, bfd_mach_avr2
},
101 {"attiny88", AVR_ISA_TINY2
, bfd_mach_avr2
},
102 {"atmega103", AVR_ISA_M103
, bfd_mach_avr3
},
103 {"at43usb320", AVR_ISA_M103
, bfd_mach_avr3
},
104 {"at43usb355", AVR_ISA_M603
, bfd_mach_avr3
},
105 {"at76c711", AVR_ISA_M603
, bfd_mach_avr3
},
106 {"at90usb82", AVR_ISA_USB162
, bfd_mach_avr3
},
107 {"at90usb162", AVR_ISA_USB162
, bfd_mach_avr3
},
108 {"atmega48", AVR_ISA_PWMx
, bfd_mach_avr4
},
109 {"atmega48p", AVR_ISA_PWMx
, bfd_mach_avr4
},
110 {"atmega8", AVR_ISA_M8
, bfd_mach_avr4
},
111 {"atmega88", AVR_ISA_PWMx
, bfd_mach_avr4
},
112 {"atmega88p", AVR_ISA_PWMx
, bfd_mach_avr4
},
113 {"atmega8515", AVR_ISA_M8
, bfd_mach_avr4
},
114 {"atmega8535", AVR_ISA_M8
, bfd_mach_avr4
},
115 {"atmega8hva", AVR_ISA_PWMx
, bfd_mach_avr4
},
116 {"at90pwm1", AVR_ISA_PWMx
, bfd_mach_avr4
},
117 {"at90pwm2", AVR_ISA_PWMx
, bfd_mach_avr4
},
118 {"at90pwm2b", AVR_ISA_PWMx
, bfd_mach_avr4
},
119 {"at90pwm3", AVR_ISA_PWMx
, bfd_mach_avr4
},
120 {"at90pwm3b", AVR_ISA_PWMx
, bfd_mach_avr4
},
121 {"atmega16", AVR_ISA_M323
, bfd_mach_avr5
},
122 {"atmega161", AVR_ISA_M161
, bfd_mach_avr5
},
123 {"atmega162", AVR_ISA_M323
, bfd_mach_avr5
},
124 {"atmega163", AVR_ISA_M161
, bfd_mach_avr5
},
125 {"atmega164p", AVR_ISA_M323
, bfd_mach_avr5
},
126 {"atmega165", AVR_ISA_M323
, bfd_mach_avr5
},
127 {"atmega165p", AVR_ISA_M323
, bfd_mach_avr5
},
128 {"atmega168", AVR_ISA_M323
, bfd_mach_avr5
},
129 {"atmega168p", AVR_ISA_M323
, bfd_mach_avr5
},
130 {"atmega169", AVR_ISA_M323
, bfd_mach_avr5
},
131 {"atmega169p", AVR_ISA_M323
, bfd_mach_avr5
},
132 {"atmega32", AVR_ISA_M323
, bfd_mach_avr5
},
133 {"atmega323", AVR_ISA_M323
, bfd_mach_avr5
},
134 {"atmega324p", AVR_ISA_M323
, bfd_mach_avr5
},
135 {"atmega325", AVR_ISA_M323
, bfd_mach_avr5
},
136 {"atmega325p", AVR_ISA_M323
, bfd_mach_avr5
},
137 {"atmega328p", AVR_ISA_M323
, bfd_mach_avr5
},
138 {"atmega329", AVR_ISA_M323
, bfd_mach_avr5
},
139 {"atmega329p", AVR_ISA_M323
, bfd_mach_avr5
},
140 {"atmega3250", AVR_ISA_M323
, bfd_mach_avr5
},
141 {"atmega3250p",AVR_ISA_M323
, bfd_mach_avr5
},
142 {"atmega3290", AVR_ISA_M323
, bfd_mach_avr5
},
143 {"atmega3290p",AVR_ISA_M323
, bfd_mach_avr5
},
144 {"atmega32hvb",AVR_ISA_M323
, bfd_mach_avr5
},
145 {"atmega406", AVR_ISA_M323
, bfd_mach_avr5
},
146 {"atmega64", AVR_ISA_M323
, bfd_mach_avr5
},
147 {"atmega640", AVR_ISA_M323
, bfd_mach_avr5
},
148 {"atmega644", AVR_ISA_M323
, bfd_mach_avr5
},
149 {"atmega644p", AVR_ISA_M323
, bfd_mach_avr5
},
150 {"atmega128", AVR_ISA_M128
, bfd_mach_avr5
},
151 {"atmega1280", AVR_ISA_M128
, bfd_mach_avr5
},
152 {"atmega1281", AVR_ISA_M128
, bfd_mach_avr5
},
153 {"atmega1284p",AVR_ISA_M128
, bfd_mach_avr5
},
154 {"atmega645", AVR_ISA_M323
, bfd_mach_avr5
},
155 {"atmega649", AVR_ISA_M323
, bfd_mach_avr5
},
156 {"atmega6450", AVR_ISA_M323
, bfd_mach_avr5
},
157 {"atmega6490", AVR_ISA_M323
, bfd_mach_avr5
},
158 {"atmega16hva",AVR_ISA_M323
, bfd_mach_avr5
},
159 {"at90can32" , AVR_ISA_M323
, bfd_mach_avr5
},
160 {"at90can64" , AVR_ISA_M323
, bfd_mach_avr5
},
161 {"at90can128", AVR_ISA_M128
, bfd_mach_avr5
},
162 {"at90pwm216", AVR_ISA_M323
, bfd_mach_avr5
},
163 {"at90pwm316", AVR_ISA_M323
, bfd_mach_avr5
},
164 {"at90usb646", AVR_ISA_M323
, bfd_mach_avr5
},
165 {"at90usb647", AVR_ISA_M323
, bfd_mach_avr5
},
166 {"at90usb1286",AVR_ISA_M128
, bfd_mach_avr5
},
167 {"at90usb1287",AVR_ISA_M128
, bfd_mach_avr5
},
168 {"at94k", AVR_ISA_94K
, bfd_mach_avr5
},
169 {"atmega2560", AVR_ISA_ALL
, bfd_mach_avr6
},
170 {"atmega2561", AVR_ISA_ALL
, bfd_mach_avr6
},
174 /* Current MCU type. */
175 static struct mcu_type_s default_mcu
= {"avr2", AVR_ISA_2xxx
,bfd_mach_avr2
};
176 static struct mcu_type_s
* avr_mcu
= & default_mcu
;
178 /* AVR target-specific switches. */
181 int all_opcodes
; /* -mall-opcodes: accept all known AVR opcodes. */
182 int no_skip_bug
; /* -mno-skip-bug: no warnings for skipping 2-word insns. */
183 int no_wrap
; /* -mno-wrap: reject rjmp/rcall with 8K wrap-around. */
186 static struct avr_opt_s avr_opt
= { 0, 0, 0 };
188 const char EXP_CHARS
[] = "eE";
189 const char FLT_CHARS
[] = "dD";
191 static void avr_set_arch (int);
193 /* The target specific pseudo-ops which we support. */
194 const pseudo_typeS md_pseudo_table
[] =
196 {"arch", avr_set_arch
, 0},
200 #define LDI_IMMEDIATE(x) (((x) & 0xf) | (((x) << 4) & 0xf00))
202 #define EXP_MOD_NAME(i) exp_mod[i].name
203 #define EXP_MOD_RELOC(i) exp_mod[i].reloc
204 #define EXP_MOD_NEG_RELOC(i) exp_mod[i].neg_reloc
205 #define HAVE_PM_P(i) exp_mod[i].have_pm
210 bfd_reloc_code_real_type reloc
;
211 bfd_reloc_code_real_type neg_reloc
;
215 static struct exp_mod_s exp_mod
[] =
217 {"hh8", BFD_RELOC_AVR_HH8_LDI
, BFD_RELOC_AVR_HH8_LDI_NEG
, 1},
218 {"pm_hh8", BFD_RELOC_AVR_HH8_LDI_PM
, BFD_RELOC_AVR_HH8_LDI_PM_NEG
, 0},
219 {"hi8", BFD_RELOC_AVR_HI8_LDI
, BFD_RELOC_AVR_HI8_LDI_NEG
, 1},
220 {"pm_hi8", BFD_RELOC_AVR_HI8_LDI_PM
, BFD_RELOC_AVR_HI8_LDI_PM_NEG
, 0},
221 {"lo8", BFD_RELOC_AVR_LO8_LDI
, BFD_RELOC_AVR_LO8_LDI_NEG
, 1},
222 {"pm_lo8", BFD_RELOC_AVR_LO8_LDI_PM
, BFD_RELOC_AVR_LO8_LDI_PM_NEG
, 0},
223 {"hlo8", BFD_RELOC_AVR_HH8_LDI
, BFD_RELOC_AVR_HH8_LDI_NEG
, 0},
224 {"hhi8", BFD_RELOC_AVR_MS8_LDI
, BFD_RELOC_AVR_MS8_LDI_NEG
, 0},
227 /* A union used to store indicies into the exp_mod[] array
228 in a hash table which expects void * data types. */
235 /* Opcode hash table. */
236 static struct hash_control
*avr_hash
;
238 /* Reloc modifiers hash control (hh8,hi8,lo8,pm_xx). */
239 static struct hash_control
*avr_mod_hash
;
241 #define OPTION_MMCU 'm'
244 OPTION_ALL_OPCODES
= OPTION_MD_BASE
+ 1,
249 struct option md_longopts
[] =
251 { "mmcu", required_argument
, NULL
, OPTION_MMCU
},
252 { "mall-opcodes", no_argument
, NULL
, OPTION_ALL_OPCODES
},
253 { "mno-skip-bug", no_argument
, NULL
, OPTION_NO_SKIP_BUG
},
254 { "mno-wrap", no_argument
, NULL
, OPTION_NO_WRAP
},
255 { NULL
, no_argument
, NULL
, 0 }
258 size_t md_longopts_size
= sizeof (md_longopts
);
260 /* Display nicely formatted list of known MCU names. */
263 show_mcu_list (FILE *stream
)
267 fprintf (stream
, _("Known MCU names:"));
270 for (i
= 0; mcu_types
[i
].name
; i
++)
272 int len
= strlen (mcu_types
[i
].name
);
277 fprintf (stream
, " %s", mcu_types
[i
].name
);
280 fprintf (stream
, "\n %s", mcu_types
[i
].name
);
285 fprintf (stream
, "\n");
291 while (*s
== ' ' || *s
== '\t')
296 /* Extract one word from FROM and copy it to TO. */
299 extract_word (char *from
, char *to
, int limit
)
305 /* Drop leading whitespace. */
306 from
= skip_space (from
);
309 /* Find the op code end. */
310 for (op_start
= op_end
= from
; *op_end
!= 0 && is_part_of_name (*op_end
);)
312 to
[size
++] = *op_end
++;
313 if (size
+ 1 >= limit
)
322 md_estimate_size_before_relax (fragS
*fragp ATTRIBUTE_UNUSED
,
323 asection
*seg ATTRIBUTE_UNUSED
)
330 md_show_usage (FILE *stream
)
334 " -mmcu=[avr-name] select microcontroller variant\n"
335 " [avr-name] can be:\n"
336 " avr1 - AT90S1200, ATtiny1x, ATtiny28\n"
337 " avr2 - AT90S2xxx, AT90S4xxx, AT90S8xxx, ATtiny22\n"
338 " avr3 - ATmega103\n"
339 " avr4 - ATmega8, ATmega88\n"
340 " avr5 - ATmega161, ATmega163, ATmega32, AT94K\n"
341 " or immediate microcontroller name.\n"));
343 _(" -mall-opcodes accept all AVR opcodes, even if not supported by MCU\n"
344 " -mno-skip-bug disable warnings for skipping two-word instructions\n"
345 " (default for avr4, avr5)\n"
346 " -mno-wrap reject rjmp/rcall instructions with 8K wrap-around\n"
347 " (default for avr3, avr5)\n"));
348 show_mcu_list (stream
);
352 avr_set_arch (int dummy ATTRIBUTE_UNUSED
)
356 input_line_pointer
= extract_word (input_line_pointer
, str
, 20);
357 md_parse_option (OPTION_MMCU
, str
);
358 bfd_set_arch_mach (stdoutput
, TARGET_ARCH
, avr_mcu
->mach
);
362 md_parse_option (int c
, char *arg
)
369 char *s
= alloca (strlen (arg
) + 1);
376 *t
= TOLOWER (*arg1
++);
380 for (i
= 0; mcu_types
[i
].name
; ++i
)
381 if (strcmp (mcu_types
[i
].name
, s
) == 0)
384 if (!mcu_types
[i
].name
)
386 show_mcu_list (stderr
);
387 as_fatal (_("unknown MCU: %s\n"), arg
);
390 /* It is OK to redefine mcu type within the same avr[1-5] bfd machine
391 type - this for allows passing -mmcu=... via gcc ASM_SPEC as well
392 as .arch ... in the asm output at the same time. */
393 if (avr_mcu
== &default_mcu
|| avr_mcu
->mach
== mcu_types
[i
].mach
)
394 avr_mcu
= &mcu_types
[i
];
396 as_fatal (_("redefinition of mcu type `%s' to `%s'"),
397 avr_mcu
->name
, mcu_types
[i
].name
);
400 case OPTION_ALL_OPCODES
:
401 avr_opt
.all_opcodes
= 1;
403 case OPTION_NO_SKIP_BUG
:
404 avr_opt
.no_skip_bug
= 1;
415 md_undefined_symbol (char *name ATTRIBUTE_UNUSED
)
421 md_atof (int type
, char *litP
, int *sizeP
)
423 return ieee_md_atof (type
, litP
, sizeP
, FALSE
);
427 md_convert_frag (bfd
*abfd ATTRIBUTE_UNUSED
,
428 asection
*sec ATTRIBUTE_UNUSED
,
429 fragS
*fragP ATTRIBUTE_UNUSED
)
438 struct avr_opcodes_s
*opcode
;
440 avr_hash
= hash_new ();
442 /* Insert unique names into hash table. This hash table then provides a
443 quick index to the first opcode with a particular name in the opcode
445 for (opcode
= avr_opcodes
; opcode
->name
; opcode
++)
446 hash_insert (avr_hash
, opcode
->name
, (char *) opcode
);
448 avr_mod_hash
= hash_new ();
450 for (i
= 0; i
< ARRAY_SIZE (exp_mod
); ++i
)
455 hash_insert (avr_mod_hash
, EXP_MOD_NAME (i
), m
.ptr
);
458 bfd_set_arch_mach (stdoutput
, TARGET_ARCH
, avr_mcu
->mach
);
461 /* Resolve STR as a constant expression and return the result.
462 If result greater than MAX then error. */
465 avr_get_constant (char *str
, int max
)
469 str
= skip_space (str
);
470 input_line_pointer
= str
;
473 if (ex
.X_op
!= O_constant
)
474 as_bad (_("constant value required"));
476 if (ex
.X_add_number
> max
|| ex
.X_add_number
< 0)
477 as_bad (_("number must be positive and less than %d"), max
+ 1);
479 return ex
.X_add_number
;
482 /* Parse for ldd/std offset. */
485 avr_offset_expression (expressionS
*exp
)
487 char *str
= input_line_pointer
;
492 str
= extract_word (str
, op
, sizeof (op
));
494 input_line_pointer
= tmp
;
497 /* Warn about expressions that fail to use lo8 (). */
498 if (exp
->X_op
== O_constant
)
500 int x
= exp
->X_add_number
;
502 if (x
< -255 || x
> 255)
503 as_warn (_("constant out of 8-bit range: %d"), x
);
507 /* Parse ordinary expression. */
510 parse_exp (char *s
, expressionS
*op
)
512 input_line_pointer
= s
;
514 if (op
->X_op
== O_absent
)
515 as_bad (_("missing operand"));
516 return input_line_pointer
;
519 /* Parse special expressions (needed for LDI command):
524 where xx is: hh, hi, lo. */
526 static bfd_reloc_code_real_type
527 avr_ldi_expression (expressionS
*exp
)
529 char *str
= input_line_pointer
;
533 int linker_stubs_should_be_generated
= 0;
537 str
= extract_word (str
, op
, sizeof (op
));
543 m
.ptr
= hash_find (avr_mod_hash
, op
);
551 str
= skip_space (str
);
555 bfd_reloc_code_real_type reloc_to_return
;
560 if (strncmp ("pm(", str
, 3) == 0
561 || strncmp ("gs(",str
,3) == 0
562 || strncmp ("-(gs(",str
,5) == 0
563 || strncmp ("-(pm(", str
, 5) == 0)
571 as_bad (_("illegal expression"));
573 if (str
[0] == 'g' || str
[2] == 'g')
574 linker_stubs_should_be_generated
= 1;
586 if (*str
== '-' && *(str
+ 1) == '(')
593 input_line_pointer
= str
;
598 if (*input_line_pointer
!= ')')
600 as_bad (_("`)' required"));
603 input_line_pointer
++;
608 neg_p
? EXP_MOD_NEG_RELOC (mod
) : EXP_MOD_RELOC (mod
);
609 if (linker_stubs_should_be_generated
)
611 switch (reloc_to_return
)
613 case BFD_RELOC_AVR_LO8_LDI_PM
:
614 reloc_to_return
= BFD_RELOC_AVR_LO8_LDI_GS
;
616 case BFD_RELOC_AVR_HI8_LDI_PM
:
617 reloc_to_return
= BFD_RELOC_AVR_HI8_LDI_GS
;
621 as_warn (_("expression dangerous with linker stubs"));
624 return reloc_to_return
;
629 input_line_pointer
= tmp
;
632 /* Warn about expressions that fail to use lo8 (). */
633 if (exp
->X_op
== O_constant
)
635 int x
= exp
->X_add_number
;
637 if (x
< -255 || x
> 255)
638 as_warn (_("constant out of 8-bit range: %d"), x
);
641 return BFD_RELOC_AVR_LDI
;
644 /* Parse one instruction operand.
645 Return operand bitmask. Also fixups can be generated. */
648 avr_operand (struct avr_opcodes_s
*opcode
,
654 unsigned int op_mask
= 0;
655 char *str
= skip_space (*line
);
659 /* Any register operand. */
665 if (*str
== 'r' || *str
== 'R')
669 str
= extract_word (str
, r_name
, sizeof (r_name
));
671 if (ISDIGIT (r_name
[1]))
673 if (r_name
[2] == '\0')
674 op_mask
= r_name
[1] - '0';
675 else if (r_name
[1] != '0'
676 && ISDIGIT (r_name
[2])
677 && r_name
[3] == '\0')
678 op_mask
= (r_name
[1] - '0') * 10 + r_name
[2] - '0';
683 op_mask
= avr_get_constant (str
, 31);
684 str
= input_line_pointer
;
692 if (op_mask
< 16 || op_mask
> 23)
693 as_bad (_("register r16-r23 required"));
699 as_bad (_("register number above 15 required"));
705 as_bad (_("even register number required"));
710 if ((op_mask
& 1) || op_mask
< 24)
711 as_bad (_("register r24, r26, r28 or r30 required"));
712 op_mask
= (op_mask
- 24) >> 1;
717 as_bad (_("register name or number from 0 to 31 required"));
726 str
= skip_space (str
+ 1);
735 as_bad (_("pointer register (X, Y or Z) required"));
737 str
= skip_space (str
+ 1);
742 as_bad (_("cannot both predecrement and postincrement"));
746 /* avr1 can do "ld r,Z" and "st Z,r" but no other pointer
747 registers, no predecrement, no postincrement. */
748 if (!avr_opt
.all_opcodes
&& (op_mask
& 0x100F)
749 && !(avr_mcu
->isa
& AVR_ISA_SRAM
))
750 as_bad (_("addressing mode not supported"));
756 as_bad (_("can't predecrement"));
758 if (! (*str
== 'z' || *str
== 'Z'))
759 as_bad (_("pointer register Z required"));
761 str
= skip_space (str
+ 1);
772 char c
= TOLOWER (*str
++);
777 as_bad (_("pointer register (Y or Z) required"));
778 str
= skip_space (str
);
781 input_line_pointer
= str
;
782 avr_offset_expression (& op_expr
);
783 str
= input_line_pointer
;
784 fix_new_exp (frag_now
, where
, 3,
785 &op_expr
, FALSE
, BFD_RELOC_AVR_6
);
791 str
= parse_exp (str
, &op_expr
);
792 fix_new_exp (frag_now
, where
, opcode
->insn_size
* 2,
793 &op_expr
, FALSE
, BFD_RELOC_AVR_CALL
);
797 str
= parse_exp (str
, &op_expr
);
798 fix_new_exp (frag_now
, where
, opcode
->insn_size
* 2,
799 &op_expr
, TRUE
, BFD_RELOC_AVR_13_PCREL
);
803 str
= parse_exp (str
, &op_expr
);
804 fix_new_exp (frag_now
, where
, opcode
->insn_size
* 2,
805 &op_expr
, TRUE
, BFD_RELOC_AVR_7_PCREL
);
809 str
= parse_exp (str
, &op_expr
);
810 fix_new_exp (frag_now
, where
+ 2, opcode
->insn_size
* 2,
811 &op_expr
, FALSE
, BFD_RELOC_16
);
816 bfd_reloc_code_real_type r_type
;
818 input_line_pointer
= str
;
819 r_type
= avr_ldi_expression (&op_expr
);
820 str
= input_line_pointer
;
821 fix_new_exp (frag_now
, where
, 3,
822 &op_expr
, FALSE
, r_type
);
830 x
= ~avr_get_constant (str
, 255);
831 str
= input_line_pointer
;
832 op_mask
|= (x
& 0xf) | ((x
<< 4) & 0xf00);
837 input_line_pointer
= str
;
838 avr_offset_expression (& op_expr
);
839 str
= input_line_pointer
;
840 fix_new_exp (frag_now
, where
, 3,
841 & op_expr
, FALSE
, BFD_RELOC_AVR_6_ADIW
);
849 x
= avr_get_constant (str
, 7);
850 str
= input_line_pointer
;
861 x
= avr_get_constant (str
, 63);
862 str
= input_line_pointer
;
863 op_mask
|= (x
& 0xf) | ((x
& 0x30) << 5);
871 x
= avr_get_constant (str
, 31);
872 str
= input_line_pointer
;
881 as_bad (_("unknown constraint `%c'"), *op
);
888 /* Parse instruction operands.
889 Return binary opcode. */
892 avr_operands (struct avr_opcodes_s
*opcode
, char **line
)
894 char *op
= opcode
->constraints
;
895 unsigned int bin
= opcode
->bin_opcode
;
896 char *frag
= frag_more (opcode
->insn_size
* 2);
898 int where
= frag
- frag_now
->fr_literal
;
899 static unsigned int prev
= 0; /* Previous opcode. */
901 /* Opcode have operands. */
904 unsigned int reg1
= 0;
905 unsigned int reg2
= 0;
906 int reg1_present
= 0;
907 int reg2_present
= 0;
909 /* Parse first operand. */
910 if (REGISTER_P (*op
))
912 reg1
= avr_operand (opcode
, where
, op
, &str
);
915 /* Parse second operand. */
928 if (REGISTER_P (*op
))
931 str
= skip_space (str
);
933 as_bad (_("`,' required"));
934 str
= skip_space (str
);
936 reg2
= avr_operand (opcode
, where
, op
, &str
);
939 if (reg1_present
&& reg2_present
)
940 reg2
= (reg2
& 0xf) | ((reg2
<< 5) & 0x200);
941 else if (reg2_present
)
949 /* Detect undefined combinations (like ld r31,Z+). */
950 if (!avr_opt
.all_opcodes
&& AVR_UNDEF_P (bin
))
951 as_warn (_("undefined combination of operands"));
953 if (opcode
->insn_size
== 2)
955 /* Warn if the previous opcode was cpse/sbic/sbis/sbrc/sbrs
956 (AVR core bug, fixed in the newer devices). */
957 if (!(avr_opt
.no_skip_bug
||
958 (avr_mcu
->isa
& (AVR_ISA_MUL
| AVR_ISA_MOVW
)))
959 && AVR_SKIP_P (prev
))
960 as_warn (_("skipping two-word instruction"));
962 bfd_putl32 ((bfd_vma
) bin
, frag
);
965 bfd_putl16 ((bfd_vma
) bin
, frag
);
972 /* GAS will call this function for each section at the end of the assembly,
973 to permit the CPU backend to adjust the alignment of a section. */
976 md_section_align (asection
*seg
, valueT addr
)
978 int align
= bfd_get_section_alignment (stdoutput
, seg
);
979 return ((addr
+ (1 << align
) - 1) & (-1 << align
));
982 /* If you define this macro, it should return the offset between the
983 address of a PC relative fixup and the position from which the PC
984 relative adjustment should be made. On many processors, the base
985 of a PC relative instruction is the next instruction, so this
986 macro would return the length of an instruction. */
989 md_pcrel_from_section (fixS
*fixp
, segT sec
)
991 if (fixp
->fx_addsy
!= (symbolS
*) NULL
992 && (!S_IS_DEFINED (fixp
->fx_addsy
)
993 || (S_GET_SEGMENT (fixp
->fx_addsy
) != sec
)))
996 return fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
999 /* GAS will call this for each fixup. It should store the correct
1000 value in the object file. */
1003 md_apply_fix (fixS
*fixP
, valueT
* valP
, segT seg
)
1005 unsigned char *where
;
1009 if (fixP
->fx_addsy
== (symbolS
*) NULL
)
1012 else if (fixP
->fx_pcrel
)
1014 segT s
= S_GET_SEGMENT (fixP
->fx_addsy
);
1016 if (s
== seg
|| s
== absolute_section
)
1018 value
+= S_GET_VALUE (fixP
->fx_addsy
);
1023 /* We don't actually support subtracting a symbol. */
1024 if (fixP
->fx_subsy
!= (symbolS
*) NULL
)
1025 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("expression too complex"));
1027 switch (fixP
->fx_r_type
)
1030 fixP
->fx_no_overflow
= 1;
1032 case BFD_RELOC_AVR_7_PCREL
:
1033 case BFD_RELOC_AVR_13_PCREL
:
1036 case BFD_RELOC_AVR_CALL
:
1042 /* Fetch the instruction, insert the fully resolved operand
1043 value, and stuff the instruction back again. */
1044 where
= (unsigned char *) fixP
->fx_frag
->fr_literal
+ fixP
->fx_where
;
1045 insn
= bfd_getl16 (where
);
1047 switch (fixP
->fx_r_type
)
1049 case BFD_RELOC_AVR_7_PCREL
:
1051 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
1052 _("odd address operand: %ld"), value
);
1054 /* Instruction addresses are always right-shifted by 1. */
1056 --value
; /* Correct PC. */
1058 if (value
< -64 || value
> 63)
1059 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
1060 _("operand out of range: %ld"), value
);
1061 value
= (value
<< 3) & 0x3f8;
1062 bfd_putl16 ((bfd_vma
) (value
| insn
), where
);
1065 case BFD_RELOC_AVR_13_PCREL
:
1067 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
1068 _("odd address operand: %ld"), value
);
1070 /* Instruction addresses are always right-shifted by 1. */
1072 --value
; /* Correct PC. */
1074 if (value
< -2048 || value
> 2047)
1076 /* No wrap for devices with >8K of program memory. */
1077 if ((avr_mcu
->isa
& AVR_ISA_MEGA
) || avr_opt
.no_wrap
)
1078 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
1079 _("operand out of range: %ld"), value
);
1083 bfd_putl16 ((bfd_vma
) (value
| insn
), where
);
1087 bfd_putl16 ((bfd_vma
) value
, where
);
1091 bfd_putl16 ((bfd_vma
) value
, where
);
1094 case BFD_RELOC_AVR_16_PM
:
1095 bfd_putl16 ((bfd_vma
) (value
>> 1), where
);
1098 case BFD_RELOC_AVR_LDI
:
1100 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
1101 _("operand out of range: %ld"), value
);
1102 bfd_putl16 ((bfd_vma
) insn
| LDI_IMMEDIATE (value
), where
);
1105 case BFD_RELOC_AVR_6
:
1106 if ((value
> 63) || (value
< 0))
1107 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
1108 _("operand out of range: %ld"), value
);
1109 bfd_putl16 ((bfd_vma
) insn
| ((value
& 7) | ((value
& (3 << 3)) << 7) | ((value
& (1 << 5)) << 8)), where
);
1112 case BFD_RELOC_AVR_6_ADIW
:
1113 if ((value
> 63) || (value
< 0))
1114 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
1115 _("operand out of range: %ld"), value
);
1116 bfd_putl16 ((bfd_vma
) insn
| (value
& 0xf) | ((value
& 0x30) << 2), where
);
1119 case BFD_RELOC_AVR_LO8_LDI
:
1120 bfd_putl16 ((bfd_vma
) insn
| LDI_IMMEDIATE (value
), where
);
1123 case BFD_RELOC_AVR_HI8_LDI
:
1124 bfd_putl16 ((bfd_vma
) insn
| LDI_IMMEDIATE (value
>> 8), where
);
1127 case BFD_RELOC_AVR_MS8_LDI
:
1128 bfd_putl16 ((bfd_vma
) insn
| LDI_IMMEDIATE (value
>> 24), where
);
1131 case BFD_RELOC_AVR_HH8_LDI
:
1132 bfd_putl16 ((bfd_vma
) insn
| LDI_IMMEDIATE (value
>> 16), where
);
1135 case BFD_RELOC_AVR_LO8_LDI_NEG
:
1136 bfd_putl16 ((bfd_vma
) insn
| LDI_IMMEDIATE (-value
), where
);
1139 case BFD_RELOC_AVR_HI8_LDI_NEG
:
1140 bfd_putl16 ((bfd_vma
) insn
| LDI_IMMEDIATE (-value
>> 8), where
);
1143 case BFD_RELOC_AVR_MS8_LDI_NEG
:
1144 bfd_putl16 ((bfd_vma
) insn
| LDI_IMMEDIATE (-value
>> 24), where
);
1147 case BFD_RELOC_AVR_HH8_LDI_NEG
:
1148 bfd_putl16 ((bfd_vma
) insn
| LDI_IMMEDIATE (-value
>> 16), where
);
1151 case BFD_RELOC_AVR_LO8_LDI_PM
:
1152 bfd_putl16 ((bfd_vma
) insn
| LDI_IMMEDIATE (value
>> 1), where
);
1155 case BFD_RELOC_AVR_HI8_LDI_PM
:
1156 bfd_putl16 ((bfd_vma
) insn
| LDI_IMMEDIATE (value
>> 9), where
);
1159 case BFD_RELOC_AVR_HH8_LDI_PM
:
1160 bfd_putl16 ((bfd_vma
) insn
| LDI_IMMEDIATE (value
>> 17), where
);
1163 case BFD_RELOC_AVR_LO8_LDI_PM_NEG
:
1164 bfd_putl16 ((bfd_vma
) insn
| LDI_IMMEDIATE (-value
>> 1), where
);
1167 case BFD_RELOC_AVR_HI8_LDI_PM_NEG
:
1168 bfd_putl16 ((bfd_vma
) insn
| LDI_IMMEDIATE (-value
>> 9), where
);
1171 case BFD_RELOC_AVR_HH8_LDI_PM_NEG
:
1172 bfd_putl16 ((bfd_vma
) insn
| LDI_IMMEDIATE (-value
>> 17), where
);
1175 case BFD_RELOC_AVR_CALL
:
1179 x
= bfd_getl16 (where
);
1181 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
1182 _("odd address operand: %ld"), value
);
1184 x
|= ((value
& 0x10000) | ((value
<< 3) & 0x1f00000)) >> 16;
1185 bfd_putl16 ((bfd_vma
) x
, where
);
1186 bfd_putl16 ((bfd_vma
) (value
& 0xffff), where
+ 2);
1191 as_fatal (_("line %d: unknown relocation type: 0x%x"),
1192 fixP
->fx_line
, fixP
->fx_r_type
);
1198 switch (fixP
->fx_r_type
)
1200 case -BFD_RELOC_AVR_HI8_LDI_NEG
:
1201 case -BFD_RELOC_AVR_HI8_LDI
:
1202 case -BFD_RELOC_AVR_LO8_LDI_NEG
:
1203 case -BFD_RELOC_AVR_LO8_LDI
:
1204 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
1205 _("only constant expression allowed"));
1214 /* GAS will call this to generate a reloc, passing the resulting reloc
1215 to `bfd_install_relocation'. This currently works poorly, as
1216 `bfd_install_relocation' often does the wrong thing, and instances of
1217 `tc_gen_reloc' have been written to work around the problems, which
1218 in turns makes it difficult to fix `bfd_install_relocation'. */
1220 /* If while processing a fixup, a reloc really needs to be created
1221 then it is done here. */
1224 tc_gen_reloc (asection
*seg ATTRIBUTE_UNUSED
,
1229 if (fixp
->fx_addsy
&& fixp
->fx_subsy
)
1233 if ((S_GET_SEGMENT (fixp
->fx_addsy
) != S_GET_SEGMENT (fixp
->fx_subsy
))
1234 || S_GET_SEGMENT (fixp
->fx_addsy
) == undefined_section
)
1236 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
1237 "Difference of symbols in different sections is not supported");
1241 /* We are dealing with two symbols defined in the same section.
1242 Let us fix-up them here. */
1243 value
+= S_GET_VALUE (fixp
->fx_addsy
);
1244 value
-= S_GET_VALUE (fixp
->fx_subsy
);
1246 /* When fx_addsy and fx_subsy both are zero, md_apply_fix
1247 only takes it's second operands for the fixup value. */
1248 fixp
->fx_addsy
= NULL
;
1249 fixp
->fx_subsy
= NULL
;
1250 md_apply_fix (fixp
, (valueT
*) &value
, NULL
);
1255 reloc
= xmalloc (sizeof (arelent
));
1257 reloc
->sym_ptr_ptr
= xmalloc (sizeof (asymbol
*));
1258 *reloc
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
1260 reloc
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
1261 reloc
->howto
= bfd_reloc_type_lookup (stdoutput
, fixp
->fx_r_type
);
1262 if (reloc
->howto
== (reloc_howto_type
*) NULL
)
1264 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
1265 _("reloc %d not supported by object file format"),
1266 (int) fixp
->fx_r_type
);
1270 if (fixp
->fx_r_type
== BFD_RELOC_VTABLE_INHERIT
1271 || fixp
->fx_r_type
== BFD_RELOC_VTABLE_ENTRY
)
1272 reloc
->address
= fixp
->fx_offset
;
1274 reloc
->addend
= fixp
->fx_offset
;
1280 md_assemble (char *str
)
1282 struct avr_opcodes_s
*opcode
;
1285 str
= skip_space (extract_word (str
, op
, sizeof (op
)));
1288 as_bad (_("can't find opcode "));
1290 opcode
= (struct avr_opcodes_s
*) hash_find (avr_hash
, op
);
1294 as_bad (_("unknown opcode `%s'"), op
);
1298 /* Special case for opcodes with optional operands (lpm, elpm) -
1299 version with operands exists in avr_opcodes[] in the next entry. */
1301 if (*str
&& *opcode
->constraints
== '?')
1304 if (!avr_opt
.all_opcodes
&& (opcode
->isa
& avr_mcu
->isa
) != opcode
->isa
)
1305 as_bad (_("illegal opcode %s for mcu %s"), opcode
->name
, avr_mcu
->name
);
1307 /* We used to set input_line_pointer to the result of get_operands,
1308 but that is wrong. Our caller assumes we don't change it. */
1310 char *t
= input_line_pointer
;
1312 avr_operands (opcode
, &str
);
1313 if (*skip_space (str
))
1314 as_bad (_("garbage at end of line"));
1315 input_line_pointer
= t
;
1319 /* Flag to pass `pm' mode between `avr_parse_cons_expression' and
1320 `avr_cons_fix_new'. */
1321 static int exp_mod_pm
= 0;
1323 /* Parse special CONS expression: pm (expression)
1324 or alternatively: gs (expression).
1325 These are used for addressing program memory.
1326 Relocation: BFD_RELOC_AVR_16_PM. */
1329 avr_parse_cons_expression (expressionS
*exp
, int nbytes
)
1335 tmp
= input_line_pointer
= skip_space (input_line_pointer
);
1339 char *pm_name1
= "pm";
1340 char *pm_name2
= "gs";
1341 int len
= strlen (pm_name1
);
1342 /* len must be the same for both pm identifiers. */
1344 if (strncasecmp (input_line_pointer
, pm_name1
, len
) == 0
1345 || strncasecmp (input_line_pointer
, pm_name2
, len
) == 0)
1347 input_line_pointer
= skip_space (input_line_pointer
+ len
);
1349 if (*input_line_pointer
== '(')
1351 input_line_pointer
= skip_space (input_line_pointer
+ 1);
1355 if (*input_line_pointer
== ')')
1356 ++input_line_pointer
;
1359 as_bad (_("`)' required"));
1366 input_line_pointer
= tmp
;
1374 avr_cons_fix_new (fragS
*frag
,
1379 if (exp_mod_pm
== 0)
1382 fix_new_exp (frag
, where
, nbytes
, exp
, FALSE
, BFD_RELOC_16
);
1383 else if (nbytes
== 4)
1384 fix_new_exp (frag
, where
, nbytes
, exp
, FALSE
, BFD_RELOC_32
);
1386 as_bad (_("illegal %srelocation size: %d"), "", nbytes
);
1391 fix_new_exp (frag
, where
, nbytes
, exp
, FALSE
, BFD_RELOC_AVR_16_PM
);
1393 as_bad (_("illegal %srelocation size: %d"), "`pm' ", nbytes
);