8c6763e2bb5fef22c11c5e0b071bedc63889d824
[deliverable/binutils-gdb.git] / gas / config / tc-avr.c
1 /* tc-avr.c -- Assembler code for the ATMEL AVR
2
3 Copyright 1999, 2000, 2001, 2002, 2004, 2005, 2006, 2007
4 Free Software Foundation, Inc.
5 Contributed by Denis Chertykov <denisc@overta.ru>
6
7 This file is part of GAS, the GNU Assembler.
8
9 GAS is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3, or (at your option)
12 any later version.
13
14 GAS is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with GAS; see the file COPYING. If not, write to
21 the Free Software Foundation, 51 Franklin Street - Fifth Floor,
22 Boston, MA 02110-1301, USA. */
23
24 #include "as.h"
25 #include "safe-ctype.h"
26 #include "subsegs.h"
27
28 struct avr_opcodes_s
29 {
30 char * name;
31 char * constraints;
32 int insn_size; /* In words. */
33 int isa;
34 unsigned int bin_opcode;
35 };
36
37 #define AVR_INSN(NAME, CONSTR, OPCODE, SIZE, ISA, BIN) \
38 {#NAME, CONSTR, SIZE, ISA, BIN},
39
40 struct avr_opcodes_s avr_opcodes[] =
41 {
42 #include "opcode/avr.h"
43 {NULL, NULL, 0, 0, 0}
44 };
45
46 const char comment_chars[] = ";";
47 const char line_comment_chars[] = "#";
48 const char line_separator_chars[] = "$";
49
50 const char *md_shortopts = "m:";
51 struct mcu_type_s
52 {
53 char *name;
54 int isa;
55 int mach;
56 };
57
58 /* XXX - devices that don't seem to exist (renamed, replaced with larger
59 ones, or planned but never produced), left here for compatibility.
60 TODO: hide them in show_mcu_list output? */
61
62 static struct mcu_type_s mcu_types[] =
63 {
64 {"avr1", AVR_ISA_TINY1, bfd_mach_avr1},
65 {"avr2", AVR_ISA_TINY2, bfd_mach_avr2},
66 {"avr3", AVR_ISA_M103, bfd_mach_avr3},
67 {"avr4", AVR_ISA_M8, bfd_mach_avr4},
68 {"avr5", AVR_ISA_ALL, bfd_mach_avr5},
69 {"avr6", AVR_ISA_ALL, bfd_mach_avr6},
70 {"at90s1200", AVR_ISA_1200, bfd_mach_avr1},
71 {"attiny11", AVR_ISA_TINY1, bfd_mach_avr1},
72 {"attiny12", AVR_ISA_TINY1, bfd_mach_avr1},
73 {"attiny15", AVR_ISA_TINY1, bfd_mach_avr1},
74 {"attiny28", AVR_ISA_TINY1, bfd_mach_avr1},
75 {"at90s2313", AVR_ISA_2xxx, bfd_mach_avr2},
76 {"at90s2323", AVR_ISA_2xxx, bfd_mach_avr2},
77 {"at90s2333", AVR_ISA_2xxx, bfd_mach_avr2}, /* XXX -> 4433 */
78 {"at90s2343", AVR_ISA_2xxx, bfd_mach_avr2},
79 {"attiny22", AVR_ISA_2xxx, bfd_mach_avr2}, /* XXX -> 2343 */
80 {"attiny26", AVR_ISA_2xxx, bfd_mach_avr2},
81 {"at90s4433", AVR_ISA_2xxx, bfd_mach_avr2},
82 {"at90s4414", AVR_ISA_2xxx, bfd_mach_avr2}, /* XXX -> 8515 */
83 {"at90s4434", AVR_ISA_2xxx, bfd_mach_avr2}, /* XXX -> 8535 */
84 {"at90s8515", AVR_ISA_2xxx, bfd_mach_avr2},
85 {"at90s8535", AVR_ISA_2xxx, bfd_mach_avr2},
86 {"at90c8534", AVR_ISA_2xxx, bfd_mach_avr2},
87 {"at86rf401", AVR_ISA_2xxx, bfd_mach_avr2},
88 {"attiny13", AVR_ISA_TINY2, bfd_mach_avr2},
89 {"attiny2313", AVR_ISA_TINY2, bfd_mach_avr2},
90 {"attiny261", AVR_ISA_TINY2, bfd_mach_avr2},
91 {"attiny461", AVR_ISA_TINY2, bfd_mach_avr2},
92 {"attiny861", AVR_ISA_TINY2, bfd_mach_avr2},
93 {"attiny24", AVR_ISA_TINY2, bfd_mach_avr2},
94 {"attiny44", AVR_ISA_TINY2, bfd_mach_avr2},
95 {"attiny84", AVR_ISA_TINY2, bfd_mach_avr2},
96 {"attiny25", AVR_ISA_TINY2, bfd_mach_avr2},
97 {"attiny45", AVR_ISA_TINY2, bfd_mach_avr2},
98 {"attiny85", AVR_ISA_TINY2, bfd_mach_avr2},
99 {"attiny43u", AVR_ISA_TINY2, bfd_mach_avr2},
100 {"attiny48", AVR_ISA_TINY2, bfd_mach_avr2},
101 {"attiny88", AVR_ISA_TINY2, bfd_mach_avr2},
102 {"atmega103", AVR_ISA_M103, bfd_mach_avr3},
103 {"at43usb320", AVR_ISA_M103, bfd_mach_avr3},
104 {"at43usb355", AVR_ISA_M603, bfd_mach_avr3},
105 {"at76c711", AVR_ISA_M603, bfd_mach_avr3},
106 {"atmega48", AVR_ISA_PWMx, bfd_mach_avr4},
107 {"atmega48p", AVR_ISA_PWMx, bfd_mach_avr4},
108 {"atmega8", AVR_ISA_M8, bfd_mach_avr4},
109 {"atmega88", AVR_ISA_PWMx, bfd_mach_avr4},
110 {"atmega88p", AVR_ISA_PWMx, bfd_mach_avr4},
111 {"atmega8515", AVR_ISA_M8, bfd_mach_avr4},
112 {"atmega8535", AVR_ISA_M8, bfd_mach_avr4},
113 {"atmega8hva", AVR_ISA_PWMx, bfd_mach_avr4},
114 {"at90pwm1", AVR_ISA_PWMx, bfd_mach_avr4},
115 {"at90pwm2", AVR_ISA_PWMx, bfd_mach_avr4},
116 {"at90pwm2b", AVR_ISA_PWMx, bfd_mach_avr4},
117 {"at90pwm3", AVR_ISA_PWMx, bfd_mach_avr4},
118 {"at90pwm3b", AVR_ISA_PWMx, bfd_mach_avr4},
119 {"atmega16", AVR_ISA_M323, bfd_mach_avr5},
120 {"atmega161", AVR_ISA_M161, bfd_mach_avr5},
121 {"atmega162", AVR_ISA_M323, bfd_mach_avr5},
122 {"atmega163", AVR_ISA_M161, bfd_mach_avr5},
123 {"atmega164p", AVR_ISA_M323, bfd_mach_avr5},
124 {"atmega165", AVR_ISA_M323, bfd_mach_avr5},
125 {"atmega165p", AVR_ISA_M323, bfd_mach_avr5},
126 {"atmega168", AVR_ISA_M323, bfd_mach_avr5},
127 {"atmega168p", AVR_ISA_M323, bfd_mach_avr5},
128 {"atmega169", AVR_ISA_M323, bfd_mach_avr5},
129 {"atmega169p", AVR_ISA_M323, bfd_mach_avr5},
130 {"atmega32", AVR_ISA_M323, bfd_mach_avr5},
131 {"atmega323", AVR_ISA_M323, bfd_mach_avr5},
132 {"atmega324p", AVR_ISA_M323, bfd_mach_avr5},
133 {"atmega325", AVR_ISA_M323, bfd_mach_avr5},
134 {"atmega325p", AVR_ISA_M323, bfd_mach_avr5},
135 {"atmega328p", AVR_ISA_M323, bfd_mach_avr5},
136 {"atmega329", AVR_ISA_M323, bfd_mach_avr5},
137 {"atmega329p", AVR_ISA_M323, bfd_mach_avr5},
138 {"atmega3250", AVR_ISA_M323, bfd_mach_avr5},
139 {"atmega3250p",AVR_ISA_M323, bfd_mach_avr5},
140 {"atmega3290", AVR_ISA_M323, bfd_mach_avr5},
141 {"atmega3290p",AVR_ISA_M323, bfd_mach_avr5},
142 {"atmega406", AVR_ISA_M323, bfd_mach_avr5},
143 {"atmega64", AVR_ISA_M323, bfd_mach_avr5},
144 {"atmega640", AVR_ISA_M323, bfd_mach_avr5},
145 {"atmega644", AVR_ISA_M323, bfd_mach_avr5},
146 {"atmega644p", AVR_ISA_M323, bfd_mach_avr5},
147 {"atmega128", AVR_ISA_M128, bfd_mach_avr5},
148 {"atmega1280", AVR_ISA_M128, bfd_mach_avr5},
149 {"atmega1281", AVR_ISA_M128, bfd_mach_avr5},
150 {"atmega645", AVR_ISA_M323, bfd_mach_avr5},
151 {"atmega649", AVR_ISA_M323, bfd_mach_avr5},
152 {"atmega6450", AVR_ISA_M323, bfd_mach_avr5},
153 {"atmega6490", AVR_ISA_M323, bfd_mach_avr5},
154 {"atmega16hva",AVR_ISA_M323, bfd_mach_avr5},
155 {"at90can32" , AVR_ISA_M323, bfd_mach_avr5},
156 {"at90can64" , AVR_ISA_M323, bfd_mach_avr5},
157 {"at90can128", AVR_ISA_M128, bfd_mach_avr5},
158 {"at90pwm216", AVR_ISA_M323, bfd_mach_avr5},
159 {"at90pwm316", AVR_ISA_M323, bfd_mach_avr5},
160 {"at90usb82", AVR_ISA_M323, bfd_mach_avr5},
161 {"at90usb162", AVR_ISA_M323, bfd_mach_avr5},
162 {"at90usb646", AVR_ISA_M323, bfd_mach_avr5},
163 {"at90usb647", AVR_ISA_M323, bfd_mach_avr5},
164 {"at90usb1286",AVR_ISA_M128, bfd_mach_avr5},
165 {"at90usb1287",AVR_ISA_M128, bfd_mach_avr5},
166 {"at94k", AVR_ISA_94K, bfd_mach_avr5},
167 {"atmega2560", AVR_ISA_ALL, bfd_mach_avr6},
168 {"atmega2561", AVR_ISA_ALL, bfd_mach_avr6},
169 {NULL, 0, 0}
170 };
171
172 /* Current MCU type. */
173 static struct mcu_type_s default_mcu = {"avr2", AVR_ISA_2xxx,bfd_mach_avr2};
174 static struct mcu_type_s * avr_mcu = & default_mcu;
175
176 /* AVR target-specific switches. */
177 struct avr_opt_s
178 {
179 int all_opcodes; /* -mall-opcodes: accept all known AVR opcodes. */
180 int no_skip_bug; /* -mno-skip-bug: no warnings for skipping 2-word insns. */
181 int no_wrap; /* -mno-wrap: reject rjmp/rcall with 8K wrap-around. */
182 };
183
184 static struct avr_opt_s avr_opt = { 0, 0, 0 };
185
186 const char EXP_CHARS[] = "eE";
187 const char FLT_CHARS[] = "dD";
188
189 static void avr_set_arch (int);
190
191 /* The target specific pseudo-ops which we support. */
192 const pseudo_typeS md_pseudo_table[] =
193 {
194 {"arch", avr_set_arch, 0},
195 { NULL, NULL, 0}
196 };
197
198 #define LDI_IMMEDIATE(x) (((x) & 0xf) | (((x) << 4) & 0xf00))
199
200 #define EXP_MOD_NAME(i) exp_mod[i].name
201 #define EXP_MOD_RELOC(i) exp_mod[i].reloc
202 #define EXP_MOD_NEG_RELOC(i) exp_mod[i].neg_reloc
203 #define HAVE_PM_P(i) exp_mod[i].have_pm
204
205 struct exp_mod_s
206 {
207 char * name;
208 bfd_reloc_code_real_type reloc;
209 bfd_reloc_code_real_type neg_reloc;
210 int have_pm;
211 };
212
213 static struct exp_mod_s exp_mod[] =
214 {
215 {"hh8", BFD_RELOC_AVR_HH8_LDI, BFD_RELOC_AVR_HH8_LDI_NEG, 1},
216 {"pm_hh8", BFD_RELOC_AVR_HH8_LDI_PM, BFD_RELOC_AVR_HH8_LDI_PM_NEG, 0},
217 {"hi8", BFD_RELOC_AVR_HI8_LDI, BFD_RELOC_AVR_HI8_LDI_NEG, 1},
218 {"pm_hi8", BFD_RELOC_AVR_HI8_LDI_PM, BFD_RELOC_AVR_HI8_LDI_PM_NEG, 0},
219 {"lo8", BFD_RELOC_AVR_LO8_LDI, BFD_RELOC_AVR_LO8_LDI_NEG, 1},
220 {"pm_lo8", BFD_RELOC_AVR_LO8_LDI_PM, BFD_RELOC_AVR_LO8_LDI_PM_NEG, 0},
221 {"hlo8", BFD_RELOC_AVR_HH8_LDI, BFD_RELOC_AVR_HH8_LDI_NEG, 0},
222 {"hhi8", BFD_RELOC_AVR_MS8_LDI, BFD_RELOC_AVR_MS8_LDI_NEG, 0},
223 };
224
225 /* A union used to store indicies into the exp_mod[] array
226 in a hash table which expects void * data types. */
227 typedef union
228 {
229 void * ptr;
230 int index;
231 } mod_index;
232
233 /* Opcode hash table. */
234 static struct hash_control *avr_hash;
235
236 /* Reloc modifiers hash control (hh8,hi8,lo8,pm_xx). */
237 static struct hash_control *avr_mod_hash;
238
239 #define OPTION_MMCU 'm'
240 enum options
241 {
242 OPTION_ALL_OPCODES = OPTION_MD_BASE + 1,
243 OPTION_NO_SKIP_BUG,
244 OPTION_NO_WRAP
245 };
246
247 struct option md_longopts[] =
248 {
249 { "mmcu", required_argument, NULL, OPTION_MMCU },
250 { "mall-opcodes", no_argument, NULL, OPTION_ALL_OPCODES },
251 { "mno-skip-bug", no_argument, NULL, OPTION_NO_SKIP_BUG },
252 { "mno-wrap", no_argument, NULL, OPTION_NO_WRAP },
253 { NULL, no_argument, NULL, 0 }
254 };
255
256 size_t md_longopts_size = sizeof (md_longopts);
257
258 /* Display nicely formatted list of known MCU names. */
259
260 static void
261 show_mcu_list (FILE *stream)
262 {
263 int i, x;
264
265 fprintf (stream, _("Known MCU names:"));
266 x = 1000;
267
268 for (i = 0; mcu_types[i].name; i++)
269 {
270 int len = strlen (mcu_types[i].name);
271
272 x += len + 1;
273
274 if (x < 75)
275 fprintf (stream, " %s", mcu_types[i].name);
276 else
277 {
278 fprintf (stream, "\n %s", mcu_types[i].name);
279 x = len + 2;
280 }
281 }
282
283 fprintf (stream, "\n");
284 }
285
286 static inline char *
287 skip_space (char *s)
288 {
289 while (*s == ' ' || *s == '\t')
290 ++s;
291 return s;
292 }
293
294 /* Extract one word from FROM and copy it to TO. */
295
296 static char *
297 extract_word (char *from, char *to, int limit)
298 {
299 char *op_start;
300 char *op_end;
301 int size = 0;
302
303 /* Drop leading whitespace. */
304 from = skip_space (from);
305 *to = 0;
306
307 /* Find the op code end. */
308 for (op_start = op_end = from; *op_end != 0 && is_part_of_name (*op_end);)
309 {
310 to[size++] = *op_end++;
311 if (size + 1 >= limit)
312 break;
313 }
314
315 to[size] = 0;
316 return op_end;
317 }
318
319 int
320 md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED,
321 asection *seg ATTRIBUTE_UNUSED)
322 {
323 abort ();
324 return 0;
325 }
326
327 void
328 md_show_usage (FILE *stream)
329 {
330 fprintf (stream,
331 _("AVR options:\n"
332 " -mmcu=[avr-name] select microcontroller variant\n"
333 " [avr-name] can be:\n"
334 " avr1 - AT90S1200, ATtiny1x, ATtiny28\n"
335 " avr2 - AT90S2xxx, AT90S4xxx, AT90S8xxx, ATtiny22\n"
336 " avr3 - ATmega103\n"
337 " avr4 - ATmega8, ATmega88\n"
338 " avr5 - ATmega161, ATmega163, ATmega32, AT94K\n"
339 " or immediate microcontroller name.\n"));
340 fprintf (stream,
341 _(" -mall-opcodes accept all AVR opcodes, even if not supported by MCU\n"
342 " -mno-skip-bug disable warnings for skipping two-word instructions\n"
343 " (default for avr4, avr5)\n"
344 " -mno-wrap reject rjmp/rcall instructions with 8K wrap-around\n"
345 " (default for avr3, avr5)\n"));
346 show_mcu_list (stream);
347 }
348
349 static void
350 avr_set_arch (int dummy ATTRIBUTE_UNUSED)
351 {
352 char str[20];
353
354 input_line_pointer = extract_word (input_line_pointer, str, 20);
355 md_parse_option (OPTION_MMCU, str);
356 bfd_set_arch_mach (stdoutput, TARGET_ARCH, avr_mcu->mach);
357 }
358
359 int
360 md_parse_option (int c, char *arg)
361 {
362 switch (c)
363 {
364 case OPTION_MMCU:
365 {
366 int i;
367 char *s = alloca (strlen (arg) + 1);
368
369 {
370 char *t = s;
371 char *arg1 = arg;
372
373 do
374 *t = TOLOWER (*arg1++);
375 while (*t++);
376 }
377
378 for (i = 0; mcu_types[i].name; ++i)
379 if (strcmp (mcu_types[i].name, s) == 0)
380 break;
381
382 if (!mcu_types[i].name)
383 {
384 show_mcu_list (stderr);
385 as_fatal (_("unknown MCU: %s\n"), arg);
386 }
387
388 /* It is OK to redefine mcu type within the same avr[1-5] bfd machine
389 type - this for allows passing -mmcu=... via gcc ASM_SPEC as well
390 as .arch ... in the asm output at the same time. */
391 if (avr_mcu == &default_mcu || avr_mcu->mach == mcu_types[i].mach)
392 avr_mcu = &mcu_types[i];
393 else
394 as_fatal (_("redefinition of mcu type `%s' to `%s'"),
395 avr_mcu->name, mcu_types[i].name);
396 return 1;
397 }
398 case OPTION_ALL_OPCODES:
399 avr_opt.all_opcodes = 1;
400 return 1;
401 case OPTION_NO_SKIP_BUG:
402 avr_opt.no_skip_bug = 1;
403 return 1;
404 case OPTION_NO_WRAP:
405 avr_opt.no_wrap = 1;
406 return 1;
407 }
408
409 return 0;
410 }
411
412 symbolS *
413 md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
414 {
415 return NULL;
416 }
417
418 char *
419 md_atof (int type, char *litP, int *sizeP)
420 {
421 return ieee_md_atof (type, litP, sizeP, FALSE);
422 }
423
424 void
425 md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED,
426 asection *sec ATTRIBUTE_UNUSED,
427 fragS *fragP ATTRIBUTE_UNUSED)
428 {
429 abort ();
430 }
431
432 void
433 md_begin (void)
434 {
435 unsigned int i;
436 struct avr_opcodes_s *opcode;
437
438 avr_hash = hash_new ();
439
440 /* Insert unique names into hash table. This hash table then provides a
441 quick index to the first opcode with a particular name in the opcode
442 table. */
443 for (opcode = avr_opcodes; opcode->name; opcode++)
444 hash_insert (avr_hash, opcode->name, (char *) opcode);
445
446 avr_mod_hash = hash_new ();
447
448 for (i = 0; i < ARRAY_SIZE (exp_mod); ++i)
449 {
450 mod_index m;
451
452 m.index = i + 10;
453 hash_insert (avr_mod_hash, EXP_MOD_NAME (i), m.ptr);
454 }
455
456 bfd_set_arch_mach (stdoutput, TARGET_ARCH, avr_mcu->mach);
457 }
458
459 /* Resolve STR as a constant expression and return the result.
460 If result greater than MAX then error. */
461
462 static unsigned int
463 avr_get_constant (char *str, int max)
464 {
465 expressionS ex;
466
467 str = skip_space (str);
468 input_line_pointer = str;
469 expression (& ex);
470
471 if (ex.X_op != O_constant)
472 as_bad (_("constant value required"));
473
474 if (ex.X_add_number > max || ex.X_add_number < 0)
475 as_bad (_("number must be positive and less than %d"), max + 1);
476
477 return ex.X_add_number;
478 }
479
480 /* Parse for ldd/std offset. */
481
482 static void
483 avr_offset_expression (expressionS *exp)
484 {
485 char *str = input_line_pointer;
486 char *tmp;
487 char op[8];
488
489 tmp = str;
490 str = extract_word (str, op, sizeof (op));
491
492 input_line_pointer = tmp;
493 expression (exp);
494
495 /* Warn about expressions that fail to use lo8 (). */
496 if (exp->X_op == O_constant)
497 {
498 int x = exp->X_add_number;
499
500 if (x < -255 || x > 255)
501 as_warn (_("constant out of 8-bit range: %d"), x);
502 }
503 }
504
505 /* Parse ordinary expression. */
506
507 static char *
508 parse_exp (char *s, expressionS *op)
509 {
510 input_line_pointer = s;
511 expression (op);
512 if (op->X_op == O_absent)
513 as_bad (_("missing operand"));
514 return input_line_pointer;
515 }
516
517 /* Parse special expressions (needed for LDI command):
518 xx8 (address)
519 xx8 (-address)
520 pm_xx8 (address)
521 pm_xx8 (-address)
522 where xx is: hh, hi, lo. */
523
524 static bfd_reloc_code_real_type
525 avr_ldi_expression (expressionS *exp)
526 {
527 char *str = input_line_pointer;
528 char *tmp;
529 char op[8];
530 int mod;
531 int linker_stubs_should_be_generated = 0;
532
533 tmp = str;
534
535 str = extract_word (str, op, sizeof (op));
536
537 if (op[0])
538 {
539 mod_index m;
540
541 m.ptr = hash_find (avr_mod_hash, op);
542 mod = m.index;
543
544 if (mod)
545 {
546 int closes = 0;
547
548 mod -= 10;
549 str = skip_space (str);
550
551 if (*str == '(')
552 {
553 bfd_reloc_code_real_type reloc_to_return;
554 int neg_p = 0;
555
556 ++str;
557
558 if (strncmp ("pm(", str, 3) == 0
559 || strncmp ("gs(",str,3) == 0
560 || strncmp ("-(gs(",str,5) == 0
561 || strncmp ("-(pm(", str, 5) == 0)
562 {
563 if (HAVE_PM_P (mod))
564 {
565 ++mod;
566 ++closes;
567 }
568 else
569 as_bad (_("illegal expression"));
570
571 if (str[0] == 'g' || str[2] == 'g')
572 linker_stubs_should_be_generated = 1;
573
574 if (*str == '-')
575 {
576 neg_p = 1;
577 ++closes;
578 str += 5;
579 }
580 else
581 str += 3;
582 }
583
584 if (*str == '-' && *(str + 1) == '(')
585 {
586 neg_p ^= 1;
587 ++closes;
588 str += 2;
589 }
590
591 input_line_pointer = str;
592 expression (exp);
593
594 do
595 {
596 if (*input_line_pointer != ')')
597 {
598 as_bad (_("`)' required"));
599 break;
600 }
601 input_line_pointer++;
602 }
603 while (closes--);
604
605 reloc_to_return =
606 neg_p ? EXP_MOD_NEG_RELOC (mod) : EXP_MOD_RELOC (mod);
607 if (linker_stubs_should_be_generated)
608 {
609 switch (reloc_to_return)
610 {
611 case BFD_RELOC_AVR_LO8_LDI_PM:
612 reloc_to_return = BFD_RELOC_AVR_LO8_LDI_GS;
613 break;
614 case BFD_RELOC_AVR_HI8_LDI_PM:
615 reloc_to_return = BFD_RELOC_AVR_HI8_LDI_GS;
616 break;
617
618 default:
619 as_warn (_("expression dangerous with linker stubs"));
620 }
621 }
622 return reloc_to_return;
623 }
624 }
625 }
626
627 input_line_pointer = tmp;
628 expression (exp);
629
630 /* Warn about expressions that fail to use lo8 (). */
631 if (exp->X_op == O_constant)
632 {
633 int x = exp->X_add_number;
634
635 if (x < -255 || x > 255)
636 as_warn (_("constant out of 8-bit range: %d"), x);
637 }
638
639 return BFD_RELOC_AVR_LDI;
640 }
641
642 /* Parse one instruction operand.
643 Return operand bitmask. Also fixups can be generated. */
644
645 static unsigned int
646 avr_operand (struct avr_opcodes_s *opcode,
647 int where,
648 char *op,
649 char **line)
650 {
651 expressionS op_expr;
652 unsigned int op_mask = 0;
653 char *str = skip_space (*line);
654
655 switch (*op)
656 {
657 /* Any register operand. */
658 case 'w':
659 case 'd':
660 case 'r':
661 case 'a':
662 case 'v':
663 if (*str == 'r' || *str == 'R')
664 {
665 char r_name[20];
666
667 str = extract_word (str, r_name, sizeof (r_name));
668 op_mask = 0xff;
669 if (ISDIGIT (r_name[1]))
670 {
671 if (r_name[2] == '\0')
672 op_mask = r_name[1] - '0';
673 else if (r_name[1] != '0'
674 && ISDIGIT (r_name[2])
675 && r_name[3] == '\0')
676 op_mask = (r_name[1] - '0') * 10 + r_name[2] - '0';
677 }
678 }
679 else
680 {
681 op_mask = avr_get_constant (str, 31);
682 str = input_line_pointer;
683 }
684
685 if (op_mask <= 31)
686 {
687 switch (*op)
688 {
689 case 'a':
690 if (op_mask < 16 || op_mask > 23)
691 as_bad (_("register r16-r23 required"));
692 op_mask -= 16;
693 break;
694
695 case 'd':
696 if (op_mask < 16)
697 as_bad (_("register number above 15 required"));
698 op_mask -= 16;
699 break;
700
701 case 'v':
702 if (op_mask & 1)
703 as_bad (_("even register number required"));
704 op_mask >>= 1;
705 break;
706
707 case 'w':
708 if ((op_mask & 1) || op_mask < 24)
709 as_bad (_("register r24, r26, r28 or r30 required"));
710 op_mask = (op_mask - 24) >> 1;
711 break;
712 }
713 break;
714 }
715 as_bad (_("register name or number from 0 to 31 required"));
716 break;
717
718 case 'e':
719 {
720 char c;
721
722 if (*str == '-')
723 {
724 str = skip_space (str + 1);
725 op_mask = 0x1002;
726 }
727 c = TOLOWER (*str);
728 if (c == 'x')
729 op_mask |= 0x100c;
730 else if (c == 'y')
731 op_mask |= 0x8;
732 else if (c != 'z')
733 as_bad (_("pointer register (X, Y or Z) required"));
734
735 str = skip_space (str + 1);
736 if (*str == '+')
737 {
738 ++str;
739 if (op_mask & 2)
740 as_bad (_("cannot both predecrement and postincrement"));
741 op_mask |= 0x1001;
742 }
743
744 /* avr1 can do "ld r,Z" and "st Z,r" but no other pointer
745 registers, no predecrement, no postincrement. */
746 if (!avr_opt.all_opcodes && (op_mask & 0x100F)
747 && !(avr_mcu->isa & AVR_ISA_SRAM))
748 as_bad (_("addressing mode not supported"));
749 }
750 break;
751
752 case 'z':
753 if (*str == '-')
754 as_bad (_("can't predecrement"));
755
756 if (! (*str == 'z' || *str == 'Z'))
757 as_bad (_("pointer register Z required"));
758
759 str = skip_space (str + 1);
760
761 if (*str == '+')
762 {
763 ++str;
764 op_mask |= 1;
765 }
766 break;
767
768 case 'b':
769 {
770 char c = TOLOWER (*str++);
771
772 if (c == 'y')
773 op_mask |= 0x8;
774 else if (c != 'z')
775 as_bad (_("pointer register (Y or Z) required"));
776 str = skip_space (str);
777 if (*str++ == '+')
778 {
779 input_line_pointer = str;
780 avr_offset_expression (& op_expr);
781 str = input_line_pointer;
782 fix_new_exp (frag_now, where, 3,
783 &op_expr, FALSE, BFD_RELOC_AVR_6);
784 }
785 }
786 break;
787
788 case 'h':
789 str = parse_exp (str, &op_expr);
790 fix_new_exp (frag_now, where, opcode->insn_size * 2,
791 &op_expr, FALSE, BFD_RELOC_AVR_CALL);
792 break;
793
794 case 'L':
795 str = parse_exp (str, &op_expr);
796 fix_new_exp (frag_now, where, opcode->insn_size * 2,
797 &op_expr, TRUE, BFD_RELOC_AVR_13_PCREL);
798 break;
799
800 case 'l':
801 str = parse_exp (str, &op_expr);
802 fix_new_exp (frag_now, where, opcode->insn_size * 2,
803 &op_expr, TRUE, BFD_RELOC_AVR_7_PCREL);
804 break;
805
806 case 'i':
807 str = parse_exp (str, &op_expr);
808 fix_new_exp (frag_now, where + 2, opcode->insn_size * 2,
809 &op_expr, FALSE, BFD_RELOC_16);
810 break;
811
812 case 'M':
813 {
814 bfd_reloc_code_real_type r_type;
815
816 input_line_pointer = str;
817 r_type = avr_ldi_expression (&op_expr);
818 str = input_line_pointer;
819 fix_new_exp (frag_now, where, 3,
820 &op_expr, FALSE, r_type);
821 }
822 break;
823
824 case 'n':
825 {
826 unsigned int x;
827
828 x = ~avr_get_constant (str, 255);
829 str = input_line_pointer;
830 op_mask |= (x & 0xf) | ((x << 4) & 0xf00);
831 }
832 break;
833
834 case 'K':
835 input_line_pointer = str;
836 avr_offset_expression (& op_expr);
837 str = input_line_pointer;
838 fix_new_exp (frag_now, where, 3,
839 & op_expr, FALSE, BFD_RELOC_AVR_6_ADIW);
840 break;
841
842 case 'S':
843 case 's':
844 {
845 unsigned int x;
846
847 x = avr_get_constant (str, 7);
848 str = input_line_pointer;
849 if (*op == 'S')
850 x <<= 4;
851 op_mask |= x;
852 }
853 break;
854
855 case 'P':
856 {
857 unsigned int x;
858
859 x = avr_get_constant (str, 63);
860 str = input_line_pointer;
861 op_mask |= (x & 0xf) | ((x & 0x30) << 5);
862 }
863 break;
864
865 case 'p':
866 {
867 unsigned int x;
868
869 x = avr_get_constant (str, 31);
870 str = input_line_pointer;
871 op_mask |= x << 3;
872 }
873 break;
874
875 case '?':
876 break;
877
878 default:
879 as_bad (_("unknown constraint `%c'"), *op);
880 }
881
882 *line = str;
883 return op_mask;
884 }
885
886 /* Parse instruction operands.
887 Return binary opcode. */
888
889 static unsigned int
890 avr_operands (struct avr_opcodes_s *opcode, char **line)
891 {
892 char *op = opcode->constraints;
893 unsigned int bin = opcode->bin_opcode;
894 char *frag = frag_more (opcode->insn_size * 2);
895 char *str = *line;
896 int where = frag - frag_now->fr_literal;
897 static unsigned int prev = 0; /* Previous opcode. */
898
899 /* Opcode have operands. */
900 if (*op)
901 {
902 unsigned int reg1 = 0;
903 unsigned int reg2 = 0;
904 int reg1_present = 0;
905 int reg2_present = 0;
906
907 /* Parse first operand. */
908 if (REGISTER_P (*op))
909 reg1_present = 1;
910 reg1 = avr_operand (opcode, where, op, &str);
911 ++op;
912
913 /* Parse second operand. */
914 if (*op)
915 {
916 if (*op == ',')
917 ++op;
918
919 if (*op == '=')
920 {
921 reg2 = reg1;
922 reg2_present = 1;
923 }
924 else
925 {
926 if (REGISTER_P (*op))
927 reg2_present = 1;
928
929 str = skip_space (str);
930 if (*str++ != ',')
931 as_bad (_("`,' required"));
932 str = skip_space (str);
933
934 reg2 = avr_operand (opcode, where, op, &str);
935 }
936
937 if (reg1_present && reg2_present)
938 reg2 = (reg2 & 0xf) | ((reg2 << 5) & 0x200);
939 else if (reg2_present)
940 reg2 <<= 4;
941 }
942 if (reg1_present)
943 reg1 <<= 4;
944 bin |= reg1 | reg2;
945 }
946
947 /* Detect undefined combinations (like ld r31,Z+). */
948 if (!avr_opt.all_opcodes && AVR_UNDEF_P (bin))
949 as_warn (_("undefined combination of operands"));
950
951 if (opcode->insn_size == 2)
952 {
953 /* Warn if the previous opcode was cpse/sbic/sbis/sbrc/sbrs
954 (AVR core bug, fixed in the newer devices). */
955 if (!(avr_opt.no_skip_bug ||
956 (avr_mcu->isa & (AVR_ISA_MUL | AVR_ISA_MOVW)))
957 && AVR_SKIP_P (prev))
958 as_warn (_("skipping two-word instruction"));
959
960 bfd_putl32 ((bfd_vma) bin, frag);
961 }
962 else
963 bfd_putl16 ((bfd_vma) bin, frag);
964
965 prev = bin;
966 *line = str;
967 return bin;
968 }
969
970 /* GAS will call this function for each section at the end of the assembly,
971 to permit the CPU backend to adjust the alignment of a section. */
972
973 valueT
974 md_section_align (asection *seg, valueT addr)
975 {
976 int align = bfd_get_section_alignment (stdoutput, seg);
977 return ((addr + (1 << align) - 1) & (-1 << align));
978 }
979
980 /* If you define this macro, it should return the offset between the
981 address of a PC relative fixup and the position from which the PC
982 relative adjustment should be made. On many processors, the base
983 of a PC relative instruction is the next instruction, so this
984 macro would return the length of an instruction. */
985
986 long
987 md_pcrel_from_section (fixS *fixp, segT sec)
988 {
989 if (fixp->fx_addsy != (symbolS *) NULL
990 && (!S_IS_DEFINED (fixp->fx_addsy)
991 || (S_GET_SEGMENT (fixp->fx_addsy) != sec)))
992 return 0;
993
994 return fixp->fx_frag->fr_address + fixp->fx_where;
995 }
996
997 /* GAS will call this for each fixup. It should store the correct
998 value in the object file. */
999
1000 void
1001 md_apply_fix (fixS *fixP, valueT * valP, segT seg)
1002 {
1003 unsigned char *where;
1004 unsigned long insn;
1005 long value = *valP;
1006
1007 if (fixP->fx_addsy == (symbolS *) NULL)
1008 fixP->fx_done = 1;
1009
1010 else if (fixP->fx_pcrel)
1011 {
1012 segT s = S_GET_SEGMENT (fixP->fx_addsy);
1013
1014 if (s == seg || s == absolute_section)
1015 {
1016 value += S_GET_VALUE (fixP->fx_addsy);
1017 fixP->fx_done = 1;
1018 }
1019 }
1020
1021 /* We don't actually support subtracting a symbol. */
1022 if (fixP->fx_subsy != (symbolS *) NULL)
1023 as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
1024
1025 switch (fixP->fx_r_type)
1026 {
1027 default:
1028 fixP->fx_no_overflow = 1;
1029 break;
1030 case BFD_RELOC_AVR_7_PCREL:
1031 case BFD_RELOC_AVR_13_PCREL:
1032 case BFD_RELOC_32:
1033 case BFD_RELOC_16:
1034 case BFD_RELOC_AVR_CALL:
1035 break;
1036 }
1037
1038 if (fixP->fx_done)
1039 {
1040 /* Fetch the instruction, insert the fully resolved operand
1041 value, and stuff the instruction back again. */
1042 where = (unsigned char *) fixP->fx_frag->fr_literal + fixP->fx_where;
1043 insn = bfd_getl16 (where);
1044
1045 switch (fixP->fx_r_type)
1046 {
1047 case BFD_RELOC_AVR_7_PCREL:
1048 if (value & 1)
1049 as_bad_where (fixP->fx_file, fixP->fx_line,
1050 _("odd address operand: %ld"), value);
1051
1052 /* Instruction addresses are always right-shifted by 1. */
1053 value >>= 1;
1054 --value; /* Correct PC. */
1055
1056 if (value < -64 || value > 63)
1057 as_bad_where (fixP->fx_file, fixP->fx_line,
1058 _("operand out of range: %ld"), value);
1059 value = (value << 3) & 0x3f8;
1060 bfd_putl16 ((bfd_vma) (value | insn), where);
1061 break;
1062
1063 case BFD_RELOC_AVR_13_PCREL:
1064 if (value & 1)
1065 as_bad_where (fixP->fx_file, fixP->fx_line,
1066 _("odd address operand: %ld"), value);
1067
1068 /* Instruction addresses are always right-shifted by 1. */
1069 value >>= 1;
1070 --value; /* Correct PC. */
1071
1072 if (value < -2048 || value > 2047)
1073 {
1074 /* No wrap for devices with >8K of program memory. */
1075 if ((avr_mcu->isa & AVR_ISA_MEGA) || avr_opt.no_wrap)
1076 as_bad_where (fixP->fx_file, fixP->fx_line,
1077 _("operand out of range: %ld"), value);
1078 }
1079
1080 value &= 0xfff;
1081 bfd_putl16 ((bfd_vma) (value | insn), where);
1082 break;
1083
1084 case BFD_RELOC_32:
1085 bfd_putl16 ((bfd_vma) value, where);
1086 break;
1087
1088 case BFD_RELOC_16:
1089 bfd_putl16 ((bfd_vma) value, where);
1090 break;
1091
1092 case BFD_RELOC_AVR_16_PM:
1093 bfd_putl16 ((bfd_vma) (value >> 1), where);
1094 break;
1095
1096 case BFD_RELOC_AVR_LDI:
1097 if (value > 255)
1098 as_bad_where (fixP->fx_file, fixP->fx_line,
1099 _("operand out of range: %ld"), value);
1100 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value), where);
1101 break;
1102
1103 case BFD_RELOC_AVR_6:
1104 if ((value > 63) || (value < 0))
1105 as_bad_where (fixP->fx_file, fixP->fx_line,
1106 _("operand out of range: %ld"), value);
1107 bfd_putl16 ((bfd_vma) insn | ((value & 7) | ((value & (3 << 3)) << 7) | ((value & (1 << 5)) << 8)), where);
1108 break;
1109
1110 case BFD_RELOC_AVR_6_ADIW:
1111 if ((value > 63) || (value < 0))
1112 as_bad_where (fixP->fx_file, fixP->fx_line,
1113 _("operand out of range: %ld"), value);
1114 bfd_putl16 ((bfd_vma) insn | (value & 0xf) | ((value & 0x30) << 2), where);
1115 break;
1116
1117 case BFD_RELOC_AVR_LO8_LDI:
1118 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value), where);
1119 break;
1120
1121 case BFD_RELOC_AVR_HI8_LDI:
1122 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 8), where);
1123 break;
1124
1125 case BFD_RELOC_AVR_MS8_LDI:
1126 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 24), where);
1127 break;
1128
1129 case BFD_RELOC_AVR_HH8_LDI:
1130 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 16), where);
1131 break;
1132
1133 case BFD_RELOC_AVR_LO8_LDI_NEG:
1134 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value), where);
1135 break;
1136
1137 case BFD_RELOC_AVR_HI8_LDI_NEG:
1138 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 8), where);
1139 break;
1140
1141 case BFD_RELOC_AVR_MS8_LDI_NEG:
1142 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 24), where);
1143 break;
1144
1145 case BFD_RELOC_AVR_HH8_LDI_NEG:
1146 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 16), where);
1147 break;
1148
1149 case BFD_RELOC_AVR_LO8_LDI_PM:
1150 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 1), where);
1151 break;
1152
1153 case BFD_RELOC_AVR_HI8_LDI_PM:
1154 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 9), where);
1155 break;
1156
1157 case BFD_RELOC_AVR_HH8_LDI_PM:
1158 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 17), where);
1159 break;
1160
1161 case BFD_RELOC_AVR_LO8_LDI_PM_NEG:
1162 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 1), where);
1163 break;
1164
1165 case BFD_RELOC_AVR_HI8_LDI_PM_NEG:
1166 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 9), where);
1167 break;
1168
1169 case BFD_RELOC_AVR_HH8_LDI_PM_NEG:
1170 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 17), where);
1171 break;
1172
1173 case BFD_RELOC_AVR_CALL:
1174 {
1175 unsigned long x;
1176
1177 x = bfd_getl16 (where);
1178 if (value & 1)
1179 as_bad_where (fixP->fx_file, fixP->fx_line,
1180 _("odd address operand: %ld"), value);
1181 value >>= 1;
1182 x |= ((value & 0x10000) | ((value << 3) & 0x1f00000)) >> 16;
1183 bfd_putl16 ((bfd_vma) x, where);
1184 bfd_putl16 ((bfd_vma) (value & 0xffff), where + 2);
1185 }
1186 break;
1187
1188 default:
1189 as_fatal (_("line %d: unknown relocation type: 0x%x"),
1190 fixP->fx_line, fixP->fx_r_type);
1191 break;
1192 }
1193 }
1194 else
1195 {
1196 switch (fixP->fx_r_type)
1197 {
1198 case -BFD_RELOC_AVR_HI8_LDI_NEG:
1199 case -BFD_RELOC_AVR_HI8_LDI:
1200 case -BFD_RELOC_AVR_LO8_LDI_NEG:
1201 case -BFD_RELOC_AVR_LO8_LDI:
1202 as_bad_where (fixP->fx_file, fixP->fx_line,
1203 _("only constant expression allowed"));
1204 fixP->fx_done = 1;
1205 break;
1206 default:
1207 break;
1208 }
1209 }
1210 }
1211
1212 /* GAS will call this to generate a reloc, passing the resulting reloc
1213 to `bfd_install_relocation'. This currently works poorly, as
1214 `bfd_install_relocation' often does the wrong thing, and instances of
1215 `tc_gen_reloc' have been written to work around the problems, which
1216 in turns makes it difficult to fix `bfd_install_relocation'. */
1217
1218 /* If while processing a fixup, a reloc really needs to be created
1219 then it is done here. */
1220
1221 arelent *
1222 tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED,
1223 fixS *fixp)
1224 {
1225 arelent *reloc;
1226
1227 if (fixp->fx_addsy && fixp->fx_subsy)
1228 {
1229 long value = 0;
1230
1231 if ((S_GET_SEGMENT (fixp->fx_addsy) != S_GET_SEGMENT (fixp->fx_subsy))
1232 || S_GET_SEGMENT (fixp->fx_addsy) == undefined_section)
1233 {
1234 as_bad_where (fixp->fx_file, fixp->fx_line,
1235 "Difference of symbols in different sections is not supported");
1236 return NULL;
1237 }
1238
1239 /* We are dealing with two symbols defined in the same section.
1240 Let us fix-up them here. */
1241 value += S_GET_VALUE (fixp->fx_addsy);
1242 value -= S_GET_VALUE (fixp->fx_subsy);
1243
1244 /* When fx_addsy and fx_subsy both are zero, md_apply_fix
1245 only takes it's second operands for the fixup value. */
1246 fixp->fx_addsy = NULL;
1247 fixp->fx_subsy = NULL;
1248 md_apply_fix (fixp, (valueT *) &value, NULL);
1249
1250 return NULL;
1251 }
1252
1253 reloc = xmalloc (sizeof (arelent));
1254
1255 reloc->sym_ptr_ptr = xmalloc (sizeof (asymbol *));
1256 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
1257
1258 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
1259 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
1260 if (reloc->howto == (reloc_howto_type *) NULL)
1261 {
1262 as_bad_where (fixp->fx_file, fixp->fx_line,
1263 _("reloc %d not supported by object file format"),
1264 (int) fixp->fx_r_type);
1265 return NULL;
1266 }
1267
1268 if (fixp->fx_r_type == BFD_RELOC_VTABLE_INHERIT
1269 || fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
1270 reloc->address = fixp->fx_offset;
1271
1272 reloc->addend = fixp->fx_offset;
1273
1274 return reloc;
1275 }
1276
1277 void
1278 md_assemble (char *str)
1279 {
1280 struct avr_opcodes_s *opcode;
1281 char op[11];
1282
1283 str = skip_space (extract_word (str, op, sizeof (op)));
1284
1285 if (!op[0])
1286 as_bad (_("can't find opcode "));
1287
1288 opcode = (struct avr_opcodes_s *) hash_find (avr_hash, op);
1289
1290 if (opcode == NULL)
1291 {
1292 as_bad (_("unknown opcode `%s'"), op);
1293 return;
1294 }
1295
1296 /* Special case for opcodes with optional operands (lpm, elpm) -
1297 version with operands exists in avr_opcodes[] in the next entry. */
1298
1299 if (*str && *opcode->constraints == '?')
1300 ++opcode;
1301
1302 if (!avr_opt.all_opcodes && (opcode->isa & avr_mcu->isa) != opcode->isa)
1303 as_bad (_("illegal opcode %s for mcu %s"), opcode->name, avr_mcu->name);
1304
1305 /* We used to set input_line_pointer to the result of get_operands,
1306 but that is wrong. Our caller assumes we don't change it. */
1307 {
1308 char *t = input_line_pointer;
1309
1310 avr_operands (opcode, &str);
1311 if (*skip_space (str))
1312 as_bad (_("garbage at end of line"));
1313 input_line_pointer = t;
1314 }
1315 }
1316
1317 /* Flag to pass `pm' mode between `avr_parse_cons_expression' and
1318 `avr_cons_fix_new'. */
1319 static int exp_mod_pm = 0;
1320
1321 /* Parse special CONS expression: pm (expression)
1322 or alternatively: gs (expression).
1323 These are used for addressing program memory.
1324 Relocation: BFD_RELOC_AVR_16_PM. */
1325
1326 void
1327 avr_parse_cons_expression (expressionS *exp, int nbytes)
1328 {
1329 char *tmp;
1330
1331 exp_mod_pm = 0;
1332
1333 tmp = input_line_pointer = skip_space (input_line_pointer);
1334
1335 if (nbytes == 2)
1336 {
1337 char *pm_name1 = "pm";
1338 char *pm_name2 = "gs";
1339 int len = strlen (pm_name1);
1340 /* len must be the same for both pm identifiers. */
1341
1342 if (strncasecmp (input_line_pointer, pm_name1, len) == 0
1343 || strncasecmp (input_line_pointer, pm_name2, len) == 0)
1344 {
1345 input_line_pointer = skip_space (input_line_pointer + len);
1346
1347 if (*input_line_pointer == '(')
1348 {
1349 input_line_pointer = skip_space (input_line_pointer + 1);
1350 exp_mod_pm = 1;
1351 expression (exp);
1352
1353 if (*input_line_pointer == ')')
1354 ++input_line_pointer;
1355 else
1356 {
1357 as_bad (_("`)' required"));
1358 exp_mod_pm = 0;
1359 }
1360
1361 return;
1362 }
1363
1364 input_line_pointer = tmp;
1365 }
1366 }
1367
1368 expression (exp);
1369 }
1370
1371 void
1372 avr_cons_fix_new (fragS *frag,
1373 int where,
1374 int nbytes,
1375 expressionS *exp)
1376 {
1377 if (exp_mod_pm == 0)
1378 {
1379 if (nbytes == 2)
1380 fix_new_exp (frag, where, nbytes, exp, FALSE, BFD_RELOC_16);
1381 else if (nbytes == 4)
1382 fix_new_exp (frag, where, nbytes, exp, FALSE, BFD_RELOC_32);
1383 else
1384 as_bad (_("illegal %srelocation size: %d"), "", nbytes);
1385 }
1386 else
1387 {
1388 if (nbytes == 2)
1389 fix_new_exp (frag, where, nbytes, exp, FALSE, BFD_RELOC_AVR_16_PM);
1390 else
1391 as_bad (_("illegal %srelocation size: %d"), "`pm' ", nbytes);
1392 exp_mod_pm = 0;
1393 }
1394 }
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