1 /* tc-avr.c -- Assembler code for the ATMEL AVR
3 Copyright (C) 1999-2014 Free Software Foundation, Inc.
4 Contributed by Denis Chertykov <denisc@overta.ru>
6 This file is part of GAS, the GNU Assembler.
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3, or (at your option)
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to
20 the Free Software Foundation, 51 Franklin Street - Fifth Floor,
21 Boston, MA 02110-1301, USA. */
24 #include "safe-ctype.h"
26 #include "dwarf2dbg.h"
27 #include "dw2gencfi.h"
35 int insn_size
; /* In words. */
37 unsigned int bin_opcode
;
40 #define AVR_INSN(NAME, CONSTR, OPCODE, SIZE, ISA, BIN) \
41 {#NAME, CONSTR, OPCODE, SIZE, ISA, BIN},
43 struct avr_opcodes_s avr_opcodes
[] =
45 #include "opcode/avr.h"
46 {NULL
, NULL
, NULL
, 0, 0, 0}
49 const char comment_chars
[] = ";";
50 const char line_comment_chars
[] = "#";
51 const char line_separator_chars
[] = "$";
53 const char *md_shortopts
= "m:";
61 /* XXX - devices that don't seem to exist (renamed, replaced with larger
62 ones, or planned but never produced), left here for compatibility. */
64 static struct mcu_type_s mcu_types
[] =
66 {"avr1", AVR_ISA_AVR1
, bfd_mach_avr1
},
67 /* TODO: insruction set for avr2 architecture should be AVR_ISA_AVR2,
68 but set to AVR_ISA_AVR25 for some following version
69 of GCC (from 4.3) for backward compatibility. */
70 {"avr2", AVR_ISA_AVR25
, bfd_mach_avr2
},
71 {"avr25", AVR_ISA_AVR25
, bfd_mach_avr25
},
72 /* TODO: insruction set for avr3 architecture should be AVR_ISA_AVR3,
73 but set to AVR_ISA_AVR3_ALL for some following version
74 of GCC (from 4.3) for backward compatibility. */
75 {"avr3", AVR_ISA_AVR3_ALL
, bfd_mach_avr3
},
76 {"avr31", AVR_ISA_AVR31
, bfd_mach_avr31
},
77 {"avr35", AVR_ISA_AVR35
, bfd_mach_avr35
},
78 {"avr4", AVR_ISA_AVR4
, bfd_mach_avr4
},
79 /* TODO: insruction set for avr5 architecture should be AVR_ISA_AVR5,
80 but set to AVR_ISA_AVR51 for some following version
81 of GCC (from 4.3) for backward compatibility. */
82 {"avr5", AVR_ISA_AVR51
, bfd_mach_avr5
},
83 {"avr51", AVR_ISA_AVR51
, bfd_mach_avr51
},
84 {"avr6", AVR_ISA_AVR6
, bfd_mach_avr6
},
85 {"avrxmega1", AVR_ISA_XMEGA
, bfd_mach_avrxmega1
},
86 {"avrxmega2", AVR_ISA_XMEGA
, bfd_mach_avrxmega2
},
87 {"avrxmega3", AVR_ISA_XMEGA
, bfd_mach_avrxmega3
},
88 {"avrxmega4", AVR_ISA_XMEGA
, bfd_mach_avrxmega4
},
89 {"avrxmega5", AVR_ISA_XMEGA
, bfd_mach_avrxmega5
},
90 {"avrxmega6", AVR_ISA_XMEGA
, bfd_mach_avrxmega6
},
91 {"avrxmega7", AVR_ISA_XMEGA
, bfd_mach_avrxmega7
},
92 {"at90s1200", AVR_ISA_1200
, bfd_mach_avr1
},
93 {"attiny11", AVR_ISA_AVR1
, bfd_mach_avr1
},
94 {"attiny12", AVR_ISA_AVR1
, bfd_mach_avr1
},
95 {"attiny15", AVR_ISA_AVR1
, bfd_mach_avr1
},
96 {"attiny28", AVR_ISA_AVR1
, bfd_mach_avr1
},
97 {"at90s2313", AVR_ISA_AVR2
, bfd_mach_avr2
},
98 {"at90s2323", AVR_ISA_AVR2
, bfd_mach_avr2
},
99 {"at90s2333", AVR_ISA_AVR2
, bfd_mach_avr2
}, /* XXX -> 4433 */
100 {"at90s2343", AVR_ISA_AVR2
, bfd_mach_avr2
},
101 {"attiny22", AVR_ISA_AVR2
, bfd_mach_avr2
}, /* XXX -> 2343 */
102 {"attiny26", AVR_ISA_2xxe
, bfd_mach_avr2
},
103 {"at90s4414", AVR_ISA_AVR2
, bfd_mach_avr2
}, /* XXX -> 8515 */
104 {"at90s4433", AVR_ISA_AVR2
, bfd_mach_avr2
},
105 {"at90s4434", AVR_ISA_AVR2
, bfd_mach_avr2
}, /* XXX -> 8535 */
106 {"at90s8515", AVR_ISA_AVR2
, bfd_mach_avr2
},
107 {"at90c8534", AVR_ISA_AVR2
, bfd_mach_avr2
},
108 {"at90s8535", AVR_ISA_AVR2
, bfd_mach_avr2
},
109 {"ata5272", AVR_ISA_AVR25
, bfd_mach_avr25
},
110 {"attiny13", AVR_ISA_AVR25
, bfd_mach_avr25
},
111 {"attiny13a", AVR_ISA_AVR25
, bfd_mach_avr25
},
112 {"attiny2313", AVR_ISA_AVR25
, bfd_mach_avr25
},
113 {"attiny2313a",AVR_ISA_AVR25
, bfd_mach_avr25
},
114 {"attiny24", AVR_ISA_AVR25
, bfd_mach_avr25
},
115 {"attiny24a", AVR_ISA_AVR25
, bfd_mach_avr25
},
116 {"attiny4313", AVR_ISA_AVR25
, bfd_mach_avr25
},
117 {"attiny44", AVR_ISA_AVR25
, bfd_mach_avr25
},
118 {"attiny44a", AVR_ISA_AVR25
, bfd_mach_avr25
},
119 {"attiny84", AVR_ISA_AVR25
, bfd_mach_avr25
},
120 {"attiny84a", AVR_ISA_AVR25
, bfd_mach_avr25
},
121 {"attiny25", AVR_ISA_AVR25
, bfd_mach_avr25
},
122 {"attiny45", AVR_ISA_AVR25
, bfd_mach_avr25
},
123 {"attiny85", AVR_ISA_AVR25
, bfd_mach_avr25
},
124 {"attiny261", AVR_ISA_AVR25
, bfd_mach_avr25
},
125 {"attiny261a", AVR_ISA_AVR25
, bfd_mach_avr25
},
126 {"attiny461", AVR_ISA_AVR25
, bfd_mach_avr25
},
127 {"attiny461a", AVR_ISA_AVR25
, bfd_mach_avr25
},
128 {"attiny861", AVR_ISA_AVR25
, bfd_mach_avr25
},
129 {"attiny861a", AVR_ISA_AVR25
, bfd_mach_avr25
},
130 {"attiny87", AVR_ISA_AVR25
, bfd_mach_avr25
},
131 {"attiny43u", AVR_ISA_AVR25
, bfd_mach_avr25
},
132 {"attiny48", AVR_ISA_AVR25
, bfd_mach_avr25
},
133 {"attiny88", AVR_ISA_AVR25
, bfd_mach_avr25
},
134 {"attiny828", AVR_ISA_AVR25
, bfd_mach_avr25
},
135 {"at86rf401", AVR_ISA_RF401
, bfd_mach_avr25
},
136 {"at43usb355", AVR_ISA_AVR3
, bfd_mach_avr3
},
137 {"at76c711", AVR_ISA_AVR3
, bfd_mach_avr3
},
138 {"atmega103", AVR_ISA_AVR31
, bfd_mach_avr31
},
139 {"at43usb320", AVR_ISA_AVR31
, bfd_mach_avr31
},
140 {"attiny167", AVR_ISA_AVR35
, bfd_mach_avr35
},
141 {"at90usb82", AVR_ISA_AVR35
, bfd_mach_avr35
},
142 {"at90usb162", AVR_ISA_AVR35
, bfd_mach_avr35
},
143 {"ata5505", AVR_ISA_AVR35
, bfd_mach_avr35
},
144 {"atmega8u2", AVR_ISA_AVR35
, bfd_mach_avr35
},
145 {"atmega16u2", AVR_ISA_AVR35
, bfd_mach_avr35
},
146 {"atmega32u2", AVR_ISA_AVR35
, bfd_mach_avr35
},
147 {"attiny1634", AVR_ISA_AVR35
, bfd_mach_avr35
},
148 {"atmega8", AVR_ISA_M8
, bfd_mach_avr4
},
149 {"ata6289", AVR_ISA_AVR4
, bfd_mach_avr4
},
150 {"atmega8a", AVR_ISA_M8
, bfd_mach_avr4
},
151 {"ata6285", AVR_ISA_AVR4
, bfd_mach_avr4
},
152 {"ata6286", AVR_ISA_AVR4
, bfd_mach_avr4
},
153 {"atmega48", AVR_ISA_AVR4
, bfd_mach_avr4
},
154 {"atmega48a", AVR_ISA_AVR4
, bfd_mach_avr4
},
155 {"atmega48pa", AVR_ISA_AVR4
, bfd_mach_avr4
},
156 {"atmega48p", AVR_ISA_AVR4
, bfd_mach_avr4
},
157 {"atmega88", AVR_ISA_AVR4
, bfd_mach_avr4
},
158 {"atmega88a", AVR_ISA_AVR4
, bfd_mach_avr4
},
159 {"atmega88p", AVR_ISA_AVR4
, bfd_mach_avr4
},
160 {"atmega88pa", AVR_ISA_AVR4
, bfd_mach_avr4
},
161 {"atmega8515", AVR_ISA_M8
, bfd_mach_avr4
},
162 {"atmega8535", AVR_ISA_M8
, bfd_mach_avr4
},
163 {"atmega8hva", AVR_ISA_AVR4
, bfd_mach_avr4
},
164 {"at90pwm1", AVR_ISA_AVR4
, bfd_mach_avr4
},
165 {"at90pwm2", AVR_ISA_AVR4
, bfd_mach_avr4
},
166 {"at90pwm2b", AVR_ISA_AVR4
, bfd_mach_avr4
},
167 {"at90pwm3", AVR_ISA_AVR4
, bfd_mach_avr4
},
168 {"at90pwm3b", AVR_ISA_AVR4
, bfd_mach_avr4
},
169 {"at90pwm81", AVR_ISA_AVR4
, bfd_mach_avr4
},
170 {"at90pwm161", AVR_ISA_AVR5
, bfd_mach_avr5
},
171 {"ata5790", AVR_ISA_AVR5
, bfd_mach_avr5
},
172 {"ata5795", AVR_ISA_AVR5
, bfd_mach_avr5
},
173 {"atmega16", AVR_ISA_AVR5
, bfd_mach_avr5
},
174 {"atmega16a", AVR_ISA_AVR5
, bfd_mach_avr5
},
175 {"atmega161", AVR_ISA_M161
, bfd_mach_avr5
},
176 {"atmega162", AVR_ISA_AVR5
, bfd_mach_avr5
},
177 {"atmega163", AVR_ISA_M161
, bfd_mach_avr5
},
178 {"atmega164a", AVR_ISA_AVR5
, bfd_mach_avr5
},
179 {"atmega164p", AVR_ISA_AVR5
, bfd_mach_avr5
},
180 {"atmega164pa",AVR_ISA_AVR5
, bfd_mach_avr5
},
181 {"atmega165", AVR_ISA_AVR5
, bfd_mach_avr5
},
182 {"atmega165a", AVR_ISA_AVR5
, bfd_mach_avr5
},
183 {"atmega165p", AVR_ISA_AVR5
, bfd_mach_avr5
},
184 {"atmega165pa",AVR_ISA_AVR5
, bfd_mach_avr5
},
185 {"atmega168", AVR_ISA_AVR5
, bfd_mach_avr5
},
186 {"atmega168a", AVR_ISA_AVR5
, bfd_mach_avr5
},
187 {"atmega168p", AVR_ISA_AVR5
, bfd_mach_avr5
},
188 {"atmega168pa",AVR_ISA_AVR5
, bfd_mach_avr5
},
189 {"atmega169", AVR_ISA_AVR5
, bfd_mach_avr5
},
190 {"atmega169a", AVR_ISA_AVR5
, bfd_mach_avr5
},
191 {"atmega169p", AVR_ISA_AVR5
, bfd_mach_avr5
},
192 {"atmega169pa",AVR_ISA_AVR5
, bfd_mach_avr5
},
193 {"atmega32", AVR_ISA_AVR5
, bfd_mach_avr5
},
194 {"atmega32a", AVR_ISA_AVR5
, bfd_mach_avr5
},
195 {"atmega323", AVR_ISA_AVR5
, bfd_mach_avr5
},
196 {"atmega324a", AVR_ISA_AVR5
, bfd_mach_avr5
},
197 {"atmega324p", AVR_ISA_AVR5
, bfd_mach_avr5
},
198 {"atmega324pa",AVR_ISA_AVR5
, bfd_mach_avr5
},
199 {"atmega325", AVR_ISA_AVR5
, bfd_mach_avr5
},
200 {"atmega325a", AVR_ISA_AVR5
, bfd_mach_avr5
},
201 {"atmega325p", AVR_ISA_AVR5
, bfd_mach_avr5
},
202 {"atmega325pa",AVR_ISA_AVR5
, bfd_mach_avr5
},
203 {"atmega3250", AVR_ISA_AVR5
, bfd_mach_avr5
},
204 {"atmega3250a",AVR_ISA_AVR5
, bfd_mach_avr5
},
205 {"atmega3250p",AVR_ISA_AVR5
, bfd_mach_avr5
},
206 {"atmega3250pa",AVR_ISA_AVR5
, bfd_mach_avr5
},
207 {"atmega328", AVR_ISA_AVR5
, bfd_mach_avr5
},
208 {"atmega328p", AVR_ISA_AVR5
, bfd_mach_avr5
},
209 {"atmega329", AVR_ISA_AVR5
, bfd_mach_avr5
},
210 {"atmega329a", AVR_ISA_AVR5
, bfd_mach_avr5
},
211 {"atmega329p", AVR_ISA_AVR5
, bfd_mach_avr5
},
212 {"atmega329pa",AVR_ISA_AVR5
, bfd_mach_avr5
},
213 {"atmega3290", AVR_ISA_AVR5
, bfd_mach_avr5
},
214 {"atmega3290a",AVR_ISA_AVR5
, bfd_mach_avr5
},
215 {"atmega3290p",AVR_ISA_AVR5
, bfd_mach_avr5
},
216 {"atmega3290pa",AVR_ISA_AVR5
, bfd_mach_avr5
},
217 {"atmega406", AVR_ISA_AVR5
, bfd_mach_avr5
},
218 {"atmega64rfr2", AVR_ISA_AVR5
, bfd_mach_avr5
},
219 {"atmega644rfr2",AVR_ISA_AVR5
, bfd_mach_avr5
},
220 {"atmega64", AVR_ISA_AVR5
, bfd_mach_avr5
},
221 {"atmega64a", AVR_ISA_AVR5
, bfd_mach_avr5
},
222 {"atmega640", AVR_ISA_AVR5
, bfd_mach_avr5
},
223 {"atmega644", AVR_ISA_AVR5
, bfd_mach_avr5
},
224 {"atmega644a", AVR_ISA_AVR5
, bfd_mach_avr5
},
225 {"atmega644p", AVR_ISA_AVR5
, bfd_mach_avr5
},
226 {"atmega644pa",AVR_ISA_AVR5
, bfd_mach_avr5
},
227 {"atmega645", AVR_ISA_AVR5
, bfd_mach_avr5
},
228 {"atmega645a", AVR_ISA_AVR5
, bfd_mach_avr5
},
229 {"atmega645p", AVR_ISA_AVR5
, bfd_mach_avr5
},
230 {"atmega649", AVR_ISA_AVR5
, bfd_mach_avr5
},
231 {"atmega649a", AVR_ISA_AVR5
, bfd_mach_avr5
},
232 {"atmega649p", AVR_ISA_AVR5
, bfd_mach_avr5
},
233 {"atmega6450", AVR_ISA_AVR5
, bfd_mach_avr5
},
234 {"atmega6450a",AVR_ISA_AVR5
, bfd_mach_avr5
},
235 {"atmega6450p",AVR_ISA_AVR5
, bfd_mach_avr5
},
236 {"atmega6490", AVR_ISA_AVR5
, bfd_mach_avr5
},
237 {"atmega6490a",AVR_ISA_AVR5
, bfd_mach_avr5
},
238 {"atmega6490p",AVR_ISA_AVR5
, bfd_mach_avr5
},
239 {"atmega64rfr2",AVR_ISA_AVR5
, bfd_mach_avr5
},
240 {"atmega644rfr2",AVR_ISA_AVR5
, bfd_mach_avr5
},
241 {"atmega16hva",AVR_ISA_AVR5
, bfd_mach_avr5
},
242 {"atmega16hva2",AVR_ISA_AVR5
, bfd_mach_avr5
},
243 {"atmega16hvb",AVR_ISA_AVR5
, bfd_mach_avr5
},
244 {"atmega16hvbrevb",AVR_ISA_AVR5
,bfd_mach_avr5
},
245 {"atmega32hvb",AVR_ISA_AVR5
, bfd_mach_avr5
},
246 {"atmega32hvbrevb",AVR_ISA_AVR5
,bfd_mach_avr5
},
247 {"atmega64hve",AVR_ISA_AVR5
, bfd_mach_avr5
},
248 {"at90can32" , AVR_ISA_AVR5
, bfd_mach_avr5
},
249 {"at90can64" , AVR_ISA_AVR5
, bfd_mach_avr5
},
250 {"at90pwm161", AVR_ISA_AVR5
, bfd_mach_avr5
},
251 {"at90pwm216", AVR_ISA_AVR5
, bfd_mach_avr5
},
252 {"at90pwm316", AVR_ISA_AVR5
, bfd_mach_avr5
},
253 {"atmega32c1", AVR_ISA_AVR5
, bfd_mach_avr5
},
254 {"atmega64c1", AVR_ISA_AVR5
, bfd_mach_avr5
},
255 {"atmega16m1", AVR_ISA_AVR5
, bfd_mach_avr5
},
256 {"atmega32m1", AVR_ISA_AVR5
, bfd_mach_avr5
},
257 {"atmega64m1", AVR_ISA_AVR5
, bfd_mach_avr5
},
258 {"atmega16u4", AVR_ISA_AVR5
, bfd_mach_avr5
},
259 {"atmega32u4", AVR_ISA_AVR5
, bfd_mach_avr5
},
260 {"atmega32u6", AVR_ISA_AVR5
, bfd_mach_avr5
},
261 {"at90usb646", AVR_ISA_AVR5
, bfd_mach_avr5
},
262 {"at90usb647", AVR_ISA_AVR5
, bfd_mach_avr5
},
263 {"at90scr100", AVR_ISA_AVR5
, bfd_mach_avr5
},
264 {"at94k", AVR_ISA_94K
, bfd_mach_avr5
},
265 {"m3000", AVR_ISA_AVR5
, bfd_mach_avr5
},
266 {"atmega128", AVR_ISA_AVR51
, bfd_mach_avr51
},
267 {"atmega128a", AVR_ISA_AVR51
, bfd_mach_avr51
},
268 {"atmega1280", AVR_ISA_AVR51
, bfd_mach_avr51
},
269 {"atmega1281", AVR_ISA_AVR51
, bfd_mach_avr51
},
270 {"atmega1284", AVR_ISA_AVR51
, bfd_mach_avr51
},
271 {"atmega1284p",AVR_ISA_AVR51
, bfd_mach_avr51
},
272 {"atmega128rfa1",AVR_ISA_AVR51
, bfd_mach_avr51
},
273 {"atmega128rfr2",AVR_ISA_AVR51
, bfd_mach_avr51
},
274 {"atmega1284rfr2",AVR_ISA_AVR51
, bfd_mach_avr51
},
275 {"at90can128", AVR_ISA_AVR51
, bfd_mach_avr51
},
276 {"at90usb1286",AVR_ISA_AVR51
, bfd_mach_avr51
},
277 {"at90usb1287",AVR_ISA_AVR51
, bfd_mach_avr51
},
278 {"atmega2560", AVR_ISA_AVR6
, bfd_mach_avr6
},
279 {"atmega2561", AVR_ISA_AVR6
, bfd_mach_avr6
},
280 {"atmega256rfr2", AVR_ISA_AVR6
, bfd_mach_avr6
},
281 {"atmega2564rfr2", AVR_ISA_AVR6
, bfd_mach_avr6
},
282 {"atxmega16a4", AVR_ISA_XMEGA
, bfd_mach_avrxmega2
},
283 {"atxmega16a4u",AVR_ISA_XMEGAU
, bfd_mach_avrxmega2
},
284 {"atxmega16c4", AVR_ISA_XMEGAU
, bfd_mach_avrxmega2
},
285 {"atxmega16d4", AVR_ISA_XMEGA
, bfd_mach_avrxmega2
},
286 {"atxmega32a4", AVR_ISA_XMEGA
, bfd_mach_avrxmega2
},
287 {"atxmega32a4u",AVR_ISA_XMEGAU
, bfd_mach_avrxmega2
},
288 {"atxmega32c4", AVR_ISA_XMEGAU
, bfd_mach_avrxmega2
},
289 {"atxmega32d4", AVR_ISA_XMEGA
, bfd_mach_avrxmega2
},
290 {"atxmega32e5", AVR_ISA_XMEGA
, bfd_mach_avrxmega2
},
291 {"atxmega16e5", AVR_ISA_XMEGA
, bfd_mach_avrxmega2
},
292 {"atxmega8e5", AVR_ISA_XMEGA
, bfd_mach_avrxmega2
},
293 {"atxmega32x1", AVR_ISA_XMEGA
, bfd_mach_avrxmega2
},
294 {"atxmega64a3", AVR_ISA_XMEGA
, bfd_mach_avrxmega4
},
295 {"atxmega64a3u",AVR_ISA_XMEGAU
, bfd_mach_avrxmega4
},
296 {"atxmega64a4u",AVR_ISA_XMEGAU
, bfd_mach_avrxmega4
},
297 {"atxmega64b1", AVR_ISA_XMEGAU
, bfd_mach_avrxmega4
},
298 {"atxmega64b3", AVR_ISA_XMEGAU
, bfd_mach_avrxmega4
},
299 {"atxmega64c3", AVR_ISA_XMEGAU
, bfd_mach_avrxmega4
},
300 {"atxmega64d3", AVR_ISA_XMEGA
, bfd_mach_avrxmega4
},
301 {"atxmega64d4", AVR_ISA_XMEGA
, bfd_mach_avrxmega4
},
302 {"atxmega64a1", AVR_ISA_XMEGA
, bfd_mach_avrxmega5
},
303 {"atxmega64a1u",AVR_ISA_XMEGAU
, bfd_mach_avrxmega5
},
304 {"atxmega128a3", AVR_ISA_XMEGA
, bfd_mach_avrxmega6
},
305 {"atxmega128a3u",AVR_ISA_XMEGAU
,bfd_mach_avrxmega6
},
306 {"atxmega128b1", AVR_ISA_XMEGAU
, bfd_mach_avrxmega6
},
307 {"atxmega128b3", AVR_ISA_XMEGAU
,bfd_mach_avrxmega6
},
308 {"atxmega128c3", AVR_ISA_XMEGAU
,bfd_mach_avrxmega6
},
309 {"atxmega128d3", AVR_ISA_XMEGA
, bfd_mach_avrxmega6
},
310 {"atxmega128d4", AVR_ISA_XMEGA
, bfd_mach_avrxmega6
},
311 {"atxmega192a3", AVR_ISA_XMEGA
, bfd_mach_avrxmega6
},
312 {"atxmega192a3u",AVR_ISA_XMEGAU
,bfd_mach_avrxmega6
},
313 {"atxmega192c3", AVR_ISA_XMEGAU
, bfd_mach_avrxmega6
},
314 {"atxmega192d3", AVR_ISA_XMEGA
, bfd_mach_avrxmega6
},
315 {"atxmega256a3", AVR_ISA_XMEGA
, bfd_mach_avrxmega6
},
316 {"atxmega256a3u",AVR_ISA_XMEGAU
,bfd_mach_avrxmega6
},
317 {"atxmega256a3b",AVR_ISA_XMEGA
, bfd_mach_avrxmega6
},
318 {"atxmega256a3bu",AVR_ISA_XMEGAU
, bfd_mach_avrxmega6
},
319 {"atxmega256c3", AVR_ISA_XMEGAU
,bfd_mach_avrxmega6
},
320 {"atxmega256d3", AVR_ISA_XMEGA
, bfd_mach_avrxmega6
},
321 {"atxmega384c3", AVR_ISA_XMEGAU
,bfd_mach_avrxmega6
},
322 {"atxmega384d3", AVR_ISA_XMEGA
, bfd_mach_avrxmega6
},
323 {"atxmega128a1", AVR_ISA_XMEGA
, bfd_mach_avrxmega7
},
324 {"atxmega128a1u", AVR_ISA_XMEGAU
, bfd_mach_avrxmega7
},
325 {"atxmega128a4u", AVR_ISA_XMEGAU
, bfd_mach_avrxmega7
},
330 /* Current MCU type. */
331 static struct mcu_type_s default_mcu
= {"avr2", AVR_ISA_AVR2
, bfd_mach_avr2
};
332 static struct mcu_type_s specified_mcu
;
333 static struct mcu_type_s
* avr_mcu
= & default_mcu
;
335 /* AVR target-specific switches. */
338 int all_opcodes
; /* -mall-opcodes: accept all known AVR opcodes. */
339 int no_skip_bug
; /* -mno-skip-bug: no warnings for skipping 2-word insns. */
340 int no_wrap
; /* -mno-wrap: reject rjmp/rcall with 8K wrap-around. */
343 static struct avr_opt_s avr_opt
= { 0, 0, 0 };
345 const char EXP_CHARS
[] = "eE";
346 const char FLT_CHARS
[] = "dD";
348 static void avr_set_arch (int);
350 /* The target specific pseudo-ops which we support. */
351 const pseudo_typeS md_pseudo_table
[] =
353 {"arch", avr_set_arch
, 0},
357 #define LDI_IMMEDIATE(x) (((x) & 0xf) | (((x) << 4) & 0xf00))
359 #define EXP_MOD_NAME(i) exp_mod[i].name
360 #define EXP_MOD_RELOC(i) exp_mod[i].reloc
361 #define EXP_MOD_NEG_RELOC(i) exp_mod[i].neg_reloc
362 #define HAVE_PM_P(i) exp_mod[i].have_pm
367 bfd_reloc_code_real_type reloc
;
368 bfd_reloc_code_real_type neg_reloc
;
372 static struct exp_mod_s exp_mod
[] =
374 {"hh8", BFD_RELOC_AVR_HH8_LDI
, BFD_RELOC_AVR_HH8_LDI_NEG
, 1},
375 {"pm_hh8", BFD_RELOC_AVR_HH8_LDI_PM
, BFD_RELOC_AVR_HH8_LDI_PM_NEG
, 0},
376 {"hi8", BFD_RELOC_AVR_HI8_LDI
, BFD_RELOC_AVR_HI8_LDI_NEG
, 1},
377 {"pm_hi8", BFD_RELOC_AVR_HI8_LDI_PM
, BFD_RELOC_AVR_HI8_LDI_PM_NEG
, 0},
378 {"lo8", BFD_RELOC_AVR_LO8_LDI
, BFD_RELOC_AVR_LO8_LDI_NEG
, 1},
379 {"pm_lo8", BFD_RELOC_AVR_LO8_LDI_PM
, BFD_RELOC_AVR_LO8_LDI_PM_NEG
, 0},
380 {"hlo8", BFD_RELOC_AVR_HH8_LDI
, BFD_RELOC_AVR_HH8_LDI_NEG
, 0},
381 {"hhi8", BFD_RELOC_AVR_MS8_LDI
, BFD_RELOC_AVR_MS8_LDI_NEG
, 0},
384 /* A union used to store indicies into the exp_mod[] array
385 in a hash table which expects void * data types. */
392 /* Opcode hash table. */
393 static struct hash_control
*avr_hash
;
395 /* Reloc modifiers hash control (hh8,hi8,lo8,pm_xx). */
396 static struct hash_control
*avr_mod_hash
;
398 #define OPTION_MMCU 'm'
401 OPTION_ALL_OPCODES
= OPTION_MD_BASE
+ 1,
407 struct option md_longopts
[] =
409 { "mmcu", required_argument
, NULL
, OPTION_MMCU
},
410 { "mall-opcodes", no_argument
, NULL
, OPTION_ALL_OPCODES
},
411 { "mno-skip-bug", no_argument
, NULL
, OPTION_NO_SKIP_BUG
},
412 { "mno-wrap", no_argument
, NULL
, OPTION_NO_WRAP
},
413 { "mrmw", no_argument
, NULL
, OPTION_ISA_RMW
},
414 { NULL
, no_argument
, NULL
, 0 }
417 size_t md_longopts_size
= sizeof (md_longopts
);
419 /* Display nicely formatted list of known MCU names. */
422 show_mcu_list (FILE *stream
)
426 fprintf (stream
, _("Known MCU names:"));
429 for (i
= 0; mcu_types
[i
].name
; i
++)
431 int len
= strlen (mcu_types
[i
].name
);
436 fprintf (stream
, " %s", mcu_types
[i
].name
);
439 fprintf (stream
, "\n %s", mcu_types
[i
].name
);
444 fprintf (stream
, "\n");
450 while (*s
== ' ' || *s
== '\t')
455 /* Extract one word from FROM and copy it to TO. */
458 extract_word (char *from
, char *to
, int limit
)
463 /* Drop leading whitespace. */
464 from
= skip_space (from
);
467 /* Find the op code end. */
468 for (op_end
= from
; *op_end
!= 0 && is_part_of_name (*op_end
);)
470 to
[size
++] = *op_end
++;
471 if (size
+ 1 >= limit
)
480 md_estimate_size_before_relax (fragS
*fragp ATTRIBUTE_UNUSED
,
481 asection
*seg ATTRIBUTE_UNUSED
)
488 md_show_usage (FILE *stream
)
491 _("AVR Assembler options:\n"
492 " -mmcu=[avr-name] select microcontroller variant\n"
493 " [avr-name] can be:\n"
494 " avr1 - classic AVR core without data RAM\n"
495 " avr2 - classic AVR core with up to 8K program memory\n"
496 " avr25 - classic AVR core with up to 8K program memory\n"
497 " plus the MOVW instruction\n"
498 " avr3 - classic AVR core with up to 64K program memory\n"
499 " avr31 - classic AVR core with up to 128K program memory\n"
500 " avr35 - classic AVR core with up to 64K program memory\n"
501 " plus the MOVW instruction\n"
502 " avr4 - enhanced AVR core with up to 8K program memory\n"
503 " avr5 - enhanced AVR core with up to 64K program memory\n"
504 " avr51 - enhanced AVR core with up to 128K program memory\n"
505 " avr6 - enhanced AVR core with up to 256K program memory\n"
506 " avrxmega2 - XMEGA, > 8K, < 64K FLASH, < 64K RAM\n"
507 " avrxmega3 - XMEGA, > 8K, <= 64K FLASH, > 64K RAM\n"
508 " avrxmega4 - XMEGA, > 64K, <= 128K FLASH, <= 64K RAM\n"
509 " avrxmega5 - XMEGA, > 64K, <= 128K FLASH, > 64K RAM\n"
510 " avrxmega6 - XMEGA, > 128K, <= 256K FLASH, <= 64K RAM\n"
511 " avrxmega7 - XMEGA, > 128K, <= 256K FLASH, > 64K RAM\n"
512 " or immediate microcontroller name.\n"));
514 _(" -mall-opcodes accept all AVR opcodes, even if not supported by MCU\n"
515 " -mno-skip-bug disable warnings for skipping two-word instructions\n"
516 " (default for avr4, avr5)\n"
517 " -mno-wrap reject rjmp/rcall instructions with 8K wrap-around\n"
518 " (default for avr3, avr5)\n"
519 " -mrmw accept Read-Modify-Write instructions\n"
521 show_mcu_list (stream
);
525 avr_set_arch (int dummy ATTRIBUTE_UNUSED
)
529 input_line_pointer
= extract_word (input_line_pointer
, str
, 20);
530 md_parse_option (OPTION_MMCU
, str
);
531 bfd_set_arch_mach (stdoutput
, TARGET_ARCH
, avr_mcu
->mach
);
535 md_parse_option (int c
, char *arg
)
542 char *s
= alloca (strlen (arg
) + 1);
549 *t
= TOLOWER (*arg1
++);
553 for (i
= 0; mcu_types
[i
].name
; ++i
)
554 if (strcmp (mcu_types
[i
].name
, s
) == 0)
557 if (!mcu_types
[i
].name
)
559 show_mcu_list (stderr
);
560 as_fatal (_("unknown MCU: %s\n"), arg
);
563 /* It is OK to redefine mcu type within the same avr[1-5] bfd machine
564 type - this for allows passing -mmcu=... via gcc ASM_SPEC as well
565 as .arch ... in the asm output at the same time. */
566 if (avr_mcu
== &default_mcu
|| avr_mcu
->mach
== mcu_types
[i
].mach
)
568 specified_mcu
.name
= mcu_types
[i
].name
;
569 specified_mcu
.isa
|= mcu_types
[i
].isa
;
570 specified_mcu
.mach
= mcu_types
[i
].mach
;
571 avr_mcu
= &specified_mcu
;
574 as_fatal (_("redefinition of mcu type `%s' to `%s'"),
575 avr_mcu
->name
, mcu_types
[i
].name
);
578 case OPTION_ALL_OPCODES
:
579 avr_opt
.all_opcodes
= 1;
581 case OPTION_NO_SKIP_BUG
:
582 avr_opt
.no_skip_bug
= 1;
588 specified_mcu
.isa
|= AVR_ISA_RMW
;
596 md_undefined_symbol (char *name ATTRIBUTE_UNUSED
)
602 md_atof (int type
, char *litP
, int *sizeP
)
604 return ieee_md_atof (type
, litP
, sizeP
, FALSE
);
608 md_convert_frag (bfd
*abfd ATTRIBUTE_UNUSED
,
609 asection
*sec ATTRIBUTE_UNUSED
,
610 fragS
*fragP ATTRIBUTE_UNUSED
)
619 struct avr_opcodes_s
*opcode
;
621 avr_hash
= hash_new ();
623 /* Insert unique names into hash table. This hash table then provides a
624 quick index to the first opcode with a particular name in the opcode
626 for (opcode
= avr_opcodes
; opcode
->name
; opcode
++)
627 hash_insert (avr_hash
, opcode
->name
, (char *) opcode
);
629 avr_mod_hash
= hash_new ();
631 for (i
= 0; i
< ARRAY_SIZE (exp_mod
); ++i
)
636 hash_insert (avr_mod_hash
, EXP_MOD_NAME (i
), m
.ptr
);
639 bfd_set_arch_mach (stdoutput
, TARGET_ARCH
, avr_mcu
->mach
);
642 /* Resolve STR as a constant expression and return the result.
643 If result greater than MAX then error. */
646 avr_get_constant (char *str
, int max
)
650 str
= skip_space (str
);
651 input_line_pointer
= str
;
654 if (ex
.X_op
!= O_constant
)
655 as_bad (_("constant value required"));
657 if (ex
.X_add_number
> max
|| ex
.X_add_number
< 0)
658 as_bad (_("number must be positive and less than %d"), max
+ 1);
660 return ex
.X_add_number
;
663 /* Parse for ldd/std offset. */
666 avr_offset_expression (expressionS
*exp
)
668 char *str
= input_line_pointer
;
673 str
= extract_word (str
, op
, sizeof (op
));
675 input_line_pointer
= tmp
;
678 /* Warn about expressions that fail to use lo8 (). */
679 if (exp
->X_op
== O_constant
)
681 int x
= exp
->X_add_number
;
683 if (x
< -255 || x
> 255)
684 as_warn (_("constant out of 8-bit range: %d"), x
);
688 /* Parse ordinary expression. */
691 parse_exp (char *s
, expressionS
*op
)
693 input_line_pointer
= s
;
695 if (op
->X_op
== O_absent
)
696 as_bad (_("missing operand"));
697 return input_line_pointer
;
700 /* Parse special expressions (needed for LDI command):
705 where xx is: hh, hi, lo. */
707 static bfd_reloc_code_real_type
708 avr_ldi_expression (expressionS
*exp
)
710 char *str
= input_line_pointer
;
714 int linker_stubs_should_be_generated
= 0;
718 str
= extract_word (str
, op
, sizeof (op
));
724 m
.ptr
= hash_find (avr_mod_hash
, op
);
732 str
= skip_space (str
);
736 bfd_reloc_code_real_type reloc_to_return
;
741 if (strncmp ("pm(", str
, 3) == 0
742 || strncmp ("gs(",str
,3) == 0
743 || strncmp ("-(gs(",str
,5) == 0
744 || strncmp ("-(pm(", str
, 5) == 0)
752 as_bad (_("illegal expression"));
754 if (str
[0] == 'g' || str
[2] == 'g')
755 linker_stubs_should_be_generated
= 1;
767 if (*str
== '-' && *(str
+ 1) == '(')
774 input_line_pointer
= str
;
779 if (*input_line_pointer
!= ')')
781 as_bad (_("`)' required"));
784 input_line_pointer
++;
789 neg_p
? EXP_MOD_NEG_RELOC (mod
) : EXP_MOD_RELOC (mod
);
790 if (linker_stubs_should_be_generated
)
792 switch (reloc_to_return
)
794 case BFD_RELOC_AVR_LO8_LDI_PM
:
795 reloc_to_return
= BFD_RELOC_AVR_LO8_LDI_GS
;
797 case BFD_RELOC_AVR_HI8_LDI_PM
:
798 reloc_to_return
= BFD_RELOC_AVR_HI8_LDI_GS
;
802 /* PR 5523: Do not generate a warning here,
803 legitimate code can trigger this case. */
807 return reloc_to_return
;
812 input_line_pointer
= tmp
;
815 /* Warn about expressions that fail to use lo8 (). */
816 if (exp
->X_op
== O_constant
)
818 int x
= exp
->X_add_number
;
820 if (x
< -255 || x
> 255)
821 as_warn (_("constant out of 8-bit range: %d"), x
);
824 return BFD_RELOC_AVR_LDI
;
827 /* Parse one instruction operand.
828 Return operand bitmask. Also fixups can be generated. */
831 avr_operand (struct avr_opcodes_s
*opcode
,
837 unsigned int op_mask
= 0;
838 char *str
= skip_space (*line
);
842 /* Any register operand. */
848 if (*str
== 'r' || *str
== 'R')
852 str
= extract_word (str
, r_name
, sizeof (r_name
));
854 if (ISDIGIT (r_name
[1]))
856 if (r_name
[2] == '\0')
857 op_mask
= r_name
[1] - '0';
858 else if (r_name
[1] != '0'
859 && ISDIGIT (r_name
[2])
860 && r_name
[3] == '\0')
861 op_mask
= (r_name
[1] - '0') * 10 + r_name
[2] - '0';
866 op_mask
= avr_get_constant (str
, 31);
867 str
= input_line_pointer
;
875 if (op_mask
< 16 || op_mask
> 23)
876 as_bad (_("register r16-r23 required"));
882 as_bad (_("register number above 15 required"));
888 as_bad (_("even register number required"));
893 if ((op_mask
& 1) || op_mask
< 24)
894 as_bad (_("register r24, r26, r28 or r30 required"));
895 op_mask
= (op_mask
- 24) >> 1;
900 as_bad (_("register name or number from 0 to 31 required"));
909 str
= skip_space (str
+ 1);
918 as_bad (_("pointer register (X, Y or Z) required"));
920 str
= skip_space (str
+ 1);
925 as_bad (_("cannot both predecrement and postincrement"));
929 /* avr1 can do "ld r,Z" and "st Z,r" but no other pointer
930 registers, no predecrement, no postincrement. */
931 if (!avr_opt
.all_opcodes
&& (op_mask
& 0x100F)
932 && !(avr_mcu
->isa
& AVR_ISA_SRAM
))
933 as_bad (_("addressing mode not supported"));
939 as_bad (_("can't predecrement"));
941 if (! (*str
== 'z' || *str
== 'Z'))
942 as_bad (_("pointer register Z required"));
944 str
= skip_space (str
+ 1);
950 for (s
= opcode
->opcode
; *s
; ++s
)
953 op_mask
|= (1 << (15 - (s
- opcode
->opcode
)));
957 /* attiny26 can do "lpm" and "lpm r,Z" but not "lpm r,Z+". */
958 if (!avr_opt
.all_opcodes
959 && (op_mask
& 0x0001)
960 && !(avr_mcu
->isa
& AVR_ISA_MOVW
))
961 as_bad (_("postincrement not supported"));
966 char c
= TOLOWER (*str
++);
971 as_bad (_("pointer register (Y or Z) required"));
972 str
= skip_space (str
);
975 input_line_pointer
= str
;
976 avr_offset_expression (& op_expr
);
977 str
= input_line_pointer
;
978 fix_new_exp (frag_now
, where
, 3,
979 &op_expr
, FALSE
, BFD_RELOC_AVR_6
);
985 str
= parse_exp (str
, &op_expr
);
986 fix_new_exp (frag_now
, where
, opcode
->insn_size
* 2,
987 &op_expr
, FALSE
, BFD_RELOC_AVR_CALL
);
991 str
= parse_exp (str
, &op_expr
);
992 fix_new_exp (frag_now
, where
, opcode
->insn_size
* 2,
993 &op_expr
, TRUE
, BFD_RELOC_AVR_13_PCREL
);
997 str
= parse_exp (str
, &op_expr
);
998 fix_new_exp (frag_now
, where
, opcode
->insn_size
* 2,
999 &op_expr
, TRUE
, BFD_RELOC_AVR_7_PCREL
);
1003 str
= parse_exp (str
, &op_expr
);
1004 fix_new_exp (frag_now
, where
+ 2, opcode
->insn_size
* 2,
1005 &op_expr
, FALSE
, BFD_RELOC_16
);
1010 bfd_reloc_code_real_type r_type
;
1012 input_line_pointer
= str
;
1013 r_type
= avr_ldi_expression (&op_expr
);
1014 str
= input_line_pointer
;
1015 fix_new_exp (frag_now
, where
, 3,
1016 &op_expr
, FALSE
, r_type
);
1024 x
= ~avr_get_constant (str
, 255);
1025 str
= input_line_pointer
;
1026 op_mask
|= (x
& 0xf) | ((x
<< 4) & 0xf00);
1031 input_line_pointer
= str
;
1032 avr_offset_expression (& op_expr
);
1033 str
= input_line_pointer
;
1034 fix_new_exp (frag_now
, where
, 3,
1035 & op_expr
, FALSE
, BFD_RELOC_AVR_6_ADIW
);
1043 x
= avr_get_constant (str
, 7);
1044 str
= input_line_pointer
;
1055 x
= avr_get_constant (str
, 63);
1056 str
= input_line_pointer
;
1057 op_mask
|= (x
& 0xf) | ((x
& 0x30) << 5);
1065 x
= avr_get_constant (str
, 31);
1066 str
= input_line_pointer
;
1075 x
= avr_get_constant (str
, 15);
1076 str
= input_line_pointer
;
1077 op_mask
|= (x
<< 4);
1085 as_bad (_("unknown constraint `%c'"), *op
);
1092 /* Parse instruction operands.
1093 Return binary opcode. */
1096 avr_operands (struct avr_opcodes_s
*opcode
, char **line
)
1098 char *op
= opcode
->constraints
;
1099 unsigned int bin
= opcode
->bin_opcode
;
1100 char *frag
= frag_more (opcode
->insn_size
* 2);
1102 int where
= frag
- frag_now
->fr_literal
;
1103 static unsigned int prev
= 0; /* Previous opcode. */
1105 /* Opcode have operands. */
1108 unsigned int reg1
= 0;
1109 unsigned int reg2
= 0;
1110 int reg1_present
= 0;
1111 int reg2_present
= 0;
1113 /* Parse first operand. */
1114 if (REGISTER_P (*op
))
1116 reg1
= avr_operand (opcode
, where
, op
, &str
);
1119 /* Parse second operand. */
1132 if (REGISTER_P (*op
))
1135 str
= skip_space (str
);
1137 as_bad (_("`,' required"));
1138 str
= skip_space (str
);
1140 reg2
= avr_operand (opcode
, where
, op
, &str
);
1143 if (reg1_present
&& reg2_present
)
1144 reg2
= (reg2
& 0xf) | ((reg2
<< 5) & 0x200);
1145 else if (reg2_present
)
1153 /* Detect undefined combinations (like ld r31,Z+). */
1154 if (!avr_opt
.all_opcodes
&& AVR_UNDEF_P (bin
))
1155 as_warn (_("undefined combination of operands"));
1157 if (opcode
->insn_size
== 2)
1159 /* Warn if the previous opcode was cpse/sbic/sbis/sbrc/sbrs
1160 (AVR core bug, fixed in the newer devices). */
1161 if (!(avr_opt
.no_skip_bug
||
1162 (avr_mcu
->isa
& (AVR_ISA_MUL
| AVR_ISA_MOVW
)))
1163 && AVR_SKIP_P (prev
))
1164 as_warn (_("skipping two-word instruction"));
1166 bfd_putl32 ((bfd_vma
) bin
, frag
);
1169 bfd_putl16 ((bfd_vma
) bin
, frag
);
1176 /* GAS will call this function for each section at the end of the assembly,
1177 to permit the CPU backend to adjust the alignment of a section. */
1180 md_section_align (asection
*seg
, valueT addr
)
1182 int align
= bfd_get_section_alignment (stdoutput
, seg
);
1183 return ((addr
+ (1 << align
) - 1) & (-1 << align
));
1186 /* If you define this macro, it should return the offset between the
1187 address of a PC relative fixup and the position from which the PC
1188 relative adjustment should be made. On many processors, the base
1189 of a PC relative instruction is the next instruction, so this
1190 macro would return the length of an instruction. */
1193 md_pcrel_from_section (fixS
*fixp
, segT sec
)
1195 if (fixp
->fx_addsy
!= (symbolS
*) NULL
1196 && (!S_IS_DEFINED (fixp
->fx_addsy
)
1197 || (S_GET_SEGMENT (fixp
->fx_addsy
) != sec
)))
1200 return fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
1203 /* GAS will call this for each fixup. It should store the correct
1204 value in the object file. */
1207 md_apply_fix (fixS
*fixP
, valueT
* valP
, segT seg
)
1209 unsigned char *where
;
1213 if (fixP
->fx_addsy
== (symbolS
*) NULL
)
1216 else if (fixP
->fx_pcrel
)
1218 segT s
= S_GET_SEGMENT (fixP
->fx_addsy
);
1220 if (s
== seg
|| s
== absolute_section
)
1222 value
+= S_GET_VALUE (fixP
->fx_addsy
);
1227 /* We don't actually support subtracting a symbol. */
1228 if (fixP
->fx_subsy
!= (symbolS
*) NULL
)
1229 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("expression too complex"));
1231 switch (fixP
->fx_r_type
)
1234 fixP
->fx_no_overflow
= 1;
1236 case BFD_RELOC_AVR_7_PCREL
:
1237 case BFD_RELOC_AVR_13_PCREL
:
1240 case BFD_RELOC_AVR_CALL
:
1246 /* Fetch the instruction, insert the fully resolved operand
1247 value, and stuff the instruction back again. */
1248 where
= (unsigned char *) fixP
->fx_frag
->fr_literal
+ fixP
->fx_where
;
1249 insn
= bfd_getl16 (where
);
1251 switch (fixP
->fx_r_type
)
1253 case BFD_RELOC_AVR_7_PCREL
:
1255 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
1256 _("odd address operand: %ld"), value
);
1258 /* Instruction addresses are always right-shifted by 1. */
1260 --value
; /* Correct PC. */
1262 if (value
< -64 || value
> 63)
1263 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
1264 _("operand out of range: %ld"), value
);
1265 value
= (value
<< 3) & 0x3f8;
1266 bfd_putl16 ((bfd_vma
) (value
| insn
), where
);
1269 case BFD_RELOC_AVR_13_PCREL
:
1271 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
1272 _("odd address operand: %ld"), value
);
1274 /* Instruction addresses are always right-shifted by 1. */
1276 --value
; /* Correct PC. */
1278 if (value
< -2048 || value
> 2047)
1280 /* No wrap for devices with >8K of program memory. */
1281 if ((avr_mcu
->isa
& AVR_ISA_MEGA
) || avr_opt
.no_wrap
)
1282 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
1283 _("operand out of range: %ld"), value
);
1287 bfd_putl16 ((bfd_vma
) (value
| insn
), where
);
1291 bfd_putl32 ((bfd_vma
) value
, where
);
1295 bfd_putl16 ((bfd_vma
) value
, where
);
1299 if (value
> 255 || value
< -128)
1300 as_warn_where (fixP
->fx_file
, fixP
->fx_line
,
1301 _("operand out of range: %ld"), value
);
1305 case BFD_RELOC_AVR_16_PM
:
1306 bfd_putl16 ((bfd_vma
) (value
>> 1), where
);
1309 case BFD_RELOC_AVR_LDI
:
1311 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
1312 _("operand out of range: %ld"), value
);
1313 bfd_putl16 ((bfd_vma
) insn
| LDI_IMMEDIATE (value
), where
);
1316 case BFD_RELOC_AVR_6
:
1317 if ((value
> 63) || (value
< 0))
1318 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
1319 _("operand out of range: %ld"), value
);
1320 bfd_putl16 ((bfd_vma
) insn
| ((value
& 7) | ((value
& (3 << 3)) << 7) | ((value
& (1 << 5)) << 8)), where
);
1323 case BFD_RELOC_AVR_6_ADIW
:
1324 if ((value
> 63) || (value
< 0))
1325 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
1326 _("operand out of range: %ld"), value
);
1327 bfd_putl16 ((bfd_vma
) insn
| (value
& 0xf) | ((value
& 0x30) << 2), where
);
1330 case BFD_RELOC_AVR_LO8_LDI
:
1331 bfd_putl16 ((bfd_vma
) insn
| LDI_IMMEDIATE (value
), where
);
1334 case BFD_RELOC_AVR_HI8_LDI
:
1335 bfd_putl16 ((bfd_vma
) insn
| LDI_IMMEDIATE (value
>> 8), where
);
1338 case BFD_RELOC_AVR_MS8_LDI
:
1339 bfd_putl16 ((bfd_vma
) insn
| LDI_IMMEDIATE (value
>> 24), where
);
1342 case BFD_RELOC_AVR_HH8_LDI
:
1343 bfd_putl16 ((bfd_vma
) insn
| LDI_IMMEDIATE (value
>> 16), where
);
1346 case BFD_RELOC_AVR_LO8_LDI_NEG
:
1347 bfd_putl16 ((bfd_vma
) insn
| LDI_IMMEDIATE (-value
), where
);
1350 case BFD_RELOC_AVR_HI8_LDI_NEG
:
1351 bfd_putl16 ((bfd_vma
) insn
| LDI_IMMEDIATE (-value
>> 8), where
);
1354 case BFD_RELOC_AVR_MS8_LDI_NEG
:
1355 bfd_putl16 ((bfd_vma
) insn
| LDI_IMMEDIATE (-value
>> 24), where
);
1358 case BFD_RELOC_AVR_HH8_LDI_NEG
:
1359 bfd_putl16 ((bfd_vma
) insn
| LDI_IMMEDIATE (-value
>> 16), where
);
1362 case BFD_RELOC_AVR_LO8_LDI_PM
:
1363 bfd_putl16 ((bfd_vma
) insn
| LDI_IMMEDIATE (value
>> 1), where
);
1366 case BFD_RELOC_AVR_HI8_LDI_PM
:
1367 bfd_putl16 ((bfd_vma
) insn
| LDI_IMMEDIATE (value
>> 9), where
);
1370 case BFD_RELOC_AVR_HH8_LDI_PM
:
1371 bfd_putl16 ((bfd_vma
) insn
| LDI_IMMEDIATE (value
>> 17), where
);
1374 case BFD_RELOC_AVR_LO8_LDI_PM_NEG
:
1375 bfd_putl16 ((bfd_vma
) insn
| LDI_IMMEDIATE (-value
>> 1), where
);
1378 case BFD_RELOC_AVR_HI8_LDI_PM_NEG
:
1379 bfd_putl16 ((bfd_vma
) insn
| LDI_IMMEDIATE (-value
>> 9), where
);
1382 case BFD_RELOC_AVR_HH8_LDI_PM_NEG
:
1383 bfd_putl16 ((bfd_vma
) insn
| LDI_IMMEDIATE (-value
>> 17), where
);
1386 case BFD_RELOC_AVR_CALL
:
1390 x
= bfd_getl16 (where
);
1392 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
1393 _("odd address operand: %ld"), value
);
1395 x
|= ((value
& 0x10000) | ((value
<< 3) & 0x1f00000)) >> 16;
1396 bfd_putl16 ((bfd_vma
) x
, where
);
1397 bfd_putl16 ((bfd_vma
) (value
& 0xffff), where
+ 2);
1401 case BFD_RELOC_AVR_8_LO
:
1402 *where
= 0xff & value
;
1405 case BFD_RELOC_AVR_8_HI
:
1406 *where
= 0xff & (value
>> 8);
1409 case BFD_RELOC_AVR_8_HLO
:
1410 *where
= 0xff & (value
>> 16);
1414 as_fatal (_("line %d: unknown relocation type: 0x%x"),
1415 fixP
->fx_line
, fixP
->fx_r_type
);
1421 switch ((int) fixP
->fx_r_type
)
1423 case -BFD_RELOC_AVR_HI8_LDI_NEG
:
1424 case -BFD_RELOC_AVR_HI8_LDI
:
1425 case -BFD_RELOC_AVR_LO8_LDI_NEG
:
1426 case -BFD_RELOC_AVR_LO8_LDI
:
1427 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
1428 _("only constant expression allowed"));
1437 /* GAS will call this to generate a reloc, passing the resulting reloc
1438 to `bfd_install_relocation'. This currently works poorly, as
1439 `bfd_install_relocation' often does the wrong thing, and instances of
1440 `tc_gen_reloc' have been written to work around the problems, which
1441 in turns makes it difficult to fix `bfd_install_relocation'. */
1443 /* If while processing a fixup, a reloc really needs to be created
1444 then it is done here. */
1447 tc_gen_reloc (asection
*seg ATTRIBUTE_UNUSED
,
1452 if (fixp
->fx_subsy
!= NULL
)
1454 as_bad_where (fixp
->fx_file
, fixp
->fx_line
, _("expression too complex"));
1458 reloc
= xmalloc (sizeof (arelent
));
1460 reloc
->sym_ptr_ptr
= xmalloc (sizeof (asymbol
*));
1461 *reloc
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
1463 reloc
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
1464 reloc
->howto
= bfd_reloc_type_lookup (stdoutput
, fixp
->fx_r_type
);
1465 if (reloc
->howto
== (reloc_howto_type
*) NULL
)
1467 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
1468 _("reloc %d not supported by object file format"),
1469 (int) fixp
->fx_r_type
);
1473 if (fixp
->fx_r_type
== BFD_RELOC_VTABLE_INHERIT
1474 || fixp
->fx_r_type
== BFD_RELOC_VTABLE_ENTRY
)
1475 reloc
->address
= fixp
->fx_offset
;
1477 reloc
->addend
= fixp
->fx_offset
;
1483 md_assemble (char *str
)
1485 struct avr_opcodes_s
*opcode
;
1488 str
= skip_space (extract_word (str
, op
, sizeof (op
)));
1491 as_bad (_("can't find opcode "));
1493 opcode
= (struct avr_opcodes_s
*) hash_find (avr_hash
, op
);
1497 as_bad (_("unknown opcode `%s'"), op
);
1501 /* Special case for opcodes with optional operands (lpm, elpm) -
1502 version with operands exists in avr_opcodes[] in the next entry. */
1504 if (*str
&& *opcode
->constraints
== '?')
1507 if (!avr_opt
.all_opcodes
&& (opcode
->isa
& avr_mcu
->isa
) != opcode
->isa
)
1508 as_bad (_("illegal opcode %s for mcu %s"), opcode
->name
, avr_mcu
->name
);
1510 dwarf2_emit_insn (0);
1512 /* We used to set input_line_pointer to the result of get_operands,
1513 but that is wrong. Our caller assumes we don't change it. */
1515 char *t
= input_line_pointer
;
1517 avr_operands (opcode
, &str
);
1518 if (*skip_space (str
))
1519 as_bad (_("garbage at end of line"));
1520 input_line_pointer
= t
;
1524 const exp_mod_data_t exp_mod_data
[] =
1526 /* Default, must be first. */
1527 { "", 0, BFD_RELOC_16
, "" },
1528 /* Divides by 2 to get word address. Generate Stub. */
1529 { "gs", 2, BFD_RELOC_AVR_16_PM
, "`gs' " },
1530 { "pm", 2, BFD_RELOC_AVR_16_PM
, "`pm' " },
1531 /* The following are used together with avr-gcc's __memx address space
1532 in order to initialize a 24-bit pointer variable with a 24-bit address.
1533 For address in flash, hlo8 will contain the flash segment if the
1534 symbol is located in flash. If the symbol is located in RAM; hlo8
1535 will contain 0x80 which matches avr-gcc's notion of how 24-bit RAM/flash
1536 addresses linearize address space. */
1537 { "lo8", 1, BFD_RELOC_AVR_8_LO
, "`lo8' " },
1538 { "hi8", 1, BFD_RELOC_AVR_8_HI
, "`hi8' " },
1539 { "hlo8", 1, BFD_RELOC_AVR_8_HLO
, "`hlo8' " },
1540 { "hh8", 1, BFD_RELOC_AVR_8_HLO
, "`hh8' " },
1542 { NULL
, 0, 0, NULL
}
1545 /* Parse special CONS expression: pm (expression) or alternatively
1546 gs (expression). These are used for addressing program memory. Moreover,
1547 define lo8 (expression), hi8 (expression) and hlo8 (expression). */
1549 const exp_mod_data_t
*
1550 avr_parse_cons_expression (expressionS
*exp
, int nbytes
)
1552 const exp_mod_data_t
*pexp
= &exp_mod_data
[0];
1555 tmp
= input_line_pointer
= skip_space (input_line_pointer
);
1557 /* The first entry of exp_mod_data[] contains an entry if no
1558 expression modifier is present. Skip it. */
1560 for (pexp
++; pexp
->name
; pexp
++)
1562 int len
= strlen (pexp
->name
);
1564 if (nbytes
== pexp
->nbytes
1565 && strncasecmp (input_line_pointer
, pexp
->name
, len
) == 0)
1567 input_line_pointer
= skip_space (input_line_pointer
+ len
);
1569 if (*input_line_pointer
== '(')
1571 input_line_pointer
= skip_space (input_line_pointer
+ 1);
1574 if (*input_line_pointer
== ')')
1576 ++input_line_pointer
;
1581 as_bad (_("`)' required"));
1582 return &exp_mod_data
[0];
1586 input_line_pointer
= tmp
;
1593 return &exp_mod_data
[0];
1597 avr_cons_fix_new (fragS
*frag
,
1601 const exp_mod_data_t
*pexp_mod_data
)
1605 switch (pexp_mod_data
->reloc
)
1609 fix_new_exp (frag
, where
, nbytes
, exp
, FALSE
, BFD_RELOC_8
);
1610 else if (nbytes
== 2)
1611 fix_new_exp (frag
, where
, nbytes
, exp
, FALSE
, BFD_RELOC_16
);
1612 else if (nbytes
== 4)
1613 fix_new_exp (frag
, where
, nbytes
, exp
, FALSE
, BFD_RELOC_32
);
1618 case BFD_RELOC_AVR_16_PM
:
1619 case BFD_RELOC_AVR_8_LO
:
1620 case BFD_RELOC_AVR_8_HI
:
1621 case BFD_RELOC_AVR_8_HLO
:
1622 if (nbytes
== pexp_mod_data
->nbytes
)
1623 fix_new_exp (frag
, where
, nbytes
, exp
, FALSE
, pexp_mod_data
->reloc
);
1630 as_bad (_("illegal %srelocation size: %d"), pexp_mod_data
->error
, nbytes
);
1634 mcu_has_3_byte_pc (void)
1636 int mach
= avr_mcu
->mach
;
1638 return mach
== bfd_mach_avr6
1639 || mach
== bfd_mach_avrxmega6
1640 || mach
== bfd_mach_avrxmega7
;
1644 tc_cfi_frame_initial_instructions (void)
1646 /* AVR6 pushes 3 bytes for calls. */
1647 int return_size
= (mcu_has_3_byte_pc () ? 3 : 2);
1649 /* The CFA is the caller's stack location before the call insn. */
1650 /* Note that the stack pointer is dwarf register number 32. */
1651 cfi_add_CFA_def_cfa (32, return_size
);
1653 /* Note that AVR consistently uses post-decrement, which means that things
1654 do not line up the same way as for targers that use pre-decrement. */
1655 cfi_add_CFA_offset (DWARF2_DEFAULT_RETURN_COLUMN
, 1-return_size
);