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Enable verbose error messages by default for AArch64 gas.
[deliverable/binutils-gdb.git] / gas / config / tc-avr.c
1 /* tc-avr.c -- Assembler code for the ATMEL AVR
2
3 Copyright (C) 1999-2014 Free Software Foundation, Inc.
4 Contributed by Denis Chertykov <denisc@overta.ru>
5
6 This file is part of GAS, the GNU Assembler.
7
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3, or (at your option)
11 any later version.
12
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to
20 the Free Software Foundation, 51 Franklin Street - Fifth Floor,
21 Boston, MA 02110-1301, USA. */
22
23 #include "as.h"
24 #include "safe-ctype.h"
25 #include "subsegs.h"
26 #include "dwarf2dbg.h"
27 #include "dw2gencfi.h"
28
29
30 struct avr_opcodes_s
31 {
32 char * name;
33 char * constraints;
34 char * opcode;
35 int insn_size; /* In words. */
36 int isa;
37 unsigned int bin_opcode;
38 };
39
40 #define AVR_INSN(NAME, CONSTR, OPCODE, SIZE, ISA, BIN) \
41 {#NAME, CONSTR, OPCODE, SIZE, ISA, BIN},
42
43 struct avr_opcodes_s avr_opcodes[] =
44 {
45 #include "opcode/avr.h"
46 {NULL, NULL, NULL, 0, 0, 0}
47 };
48
49 const char comment_chars[] = ";";
50 const char line_comment_chars[] = "#";
51 const char line_separator_chars[] = "$";
52
53 const char *md_shortopts = "m:";
54 struct mcu_type_s
55 {
56 char *name;
57 int isa;
58 int mach;
59 };
60
61 /* XXX - devices that don't seem to exist (renamed, replaced with larger
62 ones, or planned but never produced), left here for compatibility. */
63
64 static struct mcu_type_s mcu_types[] =
65 {
66 {"avr1", AVR_ISA_AVR1, bfd_mach_avr1},
67 /* TODO: insruction set for avr2 architecture should be AVR_ISA_AVR2,
68 but set to AVR_ISA_AVR25 for some following version
69 of GCC (from 4.3) for backward compatibility. */
70 {"avr2", AVR_ISA_AVR25, bfd_mach_avr2},
71 {"avr25", AVR_ISA_AVR25, bfd_mach_avr25},
72 /* TODO: insruction set for avr3 architecture should be AVR_ISA_AVR3,
73 but set to AVR_ISA_AVR3_ALL for some following version
74 of GCC (from 4.3) for backward compatibility. */
75 {"avr3", AVR_ISA_AVR3_ALL, bfd_mach_avr3},
76 {"avr31", AVR_ISA_AVR31, bfd_mach_avr31},
77 {"avr35", AVR_ISA_AVR35, bfd_mach_avr35},
78 {"avr4", AVR_ISA_AVR4, bfd_mach_avr4},
79 /* TODO: insruction set for avr5 architecture should be AVR_ISA_AVR5,
80 but set to AVR_ISA_AVR51 for some following version
81 of GCC (from 4.3) for backward compatibility. */
82 {"avr5", AVR_ISA_AVR51, bfd_mach_avr5},
83 {"avr51", AVR_ISA_AVR51, bfd_mach_avr51},
84 {"avr6", AVR_ISA_AVR6, bfd_mach_avr6},
85 {"avrxmega1", AVR_ISA_XMEGA, bfd_mach_avrxmega1},
86 {"avrxmega2", AVR_ISA_XMEGA, bfd_mach_avrxmega2},
87 {"avrxmega3", AVR_ISA_XMEGA, bfd_mach_avrxmega3},
88 {"avrxmega4", AVR_ISA_XMEGA, bfd_mach_avrxmega4},
89 {"avrxmega5", AVR_ISA_XMEGA, bfd_mach_avrxmega5},
90 {"avrxmega6", AVR_ISA_XMEGA, bfd_mach_avrxmega6},
91 {"avrxmega7", AVR_ISA_XMEGA, bfd_mach_avrxmega7},
92 {"at90s1200", AVR_ISA_1200, bfd_mach_avr1},
93 {"attiny11", AVR_ISA_AVR1, bfd_mach_avr1},
94 {"attiny12", AVR_ISA_AVR1, bfd_mach_avr1},
95 {"attiny15", AVR_ISA_AVR1, bfd_mach_avr1},
96 {"attiny28", AVR_ISA_AVR1, bfd_mach_avr1},
97 {"at90s2313", AVR_ISA_AVR2, bfd_mach_avr2},
98 {"at90s2323", AVR_ISA_AVR2, bfd_mach_avr2},
99 {"at90s2333", AVR_ISA_AVR2, bfd_mach_avr2}, /* XXX -> 4433 */
100 {"at90s2343", AVR_ISA_AVR2, bfd_mach_avr2},
101 {"attiny22", AVR_ISA_AVR2, bfd_mach_avr2}, /* XXX -> 2343 */
102 {"attiny26", AVR_ISA_2xxe, bfd_mach_avr2},
103 {"at90s4414", AVR_ISA_AVR2, bfd_mach_avr2}, /* XXX -> 8515 */
104 {"at90s4433", AVR_ISA_AVR2, bfd_mach_avr2},
105 {"at90s4434", AVR_ISA_AVR2, bfd_mach_avr2}, /* XXX -> 8535 */
106 {"at90s8515", AVR_ISA_AVR2, bfd_mach_avr2},
107 {"at90c8534", AVR_ISA_AVR2, bfd_mach_avr2},
108 {"at90s8535", AVR_ISA_AVR2, bfd_mach_avr2},
109 {"ata5272", AVR_ISA_AVR25, bfd_mach_avr25},
110 {"attiny13", AVR_ISA_AVR25, bfd_mach_avr25},
111 {"attiny13a", AVR_ISA_AVR25, bfd_mach_avr25},
112 {"attiny2313", AVR_ISA_AVR25, bfd_mach_avr25},
113 {"attiny2313a",AVR_ISA_AVR25, bfd_mach_avr25},
114 {"attiny24", AVR_ISA_AVR25, bfd_mach_avr25},
115 {"attiny24a", AVR_ISA_AVR25, bfd_mach_avr25},
116 {"attiny4313", AVR_ISA_AVR25, bfd_mach_avr25},
117 {"attiny44", AVR_ISA_AVR25, bfd_mach_avr25},
118 {"attiny44a", AVR_ISA_AVR25, bfd_mach_avr25},
119 {"attiny84", AVR_ISA_AVR25, bfd_mach_avr25},
120 {"attiny84a", AVR_ISA_AVR25, bfd_mach_avr25},
121 {"attiny25", AVR_ISA_AVR25, bfd_mach_avr25},
122 {"attiny45", AVR_ISA_AVR25, bfd_mach_avr25},
123 {"attiny85", AVR_ISA_AVR25, bfd_mach_avr25},
124 {"attiny261", AVR_ISA_AVR25, bfd_mach_avr25},
125 {"attiny261a", AVR_ISA_AVR25, bfd_mach_avr25},
126 {"attiny461", AVR_ISA_AVR25, bfd_mach_avr25},
127 {"attiny461a", AVR_ISA_AVR25, bfd_mach_avr25},
128 {"attiny861", AVR_ISA_AVR25, bfd_mach_avr25},
129 {"attiny861a", AVR_ISA_AVR25, bfd_mach_avr25},
130 {"attiny87", AVR_ISA_AVR25, bfd_mach_avr25},
131 {"attiny43u", AVR_ISA_AVR25, bfd_mach_avr25},
132 {"attiny48", AVR_ISA_AVR25, bfd_mach_avr25},
133 {"attiny88", AVR_ISA_AVR25, bfd_mach_avr25},
134 {"attiny828", AVR_ISA_AVR25, bfd_mach_avr25},
135 {"at86rf401", AVR_ISA_RF401, bfd_mach_avr25},
136 {"at43usb355", AVR_ISA_AVR3, bfd_mach_avr3},
137 {"at76c711", AVR_ISA_AVR3, bfd_mach_avr3},
138 {"atmega103", AVR_ISA_AVR31, bfd_mach_avr31},
139 {"at43usb320", AVR_ISA_AVR31, bfd_mach_avr31},
140 {"attiny167", AVR_ISA_AVR35, bfd_mach_avr35},
141 {"at90usb82", AVR_ISA_AVR35, bfd_mach_avr35},
142 {"at90usb162", AVR_ISA_AVR35, bfd_mach_avr35},
143 {"ata5505", AVR_ISA_AVR35, bfd_mach_avr35},
144 {"atmega8u2", AVR_ISA_AVR35, bfd_mach_avr35},
145 {"atmega16u2", AVR_ISA_AVR35, bfd_mach_avr35},
146 {"atmega32u2", AVR_ISA_AVR35, bfd_mach_avr35},
147 {"attiny1634", AVR_ISA_AVR35, bfd_mach_avr35},
148 {"atmega8", AVR_ISA_M8, bfd_mach_avr4},
149 {"ata6289", AVR_ISA_AVR4, bfd_mach_avr4},
150 {"atmega8a", AVR_ISA_M8, bfd_mach_avr4},
151 {"ata6285", AVR_ISA_AVR4, bfd_mach_avr4},
152 {"ata6286", AVR_ISA_AVR4, bfd_mach_avr4},
153 {"atmega48", AVR_ISA_AVR4, bfd_mach_avr4},
154 {"atmega48a", AVR_ISA_AVR4, bfd_mach_avr4},
155 {"atmega48pa", AVR_ISA_AVR4, bfd_mach_avr4},
156 {"atmega48p", AVR_ISA_AVR4, bfd_mach_avr4},
157 {"atmega88", AVR_ISA_AVR4, bfd_mach_avr4},
158 {"atmega88a", AVR_ISA_AVR4, bfd_mach_avr4},
159 {"atmega88p", AVR_ISA_AVR4, bfd_mach_avr4},
160 {"atmega88pa", AVR_ISA_AVR4, bfd_mach_avr4},
161 {"atmega8515", AVR_ISA_M8, bfd_mach_avr4},
162 {"atmega8535", AVR_ISA_M8, bfd_mach_avr4},
163 {"atmega8hva", AVR_ISA_AVR4, bfd_mach_avr4},
164 {"at90pwm1", AVR_ISA_AVR4, bfd_mach_avr4},
165 {"at90pwm2", AVR_ISA_AVR4, bfd_mach_avr4},
166 {"at90pwm2b", AVR_ISA_AVR4, bfd_mach_avr4},
167 {"at90pwm3", AVR_ISA_AVR4, bfd_mach_avr4},
168 {"at90pwm3b", AVR_ISA_AVR4, bfd_mach_avr4},
169 {"at90pwm81", AVR_ISA_AVR4, bfd_mach_avr4},
170 {"at90pwm161", AVR_ISA_AVR5, bfd_mach_avr5},
171 {"ata5790", AVR_ISA_AVR5, bfd_mach_avr5},
172 {"ata5795", AVR_ISA_AVR5, bfd_mach_avr5},
173 {"atmega16", AVR_ISA_AVR5, bfd_mach_avr5},
174 {"atmega16a", AVR_ISA_AVR5, bfd_mach_avr5},
175 {"atmega161", AVR_ISA_M161, bfd_mach_avr5},
176 {"atmega162", AVR_ISA_AVR5, bfd_mach_avr5},
177 {"atmega163", AVR_ISA_M161, bfd_mach_avr5},
178 {"atmega164a", AVR_ISA_AVR5, bfd_mach_avr5},
179 {"atmega164p", AVR_ISA_AVR5, bfd_mach_avr5},
180 {"atmega164pa",AVR_ISA_AVR5, bfd_mach_avr5},
181 {"atmega165", AVR_ISA_AVR5, bfd_mach_avr5},
182 {"atmega165a", AVR_ISA_AVR5, bfd_mach_avr5},
183 {"atmega165p", AVR_ISA_AVR5, bfd_mach_avr5},
184 {"atmega165pa",AVR_ISA_AVR5, bfd_mach_avr5},
185 {"atmega168", AVR_ISA_AVR5, bfd_mach_avr5},
186 {"atmega168a", AVR_ISA_AVR5, bfd_mach_avr5},
187 {"atmega168p", AVR_ISA_AVR5, bfd_mach_avr5},
188 {"atmega168pa",AVR_ISA_AVR5, bfd_mach_avr5},
189 {"atmega169", AVR_ISA_AVR5, bfd_mach_avr5},
190 {"atmega169a", AVR_ISA_AVR5, bfd_mach_avr5},
191 {"atmega169p", AVR_ISA_AVR5, bfd_mach_avr5},
192 {"atmega169pa",AVR_ISA_AVR5, bfd_mach_avr5},
193 {"atmega32", AVR_ISA_AVR5, bfd_mach_avr5},
194 {"atmega32a", AVR_ISA_AVR5, bfd_mach_avr5},
195 {"atmega323", AVR_ISA_AVR5, bfd_mach_avr5},
196 {"atmega324a", AVR_ISA_AVR5, bfd_mach_avr5},
197 {"atmega324p", AVR_ISA_AVR5, bfd_mach_avr5},
198 {"atmega324pa",AVR_ISA_AVR5, bfd_mach_avr5},
199 {"atmega325", AVR_ISA_AVR5, bfd_mach_avr5},
200 {"atmega325a", AVR_ISA_AVR5, bfd_mach_avr5},
201 {"atmega325p", AVR_ISA_AVR5, bfd_mach_avr5},
202 {"atmega325pa",AVR_ISA_AVR5, bfd_mach_avr5},
203 {"atmega3250", AVR_ISA_AVR5, bfd_mach_avr5},
204 {"atmega3250a",AVR_ISA_AVR5, bfd_mach_avr5},
205 {"atmega3250p",AVR_ISA_AVR5, bfd_mach_avr5},
206 {"atmega3250pa",AVR_ISA_AVR5, bfd_mach_avr5},
207 {"atmega328", AVR_ISA_AVR5, bfd_mach_avr5},
208 {"atmega328p", AVR_ISA_AVR5, bfd_mach_avr5},
209 {"atmega329", AVR_ISA_AVR5, bfd_mach_avr5},
210 {"atmega329a", AVR_ISA_AVR5, bfd_mach_avr5},
211 {"atmega329p", AVR_ISA_AVR5, bfd_mach_avr5},
212 {"atmega329pa",AVR_ISA_AVR5, bfd_mach_avr5},
213 {"atmega3290", AVR_ISA_AVR5, bfd_mach_avr5},
214 {"atmega3290a",AVR_ISA_AVR5, bfd_mach_avr5},
215 {"atmega3290p",AVR_ISA_AVR5, bfd_mach_avr5},
216 {"atmega3290pa",AVR_ISA_AVR5, bfd_mach_avr5},
217 {"atmega406", AVR_ISA_AVR5, bfd_mach_avr5},
218 {"atmega64rfr2", AVR_ISA_AVR5, bfd_mach_avr5},
219 {"atmega644rfr2",AVR_ISA_AVR5, bfd_mach_avr5},
220 {"atmega64", AVR_ISA_AVR5, bfd_mach_avr5},
221 {"atmega64a", AVR_ISA_AVR5, bfd_mach_avr5},
222 {"atmega640", AVR_ISA_AVR5, bfd_mach_avr5},
223 {"atmega644", AVR_ISA_AVR5, bfd_mach_avr5},
224 {"atmega644a", AVR_ISA_AVR5, bfd_mach_avr5},
225 {"atmega644p", AVR_ISA_AVR5, bfd_mach_avr5},
226 {"atmega644pa",AVR_ISA_AVR5, bfd_mach_avr5},
227 {"atmega645", AVR_ISA_AVR5, bfd_mach_avr5},
228 {"atmega645a", AVR_ISA_AVR5, bfd_mach_avr5},
229 {"atmega645p", AVR_ISA_AVR5, bfd_mach_avr5},
230 {"atmega649", AVR_ISA_AVR5, bfd_mach_avr5},
231 {"atmega649a", AVR_ISA_AVR5, bfd_mach_avr5},
232 {"atmega649p", AVR_ISA_AVR5, bfd_mach_avr5},
233 {"atmega6450", AVR_ISA_AVR5, bfd_mach_avr5},
234 {"atmega6450a",AVR_ISA_AVR5, bfd_mach_avr5},
235 {"atmega6450p",AVR_ISA_AVR5, bfd_mach_avr5},
236 {"atmega6490", AVR_ISA_AVR5, bfd_mach_avr5},
237 {"atmega6490a",AVR_ISA_AVR5, bfd_mach_avr5},
238 {"atmega6490p",AVR_ISA_AVR5, bfd_mach_avr5},
239 {"atmega64rfr2",AVR_ISA_AVR5, bfd_mach_avr5},
240 {"atmega644rfr2",AVR_ISA_AVR5, bfd_mach_avr5},
241 {"atmega16hva",AVR_ISA_AVR5, bfd_mach_avr5},
242 {"atmega16hva2",AVR_ISA_AVR5, bfd_mach_avr5},
243 {"atmega16hvb",AVR_ISA_AVR5, bfd_mach_avr5},
244 {"atmega16hvbrevb",AVR_ISA_AVR5,bfd_mach_avr5},
245 {"atmega32hvb",AVR_ISA_AVR5, bfd_mach_avr5},
246 {"atmega32hvbrevb",AVR_ISA_AVR5,bfd_mach_avr5},
247 {"atmega64hve",AVR_ISA_AVR5, bfd_mach_avr5},
248 {"at90can32" , AVR_ISA_AVR5, bfd_mach_avr5},
249 {"at90can64" , AVR_ISA_AVR5, bfd_mach_avr5},
250 {"at90pwm161", AVR_ISA_AVR5, bfd_mach_avr5},
251 {"at90pwm216", AVR_ISA_AVR5, bfd_mach_avr5},
252 {"at90pwm316", AVR_ISA_AVR5, bfd_mach_avr5},
253 {"atmega32c1", AVR_ISA_AVR5, bfd_mach_avr5},
254 {"atmega64c1", AVR_ISA_AVR5, bfd_mach_avr5},
255 {"atmega16m1", AVR_ISA_AVR5, bfd_mach_avr5},
256 {"atmega32m1", AVR_ISA_AVR5, bfd_mach_avr5},
257 {"atmega64m1", AVR_ISA_AVR5, bfd_mach_avr5},
258 {"atmega16u4", AVR_ISA_AVR5, bfd_mach_avr5},
259 {"atmega32u4", AVR_ISA_AVR5, bfd_mach_avr5},
260 {"atmega32u6", AVR_ISA_AVR5, bfd_mach_avr5},
261 {"at90usb646", AVR_ISA_AVR5, bfd_mach_avr5},
262 {"at90usb647", AVR_ISA_AVR5, bfd_mach_avr5},
263 {"at90scr100", AVR_ISA_AVR5, bfd_mach_avr5},
264 {"at94k", AVR_ISA_94K, bfd_mach_avr5},
265 {"m3000", AVR_ISA_AVR5, bfd_mach_avr5},
266 {"atmega128", AVR_ISA_AVR51, bfd_mach_avr51},
267 {"atmega128a", AVR_ISA_AVR51, bfd_mach_avr51},
268 {"atmega1280", AVR_ISA_AVR51, bfd_mach_avr51},
269 {"atmega1281", AVR_ISA_AVR51, bfd_mach_avr51},
270 {"atmega1284", AVR_ISA_AVR51, bfd_mach_avr51},
271 {"atmega1284p",AVR_ISA_AVR51, bfd_mach_avr51},
272 {"atmega128rfa1",AVR_ISA_AVR51, bfd_mach_avr51},
273 {"atmega128rfr2",AVR_ISA_AVR51, bfd_mach_avr51},
274 {"atmega1284rfr2",AVR_ISA_AVR51, bfd_mach_avr51},
275 {"at90can128", AVR_ISA_AVR51, bfd_mach_avr51},
276 {"at90usb1286",AVR_ISA_AVR51, bfd_mach_avr51},
277 {"at90usb1287",AVR_ISA_AVR51, bfd_mach_avr51},
278 {"atmega2560", AVR_ISA_AVR6, bfd_mach_avr6},
279 {"atmega2561", AVR_ISA_AVR6, bfd_mach_avr6},
280 {"atmega256rfr2", AVR_ISA_AVR6, bfd_mach_avr6},
281 {"atmega2564rfr2", AVR_ISA_AVR6, bfd_mach_avr6},
282 {"atxmega16a4", AVR_ISA_XMEGA, bfd_mach_avrxmega2},
283 {"atxmega16a4u",AVR_ISA_XMEGAU, bfd_mach_avrxmega2},
284 {"atxmega16c4", AVR_ISA_XMEGAU, bfd_mach_avrxmega2},
285 {"atxmega16d4", AVR_ISA_XMEGA, bfd_mach_avrxmega2},
286 {"atxmega32a4", AVR_ISA_XMEGA, bfd_mach_avrxmega2},
287 {"atxmega32a4u",AVR_ISA_XMEGAU, bfd_mach_avrxmega2},
288 {"atxmega32c4", AVR_ISA_XMEGAU, bfd_mach_avrxmega2},
289 {"atxmega32d4", AVR_ISA_XMEGA, bfd_mach_avrxmega2},
290 {"atxmega32e5", AVR_ISA_XMEGA, bfd_mach_avrxmega2},
291 {"atxmega16e5", AVR_ISA_XMEGA, bfd_mach_avrxmega2},
292 {"atxmega8e5", AVR_ISA_XMEGA, bfd_mach_avrxmega2},
293 {"atxmega32x1", AVR_ISA_XMEGA, bfd_mach_avrxmega2},
294 {"atxmega64a3", AVR_ISA_XMEGA, bfd_mach_avrxmega4},
295 {"atxmega64a3u",AVR_ISA_XMEGAU, bfd_mach_avrxmega4},
296 {"atxmega64a4u",AVR_ISA_XMEGAU, bfd_mach_avrxmega4},
297 {"atxmega64b1", AVR_ISA_XMEGAU, bfd_mach_avrxmega4},
298 {"atxmega64b3", AVR_ISA_XMEGAU, bfd_mach_avrxmega4},
299 {"atxmega64c3", AVR_ISA_XMEGAU, bfd_mach_avrxmega4},
300 {"atxmega64d3", AVR_ISA_XMEGA, bfd_mach_avrxmega4},
301 {"atxmega64d4", AVR_ISA_XMEGA, bfd_mach_avrxmega4},
302 {"atxmega64a1", AVR_ISA_XMEGA, bfd_mach_avrxmega5},
303 {"atxmega64a1u",AVR_ISA_XMEGAU, bfd_mach_avrxmega5},
304 {"atxmega128a3", AVR_ISA_XMEGA, bfd_mach_avrxmega6},
305 {"atxmega128a3u",AVR_ISA_XMEGAU,bfd_mach_avrxmega6},
306 {"atxmega128b1", AVR_ISA_XMEGAU, bfd_mach_avrxmega6},
307 {"atxmega128b3", AVR_ISA_XMEGAU,bfd_mach_avrxmega6},
308 {"atxmega128c3", AVR_ISA_XMEGAU,bfd_mach_avrxmega6},
309 {"atxmega128d3", AVR_ISA_XMEGA, bfd_mach_avrxmega6},
310 {"atxmega128d4", AVR_ISA_XMEGA, bfd_mach_avrxmega6},
311 {"atxmega192a3", AVR_ISA_XMEGA, bfd_mach_avrxmega6},
312 {"atxmega192a3u",AVR_ISA_XMEGAU,bfd_mach_avrxmega6},
313 {"atxmega192c3", AVR_ISA_XMEGAU, bfd_mach_avrxmega6},
314 {"atxmega192d3", AVR_ISA_XMEGA, bfd_mach_avrxmega6},
315 {"atxmega256a3", AVR_ISA_XMEGA, bfd_mach_avrxmega6},
316 {"atxmega256a3u",AVR_ISA_XMEGAU,bfd_mach_avrxmega6},
317 {"atxmega256a3b",AVR_ISA_XMEGA, bfd_mach_avrxmega6},
318 {"atxmega256a3bu",AVR_ISA_XMEGAU, bfd_mach_avrxmega6},
319 {"atxmega256c3", AVR_ISA_XMEGAU,bfd_mach_avrxmega6},
320 {"atxmega256d3", AVR_ISA_XMEGA, bfd_mach_avrxmega6},
321 {"atxmega384c3", AVR_ISA_XMEGAU,bfd_mach_avrxmega6},
322 {"atxmega384d3", AVR_ISA_XMEGA, bfd_mach_avrxmega6},
323 {"atxmega128a1", AVR_ISA_XMEGA, bfd_mach_avrxmega7},
324 {"atxmega128a1u", AVR_ISA_XMEGAU, bfd_mach_avrxmega7},
325 {"atxmega128a4u", AVR_ISA_XMEGAU, bfd_mach_avrxmega7},
326 {NULL, 0, 0}
327 };
328
329 /* Current MCU type. */
330 static struct mcu_type_s default_mcu = {"avr2", AVR_ISA_AVR2, bfd_mach_avr2};
331 static struct mcu_type_s * avr_mcu = & default_mcu;
332
333 /* AVR target-specific switches. */
334 struct avr_opt_s
335 {
336 int all_opcodes; /* -mall-opcodes: accept all known AVR opcodes. */
337 int no_skip_bug; /* -mno-skip-bug: no warnings for skipping 2-word insns. */
338 int no_wrap; /* -mno-wrap: reject rjmp/rcall with 8K wrap-around. */
339 };
340
341 static struct avr_opt_s avr_opt = { 0, 0, 0 };
342
343 const char EXP_CHARS[] = "eE";
344 const char FLT_CHARS[] = "dD";
345
346 static void avr_set_arch (int);
347
348 /* The target specific pseudo-ops which we support. */
349 const pseudo_typeS md_pseudo_table[] =
350 {
351 {"arch", avr_set_arch, 0},
352 { NULL, NULL, 0}
353 };
354
355 #define LDI_IMMEDIATE(x) (((x) & 0xf) | (((x) << 4) & 0xf00))
356
357 #define EXP_MOD_NAME(i) exp_mod[i].name
358 #define EXP_MOD_RELOC(i) exp_mod[i].reloc
359 #define EXP_MOD_NEG_RELOC(i) exp_mod[i].neg_reloc
360 #define HAVE_PM_P(i) exp_mod[i].have_pm
361
362 struct exp_mod_s
363 {
364 char * name;
365 bfd_reloc_code_real_type reloc;
366 bfd_reloc_code_real_type neg_reloc;
367 int have_pm;
368 };
369
370 static struct exp_mod_s exp_mod[] =
371 {
372 {"hh8", BFD_RELOC_AVR_HH8_LDI, BFD_RELOC_AVR_HH8_LDI_NEG, 1},
373 {"pm_hh8", BFD_RELOC_AVR_HH8_LDI_PM, BFD_RELOC_AVR_HH8_LDI_PM_NEG, 0},
374 {"hi8", BFD_RELOC_AVR_HI8_LDI, BFD_RELOC_AVR_HI8_LDI_NEG, 1},
375 {"pm_hi8", BFD_RELOC_AVR_HI8_LDI_PM, BFD_RELOC_AVR_HI8_LDI_PM_NEG, 0},
376 {"lo8", BFD_RELOC_AVR_LO8_LDI, BFD_RELOC_AVR_LO8_LDI_NEG, 1},
377 {"pm_lo8", BFD_RELOC_AVR_LO8_LDI_PM, BFD_RELOC_AVR_LO8_LDI_PM_NEG, 0},
378 {"hlo8", BFD_RELOC_AVR_HH8_LDI, BFD_RELOC_AVR_HH8_LDI_NEG, 0},
379 {"hhi8", BFD_RELOC_AVR_MS8_LDI, BFD_RELOC_AVR_MS8_LDI_NEG, 0},
380 };
381
382 /* A union used to store indicies into the exp_mod[] array
383 in a hash table which expects void * data types. */
384 typedef union
385 {
386 void * ptr;
387 int index;
388 } mod_index;
389
390 /* Opcode hash table. */
391 static struct hash_control *avr_hash;
392
393 /* Reloc modifiers hash control (hh8,hi8,lo8,pm_xx). */
394 static struct hash_control *avr_mod_hash;
395
396 #define OPTION_MMCU 'm'
397 enum options
398 {
399 OPTION_ALL_OPCODES = OPTION_MD_BASE + 1,
400 OPTION_NO_SKIP_BUG,
401 OPTION_NO_WRAP
402 };
403
404 struct option md_longopts[] =
405 {
406 { "mmcu", required_argument, NULL, OPTION_MMCU },
407 { "mall-opcodes", no_argument, NULL, OPTION_ALL_OPCODES },
408 { "mno-skip-bug", no_argument, NULL, OPTION_NO_SKIP_BUG },
409 { "mno-wrap", no_argument, NULL, OPTION_NO_WRAP },
410 { NULL, no_argument, NULL, 0 }
411 };
412
413 size_t md_longopts_size = sizeof (md_longopts);
414
415 /* Display nicely formatted list of known MCU names. */
416
417 static void
418 show_mcu_list (FILE *stream)
419 {
420 int i, x;
421
422 fprintf (stream, _("Known MCU names:"));
423 x = 1000;
424
425 for (i = 0; mcu_types[i].name; i++)
426 {
427 int len = strlen (mcu_types[i].name);
428
429 x += len + 1;
430
431 if (x < 75)
432 fprintf (stream, " %s", mcu_types[i].name);
433 else
434 {
435 fprintf (stream, "\n %s", mcu_types[i].name);
436 x = len + 2;
437 }
438 }
439
440 fprintf (stream, "\n");
441 }
442
443 static inline char *
444 skip_space (char *s)
445 {
446 while (*s == ' ' || *s == '\t')
447 ++s;
448 return s;
449 }
450
451 /* Extract one word from FROM and copy it to TO. */
452
453 static char *
454 extract_word (char *from, char *to, int limit)
455 {
456 char *op_end;
457 int size = 0;
458
459 /* Drop leading whitespace. */
460 from = skip_space (from);
461 *to = 0;
462
463 /* Find the op code end. */
464 for (op_end = from; *op_end != 0 && is_part_of_name (*op_end);)
465 {
466 to[size++] = *op_end++;
467 if (size + 1 >= limit)
468 break;
469 }
470
471 to[size] = 0;
472 return op_end;
473 }
474
475 int
476 md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED,
477 asection *seg ATTRIBUTE_UNUSED)
478 {
479 abort ();
480 return 0;
481 }
482
483 void
484 md_show_usage (FILE *stream)
485 {
486 fprintf (stream,
487 _("AVR Assembler options:\n"
488 " -mmcu=[avr-name] select microcontroller variant\n"
489 " [avr-name] can be:\n"
490 " avr1 - classic AVR core without data RAM\n"
491 " avr2 - classic AVR core with up to 8K program memory\n"
492 " avr25 - classic AVR core with up to 8K program memory\n"
493 " plus the MOVW instruction\n"
494 " avr3 - classic AVR core with up to 64K program memory\n"
495 " avr31 - classic AVR core with up to 128K program memory\n"
496 " avr35 - classic AVR core with up to 64K program memory\n"
497 " plus the MOVW instruction\n"
498 " avr4 - enhanced AVR core with up to 8K program memory\n"
499 " avr5 - enhanced AVR core with up to 64K program memory\n"
500 " avr51 - enhanced AVR core with up to 128K program memory\n"
501 " avr6 - enhanced AVR core with up to 256K program memory\n"
502 " avrxmega2 - XMEGA, > 8K, < 64K FLASH, < 64K RAM\n"
503 " avrxmega3 - XMEGA, > 8K, <= 64K FLASH, > 64K RAM\n"
504 " avrxmega4 - XMEGA, > 64K, <= 128K FLASH, <= 64K RAM\n"
505 " avrxmega5 - XMEGA, > 64K, <= 128K FLASH, > 64K RAM\n"
506 " avrxmega6 - XMEGA, > 128K, <= 256K FLASH, <= 64K RAM\n"
507 " avrxmega7 - XMEGA, > 128K, <= 256K FLASH, > 64K RAM\n"
508 " or immediate microcontroller name.\n"));
509 fprintf (stream,
510 _(" -mall-opcodes accept all AVR opcodes, even if not supported by MCU\n"
511 " -mno-skip-bug disable warnings for skipping two-word instructions\n"
512 " (default for avr4, avr5)\n"
513 " -mno-wrap reject rjmp/rcall instructions with 8K wrap-around\n"
514 " (default for avr3, avr5)\n"));
515 show_mcu_list (stream);
516 }
517
518 static void
519 avr_set_arch (int dummy ATTRIBUTE_UNUSED)
520 {
521 char str[20];
522
523 input_line_pointer = extract_word (input_line_pointer, str, 20);
524 md_parse_option (OPTION_MMCU, str);
525 bfd_set_arch_mach (stdoutput, TARGET_ARCH, avr_mcu->mach);
526 }
527
528 int
529 md_parse_option (int c, char *arg)
530 {
531 switch (c)
532 {
533 case OPTION_MMCU:
534 {
535 int i;
536 char *s = alloca (strlen (arg) + 1);
537
538 {
539 char *t = s;
540 char *arg1 = arg;
541
542 do
543 *t = TOLOWER (*arg1++);
544 while (*t++);
545 }
546
547 for (i = 0; mcu_types[i].name; ++i)
548 if (strcmp (mcu_types[i].name, s) == 0)
549 break;
550
551 if (!mcu_types[i].name)
552 {
553 show_mcu_list (stderr);
554 as_fatal (_("unknown MCU: %s\n"), arg);
555 }
556
557 /* It is OK to redefine mcu type within the same avr[1-5] bfd machine
558 type - this for allows passing -mmcu=... via gcc ASM_SPEC as well
559 as .arch ... in the asm output at the same time. */
560 if (avr_mcu == &default_mcu || avr_mcu->mach == mcu_types[i].mach)
561 avr_mcu = &mcu_types[i];
562 else
563 as_fatal (_("redefinition of mcu type `%s' to `%s'"),
564 avr_mcu->name, mcu_types[i].name);
565 return 1;
566 }
567 case OPTION_ALL_OPCODES:
568 avr_opt.all_opcodes = 1;
569 return 1;
570 case OPTION_NO_SKIP_BUG:
571 avr_opt.no_skip_bug = 1;
572 return 1;
573 case OPTION_NO_WRAP:
574 avr_opt.no_wrap = 1;
575 return 1;
576 }
577
578 return 0;
579 }
580
581 symbolS *
582 md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
583 {
584 return NULL;
585 }
586
587 char *
588 md_atof (int type, char *litP, int *sizeP)
589 {
590 return ieee_md_atof (type, litP, sizeP, FALSE);
591 }
592
593 void
594 md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED,
595 asection *sec ATTRIBUTE_UNUSED,
596 fragS *fragP ATTRIBUTE_UNUSED)
597 {
598 abort ();
599 }
600
601 void
602 md_begin (void)
603 {
604 unsigned int i;
605 struct avr_opcodes_s *opcode;
606
607 avr_hash = hash_new ();
608
609 /* Insert unique names into hash table. This hash table then provides a
610 quick index to the first opcode with a particular name in the opcode
611 table. */
612 for (opcode = avr_opcodes; opcode->name; opcode++)
613 hash_insert (avr_hash, opcode->name, (char *) opcode);
614
615 avr_mod_hash = hash_new ();
616
617 for (i = 0; i < ARRAY_SIZE (exp_mod); ++i)
618 {
619 mod_index m;
620
621 m.index = i + 10;
622 hash_insert (avr_mod_hash, EXP_MOD_NAME (i), m.ptr);
623 }
624
625 bfd_set_arch_mach (stdoutput, TARGET_ARCH, avr_mcu->mach);
626 }
627
628 /* Resolve STR as a constant expression and return the result.
629 If result greater than MAX then error. */
630
631 static unsigned int
632 avr_get_constant (char *str, int max)
633 {
634 expressionS ex;
635
636 str = skip_space (str);
637 input_line_pointer = str;
638 expression (& ex);
639
640 if (ex.X_op != O_constant)
641 as_bad (_("constant value required"));
642
643 if (ex.X_add_number > max || ex.X_add_number < 0)
644 as_bad (_("number must be positive and less than %d"), max + 1);
645
646 return ex.X_add_number;
647 }
648
649 /* Parse for ldd/std offset. */
650
651 static void
652 avr_offset_expression (expressionS *exp)
653 {
654 char *str = input_line_pointer;
655 char *tmp;
656 char op[8];
657
658 tmp = str;
659 str = extract_word (str, op, sizeof (op));
660
661 input_line_pointer = tmp;
662 expression (exp);
663
664 /* Warn about expressions that fail to use lo8 (). */
665 if (exp->X_op == O_constant)
666 {
667 int x = exp->X_add_number;
668
669 if (x < -255 || x > 255)
670 as_warn (_("constant out of 8-bit range: %d"), x);
671 }
672 }
673
674 /* Parse ordinary expression. */
675
676 static char *
677 parse_exp (char *s, expressionS *op)
678 {
679 input_line_pointer = s;
680 expression (op);
681 if (op->X_op == O_absent)
682 as_bad (_("missing operand"));
683 return input_line_pointer;
684 }
685
686 /* Parse special expressions (needed for LDI command):
687 xx8 (address)
688 xx8 (-address)
689 pm_xx8 (address)
690 pm_xx8 (-address)
691 where xx is: hh, hi, lo. */
692
693 static bfd_reloc_code_real_type
694 avr_ldi_expression (expressionS *exp)
695 {
696 char *str = input_line_pointer;
697 char *tmp;
698 char op[8];
699 int mod;
700 int linker_stubs_should_be_generated = 0;
701
702 tmp = str;
703
704 str = extract_word (str, op, sizeof (op));
705
706 if (op[0])
707 {
708 mod_index m;
709
710 m.ptr = hash_find (avr_mod_hash, op);
711 mod = m.index;
712
713 if (mod)
714 {
715 int closes = 0;
716
717 mod -= 10;
718 str = skip_space (str);
719
720 if (*str == '(')
721 {
722 bfd_reloc_code_real_type reloc_to_return;
723 int neg_p = 0;
724
725 ++str;
726
727 if (strncmp ("pm(", str, 3) == 0
728 || strncmp ("gs(",str,3) == 0
729 || strncmp ("-(gs(",str,5) == 0
730 || strncmp ("-(pm(", str, 5) == 0)
731 {
732 if (HAVE_PM_P (mod))
733 {
734 ++mod;
735 ++closes;
736 }
737 else
738 as_bad (_("illegal expression"));
739
740 if (str[0] == 'g' || str[2] == 'g')
741 linker_stubs_should_be_generated = 1;
742
743 if (*str == '-')
744 {
745 neg_p = 1;
746 ++closes;
747 str += 5;
748 }
749 else
750 str += 3;
751 }
752
753 if (*str == '-' && *(str + 1) == '(')
754 {
755 neg_p ^= 1;
756 ++closes;
757 str += 2;
758 }
759
760 input_line_pointer = str;
761 expression (exp);
762
763 do
764 {
765 if (*input_line_pointer != ')')
766 {
767 as_bad (_("`)' required"));
768 break;
769 }
770 input_line_pointer++;
771 }
772 while (closes--);
773
774 reloc_to_return =
775 neg_p ? EXP_MOD_NEG_RELOC (mod) : EXP_MOD_RELOC (mod);
776 if (linker_stubs_should_be_generated)
777 {
778 switch (reloc_to_return)
779 {
780 case BFD_RELOC_AVR_LO8_LDI_PM:
781 reloc_to_return = BFD_RELOC_AVR_LO8_LDI_GS;
782 break;
783 case BFD_RELOC_AVR_HI8_LDI_PM:
784 reloc_to_return = BFD_RELOC_AVR_HI8_LDI_GS;
785 break;
786
787 default:
788 /* PR 5523: Do not generate a warning here,
789 legitimate code can trigger this case. */
790 break;
791 }
792 }
793 return reloc_to_return;
794 }
795 }
796 }
797
798 input_line_pointer = tmp;
799 expression (exp);
800
801 /* Warn about expressions that fail to use lo8 (). */
802 if (exp->X_op == O_constant)
803 {
804 int x = exp->X_add_number;
805
806 if (x < -255 || x > 255)
807 as_warn (_("constant out of 8-bit range: %d"), x);
808 }
809
810 return BFD_RELOC_AVR_LDI;
811 }
812
813 /* Parse one instruction operand.
814 Return operand bitmask. Also fixups can be generated. */
815
816 static unsigned int
817 avr_operand (struct avr_opcodes_s *opcode,
818 int where,
819 char *op,
820 char **line)
821 {
822 expressionS op_expr;
823 unsigned int op_mask = 0;
824 char *str = skip_space (*line);
825
826 switch (*op)
827 {
828 /* Any register operand. */
829 case 'w':
830 case 'd':
831 case 'r':
832 case 'a':
833 case 'v':
834 if (*str == 'r' || *str == 'R')
835 {
836 char r_name[20];
837
838 str = extract_word (str, r_name, sizeof (r_name));
839 op_mask = 0xff;
840 if (ISDIGIT (r_name[1]))
841 {
842 if (r_name[2] == '\0')
843 op_mask = r_name[1] - '0';
844 else if (r_name[1] != '0'
845 && ISDIGIT (r_name[2])
846 && r_name[3] == '\0')
847 op_mask = (r_name[1] - '0') * 10 + r_name[2] - '0';
848 }
849 }
850 else
851 {
852 op_mask = avr_get_constant (str, 31);
853 str = input_line_pointer;
854 }
855
856 if (op_mask <= 31)
857 {
858 switch (*op)
859 {
860 case 'a':
861 if (op_mask < 16 || op_mask > 23)
862 as_bad (_("register r16-r23 required"));
863 op_mask -= 16;
864 break;
865
866 case 'd':
867 if (op_mask < 16)
868 as_bad (_("register number above 15 required"));
869 op_mask -= 16;
870 break;
871
872 case 'v':
873 if (op_mask & 1)
874 as_bad (_("even register number required"));
875 op_mask >>= 1;
876 break;
877
878 case 'w':
879 if ((op_mask & 1) || op_mask < 24)
880 as_bad (_("register r24, r26, r28 or r30 required"));
881 op_mask = (op_mask - 24) >> 1;
882 break;
883 }
884 break;
885 }
886 as_bad (_("register name or number from 0 to 31 required"));
887 break;
888
889 case 'e':
890 {
891 char c;
892
893 if (*str == '-')
894 {
895 str = skip_space (str + 1);
896 op_mask = 0x1002;
897 }
898 c = TOLOWER (*str);
899 if (c == 'x')
900 op_mask |= 0x100c;
901 else if (c == 'y')
902 op_mask |= 0x8;
903 else if (c != 'z')
904 as_bad (_("pointer register (X, Y or Z) required"));
905
906 str = skip_space (str + 1);
907 if (*str == '+')
908 {
909 ++str;
910 if (op_mask & 2)
911 as_bad (_("cannot both predecrement and postincrement"));
912 op_mask |= 0x1001;
913 }
914
915 /* avr1 can do "ld r,Z" and "st Z,r" but no other pointer
916 registers, no predecrement, no postincrement. */
917 if (!avr_opt.all_opcodes && (op_mask & 0x100F)
918 && !(avr_mcu->isa & AVR_ISA_SRAM))
919 as_bad (_("addressing mode not supported"));
920 }
921 break;
922
923 case 'z':
924 if (*str == '-')
925 as_bad (_("can't predecrement"));
926
927 if (! (*str == 'z' || *str == 'Z'))
928 as_bad (_("pointer register Z required"));
929
930 str = skip_space (str + 1);
931
932 if (*str == '+')
933 {
934 ++str;
935 char *s;
936 for (s = opcode->opcode; *s; ++s)
937 {
938 if (*s == '+')
939 op_mask |= (1 << (15 - (s - opcode->opcode)));
940 }
941 }
942
943 /* attiny26 can do "lpm" and "lpm r,Z" but not "lpm r,Z+". */
944 if (!avr_opt.all_opcodes
945 && (op_mask & 0x0001)
946 && !(avr_mcu->isa & AVR_ISA_MOVW))
947 as_bad (_("postincrement not supported"));
948 break;
949
950 case 'b':
951 {
952 char c = TOLOWER (*str++);
953
954 if (c == 'y')
955 op_mask |= 0x8;
956 else if (c != 'z')
957 as_bad (_("pointer register (Y or Z) required"));
958 str = skip_space (str);
959 if (*str++ == '+')
960 {
961 input_line_pointer = str;
962 avr_offset_expression (& op_expr);
963 str = input_line_pointer;
964 fix_new_exp (frag_now, where, 3,
965 &op_expr, FALSE, BFD_RELOC_AVR_6);
966 }
967 }
968 break;
969
970 case 'h':
971 str = parse_exp (str, &op_expr);
972 fix_new_exp (frag_now, where, opcode->insn_size * 2,
973 &op_expr, FALSE, BFD_RELOC_AVR_CALL);
974 break;
975
976 case 'L':
977 str = parse_exp (str, &op_expr);
978 fix_new_exp (frag_now, where, opcode->insn_size * 2,
979 &op_expr, TRUE, BFD_RELOC_AVR_13_PCREL);
980 break;
981
982 case 'l':
983 str = parse_exp (str, &op_expr);
984 fix_new_exp (frag_now, where, opcode->insn_size * 2,
985 &op_expr, TRUE, BFD_RELOC_AVR_7_PCREL);
986 break;
987
988 case 'i':
989 str = parse_exp (str, &op_expr);
990 fix_new_exp (frag_now, where + 2, opcode->insn_size * 2,
991 &op_expr, FALSE, BFD_RELOC_16);
992 break;
993
994 case 'M':
995 {
996 bfd_reloc_code_real_type r_type;
997
998 input_line_pointer = str;
999 r_type = avr_ldi_expression (&op_expr);
1000 str = input_line_pointer;
1001 fix_new_exp (frag_now, where, 3,
1002 &op_expr, FALSE, r_type);
1003 }
1004 break;
1005
1006 case 'n':
1007 {
1008 unsigned int x;
1009
1010 x = ~avr_get_constant (str, 255);
1011 str = input_line_pointer;
1012 op_mask |= (x & 0xf) | ((x << 4) & 0xf00);
1013 }
1014 break;
1015
1016 case 'K':
1017 input_line_pointer = str;
1018 avr_offset_expression (& op_expr);
1019 str = input_line_pointer;
1020 fix_new_exp (frag_now, where, 3,
1021 & op_expr, FALSE, BFD_RELOC_AVR_6_ADIW);
1022 break;
1023
1024 case 'S':
1025 case 's':
1026 {
1027 unsigned int x;
1028
1029 x = avr_get_constant (str, 7);
1030 str = input_line_pointer;
1031 if (*op == 'S')
1032 x <<= 4;
1033 op_mask |= x;
1034 }
1035 break;
1036
1037 case 'P':
1038 {
1039 unsigned int x;
1040
1041 x = avr_get_constant (str, 63);
1042 str = input_line_pointer;
1043 op_mask |= (x & 0xf) | ((x & 0x30) << 5);
1044 }
1045 break;
1046
1047 case 'p':
1048 {
1049 unsigned int x;
1050
1051 x = avr_get_constant (str, 31);
1052 str = input_line_pointer;
1053 op_mask |= x << 3;
1054 }
1055 break;
1056
1057 case 'E':
1058 {
1059 unsigned int x;
1060
1061 x = avr_get_constant (str, 15);
1062 str = input_line_pointer;
1063 op_mask |= (x << 4);
1064 }
1065 break;
1066
1067 case '?':
1068 break;
1069
1070 default:
1071 as_bad (_("unknown constraint `%c'"), *op);
1072 }
1073
1074 *line = str;
1075 return op_mask;
1076 }
1077
1078 /* Parse instruction operands.
1079 Return binary opcode. */
1080
1081 static unsigned int
1082 avr_operands (struct avr_opcodes_s *opcode, char **line)
1083 {
1084 char *op = opcode->constraints;
1085 unsigned int bin = opcode->bin_opcode;
1086 char *frag = frag_more (opcode->insn_size * 2);
1087 char *str = *line;
1088 int where = frag - frag_now->fr_literal;
1089 static unsigned int prev = 0; /* Previous opcode. */
1090
1091 /* Opcode have operands. */
1092 if (*op)
1093 {
1094 unsigned int reg1 = 0;
1095 unsigned int reg2 = 0;
1096 int reg1_present = 0;
1097 int reg2_present = 0;
1098
1099 /* Parse first operand. */
1100 if (REGISTER_P (*op))
1101 reg1_present = 1;
1102 reg1 = avr_operand (opcode, where, op, &str);
1103 ++op;
1104
1105 /* Parse second operand. */
1106 if (*op)
1107 {
1108 if (*op == ',')
1109 ++op;
1110
1111 if (*op == '=')
1112 {
1113 reg2 = reg1;
1114 reg2_present = 1;
1115 }
1116 else
1117 {
1118 if (REGISTER_P (*op))
1119 reg2_present = 1;
1120
1121 str = skip_space (str);
1122 if (*str++ != ',')
1123 as_bad (_("`,' required"));
1124 str = skip_space (str);
1125
1126 reg2 = avr_operand (opcode, where, op, &str);
1127 }
1128
1129 if (reg1_present && reg2_present)
1130 reg2 = (reg2 & 0xf) | ((reg2 << 5) & 0x200);
1131 else if (reg2_present)
1132 reg2 <<= 4;
1133 }
1134 if (reg1_present)
1135 reg1 <<= 4;
1136 bin |= reg1 | reg2;
1137 }
1138
1139 /* Detect undefined combinations (like ld r31,Z+). */
1140 if (!avr_opt.all_opcodes && AVR_UNDEF_P (bin))
1141 as_warn (_("undefined combination of operands"));
1142
1143 if (opcode->insn_size == 2)
1144 {
1145 /* Warn if the previous opcode was cpse/sbic/sbis/sbrc/sbrs
1146 (AVR core bug, fixed in the newer devices). */
1147 if (!(avr_opt.no_skip_bug ||
1148 (avr_mcu->isa & (AVR_ISA_MUL | AVR_ISA_MOVW)))
1149 && AVR_SKIP_P (prev))
1150 as_warn (_("skipping two-word instruction"));
1151
1152 bfd_putl32 ((bfd_vma) bin, frag);
1153 }
1154 else
1155 bfd_putl16 ((bfd_vma) bin, frag);
1156
1157 prev = bin;
1158 *line = str;
1159 return bin;
1160 }
1161
1162 /* GAS will call this function for each section at the end of the assembly,
1163 to permit the CPU backend to adjust the alignment of a section. */
1164
1165 valueT
1166 md_section_align (asection *seg, valueT addr)
1167 {
1168 int align = bfd_get_section_alignment (stdoutput, seg);
1169 return ((addr + (1 << align) - 1) & (-1 << align));
1170 }
1171
1172 /* If you define this macro, it should return the offset between the
1173 address of a PC relative fixup and the position from which the PC
1174 relative adjustment should be made. On many processors, the base
1175 of a PC relative instruction is the next instruction, so this
1176 macro would return the length of an instruction. */
1177
1178 long
1179 md_pcrel_from_section (fixS *fixp, segT sec)
1180 {
1181 if (fixp->fx_addsy != (symbolS *) NULL
1182 && (!S_IS_DEFINED (fixp->fx_addsy)
1183 || (S_GET_SEGMENT (fixp->fx_addsy) != sec)))
1184 return 0;
1185
1186 return fixp->fx_frag->fr_address + fixp->fx_where;
1187 }
1188
1189 /* GAS will call this for each fixup. It should store the correct
1190 value in the object file. */
1191
1192 void
1193 md_apply_fix (fixS *fixP, valueT * valP, segT seg)
1194 {
1195 unsigned char *where;
1196 unsigned long insn;
1197 long value = *valP;
1198
1199 if (fixP->fx_addsy == (symbolS *) NULL)
1200 fixP->fx_done = 1;
1201
1202 else if (fixP->fx_pcrel)
1203 {
1204 segT s = S_GET_SEGMENT (fixP->fx_addsy);
1205
1206 if (s == seg || s == absolute_section)
1207 {
1208 value += S_GET_VALUE (fixP->fx_addsy);
1209 fixP->fx_done = 1;
1210 }
1211 }
1212
1213 /* We don't actually support subtracting a symbol. */
1214 if (fixP->fx_subsy != (symbolS *) NULL)
1215 as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
1216
1217 switch (fixP->fx_r_type)
1218 {
1219 default:
1220 fixP->fx_no_overflow = 1;
1221 break;
1222 case BFD_RELOC_AVR_7_PCREL:
1223 case BFD_RELOC_AVR_13_PCREL:
1224 case BFD_RELOC_32:
1225 case BFD_RELOC_16:
1226 case BFD_RELOC_AVR_CALL:
1227 break;
1228 }
1229
1230 if (fixP->fx_done)
1231 {
1232 /* Fetch the instruction, insert the fully resolved operand
1233 value, and stuff the instruction back again. */
1234 where = (unsigned char *) fixP->fx_frag->fr_literal + fixP->fx_where;
1235 insn = bfd_getl16 (where);
1236
1237 switch (fixP->fx_r_type)
1238 {
1239 case BFD_RELOC_AVR_7_PCREL:
1240 if (value & 1)
1241 as_bad_where (fixP->fx_file, fixP->fx_line,
1242 _("odd address operand: %ld"), value);
1243
1244 /* Instruction addresses are always right-shifted by 1. */
1245 value >>= 1;
1246 --value; /* Correct PC. */
1247
1248 if (value < -64 || value > 63)
1249 as_bad_where (fixP->fx_file, fixP->fx_line,
1250 _("operand out of range: %ld"), value);
1251 value = (value << 3) & 0x3f8;
1252 bfd_putl16 ((bfd_vma) (value | insn), where);
1253 break;
1254
1255 case BFD_RELOC_AVR_13_PCREL:
1256 if (value & 1)
1257 as_bad_where (fixP->fx_file, fixP->fx_line,
1258 _("odd address operand: %ld"), value);
1259
1260 /* Instruction addresses are always right-shifted by 1. */
1261 value >>= 1;
1262 --value; /* Correct PC. */
1263
1264 if (value < -2048 || value > 2047)
1265 {
1266 /* No wrap for devices with >8K of program memory. */
1267 if ((avr_mcu->isa & AVR_ISA_MEGA) || avr_opt.no_wrap)
1268 as_bad_where (fixP->fx_file, fixP->fx_line,
1269 _("operand out of range: %ld"), value);
1270 }
1271
1272 value &= 0xfff;
1273 bfd_putl16 ((bfd_vma) (value | insn), where);
1274 break;
1275
1276 case BFD_RELOC_32:
1277 bfd_putl32 ((bfd_vma) value, where);
1278 break;
1279
1280 case BFD_RELOC_16:
1281 bfd_putl16 ((bfd_vma) value, where);
1282 break;
1283
1284 case BFD_RELOC_8:
1285 if (value > 255 || value < -128)
1286 as_warn_where (fixP->fx_file, fixP->fx_line,
1287 _("operand out of range: %ld"), value);
1288 *where = value;
1289 break;
1290
1291 case BFD_RELOC_AVR_16_PM:
1292 bfd_putl16 ((bfd_vma) (value >> 1), where);
1293 break;
1294
1295 case BFD_RELOC_AVR_LDI:
1296 if (value > 255)
1297 as_bad_where (fixP->fx_file, fixP->fx_line,
1298 _("operand out of range: %ld"), value);
1299 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value), where);
1300 break;
1301
1302 case BFD_RELOC_AVR_6:
1303 if ((value > 63) || (value < 0))
1304 as_bad_where (fixP->fx_file, fixP->fx_line,
1305 _("operand out of range: %ld"), value);
1306 bfd_putl16 ((bfd_vma) insn | ((value & 7) | ((value & (3 << 3)) << 7) | ((value & (1 << 5)) << 8)), where);
1307 break;
1308
1309 case BFD_RELOC_AVR_6_ADIW:
1310 if ((value > 63) || (value < 0))
1311 as_bad_where (fixP->fx_file, fixP->fx_line,
1312 _("operand out of range: %ld"), value);
1313 bfd_putl16 ((bfd_vma) insn | (value & 0xf) | ((value & 0x30) << 2), where);
1314 break;
1315
1316 case BFD_RELOC_AVR_LO8_LDI:
1317 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value), where);
1318 break;
1319
1320 case BFD_RELOC_AVR_HI8_LDI:
1321 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 8), where);
1322 break;
1323
1324 case BFD_RELOC_AVR_MS8_LDI:
1325 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 24), where);
1326 break;
1327
1328 case BFD_RELOC_AVR_HH8_LDI:
1329 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 16), where);
1330 break;
1331
1332 case BFD_RELOC_AVR_LO8_LDI_NEG:
1333 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value), where);
1334 break;
1335
1336 case BFD_RELOC_AVR_HI8_LDI_NEG:
1337 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 8), where);
1338 break;
1339
1340 case BFD_RELOC_AVR_MS8_LDI_NEG:
1341 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 24), where);
1342 break;
1343
1344 case BFD_RELOC_AVR_HH8_LDI_NEG:
1345 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 16), where);
1346 break;
1347
1348 case BFD_RELOC_AVR_LO8_LDI_PM:
1349 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 1), where);
1350 break;
1351
1352 case BFD_RELOC_AVR_HI8_LDI_PM:
1353 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 9), where);
1354 break;
1355
1356 case BFD_RELOC_AVR_HH8_LDI_PM:
1357 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 17), where);
1358 break;
1359
1360 case BFD_RELOC_AVR_LO8_LDI_PM_NEG:
1361 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 1), where);
1362 break;
1363
1364 case BFD_RELOC_AVR_HI8_LDI_PM_NEG:
1365 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 9), where);
1366 break;
1367
1368 case BFD_RELOC_AVR_HH8_LDI_PM_NEG:
1369 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 17), where);
1370 break;
1371
1372 case BFD_RELOC_AVR_CALL:
1373 {
1374 unsigned long x;
1375
1376 x = bfd_getl16 (where);
1377 if (value & 1)
1378 as_bad_where (fixP->fx_file, fixP->fx_line,
1379 _("odd address operand: %ld"), value);
1380 value >>= 1;
1381 x |= ((value & 0x10000) | ((value << 3) & 0x1f00000)) >> 16;
1382 bfd_putl16 ((bfd_vma) x, where);
1383 bfd_putl16 ((bfd_vma) (value & 0xffff), where + 2);
1384 }
1385 break;
1386
1387 case BFD_RELOC_AVR_8_LO:
1388 *where = 0xff & value;
1389 break;
1390
1391 case BFD_RELOC_AVR_8_HI:
1392 *where = 0xff & (value >> 8);
1393 break;
1394
1395 case BFD_RELOC_AVR_8_HLO:
1396 *where = 0xff & (value >> 16);
1397 break;
1398
1399 default:
1400 as_fatal (_("line %d: unknown relocation type: 0x%x"),
1401 fixP->fx_line, fixP->fx_r_type);
1402 break;
1403 }
1404 }
1405 else
1406 {
1407 switch ((int) fixP->fx_r_type)
1408 {
1409 case -BFD_RELOC_AVR_HI8_LDI_NEG:
1410 case -BFD_RELOC_AVR_HI8_LDI:
1411 case -BFD_RELOC_AVR_LO8_LDI_NEG:
1412 case -BFD_RELOC_AVR_LO8_LDI:
1413 as_bad_where (fixP->fx_file, fixP->fx_line,
1414 _("only constant expression allowed"));
1415 fixP->fx_done = 1;
1416 break;
1417 default:
1418 break;
1419 }
1420 }
1421 }
1422
1423 /* GAS will call this to generate a reloc, passing the resulting reloc
1424 to `bfd_install_relocation'. This currently works poorly, as
1425 `bfd_install_relocation' often does the wrong thing, and instances of
1426 `tc_gen_reloc' have been written to work around the problems, which
1427 in turns makes it difficult to fix `bfd_install_relocation'. */
1428
1429 /* If while processing a fixup, a reloc really needs to be created
1430 then it is done here. */
1431
1432 arelent *
1433 tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED,
1434 fixS *fixp)
1435 {
1436 arelent *reloc;
1437
1438 if (fixp->fx_subsy != NULL)
1439 {
1440 as_bad_where (fixp->fx_file, fixp->fx_line, _("expression too complex"));
1441 return NULL;
1442 }
1443
1444 reloc = xmalloc (sizeof (arelent));
1445
1446 reloc->sym_ptr_ptr = xmalloc (sizeof (asymbol *));
1447 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
1448
1449 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
1450 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
1451 if (reloc->howto == (reloc_howto_type *) NULL)
1452 {
1453 as_bad_where (fixp->fx_file, fixp->fx_line,
1454 _("reloc %d not supported by object file format"),
1455 (int) fixp->fx_r_type);
1456 return NULL;
1457 }
1458
1459 if (fixp->fx_r_type == BFD_RELOC_VTABLE_INHERIT
1460 || fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
1461 reloc->address = fixp->fx_offset;
1462
1463 reloc->addend = fixp->fx_offset;
1464
1465 return reloc;
1466 }
1467
1468 void
1469 md_assemble (char *str)
1470 {
1471 struct avr_opcodes_s *opcode;
1472 char op[11];
1473
1474 str = skip_space (extract_word (str, op, sizeof (op)));
1475
1476 if (!op[0])
1477 as_bad (_("can't find opcode "));
1478
1479 opcode = (struct avr_opcodes_s *) hash_find (avr_hash, op);
1480
1481 if (opcode == NULL)
1482 {
1483 as_bad (_("unknown opcode `%s'"), op);
1484 return;
1485 }
1486
1487 /* Special case for opcodes with optional operands (lpm, elpm) -
1488 version with operands exists in avr_opcodes[] in the next entry. */
1489
1490 if (*str && *opcode->constraints == '?')
1491 ++opcode;
1492
1493 if (!avr_opt.all_opcodes && (opcode->isa & avr_mcu->isa) != opcode->isa)
1494 as_bad (_("illegal opcode %s for mcu %s"), opcode->name, avr_mcu->name);
1495
1496 dwarf2_emit_insn (0);
1497
1498 /* We used to set input_line_pointer to the result of get_operands,
1499 but that is wrong. Our caller assumes we don't change it. */
1500 {
1501 char *t = input_line_pointer;
1502
1503 avr_operands (opcode, &str);
1504 if (*skip_space (str))
1505 as_bad (_("garbage at end of line"));
1506 input_line_pointer = t;
1507 }
1508 }
1509
1510 typedef struct
1511 {
1512 /* Name of the expression modifier allowed with .byte, .word, etc. */
1513 const char *name;
1514
1515 /* Only allowed with n bytes of data. */
1516 int nbytes;
1517
1518 /* Associated RELOC. */
1519 bfd_reloc_code_real_type reloc;
1520
1521 /* Part of the error message. */
1522 const char *error;
1523 } exp_mod_data_t;
1524
1525 static const exp_mod_data_t exp_mod_data[] =
1526 {
1527 /* Default, must be first. */
1528 { "", 0, BFD_RELOC_16, "" },
1529 /* Divides by 2 to get word address. Generate Stub. */
1530 { "gs", 2, BFD_RELOC_AVR_16_PM, "`gs' " },
1531 { "pm", 2, BFD_RELOC_AVR_16_PM, "`pm' " },
1532 /* The following are used together with avr-gcc's __memx address space
1533 in order to initialize a 24-bit pointer variable with a 24-bit address.
1534 For address in flash, hlo8 will contain the flash segment if the
1535 symbol is located in flash. If the symbol is located in RAM; hlo8
1536 will contain 0x80 which matches avr-gcc's notion of how 24-bit RAM/flash
1537 addresses linearize address space. */
1538 { "lo8", 1, BFD_RELOC_AVR_8_LO, "`lo8' " },
1539 { "hi8", 1, BFD_RELOC_AVR_8_HI, "`hi8' " },
1540 { "hlo8", 1, BFD_RELOC_AVR_8_HLO, "`hlo8' " },
1541 { "hh8", 1, BFD_RELOC_AVR_8_HLO, "`hh8' " },
1542 /* End of list. */
1543 { NULL, 0, 0, NULL }
1544 };
1545
1546 /* Data to pass between `avr_parse_cons_expression' and `avr_cons_fix_new'. */
1547 static const exp_mod_data_t *pexp_mod_data = &exp_mod_data[0];
1548
1549 /* Parse special CONS expression: pm (expression) or alternatively
1550 gs (expression). These are used for addressing program memory. Moreover,
1551 define lo8 (expression), hi8 (expression) and hlo8 (expression). */
1552
1553 void
1554 avr_parse_cons_expression (expressionS *exp, int nbytes)
1555 {
1556 const exp_mod_data_t *pexp = &exp_mod_data[0];
1557 char *tmp;
1558
1559 pexp_mod_data = pexp;
1560
1561 tmp = input_line_pointer = skip_space (input_line_pointer);
1562
1563 /* The first entry of exp_mod_data[] contains an entry if no
1564 expression modifier is present. Skip it. */
1565
1566 for (pexp++; pexp->name; pexp++)
1567 {
1568 int len = strlen (pexp->name);
1569
1570 if (nbytes == pexp->nbytes
1571 && strncasecmp (input_line_pointer, pexp->name, len) == 0)
1572 {
1573 input_line_pointer = skip_space (input_line_pointer + len);
1574
1575 if (*input_line_pointer == '(')
1576 {
1577 input_line_pointer = skip_space (input_line_pointer + 1);
1578 pexp_mod_data = pexp;
1579 expression (exp);
1580
1581 if (*input_line_pointer == ')')
1582 ++input_line_pointer;
1583 else
1584 {
1585 as_bad (_("`)' required"));
1586 pexp_mod_data = &exp_mod_data[0];
1587 }
1588
1589 return;
1590 }
1591
1592 input_line_pointer = tmp;
1593
1594 break;
1595 }
1596 }
1597
1598 expression (exp);
1599 }
1600
1601 void
1602 avr_cons_fix_new (fragS *frag,
1603 int where,
1604 int nbytes,
1605 expressionS *exp)
1606 {
1607 int bad = 0;
1608
1609 switch (pexp_mod_data->reloc)
1610 {
1611 default:
1612 if (nbytes == 1)
1613 fix_new_exp (frag, where, nbytes, exp, FALSE, BFD_RELOC_8);
1614 else if (nbytes == 2)
1615 fix_new_exp (frag, where, nbytes, exp, FALSE, BFD_RELOC_16);
1616 else if (nbytes == 4)
1617 fix_new_exp (frag, where, nbytes, exp, FALSE, BFD_RELOC_32);
1618 else
1619 bad = 1;
1620 break;
1621
1622 case BFD_RELOC_AVR_16_PM:
1623 case BFD_RELOC_AVR_8_LO:
1624 case BFD_RELOC_AVR_8_HI:
1625 case BFD_RELOC_AVR_8_HLO:
1626 if (nbytes == pexp_mod_data->nbytes)
1627 fix_new_exp (frag, where, nbytes, exp, FALSE, pexp_mod_data->reloc);
1628 else
1629 bad = 1;
1630 break;
1631 }
1632
1633 if (bad)
1634 as_bad (_("illegal %srelocation size: %d"), pexp_mod_data->error, nbytes);
1635
1636 pexp_mod_data = &exp_mod_data[0];
1637 }
1638
1639 static bfd_boolean
1640 mcu_has_3_byte_pc (void)
1641 {
1642 int mach = avr_mcu->mach;
1643
1644 return mach == bfd_mach_avr6
1645 || mach == bfd_mach_avrxmega6
1646 || mach == bfd_mach_avrxmega7;
1647 }
1648
1649 void
1650 tc_cfi_frame_initial_instructions (void)
1651 {
1652 /* AVR6 pushes 3 bytes for calls. */
1653 int return_size = (mcu_has_3_byte_pc () ? 3 : 2);
1654
1655 /* The CFA is the caller's stack location before the call insn. */
1656 /* Note that the stack pointer is dwarf register number 32. */
1657 cfi_add_CFA_def_cfa (32, return_size);
1658
1659 /* Note that AVR consistently uses post-decrement, which means that things
1660 do not line up the same way as for targers that use pre-decrement. */
1661 cfi_add_CFA_offset (DWARF2_DEFAULT_RETURN_COLUMN, 1-return_size);
1662 }
GDB Binutils - Deliverables
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