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[deliverable/binutils-gdb.git] / gas / config / tc-avr.c
1 /* tc-avr.c -- Assembler code for the ATMEL AVR
2
3 Copyright 1999, 2000, 2001, 2002, 2004, 2005, 2006, 2007, 2008, 2009,
4 2010 Free Software Foundation, Inc.
5 Contributed by Denis Chertykov <denisc@overta.ru>
6
7 This file is part of GAS, the GNU Assembler.
8
9 GAS is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3, or (at your option)
12 any later version.
13
14 GAS is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with GAS; see the file COPYING. If not, write to
21 the Free Software Foundation, 51 Franklin Street - Fifth Floor,
22 Boston, MA 02110-1301, USA. */
23
24 #include "as.h"
25 #include "safe-ctype.h"
26 #include "subsegs.h"
27
28 struct avr_opcodes_s
29 {
30 char * name;
31 char * constraints;
32 char * opcode;
33 int insn_size; /* In words. */
34 int isa;
35 unsigned int bin_opcode;
36 };
37
38 #define AVR_INSN(NAME, CONSTR, OPCODE, SIZE, ISA, BIN) \
39 {#NAME, CONSTR, OPCODE, SIZE, ISA, BIN},
40
41 struct avr_opcodes_s avr_opcodes[] =
42 {
43 #include "opcode/avr.h"
44 {NULL, NULL, NULL, 0, 0, 0}
45 };
46
47 const char comment_chars[] = ";";
48 const char line_comment_chars[] = "#";
49 const char line_separator_chars[] = "$";
50
51 const char *md_shortopts = "m:";
52 struct mcu_type_s
53 {
54 char *name;
55 int isa;
56 int mach;
57 };
58
59 /* XXX - devices that don't seem to exist (renamed, replaced with larger
60 ones, or planned but never produced), left here for compatibility. */
61
62 static struct mcu_type_s mcu_types[] =
63 {
64 {"avr1", AVR_ISA_AVR1, bfd_mach_avr1},
65 /* TODO: insruction set for avr2 architecture should be AVR_ISA_AVR2,
66 but set to AVR_ISA_AVR25 for some following version
67 of GCC (from 4.3) for backward compatibility. */
68 {"avr2", AVR_ISA_AVR25, bfd_mach_avr2},
69 {"avr25", AVR_ISA_AVR25, bfd_mach_avr25},
70 /* TODO: insruction set for avr3 architecture should be AVR_ISA_AVR3,
71 but set to AVR_ISA_AVR3_ALL for some following version
72 of GCC (from 4.3) for backward compatibility. */
73 {"avr3", AVR_ISA_AVR3_ALL, bfd_mach_avr3},
74 {"avr31", AVR_ISA_AVR31, bfd_mach_avr31},
75 {"avr35", AVR_ISA_AVR35, bfd_mach_avr35},
76 {"avr4", AVR_ISA_AVR4, bfd_mach_avr4},
77 /* TODO: insruction set for avr5 architecture should be AVR_ISA_AVR5,
78 but set to AVR_ISA_AVR51 for some following version
79 of GCC (from 4.3) for backward compatibility. */
80 {"avr5", AVR_ISA_AVR51, bfd_mach_avr5},
81 {"avr51", AVR_ISA_AVR51, bfd_mach_avr51},
82 {"avr6", AVR_ISA_AVR6, bfd_mach_avr6},
83 {"avrxmega1", AVR_ISA_XMEGA, bfd_mach_avrxmega1},
84 {"avrxmega2", AVR_ISA_XMEGA, bfd_mach_avrxmega2},
85 {"avrxmega3", AVR_ISA_XMEGA, bfd_mach_avrxmega3},
86 {"avrxmega4", AVR_ISA_XMEGA, bfd_mach_avrxmega4},
87 {"avrxmega5", AVR_ISA_XMEGA, bfd_mach_avrxmega5},
88 {"avrxmega6", AVR_ISA_XMEGA, bfd_mach_avrxmega6},
89 {"avrxmega7", AVR_ISA_XMEGA, bfd_mach_avrxmega7},
90 {"at90s1200", AVR_ISA_1200, bfd_mach_avr1},
91 {"attiny11", AVR_ISA_AVR1, bfd_mach_avr1},
92 {"attiny12", AVR_ISA_AVR1, bfd_mach_avr1},
93 {"attiny15", AVR_ISA_AVR1, bfd_mach_avr1},
94 {"attiny28", AVR_ISA_AVR1, bfd_mach_avr1},
95 {"at90s2313", AVR_ISA_AVR2, bfd_mach_avr2},
96 {"at90s2323", AVR_ISA_AVR2, bfd_mach_avr2},
97 {"at90s2333", AVR_ISA_AVR2, bfd_mach_avr2}, /* XXX -> 4433 */
98 {"at90s2343", AVR_ISA_AVR2, bfd_mach_avr2},
99 {"attiny22", AVR_ISA_AVR2, bfd_mach_avr2}, /* XXX -> 2343 */
100 {"attiny26", AVR_ISA_2xxe, bfd_mach_avr2},
101 {"at90s4414", AVR_ISA_AVR2, bfd_mach_avr2}, /* XXX -> 8515 */
102 {"at90s4433", AVR_ISA_AVR2, bfd_mach_avr2},
103 {"at90s4434", AVR_ISA_AVR2, bfd_mach_avr2}, /* XXX -> 8535 */
104 {"at90s8515", AVR_ISA_AVR2, bfd_mach_avr2},
105 {"at90c8534", AVR_ISA_AVR2, bfd_mach_avr2},
106 {"at90s8535", AVR_ISA_AVR2, bfd_mach_avr2},
107 {"attiny13", AVR_ISA_AVR25, bfd_mach_avr25},
108 {"attiny13a", AVR_ISA_AVR25, bfd_mach_avr25},
109 {"attiny2313", AVR_ISA_AVR25, bfd_mach_avr25},
110 {"attiny2313a",AVR_ISA_AVR25, bfd_mach_avr25},
111 {"attiny24", AVR_ISA_AVR25, bfd_mach_avr25},
112 {"attiny24a", AVR_ISA_AVR25, bfd_mach_avr25},
113 {"attiny4313", AVR_ISA_AVR25, bfd_mach_avr25},
114 {"attiny44", AVR_ISA_AVR25, bfd_mach_avr25},
115 {"attiny44a", AVR_ISA_AVR25, bfd_mach_avr25},
116 {"attiny84", AVR_ISA_AVR25, bfd_mach_avr25},
117 {"attiny84a", AVR_ISA_AVR25, bfd_mach_avr25},
118 {"attiny25", AVR_ISA_AVR25, bfd_mach_avr25},
119 {"attiny45", AVR_ISA_AVR25, bfd_mach_avr25},
120 {"attiny85", AVR_ISA_AVR25, bfd_mach_avr25},
121 {"attiny261", AVR_ISA_AVR25, bfd_mach_avr25},
122 {"attiny261a", AVR_ISA_AVR25, bfd_mach_avr25},
123 {"attiny461", AVR_ISA_AVR25, bfd_mach_avr25},
124 {"attiny461a", AVR_ISA_AVR25, bfd_mach_avr25},
125 {"attiny861", AVR_ISA_AVR25, bfd_mach_avr25},
126 {"attiny861a", AVR_ISA_AVR25, bfd_mach_avr25},
127 {"attiny87", AVR_ISA_AVR25, bfd_mach_avr25},
128 {"attiny43u", AVR_ISA_AVR25, bfd_mach_avr25},
129 {"attiny48", AVR_ISA_AVR25, bfd_mach_avr25},
130 {"attiny88", AVR_ISA_AVR25, bfd_mach_avr25},
131 {"at86rf401", AVR_ISA_RF401, bfd_mach_avr25},
132 {"ata6289", AVR_ISA_AVR25, bfd_mach_avr25},
133 {"at43usb355", AVR_ISA_AVR3, bfd_mach_avr3},
134 {"at76c711", AVR_ISA_AVR3, bfd_mach_avr3},
135 {"atmega103", AVR_ISA_AVR31, bfd_mach_avr31},
136 {"at43usb320", AVR_ISA_AVR31, bfd_mach_avr31},
137 {"attiny167", AVR_ISA_AVR35, bfd_mach_avr35},
138 {"at90usb82", AVR_ISA_AVR35, bfd_mach_avr35},
139 {"at90usb162", AVR_ISA_AVR35, bfd_mach_avr35},
140 {"atmega8u2", AVR_ISA_AVR35, bfd_mach_avr35},
141 {"atmega16u2", AVR_ISA_AVR35, bfd_mach_avr35},
142 {"atmega32u2", AVR_ISA_AVR35, bfd_mach_avr35},
143 {"atmega8", AVR_ISA_M8, bfd_mach_avr4},
144 {"atmega48", AVR_ISA_AVR4, bfd_mach_avr4},
145 {"atmega48a", AVR_ISA_AVR4, bfd_mach_avr4},
146 {"atmega48p", AVR_ISA_AVR4, bfd_mach_avr4},
147 {"atmega88", AVR_ISA_AVR4, bfd_mach_avr4},
148 {"atmega88a", AVR_ISA_AVR4, bfd_mach_avr4},
149 {"atmega88p", AVR_ISA_AVR4, bfd_mach_avr4},
150 {"atmega88pa", AVR_ISA_AVR4, bfd_mach_avr4},
151 {"atmega8515", AVR_ISA_M8, bfd_mach_avr4},
152 {"atmega8535", AVR_ISA_M8, bfd_mach_avr4},
153 {"atmega8hva", AVR_ISA_AVR4, bfd_mach_avr4},
154 {"at90pwm1", AVR_ISA_AVR4, bfd_mach_avr4},
155 {"at90pwm2", AVR_ISA_AVR4, bfd_mach_avr4},
156 {"at90pwm2b", AVR_ISA_AVR4, bfd_mach_avr4},
157 {"at90pwm3", AVR_ISA_AVR4, bfd_mach_avr4},
158 {"at90pwm3b", AVR_ISA_AVR4, bfd_mach_avr4},
159 {"at90pwm81", AVR_ISA_AVR4, bfd_mach_avr4},
160 {"atmega16", AVR_ISA_AVR5, bfd_mach_avr5},
161 {"atmega16a", AVR_ISA_AVR5, bfd_mach_avr5},
162 {"atmega161", AVR_ISA_M161, bfd_mach_avr5},
163 {"atmega162", AVR_ISA_AVR5, bfd_mach_avr5},
164 {"atmega163", AVR_ISA_M161, bfd_mach_avr5},
165 {"atmega164a", AVR_ISA_AVR5, bfd_mach_avr5},
166 {"atmega164p", AVR_ISA_AVR5, bfd_mach_avr5},
167 {"atmega165", AVR_ISA_AVR5, bfd_mach_avr5},
168 {"atmega165a", AVR_ISA_AVR5, bfd_mach_avr5},
169 {"atmega165p", AVR_ISA_AVR5, bfd_mach_avr5},
170 {"atmega168", AVR_ISA_AVR5, bfd_mach_avr5},
171 {"atmega168a", AVR_ISA_AVR5, bfd_mach_avr5},
172 {"atmega168p", AVR_ISA_AVR5, bfd_mach_avr5},
173 {"atmega169", AVR_ISA_AVR5, bfd_mach_avr5},
174 {"atmega169a", AVR_ISA_AVR5, bfd_mach_avr5},
175 {"atmega169p", AVR_ISA_AVR5, bfd_mach_avr5},
176 {"atmega169pa",AVR_ISA_AVR5, bfd_mach_avr5},
177 {"atmega32", AVR_ISA_AVR5, bfd_mach_avr5},
178 {"atmega323", AVR_ISA_AVR5, bfd_mach_avr5},
179 {"atmega324a", AVR_ISA_AVR5, bfd_mach_avr5},
180 {"atmega324p", AVR_ISA_AVR5, bfd_mach_avr5},
181 {"atmega324pa",AVR_ISA_AVR5, bfd_mach_avr5},
182 {"atmega325", AVR_ISA_AVR5, bfd_mach_avr5},
183 {"atmega325a", AVR_ISA_AVR5, bfd_mach_avr5},
184 {"atmega325p", AVR_ISA_AVR5, bfd_mach_avr5},
185 {"atmega3250", AVR_ISA_AVR5, bfd_mach_avr5},
186 {"atmega3250a",AVR_ISA_AVR5, bfd_mach_avr5},
187 {"atmega3250p",AVR_ISA_AVR5, bfd_mach_avr5},
188 {"atmega328", AVR_ISA_AVR5, bfd_mach_avr5},
189 {"atmega328p", AVR_ISA_AVR5, bfd_mach_avr5},
190 {"atmega329", AVR_ISA_AVR5, bfd_mach_avr5},
191 {"atmega329a", AVR_ISA_AVR5, bfd_mach_avr5},
192 {"atmega329p", AVR_ISA_AVR5, bfd_mach_avr5},
193 {"atmega329pa",AVR_ISA_AVR5, bfd_mach_avr5},
194 {"atmega3290", AVR_ISA_AVR5, bfd_mach_avr5},
195 {"atmega3290a",AVR_ISA_AVR5, bfd_mach_avr5},
196 {"atmega3290p",AVR_ISA_AVR5, bfd_mach_avr5},
197 {"atmega406", AVR_ISA_AVR5, bfd_mach_avr5},
198 {"atmega64", AVR_ISA_AVR5, bfd_mach_avr5},
199 {"atmega640", AVR_ISA_AVR5, bfd_mach_avr5},
200 {"atmega644", AVR_ISA_AVR5, bfd_mach_avr5},
201 {"atmega644a", AVR_ISA_AVR5, bfd_mach_avr5},
202 {"atmega644p", AVR_ISA_AVR5, bfd_mach_avr5},
203 {"atmega644pa",AVR_ISA_AVR5, bfd_mach_avr5},
204 {"atmega645", AVR_ISA_AVR5, bfd_mach_avr5},
205 {"atmega645a", AVR_ISA_AVR5, bfd_mach_avr5},
206 {"atmega645p", AVR_ISA_AVR5, bfd_mach_avr5},
207 {"atmega649", AVR_ISA_AVR5, bfd_mach_avr5},
208 {"atmega649a", AVR_ISA_AVR5, bfd_mach_avr5},
209 {"atmega649p", AVR_ISA_AVR5, bfd_mach_avr5},
210 {"atmega6450", AVR_ISA_AVR5, bfd_mach_avr5},
211 {"atmega6450a",AVR_ISA_AVR5, bfd_mach_avr5},
212 {"atmega6450p",AVR_ISA_AVR5, bfd_mach_avr5},
213 {"atmega6490", AVR_ISA_AVR5, bfd_mach_avr5},
214 {"atmega6490a",AVR_ISA_AVR5, bfd_mach_avr5},
215 {"atmega6490p",AVR_ISA_AVR5, bfd_mach_avr5},
216 {"atmega16hva",AVR_ISA_AVR5, bfd_mach_avr5},
217 {"atmega16hva2",AVR_ISA_AVR5, bfd_mach_avr5},
218 {"atmega16hvb",AVR_ISA_AVR5, bfd_mach_avr5},
219 {"atmega32hvb",AVR_ISA_AVR5, bfd_mach_avr5},
220 {"atmega64hve",AVR_ISA_AVR5, bfd_mach_avr5},
221 {"at90can32" , AVR_ISA_AVR5, bfd_mach_avr5},
222 {"at90can64" , AVR_ISA_AVR5, bfd_mach_avr5},
223 {"at90pwm216", AVR_ISA_AVR5, bfd_mach_avr5},
224 {"at90pwm316", AVR_ISA_AVR5, bfd_mach_avr5},
225 {"atmega32c1", AVR_ISA_AVR5, bfd_mach_avr5},
226 {"atmega64c1", AVR_ISA_AVR5, bfd_mach_avr5},
227 {"atmega16m1", AVR_ISA_AVR5, bfd_mach_avr5},
228 {"atmega32m1", AVR_ISA_AVR5, bfd_mach_avr5},
229 {"atmega64m1", AVR_ISA_AVR5, bfd_mach_avr5},
230 {"atmega16u4", AVR_ISA_AVR5, bfd_mach_avr5},
231 {"atmega32u4", AVR_ISA_AVR5, bfd_mach_avr5},
232 {"atmega32u6", AVR_ISA_AVR5, bfd_mach_avr5},
233 {"at90usb646", AVR_ISA_AVR5, bfd_mach_avr5},
234 {"at90usb647", AVR_ISA_AVR5, bfd_mach_avr5},
235 {"at90scr100", AVR_ISA_AVR5, bfd_mach_avr5},
236 {"at94k", AVR_ISA_94K, bfd_mach_avr5},
237 {"m3000", AVR_ISA_AVR5, bfd_mach_avr5},
238 {"atmega128", AVR_ISA_AVR51, bfd_mach_avr51},
239 {"atmega1280", AVR_ISA_AVR51, bfd_mach_avr51},
240 {"atmega1281", AVR_ISA_AVR51, bfd_mach_avr51},
241 {"atmega1284p",AVR_ISA_AVR51, bfd_mach_avr51},
242 {"atmega128rfa1",AVR_ISA_AVR51, bfd_mach_avr51},
243 {"at90can128", AVR_ISA_AVR51, bfd_mach_avr51},
244 {"at90usb1286",AVR_ISA_AVR51, bfd_mach_avr51},
245 {"at90usb1287",AVR_ISA_AVR51, bfd_mach_avr51},
246 {"atmega2560", AVR_ISA_AVR6, bfd_mach_avr6},
247 {"atmega2561", AVR_ISA_AVR6, bfd_mach_avr6},
248 {"atxmega16a4", AVR_ISA_XMEGA, bfd_mach_avrxmega2},
249 {"atxmega16d4", AVR_ISA_XMEGA, bfd_mach_avrxmega2},
250 {"atxmega32a4", AVR_ISA_XMEGA, bfd_mach_avrxmega2},
251 {"atxmega32d4", AVR_ISA_XMEGA, bfd_mach_avrxmega2},
252 {"atxmega64a3", AVR_ISA_XMEGA, bfd_mach_avrxmega4},
253 {"atxmega64d3", AVR_ISA_XMEGA, bfd_mach_avrxmega4},
254 {"atxmega64a1", AVR_ISA_XMEGA, bfd_mach_avrxmega5},
255 {"atxmega128a3", AVR_ISA_XMEGA, bfd_mach_avrxmega6},
256 {"atxmega128d3", AVR_ISA_XMEGA, bfd_mach_avrxmega6},
257 {"atxmega192a3", AVR_ISA_XMEGA, bfd_mach_avrxmega6},
258 {"atxmega192d3", AVR_ISA_XMEGA, bfd_mach_avrxmega6},
259 {"atxmega256a3", AVR_ISA_XMEGA, bfd_mach_avrxmega6},
260 {"atxmega256a3b",AVR_ISA_XMEGA, bfd_mach_avrxmega6},
261 {"atxmega256d3", AVR_ISA_XMEGA, bfd_mach_avrxmega6},
262 {"atxmega128a1", AVR_ISA_XMEGA, bfd_mach_avrxmega7},
263 {NULL, 0, 0}
264 };
265
266 /* Current MCU type. */
267 static struct mcu_type_s default_mcu = {"avr2", AVR_ISA_AVR2, bfd_mach_avr2};
268 static struct mcu_type_s * avr_mcu = & default_mcu;
269
270 /* AVR target-specific switches. */
271 struct avr_opt_s
272 {
273 int all_opcodes; /* -mall-opcodes: accept all known AVR opcodes. */
274 int no_skip_bug; /* -mno-skip-bug: no warnings for skipping 2-word insns. */
275 int no_wrap; /* -mno-wrap: reject rjmp/rcall with 8K wrap-around. */
276 };
277
278 static struct avr_opt_s avr_opt = { 0, 0, 0 };
279
280 const char EXP_CHARS[] = "eE";
281 const char FLT_CHARS[] = "dD";
282
283 static void avr_set_arch (int);
284
285 /* The target specific pseudo-ops which we support. */
286 const pseudo_typeS md_pseudo_table[] =
287 {
288 {"arch", avr_set_arch, 0},
289 { NULL, NULL, 0}
290 };
291
292 #define LDI_IMMEDIATE(x) (((x) & 0xf) | (((x) << 4) & 0xf00))
293
294 #define EXP_MOD_NAME(i) exp_mod[i].name
295 #define EXP_MOD_RELOC(i) exp_mod[i].reloc
296 #define EXP_MOD_NEG_RELOC(i) exp_mod[i].neg_reloc
297 #define HAVE_PM_P(i) exp_mod[i].have_pm
298
299 struct exp_mod_s
300 {
301 char * name;
302 bfd_reloc_code_real_type reloc;
303 bfd_reloc_code_real_type neg_reloc;
304 int have_pm;
305 };
306
307 static struct exp_mod_s exp_mod[] =
308 {
309 {"hh8", BFD_RELOC_AVR_HH8_LDI, BFD_RELOC_AVR_HH8_LDI_NEG, 1},
310 {"pm_hh8", BFD_RELOC_AVR_HH8_LDI_PM, BFD_RELOC_AVR_HH8_LDI_PM_NEG, 0},
311 {"hi8", BFD_RELOC_AVR_HI8_LDI, BFD_RELOC_AVR_HI8_LDI_NEG, 1},
312 {"pm_hi8", BFD_RELOC_AVR_HI8_LDI_PM, BFD_RELOC_AVR_HI8_LDI_PM_NEG, 0},
313 {"lo8", BFD_RELOC_AVR_LO8_LDI, BFD_RELOC_AVR_LO8_LDI_NEG, 1},
314 {"pm_lo8", BFD_RELOC_AVR_LO8_LDI_PM, BFD_RELOC_AVR_LO8_LDI_PM_NEG, 0},
315 {"hlo8", BFD_RELOC_AVR_HH8_LDI, BFD_RELOC_AVR_HH8_LDI_NEG, 0},
316 {"hhi8", BFD_RELOC_AVR_MS8_LDI, BFD_RELOC_AVR_MS8_LDI_NEG, 0},
317 };
318
319 /* A union used to store indicies into the exp_mod[] array
320 in a hash table which expects void * data types. */
321 typedef union
322 {
323 void * ptr;
324 int index;
325 } mod_index;
326
327 /* Opcode hash table. */
328 static struct hash_control *avr_hash;
329
330 /* Reloc modifiers hash control (hh8,hi8,lo8,pm_xx). */
331 static struct hash_control *avr_mod_hash;
332
333 #define OPTION_MMCU 'm'
334 enum options
335 {
336 OPTION_ALL_OPCODES = OPTION_MD_BASE + 1,
337 OPTION_NO_SKIP_BUG,
338 OPTION_NO_WRAP
339 };
340
341 struct option md_longopts[] =
342 {
343 { "mmcu", required_argument, NULL, OPTION_MMCU },
344 { "mall-opcodes", no_argument, NULL, OPTION_ALL_OPCODES },
345 { "mno-skip-bug", no_argument, NULL, OPTION_NO_SKIP_BUG },
346 { "mno-wrap", no_argument, NULL, OPTION_NO_WRAP },
347 { NULL, no_argument, NULL, 0 }
348 };
349
350 size_t md_longopts_size = sizeof (md_longopts);
351
352 /* Display nicely formatted list of known MCU names. */
353
354 static void
355 show_mcu_list (FILE *stream)
356 {
357 int i, x;
358
359 fprintf (stream, _("Known MCU names:"));
360 x = 1000;
361
362 for (i = 0; mcu_types[i].name; i++)
363 {
364 int len = strlen (mcu_types[i].name);
365
366 x += len + 1;
367
368 if (x < 75)
369 fprintf (stream, " %s", mcu_types[i].name);
370 else
371 {
372 fprintf (stream, "\n %s", mcu_types[i].name);
373 x = len + 2;
374 }
375 }
376
377 fprintf (stream, "\n");
378 }
379
380 static inline char *
381 skip_space (char *s)
382 {
383 while (*s == ' ' || *s == '\t')
384 ++s;
385 return s;
386 }
387
388 /* Extract one word from FROM and copy it to TO. */
389
390 static char *
391 extract_word (char *from, char *to, int limit)
392 {
393 char *op_end;
394 int size = 0;
395
396 /* Drop leading whitespace. */
397 from = skip_space (from);
398 *to = 0;
399
400 /* Find the op code end. */
401 for (op_end = from; *op_end != 0 && is_part_of_name (*op_end);)
402 {
403 to[size++] = *op_end++;
404 if (size + 1 >= limit)
405 break;
406 }
407
408 to[size] = 0;
409 return op_end;
410 }
411
412 int
413 md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED,
414 asection *seg ATTRIBUTE_UNUSED)
415 {
416 abort ();
417 return 0;
418 }
419
420 void
421 md_show_usage (FILE *stream)
422 {
423 fprintf (stream,
424 _("AVR Assembler options:\n"
425 " -mmcu=[avr-name] select microcontroller variant\n"
426 " [avr-name] can be:\n"
427 " avr1 - classic AVR core without data RAM\n"
428 " avr2 - classic AVR core with up to 8K program memory\n"
429 " avr25 - classic AVR core with up to 8K program memory\n"
430 " plus the MOVW instruction\n"
431 " avr3 - classic AVR core with up to 64K program memory\n"
432 " avr31 - classic AVR core with up to 128K program memory\n"
433 " avr35 - classic AVR core with up to 64K program memory\n"
434 " plus the MOVW instruction\n"
435 " avr4 - enhanced AVR core with up to 8K program memory\n"
436 " avr5 - enhanced AVR core with up to 64K program memory\n"
437 " avr51 - enhanced AVR core with up to 128K program memory\n"
438 " avr6 - enhanced AVR core with up to 256K program memory\n"
439 " avrxmega3 - XMEGA, > 8K, <= 64K FLASH, > 64K RAM\n"
440 " avrxmega4 - XMEGA, > 64K, <= 128K FLASH, <= 64K RAM\n"
441 " avrxmega5 - XMEGA, > 64K, <= 128K FLASH, > 64K RAM\n"
442 " avrxmega6 - XMEGA, > 128K, <= 256K FLASH, <= 64K RAM\n"
443 " avrxmega7 - XMEGA, > 128K, <= 256K FLASH, > 64K RAM\n"
444 " or immediate microcontroller name.\n"));
445 fprintf (stream,
446 _(" -mall-opcodes accept all AVR opcodes, even if not supported by MCU\n"
447 " -mno-skip-bug disable warnings for skipping two-word instructions\n"
448 " (default for avr4, avr5)\n"
449 " -mno-wrap reject rjmp/rcall instructions with 8K wrap-around\n"
450 " (default for avr3, avr5)\n"));
451 show_mcu_list (stream);
452 }
453
454 static void
455 avr_set_arch (int dummy ATTRIBUTE_UNUSED)
456 {
457 char str[20];
458
459 input_line_pointer = extract_word (input_line_pointer, str, 20);
460 md_parse_option (OPTION_MMCU, str);
461 bfd_set_arch_mach (stdoutput, TARGET_ARCH, avr_mcu->mach);
462 }
463
464 int
465 md_parse_option (int c, char *arg)
466 {
467 switch (c)
468 {
469 case OPTION_MMCU:
470 {
471 int i;
472 char *s = alloca (strlen (arg) + 1);
473
474 {
475 char *t = s;
476 char *arg1 = arg;
477
478 do
479 *t = TOLOWER (*arg1++);
480 while (*t++);
481 }
482
483 for (i = 0; mcu_types[i].name; ++i)
484 if (strcmp (mcu_types[i].name, s) == 0)
485 break;
486
487 if (!mcu_types[i].name)
488 {
489 show_mcu_list (stderr);
490 as_fatal (_("unknown MCU: %s\n"), arg);
491 }
492
493 /* It is OK to redefine mcu type within the same avr[1-5] bfd machine
494 type - this for allows passing -mmcu=... via gcc ASM_SPEC as well
495 as .arch ... in the asm output at the same time. */
496 if (avr_mcu == &default_mcu || avr_mcu->mach == mcu_types[i].mach)
497 avr_mcu = &mcu_types[i];
498 else
499 as_fatal (_("redefinition of mcu type `%s' to `%s'"),
500 avr_mcu->name, mcu_types[i].name);
501 return 1;
502 }
503 case OPTION_ALL_OPCODES:
504 avr_opt.all_opcodes = 1;
505 return 1;
506 case OPTION_NO_SKIP_BUG:
507 avr_opt.no_skip_bug = 1;
508 return 1;
509 case OPTION_NO_WRAP:
510 avr_opt.no_wrap = 1;
511 return 1;
512 }
513
514 return 0;
515 }
516
517 symbolS *
518 md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
519 {
520 return NULL;
521 }
522
523 char *
524 md_atof (int type, char *litP, int *sizeP)
525 {
526 return ieee_md_atof (type, litP, sizeP, FALSE);
527 }
528
529 void
530 md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED,
531 asection *sec ATTRIBUTE_UNUSED,
532 fragS *fragP ATTRIBUTE_UNUSED)
533 {
534 abort ();
535 }
536
537 void
538 md_begin (void)
539 {
540 unsigned int i;
541 struct avr_opcodes_s *opcode;
542
543 avr_hash = hash_new ();
544
545 /* Insert unique names into hash table. This hash table then provides a
546 quick index to the first opcode with a particular name in the opcode
547 table. */
548 for (opcode = avr_opcodes; opcode->name; opcode++)
549 hash_insert (avr_hash, opcode->name, (char *) opcode);
550
551 avr_mod_hash = hash_new ();
552
553 for (i = 0; i < ARRAY_SIZE (exp_mod); ++i)
554 {
555 mod_index m;
556
557 m.index = i + 10;
558 hash_insert (avr_mod_hash, EXP_MOD_NAME (i), m.ptr);
559 }
560
561 bfd_set_arch_mach (stdoutput, TARGET_ARCH, avr_mcu->mach);
562 }
563
564 /* Resolve STR as a constant expression and return the result.
565 If result greater than MAX then error. */
566
567 static unsigned int
568 avr_get_constant (char *str, int max)
569 {
570 expressionS ex;
571
572 str = skip_space (str);
573 input_line_pointer = str;
574 expression (& ex);
575
576 if (ex.X_op != O_constant)
577 as_bad (_("constant value required"));
578
579 if (ex.X_add_number > max || ex.X_add_number < 0)
580 as_bad (_("number must be positive and less than %d"), max + 1);
581
582 return ex.X_add_number;
583 }
584
585 /* Parse for ldd/std offset. */
586
587 static void
588 avr_offset_expression (expressionS *exp)
589 {
590 char *str = input_line_pointer;
591 char *tmp;
592 char op[8];
593
594 tmp = str;
595 str = extract_word (str, op, sizeof (op));
596
597 input_line_pointer = tmp;
598 expression (exp);
599
600 /* Warn about expressions that fail to use lo8 (). */
601 if (exp->X_op == O_constant)
602 {
603 int x = exp->X_add_number;
604
605 if (x < -255 || x > 255)
606 as_warn (_("constant out of 8-bit range: %d"), x);
607 }
608 }
609
610 /* Parse ordinary expression. */
611
612 static char *
613 parse_exp (char *s, expressionS *op)
614 {
615 input_line_pointer = s;
616 expression (op);
617 if (op->X_op == O_absent)
618 as_bad (_("missing operand"));
619 return input_line_pointer;
620 }
621
622 /* Parse special expressions (needed for LDI command):
623 xx8 (address)
624 xx8 (-address)
625 pm_xx8 (address)
626 pm_xx8 (-address)
627 where xx is: hh, hi, lo. */
628
629 static bfd_reloc_code_real_type
630 avr_ldi_expression (expressionS *exp)
631 {
632 char *str = input_line_pointer;
633 char *tmp;
634 char op[8];
635 int mod;
636 int linker_stubs_should_be_generated = 0;
637
638 tmp = str;
639
640 str = extract_word (str, op, sizeof (op));
641
642 if (op[0])
643 {
644 mod_index m;
645
646 m.ptr = hash_find (avr_mod_hash, op);
647 mod = m.index;
648
649 if (mod)
650 {
651 int closes = 0;
652
653 mod -= 10;
654 str = skip_space (str);
655
656 if (*str == '(')
657 {
658 bfd_reloc_code_real_type reloc_to_return;
659 int neg_p = 0;
660
661 ++str;
662
663 if (strncmp ("pm(", str, 3) == 0
664 || strncmp ("gs(",str,3) == 0
665 || strncmp ("-(gs(",str,5) == 0
666 || strncmp ("-(pm(", str, 5) == 0)
667 {
668 if (HAVE_PM_P (mod))
669 {
670 ++mod;
671 ++closes;
672 }
673 else
674 as_bad (_("illegal expression"));
675
676 if (str[0] == 'g' || str[2] == 'g')
677 linker_stubs_should_be_generated = 1;
678
679 if (*str == '-')
680 {
681 neg_p = 1;
682 ++closes;
683 str += 5;
684 }
685 else
686 str += 3;
687 }
688
689 if (*str == '-' && *(str + 1) == '(')
690 {
691 neg_p ^= 1;
692 ++closes;
693 str += 2;
694 }
695
696 input_line_pointer = str;
697 expression (exp);
698
699 do
700 {
701 if (*input_line_pointer != ')')
702 {
703 as_bad (_("`)' required"));
704 break;
705 }
706 input_line_pointer++;
707 }
708 while (closes--);
709
710 reloc_to_return =
711 neg_p ? EXP_MOD_NEG_RELOC (mod) : EXP_MOD_RELOC (mod);
712 if (linker_stubs_should_be_generated)
713 {
714 switch (reloc_to_return)
715 {
716 case BFD_RELOC_AVR_LO8_LDI_PM:
717 reloc_to_return = BFD_RELOC_AVR_LO8_LDI_GS;
718 break;
719 case BFD_RELOC_AVR_HI8_LDI_PM:
720 reloc_to_return = BFD_RELOC_AVR_HI8_LDI_GS;
721 break;
722
723 default:
724 /* PR 5523: Do not generate a warning here,
725 legitimate code can trigger this case. */
726 break;
727 }
728 }
729 return reloc_to_return;
730 }
731 }
732 }
733
734 input_line_pointer = tmp;
735 expression (exp);
736
737 /* Warn about expressions that fail to use lo8 (). */
738 if (exp->X_op == O_constant)
739 {
740 int x = exp->X_add_number;
741
742 if (x < -255 || x > 255)
743 as_warn (_("constant out of 8-bit range: %d"), x);
744 }
745
746 return BFD_RELOC_AVR_LDI;
747 }
748
749 /* Parse one instruction operand.
750 Return operand bitmask. Also fixups can be generated. */
751
752 static unsigned int
753 avr_operand (struct avr_opcodes_s *opcode,
754 int where,
755 char *op,
756 char **line)
757 {
758 expressionS op_expr;
759 unsigned int op_mask = 0;
760 char *str = skip_space (*line);
761
762 switch (*op)
763 {
764 /* Any register operand. */
765 case 'w':
766 case 'd':
767 case 'r':
768 case 'a':
769 case 'v':
770 if (*str == 'r' || *str == 'R')
771 {
772 char r_name[20];
773
774 str = extract_word (str, r_name, sizeof (r_name));
775 op_mask = 0xff;
776 if (ISDIGIT (r_name[1]))
777 {
778 if (r_name[2] == '\0')
779 op_mask = r_name[1] - '0';
780 else if (r_name[1] != '0'
781 && ISDIGIT (r_name[2])
782 && r_name[3] == '\0')
783 op_mask = (r_name[1] - '0') * 10 + r_name[2] - '0';
784 }
785 }
786 else
787 {
788 op_mask = avr_get_constant (str, 31);
789 str = input_line_pointer;
790 }
791
792 if (op_mask <= 31)
793 {
794 switch (*op)
795 {
796 case 'a':
797 if (op_mask < 16 || op_mask > 23)
798 as_bad (_("register r16-r23 required"));
799 op_mask -= 16;
800 break;
801
802 case 'd':
803 if (op_mask < 16)
804 as_bad (_("register number above 15 required"));
805 op_mask -= 16;
806 break;
807
808 case 'v':
809 if (op_mask & 1)
810 as_bad (_("even register number required"));
811 op_mask >>= 1;
812 break;
813
814 case 'w':
815 if ((op_mask & 1) || op_mask < 24)
816 as_bad (_("register r24, r26, r28 or r30 required"));
817 op_mask = (op_mask - 24) >> 1;
818 break;
819 }
820 break;
821 }
822 as_bad (_("register name or number from 0 to 31 required"));
823 break;
824
825 case 'e':
826 {
827 char c;
828
829 if (*str == '-')
830 {
831 str = skip_space (str + 1);
832 op_mask = 0x1002;
833 }
834 c = TOLOWER (*str);
835 if (c == 'x')
836 op_mask |= 0x100c;
837 else if (c == 'y')
838 op_mask |= 0x8;
839 else if (c != 'z')
840 as_bad (_("pointer register (X, Y or Z) required"));
841
842 str = skip_space (str + 1);
843 if (*str == '+')
844 {
845 ++str;
846 if (op_mask & 2)
847 as_bad (_("cannot both predecrement and postincrement"));
848 op_mask |= 0x1001;
849 }
850
851 /* avr1 can do "ld r,Z" and "st Z,r" but no other pointer
852 registers, no predecrement, no postincrement. */
853 if (!avr_opt.all_opcodes && (op_mask & 0x100F)
854 && !(avr_mcu->isa & AVR_ISA_SRAM))
855 as_bad (_("addressing mode not supported"));
856 }
857 break;
858
859 case 'z':
860 if (*str == '-')
861 as_bad (_("can't predecrement"));
862
863 if (! (*str == 'z' || *str == 'Z'))
864 as_bad (_("pointer register Z required"));
865
866 str = skip_space (str + 1);
867
868 if (*str == '+')
869 {
870 ++str;
871 char *s;
872 for (s = opcode->opcode; *s; ++s)
873 {
874 if (*s == '+')
875 op_mask |= (1 << (15 - (s - opcode->opcode)));
876 }
877 }
878
879 /* attiny26 can do "lpm" and "lpm r,Z" but not "lpm r,Z+". */
880 if (!avr_opt.all_opcodes
881 && (op_mask & 0x0001)
882 && !(avr_mcu->isa & AVR_ISA_MOVW))
883 as_bad (_("postincrement not supported"));
884 break;
885
886 case 'b':
887 {
888 char c = TOLOWER (*str++);
889
890 if (c == 'y')
891 op_mask |= 0x8;
892 else if (c != 'z')
893 as_bad (_("pointer register (Y or Z) required"));
894 str = skip_space (str);
895 if (*str++ == '+')
896 {
897 input_line_pointer = str;
898 avr_offset_expression (& op_expr);
899 str = input_line_pointer;
900 fix_new_exp (frag_now, where, 3,
901 &op_expr, FALSE, BFD_RELOC_AVR_6);
902 }
903 }
904 break;
905
906 case 'h':
907 str = parse_exp (str, &op_expr);
908 fix_new_exp (frag_now, where, opcode->insn_size * 2,
909 &op_expr, FALSE, BFD_RELOC_AVR_CALL);
910 break;
911
912 case 'L':
913 str = parse_exp (str, &op_expr);
914 fix_new_exp (frag_now, where, opcode->insn_size * 2,
915 &op_expr, TRUE, BFD_RELOC_AVR_13_PCREL);
916 break;
917
918 case 'l':
919 str = parse_exp (str, &op_expr);
920 fix_new_exp (frag_now, where, opcode->insn_size * 2,
921 &op_expr, TRUE, BFD_RELOC_AVR_7_PCREL);
922 break;
923
924 case 'i':
925 str = parse_exp (str, &op_expr);
926 fix_new_exp (frag_now, where + 2, opcode->insn_size * 2,
927 &op_expr, FALSE, BFD_RELOC_16);
928 break;
929
930 case 'M':
931 {
932 bfd_reloc_code_real_type r_type;
933
934 input_line_pointer = str;
935 r_type = avr_ldi_expression (&op_expr);
936 str = input_line_pointer;
937 fix_new_exp (frag_now, where, 3,
938 &op_expr, FALSE, r_type);
939 }
940 break;
941
942 case 'n':
943 {
944 unsigned int x;
945
946 x = ~avr_get_constant (str, 255);
947 str = input_line_pointer;
948 op_mask |= (x & 0xf) | ((x << 4) & 0xf00);
949 }
950 break;
951
952 case 'K':
953 input_line_pointer = str;
954 avr_offset_expression (& op_expr);
955 str = input_line_pointer;
956 fix_new_exp (frag_now, where, 3,
957 & op_expr, FALSE, BFD_RELOC_AVR_6_ADIW);
958 break;
959
960 case 'S':
961 case 's':
962 {
963 unsigned int x;
964
965 x = avr_get_constant (str, 7);
966 str = input_line_pointer;
967 if (*op == 'S')
968 x <<= 4;
969 op_mask |= x;
970 }
971 break;
972
973 case 'P':
974 {
975 unsigned int x;
976
977 x = avr_get_constant (str, 63);
978 str = input_line_pointer;
979 op_mask |= (x & 0xf) | ((x & 0x30) << 5);
980 }
981 break;
982
983 case 'p':
984 {
985 unsigned int x;
986
987 x = avr_get_constant (str, 31);
988 str = input_line_pointer;
989 op_mask |= x << 3;
990 }
991 break;
992
993 case 'E':
994 {
995 unsigned int x;
996
997 x = avr_get_constant (str, 15);
998 str = input_line_pointer;
999 op_mask |= (x << 4);
1000 }
1001 break;
1002
1003 case '?':
1004 break;
1005
1006 default:
1007 as_bad (_("unknown constraint `%c'"), *op);
1008 }
1009
1010 *line = str;
1011 return op_mask;
1012 }
1013
1014 /* Parse instruction operands.
1015 Return binary opcode. */
1016
1017 static unsigned int
1018 avr_operands (struct avr_opcodes_s *opcode, char **line)
1019 {
1020 char *op = opcode->constraints;
1021 unsigned int bin = opcode->bin_opcode;
1022 char *frag = frag_more (opcode->insn_size * 2);
1023 char *str = *line;
1024 int where = frag - frag_now->fr_literal;
1025 static unsigned int prev = 0; /* Previous opcode. */
1026
1027 /* Opcode have operands. */
1028 if (*op)
1029 {
1030 unsigned int reg1 = 0;
1031 unsigned int reg2 = 0;
1032 int reg1_present = 0;
1033 int reg2_present = 0;
1034
1035 /* Parse first operand. */
1036 if (REGISTER_P (*op))
1037 reg1_present = 1;
1038 reg1 = avr_operand (opcode, where, op, &str);
1039 ++op;
1040
1041 /* Parse second operand. */
1042 if (*op)
1043 {
1044 if (*op == ',')
1045 ++op;
1046
1047 if (*op == '=')
1048 {
1049 reg2 = reg1;
1050 reg2_present = 1;
1051 }
1052 else
1053 {
1054 if (REGISTER_P (*op))
1055 reg2_present = 1;
1056
1057 str = skip_space (str);
1058 if (*str++ != ',')
1059 as_bad (_("`,' required"));
1060 str = skip_space (str);
1061
1062 reg2 = avr_operand (opcode, where, op, &str);
1063 }
1064
1065 if (reg1_present && reg2_present)
1066 reg2 = (reg2 & 0xf) | ((reg2 << 5) & 0x200);
1067 else if (reg2_present)
1068 reg2 <<= 4;
1069 }
1070 if (reg1_present)
1071 reg1 <<= 4;
1072 bin |= reg1 | reg2;
1073 }
1074
1075 /* Detect undefined combinations (like ld r31,Z+). */
1076 if (!avr_opt.all_opcodes && AVR_UNDEF_P (bin))
1077 as_warn (_("undefined combination of operands"));
1078
1079 if (opcode->insn_size == 2)
1080 {
1081 /* Warn if the previous opcode was cpse/sbic/sbis/sbrc/sbrs
1082 (AVR core bug, fixed in the newer devices). */
1083 if (!(avr_opt.no_skip_bug ||
1084 (avr_mcu->isa & (AVR_ISA_MUL | AVR_ISA_MOVW)))
1085 && AVR_SKIP_P (prev))
1086 as_warn (_("skipping two-word instruction"));
1087
1088 bfd_putl32 ((bfd_vma) bin, frag);
1089 }
1090 else
1091 bfd_putl16 ((bfd_vma) bin, frag);
1092
1093 prev = bin;
1094 *line = str;
1095 return bin;
1096 }
1097
1098 /* GAS will call this function for each section at the end of the assembly,
1099 to permit the CPU backend to adjust the alignment of a section. */
1100
1101 valueT
1102 md_section_align (asection *seg, valueT addr)
1103 {
1104 int align = bfd_get_section_alignment (stdoutput, seg);
1105 return ((addr + (1 << align) - 1) & (-1 << align));
1106 }
1107
1108 /* If you define this macro, it should return the offset between the
1109 address of a PC relative fixup and the position from which the PC
1110 relative adjustment should be made. On many processors, the base
1111 of a PC relative instruction is the next instruction, so this
1112 macro would return the length of an instruction. */
1113
1114 long
1115 md_pcrel_from_section (fixS *fixp, segT sec)
1116 {
1117 if (fixp->fx_addsy != (symbolS *) NULL
1118 && (!S_IS_DEFINED (fixp->fx_addsy)
1119 || (S_GET_SEGMENT (fixp->fx_addsy) != sec)))
1120 return 0;
1121
1122 return fixp->fx_frag->fr_address + fixp->fx_where;
1123 }
1124
1125 /* GAS will call this for each fixup. It should store the correct
1126 value in the object file. */
1127
1128 void
1129 md_apply_fix (fixS *fixP, valueT * valP, segT seg)
1130 {
1131 unsigned char *where;
1132 unsigned long insn;
1133 long value = *valP;
1134
1135 if (fixP->fx_addsy == (symbolS *) NULL)
1136 fixP->fx_done = 1;
1137
1138 else if (fixP->fx_pcrel)
1139 {
1140 segT s = S_GET_SEGMENT (fixP->fx_addsy);
1141
1142 if (s == seg || s == absolute_section)
1143 {
1144 value += S_GET_VALUE (fixP->fx_addsy);
1145 fixP->fx_done = 1;
1146 }
1147 }
1148
1149 /* We don't actually support subtracting a symbol. */
1150 if (fixP->fx_subsy != (symbolS *) NULL)
1151 as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
1152
1153 switch (fixP->fx_r_type)
1154 {
1155 default:
1156 fixP->fx_no_overflow = 1;
1157 break;
1158 case BFD_RELOC_AVR_7_PCREL:
1159 case BFD_RELOC_AVR_13_PCREL:
1160 case BFD_RELOC_32:
1161 case BFD_RELOC_16:
1162 case BFD_RELOC_AVR_CALL:
1163 break;
1164 }
1165
1166 if (fixP->fx_done)
1167 {
1168 /* Fetch the instruction, insert the fully resolved operand
1169 value, and stuff the instruction back again. */
1170 where = (unsigned char *) fixP->fx_frag->fr_literal + fixP->fx_where;
1171 insn = bfd_getl16 (where);
1172
1173 switch (fixP->fx_r_type)
1174 {
1175 case BFD_RELOC_AVR_7_PCREL:
1176 if (value & 1)
1177 as_bad_where (fixP->fx_file, fixP->fx_line,
1178 _("odd address operand: %ld"), value);
1179
1180 /* Instruction addresses are always right-shifted by 1. */
1181 value >>= 1;
1182 --value; /* Correct PC. */
1183
1184 if (value < -64 || value > 63)
1185 as_bad_where (fixP->fx_file, fixP->fx_line,
1186 _("operand out of range: %ld"), value);
1187 value = (value << 3) & 0x3f8;
1188 bfd_putl16 ((bfd_vma) (value | insn), where);
1189 break;
1190
1191 case BFD_RELOC_AVR_13_PCREL:
1192 if (value & 1)
1193 as_bad_where (fixP->fx_file, fixP->fx_line,
1194 _("odd address operand: %ld"), value);
1195
1196 /* Instruction addresses are always right-shifted by 1. */
1197 value >>= 1;
1198 --value; /* Correct PC. */
1199
1200 if (value < -2048 || value > 2047)
1201 {
1202 /* No wrap for devices with >8K of program memory. */
1203 if ((avr_mcu->isa & AVR_ISA_MEGA) || avr_opt.no_wrap)
1204 as_bad_where (fixP->fx_file, fixP->fx_line,
1205 _("operand out of range: %ld"), value);
1206 }
1207
1208 value &= 0xfff;
1209 bfd_putl16 ((bfd_vma) (value | insn), where);
1210 break;
1211
1212 case BFD_RELOC_32:
1213 bfd_putl16 ((bfd_vma) value, where);
1214 break;
1215
1216 case BFD_RELOC_16:
1217 bfd_putl16 ((bfd_vma) value, where);
1218 break;
1219
1220 case BFD_RELOC_8:
1221 if (value > 255 || value < -128)
1222 as_warn_where (fixP->fx_file, fixP->fx_line,
1223 _("operand out of range: %ld"), value);
1224 *where = value;
1225 break;
1226
1227 case BFD_RELOC_AVR_16_PM:
1228 bfd_putl16 ((bfd_vma) (value >> 1), where);
1229 break;
1230
1231 case BFD_RELOC_AVR_LDI:
1232 if (value > 255)
1233 as_bad_where (fixP->fx_file, fixP->fx_line,
1234 _("operand out of range: %ld"), value);
1235 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value), where);
1236 break;
1237
1238 case BFD_RELOC_AVR_6:
1239 if ((value > 63) || (value < 0))
1240 as_bad_where (fixP->fx_file, fixP->fx_line,
1241 _("operand out of range: %ld"), value);
1242 bfd_putl16 ((bfd_vma) insn | ((value & 7) | ((value & (3 << 3)) << 7) | ((value & (1 << 5)) << 8)), where);
1243 break;
1244
1245 case BFD_RELOC_AVR_6_ADIW:
1246 if ((value > 63) || (value < 0))
1247 as_bad_where (fixP->fx_file, fixP->fx_line,
1248 _("operand out of range: %ld"), value);
1249 bfd_putl16 ((bfd_vma) insn | (value & 0xf) | ((value & 0x30) << 2), where);
1250 break;
1251
1252 case BFD_RELOC_AVR_LO8_LDI:
1253 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value), where);
1254 break;
1255
1256 case BFD_RELOC_AVR_HI8_LDI:
1257 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 8), where);
1258 break;
1259
1260 case BFD_RELOC_AVR_MS8_LDI:
1261 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 24), where);
1262 break;
1263
1264 case BFD_RELOC_AVR_HH8_LDI:
1265 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 16), where);
1266 break;
1267
1268 case BFD_RELOC_AVR_LO8_LDI_NEG:
1269 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value), where);
1270 break;
1271
1272 case BFD_RELOC_AVR_HI8_LDI_NEG:
1273 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 8), where);
1274 break;
1275
1276 case BFD_RELOC_AVR_MS8_LDI_NEG:
1277 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 24), where);
1278 break;
1279
1280 case BFD_RELOC_AVR_HH8_LDI_NEG:
1281 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 16), where);
1282 break;
1283
1284 case BFD_RELOC_AVR_LO8_LDI_PM:
1285 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 1), where);
1286 break;
1287
1288 case BFD_RELOC_AVR_HI8_LDI_PM:
1289 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 9), where);
1290 break;
1291
1292 case BFD_RELOC_AVR_HH8_LDI_PM:
1293 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 17), where);
1294 break;
1295
1296 case BFD_RELOC_AVR_LO8_LDI_PM_NEG:
1297 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 1), where);
1298 break;
1299
1300 case BFD_RELOC_AVR_HI8_LDI_PM_NEG:
1301 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 9), where);
1302 break;
1303
1304 case BFD_RELOC_AVR_HH8_LDI_PM_NEG:
1305 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 17), where);
1306 break;
1307
1308 case BFD_RELOC_AVR_CALL:
1309 {
1310 unsigned long x;
1311
1312 x = bfd_getl16 (where);
1313 if (value & 1)
1314 as_bad_where (fixP->fx_file, fixP->fx_line,
1315 _("odd address operand: %ld"), value);
1316 value >>= 1;
1317 x |= ((value & 0x10000) | ((value << 3) & 0x1f00000)) >> 16;
1318 bfd_putl16 ((bfd_vma) x, where);
1319 bfd_putl16 ((bfd_vma) (value & 0xffff), where + 2);
1320 }
1321 break;
1322
1323 default:
1324 as_fatal (_("line %d: unknown relocation type: 0x%x"),
1325 fixP->fx_line, fixP->fx_r_type);
1326 break;
1327 }
1328 }
1329 else
1330 {
1331 switch ((int) fixP->fx_r_type)
1332 {
1333 case -BFD_RELOC_AVR_HI8_LDI_NEG:
1334 case -BFD_RELOC_AVR_HI8_LDI:
1335 case -BFD_RELOC_AVR_LO8_LDI_NEG:
1336 case -BFD_RELOC_AVR_LO8_LDI:
1337 as_bad_where (fixP->fx_file, fixP->fx_line,
1338 _("only constant expression allowed"));
1339 fixP->fx_done = 1;
1340 break;
1341 default:
1342 break;
1343 }
1344 }
1345 }
1346
1347 /* GAS will call this to generate a reloc, passing the resulting reloc
1348 to `bfd_install_relocation'. This currently works poorly, as
1349 `bfd_install_relocation' often does the wrong thing, and instances of
1350 `tc_gen_reloc' have been written to work around the problems, which
1351 in turns makes it difficult to fix `bfd_install_relocation'. */
1352
1353 /* If while processing a fixup, a reloc really needs to be created
1354 then it is done here. */
1355
1356 arelent *
1357 tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED,
1358 fixS *fixp)
1359 {
1360 arelent *reloc;
1361
1362 if (fixp->fx_addsy && fixp->fx_subsy)
1363 {
1364 long value = 0;
1365
1366 if ((S_GET_SEGMENT (fixp->fx_addsy) != S_GET_SEGMENT (fixp->fx_subsy))
1367 || S_GET_SEGMENT (fixp->fx_addsy) == undefined_section)
1368 {
1369 as_bad_where (fixp->fx_file, fixp->fx_line,
1370 "Difference of symbols in different sections is not supported");
1371 return NULL;
1372 }
1373
1374 /* We are dealing with two symbols defined in the same section.
1375 Let us fix-up them here. */
1376 value += S_GET_VALUE (fixp->fx_addsy);
1377 value -= S_GET_VALUE (fixp->fx_subsy);
1378
1379 /* When fx_addsy and fx_subsy both are zero, md_apply_fix
1380 only takes it's second operands for the fixup value. */
1381 fixp->fx_addsy = NULL;
1382 fixp->fx_subsy = NULL;
1383 md_apply_fix (fixp, (valueT *) &value, NULL);
1384
1385 return NULL;
1386 }
1387
1388 reloc = xmalloc (sizeof (arelent));
1389
1390 reloc->sym_ptr_ptr = xmalloc (sizeof (asymbol *));
1391 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
1392
1393 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
1394 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
1395 if (reloc->howto == (reloc_howto_type *) NULL)
1396 {
1397 as_bad_where (fixp->fx_file, fixp->fx_line,
1398 _("reloc %d not supported by object file format"),
1399 (int) fixp->fx_r_type);
1400 return NULL;
1401 }
1402
1403 if (fixp->fx_r_type == BFD_RELOC_VTABLE_INHERIT
1404 || fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
1405 reloc->address = fixp->fx_offset;
1406
1407 reloc->addend = fixp->fx_offset;
1408
1409 return reloc;
1410 }
1411
1412 void
1413 md_assemble (char *str)
1414 {
1415 struct avr_opcodes_s *opcode;
1416 char op[11];
1417
1418 str = skip_space (extract_word (str, op, sizeof (op)));
1419
1420 if (!op[0])
1421 as_bad (_("can't find opcode "));
1422
1423 opcode = (struct avr_opcodes_s *) hash_find (avr_hash, op);
1424
1425 if (opcode == NULL)
1426 {
1427 as_bad (_("unknown opcode `%s'"), op);
1428 return;
1429 }
1430
1431 /* Special case for opcodes with optional operands (lpm, elpm) -
1432 version with operands exists in avr_opcodes[] in the next entry. */
1433
1434 if (*str && *opcode->constraints == '?')
1435 ++opcode;
1436
1437 if (!avr_opt.all_opcodes && (opcode->isa & avr_mcu->isa) != opcode->isa)
1438 as_bad (_("illegal opcode %s for mcu %s"), opcode->name, avr_mcu->name);
1439
1440 dwarf2_emit_insn (0);
1441
1442 /* We used to set input_line_pointer to the result of get_operands,
1443 but that is wrong. Our caller assumes we don't change it. */
1444 {
1445 char *t = input_line_pointer;
1446
1447 avr_operands (opcode, &str);
1448 if (*skip_space (str))
1449 as_bad (_("garbage at end of line"));
1450 input_line_pointer = t;
1451 }
1452 }
1453
1454 /* Flag to pass `pm' mode between `avr_parse_cons_expression' and
1455 `avr_cons_fix_new'. */
1456 static int exp_mod_pm = 0;
1457
1458 /* Parse special CONS expression: pm (expression)
1459 or alternatively: gs (expression).
1460 These are used for addressing program memory.
1461 Relocation: BFD_RELOC_AVR_16_PM. */
1462
1463 void
1464 avr_parse_cons_expression (expressionS *exp, int nbytes)
1465 {
1466 char *tmp;
1467
1468 exp_mod_pm = 0;
1469
1470 tmp = input_line_pointer = skip_space (input_line_pointer);
1471
1472 if (nbytes == 2)
1473 {
1474 char *pm_name1 = "pm";
1475 char *pm_name2 = "gs";
1476 int len = strlen (pm_name1);
1477 /* len must be the same for both pm identifiers. */
1478
1479 if (strncasecmp (input_line_pointer, pm_name1, len) == 0
1480 || strncasecmp (input_line_pointer, pm_name2, len) == 0)
1481 {
1482 input_line_pointer = skip_space (input_line_pointer + len);
1483
1484 if (*input_line_pointer == '(')
1485 {
1486 input_line_pointer = skip_space (input_line_pointer + 1);
1487 exp_mod_pm = 1;
1488 expression (exp);
1489
1490 if (*input_line_pointer == ')')
1491 ++input_line_pointer;
1492 else
1493 {
1494 as_bad (_("`)' required"));
1495 exp_mod_pm = 0;
1496 }
1497
1498 return;
1499 }
1500
1501 input_line_pointer = tmp;
1502 }
1503 }
1504
1505 expression (exp);
1506 }
1507
1508 void
1509 avr_cons_fix_new (fragS *frag,
1510 int where,
1511 int nbytes,
1512 expressionS *exp)
1513 {
1514 if (exp_mod_pm == 0)
1515 {
1516 if (nbytes == 1)
1517 fix_new_exp (frag, where, nbytes, exp, FALSE, BFD_RELOC_8);
1518 else if (nbytes == 2)
1519 fix_new_exp (frag, where, nbytes, exp, FALSE, BFD_RELOC_16);
1520 else if (nbytes == 4)
1521 fix_new_exp (frag, where, nbytes, exp, FALSE, BFD_RELOC_32);
1522 else
1523 as_bad (_("illegal %srelocation size: %d"), "", nbytes);
1524 }
1525 else
1526 {
1527 if (nbytes == 2)
1528 fix_new_exp (frag, where, nbytes, exp, FALSE, BFD_RELOC_AVR_16_PM);
1529 else
1530 as_bad (_("illegal %srelocation size: %d"), "`pm' ", nbytes);
1531 exp_mod_pm = 0;
1532 }
1533 }
GDB Binutils - Deliverables
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