1 /* tc-cr16.c -- Assembler code for the CR16 CPU core.
2 Copyright (C) 2007-2020 Free Software Foundation, Inc.
4 Contributed by M R Swami Reddy <MR.Swami.Reddy@nsc.com>
6 This file is part of GAS, the GNU Assembler.
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3, or (at your option)
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to the
20 Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
21 MA 02110-1301, USA. */
24 #include "safe-ctype.h"
25 #include "dwarf2dbg.h"
26 #include "opcode/cr16.h"
30 /* Word is considered here as a 16-bit unsigned short int. */
33 /* Register is 2-byte size. */
36 /* Maximum size of a single instruction (in words). */
37 #define INSN_MAX_SIZE 3
39 /* Maximum bits which may be set in a `mask16' operand. */
40 #define MAX_REGS_IN_MASK16 8
42 /* Assign a number NUM, shifted by SHIFT bytes, into a location
43 pointed by index BYTE of array 'output_opcode'. */
44 #define CR16_PRINT(BYTE, NUM, SHIFT) output_opcode[BYTE] |= (NUM << SHIFT)
49 OP_LEGAL
= 0, /* Legal operand. */
50 OP_OUT_OF_RANGE
, /* Operand not within permitted range. */
51 OP_NOT_EVEN
/* Operand is Odd number, should be even. */
55 /* Opcode mnemonics hash table. */
56 static htab_t cr16_inst_hash
;
57 /* CR16 registers hash table. */
58 static htab_t reg_hash
;
59 /* CR16 register pair hash table. */
60 static htab_t regp_hash
;
61 /* CR16 processor registers hash table. */
62 static htab_t preg_hash
;
63 /* CR16 processor registers 32 bit hash table. */
64 static htab_t pregp_hash
;
65 /* Current instruction we're assembling. */
66 const inst
*instruction
;
69 static int code_label
= 0;
71 /* Global variables. */
73 /* Array to hold an instruction encoding. */
74 long output_opcode
[2];
76 /* Nonzero means a relocatable symbol. */
79 /* A copy of the original instruction (used in error messages). */
80 char ins_parse
[MAX_INST_LEN
];
82 /* The current processed argument number. */
85 /* Generic assembler global variables which must be defined by all targets. */
87 /* Characters which always start a comment. */
88 const char comment_chars
[] = "#";
90 /* Characters which start a comment at the beginning of a line. */
91 const char line_comment_chars
[] = "#";
93 /* This array holds machine specific line separator characters. */
94 const char line_separator_chars
[] = ";";
96 /* Chars that can be used to separate mant from exp in floating point nums. */
97 const char EXP_CHARS
[] = "eE";
99 /* Chars that mean this number is a floating point constant as in 0f12.456 */
100 const char FLT_CHARS
[] = "f'";
103 /* Pre-defined "_GLOBAL_OFFSET_TABLE_" */
104 symbolS
* GOT_symbol
;
107 /* Target-specific multicharacter options, not const-declared at usage. */
108 const char *md_shortopts
= "";
109 struct option md_longopts
[] =
111 {NULL
, no_argument
, NULL
, 0}
113 size_t md_longopts_size
= sizeof (md_longopts
);
121 #ifdef md_flush_pending_output
122 md_flush_pending_output ();
125 if (is_it_end_of_statement ())
127 demand_empty_rest_of_line ();
131 #ifdef TC_ADDRESS_BYTES
133 nbytes
= TC_ADDRESS_BYTES ();
137 md_cons_align (nbytes
);
143 unsigned int bits_available
= BITS_PER_CHAR
* nbytes
;
144 char *hold
= input_line_pointer
;
148 if (*input_line_pointer
== ':')
157 if (*input_line_pointer
!= ':')
159 input_line_pointer
= hold
;
162 if (exp
.X_op
== O_absent
)
164 as_warn (_("using a bit field width of zero"));
165 exp
.X_add_number
= 0;
166 exp
.X_op
= O_constant
;
169 if (exp
.X_op
!= O_constant
)
171 *input_line_pointer
= '\0';
172 as_bad (_("field width \"%s\" too complex for a bitfield"), hold
);
173 *input_line_pointer
= ':';
174 demand_empty_rest_of_line ();
178 if ((width
= exp
.X_add_number
) >
179 (unsigned int)(BITS_PER_CHAR
* nbytes
))
181 as_warn (ngettext ("field width %lu too big to fit in %d"
182 " byte: truncated to %d bits",
183 "field width %lu too big to fit in %d"
184 " bytes: truncated to %d bits",
186 width
, nbytes
, (BITS_PER_CHAR
* nbytes
));
187 width
= BITS_PER_CHAR
* nbytes
;
191 if (width
> bits_available
)
193 /* FIXME-SOMEDAY: backing up and reparsing is wasteful. */
194 input_line_pointer
= hold
;
195 exp
.X_add_number
= value
;
200 hold
= ++input_line_pointer
;
203 if (exp
.X_op
!= O_constant
)
205 char cache
= *input_line_pointer
;
207 *input_line_pointer
= '\0';
208 as_bad (_("field value \"%s\" too complex for a bitfield"), hold
);
209 *input_line_pointer
= cache
;
210 demand_empty_rest_of_line ();
214 value
|= ((~(-(1 << width
)) & exp
.X_add_number
)
215 << ((BITS_PER_CHAR
* nbytes
) - bits_available
));
217 if ((bits_available
-= width
) == 0
218 || is_it_end_of_statement ()
219 || *input_line_pointer
!= ',')
222 hold
= ++input_line_pointer
;
226 exp
.X_add_number
= value
;
227 exp
.X_op
= O_constant
;
231 if ((*(input_line_pointer
) == '@') && (*(input_line_pointer
+1) == 'c'))
233 emit_expr (&exp
, (unsigned int) nbytes
);
235 if ((*(input_line_pointer
) == '@') && (*(input_line_pointer
+1) == 'c'))
237 input_line_pointer
+=3;
241 while ((*input_line_pointer
++ == ','));
243 /* Put terminator back into stream. */
244 input_line_pointer
--;
246 demand_empty_rest_of_line ();
249 /* This table describes all the machine specific pseudo-ops
250 the assembler has to support. The fields are:
251 *** Pseudo-op name without dot.
252 *** Function to call to execute this pseudo-op.
253 *** Integer arg to pass to the function. */
255 const pseudo_typeS md_pseudo_table
[] =
257 /* In CR16 machine, align is in bytes (not a ptwo boundary). */
258 {"align", s_align_bytes
, 0},
259 {"long", l_cons
, 4 },
260 {"4byte", l_cons
, 4 },
264 /* CR16 relaxation table. */
265 const relax_typeS md_relax_table
[] =
268 {0x7f, -0x80, 2, 1}, /* 8 */
269 {0xfffe, -0x10000, 4, 2}, /* 16 */
270 {0xfffffe, -0x1000000, 6, 0}, /* 24 */
273 /* Return the bit size for a given operand. */
276 get_opbits (operand_type op
)
279 return cr16_optab
[op
].bit_size
;
284 /* Return the argument type of a given operand. */
287 get_optype (operand_type op
)
290 return cr16_optab
[op
].arg_type
;
295 /* Return the flags of a given operand. */
298 get_opflags (operand_type op
)
301 return cr16_optab
[op
].flags
;
306 /* Get the cc code. */
309 get_cc (char *cc_name
)
313 for (i
= 0; i
< cr16_num_cc
; i
++)
314 if (strcmp (cc_name
, cr16_b_cond_tab
[i
]) == 0)
320 /* Get the core processor register 'reg_name'. */
323 get_register (char *reg_name
)
325 const reg_entry
*rreg
;
327 rreg
= (const reg_entry
*) str_hash_find (reg_hash
, reg_name
);
330 return rreg
->value
.reg_val
;
334 /* Get the core processor register-pair 'reg_name'. */
337 get_register_pair (char *reg_name
)
339 const reg_entry
*rreg
;
340 char tmp_rp
[16]="\0";
342 /* Add '(' and ')' to the reg pair, if it's not present. */
343 if (reg_name
[0] != '(')
346 strcat (tmp_rp
, reg_name
);
348 rreg
= (const reg_entry
*) str_hash_find (regp_hash
, tmp_rp
);
351 rreg
= (const reg_entry
*) str_hash_find (regp_hash
, reg_name
);
354 return rreg
->value
.reg_val
;
359 /* Get the index register 'reg_name'. */
362 get_index_register (char *reg_name
)
364 const reg_entry
*rreg
;
366 rreg
= (const reg_entry
*) str_hash_find (reg_hash
, reg_name
);
369 && ((rreg
->value
.reg_val
== 12) || (rreg
->value
.reg_val
== 13)))
370 return rreg
->value
.reg_val
;
374 /* Get the core processor index register-pair 'reg_name'. */
377 get_index_register_pair (char *reg_name
)
379 const reg_entry
*rreg
;
381 rreg
= (const reg_entry
*) str_hash_find (regp_hash
, reg_name
);
385 if ((rreg
->value
.reg_val
!= 1) || (rreg
->value
.reg_val
!= 7)
386 || (rreg
->value
.reg_val
!= 9) || (rreg
->value
.reg_val
> 10))
387 return rreg
->value
.reg_val
;
389 as_bad (_("Unknown register pair - index relative mode: `%d'"), rreg
->value
.reg_val
);
395 /* Get the processor register 'preg_name'. */
398 get_pregister (char *preg_name
)
400 const reg_entry
*prreg
;
402 prreg
= (const reg_entry
*) str_hash_find (preg_hash
, preg_name
);
405 return prreg
->value
.preg_val
;
407 return nullpregister
;
410 /* Get the processor register 'preg_name 32 bit'. */
413 get_pregisterp (char *preg_name
)
415 const reg_entry
*prreg
;
417 prreg
= (const reg_entry
*) str_hash_find (pregp_hash
, preg_name
);
420 return prreg
->value
.preg_val
;
422 return nullpregister
;
426 /* Round up a section size to the appropriate boundary. */
429 md_section_align (segT seg
, valueT val
)
431 /* Round .text section to a multiple of 2. */
432 if (seg
== text_section
)
433 return (val
+ 1) & ~1;
437 /* Parse an operand that is machine-specific (remove '*'). */
440 md_operand (expressionS
* exp
)
442 char c
= *input_line_pointer
;
447 input_line_pointer
++;
455 /* Reset global variables before parsing a new instruction. */
458 reset_vars (char *op
)
460 cur_arg_num
= relocatable
= 0;
461 memset (& output_opcode
, '\0', sizeof (output_opcode
));
463 /* Save a copy of the original OP (used in error messages). */
464 strncpy (ins_parse
, op
, sizeof ins_parse
- 1);
465 ins_parse
[sizeof ins_parse
- 1] = 0;
468 /* This macro decides whether a particular reloc is an entry in a
469 switch table. It is used when relaxing, because the linker needs
470 to know about all such entries so that it can adjust them if
473 #define SWITCH_TABLE(fix) \
474 ( (fix)->fx_addsy != NULL \
475 && (fix)->fx_subsy != NULL \
476 && S_GET_SEGMENT ((fix)->fx_addsy) == \
477 S_GET_SEGMENT ((fix)->fx_subsy) \
478 && S_GET_SEGMENT (fix->fx_addsy) != undefined_section \
479 && ( (fix)->fx_r_type == BFD_RELOC_CR16_NUM8 \
480 || (fix)->fx_r_type == BFD_RELOC_CR16_NUM16 \
481 || (fix)->fx_r_type == BFD_RELOC_CR16_NUM32 \
482 || (fix)->fx_r_type == BFD_RELOC_CR16_NUM32a))
484 /* See whether we need to force a relocation into the output file.
485 This is used to force out switch and PC relative relocations when
489 cr16_force_relocation (fixS
*fix
)
491 if (generic_force_reloc (fix
) || SWITCH_TABLE (fix
))
497 /* Record a fixup for a cons expression. */
500 cr16_cons_fix_new (fragS
*frag
, int offset
, int len
, expressionS
*exp
,
501 bfd_reloc_code_real_type rtype
)
505 default: rtype
= BFD_RELOC_NONE
; break;
506 case 1: rtype
= BFD_RELOC_CR16_NUM8
; break;
507 case 2: rtype
= BFD_RELOC_CR16_NUM16
; break;
511 rtype
= BFD_RELOC_CR16_NUM32a
;
515 rtype
= BFD_RELOC_CR16_NUM32
;
519 fix_new_exp (frag
, offset
, len
, exp
, 0, rtype
);
522 /* Generate a relocation entry for a fixup. */
525 tc_gen_reloc (asection
*section ATTRIBUTE_UNUSED
, fixS
* fixP
)
529 /* If symbols are local and resolved, then no relocation needed. */
530 if ( ((fixP
->fx_addsy
)
531 && (S_GET_SEGMENT (fixP
->fx_addsy
) == absolute_section
))
533 && (S_GET_SEGMENT (fixP
->fx_subsy
) == absolute_section
)))
536 reloc
= XNEW (arelent
);
537 reloc
->sym_ptr_ptr
= XNEW (asymbol
*);
538 *reloc
->sym_ptr_ptr
= symbol_get_bfdsym (fixP
->fx_addsy
);
539 reloc
->address
= fixP
->fx_frag
->fr_address
+ fixP
->fx_where
;
540 reloc
->addend
= fixP
->fx_offset
;
542 if (fixP
->fx_subsy
!= NULL
)
544 if (SWITCH_TABLE (fixP
))
546 /* Keep the current difference in the addend. */
547 reloc
->addend
= (S_GET_VALUE (fixP
->fx_addsy
)
548 - S_GET_VALUE (fixP
->fx_subsy
) + fixP
->fx_offset
);
550 switch (fixP
->fx_r_type
)
552 case BFD_RELOC_CR16_NUM8
:
553 fixP
->fx_r_type
= BFD_RELOC_CR16_SWITCH8
;
555 case BFD_RELOC_CR16_NUM16
:
556 fixP
->fx_r_type
= BFD_RELOC_CR16_SWITCH16
;
558 case BFD_RELOC_CR16_NUM32
:
559 fixP
->fx_r_type
= BFD_RELOC_CR16_SWITCH32
;
561 case BFD_RELOC_CR16_NUM32a
:
562 fixP
->fx_r_type
= BFD_RELOC_CR16_NUM32a
;
571 /* We only resolve difference expressions in the same section. */
572 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
573 _("can't resolve `%s' {%s section} - `%s' {%s section}"),
574 fixP
->fx_addsy
? S_GET_NAME (fixP
->fx_addsy
) : "0",
575 segment_name (fixP
->fx_addsy
576 ? S_GET_SEGMENT (fixP
->fx_addsy
)
578 S_GET_NAME (fixP
->fx_subsy
),
579 segment_name (S_GET_SEGMENT (fixP
->fx_addsy
)));
583 if ((fixP
->fx_r_type
== BFD_RELOC_CR16_GOT_REGREL20
)
585 && fixP
->fx_addsy
== GOT_symbol
)
587 reloc
->addend
= fixP
->fx_offset
= reloc
->address
;
589 else if ((fixP
->fx_r_type
== BFD_RELOC_CR16_GOTC_REGREL20
)
591 && fixP
->fx_addsy
== GOT_symbol
)
593 reloc
->addend
= fixP
->fx_offset
= reloc
->address
;
597 gas_assert ((int) fixP
->fx_r_type
> 0);
598 reloc
->howto
= bfd_reloc_type_lookup (stdoutput
, fixP
->fx_r_type
);
600 if (reloc
->howto
== NULL
)
602 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
603 _("internal error: reloc %d (`%s') not supported by object file format"),
605 bfd_get_reloc_code_name (fixP
->fx_r_type
));
608 gas_assert (!fixP
->fx_pcrel
== !reloc
->howto
->pc_relative
);
613 /* Prepare machine-dependent frags for relaxation. */
616 md_estimate_size_before_relax (fragS
*fragp
, asection
*seg
)
618 /* If symbol is undefined or located in a different section,
619 select the largest supported relocation. */
620 relax_substateT subtype
;
621 relax_substateT rlx_state
[] = {0, 2};
623 for (subtype
= 0; subtype
< ARRAY_SIZE (rlx_state
); subtype
+= 2)
625 if (fragp
->fr_subtype
== rlx_state
[subtype
]
626 && (!S_IS_DEFINED (fragp
->fr_symbol
)
627 || seg
!= S_GET_SEGMENT (fragp
->fr_symbol
)))
629 fragp
->fr_subtype
= rlx_state
[subtype
+ 1];
634 if (fragp
->fr_subtype
>= ARRAY_SIZE (md_relax_table
))
637 return md_relax_table
[fragp
->fr_subtype
].rlx_length
;
641 md_convert_frag (bfd
*abfd ATTRIBUTE_UNUSED
, asection
*sec
, fragS
*fragP
)
643 /* 'opcode' points to the start of the instruction, whether
644 we need to change the instruction's fixed encoding. */
645 char *opcode
= &fragP
->fr_literal
[0] + fragP
->fr_fix
;
646 bfd_reloc_code_real_type reloc
;
648 subseg_change (sec
, 0);
650 switch (fragP
->fr_subtype
)
653 reloc
= BFD_RELOC_CR16_DISP8
;
656 /* If the subtype is not changed due to :m operand qualifier,
657 then no need to update the opcode value. */
658 if ((int)opcode
[1] != 0x18)
660 opcode
[0] = (opcode
[0] & 0xf0);
663 reloc
= BFD_RELOC_CR16_DISP16
;
666 /* If the subtype is not changed due to :l operand qualifier,
667 then no need to update the opcode value. */
668 if ((int)opcode
[1] != 0)
670 opcode
[2] = opcode
[0];
671 opcode
[0] = opcode
[1];
674 reloc
= BFD_RELOC_CR16_DISP24
;
680 fix_new (fragP
, fragP
->fr_fix
,
681 bfd_get_reloc_size (bfd_reloc_type_lookup (stdoutput
, reloc
)),
682 fragP
->fr_symbol
, fragP
->fr_offset
, 1, reloc
);
684 fragP
->fr_fix
+= md_relax_table
[fragP
->fr_subtype
].rlx_length
;
688 md_undefined_symbol (char *name
)
690 if (*name
== '_' && *(name
+ 1) == 'G'
691 && strcmp (name
, "_GLOBAL_OFFSET_TABLE_") == 0)
695 if (symbol_find (name
))
696 as_bad (_("GOT already in symbol table"));
697 GOT_symbol
= symbol_new (name
, undefined_section
,
698 &zero_address_frag
, 0);
705 /* Process machine-dependent command line options. Called once for
706 each option on the command line that the machine-independent part of
707 GAS does not understand. */
710 md_parse_option (int c ATTRIBUTE_UNUSED
, const char *arg ATTRIBUTE_UNUSED
)
715 /* Machine-dependent usage-output. */
718 md_show_usage (FILE *stream ATTRIBUTE_UNUSED
)
724 md_atof (int type
, char *litP
, int *sizeP
)
726 return ieee_md_atof (type
, litP
, sizeP
, target_big_endian
);
729 /* Apply a fixS (fixup of an instruction or data that we didn't have
730 enough info to complete immediately) to the data in a frag.
731 Since linkrelax is nonzero and TC_LINKRELAX_FIXUP is defined to disable
732 relaxation of debug sections, this function is called only when
733 fixuping relocations of debug sections. */
736 md_apply_fix (fixS
*fixP
, valueT
*valP
, segT seg
)
740 if (fixP
->fx_addsy
== NULL
741 && fixP
->fx_pcrel
== 0)
743 else if (fixP
->fx_pcrel
== 1
744 && fixP
->fx_addsy
!= NULL
745 && S_GET_SEGMENT (fixP
->fx_addsy
) == seg
)
750 if (fixP
->fx_addsy
!= NULL
&& !fixP
->fx_pcrel
)
752 val
= fixP
->fx_offset
;
758 char *buf
= fixP
->fx_frag
->fr_literal
+ fixP
->fx_where
;
762 switch (fixP
->fx_r_type
)
764 case BFD_RELOC_CR16_NUM8
:
765 bfd_put_8 (stdoutput
, (unsigned char) val
, buf
);
767 case BFD_RELOC_CR16_NUM16
:
768 bfd_put_16 (stdoutput
, val
, buf
);
770 case BFD_RELOC_CR16_NUM32
:
771 bfd_put_32 (stdoutput
, val
, buf
);
773 case BFD_RELOC_CR16_NUM32a
:
774 bfd_put_32 (stdoutput
, val
, buf
);
777 /* We shouldn't ever get here because linkrelax is nonzero. */
784 fixP
->fx_offset
= * valP
;
787 /* The location from which a PC relative jump should be calculated,
788 given a PC relative reloc. */
791 md_pcrel_from (fixS
*fixp
)
793 return fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
797 initialise_reg_hash_table (htab_t
*hash_table
,
798 const reg_entry
*register_table
,
799 const unsigned int num_entries
)
801 const reg_entry
*rreg
;
803 *hash_table
= str_htab_create ();
805 for (rreg
= register_table
;
806 rreg
< (register_table
+ num_entries
);
808 if (str_hash_insert (*hash_table
, rreg
->name
, rreg
, 0) != NULL
)
809 as_fatal (_("duplicate %s"), rreg
->name
);
812 /* This function is called once, at assembler startup time. This should
813 set up all the tables, etc that the MD part of the assembler needs. */
820 /* Set up a hash table for the instructions. */
821 cr16_inst_hash
= str_htab_create ();
823 while (cr16_instruction
[i
].mnemonic
!= NULL
)
825 const char *mnemonic
= cr16_instruction
[i
].mnemonic
;
827 if (str_hash_insert (cr16_inst_hash
, mnemonic
, cr16_instruction
+ i
, 0))
828 as_fatal (_("duplicate %s"), mnemonic
);
830 /* Insert unique names into hash table. The CR16 instruction set
831 has many identical opcode names that have different opcodes based
832 on the operands. This hash table then provides a quick index to
833 the first opcode with a particular name in the opcode table. */
838 while (cr16_instruction
[i
].mnemonic
!= NULL
839 && streq (cr16_instruction
[i
].mnemonic
, mnemonic
));
842 /* Initialize reg_hash hash table. */
843 initialise_reg_hash_table (& reg_hash
, cr16_regtab
, NUMREGS
);
844 /* Initialize regp_hash hash table. */
845 initialise_reg_hash_table (& regp_hash
, cr16_regptab
, NUMREGPS
);
846 /* Initialize preg_hash hash table. */
847 initialise_reg_hash_table (& preg_hash
, cr16_pregtab
, NUMPREGS
);
848 /* Initialize pregp_hash hash table. */
849 initialise_reg_hash_table (& pregp_hash
, cr16_pregptab
, NUMPREGPS
);
851 /* Set linkrelax here to avoid fixups in most sections. */
855 /* Process constants (immediate/absolute)
856 and labels (jump targets/Memory locations). */
859 process_label_constant (char *str
, ins
* cr16_ins
)
861 char *saved_input_line_pointer
;
862 int symbol_with_at
= 0;
863 int symbol_with_s
= 0;
864 int symbol_with_m
= 0;
865 int symbol_with_l
= 0;
866 int symbol_with_at_got
= 0;
867 int symbol_with_at_gotc
= 0;
868 argument
*cur_arg
= cr16_ins
->arg
+ cur_arg_num
; /* Current argument. */
870 saved_input_line_pointer
= input_line_pointer
;
871 input_line_pointer
= str
;
873 expression (&cr16_ins
->exp
);
875 switch (cr16_ins
->exp
.X_op
)
879 /* Missing or bad expr becomes absolute 0. */
880 as_bad (_("missing or invalid displacement expression `%s' taken as 0"),
882 cr16_ins
->exp
.X_op
= O_constant
;
883 cr16_ins
->exp
.X_add_number
= 0;
884 cr16_ins
->exp
.X_add_symbol
= NULL
;
885 cr16_ins
->exp
.X_op_symbol
= NULL
;
889 cur_arg
->X_op
= O_constant
;
890 cur_arg
->constant
= cr16_ins
->exp
.X_add_number
;
896 cur_arg
->X_op
= O_symbol
;
897 cur_arg
->constant
= cr16_ins
->exp
.X_add_number
;
898 cr16_ins
->exp
.X_add_number
= 0;
899 cr16_ins
->rtype
= BFD_RELOC_NONE
;
902 if (strneq (input_line_pointer
, "@c", 2))
905 if (strneq (input_line_pointer
, "@l", 2)
906 || strneq (input_line_pointer
, ":l", 2))
909 if (strneq (input_line_pointer
, "@m", 2)
910 || strneq (input_line_pointer
, ":m", 2))
913 if (strneq (input_line_pointer
, "@s", 2)
914 || strneq (input_line_pointer
, ":s", 2))
917 if (strneq (input_line_pointer
, "@cGOT", 5)
918 || strneq (input_line_pointer
, "@cgot", 5))
920 if (GOT_symbol
== NULL
)
921 GOT_symbol
= symbol_find_or_make (GLOBAL_OFFSET_TABLE_NAME
);
923 symbol_with_at_gotc
= 1;
925 else if (strneq (input_line_pointer
, "@GOT", 4)
926 || strneq (input_line_pointer
, "@got", 4))
928 if ((strneq (input_line_pointer
, "+", 1))
929 || (strneq (input_line_pointer
, "-", 1)))
930 as_warn (_("GOT bad expression with %s."), input_line_pointer
);
932 if (GOT_symbol
== NULL
)
933 GOT_symbol
= symbol_find_or_make (GLOBAL_OFFSET_TABLE_NAME
);
935 symbol_with_at_got
= 1;
938 switch (cur_arg
->type
)
941 if (IS_INSN_TYPE (LD_STOR_INS
) || IS_INSN_TYPE (CSTBIT_INS
))
943 if (symbol_with_at_got
)
944 cr16_ins
->rtype
= BFD_RELOC_CR16_GOT_REGREL20
;
945 else if (symbol_with_at_gotc
)
946 cr16_ins
->rtype
= BFD_RELOC_CR16_GOTC_REGREL20
;
947 else if (cur_arg
->size
== 20)
948 cr16_ins
->rtype
= BFD_RELOC_CR16_REGREL20
;
950 cr16_ins
->rtype
= BFD_RELOC_CR16_REGREL20a
;
955 if (IS_INSN_TYPE (LD_STOR_INS
) || IS_INSN_TYPE (CSTBIT_INS
))
957 if (symbol_with_at_got
)
958 cr16_ins
->rtype
= BFD_RELOC_CR16_GOT_REGREL20
;
959 else if (symbol_with_at_gotc
)
960 cr16_ins
->rtype
= BFD_RELOC_CR16_GOTC_REGREL20
;
962 switch (instruction
->size
)
965 switch (cur_arg
->size
)
968 cr16_ins
->rtype
= BFD_RELOC_CR16_REGREL0
;
971 if (IS_INSN_MNEMONIC ("loadb") || IS_INSN_MNEMONIC ("storb"))
972 cr16_ins
->rtype
= BFD_RELOC_CR16_REGREL4
;
974 cr16_ins
->rtype
= BFD_RELOC_CR16_REGREL4a
;
980 cr16_ins
->rtype
= BFD_RELOC_CR16_REGREL16
;
983 if (cur_arg
->size
== 20)
984 cr16_ins
->rtype
= BFD_RELOC_CR16_REGREL20
;
986 cr16_ins
->rtype
= BFD_RELOC_CR16_REGREL20a
;
995 if (IS_INSN_TYPE (LD_STOR_INS
) || IS_INSN_TYPE (CSTBIT_INS
))
997 if (symbol_with_at_got
)
998 cr16_ins
->rtype
= BFD_RELOC_CR16_GOT_REGREL20
;
999 else if (symbol_with_at_gotc
)
1000 cr16_ins
->rtype
= BFD_RELOC_CR16_GOTC_REGREL20
;
1002 cr16_ins
->rtype
= BFD_RELOC_CR16_REGREL20
;
1007 if (IS_INSN_TYPE (LD_STOR_INS
) || IS_INSN_TYPE (CSTBIT_INS
))
1009 if (symbol_with_at_got
)
1010 cr16_ins
->rtype
= BFD_RELOC_CR16_GOT_REGREL20
;
1011 else if (symbol_with_at_gotc
)
1012 cr16_ins
->rtype
= BFD_RELOC_CR16_GOTC_REGREL20
;
1014 switch (instruction
->size
)
1016 case 1: cr16_ins
->rtype
= BFD_RELOC_CR16_REGREL0
; break;
1017 case 2: cr16_ins
->rtype
= BFD_RELOC_CR16_REGREL14
; break;
1018 case 3: cr16_ins
->rtype
= BFD_RELOC_CR16_REGREL20
; break;
1026 if (IS_INSN_MNEMONIC ("bal"))
1027 cr16_ins
->rtype
= BFD_RELOC_CR16_DISP24
;
1028 else if (IS_INSN_TYPE (BRANCH_INS
))
1031 cr16_ins
->rtype
= BFD_RELOC_CR16_DISP24
;
1032 else if (symbol_with_m
)
1033 cr16_ins
->rtype
= BFD_RELOC_CR16_DISP16
;
1035 cr16_ins
->rtype
= BFD_RELOC_CR16_DISP8
;
1037 else if (IS_INSN_TYPE (STOR_IMM_INS
) || IS_INSN_TYPE (LD_STOR_INS
)
1038 || IS_INSN_TYPE (CSTBIT_INS
))
1041 as_bad (_("operand %d: illegal use expression: `%s`"), cur_arg_num
+ 1, str
);
1042 if (symbol_with_at_got
)
1043 cr16_ins
->rtype
= BFD_RELOC_CR16_GOT_REGREL20
;
1044 else if (symbol_with_at_gotc
)
1045 cr16_ins
->rtype
= BFD_RELOC_CR16_GOTC_REGREL20
;
1046 else if (symbol_with_m
)
1047 cr16_ins
->rtype
= BFD_RELOC_CR16_ABS20
;
1048 else /* Default to (symbol_with_l) */
1049 cr16_ins
->rtype
= BFD_RELOC_CR16_ABS24
;
1051 else if (IS_INSN_TYPE (BRANCH_NEQ_INS
))
1052 cr16_ins
->rtype
= BFD_RELOC_CR16_DISP4
;
1056 if (IS_INSN_TYPE (ARITH_INS
))
1058 if (symbol_with_at_got
)
1059 cr16_ins
->rtype
= BFD_RELOC_CR16_GOT_REGREL20
;
1060 else if (symbol_with_at_gotc
)
1061 cr16_ins
->rtype
= BFD_RELOC_CR16_GOTC_REGREL20
;
1062 else if (symbol_with_s
)
1063 cr16_ins
->rtype
= BFD_RELOC_CR16_IMM4
;
1064 else if (symbol_with_m
)
1065 cr16_ins
->rtype
= BFD_RELOC_CR16_IMM20
;
1066 else if (symbol_with_at
)
1067 cr16_ins
->rtype
= BFD_RELOC_CR16_IMM32a
;
1068 else /* Default to (symbol_with_l) */
1069 cr16_ins
->rtype
= BFD_RELOC_CR16_IMM32
;
1071 else if (IS_INSN_TYPE (ARITH_BYTE_INS
))
1073 cr16_ins
->rtype
= BFD_RELOC_CR16_IMM16
;
1082 cur_arg
->X_op
= cr16_ins
->exp
.X_op
;
1086 input_line_pointer
= saved_input_line_pointer
;
1090 /* Retrieve the opcode image of a given register.
1091 If the register is illegal for the current instruction,
1095 getreg_image (reg r
)
1097 const reg_entry
*rreg
;
1099 int is_procreg
= 0; /* Nonzero means argument should be processor reg. */
1101 /* Check whether the register is in registers table. */
1103 rreg
= cr16_regtab
+ r
;
1104 else /* Register not found. */
1106 as_bad (_("Unknown register: `%d'"), r
);
1110 reg_name
= rreg
->name
;
1112 /* Issue a error message when register is illegal. */
1114 as_bad (_("Illegal register (`%s') in Instruction: `%s'"), \
1115 reg_name, ins_parse);
1119 case CR16_R_REGTYPE
:
1126 case CR16_P_REGTYPE
:
1138 /* Parsing different types of operands
1139 -> constants Immediate/Absolute/Relative numbers
1140 -> Labels Relocatable symbols
1141 -> (reg pair base) Register pair base
1142 -> (rbase) Register base
1143 -> disp(rbase) Register relative
1144 -> [rinx]disp(reg pair) Register index with reg pair mode
1145 -> disp(rbase,ridx,scl) Register index mode. */
1148 set_operand (char *operand
, ins
* cr16_ins
)
1150 char *operandS
; /* Pointer to start of sub-operand. */
1151 char *operandE
; /* Pointer to end of sub-operand. */
1153 argument
*cur_arg
= &cr16_ins
->arg
[cur_arg_num
]; /* Current argument. */
1155 /* Initialize pointers. */
1156 operandS
= operandE
= operand
;
1158 switch (cur_arg
->type
)
1160 case arg_ic
: /* Case $0x18. */
1163 case arg_c
: /* Case 0x18. */
1165 process_label_constant (operandS
, cr16_ins
);
1167 if (cur_arg
->type
!= arg_ic
)
1168 cur_arg
->type
= arg_c
;
1171 case arg_icr
: /* Case $0x18(r1). */
1173 case arg_cr
: /* Case 0x18(r1). */
1174 /* Set displacement constant. */
1175 while (*operandE
!= '(')
1178 process_label_constant (operandS
, cr16_ins
);
1179 operandS
= operandE
;
1181 case arg_rbase
: /* Case (r1) or (r1,r0). */
1183 /* Set register base. */
1184 while (*operandE
!= ')')
1187 if ((cur_arg
->r
= get_register (operandS
)) == nullregister
)
1188 as_bad (_("Illegal register `%s' in Instruction `%s'"),
1189 operandS
, ins_parse
);
1191 /* set the arg->rp, if reg is "r12" or "r13" or "14" or "15" */
1192 if ((cur_arg
->type
!= arg_rbase
)
1193 && ((getreg_image (cur_arg
->r
) == 12)
1194 || (getreg_image (cur_arg
->r
) == 13)
1195 || (getreg_image (cur_arg
->r
) == 14)
1196 || (getreg_image (cur_arg
->r
) == 15)))
1198 cur_arg
->type
= arg_crp
;
1199 cur_arg
->rp
= cur_arg
->r
;
1203 case arg_crp
: /* Case 0x18(r1,r0). */
1204 /* Set displacement constant. */
1205 while (*operandE
!= '(')
1208 process_label_constant (operandS
, cr16_ins
);
1209 operandS
= operandE
;
1211 /* Set register pair base. */
1212 while (*operandE
!= ')')
1215 if ((cur_arg
->rp
= get_register_pair (operandS
)) == nullregister
)
1216 as_bad (_("Illegal register pair `%s' in Instruction `%s'"),
1217 operandS
, ins_parse
);
1221 /* Set register pair base. */
1222 if ((strchr (operandS
,'(') != NULL
))
1224 while ((*operandE
!= '(') && (! ISSPACE (*operandE
)))
1226 if ((cur_arg
->rp
= get_index_register_pair (operandE
)) == nullregister
)
1227 as_bad (_("Illegal register pair `%s' in Instruction `%s'"),
1228 operandS
, ins_parse
);
1230 cur_arg
->type
= arg_idxrp
;
1235 operandE
= operandS
;
1236 /* Set displacement constant. */
1237 while (*operandE
!= ']')
1239 process_label_constant (++operandE
, cr16_ins
);
1241 operandE
= operandS
;
1243 /* Set index register . */
1244 operandS
= strchr (operandE
,'[');
1245 if (operandS
!= NULL
)
1246 { /* Eliminate '[', detach from rest of operand. */
1249 operandE
= strchr (operandS
, ']');
1251 if (operandE
== NULL
)
1252 as_bad (_("unmatched '['"));
1254 { /* Eliminate ']' and make sure it was the last thing
1257 if (*(operandE
+ 1) != '\0')
1258 as_bad (_("garbage after index spec ignored"));
1262 if ((cur_arg
->i_r
= get_index_register (operandS
)) == nullregister
)
1263 as_bad (_("Illegal register `%s' in Instruction `%s'"),
1264 operandS
, ins_parse
);
1274 /* Parse a single operand.
1275 operand - Current operand to parse.
1276 cr16_ins - Current assembled instruction. */
1279 parse_operand (char *operand
, ins
* cr16_ins
)
1282 argument
*cur_arg
= cr16_ins
->arg
+ cur_arg_num
; /* Current argument. */
1284 /* Initialize the type to NULL before parsing. */
1285 cur_arg
->type
= nullargs
;
1287 /* Check whether this is a condition code . */
1288 if ((IS_INSN_MNEMONIC ("b")) && ((ret_val
= get_cc (operand
)) != -1))
1290 cur_arg
->type
= arg_cc
;
1291 cur_arg
->cc
= ret_val
;
1292 cur_arg
->X_op
= O_register
;
1296 /* Check whether this is a general processor register. */
1297 if ((ret_val
= get_register (operand
)) != nullregister
)
1299 cur_arg
->type
= arg_r
;
1300 cur_arg
->r
= ret_val
;
1305 /* Check whether this is a general processor register pair. */
1306 if ((operand
[0] == '(')
1307 && ((ret_val
= get_register_pair (operand
)) != nullregister
))
1309 cur_arg
->type
= arg_rp
;
1310 cur_arg
->rp
= ret_val
;
1311 cur_arg
->X_op
= O_register
;
1315 /* Check whether the operand is a processor register.
1316 For "lprd" and "sprd" instruction, only 32 bit
1317 processor registers used. */
1318 if (!(IS_INSN_MNEMONIC ("lprd") || (IS_INSN_MNEMONIC ("sprd")))
1319 && ((ret_val
= get_pregister (operand
)) != nullpregister
))
1321 cur_arg
->type
= arg_pr
;
1322 cur_arg
->pr
= ret_val
;
1323 cur_arg
->X_op
= O_register
;
1327 /* Check whether this is a processor register - 32 bit. */
1328 if ((ret_val
= get_pregisterp (operand
)) != nullpregister
)
1330 cur_arg
->type
= arg_prp
;
1331 cur_arg
->prp
= ret_val
;
1332 cur_arg
->X_op
= O_register
;
1336 /* Deal with special characters. */
1340 if (strchr (operand
, '(') != NULL
)
1341 cur_arg
->type
= arg_icr
;
1343 cur_arg
->type
= arg_ic
;
1348 cur_arg
->type
= arg_rbase
;
1353 cur_arg
->type
= arg_idxr
;
1361 if (strchr (operand
, '(') != NULL
)
1363 if (strchr (operand
, ',') != NULL
1364 && (strchr (operand
, ',') > strchr (operand
, '(')))
1365 cur_arg
->type
= arg_crp
;
1367 cur_arg
->type
= arg_cr
;
1370 cur_arg
->type
= arg_c
;
1372 /* Parse an operand according to its type. */
1374 cur_arg
->constant
= 0;
1375 set_operand (operand
, cr16_ins
);
1378 /* Parse the various operands. Each operand is then analyzed to fillup
1379 the fields in the cr16_ins data structure. */
1382 parse_operands (ins
* cr16_ins
, char *operands
)
1384 char *operandS
; /* Operands string. */
1385 char *operandH
, *operandT
; /* Single operand head/tail pointers. */
1386 int allocated
= 0; /* Indicates a new operands string was allocated.*/
1387 char *operand
[MAX_OPERANDS
];/* Separating the operands. */
1388 int op_num
= 0; /* Current operand number we are parsing. */
1389 int bracket_flag
= 0; /* Indicates a bracket '(' was found. */
1390 int sq_bracket_flag
= 0; /* Indicates a square bracket '[' was found. */
1392 /* Preprocess the list of registers, if necessary. */
1393 operandS
= operandH
= operandT
= operands
;
1395 while (*operandT
!= '\0')
1397 if (*operandT
== ',' && bracket_flag
!= 1 && sq_bracket_flag
!= 1)
1400 operand
[op_num
++] = strdup (operandH
);
1401 operandH
= operandT
;
1405 if (*operandT
== ' ')
1406 as_bad (_("Illegal operands (whitespace): `%s'"), ins_parse
);
1408 if (*operandT
== '(')
1410 else if (*operandT
== '[')
1411 sq_bracket_flag
= 1;
1413 if (*operandT
== ')')
1418 as_fatal (_("Missing matching brackets : `%s'"), ins_parse
);
1420 else if (*operandT
== ']')
1422 if (sq_bracket_flag
)
1423 sq_bracket_flag
= 0;
1425 as_fatal (_("Missing matching brackets : `%s'"), ins_parse
);
1428 if (bracket_flag
== 1 && *operandT
== ')')
1430 else if (sq_bracket_flag
== 1 && *operandT
== ']')
1431 sq_bracket_flag
= 0;
1436 /* Adding the last operand. */
1437 operand
[op_num
++] = strdup (operandH
);
1438 cr16_ins
->nargs
= op_num
;
1440 /* Verifying correct syntax of operands (all brackets should be closed). */
1441 if (bracket_flag
|| sq_bracket_flag
)
1442 as_fatal (_("Missing matching brackets : `%s'"), ins_parse
);
1444 /* Now we parse each operand separately. */
1445 for (op_num
= 0; op_num
< cr16_ins
->nargs
; op_num
++)
1447 cur_arg_num
= op_num
;
1448 parse_operand (operand
[op_num
], cr16_ins
);
1449 free (operand
[op_num
]);
1456 /* Get the trap index in dispatch table, given its name.
1457 This routine is used by assembling the 'excp' instruction. */
1462 const trap_entry
*trap
;
1464 for (trap
= cr16_traps
; trap
< (cr16_traps
+ NUMTRAPS
); trap
++)
1465 if (strcasecmp (trap
->name
, s
) == 0)
1468 /* To make compatible with CR16 4.1 tools, the below 3-lines of
1469 * code added. Refer: Development Tracker item #123 */
1470 for (trap
= cr16_traps
; trap
< (cr16_traps
+ NUMTRAPS
); trap
++)
1471 if (trap
->entry
== (unsigned int) atoi (s
))
1474 as_bad (_("Unknown exception: `%s'"), s
);
1478 /* Top level module where instruction parsing starts.
1479 cr16_ins - data structure holds some information.
1480 operands - holds the operands part of the whole instruction. */
1483 parse_insn (ins
*insn
, char *operands
)
1487 /* Handle instructions with no operands. */
1488 for (i
= 0; cr16_no_op_insn
[i
] != NULL
; i
++)
1490 if (streq (cr16_no_op_insn
[i
], instruction
->mnemonic
))
1497 /* Handle 'excp' instructions. */
1498 if (IS_INSN_MNEMONIC ("excp"))
1501 insn
->arg
[0].type
= arg_ic
;
1502 insn
->arg
[0].constant
= gettrap (operands
);
1503 insn
->arg
[0].X_op
= O_constant
;
1507 if (operands
!= NULL
)
1508 parse_operands (insn
, operands
);
1511 /* bCC instruction requires special handling. */
1513 get_b_cc (char * op
)
1517 if (op
[1] == 0 || (op
[2] != 0 && op
[3] != 0))
1520 for (i
= 0; i
< cr16_num_cc
; i
++)
1521 if (streq (op
+ 1, cr16_b_cond_tab
[i
]))
1522 return (char *) cr16_b_cond_tab
[i
];
1527 /* bCC instruction requires special handling. */
1529 is_bcc_insn (char * op
)
1531 if (!(streq (op
, "bal") || streq (op
, "beq0b") || streq (op
, "bnq0b")
1532 || streq (op
, "beq0w") || streq (op
, "bnq0w")))
1533 if ((op
[0] == 'b') && (get_b_cc (op
) != NULL
))
1538 /* Cinv instruction requires special handling. */
1541 check_cinv_options (char * operand
)
1556 as_bad (_("Illegal `cinv' parameter: `%c'"), *p
);
1561 /* Retrieve the opcode image of a given register pair.
1562 If the register is illegal for the current instruction,
1566 getregp_image (reg r
)
1568 const reg_entry
*rreg
;
1571 /* Check whether the register is in registers table. */
1573 rreg
= cr16_regptab
+ r
;
1574 /* Register not found. */
1577 as_bad (_("Unknown register pair: `%d'"), r
);
1581 reg_name
= rreg
->name
;
1583 /* Issue a error message when register pair is illegal. */
1584 #define RPAIR_IMAGE_ERR \
1585 as_bad (_("Illegal register pair (`%s') in Instruction: `%s'"), \
1586 reg_name, ins_parse); \
1591 case CR16_RP_REGTYPE
:
1600 /* Retrieve the opcode image of a given index register pair.
1601 If the register is illegal for the current instruction,
1605 getidxregp_image (reg r
)
1607 const reg_entry
*rreg
;
1610 /* Check whether the register is in registers table. */
1612 rreg
= cr16_regptab
+ r
;
1613 /* Register not found. */
1616 as_bad (_("Unknown register pair: `%d'"), r
);
1620 reg_name
= rreg
->name
;
1622 /* Issue a error message when register pair is illegal. */
1623 #define IDX_RPAIR_IMAGE_ERR \
1624 as_bad (_("Illegal index register pair (`%s') in Instruction: `%s'"), \
1625 reg_name, ins_parse); \
1627 if (rreg->type == CR16_RP_REGTYPE)
1629 switch (rreg
->image
)
1631 case 0: return 0; break;
1632 case 2: return 1; break;
1633 case 4: return 2; break;
1634 case 6: return 3; break;
1635 case 8: return 4; break;
1636 case 10: return 5; break;
1637 case 3: return 6; break;
1638 case 5: return 7; break;
1644 IDX_RPAIR_IMAGE_ERR
;
1648 /* Retrieve the opcode image of a given processor register.
1649 If the register is illegal for the current instruction,
1652 getprocreg_image (int r
)
1654 const reg_entry
*rreg
;
1657 /* Check whether the register is in registers table. */
1658 if (r
>= MAX_REG
&& r
< MAX_PREG
)
1659 rreg
= &cr16_pregtab
[r
- MAX_REG
];
1660 /* Register not found. */
1663 as_bad (_("Unknown processor register : `%d'"), r
);
1667 reg_name
= rreg
->name
;
1669 /* Issue a error message when register pair is illegal. */
1670 #define PROCREG_IMAGE_ERR \
1671 as_bad (_("Illegal processor register (`%s') in Instruction: `%s'"), \
1672 reg_name, ins_parse); \
1677 case CR16_P_REGTYPE
:
1686 /* Retrieve the opcode image of a given processor register.
1687 If the register is illegal for the current instruction,
1690 getprocregp_image (int r
)
1692 const reg_entry
*rreg
;
1694 int pregptab_disp
= 0;
1696 /* Check whether the register is in registers table. */
1697 if (r
>= MAX_REG
&& r
< MAX_PREG
)
1702 case 4: pregptab_disp
= 1; break;
1703 case 6: pregptab_disp
= 2; break;
1707 pregptab_disp
= 3; break;
1709 pregptab_disp
= 4; break;
1711 pregptab_disp
= 5; break;
1714 rreg
= &cr16_pregptab
[r
- pregptab_disp
];
1716 /* Register not found. */
1719 as_bad (_("Unknown processor register (32 bit) : `%d'"), r
);
1723 reg_name
= rreg
->name
;
1725 /* Issue a error message when register pair is illegal. */
1726 #define PROCREGP_IMAGE_ERR \
1727 as_bad (_("Illegal 32 bit - processor register (`%s') in Instruction: `%s'"),\
1728 reg_name, ins_parse); \
1733 case CR16_P_REGTYPE
:
1742 /* Routine used to represent integer X using NBITS bits. */
1745 getconstant (long x
, int nbits
)
1747 /* The following expression avoids overflow if
1748 'nbits' is the number of bits in 'bfd_vma'. */
1749 return (x
& ((((1 << (nbits
- 1)) - 1) << 1) | 1));
1752 /* Print a constant value to 'output_opcode':
1753 ARG holds the operand's type and value.
1754 SHIFT represents the location of the operand to be print into.
1755 NBITS determines the size (in bits) of the constant. */
1758 print_constant (int nbits
, int shift
, argument
*arg
)
1760 unsigned long mask
= 0;
1762 long constant
= getconstant (arg
->constant
, nbits
);
1768 /* mask the upper part of the constant, that is, the bits
1769 going to the lowest byte of output_opcode[0].
1770 The upper part of output_opcode[1] is always filled,
1771 therefore it is always masked with 0xFFFF. */
1772 mask
= (1 << (nbits
- 16)) - 1;
1773 /* Divide the constant between two consecutive words :
1775 +---------+---------+---------+---------+
1776 | | X X X X | x X x X | |
1777 +---------+---------+---------+---------+
1778 output_opcode[0] output_opcode[1] */
1780 CR16_PRINT (0, (constant
>> WORD_SHIFT
) & mask
, 0);
1781 CR16_PRINT (1, (constant
& 0xFFFF), WORD_SHIFT
);
1785 if ((nbits
== 21) && (IS_INSN_TYPE (LD_STOR_INS
)))
1791 /* mask the upper part of the constant, that is, the bits
1792 going to the lowest byte of output_opcode[0].
1793 The upper part of output_opcode[1] is always filled,
1794 therefore it is always masked with 0xFFFF. */
1795 mask
= (1 << (nbits
- 16)) - 1;
1796 /* Divide the constant between two consecutive words :
1798 +---------+---------+---------+---------+
1799 | | X X X X | - X - X | |
1800 +---------+---------+---------+---------+
1801 output_opcode[0] output_opcode[1] */
1803 if ((instruction
->size
> 2) && (shift
== WORD_SHIFT
))
1805 if (arg
->type
== arg_idxrp
)
1807 CR16_PRINT (0, ((constant
>> WORD_SHIFT
) & mask
) << 8, 0);
1808 CR16_PRINT (1, (constant
& 0xFFFF), WORD_SHIFT
);
1812 CR16_PRINT (0, (((((constant
>> WORD_SHIFT
) & mask
) << 8) & 0x0f00) | ((((constant
>> WORD_SHIFT
) & mask
) >> 4) & 0xf)),0);
1813 CR16_PRINT (1, (constant
& 0xFFFF), WORD_SHIFT
);
1817 CR16_PRINT (0, constant
, shift
);
1821 if (arg
->type
== arg_idxrp
)
1823 if (instruction
->size
== 2)
1825 CR16_PRINT (0, ((constant
) & 0xf), shift
); /* 0-3 bits. */
1826 CR16_PRINT (0, ((constant
>> 4) & 0x3), (shift
+ 20)); /* 4-5 bits. */
1827 CR16_PRINT (0, ((constant
>> 6) & 0x3), (shift
+ 14)); /* 6-7 bits. */
1828 CR16_PRINT (0, ((constant
>> 8) & 0x3f), (shift
+ 8)); /* 8-13 bits. */
1831 CR16_PRINT (0, constant
, shift
);
1837 /* When instruction size is 3 and 'shift' is 16, a 16-bit constant is
1838 always filling the upper part of output_opcode[1]. If we mistakenly
1839 write it to output_opcode[0], the constant prefix (that is, 'match')
1842 +---------+---------+---------+---------+
1843 | 'match' | | X X X X | |
1844 +---------+---------+---------+---------+
1845 output_opcode[0] output_opcode[1] */
1847 if ((instruction
->size
> 2) && (shift
== WORD_SHIFT
))
1848 CR16_PRINT (1, constant
, WORD_SHIFT
);
1850 CR16_PRINT (0, constant
, shift
);
1854 CR16_PRINT (0, ((constant
/ 2) & 0xf), shift
);
1855 CR16_PRINT (0, ((constant
/ 2) >> 4), (shift
+ 8));
1859 CR16_PRINT (0, constant
, shift
);
1864 /* Print an operand to 'output_opcode', which later on will be
1865 printed to the object file:
1866 ARG holds the operand's type, size and value.
1867 SHIFT represents the printing location of operand.
1868 NBITS determines the size (in bits) of a constant operand. */
1871 print_operand (int nbits
, int shift
, argument
*arg
)
1876 CR16_PRINT (0, arg
->cc
, shift
);
1880 CR16_PRINT (0, getreg_image (arg
->r
), shift
);
1884 CR16_PRINT (0, getregp_image (arg
->rp
), shift
);
1888 CR16_PRINT (0, getprocreg_image (arg
->pr
), shift
);
1892 CR16_PRINT (0, getprocregp_image (arg
->prp
), shift
);
1897 +-----------------------------+
1898 | r_index | disp | rp_base |
1899 +-----------------------------+ */
1901 if (instruction
->size
== 3)
1903 CR16_PRINT (0, getidxregp_image (arg
->rp
), 0);
1904 if (getreg_image (arg
->i_r
) == 12)
1905 CR16_PRINT (0, 0, 3);
1907 CR16_PRINT (0, 1, 3);
1911 CR16_PRINT (0, getidxregp_image (arg
->rp
), 16);
1912 if (getreg_image (arg
->i_r
) == 12)
1913 CR16_PRINT (0, 0, 19);
1915 CR16_PRINT (0, 1, 19);
1917 print_constant (nbits
, shift
, arg
);
1921 if (getreg_image (arg
->i_r
) == 12)
1922 if (IS_INSN_MNEMONIC ("cbitb") || IS_INSN_MNEMONIC ("sbitb")
1923 || IS_INSN_MNEMONIC ("tbitb"))
1924 CR16_PRINT (0, 0, 23);
1925 else CR16_PRINT (0, 0, 24);
1927 if (IS_INSN_MNEMONIC ("cbitb") || IS_INSN_MNEMONIC ("sbitb")
1928 || IS_INSN_MNEMONIC ("tbitb"))
1929 CR16_PRINT (0, 1, 23);
1930 else CR16_PRINT (0, 1, 24);
1932 print_constant (nbits
, shift
, arg
);
1937 print_constant (nbits
, shift
, arg
);
1941 CR16_PRINT (0, getreg_image (arg
->r
), shift
);
1945 print_constant (nbits
, shift
, arg
);
1946 /* Add the register argument to the output_opcode. */
1947 CR16_PRINT (0, getreg_image (arg
->r
), (shift
+16));
1951 print_constant (nbits
, shift
, arg
);
1952 if (instruction
->size
> 1)
1953 CR16_PRINT (0, getregp_image (arg
->rp
), (shift
+ 16));
1954 else if (IS_INSN_TYPE (LD_STOR_INS
) || (IS_INSN_TYPE (CSTBIT_INS
)))
1956 if (instruction
->size
== 2)
1957 CR16_PRINT (0, getregp_image (arg
->rp
), (shift
- 8));
1958 else if (instruction
->size
== 1)
1959 CR16_PRINT (0, getregp_image (arg
->rp
), 16);
1962 CR16_PRINT (0, getregp_image (arg
->rp
), shift
);
1970 /* Retrieve the number of operands for the current assembled instruction. */
1973 get_number_of_operands (void)
1977 for (i
= 0; instruction
->operands
[i
].op_type
&& i
< MAX_OPERANDS
; i
++)
1982 /* Verify that the number NUM can be represented in BITS bits (that is,
1983 within its permitted range), based on the instruction's FLAGS.
1984 If UPDATE is nonzero, update the value of NUM if necessary.
1985 Return OP_LEGAL upon success, actual error type upon failure. */
1988 check_range (long *num
, int bits
, int unsigned flags
, int update
)
1991 op_err retval
= OP_LEGAL
;
1994 if (bits
== 0 && value
> 0) return OP_OUT_OF_RANGE
;
1996 /* For hosts with longs bigger than 32-bits make sure that the top
1997 bits of a 32-bit negative value read in by the parser are set,
1998 so that the correct comparisons are made. */
1999 if (value
& 0x80000000)
2000 value
|= (-1UL << 31);
2003 /* Verify operand value is even. */
2004 if (flags
& OP_EVEN
)
2017 if (flags
& OP_SHIFT
)
2023 else if (flags
& OP_SHIFT_DEC
)
2025 value
= (value
>> 1) - 1;
2030 if (flags
& OP_ABS20
)
2032 if (value
> 0xEFFFF)
2033 return OP_OUT_OF_RANGE
;
2038 if (value
== 0xB || value
== 0x9)
2039 return OP_OUT_OF_RANGE
;
2040 else if (value
== -1)
2048 if (flags
& OP_ESC1
)
2051 return OP_OUT_OF_RANGE
;
2054 if (flags
& OP_SIGNED
)
2056 max
= (1 << (bits
- 1)) - 1;
2057 min
= - (1 << (bits
- 1));
2058 if ((value
> max
) || (value
< min
))
2059 retval
= OP_OUT_OF_RANGE
;
2061 else if (flags
& OP_UNSIGNED
)
2063 max
= ((((1 << (bits
- 1)) - 1) << 1) | 1);
2065 if (((unsigned long) value
> (unsigned long) max
)
2066 || ((unsigned long) value
< (unsigned long) min
))
2067 retval
= OP_OUT_OF_RANGE
;
2069 else if (flags
& OP_NEG
)
2072 min
= - ((1 << (bits
- 1)) - 1);
2073 if ((value
> max
) || (value
< min
))
2074 retval
= OP_OUT_OF_RANGE
;
2079 /* Bunch of error checking.
2080 The checks are made after a matching instruction was found. */
2083 warn_if_needed (ins
*insn
)
2085 /* If the post-increment address mode is used and the load/store
2086 source register is the same as rbase, the result of the
2087 instruction is undefined. */
2088 if (IS_INSN_TYPE (LD_STOR_INS_INC
))
2090 /* Enough to verify that one of the arguments is a simple reg. */
2091 if ((insn
->arg
[0].type
== arg_r
) || (insn
->arg
[1].type
== arg_r
))
2092 if (insn
->arg
[0].r
== insn
->arg
[1].r
)
2093 as_bad (_("Same src/dest register is used (`r%d'), result is undefined"), insn
->arg
[0].r
);
2096 if (IS_INSN_MNEMONIC ("pop")
2097 || IS_INSN_MNEMONIC ("push")
2098 || IS_INSN_MNEMONIC ("popret"))
2100 unsigned int count
= insn
->arg
[0].constant
, reg_val
;
2102 /* Check if count operand caused to save/retrieve the RA twice
2103 to generate warning message. */
2104 if (insn
->nargs
> 2)
2106 reg_val
= getreg_image (insn
->arg
[1].r
);
2108 if ( ((reg_val
== 9) && (count
> 7))
2109 || ((reg_val
== 10) && (count
> 6))
2110 || ((reg_val
== 11) && (count
> 5))
2111 || ((reg_val
== 12) && (count
> 4))
2112 || ((reg_val
== 13) && (count
> 2))
2113 || ((reg_val
== 14) && (count
> 0)))
2114 as_warn (_("RA register is saved twice."));
2116 /* Check if the third operand is "RA" or "ra" */
2117 if (!(((insn
->arg
[2].r
) == ra
) || ((insn
->arg
[2].r
) == RA
)))
2118 as_bad (_("`%s' Illegal use of registers."), ins_parse
);
2121 if (insn
->nargs
> 1)
2123 reg_val
= getreg_image (insn
->arg
[1].r
);
2125 /* If register is a register pair ie r12/r13/r14 in operand1, then
2126 the count constant should be validated. */
2127 if (((reg_val
== 11) && (count
> 7))
2128 || ((reg_val
== 12) && (count
> 6))
2129 || ((reg_val
== 13) && (count
> 4))
2130 || ((reg_val
== 14) && (count
> 2))
2131 || ((reg_val
== 15) && (count
> 0)))
2132 as_bad (_("`%s' Illegal count-register combination."), ins_parse
);
2136 /* Check if the operand is "RA" or "ra" */
2137 if (!(((insn
->arg
[0].r
) == ra
) || ((insn
->arg
[0].r
) == RA
)))
2138 as_bad (_("`%s' Illegal use of register."), ins_parse
);
2142 /* Some instruction assume the stack pointer as rptr operand.
2143 Issue an error when the register to be loaded is also SP. */
2144 if (instruction
->flags
& NO_SP
)
2146 if (getreg_image (insn
->arg
[1].r
) == getreg_image (sp
))
2147 as_bad (_("`%s' has undefined result"), ins_parse
);
2150 /* If the rptr register is specified as one of the registers to be loaded,
2151 the final contents of rptr are undefined. Thus, we issue an error. */
2152 if (instruction
->flags
& NO_RPTR
)
2154 if ((1 << getreg_image (insn
->arg
[0].r
)) & insn
->arg
[1].constant
)
2155 as_bad (_("Same src/dest register is used (`r%d'),result is undefined"),
2156 getreg_image (insn
->arg
[0].r
));
2160 /* In some cases, we need to adjust the instruction pointer although a
2161 match was already found. Here, we gather all these cases.
2162 Returns 1 if instruction pointer was adjusted, otherwise 0. */
2165 adjust_if_needed (ins
*insn ATTRIBUTE_UNUSED
)
2169 if ((IS_INSN_TYPE (CSTBIT_INS
)) || (IS_INSN_TYPE (LD_STOR_INS
)))
2171 if ((instruction
->operands
[0].op_type
== abs24
)
2172 && ((insn
->arg
[0].constant
) > 0xF00000))
2174 insn
->arg
[0].constant
&= 0xFFFFF;
2183 /* Assemble a single instruction:
2184 INSN is already parsed (that is, all operand values and types are set).
2185 For instruction to be assembled, we need to find an appropriate template in
2186 the instruction table, meeting the following conditions:
2187 1: Has the same number of operands.
2188 2: Has the same operand types.
2189 3: Each operand size is sufficient to represent the instruction's values.
2190 Returns 1 upon success, 0 upon failure. */
2193 assemble_insn (const char *mnemonic
, ins
*insn
)
2195 /* Type of each operand in the current template. */
2196 argtype cur_type
[MAX_OPERANDS
];
2197 /* Size (in bits) of each operand in the current template. */
2198 unsigned int cur_size
[MAX_OPERANDS
];
2199 /* Flags of each operand in the current template. */
2200 unsigned int cur_flags
[MAX_OPERANDS
];
2201 /* Instruction type to match. */
2202 unsigned int ins_type
;
2203 /* Boolean flag to mark whether a match was found. */
2206 /* Nonzero if an instruction with same number of operands was found. */
2207 int found_same_number_of_operands
= 0;
2208 /* Nonzero if an instruction with same argument types was found. */
2209 int found_same_argument_types
= 0;
2210 /* Nonzero if a constant was found within the required range. */
2211 int found_const_within_range
= 0;
2212 /* Argument number of an operand with invalid type. */
2213 int invalid_optype
= -1;
2214 /* Argument number of an operand with invalid constant value. */
2215 int invalid_const
= -1;
2216 /* Operand error (used for issuing various constant error messages). */
2217 op_err op_error
, const_err
= OP_LEGAL
;
2219 /* Retrieve data (based on FUNC) for each operand of a given instruction. */
2220 #define GET_CURRENT_DATA(FUNC, ARRAY) \
2221 for (i = 0; i < insn->nargs; i++) \
2222 ARRAY[i] = FUNC (instruction->operands[i].op_type)
2224 #define GET_CURRENT_TYPE GET_CURRENT_DATA (get_optype, cur_type)
2225 #define GET_CURRENT_SIZE GET_CURRENT_DATA (get_opbits, cur_size)
2226 #define GET_CURRENT_FLAGS GET_CURRENT_DATA (get_opflags, cur_flags)
2228 /* Instruction has no operands -> only copy the constant opcode. */
2229 if (insn
->nargs
== 0)
2231 output_opcode
[0] = BIN (instruction
->match
, instruction
->match_bits
);
2235 /* In some case, same mnemonic can appear with different instruction types.
2236 For example, 'storb' is supported with 3 different types :
2237 LD_STOR_INS, LD_STOR_INS_INC, STOR_IMM_INS.
2238 We assume that when reaching this point, the instruction type was
2239 pre-determined. We need to make sure that the type stays the same
2240 during a search for matching instruction. */
2241 ins_type
= CR16_INS_TYPE (instruction
->flags
);
2243 while (/* Check that match is still not found. */
2245 /* Check we didn't get to end of table. */
2246 && instruction
->mnemonic
!= NULL
2247 /* Check that the actual mnemonic is still available. */
2248 && IS_INSN_MNEMONIC (mnemonic
)
2249 /* Check that the instruction type wasn't changed. */
2250 && IS_INSN_TYPE (ins_type
))
2252 /* Check whether number of arguments is legal. */
2253 if (get_number_of_operands () != insn
->nargs
)
2255 found_same_number_of_operands
= 1;
2257 /* Initialize arrays with data of each operand in current template. */
2262 /* Check for type compatibility. */
2263 for (i
= 0; i
< insn
->nargs
; i
++)
2265 if (cur_type
[i
] != insn
->arg
[i
].type
)
2267 if (invalid_optype
== -1)
2268 invalid_optype
= i
+ 1;
2272 found_same_argument_types
= 1;
2274 for (i
= 0; i
< insn
->nargs
; i
++)
2276 /* If 'bal' instruction size is '2' and reg operand is not 'ra'
2277 then goto next instruction. */
2278 if (IS_INSN_MNEMONIC ("bal") && (i
== 0)
2279 && (instruction
->size
== 2) && (insn
->arg
[i
].rp
!= 14))
2282 /* If 'storb' instruction with 'sp' reg and 16-bit disp of
2283 * reg-pair, leads to undefined trap, so this should use
2284 * 20-bit disp of reg-pair. */
2285 if (IS_INSN_MNEMONIC ("storb") && (instruction
->size
== 2)
2286 && (insn
->arg
[i
].r
== 15) && (insn
->arg
[i
+ 1].type
== arg_crp
))
2289 /* Only check range - don't update the constant's value, since the
2290 current instruction may not be the last we try to match.
2291 The constant's value will be updated later, right before printing
2292 it to the object file. */
2293 if ((insn
->arg
[i
].X_op
== O_constant
)
2294 && (op_error
= check_range (&insn
->arg
[i
].constant
, cur_size
[i
],
2297 if (invalid_const
== -1)
2299 invalid_const
= i
+ 1;
2300 const_err
= op_error
;
2304 /* For symbols, we make sure the relocation size (which was already
2305 determined) is sufficient. */
2306 else if ((insn
->arg
[i
].X_op
== O_symbol
)
2307 && ((bfd_reloc_type_lookup (stdoutput
, insn
->rtype
))->bitsize
2311 found_const_within_range
= 1;
2313 /* If we got till here -> Full match is found. */
2317 /* Try again with next instruction. */
2324 /* We haven't found a match - instruction can't be assembled. */
2325 if (!found_same_number_of_operands
)
2326 as_bad (_("Incorrect number of operands"));
2327 else if (!found_same_argument_types
)
2328 as_bad (_("Illegal type of operand (arg %d)"), invalid_optype
);
2329 else if (!found_const_within_range
)
2333 case OP_OUT_OF_RANGE
:
2334 as_bad (_("Operand out of range (arg %d)"), invalid_const
);
2337 as_bad (_("Operand has odd displacement (arg %d)"), invalid_const
);
2340 as_bad (_("Illegal operand (arg %d)"), invalid_const
);
2348 /* Full match - print the encoding to output file. */
2350 /* Make further checking (such that couldn't be made earlier).
2351 Warn the user if necessary. */
2352 warn_if_needed (insn
);
2354 /* Check whether we need to adjust the instruction pointer. */
2355 if (adjust_if_needed (insn
))
2356 /* If instruction pointer was adjusted, we need to update
2357 the size of the current template operands. */
2360 for (i
= 0; i
< insn
->nargs
; i
++)
2362 int j
= instruction
->flags
& REVERSE_MATCH
?
2367 /* This time, update constant value before printing it. */
2368 if ((insn
->arg
[j
].X_op
== O_constant
)
2369 && (check_range (&insn
->arg
[j
].constant
, cur_size
[j
],
2370 cur_flags
[j
], 1) != OP_LEGAL
))
2371 as_fatal (_("Illegal operand (arg %d)"), j
+1);
2374 /* First, copy the instruction's opcode. */
2375 output_opcode
[0] = BIN (instruction
->match
, instruction
->match_bits
);
2377 for (i
= 0; i
< insn
->nargs
; i
++)
2379 /* For BAL (ra),disp17 instruction only. And also set the
2380 DISP24a relocation type. */
2381 if (IS_INSN_MNEMONIC ("bal") && (instruction
->size
== 2) && i
== 0)
2383 insn
->rtype
= BFD_RELOC_CR16_DISP24a
;
2387 print_operand (cur_size
[i
], instruction
->operands
[i
].shift
,
2395 /* Print the instruction.
2396 Handle also cases where the instruction is relaxable/relocatable. */
2399 print_insn (ins
*insn
)
2401 unsigned int i
, j
, insn_size
;
2403 unsigned short words
[4];
2406 /* Arrange the insn encodings in a WORD size array. */
2407 for (i
= 0, j
= 0; i
< 2; i
++)
2409 words
[j
++] = (output_opcode
[i
] >> 16) & 0xFFFF;
2410 words
[j
++] = output_opcode
[i
] & 0xFFFF;
2413 /* Handle relocation. */
2414 if ((instruction
->flags
& RELAXABLE
) && relocatable
)
2417 /* Write the maximal instruction size supported. */
2418 insn_size
= INSN_MAX_SIZE
;
2420 if (IS_INSN_TYPE (BRANCH_INS
))
2422 switch (insn
->rtype
)
2424 case BFD_RELOC_CR16_DISP24
:
2427 case BFD_RELOC_CR16_DISP16
:
2438 this_frag
= frag_var (rs_machine_dependent
, insn_size
*2,
2440 insn
->exp
.X_add_symbol
,
2446 insn_size
= instruction
->size
;
2447 this_frag
= frag_more (insn_size
* 2);
2449 if ((relocatable
) && (insn
->rtype
!= BFD_RELOC_NONE
))
2451 reloc_howto_type
*reloc_howto
;
2454 reloc_howto
= bfd_reloc_type_lookup (stdoutput
, insn
->rtype
);
2459 size
= bfd_get_reloc_size (reloc_howto
);
2461 if (size
< 1 || size
> 4)
2464 fix_new_exp (frag_now
, this_frag
- frag_now
->fr_literal
,
2465 size
, &insn
->exp
, reloc_howto
->pc_relative
,
2470 /* Verify a 2-byte code alignment. */
2471 addr_mod
= frag_now_fix () & 1;
2472 if (frag_now
->has_code
&& frag_now
->insn_addr
!= addr_mod
)
2473 as_bad (_("instruction address is not a multiple of 2"));
2474 frag_now
->insn_addr
= addr_mod
;
2475 frag_now
->has_code
= 1;
2477 /* Write the instruction encoding to frag. */
2478 for (i
= 0; i
< insn_size
; i
++)
2480 md_number_to_chars (this_frag
, (valueT
) words
[i
], 2);
2485 /* Actually assemble an instruction. */
2488 cr16_assemble (const char *op
, char *param
)
2492 /* Find the instruction. */
2493 instruction
= (const inst
*) str_hash_find (cr16_inst_hash
, op
);
2494 if (instruction
== NULL
)
2496 as_bad (_("Unknown opcode: `%s'"), op
);
2500 /* Tie dwarf2 debug info to the address at the start of the insn. */
2501 dwarf2_emit_insn (0);
2503 /* Parse the instruction's operands. */
2504 parse_insn (&cr16_ins
, param
);
2506 /* Assemble the instruction - return upon failure. */
2507 if (assemble_insn (op
, &cr16_ins
) == 0)
2510 /* Print the instruction. */
2511 print_insn (&cr16_ins
);
2514 /* This is the guts of the machine-dependent assembler. OP points to a
2515 machine dependent instruction. This function is supposed to emit
2516 the frags/bytes it assembles to. */
2519 md_assemble (char *op
)
2522 char *param
, param1
[32];
2524 /* Reset global variables for a new instruction. */
2527 /* Strip the mnemonic. */
2528 for (param
= op
; *param
!= 0 && !ISSPACE (*param
); param
++)
2532 /* bCC instructions and adjust the mnemonic by adding extra white spaces. */
2533 if (is_bcc_insn (op
))
2535 strcpy (param1
, get_b_cc (op
));
2536 strcat (param1
,",");
2537 strcat (param1
, param
);
2538 param
= (char *) ¶m1
;
2539 cr16_assemble ("b", param
);
2543 /* Checking the cinv options and adjust the mnemonic by removing the
2544 extra white spaces. */
2545 if (streq ("cinv", op
))
2547 /* Validate the cinv options. */
2548 unsigned int op_len
, param_len
;
2549 check_cinv_options (param
);
2550 op_len
= strlen (op
);
2551 param_len
= strlen (param
) + 1;
2552 memmove (op
+ op_len
, param
, param_len
);
2555 /* MAPPING - SHIFT INSN, if imm4/imm16 positive values
2556 lsh[b/w] imm4/imm6, reg ==> ashu[b/w] imm4/imm16, reg
2557 as CR16 core doesn't support lsh[b/w] right shift operations. */
2558 if ((streq ("lshb", op
) || streq ("lshw", op
) || streq ("lshd", op
))
2559 && (param
[0] == '$'))
2561 strcpy (param1
, param
);
2562 /* Find the instruction. */
2563 instruction
= (const inst
*) str_hash_find (cr16_inst_hash
, op
);
2564 parse_operands (&cr16_ins
, param1
);
2565 if (((&cr16_ins
)->arg
[0].type
== arg_ic
)
2566 && ((&cr16_ins
)->arg
[0].constant
>= 0))
2568 if (streq ("lshb", op
))
2569 cr16_assemble ("ashub", param
);
2570 else if (streq ("lshd", op
))
2571 cr16_assemble ("ashud", param
);
2573 cr16_assemble ("ashuw", param
);
2578 cr16_assemble (op
, param
);