1 /* tc-cr16.c -- Assembler code for the CR16 CPU core.
2 Copyright (C) 2007-2020 Free Software Foundation, Inc.
4 Contributed by M R Swami Reddy <MR.Swami.Reddy@nsc.com>
6 This file is part of GAS, the GNU Assembler.
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3, or (at your option)
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to the
20 Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
21 MA 02110-1301, USA. */
24 #include "safe-ctype.h"
25 #include "dwarf2dbg.h"
26 #include "opcode/cr16.h"
30 /* Word is considered here as a 16-bit unsigned short int. */
33 /* Register is 2-byte size. */
36 /* Maximum size of a single instruction (in words). */
37 #define INSN_MAX_SIZE 3
39 /* Maximum bits which may be set in a `mask16' operand. */
40 #define MAX_REGS_IN_MASK16 8
42 /* Assign a number NUM, shifted by SHIFT bytes, into a location
43 pointed by index BYTE of array 'output_opcode'. */
44 #define CR16_PRINT(BYTE, NUM, SHIFT) output_opcode[BYTE] |= (NUM << SHIFT)
49 OP_LEGAL
= 0, /* Legal operand. */
50 OP_OUT_OF_RANGE
, /* Operand not within permitted range. */
51 OP_NOT_EVEN
/* Operand is Odd number, should be even. */
55 /* Opcode mnemonics hash table. */
56 static htab_t cr16_inst_hash
;
57 /* CR16 registers hash table. */
58 static htab_t reg_hash
;
59 /* CR16 register pair hash table. */
60 static htab_t regp_hash
;
61 /* CR16 processor registers hash table. */
62 static htab_t preg_hash
;
63 /* CR16 processor registers 32 bit hash table. */
64 static htab_t pregp_hash
;
65 /* Current instruction we're assembling. */
66 const inst
*instruction
;
69 static int code_label
= 0;
71 /* Global variables. */
73 /* Array to hold an instruction encoding. */
74 long output_opcode
[2];
76 /* Nonzero means a relocatable symbol. */
79 /* A copy of the original instruction (used in error messages). */
80 char ins_parse
[MAX_INST_LEN
];
82 /* The current processed argument number. */
85 /* Generic assembler global variables which must be defined by all targets. */
87 /* Characters which always start a comment. */
88 const char comment_chars
[] = "#";
90 /* Characters which start a comment at the beginning of a line. */
91 const char line_comment_chars
[] = "#";
93 /* This array holds machine specific line separator characters. */
94 const char line_separator_chars
[] = ";";
96 /* Chars that can be used to separate mant from exp in floating point nums. */
97 const char EXP_CHARS
[] = "eE";
99 /* Chars that mean this number is a floating point constant as in 0f12.456 */
100 const char FLT_CHARS
[] = "f'";
103 /* Pre-defined "_GLOBAL_OFFSET_TABLE_" */
104 symbolS
* GOT_symbol
;
107 /* Target-specific multicharacter options, not const-declared at usage. */
108 const char *md_shortopts
= "";
109 struct option md_longopts
[] =
111 {NULL
, no_argument
, NULL
, 0}
113 size_t md_longopts_size
= sizeof (md_longopts
);
121 #ifdef md_flush_pending_output
122 md_flush_pending_output ();
125 if (is_it_end_of_statement ())
127 demand_empty_rest_of_line ();
131 #ifdef TC_ADDRESS_BYTES
133 nbytes
= TC_ADDRESS_BYTES ();
137 md_cons_align (nbytes
);
143 unsigned int bits_available
= BITS_PER_CHAR
* nbytes
;
144 char *hold
= input_line_pointer
;
148 if (*input_line_pointer
== ':')
157 if (*input_line_pointer
!= ':')
159 input_line_pointer
= hold
;
162 if (exp
.X_op
== O_absent
)
164 as_warn (_("using a bit field width of zero"));
165 exp
.X_add_number
= 0;
166 exp
.X_op
= O_constant
;
169 if (exp
.X_op
!= O_constant
)
171 *input_line_pointer
= '\0';
172 as_bad (_("field width \"%s\" too complex for a bitfield"), hold
);
173 *input_line_pointer
= ':';
174 demand_empty_rest_of_line ();
178 if ((width
= exp
.X_add_number
) >
179 (unsigned int)(BITS_PER_CHAR
* nbytes
))
181 as_warn (ngettext ("field width %lu too big to fit in %d"
182 " byte: truncated to %d bits",
183 "field width %lu too big to fit in %d"
184 " bytes: truncated to %d bits",
186 width
, nbytes
, (BITS_PER_CHAR
* nbytes
));
187 width
= BITS_PER_CHAR
* nbytes
;
191 if (width
> bits_available
)
193 /* FIXME-SOMEDAY: backing up and reparsing is wasteful. */
194 input_line_pointer
= hold
;
195 exp
.X_add_number
= value
;
200 hold
= ++input_line_pointer
;
203 if (exp
.X_op
!= O_constant
)
205 char cache
= *input_line_pointer
;
207 *input_line_pointer
= '\0';
208 as_bad (_("field value \"%s\" too complex for a bitfield"), hold
);
209 *input_line_pointer
= cache
;
210 demand_empty_rest_of_line ();
214 value
|= ((~(-(1 << width
)) & exp
.X_add_number
)
215 << ((BITS_PER_CHAR
* nbytes
) - bits_available
));
217 if ((bits_available
-= width
) == 0
218 || is_it_end_of_statement ()
219 || *input_line_pointer
!= ',')
222 hold
= ++input_line_pointer
;
226 exp
.X_add_number
= value
;
227 exp
.X_op
= O_constant
;
231 if ((*(input_line_pointer
) == '@') && (*(input_line_pointer
+1) == 'c'))
233 emit_expr (&exp
, (unsigned int) nbytes
);
235 if ((*(input_line_pointer
) == '@') && (*(input_line_pointer
+1) == 'c'))
237 input_line_pointer
+=3;
241 while ((*input_line_pointer
++ == ','));
243 /* Put terminator back into stream. */
244 input_line_pointer
--;
246 demand_empty_rest_of_line ();
249 /* This table describes all the machine specific pseudo-ops
250 the assembler has to support. The fields are:
251 *** Pseudo-op name without dot.
252 *** Function to call to execute this pseudo-op.
253 *** Integer arg to pass to the function. */
255 const pseudo_typeS md_pseudo_table
[] =
257 /* In CR16 machine, align is in bytes (not a ptwo boundary). */
258 {"align", s_align_bytes
, 0},
259 {"long", l_cons
, 4 },
260 {"4byte", l_cons
, 4 },
264 /* CR16 relaxation table. */
265 const relax_typeS md_relax_table
[] =
268 {0x7f, -0x80, 2, 1}, /* 8 */
269 {0xfffe, -0x10000, 4, 2}, /* 16 */
270 {0xfffffe, -0x1000000, 6, 0}, /* 24 */
273 /* Return the bit size for a given operand. */
276 get_opbits (operand_type op
)
279 return cr16_optab
[op
].bit_size
;
284 /* Return the argument type of a given operand. */
287 get_optype (operand_type op
)
290 return cr16_optab
[op
].arg_type
;
295 /* Return the flags of a given operand. */
298 get_opflags (operand_type op
)
301 return cr16_optab
[op
].flags
;
306 /* Get the cc code. */
309 get_cc (char *cc_name
)
313 for (i
= 0; i
< cr16_num_cc
; i
++)
314 if (strcmp (cc_name
, cr16_b_cond_tab
[i
]) == 0)
320 /* Get the core processor register 'reg_name'. */
323 get_register (char *reg_name
)
325 const reg_entry
*rreg
;
327 rreg
= (const reg_entry
*) str_hash_find (reg_hash
, reg_name
);
330 return rreg
->value
.reg_val
;
334 /* Get the core processor register-pair 'reg_name'. */
337 get_register_pair (char *reg_name
)
339 const reg_entry
*rreg
;
340 char tmp_rp
[16]="\0";
342 /* Add '(' and ')' to the reg pair, if it's not present. */
343 if (reg_name
[0] != '(')
346 strcat (tmp_rp
, reg_name
);
348 rreg
= (const reg_entry
*) str_hash_find (regp_hash
, tmp_rp
);
351 rreg
= (const reg_entry
*) str_hash_find (regp_hash
, reg_name
);
354 return rreg
->value
.reg_val
;
359 /* Get the index register 'reg_name'. */
362 get_index_register (char *reg_name
)
364 const reg_entry
*rreg
;
366 rreg
= (const reg_entry
*) str_hash_find (reg_hash
, reg_name
);
369 && ((rreg
->value
.reg_val
== 12) || (rreg
->value
.reg_val
== 13)))
370 return rreg
->value
.reg_val
;
374 /* Get the core processor index register-pair 'reg_name'. */
377 get_index_register_pair (char *reg_name
)
379 const reg_entry
*rreg
;
381 rreg
= (const reg_entry
*) str_hash_find (regp_hash
, reg_name
);
385 if ((rreg
->value
.reg_val
!= 1) || (rreg
->value
.reg_val
!= 7)
386 || (rreg
->value
.reg_val
!= 9) || (rreg
->value
.reg_val
> 10))
387 return rreg
->value
.reg_val
;
389 as_bad (_("Unknown register pair - index relative mode: `%d'"), rreg
->value
.reg_val
);
395 /* Get the processor register 'preg_name'. */
398 get_pregister (char *preg_name
)
400 const reg_entry
*prreg
;
402 prreg
= (const reg_entry
*) str_hash_find (preg_hash
, preg_name
);
405 return prreg
->value
.preg_val
;
407 return nullpregister
;
410 /* Get the processor register 'preg_name 32 bit'. */
413 get_pregisterp (char *preg_name
)
415 const reg_entry
*prreg
;
417 prreg
= (const reg_entry
*) str_hash_find (pregp_hash
, preg_name
);
420 return prreg
->value
.preg_val
;
422 return nullpregister
;
426 /* Round up a section size to the appropriate boundary. */
429 md_section_align (segT seg
, valueT val
)
431 /* Round .text section to a multiple of 2. */
432 if (seg
== text_section
)
433 return (val
+ 1) & ~1;
437 /* Parse an operand that is machine-specific (remove '*'). */
440 md_operand (expressionS
* exp
)
442 char c
= *input_line_pointer
;
447 input_line_pointer
++;
455 /* Reset global variables before parsing a new instruction. */
458 reset_vars (char *op
)
460 cur_arg_num
= relocatable
= 0;
461 memset (& output_opcode
, '\0', sizeof (output_opcode
));
463 /* Save a copy of the original OP (used in error messages). */
464 strncpy (ins_parse
, op
, sizeof ins_parse
- 1);
465 ins_parse
[sizeof ins_parse
- 1] = 0;
468 /* This macro decides whether a particular reloc is an entry in a
469 switch table. It is used when relaxing, because the linker needs
470 to know about all such entries so that it can adjust them if
473 #define SWITCH_TABLE(fix) \
474 ( (fix)->fx_addsy != NULL \
475 && (fix)->fx_subsy != NULL \
476 && S_GET_SEGMENT ((fix)->fx_addsy) == \
477 S_GET_SEGMENT ((fix)->fx_subsy) \
478 && S_GET_SEGMENT (fix->fx_addsy) != undefined_section \
479 && ( (fix)->fx_r_type == BFD_RELOC_CR16_NUM8 \
480 || (fix)->fx_r_type == BFD_RELOC_CR16_NUM16 \
481 || (fix)->fx_r_type == BFD_RELOC_CR16_NUM32 \
482 || (fix)->fx_r_type == BFD_RELOC_CR16_NUM32a))
484 /* See whether we need to force a relocation into the output file.
485 This is used to force out switch and PC relative relocations when
489 cr16_force_relocation (fixS
*fix
)
491 if (generic_force_reloc (fix
) || SWITCH_TABLE (fix
))
497 /* Record a fixup for a cons expression. */
500 cr16_cons_fix_new (fragS
*frag
, int offset
, int len
, expressionS
*exp
,
501 bfd_reloc_code_real_type rtype
)
505 default: rtype
= BFD_RELOC_NONE
; break;
506 case 1: rtype
= BFD_RELOC_CR16_NUM8
; break;
507 case 2: rtype
= BFD_RELOC_CR16_NUM16
; break;
511 rtype
= BFD_RELOC_CR16_NUM32a
;
515 rtype
= BFD_RELOC_CR16_NUM32
;
519 fix_new_exp (frag
, offset
, len
, exp
, 0, rtype
);
522 /* Generate a relocation entry for a fixup. */
525 tc_gen_reloc (asection
*section ATTRIBUTE_UNUSED
, fixS
* fixP
)
529 /* If symbols are local and resolved, then no relocation needed. */
530 if ( ((fixP
->fx_addsy
)
531 && (S_GET_SEGMENT (fixP
->fx_addsy
) == absolute_section
))
533 && (S_GET_SEGMENT (fixP
->fx_subsy
) == absolute_section
)))
536 reloc
= XNEW (arelent
);
537 reloc
->sym_ptr_ptr
= XNEW (asymbol
*);
538 *reloc
->sym_ptr_ptr
= symbol_get_bfdsym (fixP
->fx_addsy
);
539 reloc
->address
= fixP
->fx_frag
->fr_address
+ fixP
->fx_where
;
540 reloc
->addend
= fixP
->fx_offset
;
542 if (fixP
->fx_subsy
!= NULL
)
544 if (SWITCH_TABLE (fixP
))
546 /* Keep the current difference in the addend. */
547 reloc
->addend
= (S_GET_VALUE (fixP
->fx_addsy
)
548 - S_GET_VALUE (fixP
->fx_subsy
) + fixP
->fx_offset
);
550 switch (fixP
->fx_r_type
)
552 case BFD_RELOC_CR16_NUM8
:
553 fixP
->fx_r_type
= BFD_RELOC_CR16_SWITCH8
;
555 case BFD_RELOC_CR16_NUM16
:
556 fixP
->fx_r_type
= BFD_RELOC_CR16_SWITCH16
;
558 case BFD_RELOC_CR16_NUM32
:
559 fixP
->fx_r_type
= BFD_RELOC_CR16_SWITCH32
;
561 case BFD_RELOC_CR16_NUM32a
:
562 fixP
->fx_r_type
= BFD_RELOC_CR16_NUM32a
;
571 /* We only resolve difference expressions in the same section. */
572 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
573 _("can't resolve `%s' {%s section} - `%s' {%s section}"),
574 fixP
->fx_addsy
? S_GET_NAME (fixP
->fx_addsy
) : "0",
575 segment_name (fixP
->fx_addsy
576 ? S_GET_SEGMENT (fixP
->fx_addsy
)
578 S_GET_NAME (fixP
->fx_subsy
),
579 segment_name (S_GET_SEGMENT (fixP
->fx_addsy
)));
583 if ((fixP
->fx_r_type
== BFD_RELOC_CR16_GOT_REGREL20
)
585 && fixP
->fx_addsy
== GOT_symbol
)
587 reloc
->addend
= fixP
->fx_offset
= reloc
->address
;
589 else if ((fixP
->fx_r_type
== BFD_RELOC_CR16_GOTC_REGREL20
)
591 && fixP
->fx_addsy
== GOT_symbol
)
593 reloc
->addend
= fixP
->fx_offset
= reloc
->address
;
597 gas_assert ((int) fixP
->fx_r_type
> 0);
598 reloc
->howto
= bfd_reloc_type_lookup (stdoutput
, fixP
->fx_r_type
);
600 if (reloc
->howto
== NULL
)
602 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
603 _("internal error: reloc %d (`%s') not supported by object file format"),
605 bfd_get_reloc_code_name (fixP
->fx_r_type
));
608 gas_assert (!fixP
->fx_pcrel
== !reloc
->howto
->pc_relative
);
613 /* Prepare machine-dependent frags for relaxation. */
616 md_estimate_size_before_relax (fragS
*fragp
, asection
*seg
)
618 /* If symbol is undefined or located in a different section,
619 select the largest supported relocation. */
620 relax_substateT subtype
;
621 relax_substateT rlx_state
[] = {0, 2};
623 for (subtype
= 0; subtype
< ARRAY_SIZE (rlx_state
); subtype
+= 2)
625 if (fragp
->fr_subtype
== rlx_state
[subtype
]
626 && (!S_IS_DEFINED (fragp
->fr_symbol
)
627 || seg
!= S_GET_SEGMENT (fragp
->fr_symbol
)))
629 fragp
->fr_subtype
= rlx_state
[subtype
+ 1];
634 if (fragp
->fr_subtype
>= ARRAY_SIZE (md_relax_table
))
637 return md_relax_table
[fragp
->fr_subtype
].rlx_length
;
641 md_convert_frag (bfd
*abfd ATTRIBUTE_UNUSED
, asection
*sec
, fragS
*fragP
)
643 /* 'opcode' points to the start of the instruction, whether
644 we need to change the instruction's fixed encoding. */
645 char *opcode
= &fragP
->fr_literal
[0] + fragP
->fr_fix
;
646 bfd_reloc_code_real_type reloc
;
648 subseg_change (sec
, 0);
650 switch (fragP
->fr_subtype
)
653 reloc
= BFD_RELOC_CR16_DISP8
;
656 /* If the subtype is not changed due to :m operand qualifier,
657 then no need to update the opcode value. */
658 if ((int)opcode
[1] != 0x18)
660 opcode
[0] = (opcode
[0] & 0xf0);
663 reloc
= BFD_RELOC_CR16_DISP16
;
666 /* If the subtype is not changed due to :l operand qualifier,
667 then no need to update the opcode value. */
668 if ((int)opcode
[1] != 0)
670 opcode
[2] = opcode
[0];
671 opcode
[0] = opcode
[1];
674 reloc
= BFD_RELOC_CR16_DISP24
;
680 fix_new (fragP
, fragP
->fr_fix
,
681 bfd_get_reloc_size (bfd_reloc_type_lookup (stdoutput
, reloc
)),
682 fragP
->fr_symbol
, fragP
->fr_offset
, 1, reloc
);
684 fragP
->fr_fix
+= md_relax_table
[fragP
->fr_subtype
].rlx_length
;
688 md_undefined_symbol (char *name
)
690 if (*name
== '_' && *(name
+ 1) == 'G'
691 && strcmp (name
, "_GLOBAL_OFFSET_TABLE_") == 0)
695 if (symbol_find (name
))
696 as_bad (_("GOT already in symbol table"));
697 GOT_symbol
= symbol_new (name
, undefined_section
,
698 &zero_address_frag
, 0);
705 /* Process machine-dependent command line options. Called once for
706 each option on the command line that the machine-independent part of
707 GAS does not understand. */
710 md_parse_option (int c ATTRIBUTE_UNUSED
, const char *arg ATTRIBUTE_UNUSED
)
715 /* Machine-dependent usage-output. */
718 md_show_usage (FILE *stream ATTRIBUTE_UNUSED
)
724 md_atof (int type
, char *litP
, int *sizeP
)
726 return ieee_md_atof (type
, litP
, sizeP
, target_big_endian
);
729 /* Apply a fixS (fixup of an instruction or data that we didn't have
730 enough info to complete immediately) to the data in a frag.
731 Since linkrelax is nonzero and TC_LINKRELAX_FIXUP is defined to disable
732 relaxation of debug sections, this function is called only when
733 fixuping relocations of debug sections. */
736 md_apply_fix (fixS
*fixP
, valueT
*valP
, segT seg
)
740 if (fixP
->fx_addsy
== NULL
741 && fixP
->fx_pcrel
== 0)
743 else if (fixP
->fx_pcrel
== 1
744 && fixP
->fx_addsy
!= NULL
745 && S_GET_SEGMENT (fixP
->fx_addsy
) == seg
)
750 if (fixP
->fx_addsy
!= NULL
&& !fixP
->fx_pcrel
)
752 val
= fixP
->fx_offset
;
758 char *buf
= fixP
->fx_frag
->fr_literal
+ fixP
->fx_where
;
762 switch (fixP
->fx_r_type
)
764 case BFD_RELOC_CR16_NUM8
:
765 bfd_put_8 (stdoutput
, (unsigned char) val
, buf
);
767 case BFD_RELOC_CR16_NUM16
:
768 bfd_put_16 (stdoutput
, val
, buf
);
770 case BFD_RELOC_CR16_NUM32
:
771 bfd_put_32 (stdoutput
, val
, buf
);
773 case BFD_RELOC_CR16_NUM32a
:
774 bfd_put_32 (stdoutput
, val
, buf
);
777 /* We shouldn't ever get here because linkrelax is nonzero. */
784 fixP
->fx_offset
= * valP
;
787 /* The location from which a PC relative jump should be calculated,
788 given a PC relative reloc. */
791 md_pcrel_from (fixS
*fixp
)
793 return fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
797 initialise_reg_hash_table (htab_t
* hash_table
,
798 const reg_entry
* register_table
,
799 const unsigned int num_entries
)
801 const reg_entry
* rreg
;
802 if ((* hash_table
= str_htab_create ()) == NULL
)
803 as_fatal (_("Virtual memory exhausted"));
805 for (rreg
= register_table
;
806 rreg
< (register_table
+ num_entries
);
808 str_hash_insert (* hash_table
, rreg
->name
, (char *) rreg
);
811 /* This function is called once, at assembler startup time. This should
812 set up all the tables, etc that the MD part of the assembler needs. */
819 /* Set up a hash table for the instructions. */
820 if ((cr16_inst_hash
= str_htab_create ()) == NULL
)
821 as_fatal (_("Virtual memory exhausted"));
823 while (cr16_instruction
[i
].mnemonic
!= NULL
)
825 const char *mnemonic
= cr16_instruction
[i
].mnemonic
;
827 str_hash_insert (cr16_inst_hash
, mnemonic
,
828 (char *)(cr16_instruction
+ i
));
829 /* Insert unique names into hash table. The CR16 instruction set
830 has many identical opcode names that have different opcodes based
831 on the operands. This hash table then provides a quick index to
832 the first opcode with a particular name in the opcode table. */
837 while (cr16_instruction
[i
].mnemonic
!= NULL
838 && streq (cr16_instruction
[i
].mnemonic
, mnemonic
));
841 /* Initialize reg_hash hash table. */
842 initialise_reg_hash_table (& reg_hash
, cr16_regtab
, NUMREGS
);
843 /* Initialize regp_hash hash table. */
844 initialise_reg_hash_table (& regp_hash
, cr16_regptab
, NUMREGPS
);
845 /* Initialize preg_hash hash table. */
846 initialise_reg_hash_table (& preg_hash
, cr16_pregtab
, NUMPREGS
);
847 /* Initialize pregp_hash hash table. */
848 initialise_reg_hash_table (& pregp_hash
, cr16_pregptab
, NUMPREGPS
);
850 /* Set linkrelax here to avoid fixups in most sections. */
854 /* Process constants (immediate/absolute)
855 and labels (jump targets/Memory locations). */
858 process_label_constant (char *str
, ins
* cr16_ins
)
860 char *saved_input_line_pointer
;
861 int symbol_with_at
= 0;
862 int symbol_with_s
= 0;
863 int symbol_with_m
= 0;
864 int symbol_with_l
= 0;
865 int symbol_with_at_got
= 0;
866 int symbol_with_at_gotc
= 0;
867 argument
*cur_arg
= cr16_ins
->arg
+ cur_arg_num
; /* Current argument. */
869 saved_input_line_pointer
= input_line_pointer
;
870 input_line_pointer
= str
;
872 expression (&cr16_ins
->exp
);
874 switch (cr16_ins
->exp
.X_op
)
878 /* Missing or bad expr becomes absolute 0. */
879 as_bad (_("missing or invalid displacement expression `%s' taken as 0"),
881 cr16_ins
->exp
.X_op
= O_constant
;
882 cr16_ins
->exp
.X_add_number
= 0;
883 cr16_ins
->exp
.X_add_symbol
= NULL
;
884 cr16_ins
->exp
.X_op_symbol
= NULL
;
888 cur_arg
->X_op
= O_constant
;
889 cur_arg
->constant
= cr16_ins
->exp
.X_add_number
;
895 cur_arg
->X_op
= O_symbol
;
896 cur_arg
->constant
= cr16_ins
->exp
.X_add_number
;
897 cr16_ins
->exp
.X_add_number
= 0;
898 cr16_ins
->rtype
= BFD_RELOC_NONE
;
901 if (strneq (input_line_pointer
, "@c", 2))
904 if (strneq (input_line_pointer
, "@l", 2)
905 || strneq (input_line_pointer
, ":l", 2))
908 if (strneq (input_line_pointer
, "@m", 2)
909 || strneq (input_line_pointer
, ":m", 2))
912 if (strneq (input_line_pointer
, "@s", 2)
913 || strneq (input_line_pointer
, ":s", 2))
916 if (strneq (input_line_pointer
, "@cGOT", 5)
917 || strneq (input_line_pointer
, "@cgot", 5))
919 if (GOT_symbol
== NULL
)
920 GOT_symbol
= symbol_find_or_make (GLOBAL_OFFSET_TABLE_NAME
);
922 symbol_with_at_gotc
= 1;
924 else if (strneq (input_line_pointer
, "@GOT", 4)
925 || strneq (input_line_pointer
, "@got", 4))
927 if ((strneq (input_line_pointer
, "+", 1))
928 || (strneq (input_line_pointer
, "-", 1)))
929 as_warn (_("GOT bad expression with %s."), input_line_pointer
);
931 if (GOT_symbol
== NULL
)
932 GOT_symbol
= symbol_find_or_make (GLOBAL_OFFSET_TABLE_NAME
);
934 symbol_with_at_got
= 1;
937 switch (cur_arg
->type
)
940 if (IS_INSN_TYPE (LD_STOR_INS
) || IS_INSN_TYPE (CSTBIT_INS
))
942 if (symbol_with_at_got
)
943 cr16_ins
->rtype
= BFD_RELOC_CR16_GOT_REGREL20
;
944 else if (symbol_with_at_gotc
)
945 cr16_ins
->rtype
= BFD_RELOC_CR16_GOTC_REGREL20
;
946 else if (cur_arg
->size
== 20)
947 cr16_ins
->rtype
= BFD_RELOC_CR16_REGREL20
;
949 cr16_ins
->rtype
= BFD_RELOC_CR16_REGREL20a
;
954 if (IS_INSN_TYPE (LD_STOR_INS
) || IS_INSN_TYPE (CSTBIT_INS
))
956 if (symbol_with_at_got
)
957 cr16_ins
->rtype
= BFD_RELOC_CR16_GOT_REGREL20
;
958 else if (symbol_with_at_gotc
)
959 cr16_ins
->rtype
= BFD_RELOC_CR16_GOTC_REGREL20
;
961 switch (instruction
->size
)
964 switch (cur_arg
->size
)
967 cr16_ins
->rtype
= BFD_RELOC_CR16_REGREL0
;
970 if (IS_INSN_MNEMONIC ("loadb") || IS_INSN_MNEMONIC ("storb"))
971 cr16_ins
->rtype
= BFD_RELOC_CR16_REGREL4
;
973 cr16_ins
->rtype
= BFD_RELOC_CR16_REGREL4a
;
979 cr16_ins
->rtype
= BFD_RELOC_CR16_REGREL16
;
982 if (cur_arg
->size
== 20)
983 cr16_ins
->rtype
= BFD_RELOC_CR16_REGREL20
;
985 cr16_ins
->rtype
= BFD_RELOC_CR16_REGREL20a
;
994 if (IS_INSN_TYPE (LD_STOR_INS
) || IS_INSN_TYPE (CSTBIT_INS
))
996 if (symbol_with_at_got
)
997 cr16_ins
->rtype
= BFD_RELOC_CR16_GOT_REGREL20
;
998 else if (symbol_with_at_gotc
)
999 cr16_ins
->rtype
= BFD_RELOC_CR16_GOTC_REGREL20
;
1001 cr16_ins
->rtype
= BFD_RELOC_CR16_REGREL20
;
1006 if (IS_INSN_TYPE (LD_STOR_INS
) || IS_INSN_TYPE (CSTBIT_INS
))
1008 if (symbol_with_at_got
)
1009 cr16_ins
->rtype
= BFD_RELOC_CR16_GOT_REGREL20
;
1010 else if (symbol_with_at_gotc
)
1011 cr16_ins
->rtype
= BFD_RELOC_CR16_GOTC_REGREL20
;
1013 switch (instruction
->size
)
1015 case 1: cr16_ins
->rtype
= BFD_RELOC_CR16_REGREL0
; break;
1016 case 2: cr16_ins
->rtype
= BFD_RELOC_CR16_REGREL14
; break;
1017 case 3: cr16_ins
->rtype
= BFD_RELOC_CR16_REGREL20
; break;
1025 if (IS_INSN_MNEMONIC ("bal"))
1026 cr16_ins
->rtype
= BFD_RELOC_CR16_DISP24
;
1027 else if (IS_INSN_TYPE (BRANCH_INS
))
1030 cr16_ins
->rtype
= BFD_RELOC_CR16_DISP24
;
1031 else if (symbol_with_m
)
1032 cr16_ins
->rtype
= BFD_RELOC_CR16_DISP16
;
1034 cr16_ins
->rtype
= BFD_RELOC_CR16_DISP8
;
1036 else if (IS_INSN_TYPE (STOR_IMM_INS
) || IS_INSN_TYPE (LD_STOR_INS
)
1037 || IS_INSN_TYPE (CSTBIT_INS
))
1040 as_bad (_("operand %d: illegal use expression: `%s`"), cur_arg_num
+ 1, str
);
1041 if (symbol_with_at_got
)
1042 cr16_ins
->rtype
= BFD_RELOC_CR16_GOT_REGREL20
;
1043 else if (symbol_with_at_gotc
)
1044 cr16_ins
->rtype
= BFD_RELOC_CR16_GOTC_REGREL20
;
1045 else if (symbol_with_m
)
1046 cr16_ins
->rtype
= BFD_RELOC_CR16_ABS20
;
1047 else /* Default to (symbol_with_l) */
1048 cr16_ins
->rtype
= BFD_RELOC_CR16_ABS24
;
1050 else if (IS_INSN_TYPE (BRANCH_NEQ_INS
))
1051 cr16_ins
->rtype
= BFD_RELOC_CR16_DISP4
;
1055 if (IS_INSN_TYPE (ARITH_INS
))
1057 if (symbol_with_at_got
)
1058 cr16_ins
->rtype
= BFD_RELOC_CR16_GOT_REGREL20
;
1059 else if (symbol_with_at_gotc
)
1060 cr16_ins
->rtype
= BFD_RELOC_CR16_GOTC_REGREL20
;
1061 else if (symbol_with_s
)
1062 cr16_ins
->rtype
= BFD_RELOC_CR16_IMM4
;
1063 else if (symbol_with_m
)
1064 cr16_ins
->rtype
= BFD_RELOC_CR16_IMM20
;
1065 else if (symbol_with_at
)
1066 cr16_ins
->rtype
= BFD_RELOC_CR16_IMM32a
;
1067 else /* Default to (symbol_with_l) */
1068 cr16_ins
->rtype
= BFD_RELOC_CR16_IMM32
;
1070 else if (IS_INSN_TYPE (ARITH_BYTE_INS
))
1072 cr16_ins
->rtype
= BFD_RELOC_CR16_IMM16
;
1081 cur_arg
->X_op
= cr16_ins
->exp
.X_op
;
1085 input_line_pointer
= saved_input_line_pointer
;
1089 /* Retrieve the opcode image of a given register.
1090 If the register is illegal for the current instruction,
1094 getreg_image (reg r
)
1096 const reg_entry
*rreg
;
1098 int is_procreg
= 0; /* Nonzero means argument should be processor reg. */
1100 /* Check whether the register is in registers table. */
1102 rreg
= cr16_regtab
+ r
;
1103 else /* Register not found. */
1105 as_bad (_("Unknown register: `%d'"), r
);
1109 reg_name
= rreg
->name
;
1111 /* Issue a error message when register is illegal. */
1113 as_bad (_("Illegal register (`%s') in Instruction: `%s'"), \
1114 reg_name, ins_parse);
1118 case CR16_R_REGTYPE
:
1125 case CR16_P_REGTYPE
:
1137 /* Parsing different types of operands
1138 -> constants Immediate/Absolute/Relative numbers
1139 -> Labels Relocatable symbols
1140 -> (reg pair base) Register pair base
1141 -> (rbase) Register base
1142 -> disp(rbase) Register relative
1143 -> [rinx]disp(reg pair) Register index with reg pair mode
1144 -> disp(rbase,ridx,scl) Register index mode. */
1147 set_operand (char *operand
, ins
* cr16_ins
)
1149 char *operandS
; /* Pointer to start of sub-operand. */
1150 char *operandE
; /* Pointer to end of sub-operand. */
1152 argument
*cur_arg
= &cr16_ins
->arg
[cur_arg_num
]; /* Current argument. */
1154 /* Initialize pointers. */
1155 operandS
= operandE
= operand
;
1157 switch (cur_arg
->type
)
1159 case arg_ic
: /* Case $0x18. */
1162 case arg_c
: /* Case 0x18. */
1164 process_label_constant (operandS
, cr16_ins
);
1166 if (cur_arg
->type
!= arg_ic
)
1167 cur_arg
->type
= arg_c
;
1170 case arg_icr
: /* Case $0x18(r1). */
1172 case arg_cr
: /* Case 0x18(r1). */
1173 /* Set displacement constant. */
1174 while (*operandE
!= '(')
1177 process_label_constant (operandS
, cr16_ins
);
1178 operandS
= operandE
;
1180 case arg_rbase
: /* Case (r1) or (r1,r0). */
1182 /* Set register base. */
1183 while (*operandE
!= ')')
1186 if ((cur_arg
->r
= get_register (operandS
)) == nullregister
)
1187 as_bad (_("Illegal register `%s' in Instruction `%s'"),
1188 operandS
, ins_parse
);
1190 /* set the arg->rp, if reg is "r12" or "r13" or "14" or "15" */
1191 if ((cur_arg
->type
!= arg_rbase
)
1192 && ((getreg_image (cur_arg
->r
) == 12)
1193 || (getreg_image (cur_arg
->r
) == 13)
1194 || (getreg_image (cur_arg
->r
) == 14)
1195 || (getreg_image (cur_arg
->r
) == 15)))
1197 cur_arg
->type
= arg_crp
;
1198 cur_arg
->rp
= cur_arg
->r
;
1202 case arg_crp
: /* Case 0x18(r1,r0). */
1203 /* Set displacement constant. */
1204 while (*operandE
!= '(')
1207 process_label_constant (operandS
, cr16_ins
);
1208 operandS
= operandE
;
1210 /* Set register pair base. */
1211 while (*operandE
!= ')')
1214 if ((cur_arg
->rp
= get_register_pair (operandS
)) == nullregister
)
1215 as_bad (_("Illegal register pair `%s' in Instruction `%s'"),
1216 operandS
, ins_parse
);
1220 /* Set register pair base. */
1221 if ((strchr (operandS
,'(') != NULL
))
1223 while ((*operandE
!= '(') && (! ISSPACE (*operandE
)))
1225 if ((cur_arg
->rp
= get_index_register_pair (operandE
)) == nullregister
)
1226 as_bad (_("Illegal register pair `%s' in Instruction `%s'"),
1227 operandS
, ins_parse
);
1229 cur_arg
->type
= arg_idxrp
;
1234 operandE
= operandS
;
1235 /* Set displacement constant. */
1236 while (*operandE
!= ']')
1238 process_label_constant (++operandE
, cr16_ins
);
1240 operandE
= operandS
;
1242 /* Set index register . */
1243 operandS
= strchr (operandE
,'[');
1244 if (operandS
!= NULL
)
1245 { /* Eliminate '[', detach from rest of operand. */
1248 operandE
= strchr (operandS
, ']');
1250 if (operandE
== NULL
)
1251 as_bad (_("unmatched '['"));
1253 { /* Eliminate ']' and make sure it was the last thing
1256 if (*(operandE
+ 1) != '\0')
1257 as_bad (_("garbage after index spec ignored"));
1261 if ((cur_arg
->i_r
= get_index_register (operandS
)) == nullregister
)
1262 as_bad (_("Illegal register `%s' in Instruction `%s'"),
1263 operandS
, ins_parse
);
1273 /* Parse a single operand.
1274 operand - Current operand to parse.
1275 cr16_ins - Current assembled instruction. */
1278 parse_operand (char *operand
, ins
* cr16_ins
)
1281 argument
*cur_arg
= cr16_ins
->arg
+ cur_arg_num
; /* Current argument. */
1283 /* Initialize the type to NULL before parsing. */
1284 cur_arg
->type
= nullargs
;
1286 /* Check whether this is a condition code . */
1287 if ((IS_INSN_MNEMONIC ("b")) && ((ret_val
= get_cc (operand
)) != -1))
1289 cur_arg
->type
= arg_cc
;
1290 cur_arg
->cc
= ret_val
;
1291 cur_arg
->X_op
= O_register
;
1295 /* Check whether this is a general processor register. */
1296 if ((ret_val
= get_register (operand
)) != nullregister
)
1298 cur_arg
->type
= arg_r
;
1299 cur_arg
->r
= ret_val
;
1304 /* Check whether this is a general processor register pair. */
1305 if ((operand
[0] == '(')
1306 && ((ret_val
= get_register_pair (operand
)) != nullregister
))
1308 cur_arg
->type
= arg_rp
;
1309 cur_arg
->rp
= ret_val
;
1310 cur_arg
->X_op
= O_register
;
1314 /* Check whether the operand is a processor register.
1315 For "lprd" and "sprd" instruction, only 32 bit
1316 processor registers used. */
1317 if (!(IS_INSN_MNEMONIC ("lprd") || (IS_INSN_MNEMONIC ("sprd")))
1318 && ((ret_val
= get_pregister (operand
)) != nullpregister
))
1320 cur_arg
->type
= arg_pr
;
1321 cur_arg
->pr
= ret_val
;
1322 cur_arg
->X_op
= O_register
;
1326 /* Check whether this is a processor register - 32 bit. */
1327 if ((ret_val
= get_pregisterp (operand
)) != nullpregister
)
1329 cur_arg
->type
= arg_prp
;
1330 cur_arg
->prp
= ret_val
;
1331 cur_arg
->X_op
= O_register
;
1335 /* Deal with special characters. */
1339 if (strchr (operand
, '(') != NULL
)
1340 cur_arg
->type
= arg_icr
;
1342 cur_arg
->type
= arg_ic
;
1347 cur_arg
->type
= arg_rbase
;
1352 cur_arg
->type
= arg_idxr
;
1360 if (strchr (operand
, '(') != NULL
)
1362 if (strchr (operand
, ',') != NULL
1363 && (strchr (operand
, ',') > strchr (operand
, '(')))
1364 cur_arg
->type
= arg_crp
;
1366 cur_arg
->type
= arg_cr
;
1369 cur_arg
->type
= arg_c
;
1371 /* Parse an operand according to its type. */
1373 cur_arg
->constant
= 0;
1374 set_operand (operand
, cr16_ins
);
1377 /* Parse the various operands. Each operand is then analyzed to fillup
1378 the fields in the cr16_ins data structure. */
1381 parse_operands (ins
* cr16_ins
, char *operands
)
1383 char *operandS
; /* Operands string. */
1384 char *operandH
, *operandT
; /* Single operand head/tail pointers. */
1385 int allocated
= 0; /* Indicates a new operands string was allocated.*/
1386 char *operand
[MAX_OPERANDS
];/* Separating the operands. */
1387 int op_num
= 0; /* Current operand number we are parsing. */
1388 int bracket_flag
= 0; /* Indicates a bracket '(' was found. */
1389 int sq_bracket_flag
= 0; /* Indicates a square bracket '[' was found. */
1391 /* Preprocess the list of registers, if necessary. */
1392 operandS
= operandH
= operandT
= operands
;
1394 while (*operandT
!= '\0')
1396 if (*operandT
== ',' && bracket_flag
!= 1 && sq_bracket_flag
!= 1)
1399 operand
[op_num
++] = strdup (operandH
);
1400 operandH
= operandT
;
1404 if (*operandT
== ' ')
1405 as_bad (_("Illegal operands (whitespace): `%s'"), ins_parse
);
1407 if (*operandT
== '(')
1409 else if (*operandT
== '[')
1410 sq_bracket_flag
= 1;
1412 if (*operandT
== ')')
1417 as_fatal (_("Missing matching brackets : `%s'"), ins_parse
);
1419 else if (*operandT
== ']')
1421 if (sq_bracket_flag
)
1422 sq_bracket_flag
= 0;
1424 as_fatal (_("Missing matching brackets : `%s'"), ins_parse
);
1427 if (bracket_flag
== 1 && *operandT
== ')')
1429 else if (sq_bracket_flag
== 1 && *operandT
== ']')
1430 sq_bracket_flag
= 0;
1435 /* Adding the last operand. */
1436 operand
[op_num
++] = strdup (operandH
);
1437 cr16_ins
->nargs
= op_num
;
1439 /* Verifying correct syntax of operands (all brackets should be closed). */
1440 if (bracket_flag
|| sq_bracket_flag
)
1441 as_fatal (_("Missing matching brackets : `%s'"), ins_parse
);
1443 /* Now we parse each operand separately. */
1444 for (op_num
= 0; op_num
< cr16_ins
->nargs
; op_num
++)
1446 cur_arg_num
= op_num
;
1447 parse_operand (operand
[op_num
], cr16_ins
);
1448 free (operand
[op_num
]);
1455 /* Get the trap index in dispatch table, given its name.
1456 This routine is used by assembling the 'excp' instruction. */
1461 const trap_entry
*trap
;
1463 for (trap
= cr16_traps
; trap
< (cr16_traps
+ NUMTRAPS
); trap
++)
1464 if (strcasecmp (trap
->name
, s
) == 0)
1467 /* To make compatible with CR16 4.1 tools, the below 3-lines of
1468 * code added. Refer: Development Tracker item #123 */
1469 for (trap
= cr16_traps
; trap
< (cr16_traps
+ NUMTRAPS
); trap
++)
1470 if (trap
->entry
== (unsigned int) atoi (s
))
1473 as_bad (_("Unknown exception: `%s'"), s
);
1477 /* Top level module where instruction parsing starts.
1478 cr16_ins - data structure holds some information.
1479 operands - holds the operands part of the whole instruction. */
1482 parse_insn (ins
*insn
, char *operands
)
1486 /* Handle instructions with no operands. */
1487 for (i
= 0; cr16_no_op_insn
[i
] != NULL
; i
++)
1489 if (streq (cr16_no_op_insn
[i
], instruction
->mnemonic
))
1496 /* Handle 'excp' instructions. */
1497 if (IS_INSN_MNEMONIC ("excp"))
1500 insn
->arg
[0].type
= arg_ic
;
1501 insn
->arg
[0].constant
= gettrap (operands
);
1502 insn
->arg
[0].X_op
= O_constant
;
1506 if (operands
!= NULL
)
1507 parse_operands (insn
, operands
);
1510 /* bCC instruction requires special handling. */
1512 get_b_cc (char * op
)
1517 for (i
= 1; i
< strlen (op
); i
++)
1522 for (i
= 0; i
< cr16_num_cc
; i
++)
1523 if (streq (op1
, cr16_b_cond_tab
[i
]))
1524 return (char *) cr16_b_cond_tab
[i
];
1529 /* bCC instruction requires special handling. */
1531 is_bcc_insn (char * op
)
1533 if (!(streq (op
, "bal") || streq (op
, "beq0b") || streq (op
, "bnq0b")
1534 || streq (op
, "beq0w") || streq (op
, "bnq0w")))
1535 if ((op
[0] == 'b') && (get_b_cc (op
) != NULL
))
1540 /* Cinv instruction requires special handling. */
1543 check_cinv_options (char * operand
)
1558 as_bad (_("Illegal `cinv' parameter: `%c'"), *p
);
1563 /* Retrieve the opcode image of a given register pair.
1564 If the register is illegal for the current instruction,
1568 getregp_image (reg r
)
1570 const reg_entry
*rreg
;
1573 /* Check whether the register is in registers table. */
1575 rreg
= cr16_regptab
+ r
;
1576 /* Register not found. */
1579 as_bad (_("Unknown register pair: `%d'"), r
);
1583 reg_name
= rreg
->name
;
1585 /* Issue a error message when register pair is illegal. */
1586 #define RPAIR_IMAGE_ERR \
1587 as_bad (_("Illegal register pair (`%s') in Instruction: `%s'"), \
1588 reg_name, ins_parse); \
1593 case CR16_RP_REGTYPE
:
1602 /* Retrieve the opcode image of a given index register pair.
1603 If the register is illegal for the current instruction,
1607 getidxregp_image (reg r
)
1609 const reg_entry
*rreg
;
1612 /* Check whether the register is in registers table. */
1614 rreg
= cr16_regptab
+ r
;
1615 /* Register not found. */
1618 as_bad (_("Unknown register pair: `%d'"), r
);
1622 reg_name
= rreg
->name
;
1624 /* Issue a error message when register pair is illegal. */
1625 #define IDX_RPAIR_IMAGE_ERR \
1626 as_bad (_("Illegal index register pair (`%s') in Instruction: `%s'"), \
1627 reg_name, ins_parse); \
1629 if (rreg->type == CR16_RP_REGTYPE)
1631 switch (rreg
->image
)
1633 case 0: return 0; break;
1634 case 2: return 1; break;
1635 case 4: return 2; break;
1636 case 6: return 3; break;
1637 case 8: return 4; break;
1638 case 10: return 5; break;
1639 case 3: return 6; break;
1640 case 5: return 7; break;
1646 IDX_RPAIR_IMAGE_ERR
;
1650 /* Retrieve the opcode image of a given processor register.
1651 If the register is illegal for the current instruction,
1654 getprocreg_image (int r
)
1656 const reg_entry
*rreg
;
1659 /* Check whether the register is in registers table. */
1660 if (r
>= MAX_REG
&& r
< MAX_PREG
)
1661 rreg
= &cr16_pregtab
[r
- MAX_REG
];
1662 /* Register not found. */
1665 as_bad (_("Unknown processor register : `%d'"), r
);
1669 reg_name
= rreg
->name
;
1671 /* Issue a error message when register pair is illegal. */
1672 #define PROCREG_IMAGE_ERR \
1673 as_bad (_("Illegal processor register (`%s') in Instruction: `%s'"), \
1674 reg_name, ins_parse); \
1679 case CR16_P_REGTYPE
:
1688 /* Retrieve the opcode image of a given processor register.
1689 If the register is illegal for the current instruction,
1692 getprocregp_image (int r
)
1694 const reg_entry
*rreg
;
1696 int pregptab_disp
= 0;
1698 /* Check whether the register is in registers table. */
1699 if (r
>= MAX_REG
&& r
< MAX_PREG
)
1704 case 4: pregptab_disp
= 1; break;
1705 case 6: pregptab_disp
= 2; break;
1709 pregptab_disp
= 3; break;
1711 pregptab_disp
= 4; break;
1713 pregptab_disp
= 5; break;
1716 rreg
= &cr16_pregptab
[r
- pregptab_disp
];
1718 /* Register not found. */
1721 as_bad (_("Unknown processor register (32 bit) : `%d'"), r
);
1725 reg_name
= rreg
->name
;
1727 /* Issue a error message when register pair is illegal. */
1728 #define PROCREGP_IMAGE_ERR \
1729 as_bad (_("Illegal 32 bit - processor register (`%s') in Instruction: `%s'"),\
1730 reg_name, ins_parse); \
1735 case CR16_P_REGTYPE
:
1744 /* Routine used to represent integer X using NBITS bits. */
1747 getconstant (long x
, int nbits
)
1749 /* The following expression avoids overflow if
1750 'nbits' is the number of bits in 'bfd_vma'. */
1751 return (x
& ((((1 << (nbits
- 1)) - 1) << 1) | 1));
1754 /* Print a constant value to 'output_opcode':
1755 ARG holds the operand's type and value.
1756 SHIFT represents the location of the operand to be print into.
1757 NBITS determines the size (in bits) of the constant. */
1760 print_constant (int nbits
, int shift
, argument
*arg
)
1762 unsigned long mask
= 0;
1764 long constant
= getconstant (arg
->constant
, nbits
);
1770 /* mask the upper part of the constant, that is, the bits
1771 going to the lowest byte of output_opcode[0].
1772 The upper part of output_opcode[1] is always filled,
1773 therefore it is always masked with 0xFFFF. */
1774 mask
= (1 << (nbits
- 16)) - 1;
1775 /* Divide the constant between two consecutive words :
1777 +---------+---------+---------+---------+
1778 | | X X X X | x X x X | |
1779 +---------+---------+---------+---------+
1780 output_opcode[0] output_opcode[1] */
1782 CR16_PRINT (0, (constant
>> WORD_SHIFT
) & mask
, 0);
1783 CR16_PRINT (1, (constant
& 0xFFFF), WORD_SHIFT
);
1787 if ((nbits
== 21) && (IS_INSN_TYPE (LD_STOR_INS
)))
1793 /* mask the upper part of the constant, that is, the bits
1794 going to the lowest byte of output_opcode[0].
1795 The upper part of output_opcode[1] is always filled,
1796 therefore it is always masked with 0xFFFF. */
1797 mask
= (1 << (nbits
- 16)) - 1;
1798 /* Divide the constant between two consecutive words :
1800 +---------+---------+---------+---------+
1801 | | X X X X | - X - X | |
1802 +---------+---------+---------+---------+
1803 output_opcode[0] output_opcode[1] */
1805 if ((instruction
->size
> 2) && (shift
== WORD_SHIFT
))
1807 if (arg
->type
== arg_idxrp
)
1809 CR16_PRINT (0, ((constant
>> WORD_SHIFT
) & mask
) << 8, 0);
1810 CR16_PRINT (1, (constant
& 0xFFFF), WORD_SHIFT
);
1814 CR16_PRINT (0, (((((constant
>> WORD_SHIFT
) & mask
) << 8) & 0x0f00) | ((((constant
>> WORD_SHIFT
) & mask
) >> 4) & 0xf)),0);
1815 CR16_PRINT (1, (constant
& 0xFFFF), WORD_SHIFT
);
1819 CR16_PRINT (0, constant
, shift
);
1823 if (arg
->type
== arg_idxrp
)
1825 if (instruction
->size
== 2)
1827 CR16_PRINT (0, ((constant
) & 0xf), shift
); /* 0-3 bits. */
1828 CR16_PRINT (0, ((constant
>> 4) & 0x3), (shift
+ 20)); /* 4-5 bits. */
1829 CR16_PRINT (0, ((constant
>> 6) & 0x3), (shift
+ 14)); /* 6-7 bits. */
1830 CR16_PRINT (0, ((constant
>> 8) & 0x3f), (shift
+ 8)); /* 8-13 bits. */
1833 CR16_PRINT (0, constant
, shift
);
1839 /* When instruction size is 3 and 'shift' is 16, a 16-bit constant is
1840 always filling the upper part of output_opcode[1]. If we mistakenly
1841 write it to output_opcode[0], the constant prefix (that is, 'match')
1844 +---------+---------+---------+---------+
1845 | 'match' | | X X X X | |
1846 +---------+---------+---------+---------+
1847 output_opcode[0] output_opcode[1] */
1849 if ((instruction
->size
> 2) && (shift
== WORD_SHIFT
))
1850 CR16_PRINT (1, constant
, WORD_SHIFT
);
1852 CR16_PRINT (0, constant
, shift
);
1856 CR16_PRINT (0, ((constant
/ 2) & 0xf), shift
);
1857 CR16_PRINT (0, ((constant
/ 2) >> 4), (shift
+ 8));
1861 CR16_PRINT (0, constant
, shift
);
1866 /* Print an operand to 'output_opcode', which later on will be
1867 printed to the object file:
1868 ARG holds the operand's type, size and value.
1869 SHIFT represents the printing location of operand.
1870 NBITS determines the size (in bits) of a constant operand. */
1873 print_operand (int nbits
, int shift
, argument
*arg
)
1878 CR16_PRINT (0, arg
->cc
, shift
);
1882 CR16_PRINT (0, getreg_image (arg
->r
), shift
);
1886 CR16_PRINT (0, getregp_image (arg
->rp
), shift
);
1890 CR16_PRINT (0, getprocreg_image (arg
->pr
), shift
);
1894 CR16_PRINT (0, getprocregp_image (arg
->prp
), shift
);
1899 +-----------------------------+
1900 | r_index | disp | rp_base |
1901 +-----------------------------+ */
1903 if (instruction
->size
== 3)
1905 CR16_PRINT (0, getidxregp_image (arg
->rp
), 0);
1906 if (getreg_image (arg
->i_r
) == 12)
1907 CR16_PRINT (0, 0, 3);
1909 CR16_PRINT (0, 1, 3);
1913 CR16_PRINT (0, getidxregp_image (arg
->rp
), 16);
1914 if (getreg_image (arg
->i_r
) == 12)
1915 CR16_PRINT (0, 0, 19);
1917 CR16_PRINT (0, 1, 19);
1919 print_constant (nbits
, shift
, arg
);
1923 if (getreg_image (arg
->i_r
) == 12)
1924 if (IS_INSN_MNEMONIC ("cbitb") || IS_INSN_MNEMONIC ("sbitb")
1925 || IS_INSN_MNEMONIC ("tbitb"))
1926 CR16_PRINT (0, 0, 23);
1927 else CR16_PRINT (0, 0, 24);
1929 if (IS_INSN_MNEMONIC ("cbitb") || IS_INSN_MNEMONIC ("sbitb")
1930 || IS_INSN_MNEMONIC ("tbitb"))
1931 CR16_PRINT (0, 1, 23);
1932 else CR16_PRINT (0, 1, 24);
1934 print_constant (nbits
, shift
, arg
);
1939 print_constant (nbits
, shift
, arg
);
1943 CR16_PRINT (0, getreg_image (arg
->r
), shift
);
1947 print_constant (nbits
, shift
, arg
);
1948 /* Add the register argument to the output_opcode. */
1949 CR16_PRINT (0, getreg_image (arg
->r
), (shift
+16));
1953 print_constant (nbits
, shift
, arg
);
1954 if (instruction
->size
> 1)
1955 CR16_PRINT (0, getregp_image (arg
->rp
), (shift
+ 16));
1956 else if (IS_INSN_TYPE (LD_STOR_INS
) || (IS_INSN_TYPE (CSTBIT_INS
)))
1958 if (instruction
->size
== 2)
1959 CR16_PRINT (0, getregp_image (arg
->rp
), (shift
- 8));
1960 else if (instruction
->size
== 1)
1961 CR16_PRINT (0, getregp_image (arg
->rp
), 16);
1964 CR16_PRINT (0, getregp_image (arg
->rp
), shift
);
1972 /* Retrieve the number of operands for the current assembled instruction. */
1975 get_number_of_operands (void)
1979 for (i
= 0; instruction
->operands
[i
].op_type
&& i
< MAX_OPERANDS
; i
++)
1984 /* Verify that the number NUM can be represented in BITS bits (that is,
1985 within its permitted range), based on the instruction's FLAGS.
1986 If UPDATE is nonzero, update the value of NUM if necessary.
1987 Return OP_LEGAL upon success, actual error type upon failure. */
1990 check_range (long *num
, int bits
, int unsigned flags
, int update
)
1993 op_err retval
= OP_LEGAL
;
1996 if (bits
== 0 && value
> 0) return OP_OUT_OF_RANGE
;
1998 /* For hosts with longs bigger than 32-bits make sure that the top
1999 bits of a 32-bit negative value read in by the parser are set,
2000 so that the correct comparisons are made. */
2001 if (value
& 0x80000000)
2002 value
|= (-1UL << 31);
2005 /* Verify operand value is even. */
2006 if (flags
& OP_EVEN
)
2019 if (flags
& OP_SHIFT
)
2025 else if (flags
& OP_SHIFT_DEC
)
2027 value
= (value
>> 1) - 1;
2032 if (flags
& OP_ABS20
)
2034 if (value
> 0xEFFFF)
2035 return OP_OUT_OF_RANGE
;
2040 if (value
== 0xB || value
== 0x9)
2041 return OP_OUT_OF_RANGE
;
2042 else if (value
== -1)
2050 if (flags
& OP_ESC1
)
2053 return OP_OUT_OF_RANGE
;
2056 if (flags
& OP_SIGNED
)
2058 max
= (1 << (bits
- 1)) - 1;
2059 min
= - (1 << (bits
- 1));
2060 if ((value
> max
) || (value
< min
))
2061 retval
= OP_OUT_OF_RANGE
;
2063 else if (flags
& OP_UNSIGNED
)
2065 max
= ((((1 << (bits
- 1)) - 1) << 1) | 1);
2067 if (((unsigned long) value
> (unsigned long) max
)
2068 || ((unsigned long) value
< (unsigned long) min
))
2069 retval
= OP_OUT_OF_RANGE
;
2071 else if (flags
& OP_NEG
)
2074 min
= - ((1 << (bits
- 1)) - 1);
2075 if ((value
> max
) || (value
< min
))
2076 retval
= OP_OUT_OF_RANGE
;
2081 /* Bunch of error checking.
2082 The checks are made after a matching instruction was found. */
2085 warn_if_needed (ins
*insn
)
2087 /* If the post-increment address mode is used and the load/store
2088 source register is the same as rbase, the result of the
2089 instruction is undefined. */
2090 if (IS_INSN_TYPE (LD_STOR_INS_INC
))
2092 /* Enough to verify that one of the arguments is a simple reg. */
2093 if ((insn
->arg
[0].type
== arg_r
) || (insn
->arg
[1].type
== arg_r
))
2094 if (insn
->arg
[0].r
== insn
->arg
[1].r
)
2095 as_bad (_("Same src/dest register is used (`r%d'), result is undefined"), insn
->arg
[0].r
);
2098 if (IS_INSN_MNEMONIC ("pop")
2099 || IS_INSN_MNEMONIC ("push")
2100 || IS_INSN_MNEMONIC ("popret"))
2102 unsigned int count
= insn
->arg
[0].constant
, reg_val
;
2104 /* Check if count operand caused to save/retrieve the RA twice
2105 to generate warning message. */
2106 if (insn
->nargs
> 2)
2108 reg_val
= getreg_image (insn
->arg
[1].r
);
2110 if ( ((reg_val
== 9) && (count
> 7))
2111 || ((reg_val
== 10) && (count
> 6))
2112 || ((reg_val
== 11) && (count
> 5))
2113 || ((reg_val
== 12) && (count
> 4))
2114 || ((reg_val
== 13) && (count
> 2))
2115 || ((reg_val
== 14) && (count
> 0)))
2116 as_warn (_("RA register is saved twice."));
2118 /* Check if the third operand is "RA" or "ra" */
2119 if (!(((insn
->arg
[2].r
) == ra
) || ((insn
->arg
[2].r
) == RA
)))
2120 as_bad (_("`%s' Illegal use of registers."), ins_parse
);
2123 if (insn
->nargs
> 1)
2125 reg_val
= getreg_image (insn
->arg
[1].r
);
2127 /* If register is a register pair ie r12/r13/r14 in operand1, then
2128 the count constant should be validated. */
2129 if (((reg_val
== 11) && (count
> 7))
2130 || ((reg_val
== 12) && (count
> 6))
2131 || ((reg_val
== 13) && (count
> 4))
2132 || ((reg_val
== 14) && (count
> 2))
2133 || ((reg_val
== 15) && (count
> 0)))
2134 as_bad (_("`%s' Illegal count-register combination."), ins_parse
);
2138 /* Check if the operand is "RA" or "ra" */
2139 if (!(((insn
->arg
[0].r
) == ra
) || ((insn
->arg
[0].r
) == RA
)))
2140 as_bad (_("`%s' Illegal use of register."), ins_parse
);
2144 /* Some instruction assume the stack pointer as rptr operand.
2145 Issue an error when the register to be loaded is also SP. */
2146 if (instruction
->flags
& NO_SP
)
2148 if (getreg_image (insn
->arg
[1].r
) == getreg_image (sp
))
2149 as_bad (_("`%s' has undefined result"), ins_parse
);
2152 /* If the rptr register is specified as one of the registers to be loaded,
2153 the final contents of rptr are undefined. Thus, we issue an error. */
2154 if (instruction
->flags
& NO_RPTR
)
2156 if ((1 << getreg_image (insn
->arg
[0].r
)) & insn
->arg
[1].constant
)
2157 as_bad (_("Same src/dest register is used (`r%d'),result is undefined"),
2158 getreg_image (insn
->arg
[0].r
));
2162 /* In some cases, we need to adjust the instruction pointer although a
2163 match was already found. Here, we gather all these cases.
2164 Returns 1 if instruction pointer was adjusted, otherwise 0. */
2167 adjust_if_needed (ins
*insn ATTRIBUTE_UNUSED
)
2171 if ((IS_INSN_TYPE (CSTBIT_INS
)) || (IS_INSN_TYPE (LD_STOR_INS
)))
2173 if ((instruction
->operands
[0].op_type
== abs24
)
2174 && ((insn
->arg
[0].constant
) > 0xF00000))
2176 insn
->arg
[0].constant
&= 0xFFFFF;
2185 /* Assemble a single instruction:
2186 INSN is already parsed (that is, all operand values and types are set).
2187 For instruction to be assembled, we need to find an appropriate template in
2188 the instruction table, meeting the following conditions:
2189 1: Has the same number of operands.
2190 2: Has the same operand types.
2191 3: Each operand size is sufficient to represent the instruction's values.
2192 Returns 1 upon success, 0 upon failure. */
2195 assemble_insn (const char *mnemonic
, ins
*insn
)
2197 /* Type of each operand in the current template. */
2198 argtype cur_type
[MAX_OPERANDS
];
2199 /* Size (in bits) of each operand in the current template. */
2200 unsigned int cur_size
[MAX_OPERANDS
];
2201 /* Flags of each operand in the current template. */
2202 unsigned int cur_flags
[MAX_OPERANDS
];
2203 /* Instruction type to match. */
2204 unsigned int ins_type
;
2205 /* Boolean flag to mark whether a match was found. */
2208 /* Nonzero if an instruction with same number of operands was found. */
2209 int found_same_number_of_operands
= 0;
2210 /* Nonzero if an instruction with same argument types was found. */
2211 int found_same_argument_types
= 0;
2212 /* Nonzero if a constant was found within the required range. */
2213 int found_const_within_range
= 0;
2214 /* Argument number of an operand with invalid type. */
2215 int invalid_optype
= -1;
2216 /* Argument number of an operand with invalid constant value. */
2217 int invalid_const
= -1;
2218 /* Operand error (used for issuing various constant error messages). */
2219 op_err op_error
, const_err
= OP_LEGAL
;
2221 /* Retrieve data (based on FUNC) for each operand of a given instruction. */
2222 #define GET_CURRENT_DATA(FUNC, ARRAY) \
2223 for (i = 0; i < insn->nargs; i++) \
2224 ARRAY[i] = FUNC (instruction->operands[i].op_type)
2226 #define GET_CURRENT_TYPE GET_CURRENT_DATA (get_optype, cur_type)
2227 #define GET_CURRENT_SIZE GET_CURRENT_DATA (get_opbits, cur_size)
2228 #define GET_CURRENT_FLAGS GET_CURRENT_DATA (get_opflags, cur_flags)
2230 /* Instruction has no operands -> only copy the constant opcode. */
2231 if (insn
->nargs
== 0)
2233 output_opcode
[0] = BIN (instruction
->match
, instruction
->match_bits
);
2237 /* In some case, same mnemonic can appear with different instruction types.
2238 For example, 'storb' is supported with 3 different types :
2239 LD_STOR_INS, LD_STOR_INS_INC, STOR_IMM_INS.
2240 We assume that when reaching this point, the instruction type was
2241 pre-determined. We need to make sure that the type stays the same
2242 during a search for matching instruction. */
2243 ins_type
= CR16_INS_TYPE (instruction
->flags
);
2245 while (/* Check that match is still not found. */
2247 /* Check we didn't get to end of table. */
2248 && instruction
->mnemonic
!= NULL
2249 /* Check that the actual mnemonic is still available. */
2250 && IS_INSN_MNEMONIC (mnemonic
)
2251 /* Check that the instruction type wasn't changed. */
2252 && IS_INSN_TYPE (ins_type
))
2254 /* Check whether number of arguments is legal. */
2255 if (get_number_of_operands () != insn
->nargs
)
2257 found_same_number_of_operands
= 1;
2259 /* Initialize arrays with data of each operand in current template. */
2264 /* Check for type compatibility. */
2265 for (i
= 0; i
< insn
->nargs
; i
++)
2267 if (cur_type
[i
] != insn
->arg
[i
].type
)
2269 if (invalid_optype
== -1)
2270 invalid_optype
= i
+ 1;
2274 found_same_argument_types
= 1;
2276 for (i
= 0; i
< insn
->nargs
; i
++)
2278 /* If 'bal' instruction size is '2' and reg operand is not 'ra'
2279 then goto next instruction. */
2280 if (IS_INSN_MNEMONIC ("bal") && (i
== 0)
2281 && (instruction
->size
== 2) && (insn
->arg
[i
].rp
!= 14))
2284 /* If 'storb' instruction with 'sp' reg and 16-bit disp of
2285 * reg-pair, leads to undefined trap, so this should use
2286 * 20-bit disp of reg-pair. */
2287 if (IS_INSN_MNEMONIC ("storb") && (instruction
->size
== 2)
2288 && (insn
->arg
[i
].r
== 15) && (insn
->arg
[i
+ 1].type
== arg_crp
))
2291 /* Only check range - don't update the constant's value, since the
2292 current instruction may not be the last we try to match.
2293 The constant's value will be updated later, right before printing
2294 it to the object file. */
2295 if ((insn
->arg
[i
].X_op
== O_constant
)
2296 && (op_error
= check_range (&insn
->arg
[i
].constant
, cur_size
[i
],
2299 if (invalid_const
== -1)
2301 invalid_const
= i
+ 1;
2302 const_err
= op_error
;
2306 /* For symbols, we make sure the relocation size (which was already
2307 determined) is sufficient. */
2308 else if ((insn
->arg
[i
].X_op
== O_symbol
)
2309 && ((bfd_reloc_type_lookup (stdoutput
, insn
->rtype
))->bitsize
2313 found_const_within_range
= 1;
2315 /* If we got till here -> Full match is found. */
2319 /* Try again with next instruction. */
2326 /* We haven't found a match - instruction can't be assembled. */
2327 if (!found_same_number_of_operands
)
2328 as_bad (_("Incorrect number of operands"));
2329 else if (!found_same_argument_types
)
2330 as_bad (_("Illegal type of operand (arg %d)"), invalid_optype
);
2331 else if (!found_const_within_range
)
2335 case OP_OUT_OF_RANGE
:
2336 as_bad (_("Operand out of range (arg %d)"), invalid_const
);
2339 as_bad (_("Operand has odd displacement (arg %d)"), invalid_const
);
2342 as_bad (_("Illegal operand (arg %d)"), invalid_const
);
2350 /* Full match - print the encoding to output file. */
2352 /* Make further checking (such that couldn't be made earlier).
2353 Warn the user if necessary. */
2354 warn_if_needed (insn
);
2356 /* Check whether we need to adjust the instruction pointer. */
2357 if (adjust_if_needed (insn
))
2358 /* If instruction pointer was adjusted, we need to update
2359 the size of the current template operands. */
2362 for (i
= 0; i
< insn
->nargs
; i
++)
2364 int j
= instruction
->flags
& REVERSE_MATCH
?
2369 /* This time, update constant value before printing it. */
2370 if ((insn
->arg
[j
].X_op
== O_constant
)
2371 && (check_range (&insn
->arg
[j
].constant
, cur_size
[j
],
2372 cur_flags
[j
], 1) != OP_LEGAL
))
2373 as_fatal (_("Illegal operand (arg %d)"), j
+1);
2376 /* First, copy the instruction's opcode. */
2377 output_opcode
[0] = BIN (instruction
->match
, instruction
->match_bits
);
2379 for (i
= 0; i
< insn
->nargs
; i
++)
2381 /* For BAL (ra),disp17 instruction only. And also set the
2382 DISP24a relocation type. */
2383 if (IS_INSN_MNEMONIC ("bal") && (instruction
->size
== 2) && i
== 0)
2385 insn
->rtype
= BFD_RELOC_CR16_DISP24a
;
2389 print_operand (cur_size
[i
], instruction
->operands
[i
].shift
,
2397 /* Print the instruction.
2398 Handle also cases where the instruction is relaxable/relocatable. */
2401 print_insn (ins
*insn
)
2403 unsigned int i
, j
, insn_size
;
2405 unsigned short words
[4];
2408 /* Arrange the insn encodings in a WORD size array. */
2409 for (i
= 0, j
= 0; i
< 2; i
++)
2411 words
[j
++] = (output_opcode
[i
] >> 16) & 0xFFFF;
2412 words
[j
++] = output_opcode
[i
] & 0xFFFF;
2415 /* Handle relocation. */
2416 if ((instruction
->flags
& RELAXABLE
) && relocatable
)
2419 /* Write the maximal instruction size supported. */
2420 insn_size
= INSN_MAX_SIZE
;
2422 if (IS_INSN_TYPE (BRANCH_INS
))
2424 switch (insn
->rtype
)
2426 case BFD_RELOC_CR16_DISP24
:
2429 case BFD_RELOC_CR16_DISP16
:
2440 this_frag
= frag_var (rs_machine_dependent
, insn_size
*2,
2442 insn
->exp
.X_add_symbol
,
2448 insn_size
= instruction
->size
;
2449 this_frag
= frag_more (insn_size
* 2);
2451 if ((relocatable
) && (insn
->rtype
!= BFD_RELOC_NONE
))
2453 reloc_howto_type
*reloc_howto
;
2456 reloc_howto
= bfd_reloc_type_lookup (stdoutput
, insn
->rtype
);
2461 size
= bfd_get_reloc_size (reloc_howto
);
2463 if (size
< 1 || size
> 4)
2466 fix_new_exp (frag_now
, this_frag
- frag_now
->fr_literal
,
2467 size
, &insn
->exp
, reloc_howto
->pc_relative
,
2472 /* Verify a 2-byte code alignment. */
2473 addr_mod
= frag_now_fix () & 1;
2474 if (frag_now
->has_code
&& frag_now
->insn_addr
!= addr_mod
)
2475 as_bad (_("instruction address is not a multiple of 2"));
2476 frag_now
->insn_addr
= addr_mod
;
2477 frag_now
->has_code
= 1;
2479 /* Write the instruction encoding to frag. */
2480 for (i
= 0; i
< insn_size
; i
++)
2482 md_number_to_chars (this_frag
, (valueT
) words
[i
], 2);
2487 /* Actually assemble an instruction. */
2490 cr16_assemble (const char *op
, char *param
)
2494 /* Find the instruction. */
2495 instruction
= (const inst
*) str_hash_find (cr16_inst_hash
, op
);
2496 if (instruction
== NULL
)
2498 as_bad (_("Unknown opcode: `%s'"), op
);
2502 /* Tie dwarf2 debug info to the address at the start of the insn. */
2503 dwarf2_emit_insn (0);
2505 /* Parse the instruction's operands. */
2506 parse_insn (&cr16_ins
, param
);
2508 /* Assemble the instruction - return upon failure. */
2509 if (assemble_insn (op
, &cr16_ins
) == 0)
2512 /* Print the instruction. */
2513 print_insn (&cr16_ins
);
2516 /* This is the guts of the machine-dependent assembler. OP points to a
2517 machine dependent instruction. This function is supposed to emit
2518 the frags/bytes it assembles to. */
2521 md_assemble (char *op
)
2524 char *param
, param1
[32];
2526 /* Reset global variables for a new instruction. */
2529 /* Strip the mnemonic. */
2530 for (param
= op
; *param
!= 0 && !ISSPACE (*param
); param
++)
2534 /* bCC instructions and adjust the mnemonic by adding extra white spaces. */
2535 if (is_bcc_insn (op
))
2537 strcpy (param1
, get_b_cc (op
));
2538 strcat (param1
,",");
2539 strcat (param1
, param
);
2540 param
= (char *) ¶m1
;
2541 cr16_assemble ("b", param
);
2545 /* Checking the cinv options and adjust the mnemonic by removing the
2546 extra white spaces. */
2547 if (streq ("cinv", op
))
2549 /* Validate the cinv options. */
2550 unsigned int op_len
, param_len
;
2551 check_cinv_options (param
);
2552 op_len
= strlen (op
);
2553 param_len
= strlen (param
) + 1;
2554 memmove (op
+ op_len
, param
, param_len
);
2557 /* MAPPING - SHIFT INSN, if imm4/imm16 positive values
2558 lsh[b/w] imm4/imm6, reg ==> ashu[b/w] imm4/imm16, reg
2559 as CR16 core doesn't support lsh[b/w] right shift operations. */
2560 if ((streq ("lshb", op
) || streq ("lshw", op
) || streq ("lshd", op
))
2561 && (param
[0] == '$'))
2563 strcpy (param1
, param
);
2564 /* Find the instruction. */
2565 instruction
= (const inst
*) str_hash_find (cr16_inst_hash
, op
);
2566 parse_operands (&cr16_ins
, param1
);
2567 if (((&cr16_ins
)->arg
[0].type
== arg_ic
)
2568 && ((&cr16_ins
)->arg
[0].constant
>= 0))
2570 if (streq ("lshb", op
))
2571 cr16_assemble ("ashub", param
);
2572 else if (streq ("lshd", op
))
2573 cr16_assemble ("ashud", param
);
2575 cr16_assemble ("ashuw", param
);
2580 cr16_assemble (op
, param
);