1 /* tc-cris.c -- Assembler code for the CRIS CPU core.
2 Copyright (C) 2000-2020 Free Software Foundation, Inc.
4 Contributed by Axis Communications AB, Lund, Sweden.
5 Originally written for GAS 1.38.1 by Mikael Asker.
6 Updates, BFDizing, GNUifying and ELF support by Hans-Peter Nilsson.
8 This file is part of GAS, the GNU Assembler.
10 GAS is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 3, or (at your option)
15 GAS is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
20 You should have received a copy of the GNU General Public License
21 along with GAS; see the file COPYING. If not, write to the
22 Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
23 MA 02110-1301, USA. */
26 #include "safe-ctype.h"
28 #include "opcode/cris.h"
29 #include "dwarf2dbg.h"
31 /* Conventions used here:
32 Generally speaking, pointers to binutils types such as "fragS" and
33 "expressionS" get parameter and variable names ending in "P", such as
34 "fragP", to harmonize with the rest of the binutils code. Other
35 pointers get a "p" suffix, such as "bufp". Any function or type-name
36 that could clash with a current or future binutils or GAS function get
39 #define SYNTAX_RELAX_REG_PREFIX "no_register_prefix"
40 #define SYNTAX_ENFORCE_REG_PREFIX "register_prefix"
41 #define SYNTAX_USER_SYM_LEADING_UNDERSCORE "leading_underscore"
42 #define SYNTAX_USER_SYM_NO_LEADING_UNDERSCORE "no_leading_underscore"
43 #define REGISTER_PREFIX_CHAR '$'
45 /* True for expressions where getting X_add_symbol and X_add_number is
46 enough to get the "base" and "offset"; no need to make_expr_symbol.
47 It's not enough to check if X_op_symbol is NULL; that misses unary
48 operations like O_uminus. */
49 #define SIMPLE_EXPR(EXP) \
50 ((EXP)->X_op == O_constant || (EXP)->X_op == O_symbol)
52 /* Like in ":GOT", ":GOTOFF" etc. Other ports use '@', but that's in
53 line_separator_chars for CRIS, so we avoid it. */
54 #define RELOC_SUFFIX_CHAR ':'
56 /* This might be CRIS_INSN_NONE if we're assembling a prefix-insn only.
57 Note that some prefix-insns might be assembled as CRIS_INSN_NORMAL. */
60 CRIS_INSN_NORMAL
, CRIS_INSN_NONE
, CRIS_INSN_BRANCH
, CRIS_INSN_MUL
63 /* An instruction will have one of these prefixes.
64 Although the same bit-pattern, we handle BDAP with an immediate
65 expression (eventually quick or [pc+]) different from when we only have
66 register expressions. */
69 PREFIX_NONE
, PREFIX_BDAP_IMM
, PREFIX_BDAP
, PREFIX_BIAP
, PREFIX_DIP
,
73 /* The prefix for an instruction. */
76 enum prefix_kind kind
;
80 /* There might be an expression to be evaluated, like I in [rN+I]. */
83 /* If there's an expression, we might need a relocation. Here's the
84 type of what relocation to start relaxation with.
85 The relocation is assumed to start immediately after the prefix insn,
86 so we don't provide an offset. */
87 enum bfd_reloc_code_real reloc
;
90 /* The description of the instruction being assembled. */
91 struct cris_instruction
93 /* If CRIS_INSN_NONE, then this insn is of zero length. */
94 enum cris_insn_kind insn_type
;
96 /* If a special register was mentioned, this is its description, else
98 const struct cris_spec_reg
*spec_reg
;
102 /* An insn may have at most one expression; theoretically there could be
103 another in its prefix (but I don't see how that could happen). */
106 /* The expression might need a relocation. Here's one to start
108 enum bfd_reloc_code_real reloc
;
110 /* The size in bytes of an immediate expression, or zero if
118 arch_crisv0
, arch_crisv3
, arch_crisv8
, arch_crisv10
,
119 arch_cris_any_v0_v10
, arch_crisv32
, arch_cris_common_v10_v32
122 static enum cris_archs
cris_arch_from_string (const char **);
123 static int cris_insn_ver_valid_for_arch (enum cris_insn_version_usage
,
126 static void cris_process_instruction (char *, struct cris_instruction
*,
127 struct cris_prefix
*);
128 static int get_bwd_size_modifier (char **, int *);
129 static int get_bw_size_modifier (char **, int *);
130 static int get_gen_reg (char **, int *);
131 static int get_spec_reg (char **, const struct cris_spec_reg
**);
132 static int get_sup_reg (char **, int *);
133 static int get_autoinc_prefix_or_indir_op (char **, struct cris_prefix
*,
136 static int get_3op_or_dip_prefix_op (char **, struct cris_prefix
*);
137 static int cris_get_expression (char **, expressionS
*);
138 static int get_flags (char **, int *);
139 static void gen_bdap (int, expressionS
*);
140 static int branch_disp (int);
141 static void gen_cond_branch_32 (char *, char *, fragS
*, symbolS
*, symbolS
*,
143 static void cris_number_to_imm (char *, long, int, fixS
*, segT
);
144 static void s_syntax (int);
145 static void s_cris_file (int);
146 static void s_cris_loc (int);
147 static void s_cris_arch (int);
148 static void s_cris_dtpoff (int);
150 /* Get ":GOT", ":GOTOFF", ":PLT" etc. suffixes. */
151 static void cris_get_reloc_suffix (char **, bfd_reloc_code_real_type
*,
153 static unsigned int cris_get_specified_reloc_size (bfd_reloc_code_real_type
);
155 /* All the .syntax functions. */
156 static void cris_force_reg_prefix (void);
157 static void cris_relax_reg_prefix (void);
158 static void cris_sym_leading_underscore (void);
159 static void cris_sym_no_leading_underscore (void);
160 static char *cris_insn_first_word_frag (void);
162 /* Handle to the opcode hash table. */
163 static htab_t op_hash
= NULL
;
165 /* If we target cris-axis-linux-gnu (as opposed to generic cris-axis-elf),
166 we default to no underscore and required register-prefixes. The
167 difference is in the default values. */
169 #define DEFAULT_CRIS_AXIS_LINUX_GNU TRUE
171 #define DEFAULT_CRIS_AXIS_LINUX_GNU FALSE
174 /* Whether we demand that registers have a `$' prefix. Default here. */
175 static bfd_boolean demand_register_prefix
= DEFAULT_CRIS_AXIS_LINUX_GNU
;
177 /* Whether global user symbols have a leading underscore. Default here. */
178 static bfd_boolean symbols_have_leading_underscore
179 = !DEFAULT_CRIS_AXIS_LINUX_GNU
;
181 /* Whether or not we allow PIC, and expand to PIC-friendly constructs. */
182 static bfd_boolean pic
= FALSE
;
184 /* Whether or not we allow TLS suffixes. For the moment, we always do. */
185 static const bfd_boolean tls
= TRUE
;
187 /* If we're configured for "cris", default to allow all v0..v10
188 instructions and register names. */
189 #ifndef DEFAULT_CRIS_ARCH
190 #define DEFAULT_CRIS_ARCH cris_any_v0_v10
193 /* No whitespace in the CONCAT2 parameter list. */
194 static enum cris_archs cris_arch
= XCONCAT2 (arch_
,DEFAULT_CRIS_ARCH
);
196 const pseudo_typeS md_pseudo_table
[] =
199 {"dtpoffd", s_cris_dtpoff
, 4},
200 {"syntax", s_syntax
, 0},
201 {"file", s_cris_file
, 0},
202 {"loc", s_cris_loc
, 0},
203 {"arch", s_cris_arch
, 0},
207 static int warn_for_branch_expansion
= 0;
209 /* Whether to emit error when a MULS/MULU could be located last on a
211 static int err_for_dangerous_mul_placement
212 = (XCONCAT2 (arch_
,DEFAULT_CRIS_ARCH
) != arch_crisv32
);
214 const char cris_comment_chars
[] = ";";
216 /* This array holds the chars that only start a comment at the beginning of
217 a line. If the line seems to have the form '# 123 filename'
218 .line and .file directives will appear in the pre-processed output. */
219 /* Note that input_file.c hand-checks for '#' at the beginning of the
220 first line of the input file. This is because the compiler outputs
221 #NO_APP at the beginning of its output. */
222 /* Also note that slash-star will always start a comment. */
223 const char line_comment_chars
[] = "#";
224 const char line_separator_chars
[] = "@";
226 /* Now all floating point support is shut off. See md_atof. */
227 const char EXP_CHARS
[] = "";
228 const char FLT_CHARS
[] = "";
230 /* For CRIS, we encode the relax_substateTs (in e.g. fr_substate) as:
232 ---/ /--+-----------------+-----------------+-----------------+
233 | what state ? | how long ? |
234 ---/ /--+-----------------+-----------------+-----------------+
236 The "how long" bits are 00 = byte, 01 = word, 10 = dword (long).
237 Not all lengths are legit for a given value of (what state).
239 Groups for CRIS address relaxing:
242 length: byte, word, 10-byte expansion
245 length: byte, word, dword
248 Not really a relaxation (no infrastructure to get delay-slots
249 right), just an alignment and placement checker for the v10
252 4. Bcc (V32 and later)
253 length: byte, word, 14-byte expansion
256 length: byte, word, error
259 length: byte, word, dword
265 #define STATE_COND_BRANCH (1)
266 #define STATE_BASE_PLUS_DISP_PREFIX (2)
267 #define STATE_MUL (3)
268 #define STATE_COND_BRANCH_V32 (4)
269 #define STATE_COND_BRANCH_COMMON (5)
270 #define STATE_ABS_BRANCH_V32 (6)
271 #define STATE_LAPC (7)
272 #define STATE_COND_BRANCH_PIC (8)
274 #define STATE_LENGTH_MASK (3)
275 #define STATE_BYTE (0)
276 #define STATE_WORD (1)
277 #define STATE_DWORD (2)
278 /* Symbol undefined. */
279 #define STATE_UNDF (3)
280 #define STATE_MAX_LENGTH (3)
282 /* These displacements are relative to the address following the opcode
283 word of the instruction. The first letter is Byte, Word. The 2nd
284 letter is Forward, Backward. */
286 #define BRANCH_BF ( 254)
287 #define BRANCH_BB (-256)
288 #define BRANCH_BF_V32 ( 252)
289 #define BRANCH_BB_V32 (-258)
290 #define BRANCH_WF (2 + 32767)
291 #define BRANCH_WB (2 + -32768)
292 #define BRANCH_WF_V32 (-2 + 32767)
293 #define BRANCH_WB_V32 (-2 + -32768)
295 #define BDAP_BF ( 127)
296 #define BDAP_BB (-128)
297 #define BDAP_WF ( 32767)
298 #define BDAP_WB (-32768)
300 #define ENCODE_RELAX(what, length) (((what) << 2) + (length))
302 const relax_typeS md_cris_relax_table
[] =
304 /* Error sentinel (0, 0). */
317 {BRANCH_BF
, BRANCH_BB
, 0, ENCODE_RELAX (1, 1)},
319 /* Bcc [PC+] (1, 1). */
320 {BRANCH_WF
, BRANCH_WB
, 2, ENCODE_RELAX (1, 2)},
322 /* BEXT/BWF, BA, JUMP (external), JUMP (always), Bnot_cc, JUMP (default)
330 {BDAP_BF
, BDAP_BB
, 0, ENCODE_RELAX (2, 1)},
332 /* BDAP.[bw] [PC+] (2, 1). */
333 {BDAP_WF
, BDAP_WB
, 2, ENCODE_RELAX (2, 2)},
335 /* BDAP.d [PC+] (2, 2). */
341 /* MULS/MULU (3, 0). Positions (3, 1..3) are unused. */
342 {0, 0, 0, 0}, {0, 0, 0, 0}, {0, 0, 0, 0}, {0, 0, 0, 0},
344 /* V32: Bcc o (4, 0). */
345 {BRANCH_BF_V32
, BRANCH_BB_V32
, 0, ENCODE_RELAX (4, 1)},
347 /* V32: Bcc [PC+] (4, 1). */
348 {BRANCH_WF_V32
, BRANCH_WB_V32
, 2, ENCODE_RELAX (4, 2)},
350 /* V32: BA .+12; NOP; BA32 target; NOP; Bcc .-6 (4, 2). */
356 /* COMMON: Bcc o (5, 0). The offsets are calculated as for v32. Code
357 should contain two nop insns (or four if offset size is large or
358 unknown) after every label. */
359 {BRANCH_BF_V32
, BRANCH_BB_V32
, 0, ENCODE_RELAX (5, 1)},
361 /* COMMON: Bcc [PC+] (5, 1). */
362 {BRANCH_WF_V32
, BRANCH_WB_V32
, 2, ENCODE_RELAX (5, 2)},
364 /* COMMON: FIXME: ???. Treat as error currently. */
370 /* V32: BA o (6, 0). */
371 {BRANCH_BF_V32
, BRANCH_BB_V32
, 0, ENCODE_RELAX (6, 1)},
373 /* V32: BA.W (6, 1). */
374 {BRANCH_WF_V32
, BRANCH_WB_V32
, 2, ENCODE_RELAX (6, 2)},
376 /* V32: BA.D (6, 2). */
382 /* LAPC: LAPCQ .+0..15*2,Rn (7, 0). */
383 {14*2, -1*2, 0, ENCODE_RELAX (7, 2)},
386 While there's a shorter sequence, e.g. LAPCQ + an ADDQ or SUBQ,
387 that would affect flags, so we can't do that as it wouldn't be a
388 proper insn expansion of LAPCQ. This row is associated with a
389 2-byte expansion, so it's unused rather than the next. */
392 /* LAPC: LAPC.D (7, 2). */
398 /* PIC for pre-v32: Bcc o (8, 0). */
399 {BRANCH_BF
, BRANCH_BB
, 0, ENCODE_RELAX (STATE_COND_BRANCH_PIC
, 1)},
401 /* Bcc [PC+] (8, 1). */
402 {BRANCH_WF
, BRANCH_WB
, 2, ENCODE_RELAX (STATE_COND_BRANCH_PIC
, 2)},
404 /* 32-bit expansion, PIC (8, 2). */
416 /* Target-specific multicharacter options, not const-declared. */
417 struct option md_longopts
[] =
419 #define OPTION_NO_US (OPTION_MD_BASE + 0)
420 {"no-underscore", no_argument
, NULL
, OPTION_NO_US
},
421 #define OPTION_US (OPTION_MD_BASE + 1)
422 {"underscore", no_argument
, NULL
, OPTION_US
},
423 #define OPTION_PIC (OPTION_US + 1)
424 {"pic", no_argument
, NULL
, OPTION_PIC
},
425 #define OPTION_MULBUG_ABORT_ON (OPTION_PIC + 1)
426 {"mul-bug-abort", no_argument
, NULL
, OPTION_MULBUG_ABORT_ON
},
427 #define OPTION_MULBUG_ABORT_OFF (OPTION_MULBUG_ABORT_ON + 1)
428 {"no-mul-bug-abort", no_argument
, NULL
, OPTION_MULBUG_ABORT_OFF
},
429 #define OPTION_ARCH (OPTION_MULBUG_ABORT_OFF + 1)
430 {"march", required_argument
, NULL
, OPTION_ARCH
},
431 {NULL
, no_argument
, NULL
, 0}
434 /* Not const-declared. */
435 size_t md_longopts_size
= sizeof (md_longopts
);
436 const char *md_shortopts
= "hHN";
438 /* At first glance, this may seems wrong and should be 4 (ba + nop); but
439 since a short_jump must skip a *number* of long jumps, it must also be
440 a long jump. Here, we hope to make it a "ba [16bit_offs]" and a "nop"
441 for the delay slot and hope that the jump table at most needs
442 32767/4=8191 long-jumps. A branch is better than a jump, since it is
443 relative; we will not have a reloc to fix up somewhere.
445 Note that we can't add relocs, because relaxation uses these fixed
446 numbers, and md_create_short_jump is called after relaxation. */
448 int md_short_jump_size
= 6;
450 /* The v32 version has a delay-slot, hence two bytes longer.
451 The pre-v32 PIC version uses a prefixed insn. */
452 #define cris_any_v0_v10_long_jump_size 6
453 #define cris_any_v0_v10_long_jump_size_pic 8
454 #define crisv32_long_jump_size 8
456 int md_long_jump_size
= XCONCAT2 (DEFAULT_CRIS_ARCH
,_long_jump_size
);
458 /* Report output format. Small changes in output format (like elf
459 variants below) can happen until all options are parsed, but after
460 that, the output format must remain fixed. */
463 cris_target_format (void)
465 switch (OUTPUT_FLAVOR
)
467 case bfd_target_aout_flavour
:
470 case bfd_target_elf_flavour
:
471 if (symbols_have_leading_underscore
)
472 return "elf32-us-cris";
481 /* Return a bfd_mach_cris... value corresponding to the value of
487 unsigned int retval
= 0;
491 case arch_cris_common_v10_v32
:
492 retval
= bfd_mach_cris_v10_v32
;
496 retval
= bfd_mach_cris_v32
;
500 case arch_cris_any_v0_v10
:
501 retval
= bfd_mach_cris_v0_v10
;
505 BAD_CASE (cris_arch
);
511 /* We need a port-specific relaxation function to cope with sym2 - sym1
512 relative expressions with both symbols in the same segment (but not
513 necessarily in the same frag as this insn), for example:
514 move.d [pc+sym2-(sym1-2)],r10
516 The offset can be 8, 16 or 32 bits long. */
519 cris_relax_frag (segT seg ATTRIBUTE_UNUSED
, fragS
*fragP
,
520 long stretch ATTRIBUTE_UNUSED
)
525 const relax_typeS
*this_type
;
526 const relax_typeS
*start_type
;
527 relax_substateT next_state
;
528 relax_substateT this_state
;
529 const relax_typeS
*table
= TC_GENERIC_RELAX_TABLE
;
531 /* We only have to cope with frags as prepared by
532 md_estimate_size_before_relax. The dword cases may get here
533 because of the different reasons that they aren't relaxable. */
534 switch (fragP
->fr_subtype
)
536 case ENCODE_RELAX (STATE_COND_BRANCH_PIC
, STATE_DWORD
):
537 case ENCODE_RELAX (STATE_COND_BRANCH
, STATE_DWORD
):
538 case ENCODE_RELAX (STATE_COND_BRANCH_V32
, STATE_DWORD
):
539 case ENCODE_RELAX (STATE_COND_BRANCH_COMMON
, STATE_DWORD
):
540 case ENCODE_RELAX (STATE_ABS_BRANCH_V32
, STATE_DWORD
):
541 case ENCODE_RELAX (STATE_LAPC
, STATE_DWORD
):
542 case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX
, STATE_DWORD
):
543 /* When we get to these states, the frag won't grow any more. */
546 case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX
, STATE_WORD
):
547 case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX
, STATE_BYTE
):
548 if (fragP
->fr_symbol
== NULL
549 || S_GET_SEGMENT (fragP
->fr_symbol
) != absolute_section
)
550 as_fatal (_("internal inconsistency problem in %s: fr_symbol %lx"),
551 __FUNCTION__
, (long) fragP
->fr_symbol
);
552 symbolP
= fragP
->fr_symbol
;
553 if (symbol_resolved_p (symbolP
))
554 as_fatal (_("internal inconsistency problem in %s: resolved symbol"),
556 aim
= S_GET_VALUE (symbolP
);
559 case ENCODE_RELAX (STATE_MUL
, STATE_BYTE
):
560 /* Nothing to do here. */
564 as_fatal (_("internal inconsistency problem in %s: fr_subtype %d"),
565 __FUNCTION__
, fragP
->fr_subtype
);
568 /* The rest is stolen from relax_frag. There's no obvious way to
569 share the code, but fortunately no requirement to keep in sync as
570 long as fragP->fr_symbol does not have its segment changed. */
572 this_state
= fragP
->fr_subtype
;
573 start_type
= this_type
= table
+ this_state
;
577 /* Look backwards. */
578 for (next_state
= this_type
->rlx_more
; next_state
;)
579 if (aim
>= this_type
->rlx_backward
)
583 /* Grow to next state. */
584 this_state
= next_state
;
585 this_type
= table
+ this_state
;
586 next_state
= this_type
->rlx_more
;
592 for (next_state
= this_type
->rlx_more
; next_state
;)
593 if (aim
<= this_type
->rlx_forward
)
597 /* Grow to next state. */
598 this_state
= next_state
;
599 this_type
= table
+ this_state
;
600 next_state
= this_type
->rlx_more
;
604 growth
= this_type
->rlx_length
- start_type
->rlx_length
;
606 fragP
->fr_subtype
= this_state
;
610 /* Prepare machine-dependent frags for relaxation.
612 Called just before relaxation starts. Any symbol that is now undefined
613 will not become defined.
615 Return the correct fr_subtype in the frag.
617 Return the initial "guess for fr_var" to caller. The guess for fr_var
618 is *actually* the growth beyond fr_fix. Whatever we do to grow fr_fix
619 or fr_var contributes to our returned value.
621 Although it may not be explicit in the frag, pretend
622 fr_var starts with a value. */
625 md_estimate_size_before_relax (fragS
*fragP
, segT segment_type
)
628 symbolS
*symbolP
= fragP
->fr_symbol
;
630 #define HANDLE_RELAXABLE(state) \
631 case ENCODE_RELAX (state, STATE_UNDF): \
632 if (symbolP != NULL \
633 && S_GET_SEGMENT (symbolP) == segment_type \
634 && !S_IS_WEAK (symbolP)) \
635 /* The symbol lies in the same segment - a relaxable \
638 = ENCODE_RELAX (state, STATE_BYTE); \
640 /* Unknown or not the same segment, so not relaxable. */ \
642 = ENCODE_RELAX (state, STATE_DWORD); \
644 = md_cris_relax_table[fragP->fr_subtype].rlx_length; \
647 old_fr_fix
= fragP
->fr_fix
;
649 switch (fragP
->fr_subtype
)
651 HANDLE_RELAXABLE (STATE_COND_BRANCH
);
652 HANDLE_RELAXABLE (STATE_COND_BRANCH_V32
);
653 HANDLE_RELAXABLE (STATE_COND_BRANCH_COMMON
);
654 HANDLE_RELAXABLE (STATE_COND_BRANCH_PIC
);
655 HANDLE_RELAXABLE (STATE_ABS_BRANCH_V32
);
657 case ENCODE_RELAX (STATE_LAPC
, STATE_UNDF
):
659 && S_GET_SEGMENT (symbolP
) == segment_type
660 && !S_IS_WEAK (symbolP
))
662 /* The symbol lies in the same segment - a relaxable case.
663 Check if we currently have an odd offset; we can't code
664 that into the instruction. Relaxing presumably only cause
665 multiple-of-two changes, so we should only need to adjust
667 bfd_vma target_address
669 ? S_GET_VALUE (symbolP
)
670 : 0) + fragP
->fr_offset
;
671 bfd_vma var_part_offset
= fragP
->fr_fix
;
672 bfd_vma address_of_var_part
= fragP
->fr_address
+ var_part_offset
;
673 long offset
= target_address
- (address_of_var_part
- 2);
677 ? ENCODE_RELAX (STATE_LAPC
, STATE_DWORD
)
678 : ENCODE_RELAX (STATE_LAPC
, STATE_BYTE
);
681 /* Unknown or not the same segment, so not relaxable. */
683 = ENCODE_RELAX (STATE_LAPC
, STATE_DWORD
);
685 = md_cris_relax_table
[fragP
->fr_subtype
].rlx_length
;
688 case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX
, STATE_UNDF
):
689 /* Note that we can not do anything sane with relaxing
690 [rX + a_known_symbol_in_text], it will have to be a 32-bit
693 We could play tricks with managing a constant pool and make
694 a_known_symbol_in_text a "bdap [pc + offset]" pointing there
695 (like the GOT for ELF shared libraries), but that's no use, it
696 would in general be no shorter or faster code, only more
699 if (S_GET_SEGMENT (symbolP
) != absolute_section
)
701 /* Go for dword if not absolute or same segment. */
703 = ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX
, STATE_DWORD
);
704 fragP
->fr_var
= md_cris_relax_table
[fragP
->fr_subtype
].rlx_length
;
706 else if (!symbol_resolved_p (fragP
->fr_symbol
))
708 /* The symbol will eventually be completely resolved as an
709 absolute expression, but right now it depends on the result
710 of relaxation and we don't know anything else about the
711 value. We start relaxation with the assumption that it'll
714 = ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX
, STATE_BYTE
);
715 fragP
->fr_var
= md_cris_relax_table
[fragP
->fr_subtype
].rlx_length
;
719 /* Absolute expression. */
721 value
= (symbolP
!= NULL
722 ? S_GET_VALUE (symbolP
) : 0) + fragP
->fr_offset
;
724 if (value
>= -128 && value
<= 127)
726 /* Byte displacement. */
727 (fragP
->fr_opcode
)[0] = value
;
731 /* Word or dword displacement. */
732 int pow2_of_size
= 1;
735 if (value
< -32768 || value
> 32767)
737 /* Outside word range, make it a dword. */
741 /* Modify the byte-offset BDAP into a word or dword offset
742 BDAP. Or really, a BDAP rX,8bit into a
743 BDAP.[wd] rX,[PC+] followed by a word or dword. */
744 (fragP
->fr_opcode
)[0] = BDAP_PC_LOW
+ pow2_of_size
* 16;
746 /* Keep the register number in the highest four bits. */
747 (fragP
->fr_opcode
)[1] &= 0xF0;
748 (fragP
->fr_opcode
)[1] |= BDAP_INCR_HIGH
;
750 /* It grew by two or four bytes. */
751 fragP
->fr_fix
+= 1 << pow2_of_size
;
752 writep
= fragP
->fr_literal
+ old_fr_fix
;
753 md_number_to_chars (writep
, value
, 1 << pow2_of_size
);
759 case ENCODE_RELAX (STATE_COND_BRANCH
, STATE_BYTE
):
760 case ENCODE_RELAX (STATE_COND_BRANCH
, STATE_WORD
):
761 case ENCODE_RELAX (STATE_COND_BRANCH
, STATE_DWORD
):
762 case ENCODE_RELAX (STATE_COND_BRANCH_PIC
, STATE_BYTE
):
763 case ENCODE_RELAX (STATE_COND_BRANCH_PIC
, STATE_WORD
):
764 case ENCODE_RELAX (STATE_COND_BRANCH_PIC
, STATE_DWORD
):
765 case ENCODE_RELAX (STATE_COND_BRANCH_V32
, STATE_BYTE
):
766 case ENCODE_RELAX (STATE_COND_BRANCH_V32
, STATE_WORD
):
767 case ENCODE_RELAX (STATE_COND_BRANCH_V32
, STATE_DWORD
):
768 case ENCODE_RELAX (STATE_COND_BRANCH_COMMON
, STATE_BYTE
):
769 case ENCODE_RELAX (STATE_COND_BRANCH_COMMON
, STATE_WORD
):
770 case ENCODE_RELAX (STATE_COND_BRANCH_COMMON
, STATE_DWORD
):
771 case ENCODE_RELAX (STATE_ABS_BRANCH_V32
, STATE_BYTE
):
772 case ENCODE_RELAX (STATE_ABS_BRANCH_V32
, STATE_WORD
):
773 case ENCODE_RELAX (STATE_ABS_BRANCH_V32
, STATE_DWORD
):
774 case ENCODE_RELAX (STATE_LAPC
, STATE_BYTE
):
775 case ENCODE_RELAX (STATE_LAPC
, STATE_DWORD
):
776 case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX
, STATE_BYTE
):
777 case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX
, STATE_WORD
):
778 case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX
, STATE_DWORD
):
779 /* When relaxing a section for the second time, we don't need to
780 do anything except making sure that fr_var is set right. */
781 fragP
->fr_var
= md_cris_relax_table
[fragP
->fr_subtype
].rlx_length
;
784 case ENCODE_RELAX (STATE_MUL
, STATE_BYTE
):
785 /* Nothing to do here. */
789 BAD_CASE (fragP
->fr_subtype
);
792 return fragP
->fr_var
+ (fragP
->fr_fix
- old_fr_fix
);
795 /* Perform post-processing of machine-dependent frags after relaxation.
796 Called after relaxation is finished.
798 fr_type == rs_machine_dependent.
799 fr_subtype is what the address relaxed to.
801 Out: Any fixS:s and constants are set up.
803 The caller will turn the frag into a ".space 0". */
806 md_convert_frag (bfd
*abfd ATTRIBUTE_UNUSED
, segT sec ATTRIBUTE_UNUSED
,
809 /* Pointer to first byte in variable-sized part of the frag. */
812 /* Pointer to first opcode byte in frag. */
815 /* Used to check integrity of the relaxation.
816 One of 2 = long, 1 = word, or 0 = byte. */
817 int length_code ATTRIBUTE_UNUSED
;
819 /* Size in bytes of variable-sized part of frag. */
820 int var_part_size
= 0;
822 /* This is part of *fragP. It contains all information about addresses
823 and offsets to varying parts. */
825 unsigned long var_part_offset
;
827 /* Where, in file space, is _var of *fragP? */
828 unsigned long address_of_var_part
= 0;
830 /* Where, in file space, does addr point? */
831 unsigned long target_address
;
833 know (fragP
->fr_type
== rs_machine_dependent
);
835 length_code
= fragP
->fr_subtype
& STATE_LENGTH_MASK
;
836 know (length_code
>= 0 && length_code
< STATE_MAX_LENGTH
);
838 var_part_offset
= fragP
->fr_fix
;
839 var_partp
= fragP
->fr_literal
+ var_part_offset
;
840 opcodep
= fragP
->fr_opcode
;
842 symbolP
= fragP
->fr_symbol
;
843 target_address
= (symbolP
? S_GET_VALUE (symbolP
) : 0) + fragP
->fr_offset
;
844 address_of_var_part
= fragP
->fr_address
+ var_part_offset
;
846 switch (fragP
->fr_subtype
)
848 case ENCODE_RELAX (STATE_COND_BRANCH
, STATE_BYTE
):
849 case ENCODE_RELAX (STATE_COND_BRANCH_PIC
, STATE_BYTE
):
850 case ENCODE_RELAX (STATE_COND_BRANCH_V32
, STATE_BYTE
):
851 case ENCODE_RELAX (STATE_COND_BRANCH_COMMON
, STATE_BYTE
):
852 case ENCODE_RELAX (STATE_ABS_BRANCH_V32
, STATE_BYTE
):
853 opcodep
[0] = branch_disp ((target_address
- address_of_var_part
));
857 case ENCODE_RELAX (STATE_COND_BRANCH
, STATE_WORD
):
858 case ENCODE_RELAX (STATE_COND_BRANCH_PIC
, STATE_WORD
):
859 case ENCODE_RELAX (STATE_COND_BRANCH_V32
, STATE_WORD
):
860 case ENCODE_RELAX (STATE_COND_BRANCH_COMMON
, STATE_WORD
):
861 case ENCODE_RELAX (STATE_ABS_BRANCH_V32
, STATE_WORD
):
862 /* We had a quick immediate branch, now turn it into a word one i.e. a
864 opcodep
[0] = BRANCH_PC_LOW
;
866 opcodep
[1] |= BRANCH_INCR_HIGH
;
867 md_number_to_chars (var_partp
,
870 - (address_of_var_part
871 + (cris_arch
== arch_crisv32
872 || cris_arch
== arch_cris_common_v10_v32
878 case ENCODE_RELAX (STATE_COND_BRANCH
, STATE_DWORD
):
879 gen_cond_branch_32 (fragP
->fr_opcode
, var_partp
, fragP
,
880 fragP
->fr_symbol
, (symbolS
*) NULL
,
882 /* Ten bytes added: a branch, nop and a jump. */
883 var_part_size
= 2 + 2 + 4 + 2;
886 case ENCODE_RELAX (STATE_COND_BRANCH_PIC
, STATE_DWORD
):
887 gen_cond_branch_32 (fragP
->fr_opcode
, var_partp
, fragP
,
888 fragP
->fr_symbol
, (symbolS
*) NULL
,
890 /* Twelve bytes added: a branch, nop and a pic-branch-32. */
891 var_part_size
= 2 + 2 + 4 + 2 + 2;
894 case ENCODE_RELAX (STATE_COND_BRANCH_V32
, STATE_DWORD
):
895 gen_cond_branch_32 (fragP
->fr_opcode
, var_partp
, fragP
,
896 fragP
->fr_symbol
, (symbolS
*) NULL
,
898 /* Twelve bytes added: a branch, nop and another branch and nop. */
899 var_part_size
= 2 + 2 + 2 + 4 + 2;
902 case ENCODE_RELAX (STATE_COND_BRANCH_COMMON
, STATE_DWORD
):
903 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
904 _("Relaxation to long branches for .arch common_v10_v32\
906 /* Pretend we have twelve bytes for sake of quelling further
908 var_part_size
= 2 + 2 + 2 + 4 + 2;
911 case ENCODE_RELAX (STATE_ABS_BRANCH_V32
, STATE_DWORD
):
912 /* We had a quick immediate branch or a word immediate ba. Now
913 turn it into a dword one. */
914 opcodep
[0] = BA_DWORD_OPCODE
& 255;
915 opcodep
[1] = (BA_DWORD_OPCODE
>> 8) & 255;
916 fix_new (fragP
, var_partp
- fragP
->fr_literal
, 4, symbolP
,
917 fragP
->fr_offset
+ 6, 1, BFD_RELOC_32_PCREL
);
921 case ENCODE_RELAX (STATE_LAPC
, STATE_BYTE
):
923 long offset
= target_address
- (address_of_var_part
- 2);
925 /* This is mostly a sanity check; useful occurrences (if there
926 really are any) should have been caught in
927 md_estimate_size_before_relax. We can (at least
928 theoretically) stumble over invalid code with odd sizes and
929 .p2aligns within the code, so emit an error if that happens.
930 (The generic relaxation machinery is not fit to check this.) */
933 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
934 _("Complicated LAPC target operand is not\
935 a multiple of two. Use LAPC.D"));
937 /* FIXME: This *is* a sanity check. Remove when done with. */
938 if (offset
> 15*2 || offset
< 0)
939 as_fatal (_("Internal error found in md_convert_frag: offset %ld.\
940 Please report this."),
943 opcodep
[0] |= (offset
/ 2) & 0xf;
948 case ENCODE_RELAX (STATE_LAPC
, STATE_DWORD
):
950 md_number_to_chars (opcodep
,
951 LAPC_DWORD_OPCODE
+ (opcodep
[1] & 0xf0) * 256,
953 /* Remember that the reloc is against the position *after* the
954 relocated contents, so we need to adjust to the start of
956 fix_new (fragP
, var_partp
- fragP
->fr_literal
, 4, fragP
->fr_symbol
,
957 fragP
->fr_offset
+ 6, 1, BFD_RELOC_32_PCREL
);
962 case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX
, STATE_BYTE
):
964 as_fatal (_("internal inconsistency in %s: bdapq no symbol"),
966 opcodep
[0] = S_GET_VALUE (symbolP
);
970 case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX
, STATE_WORD
):
971 /* We had a BDAP 8-bit "quick immediate", now turn it into a 16-bit
972 one that uses PC autoincrement. */
973 opcodep
[0] = BDAP_PC_LOW
+ (1 << 4);
975 opcodep
[1] |= BDAP_INCR_HIGH
;
977 as_fatal (_("internal inconsistency in %s: bdap.w with no symbol"),
979 md_number_to_chars (var_partp
, S_GET_VALUE (symbolP
), 2);
983 case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX
, STATE_DWORD
):
984 /* We had a BDAP 16-bit "word", change the offset to a dword. */
985 opcodep
[0] = BDAP_PC_LOW
+ (2 << 4);
987 opcodep
[1] |= BDAP_INCR_HIGH
;
988 if (fragP
->fr_symbol
== NULL
)
989 md_number_to_chars (var_partp
, fragP
->fr_offset
, 4);
991 fix_new (fragP
, var_partp
- fragP
->fr_literal
, 4, fragP
->fr_symbol
,
992 fragP
->fr_offset
, 0, BFD_RELOC_32
);
996 case ENCODE_RELAX (STATE_MUL
, STATE_BYTE
):
997 /* This is the only time we check position and alignment of the
998 placement-tracking frag. */
999 if (sec
->alignment_power
< 2)
1000 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
1001 _("section alignment must be >= 4 bytes to check MULS/MULU safeness"));
1004 /* If the address after the MULS/MULU has alignment which is
1005 that of the section and may be that of a cache-size of the
1006 buggy versions, then the MULS/MULU can be placed badly. */
1007 if ((address_of_var_part
1008 & ((1 << sec
->alignment_power
) - 1) & 31) == 0)
1009 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
1010 _("dangerous MULS/MULU location; give it higher alignment"));
1015 BAD_CASE (fragP
->fr_subtype
);
1019 fragP
->fr_fix
+= var_part_size
;
1022 /* Generate a short jump around a secondary jump table.
1023 Also called from md_create_long_jump, when sufficient. */
1026 md_create_short_jump (char *storep
, addressT from_addr
, addressT to_addr
,
1027 fragS
*fragP ATTRIBUTE_UNUSED
,
1028 symbolS
*to_symbol ATTRIBUTE_UNUSED
)
1032 /* See md_create_long_jump about the comment on the "+ 2". */
1033 long int max_minimal_minus_distance
;
1034 long int max_minimal_plus_distance
;
1035 long int max_minus_distance
;
1036 long int max_plus_distance
;
1039 if (cris_arch
== arch_crisv32
)
1041 max_minimal_minus_distance
= BRANCH_BB_V32
+ 2;
1042 max_minimal_plus_distance
= BRANCH_BF_V32
+ 2;
1043 max_minus_distance
= BRANCH_WB_V32
+ 2;
1044 max_plus_distance
= BRANCH_WF_V32
+ 2;
1045 nop_opcode
= NOP_OPCODE_V32
;
1047 else if (cris_arch
== arch_cris_common_v10_v32
)
1048 /* Bail out for compatibility mode. (It seems it can be implemented,
1049 perhaps with a 10-byte sequence: "move.d NNNN,$pc/$acr", "jump
1050 $acr", "nop"; but doesn't seem worth it at the moment.) */
1051 as_fatal (_("Out-of-range .word offset handling\
1052 is not implemented for .arch common_v10_v32"));
1055 max_minimal_minus_distance
= BRANCH_BB
+ 2;
1056 max_minimal_plus_distance
= BRANCH_BF
+ 2;
1057 max_minus_distance
= BRANCH_WB
+ 2;
1058 max_plus_distance
= BRANCH_WF
+ 2;
1059 nop_opcode
= NOP_OPCODE
;
1062 distance
= to_addr
- from_addr
;
1064 if (max_minimal_minus_distance
<= distance
1065 && distance
<= max_minimal_plus_distance
)
1067 /* Create a "short" short jump: "BA distance - 2". */
1068 storep
[0] = branch_disp (distance
- 2);
1069 storep
[1] = BA_QUICK_HIGH
;
1071 /* A nop for the delay slot. */
1072 md_number_to_chars (storep
+ 2, nop_opcode
, 2);
1074 /* The extra word should be filled with something sane too. Make it
1075 a nop to keep disassembly sane. */
1076 md_number_to_chars (storep
+ 4, nop_opcode
, 2);
1078 else if (max_minus_distance
<= distance
1079 && distance
<= max_plus_distance
)
1081 /* Make it a "long" short jump: "BA (PC+)". */
1082 md_number_to_chars (storep
, BA_PC_INCR_OPCODE
, 2);
1084 /* ".WORD distance - 4". */
1085 md_number_to_chars (storep
+ 2,
1086 (long) (distance
- 4
1087 - (cris_arch
== arch_crisv32
1091 /* A nop for the delay slot. */
1092 md_number_to_chars (storep
+ 4, nop_opcode
, 2);
1095 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
1096 _(".word case-table handling failed: table too large"));
1099 /* Generate a long jump in a secondary jump table.
1101 storep Where to store the jump instruction.
1102 from_addr Address of the jump instruction.
1103 to_addr Destination address of the jump.
1104 fragP Which frag the destination address operand
1106 to_symbol Destination symbol. */
1109 md_create_long_jump (char *storep
, addressT from_addr
, addressT to_addr
,
1110 fragS
*fragP
, symbolS
*to_symbol
)
1114 /* FIXME: What's that "+ 3"? It comes from the magic numbers that
1115 used to be here, it's just translated to the limit macros used in
1116 the relax table. But why + 3? */
1117 long int max_short_minus_distance
1118 = cris_arch
!= arch_crisv32
? BRANCH_WB
+ 3 : BRANCH_WB_V32
+ 3;
1120 long int max_short_plus_distance
1121 = cris_arch
!= arch_crisv32
? BRANCH_WF
+ 3 : BRANCH_WF_V32
+ 3;
1123 distance
= to_addr
- from_addr
;
1125 if (max_short_minus_distance
<= distance
1126 && distance
<= max_short_plus_distance
)
1128 /* Then make it a "short" long jump. */
1129 md_create_short_jump (storep
, from_addr
, to_addr
, fragP
,
1131 if (cris_arch
== arch_crisv32
)
1132 md_number_to_chars (storep
+ 6, NOP_OPCODE_V32
, 2);
1134 md_number_to_chars (storep
+ 6, NOP_OPCODE
, 2);
1138 /* We have a "long" long jump: "JUMP [PC+]". If CRISv32, always
1139 make it a BA. Else make it an "MOVE [PC=PC+N],P0" if we're supposed
1140 to emit PIC code. */
1141 md_number_to_chars (storep
,
1142 cris_arch
== arch_crisv32
1144 : (pic
? MOVE_PC_INCR_OPCODE_PREFIX
1145 : JUMP_PC_INCR_OPCODE
),
1148 /* Follow with a ".DWORD to_addr", PC-relative for PIC. */
1149 fix_new (fragP
, storep
+ 2 - fragP
->fr_literal
, 4, to_symbol
,
1150 cris_arch
== arch_crisv32
? 6 : 0,
1151 cris_arch
== arch_crisv32
|| pic
? 1 : 0,
1152 cris_arch
== arch_crisv32
|| pic
1153 ? BFD_RELOC_32_PCREL
: BFD_RELOC_32
);
1155 /* Follow it with a "NOP" for CRISv32. */
1156 if (cris_arch
== arch_crisv32
)
1157 md_number_to_chars (storep
+ 6, NOP_OPCODE_V32
, 2);
1159 /* ...and the rest of the move-opcode for pre-v32 PIC. */
1160 md_number_to_chars (storep
+ 6, MOVE_PC_INCR_OPCODE_SUFFIX
, 2);
1164 /* Allocate space for the first piece of an insn, and mark it as the
1165 start of the insn for debug-format use. */
1168 cris_insn_first_word_frag (void)
1170 char *insnp
= frag_more (2);
1172 /* We need to mark the start of the insn by passing dwarf2_emit_insn
1173 the offset from the current fragment position. This must be done
1174 after the first fragment is created but before any other fragments
1175 (fixed or varying) are created. Note that the offset only
1176 corresponds to the "size" of the insn for a fixed-size,
1177 non-expanded insn. */
1178 if (OUTPUT_FLAVOR
== bfd_target_elf_flavour
)
1179 dwarf2_emit_insn (2);
1184 /* Port-specific assembler initialization. */
1191 /* Set up a hash table for the instructions. */
1192 op_hash
= str_htab_create ();
1193 if (op_hash
== NULL
)
1194 as_fatal (_("Virtual memory exhausted"));
1196 /* Enable use of ".if ..asm.arch.cris.v32"
1197 and ".if ..asm.arch.cris.common_v10_v32" and a few others. */
1198 symbol_table_insert (symbol_new ("..asm.arch.cris.v32", absolute_section
,
1200 cris_arch
== arch_crisv32
));
1201 symbol_table_insert (symbol_new ("..asm.arch.cris.v10", absolute_section
,
1203 cris_arch
== arch_crisv10
));
1204 symbol_table_insert (symbol_new ("..asm.arch.cris.common_v10_v32",
1207 cris_arch
== arch_cris_common_v10_v32
));
1208 symbol_table_insert (symbol_new ("..asm.arch.cris.any_v0_v10",
1211 cris_arch
== arch_cris_any_v0_v10
));
1213 while (cris_opcodes
[i
].name
!= NULL
)
1215 const char *name
= cris_opcodes
[i
].name
;
1217 if (! cris_insn_ver_valid_for_arch (cris_opcodes
[i
].applicable_version
,
1224 /* Need to cast to get rid of "const". FIXME: Fix str_hash_insert instead. */
1225 str_hash_insert (op_hash
, name
, (void *) &cris_opcodes
[i
]);
1228 if (cris_opcodes
[i
].match
& cris_opcodes
[i
].lose
)
1229 as_fatal (_("Buggy opcode: `%s' \"%s\"\n"), cris_opcodes
[i
].name
,
1230 cris_opcodes
[i
].args
);
1234 while (cris_opcodes
[i
].name
!= NULL
1235 && strcmp (cris_opcodes
[i
].name
, name
) == 0);
1239 /* Assemble a source line. */
1242 md_assemble (char *str
)
1244 struct cris_instruction output_instruction
;
1245 struct cris_prefix prefix
;
1251 /* Do the low-level grunt - assemble to bits and split up into a prefix
1252 and ordinary insn. */
1253 cris_process_instruction (str
, &output_instruction
, &prefix
);
1255 /* Handle any prefixes to the instruction. */
1256 switch (prefix
.kind
)
1261 /* When the expression is unknown for a BDAP, it can need 0, 2 or 4
1262 extra bytes, so we handle it separately. */
1263 case PREFIX_BDAP_IMM
:
1264 /* We only do it if the relocation is unspecified, i.e. not a PIC or TLS
1266 if (prefix
.reloc
== BFD_RELOC_NONE
)
1268 gen_bdap (prefix
.base_reg_number
, &prefix
.expr
);
1275 opcodep
= cris_insn_first_word_frag ();
1277 /* Output the prefix opcode. */
1278 md_number_to_chars (opcodep
, (long) prefix
.opcode
, 2);
1280 /* Having a specified reloc only happens for DIP and for BDAP with
1281 PIC or TLS operands, but it is ok to drop through here for the other
1282 prefixes as they can have no relocs specified. */
1283 if (prefix
.reloc
!= BFD_RELOC_NONE
)
1285 unsigned int relocsize
1286 = (prefix
.kind
== PREFIX_DIP
1287 ? 4 : cris_get_specified_reloc_size (prefix
.reloc
));
1289 p
= frag_more (relocsize
);
1290 fix_new_exp (frag_now
, (p
- frag_now
->fr_literal
), relocsize
,
1291 &prefix
.expr
, 0, prefix
.reloc
);
1296 opcodep
= cris_insn_first_word_frag ();
1298 /* Output the prefix opcode. Being a "push", we add the negative
1299 size of the register to "sp". */
1300 if (output_instruction
.spec_reg
!= NULL
)
1302 /* Special register. */
1303 opcodep
[0] = -output_instruction
.spec_reg
->reg_size
;
1307 /* General register. */
1310 opcodep
[1] = (REG_SP
<< 4) + (BDAP_QUICK_OPCODE
>> 8);
1314 BAD_CASE (prefix
.kind
);
1317 /* If we only had a prefix insn, we're done. */
1318 if (output_instruction
.insn_type
== CRIS_INSN_NONE
)
1321 /* Done with the prefix. Continue with the main instruction. */
1322 if (prefix
.kind
== PREFIX_NONE
)
1323 opcodep
= cris_insn_first_word_frag ();
1325 opcodep
= frag_more (2);
1327 /* Output the instruction opcode. */
1328 md_number_to_chars (opcodep
, (long) (output_instruction
.opcode
), 2);
1330 /* Output the symbol-dependent instruction stuff. */
1331 if (output_instruction
.insn_type
== CRIS_INSN_BRANCH
)
1333 segT to_seg
= absolute_section
;
1334 int is_undefined
= 0;
1337 if (output_instruction
.expr
.X_op
!= O_constant
)
1339 to_seg
= S_GET_SEGMENT (output_instruction
.expr
.X_add_symbol
);
1341 if (to_seg
== undefined_section
)
1345 if (to_seg
== now_seg
|| is_undefined
1346 /* In CRISv32, there *is* a 32-bit absolute branch, so don't
1347 emit the 12-byte sequence for known symbols in other
1349 || (cris_arch
== arch_crisv32
1350 && output_instruction
.opcode
== BA_QUICK_OPCODE
))
1352 /* Handle complex expressions. */
1354 = (SIMPLE_EXPR (&output_instruction
.expr
)
1355 ? output_instruction
.expr
.X_add_number
1358 = (SIMPLE_EXPR (&output_instruction
.expr
)
1359 ? output_instruction
.expr
.X_add_symbol
1360 : make_expr_symbol (&output_instruction
.expr
));
1362 /* If is_undefined, the expression may still become now_seg.
1363 That case is handled by md_estimate_size_before_relax. */
1364 length_code
= to_seg
== now_seg
? STATE_BYTE
: STATE_UNDF
;
1366 /* Make room for max twelve bytes of variable length for v32 mode
1367 or PIC, ten for v10 and older. */
1368 frag_var (rs_machine_dependent
,
1369 (cris_arch
== arch_crisv32
1370 || cris_arch
== arch_cris_common_v10_v32
1371 || pic
) ? 12 : 10, 0,
1372 ENCODE_RELAX (cris_arch
== arch_crisv32
1373 ? (output_instruction
.opcode
1375 ? STATE_ABS_BRANCH_V32
1376 : STATE_COND_BRANCH_V32
)
1377 : (cris_arch
== arch_cris_common_v10_v32
1378 ? STATE_COND_BRANCH_COMMON
1379 : (pic
? STATE_COND_BRANCH_PIC
1380 : STATE_COND_BRANCH
)),
1382 sym
, addvalue
, opcodep
);
1386 /* We have: to_seg != now_seg && to_seg != undefined_section.
1387 This means it is a branch to a known symbol in another
1388 section, perhaps an absolute address. Emit a 32-bit branch. */
1390 = frag_more ((cris_arch
== arch_crisv32
1391 || cris_arch
== arch_cris_common_v10_v32
1395 gen_cond_branch_32 (opcodep
, cond_jump
, frag_now
,
1396 output_instruction
.expr
.X_add_symbol
,
1398 output_instruction
.expr
.X_add_number
);
1401 else if (output_instruction
.insn_type
== CRIS_INSN_MUL
1402 && err_for_dangerous_mul_placement
)
1403 /* Create a frag which which we track the location of the mul insn
1404 (in the last two bytes before the mul-frag). */
1405 frag_variant (rs_machine_dependent
, 0, 0,
1406 ENCODE_RELAX (STATE_MUL
, STATE_BYTE
),
1410 if (output_instruction
.imm_oprnd_size
> 0)
1412 /* The instruction has an immediate operand. */
1413 enum bfd_reloc_code_real reloc
= BFD_RELOC_NONE
;
1415 switch (output_instruction
.imm_oprnd_size
)
1417 /* Any byte-size immediate constants are treated as
1418 word-size. FIXME: Thus overflow check does not work
1422 /* Note that size-check for the explicit reloc has already
1423 been done when we get here. */
1424 if (output_instruction
.reloc
!= BFD_RELOC_NONE
)
1425 reloc
= output_instruction
.reloc
;
1427 reloc
= BFD_RELOC_16
;
1431 /* Allow a relocation specified in the operand. */
1432 if (output_instruction
.reloc
!= BFD_RELOC_NONE
)
1433 reloc
= output_instruction
.reloc
;
1435 reloc
= BFD_RELOC_32
;
1439 BAD_CASE (output_instruction
.imm_oprnd_size
);
1442 p
= frag_more (output_instruction
.imm_oprnd_size
);
1443 fix_new_exp (frag_now
, (p
- frag_now
->fr_literal
),
1444 output_instruction
.imm_oprnd_size
,
1445 &output_instruction
.expr
,
1446 reloc
== BFD_RELOC_32_PCREL
1447 || reloc
== BFD_RELOC_16_PCREL
1448 || reloc
== BFD_RELOC_8_PCREL
, reloc
);
1450 else if (output_instruction
.reloc
== BFD_RELOC_CRIS_LAPCQ_OFFSET
1451 && output_instruction
.expr
.X_md
!= 0)
1453 /* Handle complex expressions. */
1455 = (output_instruction
.expr
.X_op_symbol
!= NULL
1456 ? 0 : output_instruction
.expr
.X_add_number
);
1458 = (output_instruction
.expr
.X_op_symbol
!= NULL
1459 ? make_expr_symbol (&output_instruction
.expr
)
1460 : output_instruction
.expr
.X_add_symbol
);
1462 /* This is a relaxing construct, so we need a frag_var rather
1463 than the fix_new_exp call below. */
1464 frag_var (rs_machine_dependent
,
1466 ENCODE_RELAX (STATE_LAPC
, STATE_UNDF
),
1467 sym
, addvalue
, opcodep
);
1469 else if (output_instruction
.reloc
!= BFD_RELOC_NONE
)
1471 /* An immediate operand that has a relocation and needs to be
1472 processed further. */
1474 /* It is important to use fix_new_exp here and everywhere else
1475 (and not fix_new), as fix_new_exp can handle "difference
1476 expressions" - where the expression contains a difference of
1477 two symbols in the same segment. */
1478 fix_new_exp (frag_now
, (opcodep
- frag_now
->fr_literal
), 2,
1479 &output_instruction
.expr
,
1480 output_instruction
.reloc
== BFD_RELOC_32_PCREL
1481 || output_instruction
.reloc
== BFD_RELOC_16_PCREL
1482 || output_instruction
.reloc
== BFD_RELOC_8_PCREL
1483 || (output_instruction
.reloc
1484 == BFD_RELOC_CRIS_LAPCQ_OFFSET
),
1485 output_instruction
.reloc
);
1490 /* Helper error-reporting function: calls as_bad for a format string
1491 for a single value and zeroes the offending value (zero assumed
1492 being a valid value) to avoid repeated error reports in later value
1496 cris_bad (const char *format
, offsetT
*valp
)
1498 /* We cast to long so the format string can assume that format. */
1499 as_bad (format
, (long) *valp
);
1503 /* Low level text-to-bits assembly. */
1506 cris_process_instruction (char *insn_text
, struct cris_instruction
*out_insnp
,
1507 struct cris_prefix
*prefixp
)
1510 char modified_char
= 0;
1512 struct cris_opcode
*instruction
;
1519 /* Reset these fields to a harmless state in case we need to return in
1521 prefixp
->kind
= PREFIX_NONE
;
1522 prefixp
->reloc
= BFD_RELOC_NONE
;
1523 out_insnp
->insn_type
= CRIS_INSN_NONE
;
1524 out_insnp
->imm_oprnd_size
= 0;
1526 /* Find the end of the opcode mnemonic. We assume (true in 2.9.1)
1527 that the caller has translated the opcode to lower-case, up to the
1528 first non-letter. */
1529 for (operands
= insn_text
; ISLOWER (*operands
); ++operands
)
1532 /* Terminate the opcode after letters, but save the character there if
1533 it was of significance. */
1540 /* Put back the modified character later. */
1541 modified_char
= *operands
;
1545 /* Consume the character after the mnemonic
1546 and replace it with '\0'. */
1551 as_bad (_("Unknown opcode: `%s'"), insn_text
);
1555 /* Find the instruction. */
1556 instruction
= (struct cris_opcode
*) str_hash_find (op_hash
, insn_text
);
1557 if (instruction
== NULL
)
1559 as_bad (_("Unknown opcode: `%s'"), insn_text
);
1563 /* Put back the modified character. */
1564 switch (modified_char
)
1570 *--operands
= modified_char
;
1573 /* Try to match an opcode table slot. */
1574 for (s
= operands
;;)
1578 /* Initialize *prefixp, perhaps after being modified for a
1580 prefixp
->kind
= PREFIX_NONE
;
1581 prefixp
->reloc
= BFD_RELOC_NONE
;
1583 /* Initialize *out_insnp. */
1584 memset (out_insnp
, 0, sizeof (*out_insnp
));
1585 out_insnp
->opcode
= instruction
->match
;
1586 out_insnp
->reloc
= BFD_RELOC_NONE
;
1587 out_insnp
->insn_type
= CRIS_INSN_NORMAL
;
1588 out_insnp
->imm_oprnd_size
= 0;
1592 /* Build the opcode, checking as we go to make sure that the
1594 for (args
= instruction
->args
;; ++args
)
1599 /* If we've come to the end of arguments, we're done. */
1605 /* Non-matcher character for disassembly.
1613 /* These must match exactly. */
1619 /* "ACR", case-insensitive.
1620 Handle a sometimes-mandatory dollar sign as register
1622 if (*s
== REGISTER_PREFIX_CHAR
)
1624 else if (demand_register_prefix
)
1627 if ((*s
++ != 'a' && s
[-1] != 'A')
1628 || (*s
++ != 'c' && s
[-1] != 'C')
1629 || (*s
++ != 'r' && s
[-1] != 'R'))
1634 /* This is not really an operand, but causes a "BDAP
1635 -size,SP" prefix to be output, for PUSH instructions. */
1636 prefixp
->kind
= PREFIX_PUSH
;
1640 /* This letter marks an operand that should not be matched
1641 in the assembler. It is a branch with 16-bit
1642 displacement. The assembler will create them from the
1643 8-bit flavor when necessary. The assembler does not
1644 support the [rN+] operand, as the [r15+] that is
1645 generated for 16-bit displacements. */
1649 /* A 5-bit unsigned immediate in bits <4:0>. */
1650 if (! cris_get_expression (&s
, &out_insnp
->expr
))
1654 if (out_insnp
->expr
.X_op
== O_constant
1655 && (out_insnp
->expr
.X_add_number
< 0
1656 || out_insnp
->expr
.X_add_number
> 31))
1657 cris_bad (_("Immediate value not in 5 bit unsigned range: %ld"),
1658 &out_insnp
->expr
.X_add_number
);
1660 out_insnp
->reloc
= BFD_RELOC_CRIS_UNSIGNED_5
;
1665 /* A 4-bit unsigned immediate in bits <3:0>. */
1666 if (! cris_get_expression (&s
, &out_insnp
->expr
))
1670 if (out_insnp
->expr
.X_op
== O_constant
1671 && (out_insnp
->expr
.X_add_number
< 0
1672 || out_insnp
->expr
.X_add_number
> 15))
1673 cris_bad (_("Immediate value not in 4 bit unsigned range: %ld"),
1674 &out_insnp
->expr
.X_add_number
);
1676 out_insnp
->reloc
= BFD_RELOC_CRIS_UNSIGNED_4
;
1680 /* For 'd', check for an optional ".d" or ".D" at the
1681 start of the operands, followed by a space character. */
1683 if (modified_char
== '.' && *s
== '.')
1685 if ((s
[1] != 'd' && s
[1] == 'D')
1686 || ! ISSPACE (s
[2]))
1694 /* General register in bits <15:12> and <3:0>. */
1695 if (! get_gen_reg (&s
, ®no
))
1699 out_insnp
->opcode
|= regno
/* << 0 */;
1700 out_insnp
->opcode
|= regno
<< 12;
1705 /* Flags from the condition code register. */
1709 if (! get_flags (&s
, &flags
))
1712 out_insnp
->opcode
|= ((flags
& 0xf0) << 8) | (flags
& 0xf);
1717 /* A 6-bit signed immediate in bits <5:0>. */
1718 if (! cris_get_expression (&s
, &out_insnp
->expr
))
1722 if (out_insnp
->expr
.X_op
== O_constant
1723 && (out_insnp
->expr
.X_add_number
< -32
1724 || out_insnp
->expr
.X_add_number
> 31))
1725 cris_bad (_("Immediate value not in 6 bit range: %ld"),
1726 &out_insnp
->expr
.X_add_number
);
1728 out_insnp
->reloc
= BFD_RELOC_CRIS_SIGNED_6
;
1733 /* A 6-bit unsigned immediate in bits <5:0>. */
1734 if (! cris_get_expression (&s
, &out_insnp
->expr
))
1738 if (out_insnp
->expr
.X_op
== O_constant
1739 && (out_insnp
->expr
.X_add_number
< 0
1740 || out_insnp
->expr
.X_add_number
> 63))
1741 cris_bad (_("Immediate value not in 6 bit unsigned range: %ld"),
1742 &out_insnp
->expr
.X_add_number
);
1744 out_insnp
->reloc
= BFD_RELOC_CRIS_UNSIGNED_6
;
1749 /* A size modifier, B, W or D, to be put in a bit position
1750 suitable for CLEAR instructions (i.e. reflecting a zero
1752 if (! get_bwd_size_modifier (&s
, &size_bits
))
1759 out_insnp
->opcode
|= 0 << 12;
1763 out_insnp
->opcode
|= 4 << 12;
1767 out_insnp
->opcode
|= 8 << 12;
1774 /* A size modifier, B, W or D, to be put in bits <5:4>. */
1775 if (modified_char
!= '.'
1776 || ! get_bwd_size_modifier (&s
, &size_bits
))
1780 out_insnp
->opcode
|= size_bits
<< 4;
1785 /* A branch expression. */
1786 if (! cris_get_expression (&s
, &out_insnp
->expr
))
1790 out_insnp
->insn_type
= CRIS_INSN_BRANCH
;
1795 /* A 8-bit quick BDAP expression, "expr,R". */
1796 if (! cris_get_expression (&s
, &out_insnp
->expr
))
1804 if (!get_gen_reg (&s
, ®no
))
1807 out_insnp
->opcode
|= regno
<< 12;
1808 out_insnp
->reloc
= BFD_RELOC_CRIS_SIGNED_8
;
1812 /* A BDAP expression for any size, "expr,R". */
1813 if (! cris_get_expression (&s
, &prefixp
->expr
))
1822 if (!get_gen_reg (&s
, &prefixp
->base_reg_number
))
1825 /* Since 'O' is used with an explicit bdap, we have no
1826 "real" instruction. */
1827 prefixp
->kind
= PREFIX_BDAP_IMM
;
1829 = BDAP_QUICK_OPCODE
| (prefixp
->base_reg_number
<< 12);
1831 out_insnp
->insn_type
= CRIS_INSN_NONE
;
1836 /* Special register in bits <15:12>. */
1837 if (! get_spec_reg (&s
, &out_insnp
->spec_reg
))
1841 /* Use of some special register names come with a
1842 specific warning. Note that we have no ".cpu type"
1843 pseudo yet, so some of this is just unused
1845 if (out_insnp
->spec_reg
->warning
)
1846 as_warn ("%s", out_insnp
->spec_reg
->warning
);
1847 else if (out_insnp
->spec_reg
->applicable_version
1848 == cris_ver_warning
)
1849 /* Others have a generic warning. */
1850 as_warn (_("Unimplemented register `%s' specified"),
1851 out_insnp
->spec_reg
->name
);
1854 |= out_insnp
->spec_reg
->number
<< 12;
1859 /* This character is used in the disassembler to
1860 recognize a prefix instruction to fold into the
1861 addressing mode for the next instruction. It is
1866 /* General register in bits <15:12>. */
1867 if (! get_gen_reg (&s
, ®no
))
1871 out_insnp
->opcode
|= regno
<< 12;
1876 /* General register in bits <3:0>. */
1877 if (! get_gen_reg (&s
, ®no
))
1881 out_insnp
->opcode
|= regno
/* << 0 */;
1886 /* Source operand in bit <10> and a prefix; a 3-operand
1888 if (! get_3op_or_dip_prefix_op (&s
, prefixp
))
1894 /* Source operand in bits <10>, <3:0> and optionally a
1895 prefix; i.e. an indirect operand or an side-effect
1896 prefix (where valid). */
1897 if (! get_autoinc_prefix_or_indir_op (&s
, prefixp
, &mode
,
1904 if (prefixp
->kind
!= PREFIX_NONE
)
1906 /* A prefix, so it has the autoincrement bit
1908 out_insnp
->opcode
|= (AUTOINCR_BIT
<< 8);
1912 /* No prefix. The "mode" variable contains bits like
1913 whether or not this is autoincrement mode. */
1914 out_insnp
->opcode
|= (mode
<< 10);
1916 /* If there was a reloc specifier, then it was
1917 attached to the prefix. Note that we can't check
1918 that the reloc size matches, since we don't have
1919 all the operands yet in all cases. */
1920 if (prefixp
->reloc
!= BFD_RELOC_NONE
)
1921 out_insnp
->reloc
= prefixp
->reloc
;
1924 out_insnp
->opcode
|= regno
/* << 0 */ ;
1930 /* Like 's', but immediate operand only. Also do not
1931 modify insn. There are no insns where an explicit reloc
1932 specifier makes sense. */
1933 if (cris_get_expression (&s
, &out_insnp
->expr
))
1941 /* Like 'N', but PC-relative to the start of the insn.
1942 There might be a :PLT to request a PLT entry. */
1943 if (cris_get_expression (&s
, &out_insnp
->expr
))
1946 out_insnp
->reloc
= BFD_RELOC_32_PCREL
;
1948 /* We have to adjust the expression, because that
1949 relocation is to the location *after* the
1950 relocation. So add 2 for the insn and 4 for the
1952 out_insnp
->expr
.X_add_number
+= 6;
1954 /* TLS specifiers do not make sense here. */
1955 if (pic
&& *s
== RELOC_SUFFIX_CHAR
)
1956 cris_get_reloc_suffix (&s
, &out_insnp
->reloc
,
1964 /* Maybe 'u', maybe 'n'. Only for LAPC/LAPCQ. */
1965 if (cris_get_expression (&s
, &out_insnp
->expr
))
1967 out_insnp
->reloc
= BFD_RELOC_CRIS_LAPCQ_OFFSET
;
1969 /* Define 1 as relaxing. */
1970 out_insnp
->expr
.X_md
= 1;
1976 /* Four PC-relative bits in <3:0> representing <4:1>:0 of
1977 an offset relative to the beginning of the current
1979 if (cris_get_expression (&s
, &out_insnp
->expr
))
1981 out_insnp
->reloc
= BFD_RELOC_CRIS_LAPCQ_OFFSET
;
1983 /* Define 0 as non-relaxing. */
1984 out_insnp
->expr
.X_md
= 0;
1986 /* We have to adjust the expression, because that
1987 relocation is to the location *after* the
1988 insn. So add 2 for the insn. */
1989 out_insnp
->expr
.X_add_number
+= 2;
1995 /* Rs.m in bits <15:12> and <5:4>. */
1996 if (! get_gen_reg (&s
, ®no
)
1997 || ! get_bwd_size_modifier (&s
, &size_bits
))
2001 out_insnp
->opcode
|= (regno
<< 12) | (size_bits
<< 4);
2006 /* Source operand in bits <10>, <3:0> and optionally a
2007 prefix; i.e. an indirect operand or an side-effect
2010 The difference to 's' is that this does not allow an
2011 "immediate" expression. */
2012 if (! get_autoinc_prefix_or_indir_op (&s
, prefixp
,
2020 if (prefixp
->kind
!= PREFIX_NONE
)
2022 /* A prefix, and those matched here always have
2023 side-effects (see 's' case). */
2024 out_insnp
->opcode
|= (AUTOINCR_BIT
<< 8);
2028 /* No prefix. The "mode" variable contains bits
2029 like whether or not this is autoincrement
2031 out_insnp
->opcode
|= (mode
<< 10);
2034 out_insnp
->opcode
|= regno
/* << 0 */;
2039 /* Size modifier (B or W) in bit <4>. */
2040 if (! get_bw_size_modifier (&s
, &size_bits
))
2044 out_insnp
->opcode
|= size_bits
<< 4;
2049 if (cris_arch
== arch_crisv32
2050 && get_sup_reg (&s
, ®no
))
2052 out_insnp
->opcode
|= regno
<< 12;
2061 /* We get here when we fail a match above or we found a
2062 complete match. Break out of this loop. */
2066 /* Was it a match or a miss? */
2069 /* If it's just that the args don't match, maybe the next
2070 item in the table is the same opcode but with
2071 matching operands. First skip any invalid ones. */
2072 while (instruction
[1].name
!= NULL
2073 && strcmp (instruction
->name
, instruction
[1].name
) == 0
2074 && ! cris_insn_ver_valid_for_arch (instruction
[1]
2075 .applicable_version
,
2079 if (instruction
[1].name
!= NULL
2080 && strcmp (instruction
->name
, instruction
[1].name
) == 0
2081 && cris_insn_ver_valid_for_arch (instruction
[1]
2082 .applicable_version
,
2085 /* Yep. Restart and try that one instead. */
2092 /* We've come to the end of instructions with this
2093 opcode, so it must be an error. */
2094 as_bad (_("Illegal operands"));
2096 /* As discard_rest_of_line, but without continuing to the
2098 while (!is_end_of_line
[(unsigned char) *input_line_pointer
])
2099 input_line_pointer
++;
2105 /* We have a match. Check if there's anything more to do. */
2108 /* There was an immediate mode operand, so we must check
2109 that it has an appropriate size. */
2110 switch (instruction
->imm_oprnd_size
)
2114 /* Shouldn't happen; this one does not have immediate
2115 operands with different sizes. */
2116 BAD_CASE (instruction
->imm_oprnd_size
);
2120 out_insnp
->imm_oprnd_size
= 4;
2124 if (cris_arch
== arch_crisv32
)
2125 /* All immediate loads of special registers are
2126 32-bit on CRISv32. */
2127 out_insnp
->imm_oprnd_size
= 4;
2129 switch (out_insnp
->spec_reg
->reg_size
)
2132 if (out_insnp
->expr
.X_op
== O_constant
2133 && (out_insnp
->expr
.X_add_number
< -128
2134 || out_insnp
->expr
.X_add_number
> 255))
2135 cris_bad (_("Immediate value not in 8 bit range: %ld"),
2136 &out_insnp
->expr
.X_add_number
);
2139 /* FIXME: We need an indicator in the instruction
2140 table to pass on, to indicate if we need to check
2141 overflow for a signed or unsigned number. */
2142 if (out_insnp
->expr
.X_op
== O_constant
2143 && (out_insnp
->expr
.X_add_number
< -32768
2144 || out_insnp
->expr
.X_add_number
> 65535))
2145 cris_bad (_("Immediate value not in 16 bit range: %ld"),
2146 &out_insnp
->expr
.X_add_number
);
2147 out_insnp
->imm_oprnd_size
= 2;
2151 out_insnp
->imm_oprnd_size
= 4;
2155 BAD_CASE (out_insnp
->spec_reg
->reg_size
);
2160 case SIZE_FIELD_SIGNED
:
2161 case SIZE_FIELD_UNSIGNED
:
2164 /* FIXME: Find way to pass un/signedness to
2165 caller, and set reloc type instead, postponing
2166 this check until cris_number_to_imm. That
2167 necessarily corrects the reloc type for the
2168 byte case, maybe requiring further changes. */
2170 if (out_insnp
->expr
.X_op
== O_constant
)
2172 if (instruction
->imm_oprnd_size
== SIZE_FIELD
2173 && (out_insnp
->expr
.X_add_number
< -128
2174 || out_insnp
->expr
.X_add_number
> 255))
2175 cris_bad (_("Immediate value not in 8 bit range: %ld"),
2176 &out_insnp
->expr
.X_add_number
);
2177 else if (instruction
->imm_oprnd_size
== SIZE_FIELD_SIGNED
2178 && (out_insnp
->expr
.X_add_number
< -128
2179 || out_insnp
->expr
.X_add_number
> 127))
2180 cris_bad (_("Immediate value not in 8 bit signed range: %ld"),
2181 &out_insnp
->expr
.X_add_number
);
2182 else if (instruction
->imm_oprnd_size
== SIZE_FIELD_UNSIGNED
2183 && (out_insnp
->expr
.X_add_number
< 0
2184 || out_insnp
->expr
.X_add_number
> 255))
2185 cris_bad (_("Immediate value not in 8 bit unsigned range: %ld"),
2186 &out_insnp
->expr
.X_add_number
);
2191 if (out_insnp
->expr
.X_op
== O_constant
)
2193 if (instruction
->imm_oprnd_size
== SIZE_FIELD
2194 && (out_insnp
->expr
.X_add_number
< -32768
2195 || out_insnp
->expr
.X_add_number
> 65535))
2196 cris_bad (_("Immediate value not in 16 bit range: %ld"),
2197 &out_insnp
->expr
.X_add_number
);
2198 else if (instruction
->imm_oprnd_size
== SIZE_FIELD_SIGNED
2199 && (out_insnp
->expr
.X_add_number
< -32768
2200 || out_insnp
->expr
.X_add_number
> 32767))
2201 cris_bad (_("Immediate value not in 16 bit signed range: %ld"),
2202 &out_insnp
->expr
.X_add_number
);
2203 else if (instruction
->imm_oprnd_size
== SIZE_FIELD_UNSIGNED
2204 && (out_insnp
->expr
.X_add_number
< 0
2205 || out_insnp
->expr
.X_add_number
> 65535))
2206 cris_bad (_("Immediate value not in 16 bit unsigned range: %ld"),
2207 &out_insnp
->expr
.X_add_number
);
2209 out_insnp
->imm_oprnd_size
= 2;
2213 out_insnp
->imm_oprnd_size
= 4;
2217 BAD_CASE (out_insnp
->spec_reg
->reg_size
);
2221 /* If there was a relocation specified for the immediate
2222 expression (i.e. it had a PIC or TLS modifier) check that the
2223 size of the relocation matches the size specified by
2225 if (out_insnp
->reloc
!= BFD_RELOC_NONE
2226 && (cris_get_specified_reloc_size (out_insnp
->reloc
)
2227 != (unsigned int) out_insnp
->imm_oprnd_size
))
2228 as_bad (out_insnp
->reloc
== BFD_RELOC_CRIS_32_GD
2229 || out_insnp
->reloc
== BFD_RELOC_CRIS_32_TPREL
2230 || out_insnp
->reloc
== BFD_RELOC_CRIS_16_TPREL
2231 || out_insnp
->reloc
== BFD_RELOC_CRIS_32_IE
2232 ? _("TLS relocation size does not match operand size")
2233 : _("PIC relocation size does not match operand size"));
2235 else if (instruction
->op
== cris_muls_op
2236 || instruction
->op
== cris_mulu_op
)
2237 out_insnp
->insn_type
= CRIS_INSN_MUL
;
2243 /* Get a B, W, or D size modifier from the string pointed out by *cPP,
2244 which must point to a '.' in front of the modifier. On successful
2245 return, *cPP is advanced to the character following the size
2246 modifier, and is undefined otherwise.
2248 cPP Pointer to pointer to string starting
2249 with the size modifier.
2251 size_bitsp Pointer to variable to contain the size bits on
2254 Return 1 iff a correct size modifier is found, else 0. */
2257 get_bwd_size_modifier (char **cPP
, int *size_bitsp
)
2263 /* Consume the '.'. */
2287 /* Consume the size letter. */
2293 /* Get a B or W size modifier from the string pointed out by *cPP,
2294 which must point to a '.' in front of the modifier. On successful
2295 return, *cPP is advanced to the character following the size
2296 modifier, and is undefined otherwise.
2298 cPP Pointer to pointer to string starting
2299 with the size modifier.
2301 size_bitsp Pointer to variable to contain the size bits on
2304 Return 1 iff a correct size modifier is found, else 0. */
2307 get_bw_size_modifier (char **cPP
, int *size_bitsp
)
2313 /* Consume the '.'. */
2332 /* Consume the size letter. */
2338 /* Get a general register from the string pointed out by *cPP. The
2339 variable *cPP is advanced to the character following the general
2340 register name on a successful return, and has its initial position
2343 cPP Pointer to pointer to string, beginning with a general
2346 regnop Pointer to int containing the register number.
2348 Return 1 iff a correct general register designator is found,
2352 get_gen_reg (char **cPP
, int *regnop
)
2357 /* Handle a sometimes-mandatory dollar sign as register prefix. */
2358 if (**cPP
== REGISTER_PREFIX_CHAR
)
2360 else if (demand_register_prefix
)
2367 /* "P" as in "PC"? Consume the "P". */
2370 if ((**cPP
== 'C' || **cPP
== 'c')
2371 && ! ISALNUM ((*cPP
)[1])
2372 /* Here's a little twist: For v32 and the compatibility mode,
2373 we only recognize PC as a register number if there's '+]'
2374 after. We don't consume that, but the presence can only be
2375 valid after a register in a post-increment context, which
2376 is also the only valid context for PC as a register for
2377 v32. Not that it's used very often, but saying "MOVE.D
2378 [PC+],R5" should remain valid. It's not supported for
2379 jump-type insns or other insns with no [Rn+] mode, though. */
2380 && ((cris_arch
!= arch_crisv32
2381 && cris_arch
!= arch_cris_common_v10_v32
)
2382 || ((*cPP
)[1] == '+' && (*cPP
)[2] == ']')))
2384 /* It's "PC": consume the "c" and we're done. */
2391 /* Like with PC, we recognize ACR, but only if it's *not* followed
2392 by '+', and only for v32. */
2395 if (cris_arch
!= arch_crisv32
2396 || ((*cPP
)[1] != 'c' && (*cPP
)[1] != 'C')
2397 || ((*cPP
)[2] != 'r' && (*cPP
)[2] != 'R')
2398 || ISALNUM ((*cPP
)[3])
2399 || (*cPP
)[3] == '+')
2407 /* Hopefully r[0-9] or r1[0-5]. Consume 'R' or 'r'. */
2410 if (ISDIGIT (**cPP
))
2412 /* It's r[0-9]. Consume and check the next digit. */
2413 *regnop
= **cPP
- '0';
2416 if (! ISALNUM (**cPP
))
2418 /* No more digits, we're done. */
2423 /* One more digit. Consume and add. */
2424 *regnop
= *regnop
* 10 + (**cPP
- '0');
2426 /* We need to check for a valid register number; Rn,
2427 0 <= n <= MAX_REG. */
2428 if (*regnop
<= MAX_REG
)
2430 /* Consume second digit. */
2440 /* "S" as in "SP"? Consume the "S". */
2442 if (**cPP
== 'P' || **cPP
== 'p')
2444 /* It's "SP": consume the "p" and we're done. */
2452 /* Just here to silence compilation warnings. */
2456 /* We get here if we fail. Restore the pointer. */
2461 /* Get a special register from the string pointed out by *cPP. The
2462 variable *cPP is advanced to the character following the special
2463 register name if one is found, and retains its original position
2466 cPP Pointer to pointer to string starting with a special register
2469 sregpp Pointer to Pointer to struct spec_reg, where a pointer to the
2470 register description will be stored.
2472 Return 1 iff a correct special register name is found. */
2475 get_spec_reg (char **cPP
, const struct cris_spec_reg
**sregpp
)
2479 char *name_begin
= *cPP
;
2481 const struct cris_spec_reg
*sregp
;
2483 /* Handle a sometimes-mandatory dollar sign as register prefix. */
2484 if (*name_begin
== REGISTER_PREFIX_CHAR
)
2486 else if (demand_register_prefix
)
2489 /* Loop over all special registers. */
2490 for (sregp
= cris_spec_regs
; sregp
->name
!= NULL
; sregp
++)
2492 /* Start over from beginning of the supposed name. */
2496 while (*s2
!= '\0' && TOLOWER (*s1
) == *s2
)
2502 /* For a match, we must have consumed the name in the table, and we
2503 must be outside what could be part of a name. Assume here that a
2504 test for alphanumerics is sufficient for a name test. */
2505 if (*s2
== 0 && ! ISALNUM (*s1
)
2506 && cris_insn_ver_valid_for_arch (sregp
->applicable_version
,
2509 /* We have a match. Update the pointer and be done. */
2516 /* If we got here, we did not find any name. */
2520 /* Get a support register from the string pointed out by *cPP. The
2521 variable *cPP is advanced to the character following the support-
2522 register name if one is found, and retains its original position
2525 cPP Pointer to pointer to string starting with a support-register
2528 sregpp Pointer to int containing the register number.
2530 Return 1 iff a correct support-register name is found. */
2533 get_sup_reg (char **cPP
, int *regnop
)
2537 char *name_begin
= *cPP
;
2539 const struct cris_support_reg
*sregp
;
2541 /* Handle a sometimes-mandatory dollar sign as register prefix. */
2542 if (*name_begin
== REGISTER_PREFIX_CHAR
)
2544 else if (demand_register_prefix
)
2547 /* Loop over all support-registers. */
2548 for (sregp
= cris_support_regs
; sregp
->name
!= NULL
; sregp
++)
2550 /* Start over from beginning of the supposed name. */
2554 while (*s2
!= '\0' && TOLOWER (*s1
) == *s2
)
2560 /* For a match, we must have consumed the name in the table, and we
2561 must be outside what could be part of a name. Assume here that a
2562 test for alphanumerics is sufficient for a name test. */
2563 if (*s2
== 0 && ! ISALNUM (*s1
))
2565 /* We have a match. Update the pointer and be done. */
2567 *regnop
= sregp
->number
;
2572 /* If we got here, we did not find any name. */
2576 /* Get an unprefixed or side-effect-prefix operand from the string pointed
2577 out by *cPP. The pointer *cPP is advanced to the character following
2578 the indirect operand if we have success, else it contains an undefined
2581 cPP Pointer to pointer to string beginning with the first
2582 character of the supposed operand.
2584 prefixp Pointer to structure containing an optional instruction
2587 is_autoincp Pointer to int indicating the indirect or autoincrement
2590 src_regnop Pointer to int containing the source register number in
2593 imm_foundp Pointer to an int indicating if an immediate expression
2596 imm_exprP Pointer to a structure containing an immediate
2597 expression, if success and if *imm_foundp is nonzero.
2599 Return 1 iff a correct indirect operand is found. */
2602 get_autoinc_prefix_or_indir_op (char **cPP
, struct cris_prefix
*prefixp
,
2603 int *is_autoincp
, int *src_regnop
,
2604 int *imm_foundp
, expressionS
*imm_exprP
)
2606 /* Assume there was no immediate mode expression. */
2611 /* So this operand is one of:
2613 Autoincrement: [rN+]
2614 Indexed with assign: [rN=rM+rO.S]
2615 Offset with assign: [rN=rM+I], [rN=rM+[rO].s], [rN=rM+[rO+].s]
2617 Either way, consume the '['. */
2620 /* Get the rN register. */
2621 if (! get_gen_reg (cPP
, src_regnop
))
2622 /* If there was no register, then this cannot match. */
2626 /* We got the register, now check the next character. */
2630 /* Indirect mode. We're done here. */
2631 prefixp
->kind
= PREFIX_NONE
;
2636 /* This must be an auto-increment mode, if there's a
2638 prefixp
->kind
= PREFIX_NONE
;
2641 /* We consume this character and break out to check the
2647 /* This must be indexed with assign, or offset with assign
2648 to match. Not supported for crisv32 or in
2649 compatibility mode. */
2650 if (cris_arch
== arch_crisv32
2651 || cris_arch
== arch_cris_common_v10_v32
)
2656 /* Either way, the next thing must be a register. */
2657 if (! get_gen_reg (cPP
, &prefixp
->base_reg_number
))
2658 /* No register, no match. */
2662 /* We've consumed "[rN=rM", so we must be looking at
2663 "+rO.s]" or "+I]", or "-I]", or "+[rO].s]" or
2667 int index_reg_number
;
2673 /* This must be [rx=ry+[rz].s] or
2674 [rx=ry+[rz+].s] or no match. We must be
2675 looking at rz after consuming the '['. */
2678 if (!get_gen_reg (cPP
, &index_reg_number
))
2681 prefixp
->kind
= PREFIX_BDAP
;
2683 = (BDAP_INDIR_OPCODE
2684 + (prefixp
->base_reg_number
<< 12)
2685 + index_reg_number
);
2689 /* We've seen "[rx=ry+[rz+" here, so now we
2690 know that there must be "].s]" left to
2693 prefixp
->opcode
|= AUTOINCR_BIT
<< 8;
2696 /* If it wasn't autoincrement, we don't need to
2699 /* Check the next-to-last ']'. */
2705 /* Check the ".s" modifier. */
2706 if (! get_bwd_size_modifier (cPP
, &size_bits
))
2709 prefixp
->opcode
|= size_bits
<< 4;
2711 /* Now we got [rx=ry+[rz+].s or [rx=ry+[rz].s.
2712 We break out to check the final ']'. */
2715 /* It wasn't an indirection. Check if it's a
2717 else if (get_gen_reg (cPP
, &index_reg_number
))
2721 /* Indexed with assign mode: "[rN+rM.S]". */
2722 prefixp
->kind
= PREFIX_BIAP
;
2724 = (BIAP_OPCODE
+ (index_reg_number
<< 12)
2725 + prefixp
->base_reg_number
/* << 0 */);
2727 if (! get_bwd_size_modifier (cPP
, &size_bits
))
2728 /* Size missing, this isn't a match. */
2732 /* Size found, break out to check the
2734 prefixp
->opcode
|= size_bits
<< 4;
2738 /* Not a register. Then this must be "[rN+I]". */
2739 else if (cris_get_expression (cPP
, &prefixp
->expr
))
2741 /* We've got offset with assign mode. Fill
2742 in the blanks and break out to match the
2744 prefixp
->kind
= PREFIX_BDAP_IMM
;
2746 /* We tentatively put an opcode corresponding to
2747 a 32-bit operand here, although it may be
2748 relaxed when there's no relocation
2749 specifier for the operand. */
2751 = (BDAP_INDIR_OPCODE
2752 | (prefixp
->base_reg_number
<< 12)
2753 | (AUTOINCR_BIT
<< 8)
2755 | REG_PC
/* << 0 */);
2757 /* This can have a PIC suffix, specifying reloc
2759 if ((pic
|| tls
) && **cPP
== RELOC_SUFFIX_CHAR
)
2761 unsigned int relocsize
;
2763 cris_get_reloc_suffix (cPP
, &prefixp
->reloc
,
2766 /* Tweak the size of the immediate operand
2767 in the prefix opcode if it isn't what we
2770 = cris_get_specified_reloc_size (prefixp
->reloc
);
2773 = ((prefixp
->opcode
& ~(3 << 4))
2774 | ((relocsize
>> 1) << 4));
2779 /* Neither register nor expression found, so
2780 this can't be a match. */
2783 /* Not "[rN+" but perhaps "[rN-"? */
2784 else if (**cPP
== '-')
2786 /* We must have an offset with assign mode. */
2787 if (! cris_get_expression (cPP
, &prefixp
->expr
))
2788 /* No expression, no match. */
2792 /* We've got offset with assign mode. Fill
2793 in the blanks and break out to match the
2796 Note that we don't allow a relocation
2797 suffix for an operand with a minus
2799 prefixp
->kind
= PREFIX_BDAP_IMM
;
2804 /* Neither '+' nor '-' after "[rN=rM". Lose. */
2808 /* Neither ']' nor '+' nor '=' after "[rN". Lose. */
2813 /* When we get here, we have a match and will just check the closing
2814 ']'. We can still fail though. */
2819 /* Don't forget to consume the final ']'.
2820 Then return in glory. */
2825 /* No indirection. Perhaps a constant? */
2826 else if (cris_get_expression (cPP
, imm_exprP
))
2828 /* Expression found, this is immediate mode. */
2829 prefixp
->kind
= PREFIX_NONE
;
2831 *src_regnop
= REG_PC
;
2834 /* This can have a PIC suffix, specifying reloc type to use. The
2835 caller must check that the reloc size matches the operand size. */
2836 if ((pic
|| tls
) && **cPP
== RELOC_SUFFIX_CHAR
)
2837 cris_get_reloc_suffix (cPP
, &prefixp
->reloc
, imm_exprP
);
2842 /* No luck today. */
2846 /* This function gets an indirect operand in a three-address operand
2847 combination from the string pointed out by *cPP. The pointer *cPP is
2848 advanced to the character following the indirect operand on success, or
2849 has an unspecified value on failure.
2851 cPP Pointer to pointer to string beginning
2854 prefixp Pointer to structure containing an
2857 Returns 1 iff a correct indirect operand is found. */
2860 get_3op_or_dip_prefix_op (char **cPP
, struct cris_prefix
*prefixp
)
2865 /* We must have a '[' or it's a clean failure. */
2868 /* Eat the first '['. */
2873 /* A second '[', so this must be double-indirect mode. */
2875 prefixp
->kind
= PREFIX_DIP
;
2876 prefixp
->opcode
= DIP_OPCODE
;
2878 /* Get the register or fail entirely. */
2879 if (! get_gen_reg (cPP
, ®_number
))
2883 prefixp
->opcode
|= reg_number
/* << 0 */ ;
2886 /* Since we found a '+', this must be double-indirect
2887 autoincrement mode. */
2889 prefixp
->opcode
|= AUTOINCR_BIT
<< 8;
2892 /* There's nothing particular to do, if this was a
2893 double-indirect *without* autoincrement. */
2896 /* Check the first ']'. The second one is checked at the end. */
2900 /* Eat the first ']', so we'll be looking at a second ']'. */
2903 /* No second '['. Then we should have a register here, making
2905 else if (get_gen_reg (cPP
, &prefixp
->base_reg_number
))
2907 /* This must be indexed or offset mode: "[rN+I]" or
2908 "[rN+rM.S]" or "[rN+[rM].S]" or "[rN+[rM+].S]". */
2911 int index_reg_number
;
2917 /* This is "[rx+["... Expect a register next. */
2921 if (!get_gen_reg (cPP
, &index_reg_number
))
2924 prefixp
->kind
= PREFIX_BDAP
;
2926 = (BDAP_INDIR_OPCODE
2927 + (prefixp
->base_reg_number
<< 12)
2928 + index_reg_number
);
2930 /* We've seen "[rx+[ry", so check if this is
2934 /* Yep, now at "[rx+[ry+". */
2936 prefixp
->opcode
|= AUTOINCR_BIT
<< 8;
2938 /* If it wasn't autoincrement, we don't need to
2941 /* Check a first closing ']': "[rx+[ry]" or
2947 /* Now expect a size modifier ".S". */
2948 if (! get_bwd_size_modifier (cPP
, &size_bits
))
2951 prefixp
->opcode
|= size_bits
<< 4;
2953 /* Ok, all interesting stuff has been seen:
2954 "[rx+[ry+].S" or "[rx+[ry].S". We only need to
2955 expect a final ']', which we'll do in a common
2958 /* Seen "[rN+", but not a '[', so check if we have a
2960 else if (get_gen_reg (cPP
, &index_reg_number
))
2962 /* This is indexed mode: "[rN+rM.S]" or
2965 prefixp
->kind
= PREFIX_BIAP
;
2968 | prefixp
->base_reg_number
/* << 0 */
2969 | (index_reg_number
<< 12));
2971 /* Consume the ".S". */
2972 if (! get_bwd_size_modifier (cPP
, &size_bits
))
2973 /* Missing size, so fail. */
2976 /* Size found. Add that piece and drop down to
2977 the common checking of the closing ']'. */
2978 prefixp
->opcode
|= size_bits
<< 4;
2980 /* Seen "[rN+", but not a '[' or a register, so then
2981 it must be a constant "I".
2983 As a quality of implementation improvement, we check for a
2984 closing ']', like in an erroneous "[rN+]". If we don't,
2985 the expression parser will emit a confusing "bad
2986 expression" when it sees the ']', probably because it
2987 doesn't like seeing no expression. */
2988 else if (**cPP
!= ']' && cris_get_expression (cPP
, &prefixp
->expr
))
2990 /* Expression found, so fill in the bits of offset
2991 mode and drop down to check the closing ']'. */
2992 prefixp
->kind
= PREFIX_BDAP_IMM
;
2994 /* We tentatively put an opcode corresponding to a 32-bit
2995 operand here, although it may be relaxed when there's no
2996 PIC specifier for the operand. */
2998 = (BDAP_INDIR_OPCODE
2999 | (prefixp
->base_reg_number
<< 12)
3000 | (AUTOINCR_BIT
<< 8)
3002 | REG_PC
/* << 0 */);
3004 /* This can have a PIC suffix, specifying reloc type to use. */
3005 if ((pic
|| tls
) && **cPP
== RELOC_SUFFIX_CHAR
)
3007 unsigned int relocsize
;
3009 cris_get_reloc_suffix (cPP
, &prefixp
->reloc
, &prefixp
->expr
);
3011 /* Tweak the size of the immediate operand in the prefix
3012 opcode if it isn't what we set. */
3013 relocsize
= cris_get_specified_reloc_size (prefixp
->reloc
);
3016 = ((prefixp
->opcode
& ~(3 << 4))
3017 | ((relocsize
>> 1) << 4));
3021 /* Nothing valid here: lose. */
3024 /* Seen "[rN" but no '+', so check if it's a '-'. */
3025 else if (**cPP
== '-')
3027 /* Yep, we must have offset mode. */
3028 if (! cris_get_expression (cPP
, &prefixp
->expr
))
3029 /* No expression, so we lose. */
3033 /* Expression found to make this offset mode, so
3034 fill those bits and drop down to check the
3037 Note that we don't allow a PIC suffix for
3038 an operand with a minus sign like this. */
3039 prefixp
->kind
= PREFIX_BDAP_IMM
;
3044 /* We've seen "[rN", but not '+' or '-'; rather a ']'.
3045 Hmm. Normally this is a simple indirect mode that we
3046 shouldn't match, but if we expect ']', then we have a
3047 zero offset, so it can be a three-address-operand,
3048 like "[rN],rO,rP", thus offset mode.
3050 Don't eat the ']', that will be done in the closing
3052 prefixp
->expr
.X_op
= O_constant
;
3053 prefixp
->expr
.X_add_number
= 0;
3054 prefixp
->expr
.X_add_symbol
= NULL
;
3055 prefixp
->expr
.X_op_symbol
= NULL
;
3056 prefixp
->kind
= PREFIX_BDAP_IMM
;
3059 /* A '[', but no second '[', and no register. Check if we
3060 have an expression, making this "[I]" for a double-indirect
3062 else if (cris_get_expression (cPP
, &prefixp
->expr
))
3064 /* Expression found, the so called absolute mode for a
3065 double-indirect prefix on PC. */
3066 prefixp
->kind
= PREFIX_DIP
;
3067 prefixp
->opcode
= DIP_OPCODE
| (AUTOINCR_BIT
<< 8) | REG_PC
;
3068 prefixp
->reloc
= BFD_RELOC_32
;
3070 /* For :GD and :IE, it makes sense to have TLS specifiers here. */
3071 if ((pic
|| tls
) && **cPP
== RELOC_SUFFIX_CHAR
)
3072 cris_get_reloc_suffix (cPP
, &prefixp
->reloc
, &prefixp
->expr
);
3075 /* Neither '[' nor register nor expression. We lose. */
3078 /* We get here as a closing ceremony to a successful match. We just
3079 need to check the closing ']'. */
3081 /* Oops. Close but no air-polluter. */
3084 /* Don't forget to consume that ']', before returning in glory. */
3089 /* Get an expression from the string pointed out by *cPP.
3090 The pointer *cPP is advanced to the character following the expression
3091 on a success, or retains its original value otherwise.
3093 cPP Pointer to pointer to string beginning with the expression.
3095 exprP Pointer to structure containing the expression.
3097 Return 1 iff a correct expression is found. */
3100 cris_get_expression (char **cPP
, expressionS
*exprP
)
3102 char *saved_input_line_pointer
;
3104 /* The "expression" function expects to find an expression at the
3105 global variable input_line_pointer, so we have to save it to give
3106 the impression that we don't fiddle with global variables. */
3107 saved_input_line_pointer
= input_line_pointer
;
3108 input_line_pointer
= *cPP
;
3110 /* Avoid a common error, confusing addressing modes. Beware that the
3111 call to expression below does not signal that error; it treats []
3112 as parentheses, unless #define NEED_INDEX_OPERATOR in which case it
3113 gives them other confusing semantics rather than plain outlawing
3114 them, which is what we want. */
3115 if (*input_line_pointer
== '[')
3117 input_line_pointer
= saved_input_line_pointer
;
3122 if (exprP
->X_op
== O_illegal
|| exprP
->X_op
== O_absent
)
3124 input_line_pointer
= saved_input_line_pointer
;
3128 /* Everything seems to be fine, just restore the global
3129 input_line_pointer and say we're successful. */
3130 *cPP
= input_line_pointer
;
3131 input_line_pointer
= saved_input_line_pointer
;
3135 /* Get a sequence of flag characters from *spp. The pointer *cPP is
3136 advanced to the character following the expression. The flag
3137 characters are consecutive, no commas or spaces.
3139 cPP Pointer to pointer to string beginning with the expression.
3141 flagp Pointer to int to return the flags expression.
3143 Return 1 iff a correct flags expression is found. */
3146 get_flags (char **cPP
, int *flagsp
)
3154 if (! cris_insn_ver_valid_for_arch (cris_ver_v0_3
,
3162 if (! cris_insn_ver_valid_for_arch (cris_ver_v8_10
,
3170 if (! cris_insn_ver_valid_for_arch (cris_ver_v0_3
,
3178 if (! cris_insn_ver_valid_for_arch (cris_ver_v8_10
,
3186 if (! cris_insn_ver_valid_for_arch (cris_ver_v32p
,
3194 if (! cris_insn_ver_valid_for_arch (cris_ver_v32p
,
3231 /* We consider this successful if we stop at a comma or
3232 whitespace. Anything else, and we consider it a failure. */
3235 && ! ISSPACE (**cPP
))
3241 /* Don't forget to consume each flag character. */
3246 /* Generate code and fixes for a BDAP prefix.
3247 For v32, this handles ADDOQ because thankfully the opcodes are the
3250 base_regno Int containing the base register number.
3252 exprP Pointer to structure containing the offset expression. */
3255 gen_bdap (int base_regno
, expressionS
*exprP
)
3257 unsigned int opcode
;
3260 /* Put out the prefix opcode; assume quick immediate mode at first. */
3261 opcode
= BDAP_QUICK_OPCODE
| (base_regno
<< 12);
3262 opcodep
= cris_insn_first_word_frag ();
3263 md_number_to_chars (opcodep
, opcode
, 2);
3265 if (exprP
->X_op
== O_constant
)
3267 /* We have an absolute expression that we know the size of right
3272 value
= exprP
->X_add_number
;
3273 if (value
< -32768 || value
> 32767)
3274 /* Outside range for a "word", make it a dword. */
3277 /* Assume "word" size. */
3280 /* If this is a signed-byte value, we can fit it into the prefix
3282 if (value
>= -128 && value
<= 127)
3286 /* This is a word or dword displacement, which will be put in a
3287 word or dword after the prefix. */
3290 opcodep
[0] = BDAP_PC_LOW
+ (size
<< 4);
3292 opcodep
[1] |= BDAP_INCR_HIGH
;
3293 p
= frag_more (1 << size
);
3294 md_number_to_chars (p
, value
, 1 << size
);
3299 /* Handle complex expressions. */
3301 = SIMPLE_EXPR (exprP
) ? exprP
->X_add_number
: 0;
3303 = (SIMPLE_EXPR (exprP
)
3304 ? exprP
->X_add_symbol
: make_expr_symbol (exprP
));
3306 /* The expression is not defined yet but may become absolute. We
3307 make it a relocation to be relaxed. */
3308 frag_var (rs_machine_dependent
, 4, 0,
3309 ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX
, STATE_UNDF
),
3310 sym
, addvalue
, opcodep
);
3314 /* Encode a branch displacement in the range -256..254 into the form used
3315 by CRIS conditional branch instructions.
3317 offset The displacement value in bytes. */
3320 branch_disp (int offset
)
3324 /* Adjust all short branch offsets here. */
3325 if (cris_arch
== arch_crisv32
|| cris_arch
== arch_cris_common_v10_v32
)
3328 disp
= offset
& 0xFE;
3336 /* Generate code and fixes for a 32-bit conditional branch instruction
3337 created by "extending" an existing 8-bit branch instruction.
3339 opcodep Pointer to the word containing the original 8-bit branch
3342 writep Pointer to "extension area" following the first instruction
3345 fragP Pointer to the frag containing the instruction.
3347 add_symP, Parts of the destination address expression.
3352 gen_cond_branch_32 (char *opcodep
, char *writep
, fragS
*fragP
,
3353 symbolS
*add_symP
, symbolS
*sub_symP
, long int add_num
)
3359 if (cris_arch
== arch_crisv32
)
3361 nop_opcode
= NOP_OPCODE_V32
;
3363 branch_offset
= -2 - 8;
3367 nop_opcode
= NOP_OPCODE
;
3369 branch_offset
= -2 - 8;
3373 nop_opcode
= NOP_OPCODE
;
3375 branch_offset
= -2 - 6;
3378 /* We should never get here for compatibility mode. */
3379 if (cris_arch
== arch_cris_common_v10_v32
)
3380 as_fatal (_("Calling gen_cond_branch_32 for .arch common_v10_v32\n"));
3382 if (warn_for_branch_expansion
)
3383 as_warn_where (fragP
->fr_file
, fragP
->fr_line
,
3384 _("32-bit conditional branch generated"));
3386 /* Here, writep points to what will be opcodep + 2. First, we change
3387 the actual branch in opcodep[0] and opcodep[1], so that in the
3388 final insn, it will look like:
3391 This means we don't have to worry about changing the opcode or
3392 messing with the delay-slot instruction. So, we move it to last in
3393 the "extended" branch, and just change the displacement. Admittedly,
3394 it's not the optimal extended construct, but we should get this
3395 rarely enough that it shouldn't matter. */
3397 writep
[opc_offset
] = branch_disp (branch_offset
);
3398 writep
[opc_offset
+ 1] = opcodep
[1];
3400 /* Then, we change the branch to an unconditional branch over the
3401 extended part, to the new location of the Bcc:
3405 Note that these two writes are to currently different locations,
3408 md_number_to_chars (opcodep
, BA_QUICK_OPCODE
3409 + (cris_arch
== arch_crisv32
? 12 : (pic
? 10 : 8)),
3411 md_number_to_chars (writep
, nop_opcode
, 2);
3413 /* Then the extended thing, the 32-bit jump insn.
3414 opcodep+4: JUMP [PC+]
3415 or, in the PIC case,
3416 opcodep+4: MOVE [PC=PC+N],P0. */
3418 md_number_to_chars (writep
+ 2,
3419 cris_arch
== arch_crisv32
3421 : (pic
? MOVE_PC_INCR_OPCODE_PREFIX
3422 : JUMP_PC_INCR_OPCODE
), 2);
3424 /* We have to fill in the actual value too.
3426 This is most probably an expression, but we can cope with an absolute
3427 value too. FIXME: Testcase needed with and without pic. */
3429 if (add_symP
== NULL
&& sub_symP
== NULL
)
3431 /* An absolute address. */
3432 if (pic
|| cris_arch
== arch_crisv32
)
3433 fix_new (fragP
, writep
+ 4 - fragP
->fr_literal
, 4,
3434 section_symbol (absolute_section
),
3436 + (cris_arch
== arch_crisv32
? 6 : 0),
3437 1, BFD_RELOC_32_PCREL
);
3439 md_number_to_chars (writep
+ 4, add_num
, 4);
3443 if (sub_symP
!= NULL
)
3444 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
3445 _("Complex expression not supported"));
3447 /* Not absolute, we have to make it a frag for later evaluation. */
3448 fix_new (fragP
, writep
+ 4 - fragP
->fr_literal
, 4, add_symP
,
3449 add_num
+ (cris_arch
== arch_crisv32
? 6 : 0),
3450 pic
|| cris_arch
== arch_crisv32
? 1 : 0,
3451 pic
|| cris_arch
== arch_crisv32
3452 ? BFD_RELOC_32_PCREL
: BFD_RELOC_32
);
3455 if (cris_arch
== arch_crisv32
)
3456 /* Follow it with a "NOP" for CRISv32. */
3457 md_number_to_chars (writep
+ 8, NOP_OPCODE_V32
, 2);
3459 /* ...and the rest of the move-opcode for pre-v32 PIC. */
3460 md_number_to_chars (writep
+ 8, MOVE_PC_INCR_OPCODE_SUFFIX
, 2);
3463 /* Get the size of an immediate-reloc in bytes. Only valid for
3464 specified relocs (TLS, PIC). */
3467 cris_get_specified_reloc_size (bfd_reloc_code_real_type reloc
)
3470 reloc
== BFD_RELOC_CRIS_16_GOTPLT
3471 || reloc
== BFD_RELOC_CRIS_16_GOT
3472 || reloc
== BFD_RELOC_CRIS_16_GOT_GD
3473 || reloc
== BFD_RELOC_CRIS_16_DTPREL
3474 || reloc
== BFD_RELOC_CRIS_16_GOT_TPREL
3475 || reloc
== BFD_RELOC_CRIS_16_TPREL
3479 /* Store a reloc type at *RELOCP corresponding to the PIC suffix at *CPP.
3480 Adjust *EXPRP with any addend found after the PIC suffix. */
3483 cris_get_reloc_suffix (char **cPP
, bfd_reloc_code_real_type
*relocp
,
3488 expressionS const_expr
;
3490 const struct pic_suffixes_struct
3492 const char *const suffix
;
3494 bfd_reloc_code_real_type reloc
;
3500 #define PICMAP(s, r) {s, sizeof (s) - 1, r, TRUE, FALSE}
3501 #define PICTLSMAP(s, r) {s, sizeof (s) - 1, r, TRUE, TRUE}
3502 #define TLSMAP(s, r) {s, sizeof (s) - 1, r, FALSE, TRUE}
3503 /* Keep this in order with longest unambiguous prefix first. */
3504 PICMAP ("GOTPLT16", BFD_RELOC_CRIS_16_GOTPLT
),
3505 PICMAP ("GOTPLT", BFD_RELOC_CRIS_32_GOTPLT
),
3506 PICMAP ("PLTG", BFD_RELOC_CRIS_32_PLT_GOTREL
),
3507 PICMAP ("PLT", BFD_RELOC_CRIS_32_PLT_PCREL
),
3508 PICMAP ("GOTOFF", BFD_RELOC_CRIS_32_GOTREL
),
3509 PICMAP ("GOT16", BFD_RELOC_CRIS_16_GOT
),
3510 PICMAP ("GOT", BFD_RELOC_CRIS_32_GOT
),
3511 PICTLSMAP ("GDGOTREL16", BFD_RELOC_CRIS_16_GOT_GD
),
3512 PICTLSMAP ("GDGOTREL", BFD_RELOC_CRIS_32_GOT_GD
),
3513 TLSMAP ("GD", BFD_RELOC_CRIS_32_GD
),
3514 PICTLSMAP ("DTPREL16", BFD_RELOC_CRIS_16_DTPREL
),
3515 PICTLSMAP ("DTPREL", BFD_RELOC_CRIS_32_DTPREL
),
3516 TLSMAP ("IE", BFD_RELOC_CRIS_32_IE
),
3517 PICTLSMAP ("TPOFFGOT16", BFD_RELOC_CRIS_16_GOT_TPREL
),
3518 PICTLSMAP ("TPOFFGOT", BFD_RELOC_CRIS_32_GOT_TPREL
),
3519 TLSMAP ("TPOFF16", BFD_RELOC_CRIS_16_TPREL
),
3520 TLSMAP ("TPOFF", BFD_RELOC_CRIS_32_TPREL
)
3523 /* We've already seen the ':', so consume it. */
3526 for (i
= 0; i
< sizeof (pic_suffixes
)/sizeof (pic_suffixes
[0]); i
++)
3528 if (strncmp (s
, pic_suffixes
[i
].suffix
, pic_suffixes
[i
].len
) == 0
3529 && ! is_part_of_name (s
[pic_suffixes
[i
].len
])
3530 /* PIC and non-PIC relocations are exclusive. */
3531 && (pic
!= 0) == (pic_suffixes
[i
].pic_p
!= 0)
3532 /* But TLS can be active for non-TLS relocations too. */
3533 && (pic_suffixes
[i
].tls_p
== 0 || tls
))
3535 /* We have a match. Consume the suffix and set the relocation
3537 s
+= pic_suffixes
[i
].len
;
3539 /* There can be a constant term appended. If so, we will add it
3541 if (*s
== '+' || *s
== '-')
3543 if (! cris_get_expression (&s
, &const_expr
))
3544 /* There was some kind of syntax error. Bail out. */
3547 /* Allow complex expressions as the constant part. It still
3548 has to be an assembly-time constant or there will be an
3549 error emitting the reloc. This makes the PIC qualifiers
3550 idempotent; foo:GOTOFF+32 == foo+32:GOTOFF. The former we
3551 recognize here; the latter is parsed in the incoming
3553 exprP
->X_add_symbol
= make_expr_symbol (exprP
);
3554 exprP
->X_op
= O_add
;
3555 exprP
->X_add_number
= 0;
3556 exprP
->X_op_symbol
= make_expr_symbol (&const_expr
);
3559 *relocp
= pic_suffixes
[i
].reloc
;
3565 /* No match. Don't consume anything; fall back and there will be a
3569 /* This *could* have been:
3571 Turn a string in input_line_pointer into a floating point constant
3572 of type TYPE, and store the appropriate bytes in *LITP. The number
3573 of LITTLENUMS emitted is stored in *SIZEP.
3575 type A character from FLTCHARS that describes what kind of
3576 floating-point number is wanted.
3578 litp A pointer to an array that the result should be stored in.
3580 sizep A pointer to an integer where the size of the result is stored.
3582 But we don't support floating point constants in assembly code *at all*,
3583 since it's suboptimal and just opens up bug opportunities. GCC emits
3584 the bit patterns as hex. All we could do here is to emit what GCC
3585 would have done in the first place. *Nobody* writes floating-point
3586 code as assembly code, but if they do, they should be able enough to
3587 find out the correct bit patterns and use them. */
3590 md_atof (int type ATTRIBUTE_UNUSED
, char *litp ATTRIBUTE_UNUSED
,
3591 int *sizep ATTRIBUTE_UNUSED
)
3593 /* FIXME: Is this function mentioned in the internals.texi manual? If
3595 return _("Bad call to md_atof () - floating point formats are not supported");
3598 /* Turn a number as a fixS * into a series of bytes that represents the
3599 number on the target machine. The purpose of this procedure is the
3600 same as that of md_number_to_chars but this procedure is supposed to
3601 handle general bit field fixes and machine-dependent fixups.
3603 bufp Pointer to an array where the result should be stored.
3605 val The value to store.
3607 n The number of bytes in "val" that should be stored.
3609 fixP The fix to be applied to the bit field starting at bufp.
3611 seg The segment containing this number. */
3614 cris_number_to_imm (char *bufp
, long val
, int n
, fixS
*fixP
, segT seg
)
3621 /* We put the relative "vma" for the other segment for inter-segment
3622 relocations in the object data to stay binary "compatible" (with an
3623 uninteresting old version) for the relocation.
3624 Maybe delete some day. */
3626 && (sym_seg
= S_GET_SEGMENT (fixP
->fx_addsy
)) != seg
)
3627 val
+= sym_seg
->vma
;
3629 if (fixP
->fx_addsy
!= NULL
|| fixP
->fx_pcrel
)
3630 switch (fixP
->fx_r_type
)
3632 /* These must be fully resolved when getting here. */
3633 case BFD_RELOC_16_PCREL
:
3634 case BFD_RELOC_8_PCREL
:
3635 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3636 _("PC-relative relocation must be trivially resolved"));
3641 /* Only use the computed value for old-arch binaries. For all
3642 others, where we're going to output a relocation, put 0 in the
3644 if (cris_arch
!= arch_cris_any_v0_v10
3645 && (fixP
->fx_addsy
!= NULL
|| fixP
->fx_pcrel
))
3648 switch (fixP
->fx_r_type
)
3650 /* Ditto here, we put the addend into the object code as
3651 well as the reloc addend. Keep it that way for now, to simplify
3652 regression tests on the object file contents. FIXME: Seems
3653 uninteresting now that we have a test suite. */
3655 case BFD_RELOC_CRIS_32_GOT_GD
:
3656 case BFD_RELOC_CRIS_16_GOT_GD
:
3657 case BFD_RELOC_CRIS_32_GD
:
3658 case BFD_RELOC_CRIS_32_IE
:
3659 case BFD_RELOC_CRIS_32_DTPREL
:
3660 case BFD_RELOC_CRIS_16_DTPREL
:
3661 case BFD_RELOC_CRIS_32_GOT_TPREL
:
3662 case BFD_RELOC_CRIS_16_GOT_TPREL
:
3663 case BFD_RELOC_CRIS_32_TPREL
:
3664 case BFD_RELOC_CRIS_16_TPREL
:
3665 #if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
3666 if (IS_ELF
&& fixP
->fx_addsy
!= NULL
)
3667 S_SET_THREAD_LOCAL (fixP
->fx_addsy
);
3671 case BFD_RELOC_CRIS_16_GOT
:
3672 case BFD_RELOC_CRIS_32_GOT
:
3673 case BFD_RELOC_CRIS_32_GOTREL
:
3674 case BFD_RELOC_CRIS_16_GOTPLT
:
3675 case BFD_RELOC_CRIS_32_GOTPLT
:
3676 case BFD_RELOC_CRIS_32_PLT_GOTREL
:
3677 case BFD_RELOC_CRIS_32_PLT_PCREL
:
3678 /* We don't want to put in any kind of non-zero bits in the data
3679 being relocated for these. */
3680 md_number_to_chars (bufp
, 0, n
);
3683 case BFD_RELOC_32_PCREL
:
3684 /* If this one isn't fully resolved, we don't want to put non-zero
3686 if (fixP
->fx_addsy
!= NULL
|| fixP
->fx_pcrel
)
3691 /* No use having warnings here, since most hosts have a 32-bit type
3692 for "long" (which will probably change soon, now that I wrote
3694 bufp
[3] = (val
>> 24) & 0xFF;
3695 bufp
[2] = (val
>> 16) & 0xFF;
3696 bufp
[1] = (val
>> 8) & 0xFF;
3697 bufp
[0] = val
& 0xFF;
3700 /* FIXME: The 16 and 8-bit cases should have a way to check
3701 whether a signed or unsigned (or any signedness) number is
3705 case BFD_RELOC_16_PCREL
:
3706 if (val
> 0xffff || val
< -32768)
3707 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3708 _("Value not in 16 bit range: %ld"), val
);
3709 bufp
[1] = (val
>> 8) & 0xFF;
3710 bufp
[0] = val
& 0xFF;
3713 case BFD_RELOC_CRIS_SIGNED_16
:
3714 if (val
> 32767 || val
< -32768)
3715 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3716 _("Value not in 16 bit signed range: %ld"), val
);
3717 bufp
[1] = (val
>> 8) & 0xFF;
3718 bufp
[0] = val
& 0xFF;
3722 case BFD_RELOC_8_PCREL
:
3723 if (val
> 255 || val
< -128)
3724 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("Value not in 8 bit range: %ld"), val
);
3725 bufp
[0] = val
& 0xFF;
3728 case BFD_RELOC_CRIS_SIGNED_8
:
3729 if (val
> 127 || val
< -128)
3730 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3731 _("Value not in 8 bit signed range: %ld"), val
);
3732 bufp
[0] = val
& 0xFF;
3735 case BFD_RELOC_CRIS_LAPCQ_OFFSET
:
3736 /* FIXME: Test-cases for out-of-range values. Probably also need
3737 to use as_bad_where. */
3738 case BFD_RELOC_CRIS_UNSIGNED_4
:
3739 if (val
> 15 || val
< 0)
3740 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3741 _("Value not in 4 bit unsigned range: %ld"), val
);
3742 bufp
[0] |= val
& 0x0F;
3745 case BFD_RELOC_CRIS_UNSIGNED_5
:
3746 if (val
> 31 || val
< 0)
3747 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3748 _("Value not in 5 bit unsigned range: %ld"), val
);
3749 bufp
[0] |= val
& 0x1F;
3752 case BFD_RELOC_CRIS_SIGNED_6
:
3753 if (val
> 31 || val
< -32)
3754 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3755 _("Value not in 6 bit range: %ld"), val
);
3756 bufp
[0] |= val
& 0x3F;
3759 case BFD_RELOC_CRIS_UNSIGNED_6
:
3760 if (val
> 63 || val
< 0)
3761 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3762 _("Value not in 6 bit unsigned range: %ld"), val
);
3763 bufp
[0] |= val
& 0x3F;
3766 case BFD_RELOC_CRIS_BDISP8
:
3767 bufp
[0] = branch_disp (val
);
3770 case BFD_RELOC_NONE
:
3771 /* May actually happen automatically. For example at broken
3772 words, if the word turns out not to be broken.
3773 FIXME: When? Which testcase? */
3774 if (! fixP
->fx_addsy
)
3775 md_number_to_chars (bufp
, val
, n
);
3778 case BFD_RELOC_VTABLE_INHERIT
:
3779 /* This borrowed from tc-ppc.c on a whim. */
3781 && !S_IS_DEFINED (fixP
->fx_addsy
)
3782 && !S_IS_WEAK (fixP
->fx_addsy
))
3783 S_SET_WEAK (fixP
->fx_addsy
);
3786 case BFD_RELOC_VTABLE_ENTRY
:
3791 BAD_CASE (fixP
->fx_r_type
);
3795 /* Processes machine-dependent command line options. Called once for
3796 each option on the command line that the machine-independent part of
3797 GAS does not understand. */
3800 md_parse_option (int arg
, const char *argp ATTRIBUTE_UNUSED
)
3806 printf (_("Please use --help to see usage and options for this assembler.\n"));
3807 md_show_usage (stdout
);
3808 exit (EXIT_SUCCESS
);
3811 warn_for_branch_expansion
= 1;
3815 demand_register_prefix
= TRUE
;
3817 if (OUTPUT_FLAVOR
== bfd_target_aout_flavour
)
3818 as_bad (_("--no-underscore is invalid with a.out format"));
3820 symbols_have_leading_underscore
= FALSE
;
3824 demand_register_prefix
= FALSE
;
3825 symbols_have_leading_underscore
= TRUE
;
3829 if (OUTPUT_FLAVOR
!= bfd_target_elf_flavour
)
3830 as_bad (_("--pic is invalid for this object format"));
3832 if (cris_arch
!= arch_crisv32
)
3833 md_long_jump_size
= cris_any_v0_v10_long_jump_size_pic
;
3835 md_long_jump_size
= crisv32_long_jump_size
;
3840 const char *str
= argp
;
3841 enum cris_archs argarch
= cris_arch_from_string (&str
);
3843 if (argarch
== arch_cris_unknown
)
3844 as_bad (_("invalid <arch> in --march=<arch>: %s"), argp
);
3846 cris_arch
= argarch
;
3848 if (argarch
== arch_crisv32
)
3850 err_for_dangerous_mul_placement
= 0;
3851 md_long_jump_size
= crisv32_long_jump_size
;
3856 md_long_jump_size
= cris_any_v0_v10_long_jump_size_pic
;
3858 md_long_jump_size
= cris_any_v0_v10_long_jump_size
;
3863 case OPTION_MULBUG_ABORT_OFF
:
3864 err_for_dangerous_mul_placement
= 0;
3867 case OPTION_MULBUG_ABORT_ON
:
3868 err_for_dangerous_mul_placement
= 1;
3878 /* Round up a section size to the appropriate boundary. */
3880 md_section_align (segT segment
, valueT size
)
3882 /* Round all sects to multiple of 4, except the bss section, which
3883 we'll round to word-size.
3885 FIXME: Check if this really matters. All sections should be
3886 rounded up, and all sections should (optionally) be assumed to be
3887 dword-aligned, it's just that there is actual usage of linking to a
3889 if (OUTPUT_FLAVOR
== bfd_target_aout_flavour
)
3891 if (segment
== bss_section
)
3892 return (size
+ 1) & ~1;
3893 return (size
+ 3) & ~3;
3897 /* FIXME: Is this wanted? It matches the testsuite, but that's not
3898 really a valid reason. */
3899 if (segment
== text_section
)
3900 return (size
+ 3) & ~3;
3906 /* Generate a machine-dependent relocation. */
3908 tc_gen_reloc (asection
*section ATTRIBUTE_UNUSED
, fixS
*fixP
)
3911 bfd_reloc_code_real_type code
;
3913 switch (fixP
->fx_r_type
)
3915 case BFD_RELOC_CRIS_SIGNED_8
:
3919 case BFD_RELOC_CRIS_SIGNED_16
:
3920 code
= BFD_RELOC_16
;
3923 case BFD_RELOC_CRIS_16_GOT
:
3924 case BFD_RELOC_CRIS_32_GOT
:
3925 case BFD_RELOC_CRIS_16_GOTPLT
:
3926 case BFD_RELOC_CRIS_32_GOTPLT
:
3927 case BFD_RELOC_CRIS_32_GOTREL
:
3928 case BFD_RELOC_CRIS_32_PLT_GOTREL
:
3929 case BFD_RELOC_CRIS_32_PLT_PCREL
:
3931 case BFD_RELOC_32_PCREL
:
3934 case BFD_RELOC_VTABLE_INHERIT
:
3935 case BFD_RELOC_VTABLE_ENTRY
:
3936 case BFD_RELOC_CRIS_UNSIGNED_8
:
3937 case BFD_RELOC_CRIS_UNSIGNED_16
:
3938 case BFD_RELOC_CRIS_LAPCQ_OFFSET
:
3939 case BFD_RELOC_CRIS_32_GOT_GD
:
3940 case BFD_RELOC_CRIS_16_GOT_GD
:
3941 case BFD_RELOC_CRIS_32_GD
:
3942 case BFD_RELOC_CRIS_32_IE
:
3943 case BFD_RELOC_CRIS_32_DTPREL
:
3944 case BFD_RELOC_CRIS_16_DTPREL
:
3945 case BFD_RELOC_CRIS_32_GOT_TPREL
:
3946 case BFD_RELOC_CRIS_16_GOT_TPREL
:
3947 case BFD_RELOC_CRIS_32_TPREL
:
3948 case BFD_RELOC_CRIS_16_TPREL
:
3949 code
= fixP
->fx_r_type
;
3952 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3953 _("Semantics error. This type of operand can not be relocated, it must be an assembly-time constant"));
3957 relP
= XNEW (arelent
);
3958 gas_assert (relP
!= 0);
3959 relP
->sym_ptr_ptr
= XNEW (asymbol
*);
3960 *relP
->sym_ptr_ptr
= symbol_get_bfdsym (fixP
->fx_addsy
);
3961 relP
->address
= fixP
->fx_frag
->fr_address
+ fixP
->fx_where
;
3963 relP
->addend
= fixP
->fx_offset
;
3965 /* This is the standard place for KLUDGEs to work around bugs in
3966 bfd_install_relocation (first such note in the documentation
3967 appears with binutils-2.8).
3969 That function bfd_install_relocation does the wrong thing with
3970 putting stuff into the addend of a reloc (it should stay out) for a
3971 weak symbol. The really bad thing is that it adds the
3972 "segment-relative offset" of the symbol into the reloc. In this
3973 case, the reloc should instead be relative to the symbol with no
3974 other offset than the assembly code shows; and since the symbol is
3975 weak, any local definition should be ignored until link time (or
3977 To wit: weaksym+42 should be weaksym+42 in the reloc,
3978 not weaksym+(offset_from_segment_of_local_weaksym_definition)
3980 To "work around" this, we subtract the segment-relative offset of
3981 "known" weak symbols. This evens out the extra offset.
3983 That happens for a.out but not for ELF, since for ELF,
3984 bfd_install_relocation uses the "special function" field of the
3985 howto, and does not execute the code that needs to be undone. */
3987 if (OUTPUT_FLAVOR
== bfd_target_aout_flavour
3988 && fixP
->fx_addsy
&& S_IS_WEAK (fixP
->fx_addsy
)
3989 && ! bfd_is_und_section (S_GET_SEGMENT (fixP
->fx_addsy
)))
3991 relP
->addend
-= S_GET_VALUE (fixP
->fx_addsy
);
3994 relP
->howto
= bfd_reloc_type_lookup (stdoutput
, code
);
3999 name
= S_GET_NAME (fixP
->fx_addsy
);
4001 name
= _("<unknown>");
4002 as_fatal (_("Cannot generate relocation type for symbol %s, code %s"),
4003 name
, bfd_get_reloc_code_name (code
));
4009 /* Machine-dependent usage-output. */
4012 md_show_usage (FILE *stream
)
4014 /* The messages are formatted to line up with the generic options. */
4015 fprintf (stream
, _("CRIS-specific options:\n"));
4016 fprintf (stream
, "%s",
4017 _(" -h, -H Don't execute, print this help text. Deprecated.\n"));
4018 fprintf (stream
, "%s",
4019 _(" -N Warn when branches are expanded to jumps.\n"));
4020 fprintf (stream
, "%s",
4021 _(" --underscore User symbols are normally prepended with underscore.\n"));
4022 fprintf (stream
, "%s",
4023 _(" Registers will not need any prefix.\n"));
4024 fprintf (stream
, "%s",
4025 _(" --no-underscore User symbols do not have any prefix.\n"));
4026 fprintf (stream
, "%s",
4027 _(" Registers will require a `$'-prefix.\n"));
4028 #if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
4029 fprintf (stream
, "%s",
4030 _(" --pic Enable generation of position-independent code.\n"));
4032 fprintf (stream
, "%s",
4033 _(" --march=<arch> Generate code for <arch>. Valid choices for <arch>\n\
4034 are v0_v10, v10, v32 and common_v10_v32.\n"));
4037 /* Apply a fixS (fixup of an instruction or data that we didn't have
4038 enough info to complete immediately) to the data in a frag. */
4041 md_apply_fix (fixS
*fixP
, valueT
*valP
, segT seg
)
4043 /* This assignment truncates upper bits if valueT is 64 bits (as with
4044 --enable-64-bit-bfd), which is fine here, though we cast to avoid
4045 any compiler warnings. */
4046 long val
= (long) *valP
;
4047 char *buf
= fixP
->fx_where
+ fixP
->fx_frag
->fr_literal
;
4049 if (fixP
->fx_addsy
== 0 && !fixP
->fx_pcrel
)
4052 /* We can't actually support subtracting a symbol. */
4053 if (fixP
->fx_subsy
!= (symbolS
*) NULL
)
4054 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
4055 _("expression too complex"));
4057 /* This operand-type is scaled. */
4058 if (fixP
->fx_r_type
== BFD_RELOC_CRIS_LAPCQ_OFFSET
)
4060 cris_number_to_imm (buf
, val
, fixP
->fx_size
, fixP
, seg
);
4063 /* All relocations are relative to the location just after the fixup;
4064 the address of the fixup plus its size. */
4067 md_pcrel_from (fixS
*fixP
)
4069 valueT addr
= fixP
->fx_where
+ fixP
->fx_frag
->fr_address
;
4071 /* FIXME: We get here only at the end of assembly, when X in ".-X" is
4072 still unknown. Since we don't have pc-relative relocations in a.out,
4073 this is invalid. What to do if anything for a.out, is to add
4074 pc-relative relocations everywhere including the elinux program
4075 loader. For ELF, allow straight-forward PC-relative relocations,
4076 which are always relative to the location after the relocation. */
4077 if (OUTPUT_FLAVOR
!= bfd_target_elf_flavour
4078 || (fixP
->fx_r_type
!= BFD_RELOC_8_PCREL
4079 && fixP
->fx_r_type
!= BFD_RELOC_16_PCREL
4080 && fixP
->fx_r_type
!= BFD_RELOC_32_PCREL
4081 && fixP
->fx_r_type
!= BFD_RELOC_CRIS_LAPCQ_OFFSET
))
4082 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
4083 _("Invalid pc-relative relocation"));
4084 return fixP
->fx_size
+ addr
;
4087 /* We have no need to give defaults for symbol-values. */
4089 md_undefined_symbol (char *name ATTRIBUTE_UNUSED
)
4094 /* If this function returns non-zero, it prevents the relocation
4095 against symbol(s) in the FIXP from being replaced with relocations
4096 against section symbols, and guarantees that a relocation will be
4097 emitted even when the value can be resolved locally. */
4099 md_cris_force_relocation (struct fix
*fixp
)
4101 switch (fixp
->fx_r_type
)
4103 case BFD_RELOC_CRIS_16_GOT
:
4104 case BFD_RELOC_CRIS_32_GOT
:
4105 case BFD_RELOC_CRIS_16_GOTPLT
:
4106 case BFD_RELOC_CRIS_32_GOTPLT
:
4107 case BFD_RELOC_CRIS_32_GOTREL
:
4108 case BFD_RELOC_CRIS_32_PLT_GOTREL
:
4109 case BFD_RELOC_CRIS_32_PLT_PCREL
:
4115 return generic_force_reloc (fixp
);
4118 /* Check and emit error if broken-word handling has failed to fix up a
4119 case-table. This is called from write.c, after doing everything it
4120 knows about how to handle broken words. */
4123 tc_cris_check_adjusted_broken_word (offsetT new_offset
, struct broken_word
*brokwP
)
4125 if (new_offset
> 32767 || new_offset
< -32768)
4126 /* We really want a genuine error, not a warning, so make it one. */
4127 as_bad_where (brokwP
->frag
->fr_file
, brokwP
->frag
->fr_line
,
4128 _("Adjusted signed .word (%ld) overflows: `switch'-statement too large."),
4132 /* Make a leading REGISTER_PREFIX_CHAR mandatory for all registers. */
4135 cris_force_reg_prefix (void)
4137 demand_register_prefix
= TRUE
;
4140 /* Do not demand a leading REGISTER_PREFIX_CHAR for all registers. */
4143 cris_relax_reg_prefix (void)
4145 demand_register_prefix
= FALSE
;
4148 /* Adjust for having a leading '_' on all user symbols. */
4151 cris_sym_leading_underscore (void)
4153 /* We can't really do anything more than assert that what the program
4154 thinks symbol starts with agrees with the command-line options, since
4155 the bfd is already created. */
4157 if (!symbols_have_leading_underscore
)
4158 as_bad (_(".syntax %s requires command-line option `--underscore'"),
4159 SYNTAX_USER_SYM_LEADING_UNDERSCORE
);
4162 /* Adjust for not having any particular prefix on user symbols. */
4164 static void cris_sym_no_leading_underscore (void)
4166 if (symbols_have_leading_underscore
)
4167 as_bad (_(".syntax %s requires command-line option `--no-underscore'"),
4168 SYNTAX_USER_SYM_NO_LEADING_UNDERSCORE
);
4171 /* Handle the .syntax pseudo, which takes an argument that decides what
4172 syntax the assembly code has. */
4175 s_syntax (int ignore ATTRIBUTE_UNUSED
)
4177 static const struct syntaxes
4179 const char *const operand
;
4182 {{SYNTAX_ENFORCE_REG_PREFIX
, cris_force_reg_prefix
},
4183 {SYNTAX_RELAX_REG_PREFIX
, cris_relax_reg_prefix
},
4184 {SYNTAX_USER_SYM_LEADING_UNDERSCORE
, cris_sym_leading_underscore
},
4185 {SYNTAX_USER_SYM_NO_LEADING_UNDERSCORE
, cris_sym_no_leading_underscore
}};
4187 const struct syntaxes
*sp
;
4189 for (sp
= syntax_table
;
4190 sp
< syntax_table
+ sizeof (syntax_table
) / sizeof (syntax_table
[0]);
4193 if (strncmp (input_line_pointer
, sp
->operand
,
4194 strlen (sp
->operand
)) == 0)
4198 input_line_pointer
+= strlen (sp
->operand
);
4199 demand_empty_rest_of_line ();
4204 as_bad (_("Unknown .syntax operand"));
4207 /* Wrapper for dwarf2_directive_file to emit error if this is seen when
4208 not emitting ELF. */
4211 s_cris_file (int dummy
)
4213 if (OUTPUT_FLAVOR
!= bfd_target_elf_flavour
)
4214 as_bad (_("Pseudodirective .file is only valid when generating ELF"));
4216 dwarf2_directive_file (dummy
);
4219 /* Wrapper for dwarf2_directive_loc to emit error if this is seen when not
4223 s_cris_loc (int dummy
)
4225 if (OUTPUT_FLAVOR
!= bfd_target_elf_flavour
)
4226 as_bad (_("Pseudodirective .loc is only valid when generating ELF"));
4228 dwarf2_directive_loc (dummy
);
4231 /* Worker for .dtpoffd: generate a R_CRIS_32_DTPREL reloc, as for
4232 expr:DTPREL but for use in debug info. */
4235 s_cris_dtpoff (int bytes
)
4241 as_fatal (_("internal inconsistency problem: %s called for %d bytes"),
4242 __FUNCTION__
, bytes
);
4246 p
= frag_more (bytes
);
4247 md_number_to_chars (p
, 0, bytes
);
4248 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
, bytes
, &ex
, FALSE
,
4249 BFD_RELOC_CRIS_32_DTPREL
);
4251 demand_empty_rest_of_line ();
4255 /* Translate a <arch> string (as common to --march=<arch> and .arch <arch>)
4256 into an enum. If the string *STR is recognized, *STR is updated to point
4257 to the end of the string. If the string is not recognized,
4258 arch_cris_unknown is returned. */
4260 static enum cris_archs
4261 cris_arch_from_string (const char **str
)
4263 static const struct cris_arch_struct
4265 const char *const name
;
4266 enum cris_archs arch
;
4268 /* Keep in order longest-first for choices where one is a prefix
4270 {{"v0_v10", arch_cris_any_v0_v10
},
4271 {"v10", arch_crisv10
},
4272 {"v32", arch_crisv32
},
4273 {"common_v10_v32", arch_cris_common_v10_v32
}};
4275 const struct cris_arch_struct
*ap
;
4277 for (ap
= arch_table
;
4278 ap
< arch_table
+ sizeof (arch_table
) / sizeof (arch_table
[0]);
4281 int len
= strlen (ap
->name
);
4283 if (strncmp (*str
, ap
->name
, len
) == 0
4284 && (str
[0][len
] == 0 || ISSPACE (str
[0][len
])))
4286 *str
+= strlen (ap
->name
);
4291 return arch_cris_unknown
;
4294 /* Return nonzero if architecture version ARCH matches version range in
4298 cris_insn_ver_valid_for_arch (enum cris_insn_version_usage iver
,
4299 enum cris_archs arch
)
4303 case arch_cris_any_v0_v10
:
4305 (iver
== cris_ver_version_all
4306 || iver
== cris_ver_warning
4307 || iver
== cris_ver_v0_3
4308 || iver
== cris_ver_v3p
4309 || iver
== cris_ver_v0_10
4310 || iver
== cris_ver_sim_v0_10
4311 || iver
== cris_ver_v3_10
4312 || iver
== cris_ver_v8
4313 || iver
== cris_ver_v8p
4314 || iver
== cris_ver_v8_10
4315 || iver
== cris_ver_v10
4316 || iver
== cris_ver_v10p
);
4320 (iver
== cris_ver_version_all
4321 || iver
== cris_ver_v3p
4322 || iver
== cris_ver_v8p
4323 || iver
== cris_ver_v10p
4324 || iver
== cris_ver_v32p
);
4326 case arch_cris_common_v10_v32
:
4328 (iver
== cris_ver_version_all
4329 || iver
== cris_ver_v3p
4330 || iver
== cris_ver_v8p
4331 || iver
== cris_ver_v10p
);
4335 (iver
== cris_ver_version_all
4336 || iver
== cris_ver_v0_3
4337 || iver
== cris_ver_v0_10
4338 || iver
== cris_ver_sim_v0_10
);
4342 (iver
== cris_ver_version_all
4343 || iver
== cris_ver_v0_3
4344 || iver
== cris_ver_v3p
4345 || iver
== cris_ver_v0_10
4346 || iver
== cris_ver_sim_v0_10
4347 || iver
== cris_ver_v3_10
);
4351 (iver
== cris_ver_version_all
4352 || iver
== cris_ver_v3p
4353 || iver
== cris_ver_v0_10
4354 || iver
== cris_ver_sim_v0_10
4355 || iver
== cris_ver_v3_10
4356 || iver
== cris_ver_v8
4357 || iver
== cris_ver_v8p
4358 || iver
== cris_ver_v8_10
);
4362 (iver
== cris_ver_version_all
4363 || iver
== cris_ver_v3p
4364 || iver
== cris_ver_v0_10
4365 || iver
== cris_ver_sim_v0_10
4366 || iver
== cris_ver_v3_10
4367 || iver
== cris_ver_v8p
4368 || iver
== cris_ver_v8_10
4369 || iver
== cris_ver_v10
4370 || iver
== cris_ver_v10p
);
4377 /* Assert that the .arch ARCHCHOICE1 is compatible with the specified or
4378 default --march=<ARCHCHOICE2> option. */
4381 s_cris_arch (int dummy ATTRIBUTE_UNUSED
)
4383 /* Right now we take the easy route and check for sameness. It's not
4384 obvious that allowing e.g. --march=v32 and .arch common_v0_v32
4385 would be more useful than confusing, implementation-wise and
4388 const char *str
= input_line_pointer
;
4389 enum cris_archs arch
= cris_arch_from_string (&str
);
4391 if (arch
== arch_cris_unknown
)
4393 as_bad (_("unknown operand to .arch"));
4395 /* For this one, str does not reflect the end of the operand,
4396 since there was no matching arch. Skip it manually; skip
4397 things that can be part of a word (a name). */
4398 while (is_part_of_name (*str
))
4401 else if (arch
!= cris_arch
)
4402 as_bad (_(".arch <arch> requires a matching --march=... option"));
4404 input_line_pointer
= (char *) str
;
4405 demand_empty_rest_of_line ();
4411 * eval: (c-set-style "gnu")
4412 * indent-tabs-mode: t