1 /* tc-cris.c -- Assembler code for the CRIS CPU core.
2 Copyright (C) 2000 Free Software Foundation, Inc.
4 Contributed by Axis Communications AB, Lund, Sweden.
5 Originally written for GAS 1.38.1 by Mikael Asker.
6 Updated, BFDized and GNUified by Hans-Peter Nilsson.
8 This file is part of GAS, the GNU Assembler.
10 GAS is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 2, or (at your option)
15 GAS is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
20 You should have received a copy of the GNU General Public License
21 along with GAS; see the file COPYING. If not, write to the
22 Free Software Foundation, 59 Temple Place - Suite 330, Boston,
23 MA 02111-1307, USA. */
29 #include "opcode/cris.h"
31 /* Conventions used here:
32 Generally speaking, pointers to binutils types such as "fragS" and
33 "expressionS" get parameter and variable names ending in "P", such as
34 "fragP", to harmonize with the rest of the binutils code. Other
35 pointers get a "p" suffix, such as "bufp". Any function or type-name
36 that could clash with a current or future binutils or GAS function get
39 /* This might be CRIS_INSN_NONE if we're assembling a prefix-insn only.
40 Note that some prefix-insns might be assembled as CRIS_INSN_NORMAL. */
43 CRIS_INSN_NORMAL
, CRIS_INSN_NONE
, CRIS_INSN_BRANCH
46 /* An instruction will have one of these prefixes.
47 Although the same bit-pattern, we handle BDAP with an immediate
48 expression (eventually quick or [pc+]) different from when we only have
49 register expressions. */
52 PREFIX_NONE
, PREFIX_BDAP_IMM
, PREFIX_BDAP
, PREFIX_BIAP
, PREFIX_DIP
,
56 /* The prefix for an instruction. */
59 enum prefix_kind kind
;
63 /* There might be an expression to be evaluated, like I in [rN+I]. */
66 /* If there's an expression, we might need a relocation. Here's the
67 type of what relocation to start relaxaton with.
68 The relocation is assumed to start immediately after the prefix insn,
69 so we don't provide an offset. */
70 enum bfd_reloc_code_real reloc
;
73 /* The description of the instruction being assembled. */
74 struct cris_instruction
76 /* If CRIS_INSN_NONE, then this insn is of zero length. */
77 enum cris_insn_kind insn_type
;
79 /* If a special register was mentioned, this is its description, else
81 const struct cris_spec_reg
*spec_reg
;
85 /* An insn may have at most one expression; theoretically there could be
86 another in its prefix (but I don't see how that could happen). */
89 /* The expression might need a relocation. Here's one to start
91 enum bfd_reloc_code_real reloc
;
93 /* The size in bytes of an immediate expression, or zero in
98 static void cris_process_instruction
PARAMS ((char *,
99 struct cris_instruction
*,
100 struct cris_prefix
*));
101 static int get_bwd_size_modifier
PARAMS ((char **, int *));
102 static int get_bw_size_modifier
PARAMS ((char **, int *));
103 static int get_gen_reg
PARAMS ((char **, int *));
104 static int get_spec_reg
PARAMS ((char **,
105 const struct cris_spec_reg
**));
106 static int get_autoinc_prefix_or_indir_op
PARAMS ((char **,
107 struct cris_prefix
*,
110 static int get_3op_or_dip_prefix_op
PARAMS ((char **,
111 struct cris_prefix
*));
112 static int cris_get_expression
PARAMS ((char **, expressionS
*));
113 static int get_flags
PARAMS ((char **, int *));
114 static void gen_bdap
PARAMS ((int, expressionS
*));
115 static int branch_disp
PARAMS ((int));
116 static void gen_cond_branch_32
PARAMS ((char *, char *, fragS
*,
117 symbolS
*, symbolS
*, long int));
118 static void cris_number_to_imm
PARAMS ((char *, long, int, fixS
*));
119 static void cris_create_short_jump
PARAMS ((char *, addressT
, addressT
,
120 fragS
*, symbolS
*));
121 /* Handle to the opcode hash table. */
122 static struct hash_control
*op_hash
= NULL
;
124 const pseudo_typeS md_pseudo_table
[] =
130 static int warn_for_branch_expansion
= 0;
132 const char cris_comment_chars
[] = ";";
134 /* This array holds the chars that only start a comment at the beginning of
135 a line. If the line seems to have the form '# 123 filename'
136 .line and .file directives will appear in the pre-processed output. */
137 /* Note that input_file.c hand-checks for '#' at the beginning of the
138 first line of the input file. This is because the compiler outputs
139 #NO_APP at the beginning of its output. */
140 /* Also note that slash-star will always start a comment. */
141 const char line_comment_chars
[] = "#";
142 const char line_separator_chars
[] = "@";
144 /* Now all floating point support is shut off. See md_atof. */
145 const char EXP_CHARS
[] = "";
146 const char FLT_CHARS
[] = "";
148 /* For CRIS, we encode the relax_substateTs (in e.g. fr_substate) as:
150 ---/ /--+-----------------+-----------------+-----------------+
151 | what state ? | how long ? |
152 ---/ /--+-----------------+-----------------+-----------------+
154 The "how long" bits are 00 = byte, 01 = word, 10 = dword (long).
155 This is a Un*x convention.
156 Not all lengths are legit for a given value of (what state).
158 Groups for CRIS address relaxing:
161 length: byte, word, 10-byte expansion
164 length: byte, word, dword */
166 #define STATE_CONDITIONAL_BRANCH (1)
167 #define STATE_BASE_PLUS_DISP_PREFIX (2)
169 #define STATE_LENGTH_MASK (3)
170 #define STATE_BYTE (0)
171 #define STATE_WORD (1)
172 #define STATE_DWORD (2)
173 /* Symbol undefined. */
174 #define STATE_UNDF (3)
175 #define STATE_MAX_LENGTH (3)
177 /* These displacements are relative to the adress following the opcode
178 word of the instruction. The first letter is Byte, Word. The 2nd
179 letter is Forward, Backward. */
181 #define BRANCH_BF ( 254)
182 #define BRANCH_BB (-256)
183 #define BRANCH_WF (2 + 32767)
184 #define BRANCH_WB (2 + -32768)
186 #define BDAP_BF ( 127)
187 #define BDAP_BB (-128)
188 #define BDAP_WF ( 32767)
189 #define BDAP_WB (-32768)
191 #define ENCODE_RELAX(what, length) (((what) << 2) + (length))
193 const relax_typeS md_cris_relax_table
[] =
195 /* Error sentinel (0, 0). */
208 {BRANCH_BF
, BRANCH_BB
, 0, ENCODE_RELAX (1, 1)},
210 /* Bcc [PC+] (1, 1). */
211 {BRANCH_WF
, BRANCH_WB
, 2, ENCODE_RELAX (1, 2)},
213 /* BEXT/BWF, BA, JUMP (external), JUMP (always), Bnot_cc, JUMP (default)
221 {BDAP_BF
, BDAP_BB
, 0, ENCODE_RELAX (2, 1)},
223 /* BDAP.[bw] [PC+] (2, 1). */
224 {BDAP_WF
, BDAP_WB
, 2, ENCODE_RELAX (2, 2)},
226 /* BDAP.d [PC+] (2, 2). */
239 /* Target-specific multicharacter options, not const-declared at usage
240 in 2.9.1 and CVS of 2000-02-16. */
241 struct option md_longopts
[] =
243 {NULL
, no_argument
, NULL
, 0}
246 /* Not const-declared at usage in 2.9.1. */
247 size_t md_longopts_size
= sizeof (md_longopts
);
248 const char *md_shortopts
= "hHN";
250 /* At first glance, this may seems wrong and should be 4 (ba + nop); but
251 since a short_jump must skip a *number* of long jumps, it must also be
252 a long jump. Here, we hope to make it a "ba [16bit_offs]" and a "nop"
253 for the delay slot and hope that the jump table at most needs
254 32767/4=8191 long-jumps. A branch is better than a jump, since it is
255 relative; we will not have a reloc to fix up somewhere.
257 Note that we can't add relocs, because relaxation uses these fixed
258 numbers, and md_create_short_jump is called after relaxation. */
260 const int md_short_jump_size
= 6;
261 const int md_long_jump_size
= 6;
263 /* Report output format. */
266 cris_target_format ()
268 switch (OUTPUT_FLAVOR
)
270 case bfd_target_aout_flavour
:
273 case bfd_target_elf_flavour
:
282 /* Prepare machine-dependent frags for relaxation.
284 Called just before relaxation starts. Any symbol that is now undefined
285 will not become defined.
287 Return the correct fr_subtype in the frag.
289 Return the initial "guess for fr_var" to caller. The guess for fr_var
290 is *actually* the growth beyond fr_fix. Whatever we do to grow fr_fix
291 or fr_var contributes to our returned value.
293 Although it may not be explicit in the frag, pretend
294 fr_var starts with a value. */
297 md_estimate_size_before_relax (fragP
, segment_type
)
299 /* The segment is either N_DATA or N_TEXT. */
304 old_fr_fix
= fragP
->fr_fix
;
306 switch (fragP
->fr_subtype
)
308 case ENCODE_RELAX (STATE_CONDITIONAL_BRANCH
, STATE_UNDF
):
309 if (S_GET_SEGMENT (fragP
->fr_symbol
) == segment_type
)
311 /* The symbol lies in the same segment - a relaxable case. */
313 = ENCODE_RELAX (STATE_CONDITIONAL_BRANCH
, STATE_BYTE
);
317 /* Unknown or not the same segment, so not relaxable. */
320 /* A small branch-always (2 bytes) to the "real" branch
321 instruction, plus a delay-slot nop (2 bytes), plus a
322 jump (2 plus 4 bytes). See gen_cond_branch_32. */
323 fragP
->fr_fix
+= 2 + 2 + 2 + 4;
324 writep
= fragP
->fr_literal
+ old_fr_fix
;
325 gen_cond_branch_32 (fragP
->fr_opcode
, writep
, fragP
,
326 fragP
->fr_symbol
, (symbolS
*) NULL
,
332 case ENCODE_RELAX (STATE_CONDITIONAL_BRANCH
, STATE_BYTE
):
333 case ENCODE_RELAX (STATE_CONDITIONAL_BRANCH
, STATE_WORD
):
334 /* We *might* give a better initial guess if we peek at offsets
335 now, but the caller will relax correctly and without this, so
339 case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX
, STATE_UNDF
):
340 /* Note that we can not do anything sane with relaxing
341 [rX + a_known_symbol_in_text], it will have to be a 32-bit
344 We could play tricks with managing a constant pool and make
345 a_known_symbol_in_text a "bdap [pc + offset]" pointing there, but
346 that's pointless, it can only be longer and slower.
348 Off-topic: If PIC becomes *really* important, and has to be done
349 in the assembler and linker only (which would be weird or
350 clueless), we can so something. Imagine:
351 move.x [r + 32_bit_symbol],r
352 move.x [32_bit_symbol],r
353 move.x 32_bit_symbol,r
354 can be shortened by a word (8-bit offset) if we are close to the
355 symbol or keep its length (16-bit offset) or be a word longer
356 (32-bit offset). Then change the 32_bit_symbol into a "bdap [pc
357 + offset]", and put the offset to the 32_bit_symbol in "offset".
358 Weird, to say the least, and we still have to add support for a
359 PC-relative relocation in the loader (shared libraries). But
360 it's an interesting thought. */
362 if (S_GET_SEGMENT (fragP
->fr_symbol
) != absolute_section
)
364 /* Go for dword if not absolute or same segment. */
366 = ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX
, STATE_DWORD
);
371 /* Absolute expression. */
373 value
= S_GET_VALUE (fragP
->fr_symbol
) + fragP
->fr_offset
;
375 if (value
>= -128 && value
<= 127)
377 /* Byte displacement. */
378 (fragP
->fr_opcode
)[0] = value
;
382 /* Word or dword displacement. */
383 int pow2_of_size
= 1;
386 if (value
< -32768 || value
> 32767)
388 /* Outside word range, make it a dword. */
392 /* Modify the byte-offset BDAP into a word or dword offset
393 BDAP. Or really, a BDAP rX,8bit into a
394 BDAP.[wd] rX,[PC+] followed by a and a word or dword. */
395 (fragP
->fr_opcode
)[0] = BDAP_PC_LOW
+ pow2_of_size
* 16;
397 /* Keep the register number in the highest four bits. */
398 (fragP
->fr_opcode
)[1] &= 0xF0;
399 (fragP
->fr_opcode
)[1] |= BDAP_INCR_HIGH
;
401 /* It grew by two or four bytes. */
402 fragP
->fr_fix
+= 1 << pow2_of_size
;
403 writep
= fragP
->fr_literal
+ old_fr_fix
;
404 md_number_to_chars (writep
, value
, 1 << pow2_of_size
);
411 BAD_CASE (fragP
->fr_subtype
);
414 return fragP
->fr_var
+ (fragP
->fr_fix
- old_fr_fix
);
417 /* Perform post-processing of machine-dependent frags after relaxation.
418 Called after relaxation is finished.
420 fr_type == rs_machine_dependent.
421 fr_subtype is what the address relaxed to.
423 Out: Any fixS:s and constants are set up.
425 The caller will turn the frag into a ".space 0". */
428 md_convert_frag (abfd
, sec
, fragP
)
429 bfd
*abfd ATTRIBUTE_UNUSED
;
430 segT sec ATTRIBUTE_UNUSED
;
433 /* Pointer to first byte in variable-sized part of the frag. */
436 /* Pointer to first opcode byte in frag. */
439 /* Used to check integrity of the relaxation.
440 One of 2 = long, 1 = word, or 0 = byte. */
443 /* Size in bytes of variable-sized part of frag. */
444 int var_part_size
= 0;
446 /* This is part of *fragP. It contains all information about addresses
447 and offsets to varying parts. */
449 unsigned long var_part_offset
;
451 /* Where, in file space, is _var of *fragP? */
452 unsigned long address_of_var_part
= 0;
454 /* Where, in file space, does addr point? */
455 unsigned long target_address
;
457 know (fragP
->fr_type
== rs_machine_dependent
);
459 length_code
= fragP
->fr_subtype
& STATE_LENGTH_MASK
;
460 know (length_code
>= 0 && length_code
< STATE_MAX_LENGTH
);
462 var_part_offset
= fragP
->fr_fix
;
463 var_partp
= fragP
->fr_literal
+ var_part_offset
;
464 opcodep
= fragP
->fr_opcode
;
466 symbolP
= fragP
->fr_symbol
;
469 ? S_GET_VALUE (symbolP
) + symbol_get_frag(fragP
->fr_symbol
)->fr_address
470 : 0 ) + fragP
->fr_offset
;
471 address_of_var_part
= fragP
->fr_address
+ var_part_offset
;
473 switch (fragP
->fr_subtype
)
475 case ENCODE_RELAX (STATE_CONDITIONAL_BRANCH
, STATE_BYTE
):
476 opcodep
[0] = branch_disp ((target_address
- address_of_var_part
));
480 case ENCODE_RELAX (STATE_CONDITIONAL_BRANCH
, STATE_WORD
):
481 /* We had a quick immediate branch, now turn it into a word one i.e. a
483 opcodep
[0] = BRANCH_PC_LOW
;
485 opcodep
[1] |= BRANCH_INCR_HIGH
;
486 md_number_to_chars (var_partp
,
487 (long) (target_address
- (address_of_var_part
+ 2)),
492 case ENCODE_RELAX (STATE_CONDITIONAL_BRANCH
, STATE_DWORD
):
493 gen_cond_branch_32 (fragP
->fr_opcode
, var_partp
, fragP
,
494 fragP
->fr_symbol
, (symbolS
*) NULL
,
496 /* Ten bytes added: a branch, nop and a jump. */
497 var_part_size
= 2 + 2 + 4 + 2;
500 case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX
, STATE_BYTE
):
501 var_partp
[0] = target_address
- (address_of_var_part
+ 1);
505 case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX
, STATE_WORD
):
506 /* We had a BDAP 8-bit "quick immediate", now turn it into a 16-bit
507 one that uses PC autoincrement. */
508 opcodep
[0] = BDAP_PC_LOW
+ (1 << 4);
510 opcodep
[1] |= BDAP_INCR_HIGH
;
511 md_number_to_chars (var_partp
, (long) (target_address
), 2);
515 case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX
, STATE_DWORD
):
516 /* We had a BDAP 16-bit "word", change the offset to a dword. */
517 opcodep
[0] = BDAP_PC_LOW
+ (2 << 4);
519 opcodep
[1] |= BDAP_INCR_HIGH
;
520 if (fragP
->fr_symbol
== NULL
)
521 md_number_to_chars (var_partp
, fragP
->fr_offset
, 4);
523 fix_new (fragP
, var_partp
- fragP
->fr_literal
, 4, fragP
->fr_symbol
,
524 fragP
->fr_offset
, 0, BFD_RELOC_32
);
529 BAD_CASE (fragP
->fr_subtype
);
533 fragP
->fr_fix
+= var_part_size
;
536 /* Generate a short jump around a secondary jump table.
537 Used by md_create_long_jump.
539 This used to be md_create_short_jump, but is now called from
540 md_create_long_jump instead, when sufficient.
541 since the sizes of the jumps are the same. It used to be brittle,
542 making possibilities for creating bad code. */
545 cris_create_short_jump (storep
, from_addr
, to_addr
, fragP
, to_symbol
)
549 fragS
*fragP ATTRIBUTE_UNUSED
;
550 symbolS
*to_symbol ATTRIBUTE_UNUSED
;
554 distance
= to_addr
- from_addr
;
556 if (-254 <= distance
&& distance
<= 256)
558 /* Create a "short" short jump: "BA distance - 2". */
559 storep
[0] = branch_disp (distance
- 2);
560 storep
[1] = BA_QUICK_HIGH
;
562 /* A nop for the delay slot. */
563 md_number_to_chars (storep
+ 2, NOP_OPCODE
, 2);
565 /* The extra word should be filled with something sane too. Make it
566 a nop to keep disassembly sane. */
567 md_number_to_chars (storep
+ 4, NOP_OPCODE
, 2);
571 /* Make it a "long" short jump: "BA (PC+)". */
572 md_number_to_chars (storep
, BA_PC_INCR_OPCODE
, 2);
574 /* ".WORD distance - 4". */
575 md_number_to_chars (storep
+ 2, (long) (distance
- 4), 2);
577 /* A nop for the delay slot. */
578 md_number_to_chars (storep
+ 4, NOP_OPCODE
, 2);
582 /* Generate a long jump in a secondary jump table.
584 storep Where to store the jump instruction.
585 from_addr Address of the jump instruction.
586 to_addr Destination address of the jump.
587 fragP Which frag the destination address operand
589 to_symbol Destination symbol. */
592 md_create_long_jump (storep
, from_addr
, to_addr
, fragP
, to_symbol
)
601 distance
= to_addr
- from_addr
;
603 if (-32763 <= distance
&& distance
<= 32772)
605 /* Then make it a "short" long jump. */
606 cris_create_short_jump (storep
, from_addr
, to_addr
, fragP
,
611 /* We have a "long" long jump: "JUMP (PC+)". */
612 md_number_to_chars (storep
, JUMP_PC_INCR_OPCODE
, 2);
614 /* Follow with a ".DWORD to_addr". */
615 fix_new (fragP
, storep
+ 2 - fragP
->fr_literal
, 4, to_symbol
,
620 /* Port-specific assembler initialization. */
625 const char *hashret
= NULL
;
628 /* Set up a hash table for the instructions. */
629 op_hash
= hash_new ();
631 as_fatal (_("Virtual memory exhausted"));
633 while (cris_opcodes
[i
].name
!= NULL
)
635 const char *name
= cris_opcodes
[i
].name
;
636 hashret
= hash_insert (op_hash
, name
, (PTR
) &cris_opcodes
[i
]);
638 if (hashret
!= NULL
&& *hashret
!= '\0')
639 as_fatal (_("Can't hash `%s': %s\n"), cris_opcodes
[i
].name
,
640 *hashret
== 0 ? _("(unknown reason)") : hashret
);
643 if (cris_opcodes
[i
].match
& cris_opcodes
[i
].lose
)
644 as_fatal (_("Buggy opcode: `%s' \"%s\"\n"), cris_opcodes
[i
].name
,
645 cris_opcodes
[i
].args
);
649 while (cris_opcodes
[i
].name
!= NULL
650 && strcmp (cris_opcodes
[i
].name
, name
) == 0);
654 /* Assemble a source line. */
660 struct cris_instruction output_instruction
;
661 struct cris_prefix prefix
;
667 /* Do the low-level grunt - assemble to bits and split up into a prefix
668 and ordinary insn. */
669 cris_process_instruction (str
, &output_instruction
, &prefix
);
671 /* Handle any prefixes to the instruction. */
677 /* When the expression is unknown for a BDAP, it can need 0, 2 or 4
678 extra bytes, so we handle it separately. */
679 case PREFIX_BDAP_IMM
:
680 gen_bdap (prefix
.base_reg_number
, &prefix
.expr
);
686 opcodep
= frag_more (2);
688 /* Output the prefix opcode. */
689 md_number_to_chars (opcodep
, (long) prefix
.opcode
, 2);
691 /* This only happens for DIP, but is ok for the others as they have
693 if (prefix
.reloc
!= BFD_RELOC_NONE
)
695 /* Output an absolute mode address. */
697 fix_new_exp (frag_now
, (p
- frag_now
->fr_literal
), 4,
698 &prefix
.expr
, 0, prefix
.reloc
);
703 opcodep
= frag_more (2);
705 /* Output the prefix opcode. Being a "push", we add the negative
706 size of the register to "sp". */
707 if (output_instruction
.spec_reg
!= NULL
)
709 /* Special register. */
710 opcodep
[0] = -output_instruction
.spec_reg
->reg_size
;
714 /* General register. */
717 opcodep
[1] = (REG_SP
<< 4) + (BDAP_QUICK_OPCODE
>> 8);
721 BAD_CASE (prefix
.kind
);
724 /* If we only had a prefix insn, we're done. */
725 if (output_instruction
.insn_type
== CRIS_INSN_NONE
)
728 /* Done with the prefix. Continue with the main instruction. */
729 opcodep
= frag_more (2);
731 /* Output the instruction opcode. */
732 md_number_to_chars (opcodep
, (long) (output_instruction
.opcode
), 2);
734 /* Output the symbol-dependent instruction stuff. */
735 if (output_instruction
.insn_type
== CRIS_INSN_BRANCH
)
737 segT to_seg
= absolute_section
;
738 int is_undefined
= 0;
741 if (output_instruction
.expr
.X_op
!= O_constant
)
743 to_seg
= S_GET_SEGMENT (output_instruction
.expr
.X_add_symbol
);
745 if (to_seg
== undefined_section
)
749 if (output_instruction
.expr
.X_op
== O_constant
750 || to_seg
== now_seg
|| is_undefined
)
752 /* If is_undefined, then the expression may BECOME now_seg. */
753 length_code
= is_undefined
? STATE_UNDF
: STATE_BYTE
;
755 /* Make room for max ten bytes of variable length. */
756 frag_var (rs_machine_dependent
, 10, 0,
757 ENCODE_RELAX (STATE_CONDITIONAL_BRANCH
, length_code
),
758 output_instruction
.expr
.X_add_symbol
,
759 output_instruction
.expr
.X_add_number
,
764 /* We have: to_seg != now_seg && to_seg != undefined_section.
765 This means it is a branch to a known symbol in another
766 section. Code in data? Weird but valid. Emit a 32-bit
768 gen_cond_branch_32 (opcodep
, frag_more (10), frag_now
,
769 output_instruction
.expr
.X_add_symbol
,
771 output_instruction
.expr
.X_add_number
);
776 if (output_instruction
.imm_oprnd_size
> 0)
778 /* The intruction has an immediate operand. */
779 enum bfd_reloc_code_real reloc
= 0;
781 switch (output_instruction
.imm_oprnd_size
)
783 /* Any byte-size immediate constants are treated as
784 word-size. FIXME: Thus overflow check does not work
788 reloc
= BFD_RELOC_16
;
792 reloc
= BFD_RELOC_32
;
796 BAD_CASE (output_instruction
.imm_oprnd_size
);
799 p
= frag_more (output_instruction
.imm_oprnd_size
);
800 fix_new_exp (frag_now
, (p
- frag_now
->fr_literal
),
801 output_instruction
.imm_oprnd_size
,
802 &output_instruction
.expr
, 0, reloc
);
804 else if (output_instruction
.reloc
!= BFD_RELOC_NONE
)
806 /* An immediate operand that has a relocation and needs to be
807 processed further. */
809 /* It is important to use fix_new_exp here and everywhere else
810 (and not fix_new), as fix_new_exp can handle "difference
811 expressions" - where the expression contains a difference of
812 two symbols in the same segment. */
813 fix_new_exp (frag_now
, (opcodep
- frag_now
->fr_literal
), 2,
814 &output_instruction
.expr
, 0,
815 output_instruction
.reloc
);
820 /* Low level text-to-bits assembly. */
823 cris_process_instruction (insn_text
, out_insnp
, prefixp
)
825 struct cris_instruction
*out_insnp
;
826 struct cris_prefix
*prefixp
;
829 char modified_char
= 0;
831 struct cris_opcode
*instruction
;
838 /* Reset these fields to a harmless state in case we need to return in
840 prefixp
->kind
= PREFIX_NONE
;
841 prefixp
->reloc
= BFD_RELOC_NONE
;
842 out_insnp
->insn_type
= CRIS_INSN_NORMAL
;
843 out_insnp
->imm_oprnd_size
= 0;
845 /* Find the end of the opcode mnemonic. We assume (true in 2.9.1)
846 that the caller has translated the opcode to lower-case, up to the
848 for (operands
= insn_text
; islower (*operands
); ++operands
)
851 /* Terminate the opcode after letters, but save the character there if
852 it was of significance. */
859 /* Put back the modified character later. */
860 modified_char
= *operands
;
864 /* Consume the character after the mnemonic
865 and replace it with '\0'. */
870 as_bad (_("Unknown opcode: `%s'"), insn_text
);
874 /* Find the instruction. */
875 instruction
= (struct cris_opcode
*) hash_find (op_hash
, insn_text
);
876 if (instruction
== NULL
)
878 as_bad (_("Unknown opcode: `%s'"), insn_text
);
882 /* Put back the modified character. */
883 switch (modified_char
)
889 *--operands
= modified_char
;
892 /* Try to match an opcode table slot. */
897 /* Initialize *prefixp, perhaps after being modified for a
899 prefixp
->kind
= PREFIX_NONE
;
900 prefixp
->reloc
= BFD_RELOC_NONE
;
902 /* Initialize *out_insnp. */
903 memset (out_insnp
, 0, sizeof (*out_insnp
));
904 out_insnp
->opcode
= instruction
->match
;
905 out_insnp
->reloc
= BFD_RELOC_NONE
;
906 out_insnp
->insn_type
= CRIS_INSN_NORMAL
;
907 out_insnp
->imm_oprnd_size
= 0;
911 /* Build the opcode, checking as we go to make sure that the
913 for (args
= instruction
->args
;; ++args
)
918 /* If we've come to the end of arguments, we're done. */
924 /* Non-matcher character for disassembly.
930 /* These must match exactly. */
936 /* This is not really an operand, but causes a "BDAP
937 -size,SP" prefix to be output, for PUSH instructions. */
938 prefixp
->kind
= PREFIX_PUSH
;
942 /* This letter marks an operand that should not be matched
943 in the assembler. It is a branch with 16-bit
944 displacement. The assembler will create them from the
945 8-bit flavor when necessary. The assembler does not
946 support the [rN+] operand, as the [r15+] that is
947 generated for 16-bit displacements. */
951 /* A 5-bit unsigned immediate in bits <4:0>. */
952 if (! cris_get_expression (&s
, &out_insnp
->expr
))
956 if (out_insnp
->expr
.X_op
== O_constant
957 && (out_insnp
->expr
.X_add_number
< 0
958 || out_insnp
->expr
.X_add_number
> 31))
959 as_bad (_("Immediate value not in 5 bit unsigned range: %ld"),
960 out_insnp
->expr
.X_add_number
);
962 out_insnp
->reloc
= BFD_RELOC_CRIS_UNSIGNED_5
;
967 /* A 4-bit unsigned immediate in bits <3:0>. */
968 if (! cris_get_expression (&s
, &out_insnp
->expr
))
972 if (out_insnp
->expr
.X_op
== O_constant
973 && (out_insnp
->expr
.X_add_number
< 0
974 || out_insnp
->expr
.X_add_number
> 15))
975 as_bad (_("Immediate value not in 4 bit unsigned range: %ld"),
976 out_insnp
->expr
.X_add_number
);
978 out_insnp
->reloc
= BFD_RELOC_CRIS_UNSIGNED_4
;
983 /* General register in bits <15:12> and <3:0>. */
984 if (! get_gen_reg (&s
, ®no
))
988 out_insnp
->opcode
|= regno
/* << 0 */;
989 out_insnp
->opcode
|= regno
<< 12;
994 /* Flags from the condition code register. */
998 if (! get_flags (&s
, &flags
))
1001 out_insnp
->opcode
|= ((flags
& 0xf0) << 8) | (flags
& 0xf);
1006 /* A 6-bit signed immediate in bits <5:0>. */
1007 if (! cris_get_expression (&s
, &out_insnp
->expr
))
1011 if (out_insnp
->expr
.X_op
== O_constant
1012 && (out_insnp
->expr
.X_add_number
< -32
1013 || out_insnp
->expr
.X_add_number
> 31))
1014 as_bad (_("Immediate value not in 6 bit range: %ld"),
1015 out_insnp
->expr
.X_add_number
);
1016 out_insnp
->reloc
= BFD_RELOC_CRIS_SIGNED_6
;
1021 /* A 6-bit unsigned immediate in bits <5:0>. */
1022 if (! cris_get_expression (&s
, &out_insnp
->expr
))
1026 if (out_insnp
->expr
.X_op
== O_constant
1027 && (out_insnp
->expr
.X_add_number
< 0
1028 || out_insnp
->expr
.X_add_number
> 63))
1029 as_bad (_("Immediate value not in 6 bit unsigned range: %ld"),
1030 out_insnp
->expr
.X_add_number
);
1031 out_insnp
->reloc
= BFD_RELOC_CRIS_UNSIGNED_6
;
1036 /* A size modifier, B, W or D, to be put in a bit position
1037 suitable for CLEAR instructions (i.e. reflecting a zero
1039 if (! get_bwd_size_modifier (&s
, &size_bits
))
1046 out_insnp
->opcode
|= 0 << 12;
1050 out_insnp
->opcode
|= 4 << 12;
1054 out_insnp
->opcode
|= 8 << 12;
1061 /* A size modifier, B, W or D, to be put in bits <5:4>. */
1062 if (! get_bwd_size_modifier (&s
, &size_bits
))
1066 out_insnp
->opcode
|= size_bits
<< 4;
1071 /* A branch expression. */
1072 if (! cris_get_expression (&s
, &out_insnp
->expr
))
1076 out_insnp
->insn_type
= CRIS_INSN_BRANCH
;
1081 /* A BDAP expression for any size, "expr,r". */
1082 if (! cris_get_expression (&s
, &prefixp
->expr
))
1091 if (!get_gen_reg (&s
, &prefixp
->base_reg_number
))
1094 /* Since 'O' is used with an explicit bdap, we have no
1095 "real" instruction. */
1096 prefixp
->kind
= PREFIX_BDAP_IMM
;
1097 out_insnp
->insn_type
= CRIS_INSN_NONE
;
1102 /* Special register in bits <15:12>. */
1103 if (! get_spec_reg (&s
, &out_insnp
->spec_reg
))
1107 /* Use of some special register names come with a
1108 specific warning. Note that we have no ".cpu type"
1109 pseudo yet, so some of this is just unused
1111 if (out_insnp
->spec_reg
->warning
)
1112 as_warn (out_insnp
->spec_reg
->warning
);
1113 else if (out_insnp
->spec_reg
->applicable_version
1114 == cris_ver_warning
)
1115 /* Others have a generic warning. */
1116 as_warn (_("Unimplemented register `%s' specified"),
1117 out_insnp
->spec_reg
->name
);
1120 |= out_insnp
->spec_reg
->number
<< 12;
1125 /* This character is used in the disassembler to
1126 recognize a prefix instruction to fold into the
1127 addressing mode for the next instruction. It is
1132 /* General register in bits <15:12>. */
1133 if (! get_gen_reg (&s
, ®no
))
1137 out_insnp
->opcode
|= regno
<< 12;
1142 /* General register in bits <3:0>. */
1143 if (! get_gen_reg (&s
, ®no
))
1147 out_insnp
->opcode
|= regno
/* << 0 */;
1152 /* Source operand in bit <10> and a prefix; a 3-operand
1154 if (! get_3op_or_dip_prefix_op (&s
, prefixp
))
1160 /* Source operand in bits <10>, <3:0> and optionally a
1161 prefix; i.e. an indirect operand or an side-effect
1163 if (! get_autoinc_prefix_or_indir_op (&s
, prefixp
, &mode
,
1170 if (prefixp
->kind
!= PREFIX_NONE
)
1172 /* A prefix, so it has the autoincrement bit
1174 out_insnp
->opcode
|= (AUTOINCR_BIT
<< 8);
1177 /* No prefix. The "mode" variable contains bits like
1178 whether or not this is autoincrement mode. */
1179 out_insnp
->opcode
|= (mode
<< 10);
1181 out_insnp
->opcode
|= regno
/* << 0 */ ;
1186 /* Rs.m in bits <15:12> and <5:4>. */
1187 if (! get_gen_reg (&s
, ®no
)
1188 || ! get_bwd_size_modifier (&s
, &size_bits
))
1192 out_insnp
->opcode
|= (regno
<< 12) | (size_bits
<< 4);
1197 /* Source operand in bits <10>, <3:0> and optionally a
1198 prefix; i.e. an indirect operand or an side-effect
1201 The difference to 's' is that this does not allow an
1202 "immediate" expression. */
1203 if (! get_autoinc_prefix_or_indir_op (&s
, prefixp
,
1211 if (prefixp
->kind
!= PREFIX_NONE
)
1213 /* A prefix, and those matched here always have
1214 side-effects (see 's' case). */
1215 out_insnp
->opcode
|= (AUTOINCR_BIT
<< 8);
1219 /* No prefix. The "mode" variable contains bits
1220 like whether or not this is autoincrement
1222 out_insnp
->opcode
|= (mode
<< 10);
1225 out_insnp
->opcode
|= regno
/* << 0 */;
1230 /* Size modifier (B or W) in bit <4>. */
1231 if (! get_bw_size_modifier (&s
, &size_bits
))
1235 out_insnp
->opcode
|= size_bits
<< 4;
1243 /* We get here when we fail a match above or we found a
1244 complete match. Break out of this loop. */
1248 /* Was it a match or a miss? */
1251 /* If it's just that the args don't match, maybe the next
1252 item in the table is the same opcode but with
1253 matching operands. */
1254 if (instruction
[1].name
!= NULL
1255 && ! strcmp (instruction
->name
, instruction
[1].name
))
1257 /* Yep. Restart and try that one instead. */
1264 /* We've come to the end of instructions with this
1265 opcode, so it must be an error. */
1266 as_bad (_("Illegal operands"));
1272 /* We have a match. Check if there's anything more to do. */
1275 /* There was an immediate mode operand, so we must check
1276 that it has an appropriate size. */
1278 switch (instruction
->imm_oprnd_size
)
1282 /* Shouldn't happen; this one does not have immediate
1283 operands with different sizes. */
1284 BAD_CASE (instruction
->imm_oprnd_size
);
1288 out_insnp
->imm_oprnd_size
= 4;
1292 switch (out_insnp
->spec_reg
->reg_size
)
1295 if (out_insnp
->expr
.X_op
== O_constant
1296 && (out_insnp
->expr
.X_add_number
< -128
1297 || out_insnp
->expr
.X_add_number
> 255))
1298 as_bad (_("Immediate value not in 8 bit range: %ld"),
1299 out_insnp
->expr
.X_add_number
);
1302 /* FIXME: We need an indicator in the instruction
1303 table to pass on, to indicate if we need to check
1304 overflow for a signed or unsigned number. */
1305 if (out_insnp
->expr
.X_op
== O_constant
1306 && (out_insnp
->expr
.X_add_number
< -32768
1307 || out_insnp
->expr
.X_add_number
> 65535))
1308 as_bad (_("Immediate value not in 16 bit range: %ld"),
1309 out_insnp
->expr
.X_add_number
);
1310 out_insnp
->imm_oprnd_size
= 2;
1314 out_insnp
->imm_oprnd_size
= 4;
1318 BAD_CASE (out_insnp
->spec_reg
->reg_size
);
1326 if (out_insnp
->expr
.X_op
== O_constant
1327 && (out_insnp
->expr
.X_add_number
< -128
1328 || out_insnp
->expr
.X_add_number
> 255))
1329 as_bad (_("Immediate value not in 8 bit range: %ld"),
1330 out_insnp
->expr
.X_add_number
);
1333 if (out_insnp
->expr
.X_op
== O_constant
1334 && (out_insnp
->expr
.X_add_number
< -32768
1335 || out_insnp
->expr
.X_add_number
> 65535))
1336 as_bad (_("Immediate value not in 16 bit range: %ld"),
1337 out_insnp
->expr
.X_add_number
);
1338 out_insnp
->imm_oprnd_size
= 2;
1342 out_insnp
->imm_oprnd_size
= 4;
1346 BAD_CASE (out_insnp
->spec_reg
->reg_size
);
1355 /* Get a B, W, or D size modifier from the string pointed out by *cPP,
1356 which must point to a '.' in front of the modifier. On successful
1357 return, *cPP is advanced to the character following the size
1358 modifier, and is undefined otherwise.
1360 cPP Pointer to pointer to string starting
1361 with the size modifier.
1363 size_bitsp Pointer to variable to contain the size bits on
1366 Return 1 iff a correct size modifier is found, else 0. */
1369 get_bwd_size_modifier (cPP
, size_bitsp
)
1377 /* Consume the '.'. */
1401 /* Consume the size letter. */
1407 /* Get a B or W size modifier from the string pointed out by *cPP,
1408 which must point to a '.' in front of the modifier. On successful
1409 return, *cPP is advanced to the character following the size
1410 modifier, and is undefined otherwise.
1412 cPP Pointer to pointer to string starting
1413 with the size modifier.
1415 size_bitsp Pointer to variable to contain the size bits on
1418 Return 1 iff a correct size modifier is found, else 0. */
1421 get_bw_size_modifier (cPP
, size_bitsp
)
1429 /* Consume the '.'. */
1448 /* Consume the size letter. */
1454 /* Get a general register from the string pointed out by *cPP. The
1455 variable *cPP is advanced to the character following the general
1456 register name on a successful return, and has its initial position
1459 cPP Pointer to pointer to string, beginning with a general
1462 regnop Pointer to int containing the register number.
1464 Return 1 iff a correct general register designator is found,
1468 get_gen_reg (cPP
, regnop
)
1479 /* "P" as in "PC"? Consume the "P". */
1482 if ((**cPP
== 'C' || **cPP
== 'c')
1483 && ! isalnum ((*cPP
)[1]))
1485 /* It's "PC": consume the "c" and we're done. */
1494 /* Hopefully r[0-9] or r1[0-5]. Consume 'R' or 'r'. */
1497 if (isdigit (**cPP
))
1499 /* It's r[0-9]. Consume and check the next digit. */
1500 *regnop
= **cPP
- '0';
1503 if (! isalnum (**cPP
))
1505 /* No more digits, we're done. */
1510 /* One more digit. Consume and add. */
1511 *regnop
= *regnop
* 10 + (**cPP
- '0');
1513 /* We need to check for a valid register number; Rn,
1514 0 <= n <= MAX_REG. */
1515 if (*regnop
<= MAX_REG
)
1517 /* Consume second digit. */
1527 /* "S" as in "SP"? Consume the "S". */
1529 if (**cPP
== 'P' || **cPP
== 'p')
1531 /* It's "SP": consume the "p" and we're done. */
1539 /* Just here to silence compilation warnings. */
1543 /* We get here if we fail. Restore the pointer. */
1548 /* Get a special register from the string pointed out by *cPP. The
1549 variable *cPP is advanced to the character following the special
1550 register name if one is found, and retains its original position
1553 cPP Pointer to pointer to string starting with a special register
1556 sregpp Pointer to Pointer to struct spec_reg, where a pointer to the
1557 register description will be stored.
1559 Return 1 iff a correct special register name is found. */
1562 get_spec_reg (cPP
, sregpp
)
1564 const struct cris_spec_reg
**sregpp
;
1569 const struct cris_spec_reg
*sregp
;
1571 /* Loop over all special registers. */
1572 for (sregp
= cris_spec_regs
; sregp
->name
!= NULL
; sregp
++)
1574 /* Start over from beginning of the supposed name. */
1579 && (isupper (*s1
) ? tolower (*s1
) == *s2
: *s1
== *s2
))
1585 /* For a match, we must have consumed the name in the table, and we
1586 must be outside what could be part of a name. Assume here that a
1587 test for alphanumerics is sufficient for a name test. */
1588 if (*s2
== 0 && ! isalnum (*s1
))
1590 /* We have a match. Update the pointer and be done. */
1597 /* If we got here, we did not find any name. */
1601 /* Get an unprefixed or side-effect-prefix operand from the string pointed
1602 out by *cPP. The pointer *cPP is advanced to the character following
1603 the indirect operand if we have success, else it contains an undefined
1606 cPP Pointer to pointer to string beginning with the first
1607 character of the supposed operand.
1609 prefixp Pointer to structure containing an optional instruction
1612 is_autoincp Pointer to int indicating the indirect or autoincrement
1615 src_regnop Pointer to int containing the source register number in
1618 imm_foundp Pointer to an int indicating if an immediate expression
1621 imm_exprP Pointer to a structure containing an immediate
1622 expression, if success and if *imm_foundp is nonzero.
1624 Return 1 iff a correct indirect operand is found. */
1627 get_autoinc_prefix_or_indir_op (cPP
, prefixp
, is_autoincp
, src_regnop
,
1628 imm_foundp
, imm_exprP
)
1630 struct cris_prefix
*prefixp
;
1634 expressionS
*imm_exprP
;
1636 /* Assume there was no immediate mode expression. */
1641 /* So this operand is one of:
1643 Autoincrement: [rN+]
1644 Indexed with assign: [rN=rM+rO.S]
1645 Offset with assign: [rN=rM+I], [rN=rM+[rO].s], [rN=rM+[rO+].s]
1647 Either way, consume the '['. */
1650 /* Get the rN register. */
1651 if (! get_gen_reg (cPP
, src_regnop
))
1652 /* If there was no register, then this cannot match. */
1656 /* We got the register, now check the next character. */
1660 /* Indirect mode. We're done here. */
1661 prefixp
->kind
= PREFIX_NONE
;
1666 /* This must be an auto-increment mode, if there's a
1668 prefixp
->kind
= PREFIX_NONE
;
1671 /* We consume this character and break out to check the
1677 /* This must be indexed with assign, or offset with assign
1681 /* Either way, the next thing must be a register. */
1682 if (! get_gen_reg (cPP
, &prefixp
->base_reg_number
))
1683 /* No register, no match. */
1687 /* We've consumed "[rN=rM", so we must be looking at
1688 "+rO.s]" or "+I]", or "-I]", or "+[rO].s]" or
1692 int index_reg_number
;
1698 /* This must be [rx=ry+[rz].s] or
1699 [rx=ry+[rz+].s] or no match. We must be
1700 looking at rz after consuming the '['. */
1703 if (!get_gen_reg (cPP
, &index_reg_number
))
1706 prefixp
->kind
= PREFIX_BDAP
;
1708 = (BDAP_INDIR_OPCODE
1709 + (prefixp
->base_reg_number
<< 12)
1710 + index_reg_number
);
1714 /* We've seen "[rx=ry+[rz+" here, so now we
1715 know that there must be "].s]" left to
1718 prefixp
->opcode
|= AUTOINCR_BIT
<< 8;
1721 /* If it wasn't autoincrement, we don't need to
1724 /* Check the next-to-last ']'. */
1730 /* Check the ".s" modifier. */
1731 if (! get_bwd_size_modifier (cPP
, &size_bits
))
1734 prefixp
->opcode
|= size_bits
<< 4;
1736 /* Now we got [rx=ry+[rz+].s or [rx=ry+[rz].s.
1737 We break out to check the final ']'. */
1740 /* It wasn't an indirection. Check if it's a
1742 else if (get_gen_reg (cPP
, &index_reg_number
))
1746 /* Indexed with assign mode: "[rN+rM.S]". */
1747 prefixp
->kind
= PREFIX_BIAP
;
1749 = (BIAP_OPCODE
+ (index_reg_number
<< 12)
1750 + prefixp
->base_reg_number
/* << 0 */);
1752 if (! get_bwd_size_modifier (cPP
, &size_bits
))
1753 /* Size missing, this isn't a match. */
1757 /* Size found, break out to check the
1759 prefixp
->opcode
|= size_bits
<< 4;
1763 /* Not a register. Then this must be "[rN+I]". */
1764 else if (cris_get_expression (cPP
, &prefixp
->expr
))
1766 /* We've got offset with assign mode. Fill
1767 in the blanks and break out to match the
1769 prefixp
->kind
= PREFIX_BDAP_IMM
;
1773 /* Neither register nor expression found, so
1774 this can't be a match. */
1777 /* Not "[rN+" but perhaps "[rN-"? */
1778 else if (**cPP
== '-')
1780 /* We must have an offset with assign mode. */
1781 if (! cris_get_expression (cPP
, &prefixp
->expr
))
1782 /* No expression, no match. */
1786 /* We've got offset with assign mode. Fill
1787 in the blanks and break out to match the
1789 prefixp
->kind
= PREFIX_BDAP_IMM
;
1794 /* Neither '+' nor '-' after "[rN=rM". Lose. */
1798 /* Neither ']' nor '+' nor '=' after "[rN". Lose. */
1803 /* When we get here, we have a match and will just check the closing
1804 ']'. We can still fail though. */
1809 /* Don't forget to consume the final ']'.
1810 Then return in glory. */
1815 /* No indirection. Perhaps a constant? */
1816 else if (cris_get_expression (cPP
, imm_exprP
))
1818 /* Expression found, this is immediate mode. */
1819 prefixp
->kind
= PREFIX_NONE
;
1821 *src_regnop
= REG_PC
;
1826 /* No luck today. */
1830 /* This function gets an indirect operand in a three-address operand
1831 combination from the string pointed out by *cPP. The pointer *cPP is
1832 advanced to the character following the indirect operand on success, or
1833 has an unspecified value on failure.
1835 cPP Pointer to pointer to string begining
1838 prefixp Pointer to structure containing an
1841 Returns 1 iff a correct indirect operand is found. */
1844 get_3op_or_dip_prefix_op (cPP
, prefixp
)
1846 struct cris_prefix
*prefixp
;
1851 /* We must have a '[' or it's a clean failure. */
1854 /* Eat the first '['. */
1859 /* A second '[', so this must be double-indirect mode. */
1861 prefixp
->kind
= PREFIX_DIP
;
1862 prefixp
->opcode
= DIP_OPCODE
;
1864 /* Get the register or fail entirely. */
1865 if (! get_gen_reg (cPP
, ®_number
))
1869 prefixp
->opcode
|= reg_number
/* << 0 */ ;
1872 /* Since we found a '+', this must be double-indirect
1873 autoincrement mode. */
1875 prefixp
->opcode
|= AUTOINCR_BIT
<< 8;
1878 /* There's nothing particular to do, if this was a
1879 double-indirect *without* autoincrement. */
1882 /* Check the first ']'. The second one is checked at the end. */
1886 /* Eat the first ']', so we'll be looking at a second ']'. */
1889 /* No second '['. Then we should have a register here, making
1891 else if (get_gen_reg (cPP
, &prefixp
->base_reg_number
))
1893 /* This must be indexed or offset mode: "[rN+I]" or
1894 "[rN+rM.S]" or "[rN+[rM].S]" or "[rN+[rM+].S]". */
1897 /* Not the first alternative, must be one of the last
1899 int index_reg_number
;
1905 /* This is "[rx+["... Expect a register next. */
1909 if (!get_gen_reg (cPP
, &index_reg_number
))
1912 prefixp
->kind
= PREFIX_BDAP
;
1914 = (BDAP_INDIR_OPCODE
1915 + (prefixp
->base_reg_number
<< 12)
1916 + index_reg_number
);
1918 /* We've seen "[rx+[ry", so check if this is
1922 /* Yep, now at "[rx+[ry+". */
1924 prefixp
->opcode
|= AUTOINCR_BIT
<< 8;
1926 /* If it wasn't autoincrement, we don't need to
1929 /* Check a first closing ']': "[rx+[ry]" or
1935 /* Now expect a size modifier ".S". */
1936 if (! get_bwd_size_modifier (cPP
, &size_bits
))
1939 prefixp
->opcode
|= size_bits
<< 4;
1941 /* Ok, all interesting stuff has been seen:
1942 "[rx+[ry+].S" or "[rx+[ry].S". We only need to
1943 expect a final ']', which we'll do in a common
1946 /* Seen "[rN+", but not a '[', so check if we have a
1948 else if (get_gen_reg (cPP
, &index_reg_number
))
1950 /* This is indexed mode: "[rN+rM.S]" or
1953 prefixp
->kind
= PREFIX_BIAP
;
1956 | prefixp
->base_reg_number
/* << 0 */
1957 | (index_reg_number
<< 12));
1960 if (! get_bwd_size_modifier (cPP
, &size_bits
))
1961 /* Missing size, so fail. */
1964 /* Size found. Add that piece and drop down to
1965 the common checking of the closing ']'. */
1966 prefixp
->opcode
|= size_bits
<< 4;
1968 /* Seen "[rN+", but not a '[' or a register, so then
1969 it must be a constant "I". */
1970 else if (cris_get_expression (cPP
, &prefixp
->expr
))
1972 /* Expression found, so fill in the bits of offset
1973 mode and drop down to check the closing ']'. */
1974 prefixp
->kind
= PREFIX_BDAP_IMM
;
1977 /* Nothing valid here: lose. */
1980 /* Seen "[rN" but no '+', so check if it's a '-'. */
1981 else if (**cPP
== '-')
1983 /* Yep, we must have offset mode. */
1984 if (! cris_get_expression (cPP
, &prefixp
->expr
))
1985 /* No expression, so we lose. */
1989 /* Expression found to make this offset mode, so
1990 fill those bits and drop down to check the
1992 prefixp
->kind
= PREFIX_BDAP_IMM
;
1997 /* We've seen "[rN", but not '+' or '-'; rather a ']'.
1998 Hmm. Normally this is a simple indirect mode that we
1999 shouldn't match, but if we expect ']', then we have a
2000 zero offset, so it can be a three-address-operand,
2001 like "[rN],rO,rP", thus offset mode.
2003 Don't eat the ']', that will be done in the closing
2005 prefixp
->expr
.X_op
= O_constant
;
2006 prefixp
->expr
.X_add_number
= 0;
2007 prefixp
->expr
.X_add_symbol
= NULL
;
2008 prefixp
->expr
.X_op_symbol
= NULL
;
2009 prefixp
->kind
= PREFIX_BDAP_IMM
;
2012 /* A '[', but no second '[', and no register. Check if we
2013 have an expression, making this "[I]" for a double-indirect
2015 else if (cris_get_expression (cPP
, &prefixp
->expr
))
2017 /* Expression found, the so called absolute mode for a
2018 double-indirect prefix on PC. */
2019 prefixp
->kind
= PREFIX_DIP
;
2020 prefixp
->opcode
= DIP_OPCODE
| (AUTOINCR_BIT
<< 8) | REG_PC
;
2021 prefixp
->reloc
= BFD_RELOC_32
;
2024 /* Neither '[' nor register nor expression. We lose. */
2027 /* We get here as a closing ceremony to a successful match. We just
2028 need to check the closing ']'. */
2030 /* Oops. Close but no air-polluter. */
2033 /* Don't forget to consume that ']', before returning in glory. */
2038 /* Get an expression from the string pointed out by *cPP.
2039 The pointer *cPP is advanced to the character following the expression
2040 on a success, or retains its original value otherwise.
2042 cPP Pointer to pointer to string beginning with the expression.
2044 exprP Pointer to structure containing the expression.
2046 Return 1 iff a correct expression is found. */
2049 cris_get_expression (cPP
, exprP
)
2053 char *saved_input_line_pointer
;
2056 /* The "expression" function expects to find an expression at the
2057 global variable input_line_pointer, so we have to save it to give
2058 the impression that we don't fiddle with global variables. */
2059 saved_input_line_pointer
= input_line_pointer
;
2060 input_line_pointer
= *cPP
;
2062 exp
= expression (exprP
);
2063 if (exprP
->X_op
== O_illegal
|| exprP
->X_op
== O_absent
)
2065 input_line_pointer
= saved_input_line_pointer
;
2069 /* Everything seems to be fine, just restore the global
2070 input_line_pointer and say we're successful. */
2071 *cPP
= input_line_pointer
;
2072 input_line_pointer
= saved_input_line_pointer
;
2076 /* Get a sequence of flag characters from *spp. The pointer *cPP is
2077 advanced to the character following the expression. The flag
2078 characters are consecutive, no commas or spaces.
2080 cPP Pointer to pointer to string beginning with the expression.
2082 flagp Pointer to int to return the flags expression.
2084 Return 1 iff a correct flags expression is found. */
2087 get_flags (cPP
, flagsp
)
2140 /* We consider this successful if we stop at a comma or
2141 whitespace. Anything else, and we consider it a failure. */
2144 && ! isspace (**cPP
))
2150 /* Don't forget to consume each flag character. */
2155 /* Generate code and fixes for a BDAP prefix.
2157 base_regno Int containing the base register number.
2159 exprP Pointer to structure containing the offset expression. */
2162 gen_bdap (base_regno
, exprP
)
2166 unsigned int opcode
;
2169 /* Put out the prefix opcode; assume quick immediate mode at first. */
2170 opcode
= BDAP_QUICK_OPCODE
| (base_regno
<< 12);
2171 opcodep
= frag_more (2);
2172 md_number_to_chars (opcodep
, opcode
, 2);
2174 if (exprP
->X_op
== O_constant
)
2176 /* We have an absolute expression that we know the size of right
2181 value
= exprP
->X_add_number
;
2182 if (value
< -32768 || value
> 32767)
2183 /* Outside range for a "word", make it a dword. */
2186 /* Assume "word" size. */
2189 /* If this is a signed-byte value, we can fit it into the prefix
2191 if (value
>= -128 && value
<= 127)
2195 /* This is a word or dword displacement, which will be put in a
2196 word or dword after the prefix. */
2199 opcodep
[0] = BDAP_PC_LOW
+ (size
<< 4);
2201 opcodep
[1] |= BDAP_INCR_HIGH
;
2202 p
= frag_more (1 << size
);
2203 md_number_to_chars (p
, value
, 1 << size
);
2207 /* The expression is not defined yet but may become absolute. We make
2208 it a relocation to be relaxed. */
2209 frag_var (rs_machine_dependent
, 4, 0,
2210 ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX
, STATE_UNDF
),
2211 exprP
->X_add_symbol
, exprP
->X_add_number
, opcodep
);
2214 /* Encode a branch displacement in the range -256..254 into the form used
2215 by CRIS conditional branch instructions.
2217 offset The displacement value in bytes. */
2220 branch_disp (offset
)
2225 disp
= offset
& 0xFE;
2233 /* Generate code and fixes for a 32-bit conditional branch instruction
2234 created by "extending" an existing 8-bit branch instruction.
2236 opcodep Pointer to the word containing the original 8-bit branch
2239 writep Pointer to "extension area" following the first instruction
2242 fragP Pointer to the frag containing the instruction.
2244 add_symP, Parts of the destination address expression.
2249 gen_cond_branch_32 (opcodep
, writep
, fragP
, add_symP
, sub_symP
, add_num
)
2257 if (warn_for_branch_expansion
)
2259 /* FIXME: Find out and change to as_warn_where. Add testcase. */
2260 as_warn (_("32-bit conditional branch generated"));
2263 /* Here, writep points to what will be opcodep + 2. First, we change
2264 the actual branch in opcodep[0] and opcodep[1], so that in the
2265 final insn, it will look like:
2268 This means we don't have to worry about changing the opcode or
2269 messing with te delay-slot instruction. So, we move it to last in
2270 the "extended" branch, and just change the displacement. Admittedly,
2271 it's not the optimal extended construct, but we should get this
2272 rarely enough that it shouldn't matter. */
2274 writep
[8] = branch_disp (-2 - 6);
2275 writep
[9] = opcodep
[1];
2277 /* Then, we change the branch to an unconditional branch over the
2278 extended part, to the new location of the Bcc:
2282 Note that these two writes are to currently different locations,
2285 md_number_to_chars (opcodep
, BA_QUICK_OPCODE
+ 8, 2);
2286 md_number_to_chars (writep
, NOP_OPCODE
, 2);
2288 /* Then the extended thing, the 32-bit jump insn.
2289 opcodep+4: JUMP [PC+] */
2291 md_number_to_chars (writep
+ 2, JUMP_PC_INCR_OPCODE
, 2);
2293 /* We have to fill in the actual value too.
2295 This is most probably an expression, but we can cope with an absolute
2296 value too. FIXME: Testcase needed. */
2298 if (add_symP
== NULL
&& sub_symP
== NULL
)
2299 /* An absolute address. */
2300 md_number_to_chars (writep
+ 4, add_num
, 4);
2303 /* Not absolute, we have to make it a frag for later evaluation. */
2304 know (sub_symP
== 0);
2306 fix_new (fragP
, writep
+ 4 - fragP
->fr_literal
, 4, add_symP
,
2307 add_num
, 0, BFD_RELOC_32
);
2313 Turn a string in input_line_pointer into a floating point constant
2314 of type TYPE, and store the appropriate bytes in *LITP. The number
2315 of LITTLENUMS emitted is stored in *SIZEP.
2317 type A character from FLTCHARS that describes what kind of
2318 floating-point number is wanted.
2320 litp A pointer to an array that the result should be stored in.
2322 sizep A pointer to an integer where the size of the result is stored.
2324 But we don't support floating point constants in assembly code *at all*,
2325 since it's suboptimal and just opens up bug opportunities. GCC emits
2326 the bit patterns as hex. All we could do here is to emit what GCC
2327 would have done in the first place. *Nobody* writes floating-point
2328 code as assembly code, but if they do, they should be able enough to
2329 find out the correct bit patterns and use them. */
2332 md_atof (type
, litp
, sizep
)
2333 char type ATTRIBUTE_UNUSED
;
2334 char *litp ATTRIBUTE_UNUSED
;
2335 int *sizep ATTRIBUTE_UNUSED
;
2337 /* FIXME: Is this function mentioned in the internals.texi manual? If
2339 return _("Bad call to md_atof () - floating point formats are not supported");
2342 /* Turn a number as a fixS * into a series of bytes that represents the
2343 number on the target machine. The purpose of this procedure is the
2344 same as that of md_number_to_chars but this procedure is supposed to
2345 handle general bit field fixes and machine-dependent fixups.
2347 bufp Pointer to an array where the result should be stored.
2349 val The value to store.
2351 n The number of bytes in "val" that should be stored.
2353 fixP The fix to be applied to the bit field starting at bufp. */
2356 cris_number_to_imm (bufp
, val
, n
, fixP
)
2367 /* We put the relative "vma" for the other segment for inter-segment
2368 relocations in the object data to stay binary "compatible" (with an
2369 uninteresting old version) for the relocation.
2370 Maybe delete some day. */
2372 && (sym_seg
= S_GET_SEGMENT (fixP
->fx_addsy
)) != now_seg
)
2373 val
+= sym_seg
->vma
;
2375 switch (fixP
->fx_r_type
)
2377 /* Ditto here, we put the addend into the object code as
2378 well as the reloc addend. Keep it that way for now, to simplify
2379 regression tests on the object file contents. FIXME: Seems
2380 uninteresting now that we have a test suite. */
2383 /* No use having warnings here, since most hosts have a 32-bit type
2384 for "long" (which will probably change soon, now that I wrote
2386 bufp
[3] = (val
>> 24) & 0xFF;
2387 bufp
[2] = (val
>> 16) & 0xFF;
2388 bufp
[1] = (val
>> 8) & 0xFF;
2389 bufp
[0] = val
& 0xFF;
2392 /* FIXME: The 16 and 8-bit cases should have a way to check
2393 whether a signed or unsigned (or any signedness) number is
2395 FIXME: Does the as_bad calls find the line number by themselves,
2396 or should we change them into as_bad_where? */
2399 if (val
> 0xffff || val
< -32768)
2400 as_bad (_("Value not in 16 bit range: %ld"), val
);
2401 if (! fixP
->fx_addsy
)
2403 bufp
[1] = (val
>> 8) & 0xFF;
2404 bufp
[0] = val
& 0xFF;
2409 if (val
> 255 || val
< -128)
2410 as_bad (_("Value not in 8 bit range: %ld"), val
);
2411 if (! fixP
->fx_addsy
)
2412 bufp
[0] = val
& 0xFF;
2415 case BFD_RELOC_CRIS_UNSIGNED_4
:
2416 if (val
> 15 || val
< 0)
2417 as_bad (_("Value not in 4 bit unsigned range: %ld"), val
);
2418 if (! fixP
->fx_addsy
)
2419 bufp
[0] |= val
& 0x0F;
2422 case BFD_RELOC_CRIS_UNSIGNED_5
:
2423 if (val
> 31 || val
< 0)
2424 as_bad (_("Value not in 5 bit unsigned range: %ld"), val
);
2425 if (! fixP
->fx_addsy
)
2426 bufp
[0] |= val
& 0x1F;
2429 case BFD_RELOC_CRIS_SIGNED_6
:
2430 if (val
> 31 || val
< -32)
2431 as_bad (_("Value not in 6 bit range: %ld"), val
);
2432 if (! fixP
->fx_addsy
)
2433 bufp
[0] |= val
& 0x3F;
2436 case BFD_RELOC_CRIS_UNSIGNED_6
:
2437 if (val
> 63 || val
< 0)
2438 as_bad (_("Value not in 6 bit unsigned range: %ld"), val
);
2439 if (! fixP
->fx_addsy
)
2440 bufp
[0] |= val
& 0x3F;
2443 case BFD_RELOC_CRIS_BDISP8
:
2444 if (! fixP
->fx_addsy
)
2445 bufp
[0] = branch_disp (val
);
2448 case BFD_RELOC_NONE
:
2449 /* May actually happen automatically. For example at broken
2450 words, if the word turns out not to be broken.
2451 FIXME: When? Which testcase? */
2452 if (! fixP
->fx_addsy
)
2453 md_number_to_chars (bufp
, val
, n
);
2456 case BFD_RELOC_VTABLE_INHERIT
:
2457 /* This borrowed from tc-ppc.c on a whim. */
2459 && !S_IS_DEFINED (fixP
->fx_addsy
)
2460 && !S_IS_WEAK (fixP
->fx_addsy
))
2461 S_SET_WEAK (fixP
->fx_addsy
);
2463 case BFD_RELOC_VTABLE_ENTRY
:
2464 /* FIXME: I'm not sure why we do this (as does other ports), but it
2465 might be that this relocation can only be finished at link time. */
2470 BAD_CASE (fixP
->fx_r_type
);
2474 /* Processes machine-dependent command line options. Called once for
2475 each option on the command line that the machine-independent part of
2476 GAS does not understand. */
2479 md_parse_option (arg
, argp
)
2481 char *argp ATTRIBUTE_UNUSED
;
2487 md_show_usage (stdout
);
2488 /* Don't continue. */
2492 warn_for_branch_expansion
= 1;
2500 /* Round up a section size to the appropriate boundary. */
2502 md_section_align (segment
, size
)
2506 /* Round all sects to multiple of 4, except the bss section, which
2507 we'll round to word-size.
2509 FIXME: Check if this really matters. All sections should be
2510 rounded up, and all sections should (optionally) be assumed to be
2511 dword-aligned, it's just that there is actual usage of linking to a
2513 if (OUTPUT_FLAVOR
== bfd_target_aout_flavour
)
2515 if (segment
== bss_section
)
2516 return (size
+ 1) & ~1;
2517 return (size
+ 3) & ~3;
2521 /* FIXME: Is this wanted? It matches the testsuite, but that's not
2522 really a valid reason. */
2523 if (segment
== text_section
)
2524 return (size
+ 3) & ~3;
2530 /* Generate a machine-dependent relocation. */
2532 tc_gen_reloc (section
, fixP
)
2533 asection
*section ATTRIBUTE_UNUSED
;
2537 bfd_reloc_code_real_type code
;
2539 switch (fixP
->fx_r_type
)
2544 case BFD_RELOC_VTABLE_INHERIT
:
2545 case BFD_RELOC_VTABLE_ENTRY
:
2546 code
= fixP
->fx_r_type
;
2549 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
2550 _("Semantics error. This type of operand can not be relocated, it must be an assembly-time constant"));
2554 relP
= (arelent
*) xmalloc (sizeof (arelent
));
2556 relP
->sym_ptr_ptr
= (asymbol
**) xmalloc (sizeof (asymbol
*));
2557 *relP
->sym_ptr_ptr
= symbol_get_bfdsym (fixP
->fx_addsy
);
2558 relP
->address
= fixP
->fx_frag
->fr_address
+ fixP
->fx_where
;
2561 /* FIXME: Is this correct? */
2562 relP
->addend
= fixP
->fx_addnumber
;
2564 /* At least *this one* is correct. */
2565 relP
->addend
= fixP
->fx_offset
;
2567 /* This is the standard place for KLUDGEs to work around bugs in
2568 bfd_install_relocation (first such note in the documentation
2569 appears with binutils-2.8).
2571 That function bfd_install_relocation does the wrong thing with
2572 putting stuff into the addend of a reloc (it should stay out) for a
2573 weak symbol. The really bad thing is that it adds the
2574 "segment-relative offset" of the symbol into the reloc. In this
2575 case, the reloc should instead be relative to the symbol with no
2576 other offset than the assembly code shows; and since the symbol is
2577 weak, any local definition should be ignored until link time (or
2579 To wit: weaksym+42 should be weaksym+42 in the reloc,
2580 not weaksym+(offset_from_segment_of_local_weaksym_definition)
2582 To "work around" this, we subtract the segment-relative offset of
2583 "known" weak symbols. This evens out the extra offset.
2585 That happens for a.out but not for ELF, since for ELF,
2586 bfd_install_relocation uses the "special function" field of the
2587 howto, and does not execute the code that needs to be undone. */
2589 if (OUTPUT_FLAVOR
== bfd_target_aout_flavour
2590 && fixP
->fx_addsy
&& S_IS_WEAK (fixP
->fx_addsy
)
2591 && ! bfd_is_und_section (S_GET_SEGMENT (fixP
->fx_addsy
)))
2593 relP
->addend
-= S_GET_VALUE (fixP
->fx_addsy
);
2596 relP
->howto
= bfd_reloc_type_lookup (stdoutput
, code
);
2601 name
= S_GET_NAME (fixP
->fx_addsy
);
2603 name
= _("<unknown>");
2604 as_fatal (_("Cannot generate relocation type for symbol %s, code %s"),
2605 name
, bfd_get_reloc_code_name (code
));
2611 /* Machine-dependent usage-output. */
2614 md_show_usage (stream
)
2617 fprintf (stream
, _("\n-- GNU as for CRIS\n"));
2618 fprintf (stream
, "\n");
2620 _("*** Usage: as-cris [switches] [-o objectfile] [files...]\n"));
2621 fprintf (stream
, _("Target-specific switches:\n"));
2622 fprintf (stream
, _(" -h, -H : Don't execute, print this help text.\n"));
2624 _(" -N : Warn when branches are expanded to jumps.\n\n"));
2625 fprintf (stream
, _("Use as-cris --help to see more options.\n"));
2626 fprintf (stream
, _("objectfile : Output file in the a.out format %s"),
2627 _("described in the users manual.\n"));
2628 fprintf (stream
, _(" Default output file is \"a.out\".\n"));
2629 fprintf (stream
, _("files ... : Input files in the source format %s"),
2630 _(" described in the users manual.\n"));
2631 fprintf (stream
, _(" Default input file is standard input.\n"));
2632 fprintf (stream
, _("Description : Assembler for the CRIS processor.\n"));
2635 /* Apply a fixS (fixup of an instruction or data that we didn't have
2636 enough info to complete immediately) to the data in a frag. */
2639 md_apply_fix (fixP
, valP
)
2645 char *buf
= fixP
->fx_where
+ fixP
->fx_frag
->fr_literal
;
2647 if (fixP
->fx_addsy
== 0 && !fixP
->fx_pcrel
)
2650 if (fixP
->fx_bit_fixP
|| fixP
->fx_im_disp
!= 0)
2652 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("Invalid relocation"));
2657 /* I took this from tc-arc.c, since we used to not support
2658 fx_subsy != NULL. I'm not totally sure it's TRT. */
2659 if (fixP
->fx_subsy
!= (symbolS
*) NULL
)
2661 if (S_GET_SEGMENT (fixP
->fx_subsy
) == absolute_section
)
2662 val
-= S_GET_VALUE (fixP
->fx_subsy
);
2665 /* We can't actually support subtracting a symbol. */
2666 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
2667 _("expression too complex"));
2671 cris_number_to_imm (buf
, val
, fixP
->fx_size
, fixP
);
2677 /* All relocations are relative to the location just after the fixup;
2678 the address of the fixup plus its size. */
2681 md_pcrel_from (fixP
)
2684 valueT addr
= fixP
->fx_where
+ fixP
->fx_frag
->fr_address
;
2686 /* FIXME: We get here only at the end of assembly, when X in ".-X" is
2687 still unknown. Since we don't have pc-relative relocations, this
2688 is invalid. What to do if anything for a.out, is to add
2689 pc-relative relocations everywhere including the elinux program
2691 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
2692 _("Invalid pc-relative relocation"));
2693 return fixP
->fx_size
+ addr
;
2696 /* We have no need to give defaults for symbol-values. */
2698 md_undefined_symbol (name
)
2699 char *name ATTRIBUTE_UNUSED
;
2704 /* Definition of TC_FORCE_RELOCATION.
2705 FIXME: Unsure of this. Can we omit it? Just copied from tc-i386.c
2706 when doing multi-object format with ELF, since it's the only other
2707 multi-object-format target with a.out and ELF. */
2709 md_cris_force_relocation (fixp
)
2712 if (fixp
->fx_r_type
== BFD_RELOC_VTABLE_INHERIT
2713 || fixp
->fx_r_type
== BFD_RELOC_VTABLE_ENTRY
)
2718 /* Check and emit error if broken-word handling has failed to fix up a
2719 case-table. This is called from write.c, after doing everything it
2720 knows about how to handle broken words. */
2723 tc_cris_check_adjusted_broken_word (new_offset
, brokwP
)
2725 struct broken_word
*brokwP
;
2727 if (new_offset
> 32767 || new_offset
< -32768)
2728 /* We really want a genuine error, not a warning, so make it one. */
2729 as_bad_where (brokwP
->frag
->fr_file
, brokwP
->frag
->fr_line
,
2730 _("Adjusted signed .word (%ld) overflows: `switch'-statement too large."),
2736 * eval: (c-set-style "gnu")
2737 * indent-tabs-mode: t