1 /* tc-cris.c -- Assembler code for the CRIS CPU core.
2 Copyright 2000, 2001, 2002, 2003, 2004, 2006, 2007
3 Free Software Foundation, Inc.
5 Contributed by Axis Communications AB, Lund, Sweden.
6 Originally written for GAS 1.38.1 by Mikael Asker.
7 Updates, BFDizing, GNUifying and ELF support by Hans-Peter Nilsson.
9 This file is part of GAS, the GNU Assembler.
11 GAS is free software; you can redistribute it and/or modify
12 it under the terms of the GNU General Public License as published by
13 the Free Software Foundation; either version 3, or (at your option)
16 GAS is distributed in the hope that it will be useful,
17 but WITHOUT ANY WARRANTY; without even the implied warranty of
18 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 GNU General Public License for more details.
21 You should have received a copy of the GNU General Public License
22 along with GAS; see the file COPYING. If not, write to the
23 Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
24 MA 02110-1301, USA. */
27 #include "safe-ctype.h"
29 #include "opcode/cris.h"
30 #include "dwarf2dbg.h"
32 /* Conventions used here:
33 Generally speaking, pointers to binutils types such as "fragS" and
34 "expressionS" get parameter and variable names ending in "P", such as
35 "fragP", to harmonize with the rest of the binutils code. Other
36 pointers get a "p" suffix, such as "bufp". Any function or type-name
37 that could clash with a current or future binutils or GAS function get
40 #define SYNTAX_RELAX_REG_PREFIX "no_register_prefix"
41 #define SYNTAX_ENFORCE_REG_PREFIX "register_prefix"
42 #define SYNTAX_USER_SYM_LEADING_UNDERSCORE "leading_underscore"
43 #define SYNTAX_USER_SYM_NO_LEADING_UNDERSCORE "no_leading_underscore"
44 #define REGISTER_PREFIX_CHAR '$'
46 /* True for expressions where getting X_add_symbol and X_add_number is
47 enough to get the "base" and "offset"; no need to make_expr_symbol.
48 It's not enough to check if X_op_symbol is NULL; that misses unary
49 operations like O_uminus. */
50 #define SIMPLE_EXPR(EXP) \
51 ((EXP)->X_op == O_constant || (EXP)->X_op == O_symbol)
53 /* Like in ":GOT", ":GOTOFF" etc. Other ports use '@', but that's in
54 line_separator_chars for CRIS, so we avoid it. */
55 #define RELOC_SUFFIX_CHAR ':'
57 /* This might be CRIS_INSN_NONE if we're assembling a prefix-insn only.
58 Note that some prefix-insns might be assembled as CRIS_INSN_NORMAL. */
61 CRIS_INSN_NORMAL
, CRIS_INSN_NONE
, CRIS_INSN_BRANCH
, CRIS_INSN_MUL
64 /* An instruction will have one of these prefixes.
65 Although the same bit-pattern, we handle BDAP with an immediate
66 expression (eventually quick or [pc+]) different from when we only have
67 register expressions. */
70 PREFIX_NONE
, PREFIX_BDAP_IMM
, PREFIX_BDAP
, PREFIX_BIAP
, PREFIX_DIP
,
74 /* The prefix for an instruction. */
77 enum prefix_kind kind
;
81 /* There might be an expression to be evaluated, like I in [rN+I]. */
84 /* If there's an expression, we might need a relocation. Here's the
85 type of what relocation to start relaxaton with.
86 The relocation is assumed to start immediately after the prefix insn,
87 so we don't provide an offset. */
88 enum bfd_reloc_code_real reloc
;
91 /* The description of the instruction being assembled. */
92 struct cris_instruction
94 /* If CRIS_INSN_NONE, then this insn is of zero length. */
95 enum cris_insn_kind insn_type
;
97 /* If a special register was mentioned, this is its description, else
99 const struct cris_spec_reg
*spec_reg
;
103 /* An insn may have at most one expression; theoretically there could be
104 another in its prefix (but I don't see how that could happen). */
107 /* The expression might need a relocation. Here's one to start
109 enum bfd_reloc_code_real reloc
;
111 /* The size in bytes of an immediate expression, or zero if
119 arch_crisv0
, arch_crisv3
, arch_crisv8
, arch_crisv10
,
120 arch_cris_any_v0_v10
, arch_crisv32
, arch_cris_common_v10_v32
123 static enum cris_archs
cris_arch_from_string (char **);
124 static int cris_insn_ver_valid_for_arch (enum cris_insn_version_usage
,
127 static void cris_process_instruction (char *, struct cris_instruction
*,
128 struct cris_prefix
*);
129 static int get_bwd_size_modifier (char **, int *);
130 static int get_bw_size_modifier (char **, int *);
131 static int get_gen_reg (char **, int *);
132 static int get_spec_reg (char **, const struct cris_spec_reg
**);
133 static int get_sup_reg (char **, int *);
134 static int get_autoinc_prefix_or_indir_op (char **, struct cris_prefix
*,
137 static int get_3op_or_dip_prefix_op (char **, struct cris_prefix
*);
138 static int cris_get_expression (char **, expressionS
*);
139 static int get_flags (char **, int *);
140 static void gen_bdap (int, expressionS
*);
141 static int branch_disp (int);
142 static void gen_cond_branch_32 (char *, char *, fragS
*, symbolS
*, symbolS
*,
144 static void cris_number_to_imm (char *, long, int, fixS
*, segT
);
145 static void cris_create_short_jump (char *, addressT
, addressT
, fragS
*,
147 static void s_syntax (int);
148 static void s_cris_file (int);
149 static void s_cris_loc (int);
150 static void s_cris_arch (int);
152 /* Get ":GOT", ":GOTOFF", ":PLT" etc. suffixes. */
153 static void cris_get_reloc_suffix (char **, bfd_reloc_code_real_type
*,
155 static unsigned int cris_get_specified_reloc_size (bfd_reloc_code_real_type
);
157 /* All the .syntax functions. */
158 static void cris_force_reg_prefix (void);
159 static void cris_relax_reg_prefix (void);
160 static void cris_sym_leading_underscore (void);
161 static void cris_sym_no_leading_underscore (void);
162 static char *cris_insn_first_word_frag (void);
164 /* Handle to the opcode hash table. */
165 static struct hash_control
*op_hash
= NULL
;
167 /* If we target cris-axis-linux-gnu (as opposed to generic cris-axis-elf),
168 we default to no underscore and required register-prefixes. The
169 difference is in the default values. */
171 #define DEFAULT_CRIS_AXIS_LINUX_GNU TRUE
173 #define DEFAULT_CRIS_AXIS_LINUX_GNU FALSE
176 /* Whether we demand that registers have a `$' prefix. Default here. */
177 static bfd_boolean demand_register_prefix
= DEFAULT_CRIS_AXIS_LINUX_GNU
;
179 /* Whether global user symbols have a leading underscore. Default here. */
180 static bfd_boolean symbols_have_leading_underscore
181 = !DEFAULT_CRIS_AXIS_LINUX_GNU
;
183 /* Whether or not we allow PIC, and expand to PIC-friendly constructs. */
184 static bfd_boolean pic
= FALSE
;
186 /* Whether or not we allow TLS suffixes. For the moment, we always do. */
187 static const bfd_boolean tls
= TRUE
;
189 /* If we're configured for "cris", default to allow all v0..v10
190 instructions and register names. */
191 #ifndef DEFAULT_CRIS_ARCH
192 #define DEFAULT_CRIS_ARCH cris_any_v0_v10
195 /* No whitespace in the CONCAT2 parameter list. */
196 static enum cris_archs cris_arch
= XCONCAT2 (arch_
,DEFAULT_CRIS_ARCH
);
198 const pseudo_typeS md_pseudo_table
[] =
201 {"syntax", s_syntax
, 0},
202 {"file", s_cris_file
, 0},
203 {"loc", s_cris_loc
, 0},
204 {"arch", s_cris_arch
, 0},
208 static int warn_for_branch_expansion
= 0;
210 /* Whether to emit error when a MULS/MULU could be located last on a
212 static int err_for_dangerous_mul_placement
213 = (XCONCAT2 (arch_
,DEFAULT_CRIS_ARCH
) != arch_crisv32
);
215 const char cris_comment_chars
[] = ";";
217 /* This array holds the chars that only start a comment at the beginning of
218 a line. If the line seems to have the form '# 123 filename'
219 .line and .file directives will appear in the pre-processed output. */
220 /* Note that input_file.c hand-checks for '#' at the beginning of the
221 first line of the input file. This is because the compiler outputs
222 #NO_APP at the beginning of its output. */
223 /* Also note that slash-star will always start a comment. */
224 const char line_comment_chars
[] = "#";
225 const char line_separator_chars
[] = "@";
227 /* Now all floating point support is shut off. See md_atof. */
228 const char EXP_CHARS
[] = "";
229 const char FLT_CHARS
[] = "";
231 /* For CRIS, we encode the relax_substateTs (in e.g. fr_substate) as:
233 ---/ /--+-----------------+-----------------+-----------------+
234 | what state ? | how long ? |
235 ---/ /--+-----------------+-----------------+-----------------+
237 The "how long" bits are 00 = byte, 01 = word, 10 = dword (long).
238 Not all lengths are legit for a given value of (what state).
240 Groups for CRIS address relaxing:
243 length: byte, word, 10-byte expansion
246 length: byte, word, dword
249 Not really a relaxation (no infrastructure to get delay-slots
250 right), just an alignment and placement checker for the v10
253 4. Bcc (V32 and later)
254 length: byte, word, 14-byte expansion
257 length: byte, word, error
260 length: byte, word, dword
266 #define STATE_COND_BRANCH (1)
267 #define STATE_BASE_PLUS_DISP_PREFIX (2)
268 #define STATE_MUL (3)
269 #define STATE_COND_BRANCH_V32 (4)
270 #define STATE_COND_BRANCH_COMMON (5)
271 #define STATE_ABS_BRANCH_V32 (6)
272 #define STATE_LAPC (7)
273 #define STATE_COND_BRANCH_PIC (8)
275 #define STATE_LENGTH_MASK (3)
276 #define STATE_BYTE (0)
277 #define STATE_WORD (1)
278 #define STATE_DWORD (2)
279 /* Symbol undefined. */
280 #define STATE_UNDF (3)
281 #define STATE_MAX_LENGTH (3)
283 /* These displacements are relative to the address following the opcode
284 word of the instruction. The first letter is Byte, Word. The 2nd
285 letter is Forward, Backward. */
287 #define BRANCH_BF ( 254)
288 #define BRANCH_BB (-256)
289 #define BRANCH_BF_V32 ( 252)
290 #define BRANCH_BB_V32 (-258)
291 #define BRANCH_WF (2 + 32767)
292 #define BRANCH_WB (2 + -32768)
293 #define BRANCH_WF_V32 (-2 + 32767)
294 #define BRANCH_WB_V32 (-2 + -32768)
296 #define BDAP_BF ( 127)
297 #define BDAP_BB (-128)
298 #define BDAP_WF ( 32767)
299 #define BDAP_WB (-32768)
301 #define ENCODE_RELAX(what, length) (((what) << 2) + (length))
303 const relax_typeS md_cris_relax_table
[] =
305 /* Error sentinel (0, 0). */
318 {BRANCH_BF
, BRANCH_BB
, 0, ENCODE_RELAX (1, 1)},
320 /* Bcc [PC+] (1, 1). */
321 {BRANCH_WF
, BRANCH_WB
, 2, ENCODE_RELAX (1, 2)},
323 /* BEXT/BWF, BA, JUMP (external), JUMP (always), Bnot_cc, JUMP (default)
331 {BDAP_BF
, BDAP_BB
, 0, ENCODE_RELAX (2, 1)},
333 /* BDAP.[bw] [PC+] (2, 1). */
334 {BDAP_WF
, BDAP_WB
, 2, ENCODE_RELAX (2, 2)},
336 /* BDAP.d [PC+] (2, 2). */
342 /* MULS/MULU (3, 0). Positions (3, 1..3) are unused. */
343 {0, 0, 0, 0}, {0, 0, 0, 0}, {0, 0, 0, 0}, {0, 0, 0, 0},
345 /* V32: Bcc o (4, 0). */
346 {BRANCH_BF_V32
, BRANCH_BB_V32
, 0, ENCODE_RELAX (4, 1)},
348 /* V32: Bcc [PC+] (4, 1). */
349 {BRANCH_WF_V32
, BRANCH_WB_V32
, 2, ENCODE_RELAX (4, 2)},
351 /* V32: BA .+12; NOP; BA32 target; NOP; Bcc .-6 (4, 2). */
357 /* COMMON: Bcc o (5, 0). The offsets are calculated as for v32. Code
358 should contain two nop insns (or four if offset size is large or
359 unknown) after every label. */
360 {BRANCH_BF_V32
, BRANCH_BB_V32
, 0, ENCODE_RELAX (5, 1)},
362 /* COMMON: Bcc [PC+] (5, 1). */
363 {BRANCH_WF_V32
, BRANCH_WB_V32
, 2, ENCODE_RELAX (5, 2)},
365 /* COMMON: FIXME: ???. Treat as error currently. */
371 /* V32: BA o (6, 0). */
372 {BRANCH_BF_V32
, BRANCH_BB_V32
, 0, ENCODE_RELAX (6, 1)},
374 /* V32: BA.W (6, 1). */
375 {BRANCH_WF_V32
, BRANCH_WB_V32
, 2, ENCODE_RELAX (6, 2)},
377 /* V32: BA.D (6, 2). */
383 /* LAPC: LAPCQ .+0..15*2,Rn (7, 0). */
384 {14*2, -1*2, 0, ENCODE_RELAX (7, 2)},
387 While there's a shorter sequence, e.g. LAPCQ + an ADDQ or SUBQ,
388 that would affect flags, so we can't do that as it wouldn't be a
389 proper insn expansion of LAPCQ. This row is associated with a
390 2-byte expansion, so it's unused rather than the next. */
393 /* LAPC: LAPC.D (7, 2). */
399 /* PIC for pre-v32: Bcc o (8, 0). */
400 {BRANCH_BF
, BRANCH_BB
, 0, ENCODE_RELAX (STATE_COND_BRANCH_PIC
, 1)},
402 /* Bcc [PC+] (8, 1). */
403 {BRANCH_WF
, BRANCH_WB
, 2, ENCODE_RELAX (STATE_COND_BRANCH_PIC
, 2)},
405 /* 32-bit expansion, PIC (8, 2). */
417 /* Target-specific multicharacter options, not const-declared. */
418 struct option md_longopts
[] =
420 #define OPTION_NO_US (OPTION_MD_BASE + 0)
421 {"no-underscore", no_argument
, NULL
, OPTION_NO_US
},
422 #define OPTION_US (OPTION_MD_BASE + 1)
423 {"underscore", no_argument
, NULL
, OPTION_US
},
424 #define OPTION_PIC (OPTION_US + 1)
425 {"pic", no_argument
, NULL
, OPTION_PIC
},
426 #define OPTION_MULBUG_ABORT_ON (OPTION_PIC + 1)
427 {"mul-bug-abort", no_argument
, NULL
, OPTION_MULBUG_ABORT_ON
},
428 #define OPTION_MULBUG_ABORT_OFF (OPTION_MULBUG_ABORT_ON + 1)
429 {"no-mul-bug-abort", no_argument
, NULL
, OPTION_MULBUG_ABORT_OFF
},
430 #define OPTION_ARCH (OPTION_MULBUG_ABORT_OFF + 1)
431 {"march", required_argument
, NULL
, OPTION_ARCH
},
432 {NULL
, no_argument
, NULL
, 0}
435 /* Not const-declared. */
436 size_t md_longopts_size
= sizeof (md_longopts
);
437 const char *md_shortopts
= "hHN";
439 /* At first glance, this may seems wrong and should be 4 (ba + nop); but
440 since a short_jump must skip a *number* of long jumps, it must also be
441 a long jump. Here, we hope to make it a "ba [16bit_offs]" and a "nop"
442 for the delay slot and hope that the jump table at most needs
443 32767/4=8191 long-jumps. A branch is better than a jump, since it is
444 relative; we will not have a reloc to fix up somewhere.
446 Note that we can't add relocs, because relaxation uses these fixed
447 numbers, and md_create_short_jump is called after relaxation. */
449 int md_short_jump_size
= 6;
451 /* The v32 version has a delay-slot, hence two bytes longer.
452 The pre-v32 PIC version uses a prefixed insn. */
453 #define cris_any_v0_v10_long_jump_size 6
454 #define cris_any_v0_v10_long_jump_size_pic 8
455 #define crisv32_long_jump_size 8
457 int md_long_jump_size
= XCONCAT2 (DEFAULT_CRIS_ARCH
,_long_jump_size
);
459 /* Report output format. Small changes in output format (like elf
460 variants below) can happen until all options are parsed, but after
461 that, the output format must remain fixed. */
464 cris_target_format (void)
466 switch (OUTPUT_FLAVOR
)
468 case bfd_target_aout_flavour
:
471 case bfd_target_elf_flavour
:
472 if (symbols_have_leading_underscore
)
473 return "elf32-us-cris";
482 /* Return a bfd_mach_cris... value corresponding to the value of
488 unsigned int retval
= 0;
492 case arch_cris_common_v10_v32
:
493 retval
= bfd_mach_cris_v10_v32
;
497 retval
= bfd_mach_cris_v32
;
501 case arch_cris_any_v0_v10
:
502 retval
= bfd_mach_cris_v0_v10
;
506 BAD_CASE (cris_arch
);
512 /* We need a port-specific relaxation function to cope with sym2 - sym1
513 relative expressions with both symbols in the same segment (but not
514 necessarily in the same frag as this insn), for example:
515 move.d [pc+sym2-(sym1-2)],r10
517 The offset can be 8, 16 or 32 bits long. */
520 cris_relax_frag (segT seg ATTRIBUTE_UNUSED
, fragS
*fragP
,
521 long stretch ATTRIBUTE_UNUSED
)
526 const relax_typeS
*this_type
;
527 const relax_typeS
*start_type
;
528 relax_substateT next_state
;
529 relax_substateT this_state
;
530 const relax_typeS
*table
= TC_GENERIC_RELAX_TABLE
;
532 /* We only have to cope with frags as prepared by
533 md_estimate_size_before_relax. The dword cases may get here
534 because of the different reasons that they aren't relaxable. */
535 switch (fragP
->fr_subtype
)
537 case ENCODE_RELAX (STATE_COND_BRANCH
, STATE_DWORD
):
538 case ENCODE_RELAX (STATE_COND_BRANCH_V32
, STATE_DWORD
):
539 case ENCODE_RELAX (STATE_COND_BRANCH_COMMON
, STATE_DWORD
):
540 case ENCODE_RELAX (STATE_ABS_BRANCH_V32
, STATE_DWORD
):
541 case ENCODE_RELAX (STATE_LAPC
, STATE_DWORD
):
542 case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX
, STATE_DWORD
):
543 /* When we get to these states, the frag won't grow any more. */
546 case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX
, STATE_WORD
):
547 case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX
, STATE_BYTE
):
548 if (fragP
->fr_symbol
== NULL
549 || S_GET_SEGMENT (fragP
->fr_symbol
) != absolute_section
)
550 as_fatal (_("internal inconsistency problem in %s: fr_symbol %lx"),
551 __FUNCTION__
, (long) fragP
->fr_symbol
);
552 symbolP
= fragP
->fr_symbol
;
553 if (symbol_resolved_p (symbolP
))
554 as_fatal (_("internal inconsistency problem in %s: resolved symbol"),
556 aim
= S_GET_VALUE (symbolP
);
559 case ENCODE_RELAX (STATE_MUL
, STATE_BYTE
):
560 /* Nothing to do here. */
564 as_fatal (_("internal inconsistency problem in %s: fr_subtype %d"),
565 __FUNCTION__
, fragP
->fr_subtype
);
568 /* The rest is stolen from relax_frag. There's no obvious way to
569 share the code, but fortunately no requirement to keep in sync as
570 long as fragP->fr_symbol does not have its segment changed. */
572 this_state
= fragP
->fr_subtype
;
573 start_type
= this_type
= table
+ this_state
;
577 /* Look backwards. */
578 for (next_state
= this_type
->rlx_more
; next_state
;)
579 if (aim
>= this_type
->rlx_backward
)
583 /* Grow to next state. */
584 this_state
= next_state
;
585 this_type
= table
+ this_state
;
586 next_state
= this_type
->rlx_more
;
592 for (next_state
= this_type
->rlx_more
; next_state
;)
593 if (aim
<= this_type
->rlx_forward
)
597 /* Grow to next state. */
598 this_state
= next_state
;
599 this_type
= table
+ this_state
;
600 next_state
= this_type
->rlx_more
;
604 growth
= this_type
->rlx_length
- start_type
->rlx_length
;
606 fragP
->fr_subtype
= this_state
;
610 /* Prepare machine-dependent frags for relaxation.
612 Called just before relaxation starts. Any symbol that is now undefined
613 will not become defined.
615 Return the correct fr_subtype in the frag.
617 Return the initial "guess for fr_var" to caller. The guess for fr_var
618 is *actually* the growth beyond fr_fix. Whatever we do to grow fr_fix
619 or fr_var contributes to our returned value.
621 Although it may not be explicit in the frag, pretend
622 fr_var starts with a value. */
625 md_estimate_size_before_relax (fragS
*fragP
, segT segment_type
)
628 symbolS
*symbolP
= fragP
->fr_symbol
;
630 #define HANDLE_RELAXABLE(state) \
631 case ENCODE_RELAX (state, STATE_UNDF): \
632 if (symbolP != NULL \
633 && S_GET_SEGMENT (symbolP) == segment_type \
634 && !S_IS_WEAK (symbolP)) \
635 /* The symbol lies in the same segment - a relaxable \
638 = ENCODE_RELAX (state, STATE_BYTE); \
640 /* Unknown or not the same segment, so not relaxable. */ \
642 = ENCODE_RELAX (state, STATE_DWORD); \
644 = md_cris_relax_table[fragP->fr_subtype].rlx_length; \
647 old_fr_fix
= fragP
->fr_fix
;
649 switch (fragP
->fr_subtype
)
651 HANDLE_RELAXABLE (STATE_COND_BRANCH
);
652 HANDLE_RELAXABLE (STATE_COND_BRANCH_V32
);
653 HANDLE_RELAXABLE (STATE_COND_BRANCH_COMMON
);
654 HANDLE_RELAXABLE (STATE_COND_BRANCH_PIC
);
655 HANDLE_RELAXABLE (STATE_ABS_BRANCH_V32
);
657 case ENCODE_RELAX (STATE_LAPC
, STATE_UNDF
):
659 && S_GET_SEGMENT (symbolP
) == segment_type
660 && !S_IS_WEAK (symbolP
))
662 /* The symbol lies in the same segment - a relaxable case.
663 Check if we currently have an odd offset; we can't code
664 that into the instruction. Relaxing presumably only cause
665 multiple-of-two changes, so we should only need to adjust
667 bfd_vma target_address
669 ? S_GET_VALUE (symbolP
)
670 : 0) + fragP
->fr_offset
;
671 bfd_vma var_part_offset
= fragP
->fr_fix
;
672 bfd_vma address_of_var_part
= fragP
->fr_address
+ var_part_offset
;
673 long offset
= target_address
- (address_of_var_part
- 2);
677 ? ENCODE_RELAX (STATE_LAPC
, STATE_DWORD
)
678 : ENCODE_RELAX (STATE_LAPC
, STATE_BYTE
);
681 /* Unknown or not the same segment, so not relaxable. */
683 = ENCODE_RELAX (STATE_LAPC
, STATE_DWORD
);
685 = md_cris_relax_table
[fragP
->fr_subtype
].rlx_length
;
688 case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX
, STATE_UNDF
):
689 /* Note that we can not do anything sane with relaxing
690 [rX + a_known_symbol_in_text], it will have to be a 32-bit
693 We could play tricks with managing a constant pool and make
694 a_known_symbol_in_text a "bdap [pc + offset]" pointing there
695 (like the GOT for ELF shared libraries), but that's no use, it
696 would in general be no shorter or faster code, only more
699 if (S_GET_SEGMENT (symbolP
) != absolute_section
)
701 /* Go for dword if not absolute or same segment. */
703 = ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX
, STATE_DWORD
);
704 fragP
->fr_var
= md_cris_relax_table
[fragP
->fr_subtype
].rlx_length
;
706 else if (!symbol_resolved_p (fragP
->fr_symbol
))
708 /* The symbol will eventually be completely resolved as an
709 absolute expression, but right now it depends on the result
710 of relaxation and we don't know anything else about the
711 value. We start relaxation with the assumption that it'll
714 = ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX
, STATE_BYTE
);
715 fragP
->fr_var
= md_cris_relax_table
[fragP
->fr_subtype
].rlx_length
;
719 /* Absolute expression. */
721 value
= (symbolP
!= NULL
722 ? S_GET_VALUE (symbolP
) : 0) + fragP
->fr_offset
;
724 if (value
>= -128 && value
<= 127)
726 /* Byte displacement. */
727 (fragP
->fr_opcode
)[0] = value
;
731 /* Word or dword displacement. */
732 int pow2_of_size
= 1;
735 if (value
< -32768 || value
> 32767)
737 /* Outside word range, make it a dword. */
741 /* Modify the byte-offset BDAP into a word or dword offset
742 BDAP. Or really, a BDAP rX,8bit into a
743 BDAP.[wd] rX,[PC+] followed by a word or dword. */
744 (fragP
->fr_opcode
)[0] = BDAP_PC_LOW
+ pow2_of_size
* 16;
746 /* Keep the register number in the highest four bits. */
747 (fragP
->fr_opcode
)[1] &= 0xF0;
748 (fragP
->fr_opcode
)[1] |= BDAP_INCR_HIGH
;
750 /* It grew by two or four bytes. */
751 fragP
->fr_fix
+= 1 << pow2_of_size
;
752 writep
= fragP
->fr_literal
+ old_fr_fix
;
753 md_number_to_chars (writep
, value
, 1 << pow2_of_size
);
759 case ENCODE_RELAX (STATE_COND_BRANCH
, STATE_BYTE
):
760 case ENCODE_RELAX (STATE_COND_BRANCH
, STATE_WORD
):
761 case ENCODE_RELAX (STATE_COND_BRANCH
, STATE_DWORD
):
762 case ENCODE_RELAX (STATE_COND_BRANCH_PIC
, STATE_BYTE
):
763 case ENCODE_RELAX (STATE_COND_BRANCH_PIC
, STATE_WORD
):
764 case ENCODE_RELAX (STATE_COND_BRANCH_PIC
, STATE_DWORD
):
765 case ENCODE_RELAX (STATE_COND_BRANCH_V32
, STATE_BYTE
):
766 case ENCODE_RELAX (STATE_COND_BRANCH_V32
, STATE_WORD
):
767 case ENCODE_RELAX (STATE_COND_BRANCH_V32
, STATE_DWORD
):
768 case ENCODE_RELAX (STATE_COND_BRANCH_COMMON
, STATE_BYTE
):
769 case ENCODE_RELAX (STATE_COND_BRANCH_COMMON
, STATE_WORD
):
770 case ENCODE_RELAX (STATE_COND_BRANCH_COMMON
, STATE_DWORD
):
771 case ENCODE_RELAX (STATE_ABS_BRANCH_V32
, STATE_BYTE
):
772 case ENCODE_RELAX (STATE_ABS_BRANCH_V32
, STATE_WORD
):
773 case ENCODE_RELAX (STATE_ABS_BRANCH_V32
, STATE_DWORD
):
774 case ENCODE_RELAX (STATE_LAPC
, STATE_BYTE
):
775 case ENCODE_RELAX (STATE_LAPC
, STATE_DWORD
):
776 case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX
, STATE_BYTE
):
777 case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX
, STATE_WORD
):
778 case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX
, STATE_DWORD
):
779 /* When relaxing a section for the second time, we don't need to
780 do anything except making sure that fr_var is set right. */
781 fragP
->fr_var
= md_cris_relax_table
[fragP
->fr_subtype
].rlx_length
;
784 case ENCODE_RELAX (STATE_MUL
, STATE_BYTE
):
785 /* Nothing to do here. */
789 BAD_CASE (fragP
->fr_subtype
);
792 return fragP
->fr_var
+ (fragP
->fr_fix
- old_fr_fix
);
795 /* Perform post-processing of machine-dependent frags after relaxation.
796 Called after relaxation is finished.
798 fr_type == rs_machine_dependent.
799 fr_subtype is what the address relaxed to.
801 Out: Any fixS:s and constants are set up.
803 The caller will turn the frag into a ".space 0". */
806 md_convert_frag (bfd
*abfd ATTRIBUTE_UNUSED
, segT sec ATTRIBUTE_UNUSED
,
809 /* Pointer to first byte in variable-sized part of the frag. */
812 /* Pointer to first opcode byte in frag. */
815 /* Used to check integrity of the relaxation.
816 One of 2 = long, 1 = word, or 0 = byte. */
819 /* Size in bytes of variable-sized part of frag. */
820 int var_part_size
= 0;
822 /* This is part of *fragP. It contains all information about addresses
823 and offsets to varying parts. */
825 unsigned long var_part_offset
;
827 /* Where, in file space, is _var of *fragP? */
828 unsigned long address_of_var_part
= 0;
830 /* Where, in file space, does addr point? */
831 unsigned long target_address
;
833 know (fragP
->fr_type
== rs_machine_dependent
);
835 length_code
= fragP
->fr_subtype
& STATE_LENGTH_MASK
;
836 know (length_code
>= 0 && length_code
< STATE_MAX_LENGTH
);
838 var_part_offset
= fragP
->fr_fix
;
839 var_partp
= fragP
->fr_literal
+ var_part_offset
;
840 opcodep
= fragP
->fr_opcode
;
842 symbolP
= fragP
->fr_symbol
;
843 target_address
= (symbolP
? S_GET_VALUE (symbolP
) : 0) + fragP
->fr_offset
;
844 address_of_var_part
= fragP
->fr_address
+ var_part_offset
;
846 switch (fragP
->fr_subtype
)
848 case ENCODE_RELAX (STATE_COND_BRANCH
, STATE_BYTE
):
849 case ENCODE_RELAX (STATE_COND_BRANCH_PIC
, STATE_BYTE
):
850 case ENCODE_RELAX (STATE_COND_BRANCH_V32
, STATE_BYTE
):
851 case ENCODE_RELAX (STATE_COND_BRANCH_COMMON
, STATE_BYTE
):
852 case ENCODE_RELAX (STATE_ABS_BRANCH_V32
, STATE_BYTE
):
853 opcodep
[0] = branch_disp ((target_address
- address_of_var_part
));
857 case ENCODE_RELAX (STATE_COND_BRANCH
, STATE_WORD
):
858 case ENCODE_RELAX (STATE_COND_BRANCH_PIC
, STATE_WORD
):
859 case ENCODE_RELAX (STATE_COND_BRANCH_V32
, STATE_WORD
):
860 case ENCODE_RELAX (STATE_COND_BRANCH_COMMON
, STATE_WORD
):
861 case ENCODE_RELAX (STATE_ABS_BRANCH_V32
, STATE_WORD
):
862 /* We had a quick immediate branch, now turn it into a word one i.e. a
864 opcodep
[0] = BRANCH_PC_LOW
;
866 opcodep
[1] |= BRANCH_INCR_HIGH
;
867 md_number_to_chars (var_partp
,
870 - (address_of_var_part
871 + (cris_arch
== arch_crisv32
872 || cris_arch
== arch_cris_common_v10_v32
878 case ENCODE_RELAX (STATE_COND_BRANCH
, STATE_DWORD
):
879 gen_cond_branch_32 (fragP
->fr_opcode
, var_partp
, fragP
,
880 fragP
->fr_symbol
, (symbolS
*) NULL
,
882 /* Ten bytes added: a branch, nop and a jump. */
883 var_part_size
= 2 + 2 + 4 + 2;
886 case ENCODE_RELAX (STATE_COND_BRANCH_PIC
, STATE_DWORD
):
887 gen_cond_branch_32 (fragP
->fr_opcode
, var_partp
, fragP
,
888 fragP
->fr_symbol
, (symbolS
*) NULL
,
890 /* Twelve bytes added: a branch, nop and a pic-branch-32. */
891 var_part_size
= 2 + 2 + 4 + 2 + 2;
894 case ENCODE_RELAX (STATE_COND_BRANCH_V32
, STATE_DWORD
):
895 gen_cond_branch_32 (fragP
->fr_opcode
, var_partp
, fragP
,
896 fragP
->fr_symbol
, (symbolS
*) NULL
,
898 /* Twelve bytes added: a branch, nop and another branch and nop. */
899 var_part_size
= 2 + 2 + 2 + 4 + 2;
902 case ENCODE_RELAX (STATE_COND_BRANCH_COMMON
, STATE_DWORD
):
903 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
904 _("Relaxation to long branches for .arch common_v10_v32\
906 /* Pretend we have twelve bytes for sake of quelling further
908 var_part_size
= 2 + 2 + 2 + 4 + 2;
911 case ENCODE_RELAX (STATE_ABS_BRANCH_V32
, STATE_DWORD
):
912 /* We had a quick immediate branch or a word immediate ba. Now
913 turn it into a dword one. */
914 opcodep
[0] = BA_DWORD_OPCODE
& 255;
915 opcodep
[1] = (BA_DWORD_OPCODE
>> 8) & 255;
916 fix_new (fragP
, var_partp
- fragP
->fr_literal
, 4, symbolP
,
917 fragP
->fr_offset
+ 6, 1, BFD_RELOC_32_PCREL
);
921 case ENCODE_RELAX (STATE_LAPC
, STATE_BYTE
):
923 long offset
= target_address
- (address_of_var_part
- 2);
925 /* This is mostly a sanity check; useful occurrences (if there
926 really are any) should have been caught in
927 md_estimate_size_before_relax. We can (at least
928 theoretically) stumble over invalid code with odd sizes and
929 .p2aligns within the code, so emit an error if that happens.
930 (The generic relaxation machinery is not fit to check this.) */
933 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
934 _("Complicated LAPC target operand is not\
935 a multiple of two. Use LAPC.D"));
937 /* FIXME: This *is* a sanity check. Remove when done with. */
938 if (offset
> 15*2 || offset
< 0)
939 as_fatal (_("Internal error found in md_convert_frag: offset %ld.\
940 Please report this."),
943 opcodep
[0] |= (offset
/ 2) & 0xf;
948 case ENCODE_RELAX (STATE_LAPC
, STATE_DWORD
):
950 md_number_to_chars (opcodep
,
951 LAPC_DWORD_OPCODE
+ (opcodep
[1] & 0xf0) * 256,
953 /* Remember that the reloc is against the position *after* the
954 relocated contents, so we need to adjust to the start of
956 fix_new (fragP
, var_partp
- fragP
->fr_literal
, 4, fragP
->fr_symbol
,
957 fragP
->fr_offset
+ 6, 1, BFD_RELOC_32_PCREL
);
962 case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX
, STATE_BYTE
):
964 as_fatal (_("internal inconsistency in %s: bdapq no symbol"),
966 opcodep
[0] = S_GET_VALUE (symbolP
);
970 case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX
, STATE_WORD
):
971 /* We had a BDAP 8-bit "quick immediate", now turn it into a 16-bit
972 one that uses PC autoincrement. */
973 opcodep
[0] = BDAP_PC_LOW
+ (1 << 4);
975 opcodep
[1] |= BDAP_INCR_HIGH
;
977 as_fatal (_("internal inconsistency in %s: bdap.w with no symbol"),
979 md_number_to_chars (var_partp
, S_GET_VALUE (symbolP
), 2);
983 case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX
, STATE_DWORD
):
984 /* We had a BDAP 16-bit "word", change the offset to a dword. */
985 opcodep
[0] = BDAP_PC_LOW
+ (2 << 4);
987 opcodep
[1] |= BDAP_INCR_HIGH
;
988 if (fragP
->fr_symbol
== NULL
)
989 md_number_to_chars (var_partp
, fragP
->fr_offset
, 4);
991 fix_new (fragP
, var_partp
- fragP
->fr_literal
, 4, fragP
->fr_symbol
,
992 fragP
->fr_offset
, 0, BFD_RELOC_32
);
996 case ENCODE_RELAX (STATE_MUL
, STATE_BYTE
):
997 /* This is the only time we check position and alignment of the
998 placement-tracking frag. */
999 if (sec
->alignment_power
< 2)
1000 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
1001 _("section alignment must be >= 4 bytes to check MULS/MULU safeness"));
1004 /* If the address after the MULS/MULU has alignment which is
1005 that of the section and may be that of a cache-size of the
1006 buggy versions, then the MULS/MULU can be placed badly. */
1007 if ((address_of_var_part
1008 & ((1 << sec
->alignment_power
) - 1) & 31) == 0)
1009 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
1010 _("dangerous MULS/MULU location; give it higher alignment"));
1015 BAD_CASE (fragP
->fr_subtype
);
1019 fragP
->fr_fix
+= var_part_size
;
1022 /* Generate a short jump around a secondary jump table.
1023 Used by md_create_long_jump.
1025 This used to be md_create_short_jump, but is now called from
1026 md_create_long_jump instead, when sufficient, since the sizes of the
1027 jumps are the same for pre-v32. */
1030 cris_create_short_jump (char *storep
, addressT from_addr
, addressT to_addr
,
1031 fragS
*fragP ATTRIBUTE_UNUSED
,
1032 symbolS
*to_symbol ATTRIBUTE_UNUSED
)
1036 /* See md_create_long_jump about the comment on the "+ 2". */
1037 long int max_minimal_minus_distance
;
1038 long int max_minimal_plus_distance
;
1041 if (cris_arch
== arch_crisv32
)
1043 max_minimal_minus_distance
= BRANCH_BB_V32
+ 2;
1044 max_minimal_plus_distance
= BRANCH_BF_V32
+ 2;
1045 nop_opcode
= NOP_OPCODE_V32
;
1049 max_minimal_minus_distance
= BRANCH_BB
+ 2;
1050 max_minimal_plus_distance
= BRANCH_BF
+ 2;
1051 nop_opcode
= NOP_OPCODE
;
1054 distance
= to_addr
- from_addr
;
1056 if (max_minimal_minus_distance
<= distance
1057 && distance
<= max_minimal_plus_distance
)
1059 /* Create a "short" short jump: "BA distance - 2". */
1060 storep
[0] = branch_disp (distance
- 2);
1061 storep
[1] = BA_QUICK_HIGH
;
1063 /* A nop for the delay slot. */
1064 md_number_to_chars (storep
+ 2, nop_opcode
, 2);
1066 /* The extra word should be filled with something sane too. Make it
1067 a nop to keep disassembly sane. */
1068 md_number_to_chars (storep
+ 4, nop_opcode
, 2);
1072 /* Make it a "long" short jump: "BA (PC+)". */
1073 md_number_to_chars (storep
, BA_PC_INCR_OPCODE
, 2);
1075 /* ".WORD distance - 4". */
1076 md_number_to_chars (storep
+ 2,
1077 (long) (distance
- 4
1078 - (cris_arch
== arch_crisv32
1082 /* A nop for the delay slot. */
1083 md_number_to_chars (storep
+ 4, nop_opcode
, 2);
1087 /* Generate a long jump in a secondary jump table.
1089 storep Where to store the jump instruction.
1090 from_addr Address of the jump instruction.
1091 to_addr Destination address of the jump.
1092 fragP Which frag the destination address operand
1094 to_symbol Destination symbol. */
1097 md_create_long_jump (char *storep
, addressT from_addr
, addressT to_addr
,
1098 fragS
*fragP
, symbolS
*to_symbol
)
1102 /* FIXME: What's that "+ 3"? It comes from the magic numbers that
1103 used to be here, it's just translated to the limit macros used in
1104 the relax table. But why + 3? */
1105 long int max_short_minus_distance
1106 = cris_arch
!= arch_crisv32
? BRANCH_WB
+ 3 : BRANCH_WB_V32
+ 3;
1108 long int max_short_plus_distance
1109 = cris_arch
!= arch_crisv32
? BRANCH_WF
+ 3 : BRANCH_WF_V32
+ 3;
1111 /* Bail out for compatibility mode. (It seems it can be implemented,
1112 perhaps with a 10-byte sequence: "move.d NNNN,$pc/$acr", "jump
1113 $acr", "nop"; but doesn't seem worth it at the moment.) */
1114 if (cris_arch
== arch_cris_common_v10_v32
)
1115 as_fatal (_("Out-of-range .word offset handling\
1116 is not implemented for .arch common_v10_v32"));
1118 distance
= to_addr
- from_addr
;
1120 if (max_short_minus_distance
<= distance
1121 && distance
<= max_short_plus_distance
)
1122 /* Then make it a "short" long jump. */
1123 cris_create_short_jump (storep
, from_addr
, to_addr
, fragP
,
1127 /* We have a "long" long jump: "JUMP [PC+]". If CRISv32, always
1128 make it a BA. Else make it an "MOVE [PC=PC+N],P0" if we're supposed
1129 to emit PIC code. */
1130 md_number_to_chars (storep
,
1131 cris_arch
== arch_crisv32
1133 : (pic
? MOVE_PC_INCR_OPCODE_PREFIX
1134 : JUMP_PC_INCR_OPCODE
),
1137 /* Follow with a ".DWORD to_addr", PC-relative for PIC. */
1138 fix_new (fragP
, storep
+ 2 - fragP
->fr_literal
, 4, to_symbol
,
1139 cris_arch
== arch_crisv32
? 6 : 0,
1140 cris_arch
== arch_crisv32
|| pic
? 1 : 0,
1141 cris_arch
== arch_crisv32
|| pic
1142 ? BFD_RELOC_32_PCREL
: BFD_RELOC_32
);
1144 /* Follow it with a "NOP" for CRISv32. */
1145 if (cris_arch
== arch_crisv32
)
1146 md_number_to_chars (storep
+ 6, NOP_OPCODE_V32
, 2);
1148 /* ...and the rest of the move-opcode for pre-v32 PIC. */
1149 md_number_to_chars (storep
+ 6, MOVE_PC_INCR_OPCODE_SUFFIX
, 2);
1153 /* Allocate space for the first piece of an insn, and mark it as the
1154 start of the insn for debug-format use. */
1157 cris_insn_first_word_frag (void)
1159 char *insnp
= frag_more (2);
1161 /* We need to mark the start of the insn by passing dwarf2_emit_insn
1162 the offset from the current fragment position. This must be done
1163 after the first fragment is created but before any other fragments
1164 (fixed or varying) are created. Note that the offset only
1165 corresponds to the "size" of the insn for a fixed-size,
1166 non-expanded insn. */
1167 if (OUTPUT_FLAVOR
== bfd_target_elf_flavour
)
1168 dwarf2_emit_insn (2);
1173 /* Port-specific assembler initialization. */
1178 const char *hashret
= NULL
;
1181 /* Set up a hash table for the instructions. */
1182 op_hash
= hash_new ();
1183 if (op_hash
== NULL
)
1184 as_fatal (_("Virtual memory exhausted"));
1186 /* Enable use of ".if ..asm.arch.cris.v32"
1187 and ".if ..asm.arch.cris.common_v10_v32" and a few others. */
1188 symbol_table_insert (symbol_new ("..asm.arch.cris.v32", absolute_section
,
1189 (cris_arch
== arch_crisv32
),
1190 &zero_address_frag
));
1191 symbol_table_insert (symbol_new ("..asm.arch.cris.v10", absolute_section
,
1192 (cris_arch
== arch_crisv10
),
1193 &zero_address_frag
));
1194 symbol_table_insert (symbol_new ("..asm.arch.cris.common_v10_v32",
1196 (cris_arch
== arch_cris_common_v10_v32
),
1197 &zero_address_frag
));
1198 symbol_table_insert (symbol_new ("..asm.arch.cris.any_v0_v10",
1200 (cris_arch
== arch_cris_any_v0_v10
),
1201 &zero_address_frag
));
1203 while (cris_opcodes
[i
].name
!= NULL
)
1205 const char *name
= cris_opcodes
[i
].name
;
1207 if (! cris_insn_ver_valid_for_arch (cris_opcodes
[i
].applicable_version
,
1214 /* Need to cast to get rid of "const". FIXME: Fix hash_insert instead. */
1215 hashret
= hash_insert (op_hash
, name
, (void *) &cris_opcodes
[i
]);
1217 if (hashret
!= NULL
&& *hashret
!= '\0')
1218 as_fatal (_("Can't hash `%s': %s\n"), cris_opcodes
[i
].name
,
1219 *hashret
== 0 ? _("(unknown reason)") : hashret
);
1222 if (cris_opcodes
[i
].match
& cris_opcodes
[i
].lose
)
1223 as_fatal (_("Buggy opcode: `%s' \"%s\"\n"), cris_opcodes
[i
].name
,
1224 cris_opcodes
[i
].args
);
1228 while (cris_opcodes
[i
].name
!= NULL
1229 && strcmp (cris_opcodes
[i
].name
, name
) == 0);
1233 /* Assemble a source line. */
1236 md_assemble (char *str
)
1238 struct cris_instruction output_instruction
;
1239 struct cris_prefix prefix
;
1245 /* Do the low-level grunt - assemble to bits and split up into a prefix
1246 and ordinary insn. */
1247 cris_process_instruction (str
, &output_instruction
, &prefix
);
1249 /* Handle any prefixes to the instruction. */
1250 switch (prefix
.kind
)
1255 /* When the expression is unknown for a BDAP, it can need 0, 2 or 4
1256 extra bytes, so we handle it separately. */
1257 case PREFIX_BDAP_IMM
:
1258 /* We only do it if the relocation is unspecified, i.e. not a PIC or TLS
1260 if (prefix
.reloc
== BFD_RELOC_NONE
)
1262 gen_bdap (prefix
.base_reg_number
, &prefix
.expr
);
1269 opcodep
= cris_insn_first_word_frag ();
1271 /* Output the prefix opcode. */
1272 md_number_to_chars (opcodep
, (long) prefix
.opcode
, 2);
1274 /* Having a specified reloc only happens for DIP and for BDAP with
1275 PIC or TLS operands, but it is ok to drop through here for the other
1276 prefixes as they can have no relocs specified. */
1277 if (prefix
.reloc
!= BFD_RELOC_NONE
)
1279 unsigned int relocsize
1280 = (prefix
.kind
== PREFIX_DIP
1281 ? 4 : cris_get_specified_reloc_size (prefix
.reloc
));
1283 p
= frag_more (relocsize
);
1284 fix_new_exp (frag_now
, (p
- frag_now
->fr_literal
), relocsize
,
1285 &prefix
.expr
, 0, prefix
.reloc
);
1290 opcodep
= cris_insn_first_word_frag ();
1292 /* Output the prefix opcode. Being a "push", we add the negative
1293 size of the register to "sp". */
1294 if (output_instruction
.spec_reg
!= NULL
)
1296 /* Special register. */
1297 opcodep
[0] = -output_instruction
.spec_reg
->reg_size
;
1301 /* General register. */
1304 opcodep
[1] = (REG_SP
<< 4) + (BDAP_QUICK_OPCODE
>> 8);
1308 BAD_CASE (prefix
.kind
);
1311 /* If we only had a prefix insn, we're done. */
1312 if (output_instruction
.insn_type
== CRIS_INSN_NONE
)
1315 /* Done with the prefix. Continue with the main instruction. */
1316 if (prefix
.kind
== PREFIX_NONE
)
1317 opcodep
= cris_insn_first_word_frag ();
1319 opcodep
= frag_more (2);
1321 /* Output the instruction opcode. */
1322 md_number_to_chars (opcodep
, (long) (output_instruction
.opcode
), 2);
1324 /* Output the symbol-dependent instruction stuff. */
1325 if (output_instruction
.insn_type
== CRIS_INSN_BRANCH
)
1327 segT to_seg
= absolute_section
;
1328 int is_undefined
= 0;
1331 if (output_instruction
.expr
.X_op
!= O_constant
)
1333 to_seg
= S_GET_SEGMENT (output_instruction
.expr
.X_add_symbol
);
1335 if (to_seg
== undefined_section
)
1339 if (to_seg
== now_seg
|| is_undefined
1340 /* In CRISv32, there *is* a 32-bit absolute branch, so don't
1341 emit the 12-byte sequence for known symbols in other
1343 || (cris_arch
== arch_crisv32
1344 && output_instruction
.opcode
== BA_QUICK_OPCODE
))
1346 /* Handle complex expressions. */
1348 = (SIMPLE_EXPR (&output_instruction
.expr
)
1349 ? output_instruction
.expr
.X_add_number
1352 = (SIMPLE_EXPR (&output_instruction
.expr
)
1353 ? output_instruction
.expr
.X_add_symbol
1354 : make_expr_symbol (&output_instruction
.expr
));
1356 /* If is_undefined, the expression may still become now_seg.
1357 That case is handled by md_estimate_size_before_relax. */
1358 length_code
= to_seg
== now_seg
? STATE_BYTE
: STATE_UNDF
;
1360 /* Make room for max twelve bytes of variable length for v32 mode
1361 or PIC, ten for v10 and older. */
1362 frag_var (rs_machine_dependent
,
1363 (cris_arch
== arch_crisv32
1364 || cris_arch
== arch_cris_common_v10_v32
1365 || pic
) ? 12 : 10, 0,
1366 ENCODE_RELAX (cris_arch
== arch_crisv32
1367 ? (output_instruction
.opcode
1369 ? STATE_ABS_BRANCH_V32
1370 : STATE_COND_BRANCH_V32
)
1371 : (cris_arch
== arch_cris_common_v10_v32
1372 ? STATE_COND_BRANCH_COMMON
1373 : (pic
? STATE_COND_BRANCH_PIC
1374 : STATE_COND_BRANCH
)),
1376 sym
, addvalue
, opcodep
);
1380 /* We have: to_seg != now_seg && to_seg != undefined_section.
1381 This means it is a branch to a known symbol in another
1382 section, perhaps an absolute address. Emit a 32-bit branch. */
1384 = frag_more ((cris_arch
== arch_crisv32
1385 || cris_arch
== arch_cris_common_v10_v32
1389 gen_cond_branch_32 (opcodep
, cond_jump
, frag_now
,
1390 output_instruction
.expr
.X_add_symbol
,
1392 output_instruction
.expr
.X_add_number
);
1395 else if (output_instruction
.insn_type
== CRIS_INSN_MUL
1396 && err_for_dangerous_mul_placement
)
1397 /* Create a frag which which we track the location of the mul insn
1398 (in the last two bytes before the mul-frag). */
1399 frag_variant (rs_machine_dependent
, 0, 0,
1400 ENCODE_RELAX (STATE_MUL
, STATE_BYTE
),
1404 if (output_instruction
.imm_oprnd_size
> 0)
1406 /* The instruction has an immediate operand. */
1407 enum bfd_reloc_code_real reloc
= BFD_RELOC_NONE
;
1409 switch (output_instruction
.imm_oprnd_size
)
1411 /* Any byte-size immediate constants are treated as
1412 word-size. FIXME: Thus overflow check does not work
1416 /* Note that size-check for the explicit reloc has already
1417 been done when we get here. */
1418 if (output_instruction
.reloc
!= BFD_RELOC_NONE
)
1419 reloc
= output_instruction
.reloc
;
1421 reloc
= BFD_RELOC_16
;
1425 /* Allow a relocation specified in the operand. */
1426 if (output_instruction
.reloc
!= BFD_RELOC_NONE
)
1427 reloc
= output_instruction
.reloc
;
1429 reloc
= BFD_RELOC_32
;
1433 BAD_CASE (output_instruction
.imm_oprnd_size
);
1436 p
= frag_more (output_instruction
.imm_oprnd_size
);
1437 fix_new_exp (frag_now
, (p
- frag_now
->fr_literal
),
1438 output_instruction
.imm_oprnd_size
,
1439 &output_instruction
.expr
,
1440 reloc
== BFD_RELOC_32_PCREL
1441 || reloc
== BFD_RELOC_16_PCREL
1442 || reloc
== BFD_RELOC_8_PCREL
, reloc
);
1444 else if (output_instruction
.reloc
== BFD_RELOC_CRIS_LAPCQ_OFFSET
1445 && output_instruction
.expr
.X_md
!= 0)
1447 /* Handle complex expressions. */
1449 = (output_instruction
.expr
.X_op_symbol
!= NULL
1450 ? 0 : output_instruction
.expr
.X_add_number
);
1452 = (output_instruction
.expr
.X_op_symbol
!= NULL
1453 ? make_expr_symbol (&output_instruction
.expr
)
1454 : output_instruction
.expr
.X_add_symbol
);
1456 /* This is a relaxing construct, so we need a frag_var rather
1457 than the fix_new_exp call below. */
1458 frag_var (rs_machine_dependent
,
1460 ENCODE_RELAX (STATE_LAPC
, STATE_UNDF
),
1461 sym
, addvalue
, opcodep
);
1463 else if (output_instruction
.reloc
!= BFD_RELOC_NONE
)
1465 /* An immediate operand that has a relocation and needs to be
1466 processed further. */
1468 /* It is important to use fix_new_exp here and everywhere else
1469 (and not fix_new), as fix_new_exp can handle "difference
1470 expressions" - where the expression contains a difference of
1471 two symbols in the same segment. */
1472 fix_new_exp (frag_now
, (opcodep
- frag_now
->fr_literal
), 2,
1473 &output_instruction
.expr
,
1474 output_instruction
.reloc
== BFD_RELOC_32_PCREL
1475 || output_instruction
.reloc
== BFD_RELOC_16_PCREL
1476 || output_instruction
.reloc
== BFD_RELOC_8_PCREL
1477 || (output_instruction
.reloc
1478 == BFD_RELOC_CRIS_LAPCQ_OFFSET
),
1479 output_instruction
.reloc
);
1484 /* Low level text-to-bits assembly. */
1487 cris_process_instruction (char *insn_text
, struct cris_instruction
*out_insnp
,
1488 struct cris_prefix
*prefixp
)
1491 char modified_char
= 0;
1493 struct cris_opcode
*instruction
;
1500 /* Reset these fields to a harmless state in case we need to return in
1502 prefixp
->kind
= PREFIX_NONE
;
1503 prefixp
->reloc
= BFD_RELOC_NONE
;
1504 out_insnp
->insn_type
= CRIS_INSN_NONE
;
1505 out_insnp
->imm_oprnd_size
= 0;
1507 /* Find the end of the opcode mnemonic. We assume (true in 2.9.1)
1508 that the caller has translated the opcode to lower-case, up to the
1509 first non-letter. */
1510 for (operands
= insn_text
; ISLOWER (*operands
); ++operands
)
1513 /* Terminate the opcode after letters, but save the character there if
1514 it was of significance. */
1521 /* Put back the modified character later. */
1522 modified_char
= *operands
;
1526 /* Consume the character after the mnemonic
1527 and replace it with '\0'. */
1532 as_bad (_("Unknown opcode: `%s'"), insn_text
);
1536 /* Find the instruction. */
1537 instruction
= (struct cris_opcode
*) hash_find (op_hash
, insn_text
);
1538 if (instruction
== NULL
)
1540 as_bad (_("Unknown opcode: `%s'"), insn_text
);
1544 /* Put back the modified character. */
1545 switch (modified_char
)
1551 *--operands
= modified_char
;
1554 /* Try to match an opcode table slot. */
1555 for (s
= operands
;;)
1559 /* Initialize *prefixp, perhaps after being modified for a
1561 prefixp
->kind
= PREFIX_NONE
;
1562 prefixp
->reloc
= BFD_RELOC_NONE
;
1564 /* Initialize *out_insnp. */
1565 memset (out_insnp
, 0, sizeof (*out_insnp
));
1566 out_insnp
->opcode
= instruction
->match
;
1567 out_insnp
->reloc
= BFD_RELOC_NONE
;
1568 out_insnp
->insn_type
= CRIS_INSN_NORMAL
;
1569 out_insnp
->imm_oprnd_size
= 0;
1573 /* Build the opcode, checking as we go to make sure that the
1575 for (args
= instruction
->args
;; ++args
)
1580 /* If we've come to the end of arguments, we're done. */
1586 /* Non-matcher character for disassembly.
1594 /* These must match exactly. */
1600 /* "ACR", case-insensitive.
1601 Handle a sometimes-mandatory dollar sign as register
1603 if (*s
== REGISTER_PREFIX_CHAR
)
1605 else if (demand_register_prefix
)
1608 if ((*s
++ != 'a' && s
[-1] != 'A')
1609 || (*s
++ != 'c' && s
[-1] != 'C')
1610 || (*s
++ != 'r' && s
[-1] != 'R'))
1615 /* This is not really an operand, but causes a "BDAP
1616 -size,SP" prefix to be output, for PUSH instructions. */
1617 prefixp
->kind
= PREFIX_PUSH
;
1621 /* This letter marks an operand that should not be matched
1622 in the assembler. It is a branch with 16-bit
1623 displacement. The assembler will create them from the
1624 8-bit flavor when necessary. The assembler does not
1625 support the [rN+] operand, as the [r15+] that is
1626 generated for 16-bit displacements. */
1630 /* A 5-bit unsigned immediate in bits <4:0>. */
1631 if (! cris_get_expression (&s
, &out_insnp
->expr
))
1635 if (out_insnp
->expr
.X_op
== O_constant
1636 && (out_insnp
->expr
.X_add_number
< 0
1637 || out_insnp
->expr
.X_add_number
> 31))
1638 as_bad (_("Immediate value not in 5 bit unsigned range: %ld"),
1639 out_insnp
->expr
.X_add_number
);
1641 out_insnp
->reloc
= BFD_RELOC_CRIS_UNSIGNED_5
;
1646 /* A 4-bit unsigned immediate in bits <3:0>. */
1647 if (! cris_get_expression (&s
, &out_insnp
->expr
))
1651 if (out_insnp
->expr
.X_op
== O_constant
1652 && (out_insnp
->expr
.X_add_number
< 0
1653 || out_insnp
->expr
.X_add_number
> 15))
1654 as_bad (_("Immediate value not in 4 bit unsigned range: %ld"),
1655 out_insnp
->expr
.X_add_number
);
1657 out_insnp
->reloc
= BFD_RELOC_CRIS_UNSIGNED_4
;
1661 /* For 'd', check for an optional ".d" or ".D" at the
1662 start of the operands, followed by a space character. */
1664 if (modified_char
== '.' && *s
== '.')
1666 if ((s
[1] != 'd' && s
[1] == 'D')
1667 || ! ISSPACE (s
[2]))
1675 /* General register in bits <15:12> and <3:0>. */
1676 if (! get_gen_reg (&s
, ®no
))
1680 out_insnp
->opcode
|= regno
/* << 0 */;
1681 out_insnp
->opcode
|= regno
<< 12;
1686 /* Flags from the condition code register. */
1690 if (! get_flags (&s
, &flags
))
1693 out_insnp
->opcode
|= ((flags
& 0xf0) << 8) | (flags
& 0xf);
1698 /* A 6-bit signed immediate in bits <5:0>. */
1699 if (! cris_get_expression (&s
, &out_insnp
->expr
))
1703 if (out_insnp
->expr
.X_op
== O_constant
1704 && (out_insnp
->expr
.X_add_number
< -32
1705 || out_insnp
->expr
.X_add_number
> 31))
1706 as_bad (_("Immediate value not in 6 bit range: %ld"),
1707 out_insnp
->expr
.X_add_number
);
1708 out_insnp
->reloc
= BFD_RELOC_CRIS_SIGNED_6
;
1713 /* A 6-bit unsigned immediate in bits <5:0>. */
1714 if (! cris_get_expression (&s
, &out_insnp
->expr
))
1718 if (out_insnp
->expr
.X_op
== O_constant
1719 && (out_insnp
->expr
.X_add_number
< 0
1720 || out_insnp
->expr
.X_add_number
> 63))
1721 as_bad (_("Immediate value not in 6 bit unsigned range: %ld"),
1722 out_insnp
->expr
.X_add_number
);
1723 out_insnp
->reloc
= BFD_RELOC_CRIS_UNSIGNED_6
;
1728 /* A size modifier, B, W or D, to be put in a bit position
1729 suitable for CLEAR instructions (i.e. reflecting a zero
1731 if (! get_bwd_size_modifier (&s
, &size_bits
))
1738 out_insnp
->opcode
|= 0 << 12;
1742 out_insnp
->opcode
|= 4 << 12;
1746 out_insnp
->opcode
|= 8 << 12;
1753 /* A size modifier, B, W or D, to be put in bits <5:4>. */
1754 if (modified_char
!= '.'
1755 || ! get_bwd_size_modifier (&s
, &size_bits
))
1759 out_insnp
->opcode
|= size_bits
<< 4;
1764 /* A branch expression. */
1765 if (! cris_get_expression (&s
, &out_insnp
->expr
))
1769 out_insnp
->insn_type
= CRIS_INSN_BRANCH
;
1774 /* A 8-bit quick BDAP expression, "expr,R". */
1775 if (! cris_get_expression (&s
, &out_insnp
->expr
))
1783 if (!get_gen_reg (&s
, ®no
))
1786 out_insnp
->opcode
|= regno
<< 12;
1787 out_insnp
->reloc
= BFD_RELOC_CRIS_SIGNED_8
;
1791 /* A BDAP expression for any size, "expr,R". */
1792 if (! cris_get_expression (&s
, &prefixp
->expr
))
1801 if (!get_gen_reg (&s
, &prefixp
->base_reg_number
))
1804 /* Since 'O' is used with an explicit bdap, we have no
1805 "real" instruction. */
1806 prefixp
->kind
= PREFIX_BDAP_IMM
;
1808 = BDAP_QUICK_OPCODE
| (prefixp
->base_reg_number
<< 12);
1810 out_insnp
->insn_type
= CRIS_INSN_NONE
;
1815 /* Special register in bits <15:12>. */
1816 if (! get_spec_reg (&s
, &out_insnp
->spec_reg
))
1820 /* Use of some special register names come with a
1821 specific warning. Note that we have no ".cpu type"
1822 pseudo yet, so some of this is just unused
1824 if (out_insnp
->spec_reg
->warning
)
1825 as_warn (out_insnp
->spec_reg
->warning
);
1826 else if (out_insnp
->spec_reg
->applicable_version
1827 == cris_ver_warning
)
1828 /* Others have a generic warning. */
1829 as_warn (_("Unimplemented register `%s' specified"),
1830 out_insnp
->spec_reg
->name
);
1833 |= out_insnp
->spec_reg
->number
<< 12;
1838 /* This character is used in the disassembler to
1839 recognize a prefix instruction to fold into the
1840 addressing mode for the next instruction. It is
1845 /* General register in bits <15:12>. */
1846 if (! get_gen_reg (&s
, ®no
))
1850 out_insnp
->opcode
|= regno
<< 12;
1855 /* General register in bits <3:0>. */
1856 if (! get_gen_reg (&s
, ®no
))
1860 out_insnp
->opcode
|= regno
/* << 0 */;
1865 /* Source operand in bit <10> and a prefix; a 3-operand
1867 if (! get_3op_or_dip_prefix_op (&s
, prefixp
))
1873 /* Source operand in bits <10>, <3:0> and optionally a
1874 prefix; i.e. an indirect operand or an side-effect
1875 prefix (where valid). */
1876 if (! get_autoinc_prefix_or_indir_op (&s
, prefixp
, &mode
,
1883 if (prefixp
->kind
!= PREFIX_NONE
)
1885 /* A prefix, so it has the autoincrement bit
1887 out_insnp
->opcode
|= (AUTOINCR_BIT
<< 8);
1891 /* No prefix. The "mode" variable contains bits like
1892 whether or not this is autoincrement mode. */
1893 out_insnp
->opcode
|= (mode
<< 10);
1895 /* If there was a reloc specifier, then it was
1896 attached to the prefix. Note that we can't check
1897 that the reloc size matches, since we don't have
1898 all the operands yet in all cases. */
1899 if (prefixp
->reloc
!= BFD_RELOC_NONE
)
1900 out_insnp
->reloc
= prefixp
->reloc
;
1903 out_insnp
->opcode
|= regno
/* << 0 */ ;
1909 /* Like 's', but immediate operand only. Also do not
1910 modify insn. There are no insns where an explicit reloc
1911 specifier makes sense. */
1912 if (cris_get_expression (&s
, &out_insnp
->expr
))
1920 /* Like 'N', but PC-relative to the start of the insn.
1921 There might be a :PLT to request a PLT entry. */
1922 if (cris_get_expression (&s
, &out_insnp
->expr
))
1925 out_insnp
->reloc
= BFD_RELOC_32_PCREL
;
1927 /* We have to adjust the expression, because that
1928 relocation is to the location *after* the
1929 relocation. So add 2 for the insn and 4 for the
1931 out_insnp
->expr
.X_add_number
+= 6;
1933 /* TLS specifiers do not make sense here. */
1934 if (pic
&& *s
== RELOC_SUFFIX_CHAR
)
1935 cris_get_reloc_suffix (&s
, &out_insnp
->reloc
,
1943 /* Maybe 'u', maybe 'n'. Only for LAPC/LAPCQ. */
1944 if (cris_get_expression (&s
, &out_insnp
->expr
))
1946 out_insnp
->reloc
= BFD_RELOC_CRIS_LAPCQ_OFFSET
;
1948 /* Define 1 as relaxing. */
1949 out_insnp
->expr
.X_md
= 1;
1955 /* Four PC-relative bits in <3:0> representing <4:1>:0 of
1956 an offset relative to the beginning of the current
1958 if (cris_get_expression (&s
, &out_insnp
->expr
))
1960 out_insnp
->reloc
= BFD_RELOC_CRIS_LAPCQ_OFFSET
;
1962 /* Define 0 as non-relaxing. */
1963 out_insnp
->expr
.X_md
= 0;
1965 /* We have to adjust the expression, because that
1966 relocation is to the location *after* the
1967 insn. So add 2 for the insn. */
1968 out_insnp
->expr
.X_add_number
+= 2;
1974 /* Rs.m in bits <15:12> and <5:4>. */
1975 if (! get_gen_reg (&s
, ®no
)
1976 || ! get_bwd_size_modifier (&s
, &size_bits
))
1980 out_insnp
->opcode
|= (regno
<< 12) | (size_bits
<< 4);
1985 /* Source operand in bits <10>, <3:0> and optionally a
1986 prefix; i.e. an indirect operand or an side-effect
1989 The difference to 's' is that this does not allow an
1990 "immediate" expression. */
1991 if (! get_autoinc_prefix_or_indir_op (&s
, prefixp
,
1999 if (prefixp
->kind
!= PREFIX_NONE
)
2001 /* A prefix, and those matched here always have
2002 side-effects (see 's' case). */
2003 out_insnp
->opcode
|= (AUTOINCR_BIT
<< 8);
2007 /* No prefix. The "mode" variable contains bits
2008 like whether or not this is autoincrement
2010 out_insnp
->opcode
|= (mode
<< 10);
2013 out_insnp
->opcode
|= regno
/* << 0 */;
2018 /* Size modifier (B or W) in bit <4>. */
2019 if (! get_bw_size_modifier (&s
, &size_bits
))
2023 out_insnp
->opcode
|= size_bits
<< 4;
2028 if (cris_arch
== arch_crisv32
2029 && get_sup_reg (&s
, ®no
))
2031 out_insnp
->opcode
|= regno
<< 12;
2040 /* We get here when we fail a match above or we found a
2041 complete match. Break out of this loop. */
2045 /* Was it a match or a miss? */
2048 /* If it's just that the args don't match, maybe the next
2049 item in the table is the same opcode but with
2050 matching operands. First skip any invalid ones. */
2051 while (instruction
[1].name
!= NULL
2052 && strcmp (instruction
->name
, instruction
[1].name
) == 0
2053 && ! cris_insn_ver_valid_for_arch (instruction
[1]
2054 .applicable_version
,
2058 if (instruction
[1].name
!= NULL
2059 && strcmp (instruction
->name
, instruction
[1].name
) == 0
2060 && cris_insn_ver_valid_for_arch (instruction
[1]
2061 .applicable_version
,
2064 /* Yep. Restart and try that one instead. */
2071 /* We've come to the end of instructions with this
2072 opcode, so it must be an error. */
2073 as_bad (_("Illegal operands"));
2075 /* As discard_rest_of_line, but without continuing to the
2077 while (!is_end_of_line
[(unsigned char) *input_line_pointer
])
2078 input_line_pointer
++;
2084 /* We have a match. Check if there's anything more to do. */
2087 /* There was an immediate mode operand, so we must check
2088 that it has an appropriate size. */
2089 switch (instruction
->imm_oprnd_size
)
2093 /* Shouldn't happen; this one does not have immediate
2094 operands with different sizes. */
2095 BAD_CASE (instruction
->imm_oprnd_size
);
2099 out_insnp
->imm_oprnd_size
= 4;
2103 if (cris_arch
== arch_crisv32
)
2104 /* All immediate loads of special registers are
2105 32-bit on CRISv32. */
2106 out_insnp
->imm_oprnd_size
= 4;
2108 switch (out_insnp
->spec_reg
->reg_size
)
2111 if (out_insnp
->expr
.X_op
== O_constant
2112 && (out_insnp
->expr
.X_add_number
< -128
2113 || out_insnp
->expr
.X_add_number
> 255))
2114 as_bad (_("Immediate value not in 8 bit range: %ld"),
2115 out_insnp
->expr
.X_add_number
);
2118 /* FIXME: We need an indicator in the instruction
2119 table to pass on, to indicate if we need to check
2120 overflow for a signed or unsigned number. */
2121 if (out_insnp
->expr
.X_op
== O_constant
2122 && (out_insnp
->expr
.X_add_number
< -32768
2123 || out_insnp
->expr
.X_add_number
> 65535))
2124 as_bad (_("Immediate value not in 16 bit range: %ld"),
2125 out_insnp
->expr
.X_add_number
);
2126 out_insnp
->imm_oprnd_size
= 2;
2130 out_insnp
->imm_oprnd_size
= 4;
2134 BAD_CASE (out_insnp
->spec_reg
->reg_size
);
2139 case SIZE_FIELD_SIGNED
:
2140 case SIZE_FIELD_UNSIGNED
:
2143 /* FIXME: Find way to pass un/signedness to
2144 caller, and set reloc type instead, postponing
2145 this check until cris_number_to_imm. That
2146 necessarily corrects the reloc type for the
2147 byte case, maybe requiring further changes. */
2149 if (out_insnp
->expr
.X_op
== O_constant
)
2151 if (instruction
->imm_oprnd_size
== SIZE_FIELD
2152 && (out_insnp
->expr
.X_add_number
< -128
2153 || out_insnp
->expr
.X_add_number
> 255))
2154 as_bad (_("Immediate value not in 8 bit range: %ld"),
2155 out_insnp
->expr
.X_add_number
);
2156 else if (instruction
->imm_oprnd_size
== SIZE_FIELD_SIGNED
2157 && (out_insnp
->expr
.X_add_number
< -128
2158 || out_insnp
->expr
.X_add_number
> 127))
2159 as_bad (_("Immediate value not in 8 bit signed range: %ld"),
2160 out_insnp
->expr
.X_add_number
);
2161 else if (instruction
->imm_oprnd_size
== SIZE_FIELD_UNSIGNED
2162 && (out_insnp
->expr
.X_add_number
< 0
2163 || out_insnp
->expr
.X_add_number
> 255))
2164 as_bad (_("Immediate value not in 8 bit unsigned range: %ld"),
2165 out_insnp
->expr
.X_add_number
);
2170 if (out_insnp
->expr
.X_op
== O_constant
)
2172 if (instruction
->imm_oprnd_size
== SIZE_FIELD
2173 && (out_insnp
->expr
.X_add_number
< -32768
2174 || out_insnp
->expr
.X_add_number
> 65535))
2175 as_bad (_("Immediate value not in 16 bit range: %ld"),
2176 out_insnp
->expr
.X_add_number
);
2177 else if (instruction
->imm_oprnd_size
== SIZE_FIELD_SIGNED
2178 && (out_insnp
->expr
.X_add_number
< -32768
2179 || out_insnp
->expr
.X_add_number
> 32767))
2180 as_bad (_("Immediate value not in 16 bit signed range: %ld"),
2181 out_insnp
->expr
.X_add_number
);
2182 else if (instruction
->imm_oprnd_size
== SIZE_FIELD_UNSIGNED
2183 && (out_insnp
->expr
.X_add_number
< 0
2184 || out_insnp
->expr
.X_add_number
> 65535))
2185 as_bad (_("Immediate value not in 16 bit unsigned range: %ld"),
2186 out_insnp
->expr
.X_add_number
);
2188 out_insnp
->imm_oprnd_size
= 2;
2192 out_insnp
->imm_oprnd_size
= 4;
2196 BAD_CASE (out_insnp
->spec_reg
->reg_size
);
2200 /* If there was a relocation specified for the immediate
2201 expression (i.e. it had a PIC or TLS modifier) check that the
2202 size of the relocation matches the size specified by
2204 if (out_insnp
->reloc
!= BFD_RELOC_NONE
2205 && (cris_get_specified_reloc_size (out_insnp
->reloc
)
2206 != (unsigned int) out_insnp
->imm_oprnd_size
))
2207 as_bad (out_insnp
->reloc
== BFD_RELOC_CRIS_32_GD
2208 || out_insnp
->reloc
== BFD_RELOC_CRIS_32_TPREL
2209 || out_insnp
->reloc
== BFD_RELOC_CRIS_16_TPREL
2210 ? _("TLS relocation size does not match operand size")
2211 : _("PIC relocation size does not match operand size"));
2213 else if (instruction
->op
== cris_muls_op
2214 || instruction
->op
== cris_mulu_op
)
2215 out_insnp
->insn_type
= CRIS_INSN_MUL
;
2221 /* Get a B, W, or D size modifier from the string pointed out by *cPP,
2222 which must point to a '.' in front of the modifier. On successful
2223 return, *cPP is advanced to the character following the size
2224 modifier, and is undefined otherwise.
2226 cPP Pointer to pointer to string starting
2227 with the size modifier.
2229 size_bitsp Pointer to variable to contain the size bits on
2232 Return 1 iff a correct size modifier is found, else 0. */
2235 get_bwd_size_modifier (char **cPP
, int *size_bitsp
)
2241 /* Consume the '.'. */
2265 /* Consume the size letter. */
2271 /* Get a B or W size modifier from the string pointed out by *cPP,
2272 which must point to a '.' in front of the modifier. On successful
2273 return, *cPP is advanced to the character following the size
2274 modifier, and is undefined otherwise.
2276 cPP Pointer to pointer to string starting
2277 with the size modifier.
2279 size_bitsp Pointer to variable to contain the size bits on
2282 Return 1 iff a correct size modifier is found, else 0. */
2285 get_bw_size_modifier (char **cPP
, int *size_bitsp
)
2291 /* Consume the '.'. */
2310 /* Consume the size letter. */
2316 /* Get a general register from the string pointed out by *cPP. The
2317 variable *cPP is advanced to the character following the general
2318 register name on a successful return, and has its initial position
2321 cPP Pointer to pointer to string, beginning with a general
2324 regnop Pointer to int containing the register number.
2326 Return 1 iff a correct general register designator is found,
2330 get_gen_reg (char **cPP
, int *regnop
)
2335 /* Handle a sometimes-mandatory dollar sign as register prefix. */
2336 if (**cPP
== REGISTER_PREFIX_CHAR
)
2338 else if (demand_register_prefix
)
2345 /* "P" as in "PC"? Consume the "P". */
2348 if ((**cPP
== 'C' || **cPP
== 'c')
2349 && ! ISALNUM ((*cPP
)[1])
2350 /* Here's a little twist: For v32 and the compatibility mode,
2351 we only recognize PC as a register number if there's '+]'
2352 after. We don't consume that, but the presence can only be
2353 valid after a register in a post-increment context, which
2354 is also the only valid context for PC as a register for
2355 v32. Not that it's used very often, but saying "MOVE.D
2356 [PC+],R5" should remain valid. It's not supported for
2357 jump-type insns or other insns with no [Rn+] mode, though. */
2358 && ((cris_arch
!= arch_crisv32
2359 && cris_arch
!= arch_cris_common_v10_v32
)
2360 || ((*cPP
)[1] == '+' && (*cPP
)[2] == ']')))
2362 /* It's "PC": consume the "c" and we're done. */
2369 /* Like with PC, we recognize ACR, but only if it's *not* followed
2370 by '+', and only for v32. */
2373 if (cris_arch
!= arch_crisv32
2374 || ((*cPP
)[1] != 'c' && (*cPP
)[1] != 'C')
2375 || ((*cPP
)[2] != 'r' && (*cPP
)[2] != 'R')
2376 || ISALNUM ((*cPP
)[3])
2377 || (*cPP
)[3] == '+')
2385 /* Hopefully r[0-9] or r1[0-5]. Consume 'R' or 'r'. */
2388 if (ISDIGIT (**cPP
))
2390 /* It's r[0-9]. Consume and check the next digit. */
2391 *regnop
= **cPP
- '0';
2394 if (! ISALNUM (**cPP
))
2396 /* No more digits, we're done. */
2401 /* One more digit. Consume and add. */
2402 *regnop
= *regnop
* 10 + (**cPP
- '0');
2404 /* We need to check for a valid register number; Rn,
2405 0 <= n <= MAX_REG. */
2406 if (*regnop
<= MAX_REG
)
2408 /* Consume second digit. */
2418 /* "S" as in "SP"? Consume the "S". */
2420 if (**cPP
== 'P' || **cPP
== 'p')
2422 /* It's "SP": consume the "p" and we're done. */
2430 /* Just here to silence compilation warnings. */
2434 /* We get here if we fail. Restore the pointer. */
2439 /* Get a special register from the string pointed out by *cPP. The
2440 variable *cPP is advanced to the character following the special
2441 register name if one is found, and retains its original position
2444 cPP Pointer to pointer to string starting with a special register
2447 sregpp Pointer to Pointer to struct spec_reg, where a pointer to the
2448 register description will be stored.
2450 Return 1 iff a correct special register name is found. */
2453 get_spec_reg (char **cPP
, const struct cris_spec_reg
**sregpp
)
2457 char *name_begin
= *cPP
;
2459 const struct cris_spec_reg
*sregp
;
2461 /* Handle a sometimes-mandatory dollar sign as register prefix. */
2462 if (*name_begin
== REGISTER_PREFIX_CHAR
)
2464 else if (demand_register_prefix
)
2467 /* Loop over all special registers. */
2468 for (sregp
= cris_spec_regs
; sregp
->name
!= NULL
; sregp
++)
2470 /* Start over from beginning of the supposed name. */
2474 while (*s2
!= '\0' && TOLOWER (*s1
) == *s2
)
2480 /* For a match, we must have consumed the name in the table, and we
2481 must be outside what could be part of a name. Assume here that a
2482 test for alphanumerics is sufficient for a name test. */
2483 if (*s2
== 0 && ! ISALNUM (*s1
)
2484 && cris_insn_ver_valid_for_arch (sregp
->applicable_version
,
2487 /* We have a match. Update the pointer and be done. */
2494 /* If we got here, we did not find any name. */
2498 /* Get a support register from the string pointed out by *cPP. The
2499 variable *cPP is advanced to the character following the support-
2500 register name if one is found, and retains its original position
2503 cPP Pointer to pointer to string starting with a support-register
2506 sregpp Pointer to int containing the register number.
2508 Return 1 iff a correct support-register name is found. */
2511 get_sup_reg (char **cPP
, int *regnop
)
2515 char *name_begin
= *cPP
;
2517 const struct cris_support_reg
*sregp
;
2519 /* Handle a sometimes-mandatory dollar sign as register prefix. */
2520 if (*name_begin
== REGISTER_PREFIX_CHAR
)
2522 else if (demand_register_prefix
)
2525 /* Loop over all support-registers. */
2526 for (sregp
= cris_support_regs
; sregp
->name
!= NULL
; sregp
++)
2528 /* Start over from beginning of the supposed name. */
2532 while (*s2
!= '\0' && TOLOWER (*s1
) == *s2
)
2538 /* For a match, we must have consumed the name in the table, and we
2539 must be outside what could be part of a name. Assume here that a
2540 test for alphanumerics is sufficient for a name test. */
2541 if (*s2
== 0 && ! ISALNUM (*s1
))
2543 /* We have a match. Update the pointer and be done. */
2545 *regnop
= sregp
->number
;
2550 /* If we got here, we did not find any name. */
2554 /* Get an unprefixed or side-effect-prefix operand from the string pointed
2555 out by *cPP. The pointer *cPP is advanced to the character following
2556 the indirect operand if we have success, else it contains an undefined
2559 cPP Pointer to pointer to string beginning with the first
2560 character of the supposed operand.
2562 prefixp Pointer to structure containing an optional instruction
2565 is_autoincp Pointer to int indicating the indirect or autoincrement
2568 src_regnop Pointer to int containing the source register number in
2571 imm_foundp Pointer to an int indicating if an immediate expression
2574 imm_exprP Pointer to a structure containing an immediate
2575 expression, if success and if *imm_foundp is nonzero.
2577 Return 1 iff a correct indirect operand is found. */
2580 get_autoinc_prefix_or_indir_op (char **cPP
, struct cris_prefix
*prefixp
,
2581 int *is_autoincp
, int *src_regnop
,
2582 int *imm_foundp
, expressionS
*imm_exprP
)
2584 /* Assume there was no immediate mode expression. */
2589 /* So this operand is one of:
2591 Autoincrement: [rN+]
2592 Indexed with assign: [rN=rM+rO.S]
2593 Offset with assign: [rN=rM+I], [rN=rM+[rO].s], [rN=rM+[rO+].s]
2595 Either way, consume the '['. */
2598 /* Get the rN register. */
2599 if (! get_gen_reg (cPP
, src_regnop
))
2600 /* If there was no register, then this cannot match. */
2604 /* We got the register, now check the next character. */
2608 /* Indirect mode. We're done here. */
2609 prefixp
->kind
= PREFIX_NONE
;
2614 /* This must be an auto-increment mode, if there's a
2616 prefixp
->kind
= PREFIX_NONE
;
2619 /* We consume this character and break out to check the
2625 /* This must be indexed with assign, or offset with assign
2626 to match. Not supported for crisv32 or in
2627 compatibility mode. */
2628 if (cris_arch
== arch_crisv32
2629 || cris_arch
== arch_cris_common_v10_v32
)
2634 /* Either way, the next thing must be a register. */
2635 if (! get_gen_reg (cPP
, &prefixp
->base_reg_number
))
2636 /* No register, no match. */
2640 /* We've consumed "[rN=rM", so we must be looking at
2641 "+rO.s]" or "+I]", or "-I]", or "+[rO].s]" or
2645 int index_reg_number
;
2651 /* This must be [rx=ry+[rz].s] or
2652 [rx=ry+[rz+].s] or no match. We must be
2653 looking at rz after consuming the '['. */
2656 if (!get_gen_reg (cPP
, &index_reg_number
))
2659 prefixp
->kind
= PREFIX_BDAP
;
2661 = (BDAP_INDIR_OPCODE
2662 + (prefixp
->base_reg_number
<< 12)
2663 + index_reg_number
);
2667 /* We've seen "[rx=ry+[rz+" here, so now we
2668 know that there must be "].s]" left to
2671 prefixp
->opcode
|= AUTOINCR_BIT
<< 8;
2674 /* If it wasn't autoincrement, we don't need to
2677 /* Check the next-to-last ']'. */
2683 /* Check the ".s" modifier. */
2684 if (! get_bwd_size_modifier (cPP
, &size_bits
))
2687 prefixp
->opcode
|= size_bits
<< 4;
2689 /* Now we got [rx=ry+[rz+].s or [rx=ry+[rz].s.
2690 We break out to check the final ']'. */
2693 /* It wasn't an indirection. Check if it's a
2695 else if (get_gen_reg (cPP
, &index_reg_number
))
2699 /* Indexed with assign mode: "[rN+rM.S]". */
2700 prefixp
->kind
= PREFIX_BIAP
;
2702 = (BIAP_OPCODE
+ (index_reg_number
<< 12)
2703 + prefixp
->base_reg_number
/* << 0 */);
2705 if (! get_bwd_size_modifier (cPP
, &size_bits
))
2706 /* Size missing, this isn't a match. */
2710 /* Size found, break out to check the
2712 prefixp
->opcode
|= size_bits
<< 4;
2716 /* Not a register. Then this must be "[rN+I]". */
2717 else if (cris_get_expression (cPP
, &prefixp
->expr
))
2719 /* We've got offset with assign mode. Fill
2720 in the blanks and break out to match the
2722 prefixp
->kind
= PREFIX_BDAP_IMM
;
2724 /* We tentatively put an opcode corresponding to
2725 a 32-bit operand here, although it may be
2726 relaxed when there's no relocation
2727 specifier for the operand. */
2729 = (BDAP_INDIR_OPCODE
2730 | (prefixp
->base_reg_number
<< 12)
2731 | (AUTOINCR_BIT
<< 8)
2733 | REG_PC
/* << 0 */);
2735 /* This can have a PIC suffix, specifying reloc
2737 if ((pic
|| tls
) && **cPP
== RELOC_SUFFIX_CHAR
)
2739 unsigned int relocsize
;
2741 cris_get_reloc_suffix (cPP
, &prefixp
->reloc
,
2744 /* Tweak the size of the immediate operand
2745 in the prefix opcode if it isn't what we
2748 = cris_get_specified_reloc_size (prefixp
->reloc
);
2751 = ((prefixp
->opcode
& ~(3 << 4))
2752 | ((relocsize
>> 1) << 4));
2757 /* Neither register nor expression found, so
2758 this can't be a match. */
2761 /* Not "[rN+" but perhaps "[rN-"? */
2762 else if (**cPP
== '-')
2764 /* We must have an offset with assign mode. */
2765 if (! cris_get_expression (cPP
, &prefixp
->expr
))
2766 /* No expression, no match. */
2770 /* We've got offset with assign mode. Fill
2771 in the blanks and break out to match the
2774 Note that we don't allow a relocation
2775 suffix for an operand with a minus
2777 prefixp
->kind
= PREFIX_BDAP_IMM
;
2782 /* Neither '+' nor '-' after "[rN=rM". Lose. */
2786 /* Neither ']' nor '+' nor '=' after "[rN". Lose. */
2791 /* When we get here, we have a match and will just check the closing
2792 ']'. We can still fail though. */
2797 /* Don't forget to consume the final ']'.
2798 Then return in glory. */
2803 /* No indirection. Perhaps a constant? */
2804 else if (cris_get_expression (cPP
, imm_exprP
))
2806 /* Expression found, this is immediate mode. */
2807 prefixp
->kind
= PREFIX_NONE
;
2809 *src_regnop
= REG_PC
;
2812 /* This can have a PIC suffix, specifying reloc type to use. The
2813 caller must check that the reloc size matches the operand size. */
2814 if ((pic
|| tls
) && **cPP
== RELOC_SUFFIX_CHAR
)
2815 cris_get_reloc_suffix (cPP
, &prefixp
->reloc
, imm_exprP
);
2820 /* No luck today. */
2824 /* This function gets an indirect operand in a three-address operand
2825 combination from the string pointed out by *cPP. The pointer *cPP is
2826 advanced to the character following the indirect operand on success, or
2827 has an unspecified value on failure.
2829 cPP Pointer to pointer to string beginning
2832 prefixp Pointer to structure containing an
2835 Returns 1 iff a correct indirect operand is found. */
2838 get_3op_or_dip_prefix_op (char **cPP
, struct cris_prefix
*prefixp
)
2843 /* We must have a '[' or it's a clean failure. */
2846 /* Eat the first '['. */
2851 /* A second '[', so this must be double-indirect mode. */
2853 prefixp
->kind
= PREFIX_DIP
;
2854 prefixp
->opcode
= DIP_OPCODE
;
2856 /* Get the register or fail entirely. */
2857 if (! get_gen_reg (cPP
, ®_number
))
2861 prefixp
->opcode
|= reg_number
/* << 0 */ ;
2864 /* Since we found a '+', this must be double-indirect
2865 autoincrement mode. */
2867 prefixp
->opcode
|= AUTOINCR_BIT
<< 8;
2870 /* There's nothing particular to do, if this was a
2871 double-indirect *without* autoincrement. */
2874 /* Check the first ']'. The second one is checked at the end. */
2878 /* Eat the first ']', so we'll be looking at a second ']'. */
2881 /* No second '['. Then we should have a register here, making
2883 else if (get_gen_reg (cPP
, &prefixp
->base_reg_number
))
2885 /* This must be indexed or offset mode: "[rN+I]" or
2886 "[rN+rM.S]" or "[rN+[rM].S]" or "[rN+[rM+].S]". */
2889 int index_reg_number
;
2895 /* This is "[rx+["... Expect a register next. */
2899 if (!get_gen_reg (cPP
, &index_reg_number
))
2902 prefixp
->kind
= PREFIX_BDAP
;
2904 = (BDAP_INDIR_OPCODE
2905 + (prefixp
->base_reg_number
<< 12)
2906 + index_reg_number
);
2908 /* We've seen "[rx+[ry", so check if this is
2912 /* Yep, now at "[rx+[ry+". */
2914 prefixp
->opcode
|= AUTOINCR_BIT
<< 8;
2916 /* If it wasn't autoincrement, we don't need to
2919 /* Check a first closing ']': "[rx+[ry]" or
2925 /* Now expect a size modifier ".S". */
2926 if (! get_bwd_size_modifier (cPP
, &size_bits
))
2929 prefixp
->opcode
|= size_bits
<< 4;
2931 /* Ok, all interesting stuff has been seen:
2932 "[rx+[ry+].S" or "[rx+[ry].S". We only need to
2933 expect a final ']', which we'll do in a common
2936 /* Seen "[rN+", but not a '[', so check if we have a
2938 else if (get_gen_reg (cPP
, &index_reg_number
))
2940 /* This is indexed mode: "[rN+rM.S]" or
2943 prefixp
->kind
= PREFIX_BIAP
;
2946 | prefixp
->base_reg_number
/* << 0 */
2947 | (index_reg_number
<< 12));
2949 /* Consume the ".S". */
2950 if (! get_bwd_size_modifier (cPP
, &size_bits
))
2951 /* Missing size, so fail. */
2954 /* Size found. Add that piece and drop down to
2955 the common checking of the closing ']'. */
2956 prefixp
->opcode
|= size_bits
<< 4;
2958 /* Seen "[rN+", but not a '[' or a register, so then
2959 it must be a constant "I".
2961 As a quality of implementation improvement, we check for a
2962 closing ']', like in an erroneous "[rN+]". If we don't,
2963 the expression parser will emit a confusing "bad
2964 expression" when it sees the ']', probably because it
2965 doesn't like seeing no expression. */
2966 else if (**cPP
!= ']' && cris_get_expression (cPP
, &prefixp
->expr
))
2968 /* Expression found, so fill in the bits of offset
2969 mode and drop down to check the closing ']'. */
2970 prefixp
->kind
= PREFIX_BDAP_IMM
;
2972 /* We tentatively put an opcode corresponding to a 32-bit
2973 operand here, although it may be relaxed when there's no
2974 PIC specifier for the operand. */
2976 = (BDAP_INDIR_OPCODE
2977 | (prefixp
->base_reg_number
<< 12)
2978 | (AUTOINCR_BIT
<< 8)
2980 | REG_PC
/* << 0 */);
2982 /* This can have a PIC suffix, specifying reloc type to use. */
2983 if ((pic
|| tls
) && **cPP
== RELOC_SUFFIX_CHAR
)
2985 unsigned int relocsize
;
2987 cris_get_reloc_suffix (cPP
, &prefixp
->reloc
, &prefixp
->expr
);
2989 /* Tweak the size of the immediate operand in the prefix
2990 opcode if it isn't what we set. */
2991 relocsize
= cris_get_specified_reloc_size (prefixp
->reloc
);
2994 = ((prefixp
->opcode
& ~(3 << 4))
2995 | ((relocsize
>> 1) << 4));
2999 /* Nothing valid here: lose. */
3002 /* Seen "[rN" but no '+', so check if it's a '-'. */
3003 else if (**cPP
== '-')
3005 /* Yep, we must have offset mode. */
3006 if (! cris_get_expression (cPP
, &prefixp
->expr
))
3007 /* No expression, so we lose. */
3011 /* Expression found to make this offset mode, so
3012 fill those bits and drop down to check the
3015 Note that we don't allow a PIC suffix for
3016 an operand with a minus sign like this. */
3017 prefixp
->kind
= PREFIX_BDAP_IMM
;
3022 /* We've seen "[rN", but not '+' or '-'; rather a ']'.
3023 Hmm. Normally this is a simple indirect mode that we
3024 shouldn't match, but if we expect ']', then we have a
3025 zero offset, so it can be a three-address-operand,
3026 like "[rN],rO,rP", thus offset mode.
3028 Don't eat the ']', that will be done in the closing
3030 prefixp
->expr
.X_op
= O_constant
;
3031 prefixp
->expr
.X_add_number
= 0;
3032 prefixp
->expr
.X_add_symbol
= NULL
;
3033 prefixp
->expr
.X_op_symbol
= NULL
;
3034 prefixp
->kind
= PREFIX_BDAP_IMM
;
3037 /* A '[', but no second '[', and no register. Check if we
3038 have an expression, making this "[I]" for a double-indirect
3040 else if (cris_get_expression (cPP
, &prefixp
->expr
))
3042 /* Expression found, the so called absolute mode for a
3043 double-indirect prefix on PC. */
3044 prefixp
->kind
= PREFIX_DIP
;
3045 prefixp
->opcode
= DIP_OPCODE
| (AUTOINCR_BIT
<< 8) | REG_PC
;
3046 prefixp
->reloc
= BFD_RELOC_32
;
3049 /* Neither '[' nor register nor expression. We lose. */
3052 /* We get here as a closing ceremony to a successful match. We just
3053 need to check the closing ']'. */
3055 /* Oops. Close but no air-polluter. */
3058 /* Don't forget to consume that ']', before returning in glory. */
3063 /* Get an expression from the string pointed out by *cPP.
3064 The pointer *cPP is advanced to the character following the expression
3065 on a success, or retains its original value otherwise.
3067 cPP Pointer to pointer to string beginning with the expression.
3069 exprP Pointer to structure containing the expression.
3071 Return 1 iff a correct expression is found. */
3074 cris_get_expression (char **cPP
, expressionS
*exprP
)
3076 char *saved_input_line_pointer
;
3079 /* The "expression" function expects to find an expression at the
3080 global variable input_line_pointer, so we have to save it to give
3081 the impression that we don't fiddle with global variables. */
3082 saved_input_line_pointer
= input_line_pointer
;
3083 input_line_pointer
= *cPP
;
3085 /* Avoid a common error, confusing addressing modes. Beware that the
3086 call to expression below does not signal that error; it treats []
3087 as parentheses, unless #define NEED_INDEX_OPERATOR in which case it
3088 gives them other confusing semantics rather than plain outlawing
3089 them, which is what we want. */
3090 if (*input_line_pointer
== '[')
3092 input_line_pointer
= saved_input_line_pointer
;
3096 exp
= expression (exprP
);
3097 if (exprP
->X_op
== O_illegal
|| exprP
->X_op
== O_absent
)
3099 input_line_pointer
= saved_input_line_pointer
;
3103 /* Everything seems to be fine, just restore the global
3104 input_line_pointer and say we're successful. */
3105 *cPP
= input_line_pointer
;
3106 input_line_pointer
= saved_input_line_pointer
;
3110 /* Get a sequence of flag characters from *spp. The pointer *cPP is
3111 advanced to the character following the expression. The flag
3112 characters are consecutive, no commas or spaces.
3114 cPP Pointer to pointer to string beginning with the expression.
3116 flagp Pointer to int to return the flags expression.
3118 Return 1 iff a correct flags expression is found. */
3121 get_flags (char **cPP
, int *flagsp
)
3129 if (! cris_insn_ver_valid_for_arch (cris_ver_v0_3
,
3137 if (! cris_insn_ver_valid_for_arch (cris_ver_v8_10
,
3145 if (! cris_insn_ver_valid_for_arch (cris_ver_v0_3
,
3153 if (! cris_insn_ver_valid_for_arch (cris_ver_v8_10
,
3161 if (! cris_insn_ver_valid_for_arch (cris_ver_v32p
,
3169 if (! cris_insn_ver_valid_for_arch (cris_ver_v32p
,
3206 /* We consider this successful if we stop at a comma or
3207 whitespace. Anything else, and we consider it a failure. */
3210 && ! ISSPACE (**cPP
))
3216 /* Don't forget to consume each flag character. */
3221 /* Generate code and fixes for a BDAP prefix.
3222 For v32, this handles ADDOQ because thankfully the opcodes are the
3225 base_regno Int containing the base register number.
3227 exprP Pointer to structure containing the offset expression. */
3230 gen_bdap (int base_regno
, expressionS
*exprP
)
3232 unsigned int opcode
;
3235 /* Put out the prefix opcode; assume quick immediate mode at first. */
3236 opcode
= BDAP_QUICK_OPCODE
| (base_regno
<< 12);
3237 opcodep
= cris_insn_first_word_frag ();
3238 md_number_to_chars (opcodep
, opcode
, 2);
3240 if (exprP
->X_op
== O_constant
)
3242 /* We have an absolute expression that we know the size of right
3247 value
= exprP
->X_add_number
;
3248 if (value
< -32768 || value
> 32767)
3249 /* Outside range for a "word", make it a dword. */
3252 /* Assume "word" size. */
3255 /* If this is a signed-byte value, we can fit it into the prefix
3257 if (value
>= -128 && value
<= 127)
3261 /* This is a word or dword displacement, which will be put in a
3262 word or dword after the prefix. */
3265 opcodep
[0] = BDAP_PC_LOW
+ (size
<< 4);
3267 opcodep
[1] |= BDAP_INCR_HIGH
;
3268 p
= frag_more (1 << size
);
3269 md_number_to_chars (p
, value
, 1 << size
);
3274 /* Handle complex expressions. */
3276 = SIMPLE_EXPR (exprP
) ? exprP
->X_add_number
: 0;
3278 = (SIMPLE_EXPR (exprP
)
3279 ? exprP
->X_add_symbol
: make_expr_symbol (exprP
));
3281 /* The expression is not defined yet but may become absolute. We
3282 make it a relocation to be relaxed. */
3283 frag_var (rs_machine_dependent
, 4, 0,
3284 ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX
, STATE_UNDF
),
3285 sym
, addvalue
, opcodep
);
3289 /* Encode a branch displacement in the range -256..254 into the form used
3290 by CRIS conditional branch instructions.
3292 offset The displacement value in bytes. */
3295 branch_disp (int offset
)
3299 /* Adjust all short branch offsets here. */
3300 if (cris_arch
== arch_crisv32
|| cris_arch
== arch_cris_common_v10_v32
)
3303 disp
= offset
& 0xFE;
3311 /* Generate code and fixes for a 32-bit conditional branch instruction
3312 created by "extending" an existing 8-bit branch instruction.
3314 opcodep Pointer to the word containing the original 8-bit branch
3317 writep Pointer to "extension area" following the first instruction
3320 fragP Pointer to the frag containing the instruction.
3322 add_symP, Parts of the destination address expression.
3327 gen_cond_branch_32 (char *opcodep
, char *writep
, fragS
*fragP
,
3328 symbolS
*add_symP
, symbolS
*sub_symP
, long int add_num
)
3334 if (cris_arch
== arch_crisv32
)
3336 nop_opcode
= NOP_OPCODE_V32
;
3338 branch_offset
= -2 - 8;
3342 nop_opcode
= NOP_OPCODE
;
3344 branch_offset
= -2 - 8;
3348 nop_opcode
= NOP_OPCODE
;
3350 branch_offset
= -2 - 6;
3353 /* We should never get here for compatibility mode. */
3354 if (cris_arch
== arch_cris_common_v10_v32
)
3355 as_fatal (_("Calling gen_cond_branch_32 for .arch common_v10_v32\n"));
3357 if (warn_for_branch_expansion
)
3358 as_warn_where (fragP
->fr_file
, fragP
->fr_line
,
3359 _("32-bit conditional branch generated"));
3361 /* Here, writep points to what will be opcodep + 2. First, we change
3362 the actual branch in opcodep[0] and opcodep[1], so that in the
3363 final insn, it will look like:
3366 This means we don't have to worry about changing the opcode or
3367 messing with the delay-slot instruction. So, we move it to last in
3368 the "extended" branch, and just change the displacement. Admittedly,
3369 it's not the optimal extended construct, but we should get this
3370 rarely enough that it shouldn't matter. */
3372 writep
[opc_offset
] = branch_disp (branch_offset
);
3373 writep
[opc_offset
+ 1] = opcodep
[1];
3375 /* Then, we change the branch to an unconditional branch over the
3376 extended part, to the new location of the Bcc:
3380 Note that these two writes are to currently different locations,
3383 md_number_to_chars (opcodep
, BA_QUICK_OPCODE
3384 + (cris_arch
== arch_crisv32
? 12 : (pic
? 10 : 8)),
3386 md_number_to_chars (writep
, nop_opcode
, 2);
3388 /* Then the extended thing, the 32-bit jump insn.
3389 opcodep+4: JUMP [PC+]
3390 or, in the PIC case,
3391 opcodep+4: MOVE [PC=PC+N],P0. */
3393 md_number_to_chars (writep
+ 2,
3394 cris_arch
== arch_crisv32
3396 : (pic
? MOVE_PC_INCR_OPCODE_PREFIX
3397 : JUMP_PC_INCR_OPCODE
), 2);
3399 /* We have to fill in the actual value too.
3401 This is most probably an expression, but we can cope with an absolute
3402 value too. FIXME: Testcase needed with and without pic. */
3404 if (add_symP
== NULL
&& sub_symP
== NULL
)
3406 /* An absolute address. */
3407 if (pic
|| cris_arch
== arch_crisv32
)
3408 fix_new (fragP
, writep
+ 4 - fragP
->fr_literal
, 4,
3409 section_symbol (absolute_section
),
3411 + (cris_arch
== arch_crisv32
? 6 : 0),
3412 1, BFD_RELOC_32_PCREL
);
3414 md_number_to_chars (writep
+ 4, add_num
, 4);
3418 if (sub_symP
!= NULL
)
3419 as_bad_where (fragP
->fr_file
, fragP
->fr_line
,
3420 _("Complex expression not supported"));
3422 /* Not absolute, we have to make it a frag for later evaluation. */
3423 fix_new (fragP
, writep
+ 4 - fragP
->fr_literal
, 4, add_symP
,
3424 add_num
+ (cris_arch
== arch_crisv32
? 6 : 0),
3425 pic
|| cris_arch
== arch_crisv32
? 1 : 0,
3426 pic
|| cris_arch
== arch_crisv32
3427 ? BFD_RELOC_32_PCREL
: BFD_RELOC_32
);
3430 if (cris_arch
== arch_crisv32
)
3431 /* Follow it with a "NOP" for CRISv32. */
3432 md_number_to_chars (writep
+ 8, NOP_OPCODE_V32
, 2);
3434 /* ...and the rest of the move-opcode for pre-v32 PIC. */
3435 md_number_to_chars (writep
+ 8, MOVE_PC_INCR_OPCODE_SUFFIX
, 2);
3438 /* Get the size of an immediate-reloc in bytes. Only valid for
3439 specified relocs (TLS, PIC). */
3442 cris_get_specified_reloc_size (bfd_reloc_code_real_type reloc
)
3445 reloc
== BFD_RELOC_CRIS_16_GOTPLT
3446 || reloc
== BFD_RELOC_CRIS_16_GOT
3447 || reloc
== BFD_RELOC_CRIS_16_GOT_GD
3448 || reloc
== BFD_RELOC_CRIS_16_DTPREL
3449 || reloc
== BFD_RELOC_CRIS_16_GOT_TPREL
3450 || reloc
== BFD_RELOC_CRIS_16_TPREL
3454 /* Store a reloc type at *RELOCP corresponding to the PIC suffix at *CPP.
3455 Adjust *EXPRP with any addend found after the PIC suffix. */
3458 cris_get_reloc_suffix (char **cPP
, bfd_reloc_code_real_type
*relocp
,
3463 expressionS const_expr
;
3465 const struct pic_suffixes_struct
3467 const char *const suffix
;
3469 bfd_reloc_code_real_type reloc
;
3475 #define PICMAP(s, r) {s, sizeof (s) - 1, r, TRUE, FALSE}
3476 #define PICTLSMAP(s, r) {s, sizeof (s) - 1, r, TRUE, TRUE}
3477 #define TLSMAP(s, r) {s, sizeof (s) - 1, r, FALSE, TRUE}
3478 /* Keep this in order with longest unambiguous prefix first. */
3479 PICMAP ("GOTPLT16", BFD_RELOC_CRIS_16_GOTPLT
),
3480 PICMAP ("GOTPLT", BFD_RELOC_CRIS_32_GOTPLT
),
3481 PICMAP ("PLTG", BFD_RELOC_CRIS_32_PLT_GOTREL
),
3482 PICMAP ("PLT", BFD_RELOC_CRIS_32_PLT_PCREL
),
3483 PICMAP ("GOTOFF", BFD_RELOC_CRIS_32_GOTREL
),
3484 PICMAP ("GOT16", BFD_RELOC_CRIS_16_GOT
),
3485 PICMAP ("GOT", BFD_RELOC_CRIS_32_GOT
),
3486 PICTLSMAP ("GDGOTREL16", BFD_RELOC_CRIS_16_GOT_GD
),
3487 PICTLSMAP ("GDGOTREL", BFD_RELOC_CRIS_32_GOT_GD
),
3488 TLSMAP ("GD", BFD_RELOC_CRIS_32_GD
),
3489 PICTLSMAP ("DTPREL16", BFD_RELOC_CRIS_16_DTPREL
),
3490 PICTLSMAP ("DTPREL", BFD_RELOC_CRIS_32_DTPREL
),
3491 PICTLSMAP ("TPOFFGOT16", BFD_RELOC_CRIS_16_GOT_TPREL
),
3492 PICTLSMAP ("TPOFFGOT", BFD_RELOC_CRIS_32_GOT_TPREL
),
3493 TLSMAP ("TPOFF16", BFD_RELOC_CRIS_16_TPREL
),
3494 TLSMAP ("TPOFF", BFD_RELOC_CRIS_32_TPREL
)
3497 /* We've already seen the ':', so consume it. */
3500 for (i
= 0; i
< sizeof (pic_suffixes
)/sizeof (pic_suffixes
[0]); i
++)
3502 if (strncmp (s
, pic_suffixes
[i
].suffix
, pic_suffixes
[i
].len
) == 0
3503 && ! is_part_of_name (s
[pic_suffixes
[i
].len
])
3504 /* PIC and non-PIC relocations are exclusive. */
3505 && (pic
!= 0) == (pic_suffixes
[i
].pic_p
!= 0)
3506 /* But TLS can be active for non-TLS relocations too. */
3507 && (pic_suffixes
[i
].tls_p
== 0 || tls
))
3509 /* We have a match. Consume the suffix and set the relocation
3511 s
+= pic_suffixes
[i
].len
;
3513 /* There can be a constant term appended. If so, we will add it
3515 if (*s
== '+' || *s
== '-')
3517 if (! cris_get_expression (&s
, &const_expr
))
3518 /* There was some kind of syntax error. Bail out. */
3521 /* Allow complex expressions as the constant part. It still
3522 has to be an assembly-time constant or there will be an
3523 error emitting the reloc. This makes the PIC qualifiers
3524 idempotent; foo:GOTOFF+32 == foo+32:GOTOFF. The former we
3525 recognize here; the latter is parsed in the incoming
3527 exprP
->X_add_symbol
= make_expr_symbol (exprP
);
3528 exprP
->X_op
= O_add
;
3529 exprP
->X_add_number
= 0;
3530 exprP
->X_op_symbol
= make_expr_symbol (&const_expr
);
3533 *relocp
= pic_suffixes
[i
].reloc
;
3539 /* No match. Don't consume anything; fall back and there will be a
3543 /* This *could* have been:
3545 Turn a string in input_line_pointer into a floating point constant
3546 of type TYPE, and store the appropriate bytes in *LITP. The number
3547 of LITTLENUMS emitted is stored in *SIZEP.
3549 type A character from FLTCHARS that describes what kind of
3550 floating-point number is wanted.
3552 litp A pointer to an array that the result should be stored in.
3554 sizep A pointer to an integer where the size of the result is stored.
3556 But we don't support floating point constants in assembly code *at all*,
3557 since it's suboptimal and just opens up bug opportunities. GCC emits
3558 the bit patterns as hex. All we could do here is to emit what GCC
3559 would have done in the first place. *Nobody* writes floating-point
3560 code as assembly code, but if they do, they should be able enough to
3561 find out the correct bit patterns and use them. */
3564 md_atof (int type ATTRIBUTE_UNUSED
, char *litp ATTRIBUTE_UNUSED
,
3565 int *sizep ATTRIBUTE_UNUSED
)
3567 /* FIXME: Is this function mentioned in the internals.texi manual? If
3569 return _("Bad call to md_atof () - floating point formats are not supported");
3572 /* Turn a number as a fixS * into a series of bytes that represents the
3573 number on the target machine. The purpose of this procedure is the
3574 same as that of md_number_to_chars but this procedure is supposed to
3575 handle general bit field fixes and machine-dependent fixups.
3577 bufp Pointer to an array where the result should be stored.
3579 val The value to store.
3581 n The number of bytes in "val" that should be stored.
3583 fixP The fix to be applied to the bit field starting at bufp.
3585 seg The segment containing this number. */
3588 cris_number_to_imm (char *bufp
, long val
, int n
, fixS
*fixP
, segT seg
)
3595 /* We put the relative "vma" for the other segment for inter-segment
3596 relocations in the object data to stay binary "compatible" (with an
3597 uninteresting old version) for the relocation.
3598 Maybe delete some day. */
3600 && (sym_seg
= S_GET_SEGMENT (fixP
->fx_addsy
)) != seg
)
3601 val
+= sym_seg
->vma
;
3603 if (fixP
->fx_addsy
!= NULL
|| fixP
->fx_pcrel
)
3604 switch (fixP
->fx_r_type
)
3606 /* These must be fully resolved when getting here. */
3607 case BFD_RELOC_16_PCREL
:
3608 case BFD_RELOC_8_PCREL
:
3609 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3610 _("PC-relative relocation must be trivially resolved"));
3615 /* Only do this for old-arch binaries. */
3616 if (cris_arch
!= arch_cris_any_v0_v10
3617 && (fixP
->fx_addsy
!= NULL
|| fixP
->fx_pcrel
))
3620 switch (fixP
->fx_r_type
)
3622 /* Ditto here, we put the addend into the object code as
3623 well as the reloc addend. Keep it that way for now, to simplify
3624 regression tests on the object file contents. FIXME: Seems
3625 uninteresting now that we have a test suite. */
3627 case BFD_RELOC_CRIS_16_GOT
:
3628 case BFD_RELOC_CRIS_32_GOT
:
3629 case BFD_RELOC_CRIS_32_GOTREL
:
3630 case BFD_RELOC_CRIS_16_GOTPLT
:
3631 case BFD_RELOC_CRIS_32_GOTPLT
:
3632 case BFD_RELOC_CRIS_32_PLT_GOTREL
:
3633 case BFD_RELOC_CRIS_32_PLT_PCREL
:
3634 case BFD_RELOC_CRIS_32_GOT_GD
:
3635 case BFD_RELOC_CRIS_16_GOT_GD
:
3636 case BFD_RELOC_CRIS_32_GD
:
3637 case BFD_RELOC_CRIS_32_DTPREL
:
3638 case BFD_RELOC_CRIS_16_DTPREL
:
3639 case BFD_RELOC_CRIS_32_GOT_TPREL
:
3640 case BFD_RELOC_CRIS_16_GOT_TPREL
:
3641 case BFD_RELOC_CRIS_32_TPREL
:
3642 case BFD_RELOC_CRIS_16_TPREL
:
3643 /* We don't want to put in any kind of non-zero bits in the data
3644 being relocated for these. */
3647 case BFD_RELOC_32_PCREL
:
3648 /* If this one isn't fully resolved, we don't want to put anything
3650 if (fixP
->fx_addsy
!= NULL
|| fixP
->fx_pcrel
)
3655 /* No use having warnings here, since most hosts have a 32-bit type
3656 for "long" (which will probably change soon, now that I wrote
3658 bufp
[3] = (val
>> 24) & 0xFF;
3659 bufp
[2] = (val
>> 16) & 0xFF;
3660 bufp
[1] = (val
>> 8) & 0xFF;
3661 bufp
[0] = val
& 0xFF;
3664 /* FIXME: The 16 and 8-bit cases should have a way to check
3665 whether a signed or unsigned (or any signedness) number is
3669 case BFD_RELOC_16_PCREL
:
3670 if (val
> 0xffff || val
< -32768)
3671 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3672 _("Value not in 16 bit range: %ld"), val
);
3673 if (! fixP
->fx_addsy
)
3675 bufp
[1] = (val
>> 8) & 0xFF;
3676 bufp
[0] = val
& 0xFF;
3680 case BFD_RELOC_CRIS_SIGNED_16
:
3681 if (val
> 32767 || val
< -32768)
3682 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3683 _("Value not in 16 bit signed range: %ld"), val
);
3684 if (! fixP
->fx_addsy
)
3686 bufp
[1] = (val
>> 8) & 0xFF;
3687 bufp
[0] = val
& 0xFF;
3692 case BFD_RELOC_8_PCREL
:
3693 if (val
> 255 || val
< -128)
3694 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("Value not in 8 bit range: %ld"), val
);
3695 if (! fixP
->fx_addsy
)
3696 bufp
[0] = val
& 0xFF;
3699 case BFD_RELOC_CRIS_SIGNED_8
:
3700 if (val
> 127 || val
< -128)
3701 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3702 _("Value not in 8 bit signed range: %ld"), val
);
3703 if (! fixP
->fx_addsy
)
3704 bufp
[0] = val
& 0xFF;
3707 case BFD_RELOC_CRIS_LAPCQ_OFFSET
:
3708 /* FIXME: Test-cases for out-of-range values. Probably also need
3709 to use as_bad_where. */
3710 case BFD_RELOC_CRIS_UNSIGNED_4
:
3711 if (val
> 15 || val
< 0)
3712 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3713 _("Value not in 4 bit unsigned range: %ld"), val
);
3714 if (! fixP
->fx_addsy
)
3715 bufp
[0] |= val
& 0x0F;
3718 case BFD_RELOC_CRIS_UNSIGNED_5
:
3719 if (val
> 31 || val
< 0)
3720 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3721 _("Value not in 5 bit unsigned range: %ld"), val
);
3722 if (! fixP
->fx_addsy
)
3723 bufp
[0] |= val
& 0x1F;
3726 case BFD_RELOC_CRIS_SIGNED_6
:
3727 if (val
> 31 || val
< -32)
3728 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3729 _("Value not in 6 bit range: %ld"), val
);
3730 if (! fixP
->fx_addsy
)
3731 bufp
[0] |= val
& 0x3F;
3734 case BFD_RELOC_CRIS_UNSIGNED_6
:
3735 if (val
> 63 || val
< 0)
3736 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3737 _("Value not in 6 bit unsigned range: %ld"), val
);
3738 if (! fixP
->fx_addsy
)
3739 bufp
[0] |= val
& 0x3F;
3742 case BFD_RELOC_CRIS_BDISP8
:
3743 if (! fixP
->fx_addsy
)
3744 bufp
[0] = branch_disp (val
);
3747 case BFD_RELOC_NONE
:
3748 /* May actually happen automatically. For example at broken
3749 words, if the word turns out not to be broken.
3750 FIXME: When? Which testcase? */
3751 if (! fixP
->fx_addsy
)
3752 md_number_to_chars (bufp
, val
, n
);
3755 case BFD_RELOC_VTABLE_INHERIT
:
3756 /* This borrowed from tc-ppc.c on a whim. */
3758 && !S_IS_DEFINED (fixP
->fx_addsy
)
3759 && !S_IS_WEAK (fixP
->fx_addsy
))
3760 S_SET_WEAK (fixP
->fx_addsy
);
3763 case BFD_RELOC_VTABLE_ENTRY
:
3768 BAD_CASE (fixP
->fx_r_type
);
3772 /* Processes machine-dependent command line options. Called once for
3773 each option on the command line that the machine-independent part of
3774 GAS does not understand. */
3777 md_parse_option (int arg
, char *argp ATTRIBUTE_UNUSED
)
3783 printf (_("Please use --help to see usage and options for this assembler.\n"));
3784 md_show_usage (stdout
);
3785 exit (EXIT_SUCCESS
);
3788 warn_for_branch_expansion
= 1;
3792 demand_register_prefix
= TRUE
;
3794 if (OUTPUT_FLAVOR
== bfd_target_aout_flavour
)
3795 as_bad (_("--no-underscore is invalid with a.out format"));
3797 symbols_have_leading_underscore
= FALSE
;
3801 demand_register_prefix
= FALSE
;
3802 symbols_have_leading_underscore
= TRUE
;
3807 if (cris_arch
!= arch_crisv32
)
3808 md_long_jump_size
= cris_any_v0_v10_long_jump_size_pic
;
3810 md_long_jump_size
= crisv32_long_jump_size
;
3816 enum cris_archs argarch
= cris_arch_from_string (&str
);
3818 if (argarch
== arch_cris_unknown
)
3819 as_bad (_("invalid <arch> in --march=<arch>: %s"), argp
);
3821 cris_arch
= argarch
;
3823 if (argarch
== arch_crisv32
)
3825 err_for_dangerous_mul_placement
= 0;
3826 md_long_jump_size
= crisv32_long_jump_size
;
3831 md_long_jump_size
= cris_any_v0_v10_long_jump_size_pic
;
3833 md_long_jump_size
= cris_any_v0_v10_long_jump_size
;
3838 case OPTION_MULBUG_ABORT_OFF
:
3839 err_for_dangerous_mul_placement
= 0;
3842 case OPTION_MULBUG_ABORT_ON
:
3843 err_for_dangerous_mul_placement
= 1;
3853 /* Round up a section size to the appropriate boundary. */
3855 md_section_align (segT segment
, valueT size
)
3857 /* Round all sects to multiple of 4, except the bss section, which
3858 we'll round to word-size.
3860 FIXME: Check if this really matters. All sections should be
3861 rounded up, and all sections should (optionally) be assumed to be
3862 dword-aligned, it's just that there is actual usage of linking to a
3864 if (OUTPUT_FLAVOR
== bfd_target_aout_flavour
)
3866 if (segment
== bss_section
)
3867 return (size
+ 1) & ~1;
3868 return (size
+ 3) & ~3;
3872 /* FIXME: Is this wanted? It matches the testsuite, but that's not
3873 really a valid reason. */
3874 if (segment
== text_section
)
3875 return (size
+ 3) & ~3;
3881 /* Generate a machine-dependent relocation. */
3883 tc_gen_reloc (asection
*section ATTRIBUTE_UNUSED
, fixS
*fixP
)
3886 bfd_reloc_code_real_type code
;
3888 switch (fixP
->fx_r_type
)
3890 case BFD_RELOC_CRIS_SIGNED_8
:
3894 case BFD_RELOC_CRIS_SIGNED_16
:
3895 code
= BFD_RELOC_16
;
3898 case BFD_RELOC_CRIS_16_GOT
:
3899 case BFD_RELOC_CRIS_32_GOT
:
3900 case BFD_RELOC_CRIS_16_GOTPLT
:
3901 case BFD_RELOC_CRIS_32_GOTPLT
:
3902 case BFD_RELOC_CRIS_32_GOTREL
:
3903 case BFD_RELOC_CRIS_32_PLT_GOTREL
:
3904 case BFD_RELOC_CRIS_32_PLT_PCREL
:
3906 case BFD_RELOC_32_PCREL
:
3909 case BFD_RELOC_VTABLE_INHERIT
:
3910 case BFD_RELOC_VTABLE_ENTRY
:
3911 case BFD_RELOC_CRIS_UNSIGNED_8
:
3912 case BFD_RELOC_CRIS_UNSIGNED_16
:
3913 case BFD_RELOC_CRIS_LAPCQ_OFFSET
:
3914 case BFD_RELOC_CRIS_32_GOT_GD
:
3915 case BFD_RELOC_CRIS_16_GOT_GD
:
3916 case BFD_RELOC_CRIS_32_GD
:
3917 case BFD_RELOC_CRIS_32_DTPREL
:
3918 case BFD_RELOC_CRIS_16_DTPREL
:
3919 case BFD_RELOC_CRIS_32_GOT_TPREL
:
3920 case BFD_RELOC_CRIS_16_GOT_TPREL
:
3921 case BFD_RELOC_CRIS_32_TPREL
:
3922 case BFD_RELOC_CRIS_16_TPREL
:
3923 code
= fixP
->fx_r_type
;
3926 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3927 _("Semantics error. This type of operand can not be relocated, it must be an assembly-time constant"));
3931 relP
= (arelent
*) xmalloc (sizeof (arelent
));
3933 relP
->sym_ptr_ptr
= (asymbol
**) xmalloc (sizeof (asymbol
*));
3934 *relP
->sym_ptr_ptr
= symbol_get_bfdsym (fixP
->fx_addsy
);
3935 relP
->address
= fixP
->fx_frag
->fr_address
+ fixP
->fx_where
;
3937 relP
->addend
= fixP
->fx_offset
;
3939 /* This is the standard place for KLUDGEs to work around bugs in
3940 bfd_install_relocation (first such note in the documentation
3941 appears with binutils-2.8).
3943 That function bfd_install_relocation does the wrong thing with
3944 putting stuff into the addend of a reloc (it should stay out) for a
3945 weak symbol. The really bad thing is that it adds the
3946 "segment-relative offset" of the symbol into the reloc. In this
3947 case, the reloc should instead be relative to the symbol with no
3948 other offset than the assembly code shows; and since the symbol is
3949 weak, any local definition should be ignored until link time (or
3951 To wit: weaksym+42 should be weaksym+42 in the reloc,
3952 not weaksym+(offset_from_segment_of_local_weaksym_definition)
3954 To "work around" this, we subtract the segment-relative offset of
3955 "known" weak symbols. This evens out the extra offset.
3957 That happens for a.out but not for ELF, since for ELF,
3958 bfd_install_relocation uses the "special function" field of the
3959 howto, and does not execute the code that needs to be undone. */
3961 if (OUTPUT_FLAVOR
== bfd_target_aout_flavour
3962 && fixP
->fx_addsy
&& S_IS_WEAK (fixP
->fx_addsy
)
3963 && ! bfd_is_und_section (S_GET_SEGMENT (fixP
->fx_addsy
)))
3965 relP
->addend
-= S_GET_VALUE (fixP
->fx_addsy
);
3968 relP
->howto
= bfd_reloc_type_lookup (stdoutput
, code
);
3973 name
= S_GET_NAME (fixP
->fx_addsy
);
3975 name
= _("<unknown>");
3976 as_fatal (_("Cannot generate relocation type for symbol %s, code %s"),
3977 name
, bfd_get_reloc_code_name (code
));
3983 /* Machine-dependent usage-output. */
3986 md_show_usage (FILE *stream
)
3988 /* The messages are formatted to line up with the generic options. */
3989 fprintf (stream
, _("CRIS-specific options:\n"));
3990 fprintf (stream
, "%s",
3991 _(" -h, -H Don't execute, print this help text. Deprecated.\n"));
3992 fprintf (stream
, "%s",
3993 _(" -N Warn when branches are expanded to jumps.\n"));
3994 fprintf (stream
, "%s",
3995 _(" --underscore User symbols are normally prepended with underscore.\n"));
3996 fprintf (stream
, "%s",
3997 _(" Registers will not need any prefix.\n"));
3998 fprintf (stream
, "%s",
3999 _(" --no-underscore User symbols do not have any prefix.\n"));
4000 fprintf (stream
, "%s",
4001 _(" Registers will require a `$'-prefix.\n"));
4002 fprintf (stream
, "%s",
4003 _(" --pic Enable generation of position-independent code.\n"));
4004 fprintf (stream
, "%s",
4005 _(" --march=<arch> Generate code for <arch>. Valid choices for <arch>\n\
4006 are v0_v10, v10, v32 and common_v10_v32.\n"));
4009 /* Apply a fixS (fixup of an instruction or data that we didn't have
4010 enough info to complete immediately) to the data in a frag. */
4013 md_apply_fix (fixS
*fixP
, valueT
*valP
, segT seg
)
4015 /* This assignment truncates upper bits if valueT is 64 bits (as with
4016 --enable-64-bit-bfd), which is fine here, though we cast to avoid
4017 any compiler warnings. */
4018 long val
= (long) *valP
;
4019 char *buf
= fixP
->fx_where
+ fixP
->fx_frag
->fr_literal
;
4021 if (fixP
->fx_addsy
== 0 && !fixP
->fx_pcrel
)
4024 if (fixP
->fx_bit_fixP
|| fixP
->fx_im_disp
!= 0)
4026 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("Invalid relocation"));
4031 /* We can't actually support subtracting a symbol. */
4032 if (fixP
->fx_subsy
!= (symbolS
*) NULL
)
4033 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
4034 _("expression too complex"));
4036 /* This operand-type is scaled. */
4037 if (fixP
->fx_r_type
== BFD_RELOC_CRIS_LAPCQ_OFFSET
)
4039 cris_number_to_imm (buf
, val
, fixP
->fx_size
, fixP
, seg
);
4043 /* All relocations are relative to the location just after the fixup;
4044 the address of the fixup plus its size. */
4047 md_pcrel_from (fixS
*fixP
)
4049 valueT addr
= fixP
->fx_where
+ fixP
->fx_frag
->fr_address
;
4051 /* FIXME: We get here only at the end of assembly, when X in ".-X" is
4052 still unknown. Since we don't have pc-relative relocations in a.out,
4053 this is invalid. What to do if anything for a.out, is to add
4054 pc-relative relocations everywhere including the elinux program
4055 loader. For ELF, allow straight-forward PC-relative relocations,
4056 which are always relative to the location after the relocation. */
4057 if (OUTPUT_FLAVOR
!= bfd_target_elf_flavour
4058 || (fixP
->fx_r_type
!= BFD_RELOC_8_PCREL
4059 && fixP
->fx_r_type
!= BFD_RELOC_16_PCREL
4060 && fixP
->fx_r_type
!= BFD_RELOC_32_PCREL
4061 && fixP
->fx_r_type
!= BFD_RELOC_CRIS_LAPCQ_OFFSET
))
4062 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
4063 _("Invalid pc-relative relocation"));
4064 return fixP
->fx_size
+ addr
;
4067 /* We have no need to give defaults for symbol-values. */
4069 md_undefined_symbol (char *name ATTRIBUTE_UNUSED
)
4074 /* If this function returns non-zero, it prevents the relocation
4075 against symbol(s) in the FIXP from being replaced with relocations
4076 against section symbols, and guarantees that a relocation will be
4077 emitted even when the value can be resolved locally. */
4079 md_cris_force_relocation (struct fix
*fixp
)
4081 switch (fixp
->fx_r_type
)
4083 case BFD_RELOC_CRIS_16_GOT
:
4084 case BFD_RELOC_CRIS_32_GOT
:
4085 case BFD_RELOC_CRIS_16_GOTPLT
:
4086 case BFD_RELOC_CRIS_32_GOTPLT
:
4087 case BFD_RELOC_CRIS_32_GOTREL
:
4088 case BFD_RELOC_CRIS_32_PLT_GOTREL
:
4089 case BFD_RELOC_CRIS_32_PLT_PCREL
:
4095 return generic_force_reloc (fixp
);
4098 /* Check and emit error if broken-word handling has failed to fix up a
4099 case-table. This is called from write.c, after doing everything it
4100 knows about how to handle broken words. */
4103 tc_cris_check_adjusted_broken_word (offsetT new_offset
, struct broken_word
*brokwP
)
4105 if (new_offset
> 32767 || new_offset
< -32768)
4106 /* We really want a genuine error, not a warning, so make it one. */
4107 as_bad_where (brokwP
->frag
->fr_file
, brokwP
->frag
->fr_line
,
4108 _("Adjusted signed .word (%ld) overflows: `switch'-statement too large."),
4112 /* Make a leading REGISTER_PREFIX_CHAR mandatory for all registers. */
4115 cris_force_reg_prefix (void)
4117 demand_register_prefix
= TRUE
;
4120 /* Do not demand a leading REGISTER_PREFIX_CHAR for all registers. */
4123 cris_relax_reg_prefix (void)
4125 demand_register_prefix
= FALSE
;
4128 /* Adjust for having a leading '_' on all user symbols. */
4131 cris_sym_leading_underscore (void)
4133 /* We can't really do anything more than assert that what the program
4134 thinks symbol starts with agrees with the command-line options, since
4135 the bfd is already created. */
4137 if (!symbols_have_leading_underscore
)
4138 as_bad (_(".syntax %s requires command-line option `--underscore'"),
4139 SYNTAX_USER_SYM_LEADING_UNDERSCORE
);
4142 /* Adjust for not having any particular prefix on user symbols. */
4144 static void cris_sym_no_leading_underscore (void)
4146 if (symbols_have_leading_underscore
)
4147 as_bad (_(".syntax %s requires command-line option `--no-underscore'"),
4148 SYNTAX_USER_SYM_NO_LEADING_UNDERSCORE
);
4151 /* Handle the .syntax pseudo, which takes an argument that decides what
4152 syntax the assembly code has. */
4155 s_syntax (int ignore ATTRIBUTE_UNUSED
)
4157 static const struct syntaxes
4159 const char *const operand
;
4162 {{SYNTAX_ENFORCE_REG_PREFIX
, cris_force_reg_prefix
},
4163 {SYNTAX_RELAX_REG_PREFIX
, cris_relax_reg_prefix
},
4164 {SYNTAX_USER_SYM_LEADING_UNDERSCORE
, cris_sym_leading_underscore
},
4165 {SYNTAX_USER_SYM_NO_LEADING_UNDERSCORE
, cris_sym_no_leading_underscore
}};
4167 const struct syntaxes
*sp
;
4169 for (sp
= syntax_table
;
4170 sp
< syntax_table
+ sizeof (syntax_table
) / sizeof (syntax_table
[0]);
4173 if (strncmp (input_line_pointer
, sp
->operand
,
4174 strlen (sp
->operand
)) == 0)
4178 input_line_pointer
+= strlen (sp
->operand
);
4179 demand_empty_rest_of_line ();
4184 as_bad (_("Unknown .syntax operand"));
4187 /* Wrapper for dwarf2_directive_file to emit error if this is seen when
4188 not emitting ELF. */
4191 s_cris_file (int dummy
)
4193 if (OUTPUT_FLAVOR
!= bfd_target_elf_flavour
)
4194 as_bad (_("Pseudodirective .file is only valid when generating ELF"));
4196 dwarf2_directive_file (dummy
);
4199 /* Wrapper for dwarf2_directive_loc to emit error if this is seen when not
4203 s_cris_loc (int dummy
)
4205 if (OUTPUT_FLAVOR
!= bfd_target_elf_flavour
)
4206 as_bad (_("Pseudodirective .loc is only valid when generating ELF"));
4208 dwarf2_directive_loc (dummy
);
4211 /* Translate a <arch> string (as common to --march=<arch> and .arch <arch>)
4212 into an enum. If the string *STR is recognized, *STR is updated to point
4213 to the end of the string. If the string is not recognized,
4214 arch_cris_unknown is returned. */
4216 static enum cris_archs
4217 cris_arch_from_string (char **str
)
4219 static const struct cris_arch_struct
4221 const char *const name
;
4222 enum cris_archs arch
;
4224 /* Keep in order longest-first for choices where one is a prefix
4226 {{"v0_v10", arch_cris_any_v0_v10
},
4227 {"v10", arch_crisv10
},
4228 {"v32", arch_crisv32
},
4229 {"common_v10_v32", arch_cris_common_v10_v32
}};
4231 const struct cris_arch_struct
*ap
;
4233 for (ap
= arch_table
;
4234 ap
< arch_table
+ sizeof (arch_table
) / sizeof (arch_table
[0]);
4237 int len
= strlen (ap
->name
);
4239 if (strncmp (*str
, ap
->name
, len
) == 0
4240 && (str
[0][len
] == 0 || ISSPACE (str
[0][len
])))
4242 *str
+= strlen (ap
->name
);
4247 return arch_cris_unknown
;
4250 /* Return nonzero if architecture version ARCH matches version range in
4254 cris_insn_ver_valid_for_arch (enum cris_insn_version_usage iver
,
4255 enum cris_archs arch
)
4259 case arch_cris_any_v0_v10
:
4261 (iver
== cris_ver_version_all
4262 || iver
== cris_ver_warning
4263 || iver
== cris_ver_v0_3
4264 || iver
== cris_ver_v3p
4265 || iver
== cris_ver_v0_10
4266 || iver
== cris_ver_sim_v0_10
4267 || iver
== cris_ver_v3_10
4268 || iver
== cris_ver_v8
4269 || iver
== cris_ver_v8p
4270 || iver
== cris_ver_v8_10
4271 || iver
== cris_ver_v10
4272 || iver
== cris_ver_v10p
);
4276 (iver
== cris_ver_version_all
4277 || iver
== cris_ver_v3p
4278 || iver
== cris_ver_v8p
4279 || iver
== cris_ver_v10p
4280 || iver
== cris_ver_v32p
);
4282 case arch_cris_common_v10_v32
:
4284 (iver
== cris_ver_version_all
4285 || iver
== cris_ver_v3p
4286 || iver
== cris_ver_v8p
4287 || iver
== cris_ver_v10p
);
4291 (iver
== cris_ver_version_all
4292 || iver
== cris_ver_v0_3
4293 || iver
== cris_ver_v0_10
4294 || iver
== cris_ver_sim_v0_10
);
4298 (iver
== cris_ver_version_all
4299 || iver
== cris_ver_v0_3
4300 || iver
== cris_ver_v3p
4301 || iver
== cris_ver_v0_10
4302 || iver
== cris_ver_sim_v0_10
4303 || iver
== cris_ver_v3_10
);
4307 (iver
== cris_ver_version_all
4308 || iver
== cris_ver_v3p
4309 || iver
== cris_ver_v0_10
4310 || iver
== cris_ver_sim_v0_10
4311 || iver
== cris_ver_v3_10
4312 || iver
== cris_ver_v8
4313 || iver
== cris_ver_v8p
4314 || iver
== cris_ver_v8_10
);
4318 (iver
== cris_ver_version_all
4319 || iver
== cris_ver_v3p
4320 || iver
== cris_ver_v0_10
4321 || iver
== cris_ver_sim_v0_10
4322 || iver
== cris_ver_v3_10
4323 || iver
== cris_ver_v8p
4324 || iver
== cris_ver_v8_10
4325 || iver
== cris_ver_v10
4326 || iver
== cris_ver_v10p
);
4333 /* Assert that the .arch ARCHCHOICE1 is compatible with the specified or
4334 default --march=<ARCHCHOICE2> option. */
4337 s_cris_arch (int dummy ATTRIBUTE_UNUSED
)
4339 /* Right now we take the easy route and check for sameness. It's not
4340 obvious that allowing e.g. --march=v32 and .arch common_v0_v32
4341 would be more useful than confusing, implementation-wise and
4344 char *str
= input_line_pointer
;
4345 enum cris_archs arch
= cris_arch_from_string (&str
);
4347 if (arch
== arch_cris_unknown
)
4349 as_bad (_("unknown operand to .arch"));
4351 /* For this one, str does not reflect the end of the operand,
4352 since there was no matching arch. Skip it manually; skip
4353 things that can be part of a word (a name). */
4354 while (is_part_of_name (*str
))
4357 else if (arch
!= cris_arch
)
4358 as_bad (_(".arch <arch> requires a matching --march=... option"));
4360 input_line_pointer
= str
;
4361 demand_empty_rest_of_line ();
4367 * eval: (c-set-style "gnu")
4368 * indent-tabs-mode: t