1 /* tc-d30v.c -- Assembler code for the Mitsubishi D30V
3 Copyright (C) 1997, 1998 Free Software Foundation.
5 This file is part of GAS, the GNU Assembler.
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
26 #include "opcode/d30v.h"
28 const char comment_chars
[] = ";";
29 const char line_comment_chars
[] = "#";
30 const char line_separator_chars
[] = "";
31 const char *md_shortopts
= "OnN";
32 const char EXP_CHARS
[] = "eE";
33 const char FLT_CHARS
[] = "dD";
35 #define NOP_MULTIPLY 1
37 static int warn_nops
= 0;
38 static int Optimizing
= 0;
44 typedef enum _exec_type
46 EXEC_UNKNOWN
, /* no order specified */
47 EXEC_PARALLEL
, /* done in parallel (FM=00) */
48 EXEC_SEQ
, /* sequential (FM=01) */
49 EXEC_REVSEQ
/* reverse sequential (FM=10) */
53 #define MAX_INSN_FIXUPS (5)
60 bfd_reloc_code_real_type reloc
;
63 typedef struct _fixups
66 struct d30v_fixup fix
[MAX_INSN_FIXUPS
];
70 static Fixups FixUps
[2];
71 static Fixups
*fixups
;
73 /* Whether current and previous instruction is a word multiply. */
74 static int cur_mul32_p
= 0;
75 static int prev_mul32_p
= 0;
77 /* The flag_explicitly_parallel is true iff the instruction being assembled
78 has been explicitly written as a parallel short-instruction pair by the
79 human programmer. It is used in parallel_ok() to distinguish between
80 those dangerous parallelizations attempted by the human, which are to be
81 allowed, and those attempted by the assembler, which are not. It is set
82 from md_assemble(). */
83 static int flag_explicitly_parallel
= 0;
84 static int flag_xp_state
= 0;
86 /* Whether current and previous left sub-instruction disables
87 execution of right sub-instruction. */
88 static int cur_left_kills_right_p
= 0;
89 static int prev_left_kills_right_p
= 0;
91 /* The known current alignment of the current section. */
92 static int d30v_current_align
;
93 static segT d30v_current_align_seg
;
95 /* The last seen label in the current section. This is used to auto-align
96 labels preceeding instructions. */
97 static symbolS
*d30v_last_label
;
100 #define NOP_LEFT ((long long)NOP << 32)
101 #define NOP_RIGHT ((long long)NOP)
102 #define NOP2 (FM00 | NOP_LEFT | NOP_RIGHT)
104 /* local functions */
105 static int reg_name_search
PARAMS ((char *name
));
106 static int register_name
PARAMS ((expressionS
*expressionP
));
107 static int check_range
PARAMS ((unsigned long num
, int bits
, int flags
));
108 static int postfix
PARAMS ((char *p
));
109 static bfd_reloc_code_real_type get_reloc
PARAMS ((struct d30v_operand
*op
, int rel_flag
));
110 static int get_operands
PARAMS ((expressionS exp
[], int cmp_hack
));
111 static struct d30v_format
*find_format
PARAMS ((struct d30v_opcode
*opcode
,
112 expressionS ops
[],int fsize
, int cmp_hack
));
113 static long long build_insn
PARAMS ((struct d30v_insn
*opcode
, expressionS
*opers
));
114 static void write_long
PARAMS ((struct d30v_insn
*opcode
, long long insn
, Fixups
*fx
));
115 static void write_1_short
PARAMS ((struct d30v_insn
*opcode
, long long insn
, Fixups
*fx
));
116 static int write_2_short
PARAMS ((struct d30v_insn
*opcode1
, long long insn1
,
117 struct d30v_insn
*opcode2
, long long insn2
, exec_type_enum exec_type
, Fixups
*fx
));
118 static long long do_assemble
PARAMS ((char *str
, struct d30v_insn
*opcode
,
119 int shortp
, int is_parallel
));
120 static int parallel_ok
PARAMS ((struct d30v_insn
*opcode1
, unsigned long insn1
,
121 struct d30v_insn
*opcode2
, unsigned long insn2
,
122 exec_type_enum exec_type
));
123 static void d30v_number_to_chars
PARAMS ((char *buf
, long long value
, int nbytes
));
124 static void check_size
PARAMS ((long value
, int bits
, char *file
, int line
));
125 static void d30v_align
PARAMS ((int, char *, symbolS
*));
126 static void s_d30v_align
PARAMS ((int));
127 static void s_d30v_text
PARAMS ((int));
128 static void s_d30v_data
PARAMS ((int));
129 static void s_d30v_section
PARAMS ((int));
131 struct option md_longopts
[] = {
132 {NULL
, no_argument
, NULL
, 0}
134 size_t md_longopts_size
= sizeof(md_longopts
);
137 /* The target specific pseudo-ops which we support. */
138 const pseudo_typeS md_pseudo_table
[] =
141 { "hword", cons
, 2 },
142 { "align", s_d30v_align
, 0 },
143 { "text", s_d30v_text
, 0 },
144 { "data", s_d30v_data
, 0 },
145 { "section", s_d30v_section
, 0 },
146 { "section.s", s_d30v_section
, 0 },
147 { "sect", s_d30v_section
, 0 },
148 { "sect.s", s_d30v_section
, 0 },
152 /* Opcode hash table. */
153 static struct hash_control
*d30v_hash
;
155 /* reg_name_search does a binary search of the pre_defined_registers
156 array to see if "name" is a valid regiter name. Returns the register
157 number from the array on success, or -1 on failure. */
160 reg_name_search (name
)
163 int middle
, low
, high
;
167 high
= reg_name_cnt () - 1;
171 middle
= (low
+ high
) / 2;
172 cmp
= strcasecmp (name
, pre_defined_registers
[middle
].name
);
178 return pre_defined_registers
[middle
].value
;
184 /* register_name() checks the string at input_line_pointer
185 to see if it is a valid register name */
188 register_name (expressionP
)
189 expressionS
*expressionP
;
192 char c
, *p
= input_line_pointer
;
194 while (*p
&& *p
!='\n' && *p
!='\r' && *p
!=',' && *p
!=' ' && *p
!=')')
201 /* look to see if it's in the register table */
202 reg_number
= reg_name_search (input_line_pointer
);
205 expressionP
->X_op
= O_register
;
206 /* temporarily store a pointer to the string here */
207 expressionP
->X_op_symbol
= (struct symbol
*)input_line_pointer
;
208 expressionP
->X_add_number
= reg_number
;
209 input_line_pointer
= p
;
219 check_range (num
, bits
, flags
)
227 /* don't bother checking 32-bit values */
231 if (flags
& OPERAND_SHIFT
)
233 /* We know that all shifts are right by three bits.... */
235 if (flags
& OPERAND_SIGNED
)
236 num
= (unsigned long) (((/*signed*/ long) num
) >> 3);
241 if (flags
& OPERAND_SIGNED
)
243 max
= (1 << (bits
- 1))-1;
244 min
= - (1 << (bits
- 1));
245 if (((long)num
> max
) || ((long)num
< min
))
250 max
= (1 << bits
) - 1;
252 if ((num
> max
) || (num
< min
))
260 md_show_usage (stream
)
263 fprintf (stream
, _("\nD30V options:\n\
264 -O Make adjacent short instructions parallel if possible.\n\
265 -n Warn about all NOPs inserted by the assembler.\n\
266 -N Warn about NOPs inserted after word multiplies.\n"));
270 md_parse_option (c
, arg
)
276 /* Optimize. Will attempt to parallelize operations */
281 /* Warn about all NOPS that the assembler inserts. */
286 /* Warn about the NOPS that the assembler inserts because of the
289 warn_nops
= NOP_MULTIPLY
;
299 md_undefined_symbol (name
)
305 /* Turn a string in input_line_pointer into a floating point constant of type
306 type, and store the appropriate bytes in *litP. The number of LITTLENUMS
307 emitted is stored in *sizeP . An error message is returned, or NULL on OK.
310 md_atof (type
, litP
, sizeP
)
316 LITTLENUM_TYPE words
[4];
330 return _("bad call to md_atof");
333 t
= atof_ieee (input_line_pointer
, type
, words
);
335 input_line_pointer
= t
;
339 for (i
= 0; i
< prec
; i
++)
341 md_number_to_chars (litP
, (valueT
) words
[i
], 2);
348 md_convert_frag (abfd
, sec
, fragP
)
357 md_section_align (seg
, addr
)
361 int align
= bfd_get_section_alignment (stdoutput
, seg
);
362 return ((addr
+ (1 << align
) - 1) & (-1 << align
));
369 struct d30v_opcode
*opcode
;
370 d30v_hash
= hash_new ();
372 /* Insert opcode names into a hash table. */
373 for (opcode
= (struct d30v_opcode
*)d30v_opcode_table
; opcode
->name
; opcode
++)
374 hash_insert (d30v_hash
, opcode
->name
, (char *) opcode
);
377 FixUps
[0].next
= &FixUps
[1];
378 FixUps
[1].next
= &FixUps
[0];
380 d30v_current_align_seg
= now_seg
;
384 /* this function removes the postincrement or postdecrement
385 operator ( '+' or '-' ) from an expression */
387 static int postfix (p
)
390 while (*p
!= '-' && *p
!= '+')
392 if (*p
==0 || *p
=='\n' || *p
=='\r' || *p
==' ' || *p
==',')
412 static bfd_reloc_code_real_type
413 get_reloc (op
, rel_flag
)
414 struct d30v_operand
*op
;
420 if (op
->flags
& OPERAND_SHIFT
)
421 return BFD_RELOC_D30V_9_PCREL
;
423 return BFD_RELOC_D30V_6
;
426 if (!(op
->flags
& OPERAND_SHIFT
))
427 as_warn (_("unexpected 12-bit reloc type"));
428 if (rel_flag
== RELOC_PCREL
)
429 return BFD_RELOC_D30V_15_PCREL
;
431 return BFD_RELOC_D30V_15
;
433 if (!(op
->flags
& OPERAND_SHIFT
))
434 as_warn (_("unexpected 18-bit reloc type"));
435 if (rel_flag
== RELOC_PCREL
)
436 return BFD_RELOC_D30V_21_PCREL
;
438 return BFD_RELOC_D30V_21
;
440 if (rel_flag
== RELOC_PCREL
)
441 return BFD_RELOC_D30V_32_PCREL
;
443 return BFD_RELOC_D30V_32
;
449 /* get_operands parses a string of operands and returns
450 an array of expressions */
453 get_operands (exp
, cmp_hack
)
457 char *p
= input_line_pointer
;
463 exp
[numops
].X_op
= O_absent
;
464 exp
[numops
++].X_add_number
= cmp_hack
- 1;
469 while (*p
== ' ' || *p
== '\t' || *p
== ',')
471 if (*p
==0 || *p
=='\n' || *p
=='\r')
477 exp
[numops
].X_op
= O_absent
;
481 exp
[numops
].X_add_number
= OPERAND_ATPAR
;
487 exp
[numops
].X_add_number
= OPERAND_ATMINUS
;
491 exp
[numops
].X_add_number
= OPERAND_ATSIGN
;
500 /* just skip the trailing paren */
505 input_line_pointer
= p
;
507 /* check to see if it might be a register name */
508 if (!register_name (&exp
[numops
]))
510 /* parse as an expression */
511 expression (&exp
[numops
]);
514 if (exp
[numops
].X_op
== O_illegal
)
515 as_bad (_("illegal operand"));
516 else if (exp
[numops
].X_op
== O_absent
)
517 as_bad (_("missing operand"));
520 p
= input_line_pointer
;
524 case -1: /* postdecrement mode */
525 exp
[numops
].X_op
= O_absent
;
526 exp
[numops
++].X_add_number
= OPERAND_MINUS
;
528 case 1: /* postincrement mode */
529 exp
[numops
].X_op
= O_absent
;
530 exp
[numops
++].X_add_number
= OPERAND_PLUS
;
536 exp
[numops
].X_op
= 0;
540 /* build_insn generates the instruction. It does everything */
541 /* but write the FM bits. */
544 build_insn (opcode
, opers
)
545 struct d30v_insn
*opcode
;
548 int i
, length
, bits
, shift
, flags
;
549 unsigned int number
, id
=0;
551 struct d30v_opcode
*op
= opcode
->op
;
552 struct d30v_format
*form
= opcode
->form
;
554 insn
= opcode
->ecc
<< 28 | op
->op1
<< 25 | op
->op2
<< 20 | form
->modifier
<< 18;
556 for (i
=0; form
->operands
[i
]; i
++)
558 flags
= d30v_operand_table
[form
->operands
[i
]].flags
;
560 /* must be a register or number */
561 if (!(flags
& OPERAND_REG
) && !(flags
& OPERAND_NUM
) &&
562 !(flags
& OPERAND_NAME
) && !(flags
& OPERAND_SPECIAL
))
565 bits
= d30v_operand_table
[form
->operands
[i
]].bits
;
566 if (flags
& OPERAND_SHIFT
)
569 length
= d30v_operand_table
[form
->operands
[i
]].length
;
570 shift
= 12 - d30v_operand_table
[form
->operands
[i
]].position
;
571 if (opers
[i
].X_op
!= O_symbol
)
572 number
= opers
[i
].X_add_number
;
575 if (flags
& OPERAND_REG
)
577 /* check for mvfsys or mvtsys control registers */
578 if (flags
& OPERAND_CONTROL
&& (number
& 0x7f) > MAX_CONTROL_REG
)
581 id
= (number
& 0x7f) - MAX_CONTROL_REG
;
584 else if (number
& OPERAND_FLAG
)
586 id
= 3; /* number is a flag register */
590 else if (flags
& OPERAND_SPECIAL
)
595 if (opers
[i
].X_op
!= O_register
&& opers
[i
].X_op
!= O_constant
&& !(flags
& OPERAND_NAME
))
597 /* now create a fixup */
599 if (fixups
->fc
>= MAX_INSN_FIXUPS
)
600 as_fatal (_("too many fixups"));
602 fixups
->fix
[fixups
->fc
].reloc
=
603 get_reloc ((struct d30v_operand
*)&d30v_operand_table
[form
->operands
[i
]], op
->reloc_flag
);
604 fixups
->fix
[fixups
->fc
].size
= 4;
605 fixups
->fix
[fixups
->fc
].exp
= opers
[i
];
606 fixups
->fix
[fixups
->fc
].operand
= form
->operands
[i
];
607 if (fixups
->fix
[fixups
->fc
].reloc
== BFD_RELOC_D30V_9_PCREL
)
608 fixups
->fix
[fixups
->fc
].pcrel
= RELOC_PCREL
;
610 fixups
->fix
[fixups
->fc
].pcrel
= op
->reloc_flag
;
614 /* truncate to the proper number of bits */
615 if ((opers
[i
].X_op
== O_constant
) && check_range (number
, bits
, flags
))
616 as_bad (_("operand out of range: %d"),number
);
618 number
&= 0x7FFFFFFF >> (31 - bits
);
619 if (flags
& OPERAND_SHIFT
)
623 /* it's a LONG instruction */
624 insn
|= (number
>> 26); /* top 6 bits */
625 insn
<<= 32; /* shift the first word over */
626 insn
|= ((number
& 0x03FC0000) << 2); /* next 8 bits */
627 insn
|= number
& 0x0003FFFF; /* bottom 18 bits */
630 insn
|= number
<< shift
;
636 /* write out a long form instruction */
638 write_long (opcode
, insn
, fx
)
639 struct d30v_insn
*opcode
;
644 char *f
= frag_more (8);
647 d30v_number_to_chars (f
, insn
, 8);
649 for (i
=0; i
< fx
->fc
; i
++)
651 if (fx
->fix
[i
].reloc
)
653 where
= f
- frag_now
->fr_literal
;
654 fix_new_exp (frag_now
,
666 /* write out a short form instruction by itself */
668 write_1_short (opcode
, insn
, fx
)
669 struct d30v_insn
*opcode
;
673 char *f
= frag_more (8);
676 if (warn_nops
== NOP_ALL
)
677 as_warn (_("NOP inserted"));
679 /* the other container needs to be NOP */
680 /* according to 4.3.1: for FM=00, sub-instructions performed only
681 by IU cannot be encoded in L-container. */
682 if (opcode
->op
->unit
== IU
)
683 insn
|= FM00
| NOP_LEFT
; /* right container */
685 insn
= FM00
| (insn
<< 32) | NOP_RIGHT
; /* left container */
687 d30v_number_to_chars (f
, insn
, 8);
689 for (i
=0; i
< fx
->fc
; i
++)
691 if (fx
->fix
[i
].reloc
)
693 where
= f
- frag_now
->fr_literal
;
694 fix_new_exp (frag_now
,
705 /* write out a short form instruction if possible */
706 /* return number of instructions not written out */
708 write_2_short (opcode1
, insn1
, opcode2
, insn2
, exec_type
, fx
)
709 struct d30v_insn
*opcode1
, *opcode2
;
710 long long insn1
, insn2
;
711 exec_type_enum exec_type
;
714 long long insn
= NOP2
;
718 if (exec_type
!= EXEC_PARALLEL
&&
719 ((opcode1
->op
->flags_used
& (FLAG_JSR
| FLAG_DELAY
)) == FLAG_JSR
))
721 /* subroutines must be called from 32-bit boundaries */
722 /* so the return address will be correct */
723 write_1_short (opcode1
, insn1
, fx
->next
);
729 case EXEC_UNKNOWN
: /* order not specified */
730 if (Optimizing
&& parallel_ok (opcode1
, insn1
, opcode2
, insn2
, exec_type
))
733 exec_type
= EXEC_PARALLEL
;
734 if (opcode1
->op
->unit
== IU
)
735 insn
= FM00
| (insn2
<< 32) | insn1
;
736 else if (opcode2
->op
->unit
== MU
)
737 insn
= FM00
| (insn2
<< 32) | insn1
;
740 insn
= FM00
| (insn1
<< 32) | insn2
;
744 else if (opcode1
->op
->unit
== IU
)
746 /* reverse sequential */
747 insn
= FM10
| (insn2
<< 32) | insn1
;
748 exec_type
= EXEC_REVSEQ
;
753 insn
= FM01
| (insn1
<< 32) | insn2
;
755 exec_type
= EXEC_SEQ
;
759 case EXEC_PARALLEL
: /* parallel */
760 flag_explicitly_parallel
= flag_xp_state
;
761 if (! parallel_ok (opcode1
, insn1
, opcode2
, insn2
, exec_type
))
762 as_fatal (_("Instructions may not be executed in parallel"));
763 else if (opcode1
->op
->unit
== IU
)
765 if (opcode2
->op
->unit
== IU
)
766 as_fatal (_("Two IU instructions may not be executed in parallel"));
767 as_warn (_("Swapping instruction order"));
768 insn
= FM00
| (insn2
<< 32) | insn1
;
770 else if (opcode2
->op
->unit
== MU
)
772 if (opcode1
->op
->unit
== MU
)
773 as_fatal (_("Two MU instructions may not be executed in parallel"));
774 as_warn (_("Swapping instruction order"));
775 insn
= FM00
| (insn2
<< 32) | insn1
;
779 insn
= FM00
| (insn1
<< 32) | insn2
;
782 flag_explicitly_parallel
= 0;
785 case EXEC_SEQ
: /* sequential */
786 if (opcode1
->op
->unit
== IU
)
787 as_fatal (_("IU instruction may not be in the left container"));
788 if (prev_left_kills_right_p
)
789 as_warn (_("special left instruction `%s' kills instruction "
790 "`%s' in right container"),
791 opcode1
->op
->name
, opcode2
->op
->name
);
792 insn
= FM01
| (insn1
<< 32) | insn2
;
796 case EXEC_REVSEQ
: /* reverse sequential */
797 if (opcode2
->op
->unit
== MU
)
798 as_fatal (_("MU instruction may not be in the right container"));
799 insn
= FM10
| (insn1
<< 32) | insn2
;
804 as_fatal (_("unknown execution type passed to write_2_short()"));
807 /* printf("writing out %llx\n",insn); */
809 d30v_number_to_chars (f
, insn
, 8);
811 /* If the previous instruction was a 32-bit multiply but it is put into a
812 parallel container, mark the current instruction as being a 32-bit
814 if (prev_mul32_p
&& exec_type
== EXEC_PARALLEL
)
819 for (i
=0; i
< fx
->fc
; i
++)
821 if (fx
->fix
[i
].reloc
)
823 where
= (f
- frag_now
->fr_literal
) + 4*j
;
825 fix_new_exp (frag_now
,
840 /* Check 2 instructions and determine if they can be safely */
841 /* executed in parallel. Returns 1 if they can be. */
843 parallel_ok (op1
, insn1
, op2
, insn2
, exec_type
)
844 struct d30v_insn
*op1
, *op2
;
845 unsigned long insn1
, insn2
;
846 exec_type_enum exec_type
;
848 int i
, j
, shift
, regno
, bits
, ecc
;
849 unsigned long flags
, mask
, flags_set1
, flags_set2
, flags_used1
, flags_used2
;
850 unsigned long ins
, mod_reg
[2][3], used_reg
[2][3], flag_reg
[2];
851 struct d30v_format
*f
;
852 struct d30v_opcode
*op
;
854 /* section 4.3: both instructions must not be IU or MU only */
855 if ((op1
->op
->unit
== IU
&& op2
->op
->unit
== IU
)
856 || (op1
->op
->unit
== MU
&& op2
->op
->unit
== MU
))
859 /* first instruction must not be a jump to safely optimize, unless this
860 is an explicit parallel operation. */
861 if (exec_type
!= EXEC_PARALLEL
862 && (op1
->op
->flags_used
& (FLAG_JMP
| FLAG_JSR
)))
865 /* If one instruction is /TX or /XT and the other is /FX or /XF respectively,
866 then it is safe to allow the two to be done as parallel ops, since only
867 one will ever be executed at a time. */
868 if ((op1
->ecc
== ECC_TX
&& op2
->ecc
== ECC_FX
)
869 || (op1
->ecc
== ECC_FX
&& op2
->ecc
== ECC_TX
)
870 || (op1
->ecc
== ECC_XT
&& op2
->ecc
== ECC_XF
)
871 || (op1
->ecc
== ECC_XF
&& op2
->ecc
== ECC_XT
))
876 [2] a0, a1, flag registers */
878 for (j
= 0; j
< 2; j
++)
895 mod_reg
[j
][0] = mod_reg
[j
][1] = 0;
896 mod_reg
[j
][2] = (op
->flags_set
& FLAG_ALL
);
897 used_reg
[j
][0] = used_reg
[j
][1] = 0;
898 used_reg
[j
][2] = (op
->flags_used
& FLAG_ALL
);
900 /* BSR/JSR always sets R62 */
901 if (op
->flags_used
& FLAG_JSR
)
902 mod_reg
[j
][1] = (1L << (62-32));
904 /* conditional execution affects the flags_used */
909 used_reg
[j
][2] |= flag_reg
[j
] = FLAG_0
;
914 used_reg
[j
][2] |= flag_reg
[j
] = FLAG_1
;
919 used_reg
[j
][2] |= flag_reg
[j
] = (FLAG_0
| FLAG_1
);
923 for (i
= 0; f
->operands
[i
]; i
++)
925 flags
= d30v_operand_table
[f
->operands
[i
]].flags
;
926 shift
= 12 - d30v_operand_table
[f
->operands
[i
]].position
;
927 bits
= d30v_operand_table
[f
->operands
[i
]].bits
;
931 mask
= 0x7FFFFFFF >> (31 - bits
);
933 if ((flags
& OPERAND_PLUS
) || (flags
& OPERAND_MINUS
))
935 /* this is a post-increment or post-decrement */
936 /* the previous register needs to be marked as modified */
938 shift
= 12 - d30v_operand_table
[f
->operands
[i
-1]].position
;
939 regno
= (ins
>> shift
) & 0x3f;
941 mod_reg
[j
][1] |= 1L << (regno
- 32);
943 mod_reg
[j
][0] |= 1L << regno
;
945 else if (flags
& OPERAND_REG
)
947 regno
= (ins
>> shift
) & mask
;
948 /* the memory write functions don't have a destination register */
949 if ((flags
& OPERAND_DEST
) && !(op
->flags_set
& FLAG_MEM
))
951 /* MODIFIED registers and flags */
952 if (flags
& OPERAND_ACC
)
955 mod_reg
[j
][2] |= FLAG_A0
;
957 mod_reg
[j
][2] |= FLAG_A1
;
961 else if (flags
& OPERAND_FLAG
)
962 mod_reg
[j
][2] |= 1L << regno
;
963 else if (!(flags
& OPERAND_CONTROL
))
967 /* need to check if there are two destination */
968 /* registers, for example ld2w */
969 if (flags
& OPERAND_2REG
)
974 for (r
= regno
; r
<= regno
+ z
; r
++)
977 mod_reg
[j
][1] |= 1L << (r
- 32);
979 mod_reg
[j
][0] |= 1L << r
;
985 /* USED, but not modified registers and flags */
986 if (flags
& OPERAND_ACC
)
989 used_reg
[j
][2] |= FLAG_A0
;
991 used_reg
[j
][2] |= FLAG_A1
;
995 else if (flags
& OPERAND_FLAG
)
996 used_reg
[j
][2] |= 1L << regno
;
997 else if (!(flags
& OPERAND_CONTROL
))
1001 /* need to check if there are two source */
1002 /* registers, for example st2w */
1003 if (flags
& OPERAND_2REG
)
1008 for (r
= regno
; r
<= regno
+ z
; r
++)
1011 used_reg
[j
][1] |= 1L << (r
- 32);
1013 used_reg
[j
][0] |= 1L << r
;
1021 flags_set1
= op1
->op
->flags_set
;
1022 flags_set2
= op2
->op
->flags_set
;
1023 flags_used1
= op1
->op
->flags_used
;
1024 flags_used2
= op2
->op
->flags_used
;
1026 /* ST2W/ST4HB combined with ADDppp/SUBppp is illegal. */
1027 if (((flags_set1
& (FLAG_MEM
| FLAG_2WORD
)) == (FLAG_MEM
| FLAG_2WORD
)
1028 && (flags_used2
& FLAG_ADDSUBppp
) != 0)
1029 || ((flags_set2
& (FLAG_MEM
| FLAG_2WORD
)) == (FLAG_MEM
| FLAG_2WORD
)
1030 && (flags_used1
& FLAG_ADDSUBppp
) != 0))
1033 /* Load instruction combined with half-word multiply is illegal. */
1034 if (((flags_used1
& FLAG_MEM
) != 0 && (flags_used2
& FLAG_MUL16
))
1035 || ((flags_used2
& FLAG_MEM
) != 0 && (flags_used1
& FLAG_MUL16
)))
1038 /* Specifically allow add || add by removing carry, overflow bits dependency.
1039 This is safe, even if an addc follows since the IU takes the argument in
1040 the right container, and it writes its results last.
1041 However, don't paralellize add followed by addc or sub followed by
1044 if (mod_reg
[0][2] == FLAG_CVVA
&& mod_reg
[1][2] == FLAG_CVVA
1045 && (used_reg
[0][2] & ~flag_reg
[0]) == 0
1046 && (used_reg
[1][2] & ~flag_reg
[1]) == 0
1047 && op1
->op
->unit
== EITHER
&& op2
->op
->unit
== EITHER
)
1049 mod_reg
[0][2] = mod_reg
[1][2] = 0;
1052 for (j
= 0; j
< 3; j
++)
1054 /* If the second instruction depends on the first, we obviously
1055 cannot parallelize. Note, the mod flag implies use, so
1056 check that as well. */
1057 /* If flag_explicitly_parallel is set, then the case of the
1058 second instruction using a register the first instruction
1059 modifies is assumed to be okay; we trust the human. We
1060 don't trust the human if both instructions modify the same
1061 register but we do trust the human if they modify the same
1063 if (flag_explicitly_parallel
)
1065 if ((j
< 2) && (mod_reg
[0][j
] & mod_reg
[1][j
]) != 0)
1069 if ((mod_reg
[0][j
] & (mod_reg
[1][j
] | used_reg
[1][j
])) != 0)
1078 /* This is the main entry point for the machine-dependent assembler. str points to a
1079 machine-dependent instruction. This function is supposed to emit the frags/bytes
1080 it assembles to. For the D30V, it mostly handles the special VLIW parsing and packing
1081 and leaves the difficult stuff to do_assemble(). */
1083 static long long prev_insn
= -1;
1084 static struct d30v_insn prev_opcode
;
1085 static subsegT prev_subseg
;
1086 static segT prev_seg
= 0;
1092 struct d30v_insn opcode
;
1094 exec_type_enum extype
= EXEC_UNKNOWN
; /* execution type; parallel, etc */
1095 static exec_type_enum etype
= EXEC_UNKNOWN
; /* saved extype. used for multiline instructions */
1098 if ((prev_insn
!= -1) && prev_seg
1099 && ((prev_seg
!= now_seg
) || (prev_subseg
!= now_subseg
)))
1102 if (d30v_current_align
< 3)
1103 d30v_align (3, NULL
, d30v_last_label
);
1104 else if (d30v_current_align
> 3)
1105 d30v_current_align
= 3;
1106 d30v_last_label
= NULL
;
1108 flag_explicitly_parallel
= 0;
1110 if (etype
== EXEC_UNKNOWN
)
1112 /* look for the special multiple instruction separators */
1113 str2
= strstr (str
, "||");
1116 extype
= EXEC_PARALLEL
;
1121 str2
= strstr (str
, "->");
1126 str2
= strstr (str
, "<-");
1128 extype
= EXEC_REVSEQ
;
1131 /* str2 points to the separator, if one */
1136 /* if two instructions are present and we already have one saved
1137 then first write it out */
1140 /* assemble first instruction and save it */
1141 prev_insn
= do_assemble (str
, &prev_opcode
, 1, 0);
1142 if (prev_insn
== -1)
1143 as_fatal (_("Cannot assemble instruction"));
1144 if (prev_opcode
.form
->form
>= LONG
)
1145 as_fatal (_("First opcode is long. Unable to mix instructions as specified."));
1146 fixups
= fixups
->next
;
1149 prev_subseg
= now_subseg
;
1153 insn
= do_assemble (str
, &opcode
,
1154 (extype
!= EXEC_UNKNOWN
|| etype
!= EXEC_UNKNOWN
),
1155 extype
== EXEC_PARALLEL
);
1158 if (extype
!= EXEC_UNKNOWN
)
1163 as_fatal (_("Cannot assemble instruction"));
1166 if (etype
!= EXEC_UNKNOWN
)
1169 etype
= EXEC_UNKNOWN
;
1172 /* Word multiply instructions must not be followed by either a load or a
1173 16-bit multiply instruction in the next cycle. */
1174 if ( (extype
!= EXEC_REVSEQ
)
1176 && (opcode
.op
->flags_used
& (FLAG_MEM
| FLAG_MUL16
)))
1178 /* However, load and multiply should able to be combined in a parallel
1179 operation, so check for that first. */
1181 && (opcode
.op
->flags_used
& FLAG_MEM
)
1182 && opcode
.form
->form
< LONG
1183 && (extype
== EXEC_PARALLEL
|| (Optimizing
&& extype
== EXEC_UNKNOWN
))
1184 && parallel_ok (&prev_opcode
, (long)prev_insn
,
1185 &opcode
, (long)insn
, extype
)
1186 && write_2_short (&prev_opcode
, (long)prev_insn
,
1187 &opcode
, (long)insn
, extype
, fixups
) == 0)
1189 /* no instructions saved */
1195 /* Can't parallelize, flush previous instruction and emit a word of NOPS,
1196 unless the previous instruction is a NOP, in whcih case just flush it,
1197 as this will generate a word of NOPs for us. */
1199 if (prev_insn
!= -1 && (strcmp (prev_opcode
.op
->name
, "nop") == 0))
1210 d30v_number_to_chars (f
, NOP2
, 8);
1211 if (warn_nops
== NOP_ALL
|| warn_nops
== NOP_MULTIPLY
)
1213 if (opcode
.op
->flags_used
& FLAG_MEM
)
1214 as_warn (_("word of NOPs added between word multiply and load"));
1216 as_warn (_("word of NOPs added between word multiply and 16-bit multiply"));
1219 extype
= EXEC_UNKNOWN
;
1222 else if ( (extype
== EXEC_REVSEQ
)
1224 && (prev_opcode
.op
->flags_used
& (FLAG_MEM
| FLAG_MUL16
)))
1226 /* Can't parallelize, flush current instruction and emit a word of NOPS */
1227 write_1_short (& opcode
, (long) insn
, fixups
->next
->next
);
1229 if (strcmp (opcode
.op
->name
, "nop") != 0)
1234 d30v_number_to_chars (f
, NOP2
, 8);
1235 if (warn_nops
== NOP_ALL
|| warn_nops
== NOP_MULTIPLY
)
1237 if (opcode
.op
->flags_used
& FLAG_MEM
)
1238 as_warn (_("word of NOPs added between word multiply and load"));
1240 as_warn (_("word of NOPs added between word multiply and 16-bit multiply"));
1244 /* Make the previous instruction the current one. */
1245 extype
= EXEC_UNKNOWN
;
1248 now_subseg
= prev_subseg
;
1250 cur_mul32_p
= prev_mul32_p
;
1254 /* If this is a long instruction, write it and any previous short instruction. */
1255 if (opcode
.form
->form
>= LONG
)
1257 if (extype
!= EXEC_UNKNOWN
)
1258 as_fatal (_("Unable to mix instructions as specified"));
1260 write_long (&opcode
, insn
, fixups
);
1263 else if ((prev_insn
!= -1) &&
1264 (write_2_short (&prev_opcode
, (long)prev_insn
, &opcode
, (long)insn
, extype
, fixups
) == 0))
1266 /* No instructions saved. */
1271 if (extype
!= EXEC_UNKNOWN
)
1272 as_fatal (_("Unable to mix instructions as specified"));
1274 /* Save off last instruction so it may be packed on next pass. */
1275 memcpy (&prev_opcode
, &opcode
, sizeof (prev_opcode
));
1278 prev_subseg
= now_subseg
;
1279 fixups
= fixups
->next
;
1284 /* do_assemble assembles a single instruction and returns an opcode */
1285 /* it returns -1 (an invalid opcode) on error */
1288 do_assemble (str
, opcode
, shortp
, is_parallel
)
1290 struct d30v_insn
*opcode
;
1294 unsigned char *op_start
, *save
;
1295 unsigned char *op_end
;
1297 int cmp_hack
, nlen
= 0, fsize
= (shortp
? FORCE_SHORT
: 0);
1298 expressionS myops
[6];
1301 /* Drop leading whitespace */
1305 /* find the opcode end */
1306 for (op_start
= op_end
= (unsigned char *) (str
);
1310 && !is_end_of_line
[*op_end
] && *op_end
!= ' ';
1313 name
[nlen
] = tolower (op_start
[nlen
]);
1322 /* if there is an execution condition code, handle it */
1326 while ( (i
< ECC_MAX
) && strncasecmp (d30v_ecc_names
[i
],op_end
+1,2))
1332 strncpy (tmp
,op_end
+1,2);
1334 as_fatal (_("unknown condition code: %s"),tmp
);
1337 /* printf("condition code=%d\n",i); */
1342 opcode
->ecc
= ECC_AL
;
1345 /* CMP and CMPU change their name based on condition codes */
1346 if (!strncmp (name
,"cmp",3))
1349 char **str
= (char **)d30v_cc_names
;
1355 for (i
=1; *str
&& strncmp (*str
,&name
[p
],2); i
++, str
++)
1358 /* cmpu only supports some condition codes */
1364 as_fatal (_("cmpu doesn't support condition code %s"),&name
[p
]);
1371 as_fatal (_("unknown condition code: %s"),&name
[p
]);
1380 /* printf("cmp_hack=%d\n",cmp_hack); */
1382 /* need to look for .s or .l */
1383 if (name
[nlen
-2] == '.')
1385 switch (name
[nlen
-1])
1388 fsize
= FORCE_SHORT
;
1397 /* find the first opcode with the proper name */
1398 opcode
->op
= (struct d30v_opcode
*)hash_find (d30v_hash
, name
);
1399 if (opcode
->op
== NULL
)
1400 as_fatal (_("unknown opcode: %s"),name
);
1402 save
= input_line_pointer
;
1403 input_line_pointer
= op_end
;
1404 while (!(opcode
->form
= find_format (opcode
->op
, myops
, fsize
, cmp_hack
)))
1407 if (strcmp (opcode
->op
->name
,name
))
1408 as_fatal (_("operands for opcode `%s' do not match any valid format"), name
);
1410 input_line_pointer
= save
;
1412 insn
= build_insn (opcode
, myops
);
1414 /* Propigate multiply status */
1417 if (is_parallel
&& prev_mul32_p
)
1421 prev_mul32_p
= cur_mul32_p
;
1422 cur_mul32_p
= (opcode
->op
->flags_used
& FLAG_MUL32
) != 0;
1426 /* Propagate left_kills_right status */
1429 prev_left_kills_right_p
= cur_left_kills_right_p
;
1431 if (opcode
->op
->flags_set
& FLAG_LKR
)
1433 cur_left_kills_right_p
= 1;
1435 if (strcmp (opcode
->op
->name
, "mvtsys") == 0)
1437 /* Left kills right for only mvtsys only for PSW/PSWH/PSWL/flags target. */
1438 if ((myops
[0].X_op
== O_register
) &&
1439 ((myops
[0].X_add_number
== OPERAND_CONTROL
) || /* psw */
1440 (myops
[0].X_add_number
== OPERAND_CONTROL
+MAX_CONTROL_REG
+2) || /* pswh */
1441 (myops
[0].X_add_number
== OPERAND_CONTROL
+MAX_CONTROL_REG
+1) || /* pswl */
1442 (myops
[0].X_add_number
== OPERAND_FLAG
+0) || /* f0 */
1443 (myops
[0].X_add_number
== OPERAND_FLAG
+1) || /* f1 */
1444 (myops
[0].X_add_number
== OPERAND_FLAG
+2) || /* f2 */
1445 (myops
[0].X_add_number
== OPERAND_FLAG
+3) || /* f3 */
1446 (myops
[0].X_add_number
== OPERAND_FLAG
+4) || /* f4 */
1447 (myops
[0].X_add_number
== OPERAND_FLAG
+5) || /* f5 */
1448 (myops
[0].X_add_number
== OPERAND_FLAG
+6) || /* f6 */
1449 (myops
[0].X_add_number
== OPERAND_FLAG
+7))) /* f7 */
1451 cur_left_kills_right_p
= 1;
1455 /* Other mvtsys target registers don't kill right instruction. */
1456 cur_left_kills_right_p
= 0;
1461 cur_left_kills_right_p
= 0;
1469 /* find_format() gets a pointer to an entry in the format table.
1470 It must look at all formats for an opcode and use the operands
1471 to choose the correct one. Returns NULL on error. */
1473 static struct d30v_format
*
1474 find_format (opcode
, myops
, fsize
, cmp_hack
)
1475 struct d30v_opcode
*opcode
;
1476 expressionS myops
[];
1480 int numops
, match
, index
, i
=0, j
, k
;
1481 struct d30v_format
*fm
;
1483 /* Get all the operands and save them as expressions. */
1484 numops
= get_operands (myops
, cmp_hack
);
1486 while ((index
= opcode
->format
[i
++]) != 0)
1488 if (fsize
== FORCE_SHORT
&& index
>= LONG
)
1491 if (fsize
== FORCE_LONG
&& index
< LONG
)
1494 fm
= (struct d30v_format
*)&d30v_format_table
[index
];
1496 while (fm
->form
== index
)
1499 /* Now check the operands for compatibility. */
1500 for (j
= 0; match
&& fm
->operands
[j
]; j
++)
1502 int flags
= d30v_operand_table
[fm
->operands
[j
]].flags
;
1503 int bits
= d30v_operand_table
[fm
->operands
[j
]].bits
;
1504 int X_op
= myops
[j
].X_op
;
1505 int num
= myops
[j
].X_add_number
;
1507 if (flags
& OPERAND_SPECIAL
)
1509 else if (X_op
== O_illegal
)
1511 else if (flags
& OPERAND_REG
)
1513 if (X_op
!= O_register
1514 || ((flags
& OPERAND_ACC
) && !(num
& OPERAND_ACC
))
1515 || ((flags
& OPERAND_FLAG
) && !(num
& OPERAND_FLAG
))
1516 || ((flags
& OPERAND_CONTROL
)
1517 && !(num
& (OPERAND_CONTROL
| OPERAND_FLAG
))))
1522 else if (((flags
& OPERAND_MINUS
)
1523 && (X_op
!= O_absent
|| num
!= OPERAND_MINUS
))
1524 || ((flags
& OPERAND_PLUS
)
1525 && (X_op
!= O_absent
|| num
!= OPERAND_PLUS
))
1526 || ((flags
& OPERAND_ATMINUS
)
1527 && (X_op
!= O_absent
|| num
!= OPERAND_ATMINUS
))
1528 || ((flags
& OPERAND_ATPAR
)
1529 && (X_op
!= O_absent
|| num
!= OPERAND_ATPAR
))
1530 || ((flags
& OPERAND_ATSIGN
)
1531 && (X_op
!= O_absent
|| num
!= OPERAND_ATSIGN
)))
1535 else if (flags
& OPERAND_NUM
)
1537 /* A number can be a constant or symbol expression. */
1539 /* Turn an expression into a symbol for later resolution. */
1540 if (X_op
!= O_absent
&& X_op
!= O_constant
1541 && X_op
!= O_symbol
&& X_op
!= O_register
1544 symbolS
*sym
= make_expr_symbol (&myops
[j
]);
1545 myops
[j
].X_op
= X_op
= O_symbol
;
1546 myops
[j
].X_add_symbol
= sym
;
1547 myops
[j
].X_add_number
= num
= 0;
1550 if (fm
->form
>= LONG
)
1552 /* If we're testing for a LONG format, either fits. */
1553 if (X_op
!= O_constant
&& X_op
!= O_symbol
)
1556 else if (fm
->form
< LONG
1557 && ((fsize
== FORCE_SHORT
&& X_op
== O_symbol
)
1558 || (fm
->form
== SHORT_D2
&& j
== 0)))
1560 /* This is the tricky part. Will the constant or symbol
1561 fit into the space in the current format? */
1562 else if (X_op
== O_constant
)
1564 if (check_range (num
, bits
, flags
))
1567 else if (X_op
== O_symbol
1568 && S_IS_DEFINED (myops
[j
].X_add_symbol
)
1569 && S_GET_SEGMENT (myops
[j
].X_add_symbol
) == now_seg
1570 && opcode
->reloc_flag
== RELOC_PCREL
)
1572 /* If the symbol is defined, see if the value will fit
1573 into the form we're considering. */
1577 /* Calculate the current address by running through the
1578 previous frags and adding our current offset. */
1580 for (f
= frchain_now
->frch_root
; f
; f
= f
->fr_next
)
1581 value
+= f
->fr_fix
+ f
->fr_offset
;
1582 value
= (S_GET_VALUE (myops
[j
].X_add_symbol
) - value
1583 - (obstack_next_free (&frchain_now
->frch_obstack
)
1584 - frag_now
->fr_literal
));
1585 if (check_range (value
, bits
, flags
))
1592 /* printf("through the loop: match=%d\n",match); */
1593 /* We're only done if the operands matched so far AND there
1594 are no more to check. */
1595 if (match
&& myops
[j
].X_op
== 0)
1597 fm
= (struct d30v_format
*)&d30v_format_table
[++k
];
1599 /* printf("trying another format: i=%d\n",i); */
1604 /* if while processing a fixup, a reloc really needs to be created */
1605 /* then it is done here */
1608 tc_gen_reloc (seg
, fixp
)
1613 reloc
= (arelent
*) xmalloc (sizeof (arelent
));
1614 reloc
->sym_ptr_ptr
= &fixp
->fx_addsy
->bsym
;
1615 reloc
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
1616 reloc
->howto
= bfd_reloc_type_lookup (stdoutput
, fixp
->fx_r_type
);
1617 if (reloc
->howto
== (reloc_howto_type
*) NULL
)
1619 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
1620 _("reloc %d not supported by object file format"), (int)fixp
->fx_r_type
);
1623 reloc
->addend
= fixp
->fx_addnumber
;
1628 md_estimate_size_before_relax (fragp
, seg
)
1637 md_pcrel_from_section (fixp
, sec
)
1641 if (fixp
->fx_addsy
!= (symbolS
*)NULL
&& (!S_IS_DEFINED (fixp
->fx_addsy
) ||
1642 (S_GET_SEGMENT (fixp
->fx_addsy
) != sec
)))
1644 return fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
1648 md_apply_fix3 (fixp
, valuep
, seg
)
1654 unsigned long insn
, insn2
;
1657 if (fixp
->fx_addsy
== (symbolS
*) NULL
)
1662 else if (fixp
->fx_pcrel
)
1668 value
= fixp
->fx_offset
;
1669 if (fixp
->fx_subsy
!= (symbolS
*) NULL
)
1671 if (S_GET_SEGMENT (fixp
->fx_subsy
) == absolute_section
)
1672 value
-= S_GET_VALUE (fixp
->fx_subsy
);
1675 /* We don't actually support subtracting a symbol. */
1676 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
1677 _("expression too complex"));
1682 /* Fetch the instruction, insert the fully resolved operand
1683 value, and stuff the instruction back again. */
1684 where
= fixp
->fx_frag
->fr_literal
+ fixp
->fx_where
;
1685 insn
= bfd_getb32 ((unsigned char *) where
);
1687 switch (fixp
->fx_r_type
)
1690 /* Caused by a bad .byte directive. */
1691 as_fatal (_("line %d: unable to place address of symbol '%s' into a byte"),
1692 fixp
->fx_line
, S_GET_NAME (fixp
->fx_addsy
));
1696 /* Caused by a bad .short directive. */
1697 as_fatal (_("line %d: unable to place address of symbol '%s' into a short"),
1698 fixp
->fx_line
, S_GET_NAME (fixp
->fx_addsy
));
1702 /* Caused by a bad .quad directive. */
1703 as_fatal (_("line %d: unable to place address of symbol '%s' into a .quad"),
1704 fixp
->fx_line
, S_GET_NAME (fixp
->fx_addsy
));
1707 case BFD_RELOC_D30V_6
:
1708 check_size (value
, 6, fixp
->fx_file
, fixp
->fx_line
);
1709 insn
|= value
& 0x3F;
1710 bfd_putb32 ((bfd_vma
) insn
, (unsigned char *) where
);
1713 case BFD_RELOC_D30V_9_PCREL
:
1714 if (fixp
->fx_where
& 0x7)
1719 fixp
->fx_r_type
= BFD_RELOC_D30V_9_PCREL_R
;
1721 check_size (value
, 9, fixp
->fx_file
, fixp
->fx_line
);
1722 insn
|= ((value
>> 3) & 0x3F) << 12;
1723 bfd_putb32 ((bfd_vma
) insn
, (unsigned char *) where
);
1726 case BFD_RELOC_D30V_15
:
1727 check_size (value
, 15, fixp
->fx_file
, fixp
->fx_line
);
1728 insn
|= (value
>> 3) & 0xFFF;
1729 bfd_putb32 ((bfd_vma
) insn
, (unsigned char *) where
);
1732 case BFD_RELOC_D30V_15_PCREL
:
1733 if (fixp
->fx_where
& 0x7)
1738 fixp
->fx_r_type
= BFD_RELOC_D30V_15_PCREL_R
;
1740 check_size (value
, 15, fixp
->fx_file
, fixp
->fx_line
);
1741 insn
|= (value
>> 3) & 0xFFF;
1742 bfd_putb32 ((bfd_vma
) insn
, (unsigned char *) where
);
1745 case BFD_RELOC_D30V_21
:
1746 check_size (value
, 21, fixp
->fx_file
, fixp
->fx_line
);
1747 insn
|= (value
>> 3) & 0x3FFFF;
1748 bfd_putb32 ((bfd_vma
) insn
, (unsigned char *) where
);
1751 case BFD_RELOC_D30V_21_PCREL
:
1752 if (fixp
->fx_where
& 0x7)
1757 fixp
->fx_r_type
= BFD_RELOC_D30V_21_PCREL_R
;
1759 check_size (value
, 21, fixp
->fx_file
, fixp
->fx_line
);
1760 insn
|= (value
>> 3) & 0x3FFFF;
1761 bfd_putb32 ((bfd_vma
) insn
, (unsigned char *) where
);
1764 case BFD_RELOC_D30V_32
:
1765 insn2
= bfd_getb32 ((unsigned char *) where
+ 4);
1766 insn
|= (value
>> 26) & 0x3F; /* top 6 bits */
1767 insn2
|= ((value
& 0x03FC0000) << 2); /* next 8 bits */
1768 insn2
|= value
& 0x0003FFFF; /* bottom 18 bits */
1769 bfd_putb32 ((bfd_vma
) insn
, (unsigned char *) where
);
1770 bfd_putb32 ((bfd_vma
) insn2
, (unsigned char *) where
+ 4);
1773 case BFD_RELOC_D30V_32_PCREL
:
1774 insn2
= bfd_getb32 ((unsigned char *) where
+ 4);
1775 insn
|= (value
>> 26) & 0x3F; /* top 6 bits */
1776 insn2
|= ((value
& 0x03FC0000) << 2); /* next 8 bits */
1777 insn2
|= value
& 0x0003FFFF; /* bottom 18 bits */
1778 bfd_putb32 ((bfd_vma
) insn
, (unsigned char *) where
);
1779 bfd_putb32 ((bfd_vma
) insn2
, (unsigned char *) where
+ 4);
1783 bfd_putb32 ((bfd_vma
) value
, (unsigned char *) where
);
1787 as_fatal (_("line %d: unknown relocation type: 0x%x"),fixp
->fx_line
,fixp
->fx_r_type
);
1793 /* d30v_cleanup() is called after the assembler has finished parsing the input
1794 file or after a label is defined. Because the D30V assembler sometimes saves short
1795 instructions to see if it can package them with the next instruction, there may
1796 be a short instruction that still needs written. */
1803 if (prev_insn
!= -1)
1806 subseg
= now_subseg
;
1807 subseg_set (prev_seg
, prev_subseg
);
1808 write_1_short (&prev_opcode
, (long)prev_insn
, fixups
->next
);
1809 subseg_set (seg
, subseg
);
1816 d30v_number_to_chars (buf
, value
, n
)
1817 char *buf
; /* Return 'nbytes' of chars here. */
1818 long long value
; /* The value of the bits. */
1819 int n
; /* Number of bytes in the output. */
1823 buf
[n
] = value
& 0xff;
1829 /* This function is called at the start of every line. */
1830 /* it checks to see if the first character is a '.' */
1831 /* which indicates the start of a pseudo-op. If it is, */
1832 /* then write out any unwritten instructions */
1837 char *c
= input_line_pointer
;
1839 while (isspace (*c
))
1847 check_size (value
, bits
, file
, line
)
1860 max
= (1 << (bits
- 1)) - 1;
1863 as_bad_where (file
, line
, _("value too large to fit in %d bits"), bits
);
1868 /* d30v_frob_label() is called when after a label is recognized. */
1871 d30v_frob_label (lab
)
1874 /* Emit any pending instructions. */
1877 /* Update the label's address with the current output pointer. */
1878 lab
->sy_frag
= frag_now
;
1879 S_SET_VALUE (lab
, (valueT
) frag_now_fix ());
1881 /* Record this label for future adjustment after we find out what
1882 kind of data it references, and the required alignment therewith. */
1883 d30v_last_label
= lab
;
1886 /* Hook into cons for capturing alignment changes. */
1889 d30v_cons_align (size
)
1895 while ((size
>>= 1) != 0)
1898 if (d30v_current_align
< log_size
)
1899 d30v_align (log_size
, (char *) NULL
, NULL
);
1900 else if (d30v_current_align
> log_size
)
1901 d30v_current_align
= log_size
;
1902 d30v_last_label
= NULL
;
1905 /* Called internally to handle all alignment needs. This takes care
1906 of eliding calls to frag_align if'n the cached current alignment
1907 says we've already got it, as well as taking care of the auto-aligning
1911 d30v_align (n
, pfill
, label
)
1916 /* The front end is prone to changing segments out from under us
1917 temporarily when -g is in effect. */
1918 int switched_seg_p
= (d30v_current_align_seg
!= now_seg
);
1920 /* Do not assume that if 'd30v_current_align >= n' and
1921 '! switched_seg_p' that it is safe to avoid performing
1922 this alignement request. The alignment of the current frag
1923 can be changed under our feet, for example by a .ascii
1924 directive in the source code. cf testsuite/gas/d30v/reloc.s */
1931 && (bfd_get_section_flags (stdoutput
, now_seg
) & SEC_CODE
) != 0)
1933 static char const nop
[4] = { 0x00, 0xf0, 0x00, 0x00 };
1935 /* First, make sure we're on a four-byte boundary, in case
1936 someone has been putting .byte values the text section. */
1937 if (d30v_current_align
< 2 || switched_seg_p
)
1938 frag_align (2, 0, 0);
1939 frag_align_pattern (n
, nop
, sizeof nop
, 0);
1942 frag_align (n
, 0, 0);
1945 frag_align (n
, *pfill
, 0);
1947 if (!switched_seg_p
)
1948 d30v_current_align
= n
;
1953 int label_seen
= false;
1954 struct frag
* old_frag
;
1958 assert (S_GET_SEGMENT (label
) == now_seg
);
1960 old_frag
= label
->sy_frag
;
1961 old_value
= S_GET_VALUE (label
);
1962 new_value
= (valueT
) frag_now_fix ();
1964 /* It is possible to have more than one label at a particular
1965 address, especially if debugging is enabled, so we must
1966 take care to adjust all the labels at this address in this
1967 fragment. To save time we search from the end of the symbol
1968 list, backwards, since the symbols we are interested in are
1969 almost certainly the ones that were most recently added.
1970 Also to save time we stop searching once we have seen at least
1971 one matching label, and we encounter a label that is no longer
1972 in the target fragment. Note, this search is guaranteed to
1973 find at least one match when sym == label, so no special case
1974 code is necessary. */
1975 for (sym
= symbol_lastP
; sym
!= NULL
; sym
= sym
->sy_previous
)
1977 if (sym
->sy_frag
== old_frag
&& S_GET_VALUE (sym
) == old_value
)
1980 sym
->sy_frag
= frag_now
;
1981 S_SET_VALUE (sym
, new_value
);
1983 else if (label_seen
&& sym
->sy_frag
!= old_frag
)
1988 record_alignment (now_seg
, n
);
1991 /* Handle the .align pseudo-op. This aligns to a power of two. We
1992 hook here to latch the current alignment. */
1995 s_d30v_align (ignore
)
1999 char fill
, *pfill
= NULL
;
2000 long max_alignment
= 15;
2002 align
= get_absolute_expression ();
2003 if (align
> max_alignment
)
2005 align
= max_alignment
;
2006 as_warn (_("Alignment too large: %d assumed"), align
);
2010 as_warn (_("Alignment negative: 0 assumed"));
2014 if (*input_line_pointer
== ',')
2016 input_line_pointer
++;
2017 fill
= get_absolute_expression ();
2021 d30v_last_label
= NULL
;
2022 d30v_align (align
, pfill
, NULL
);
2024 demand_empty_rest_of_line ();
2027 /* Handle the .text pseudo-op. This is like the usual one, but it
2028 clears the saved last label and resets known alignment. */
2036 d30v_last_label
= NULL
;
2037 d30v_current_align
= 0;
2038 d30v_current_align_seg
= now_seg
;
2041 /* Handle the .data pseudo-op. This is like the usual one, but it
2042 clears the saved last label and resets known alignment. */
2049 d30v_last_label
= NULL
;
2050 d30v_current_align
= 0;
2051 d30v_current_align_seg
= now_seg
;
2054 /* Handle the .section pseudo-op. This is like the usual one, but it
2055 clears the saved last label and resets known alignment. */
2058 s_d30v_section (ignore
)
2061 obj_elf_section (ignore
);
2062 d30v_last_label
= NULL
;
2063 d30v_current_align
= 0;
2064 d30v_current_align_seg
= now_seg
;