1 /* tc-h8300.c -- Assemble code for the Renesas H8/300
2 Copyright (C) 1991-2016 Free Software Foundation, Inc.
4 This file is part of GAS, the GNU Assembler.
6 GAS is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3, or (at your option)
11 GAS is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GAS; see the file COPYING. If not, write to the Free
18 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
21 /* Written By Steve Chamberlain <sac@cygnus.com>. */
25 #include "dwarf2dbg.h"
28 #define h8_opcodes ops
29 #include "opcode/h8300.h"
30 #include "safe-ctype.h"
36 const char comment_chars
[] = ";";
37 const char line_comment_chars
[] = "#";
39 const char line_separator_chars
[] = "!";
41 const char line_separator_chars
[] = "";
44 static void sbranch (int);
45 static void h8300hmode (int);
46 static void h8300smode (int);
47 static void h8300hnmode (int);
48 static void h8300snmode (int);
49 static void h8300sxmode (int);
50 static void h8300sxnmode (int);
51 static void pint (int);
58 static int default_mach
= bfd_mach_h8300
;
60 #define PSIZE (Hmode && !Nmode ? L_32 : L_16)
62 static int bsize
= L_8
; /* Default branch displacement. */
70 const struct h8_opcode
*opcode
;
73 static struct h8_instruction
*h8_instructions
;
76 h8300hmode (int arg ATTRIBUTE_UNUSED
)
80 if (!bfd_set_arch_mach (stdoutput
, bfd_arch_h8300
, bfd_mach_h8300h
))
81 as_warn (_("could not set architecture and machine"));
85 h8300smode (int arg ATTRIBUTE_UNUSED
)
89 if (!bfd_set_arch_mach (stdoutput
, bfd_arch_h8300
, bfd_mach_h8300s
))
90 as_warn (_("could not set architecture and machine"));
94 h8300hnmode (int arg ATTRIBUTE_UNUSED
)
99 if (!bfd_set_arch_mach (stdoutput
, bfd_arch_h8300
, bfd_mach_h8300hn
))
100 as_warn (_("could not set architecture and machine"));
104 h8300snmode (int arg ATTRIBUTE_UNUSED
)
109 if (!bfd_set_arch_mach (stdoutput
, bfd_arch_h8300
, bfd_mach_h8300sn
))
110 as_warn (_("could not set architecture and machine"));
114 h8300sxmode (int arg ATTRIBUTE_UNUSED
)
119 if (!bfd_set_arch_mach (stdoutput
, bfd_arch_h8300
, bfd_mach_h8300sx
))
120 as_warn (_("could not set architecture and machine"));
124 h8300sxnmode (int arg ATTRIBUTE_UNUSED
)
130 if (!bfd_set_arch_mach (stdoutput
, bfd_arch_h8300
, bfd_mach_h8300sxn
))
131 as_warn (_("could not set architecture and machine"));
141 pint (int arg ATTRIBUTE_UNUSED
)
143 cons (Hmode
? 4 : 2);
146 /* Like obj_elf_section, but issues a warning for new
147 sections which do not have an attribute specification. */
150 h8300_elf_section (int push
)
152 static const char * known_data_sections
[] = { ".rodata", ".tdata", ".tbss" };
153 static const char * known_data_prefixes
[] = { ".debug", ".zdebug", ".gnu.warning" };
154 char * saved_ilp
= input_line_pointer
;
157 name
= obj_elf_section_name ();
161 if (* input_line_pointer
!= ','
162 && bfd_get_section_by_name (stdoutput
, name
) == NULL
)
166 /* Ignore this warning for well known data sections. */
167 for (i
= ARRAY_SIZE (known_data_sections
); i
--;)
168 if (strcmp (name
, known_data_sections
[i
]) == 0)
172 for (i
= ARRAY_SIZE (known_data_prefixes
); i
--;)
173 if (strncmp (name
, known_data_prefixes
[i
],
174 strlen (known_data_prefixes
[i
])) == 0)
178 as_warn (_("new section '%s' defined without attributes - this might cause problems"), name
);
181 /* FIXME: We ought to free the memory allocated by obj_elf_section_name()
182 for 'name', but we do not know if it was taken from the obstack, via
183 demand_copy_C_string(), or xmalloc()ed. */
184 input_line_pointer
= saved_ilp
;
185 obj_elf_section (push
);
188 /* This table describes all the machine specific pseudo-ops the assembler
189 has to support. The fields are:
190 pseudo-op name without dot
191 function to call to execute this pseudo-op
192 Integer arg to pass to the function. */
194 const pseudo_typeS md_pseudo_table
[] =
196 {"h8300h", h8300hmode
, 0},
197 {"h8300hn", h8300hnmode
, 0},
198 {"h8300s", h8300smode
, 0},
199 {"h8300sn", h8300snmode
, 0},
200 {"h8300sx", h8300sxmode
, 0},
201 {"h8300sxn", h8300sxnmode
, 0},
202 {"sbranch", sbranch
, L_8
},
203 {"lbranch", sbranch
, L_16
},
209 {"form", listing_psize
, 0},
210 {"heading", listing_title
, 0},
211 {"import", s_ignore
, 0},
212 {"page", listing_eject
, 0},
213 {"program", s_ignore
, 0},
216 {"section", h8300_elf_section
, 0},
217 {"section.s", h8300_elf_section
, 0},
218 {"sect", h8300_elf_section
, 0},
219 {"sect.s", h8300_elf_section
, 0},
225 const char EXP_CHARS
[] = "eE";
227 /* Chars that mean this number is a floating point constant
230 const char FLT_CHARS
[] = "rRsSfFdDxXpP";
232 static struct hash_control
*opcode_hash_control
; /* Opcode mnemonics. */
234 /* This function is called once, at assembler startup time. This
235 should set up all the tables, etc. that the MD part of the assembler
241 unsigned int nopcodes
;
242 struct h8_opcode
*p
, *p1
;
243 struct h8_instruction
*pi
;
244 char prev_buffer
[100];
247 if (!bfd_set_arch_mach (stdoutput
, bfd_arch_h8300
, default_mach
))
248 as_warn (_("could not set architecture and machine"));
250 opcode_hash_control
= hash_new ();
253 nopcodes
= sizeof (h8_opcodes
) / sizeof (struct h8_opcode
);
255 h8_instructions
= XNEWVEC (struct h8_instruction
, nopcodes
);
257 pi
= h8_instructions
;
259 /* We do a minimum amount of sorting on the opcode table; this is to
260 make it easy to describe the mova instructions without unnecessary
262 Sorting only takes place inside blocks of instructions of the form
263 X/Y, so for example mova/b, mova/w and mova/l can be intermixed. */
266 struct h8_opcode
*first_skipped
= 0;
268 const char *src
= p1
->name
;
273 /* Strip off any . part when inserting the opcode and only enter
274 unique codes into the hash table. */
275 dst
= buffer
= XNEWVEC (char, strlen (src
) + 1);
284 cmplen
= src
- p1
->name
+ 1;
291 hash_insert (opcode_hash_control
, buffer
, (char *) pi
);
292 strcpy (prev_buffer
, buffer
);
295 for (p
= p1
; p
->name
; p
++)
297 /* A negative TIME is used to indicate that we've added this opcode
301 if (strncmp (p
->name
, buffer
, cmplen
) != 0
302 || (p
->name
[cmplen
] != '\0' && p
->name
[cmplen
] != '.'
303 && p
->name
[cmplen
- 1] != '/'))
305 if (first_skipped
== 0)
309 if (strncmp (p
->name
, buffer
, len
) != 0)
311 if (first_skipped
== 0)
317 pi
->size
= p
->name
[len
] == '.' ? p
->name
[len
+ 1] : 0;
320 /* Find the number of operands. */
322 while (pi
->noperands
< 3 && p
->args
.nib
[pi
->noperands
] != (op_type
) E
)
325 /* Find the length of the opcode in bytes. */
327 while (p
->data
.nib
[pi
->length
* 2] != (op_type
) E
)
336 /* Add entry for the NULL vector terminator. */
353 static void clever_message (const struct h8_instruction
*, struct h8_op
*);
354 static void fix_operand_size (struct h8_op
*, int);
355 static void build_bytes (const struct h8_instruction
*, struct h8_op
*);
356 static void do_a_fix_imm (int, int, struct h8_op
*, int, const struct h8_instruction
*);
357 static void check_operand (struct h8_op
*, unsigned int, const char *);
358 static const struct h8_instruction
* get_specific (const struct h8_instruction
*, struct h8_op
*, int) ;
359 static char *get_operands (unsigned, char *, struct h8_op
*);
360 static void get_operand (char **, struct h8_op
*, int);
361 static int parse_reg (char *, op_type
*, unsigned *, int);
362 static char *skip_colonthing (char *, int *);
363 static char *parse_exp (char *, struct h8_op
*);
365 static int constant_fits_size_p (struct h8_op
*, int, int);
369 WREG r0,r1,r2,r3,r4,r5,r6,r7,fp,sp
378 /* Try to parse a reg name. Return the number of chars consumed. */
381 parse_reg (char *src
, op_type
*mode
, unsigned int *reg
, int direction
)
386 /* Cribbed from get_symbol_name. */
387 if (!is_name_beginner (*src
) || *src
== '\001')
390 while ((is_part_of_name (*end
) && *end
!= '.') || *end
== '\001')
394 if (len
== 2 && TOLOWER (src
[0]) == 's' && TOLOWER (src
[1]) == 'p')
396 *mode
= PSIZE
| REG
| direction
;
401 TOLOWER (src
[0]) == 'c' &&
402 TOLOWER (src
[1]) == 'c' &&
403 TOLOWER (src
[2]) == 'r')
410 TOLOWER (src
[0]) == 'e' &&
411 TOLOWER (src
[1]) == 'x' &&
412 TOLOWER (src
[2]) == 'r')
419 TOLOWER (src
[0]) == 'v' &&
420 TOLOWER (src
[1]) == 'b' &&
421 TOLOWER (src
[2]) == 'r')
428 TOLOWER (src
[0]) == 's' &&
429 TOLOWER (src
[1]) == 'b' &&
430 TOLOWER (src
[2]) == 'r')
436 if (len
== 2 && TOLOWER (src
[0]) == 'f' && TOLOWER (src
[1]) == 'p')
438 *mode
= PSIZE
| REG
| direction
;
442 if (len
== 3 && TOLOWER (src
[0]) == 'e' && TOLOWER (src
[1]) == 'r' &&
443 src
[2] >= '0' && src
[2] <= '7')
445 *mode
= L_32
| REG
| direction
;
448 as_warn (_("Reg not valid for H8/300"));
451 if (len
== 2 && TOLOWER (src
[0]) == 'e' && src
[1] >= '0' && src
[1] <= '7')
453 *mode
= L_16
| REG
| direction
;
454 *reg
= src
[1] - '0' + 8;
456 as_warn (_("Reg not valid for H8/300"));
460 if (TOLOWER (src
[0]) == 'r')
462 if (src
[1] >= '0' && src
[1] <= '7')
464 if (len
== 3 && TOLOWER (src
[2]) == 'l')
466 *mode
= L_8
| REG
| direction
;
467 *reg
= (src
[1] - '0') + 8;
470 if (len
== 3 && TOLOWER (src
[2]) == 'h')
472 *mode
= L_8
| REG
| direction
;
473 *reg
= (src
[1] - '0');
478 *mode
= L_16
| REG
| direction
;
479 *reg
= (src
[1] - '0');
489 /* Parse an immediate or address-related constant and store it in OP.
490 If the user also specifies the operand's size, store that size
491 in OP->MODE, otherwise leave it for later code to decide. */
494 parse_exp (char *src
, struct h8_op
*op
)
498 save
= input_line_pointer
;
499 input_line_pointer
= src
;
500 expression (&op
->exp
);
501 if (op
->exp
.X_op
== O_absent
)
502 as_bad (_("missing operand"));
503 src
= input_line_pointer
;
504 input_line_pointer
= save
;
506 return skip_colonthing (src
, &op
->mode
);
510 /* If SRC starts with an explicit operand size, skip it and store the size
511 in *MODE. Leave *MODE unchanged otherwise. */
514 skip_colonthing (char *src
, int *mode
)
520 if (src
[0] == '8' && !ISDIGIT (src
[1]))
522 else if (src
[0] == '2' && !ISDIGIT (src
[1]))
524 else if (src
[0] == '3' && !ISDIGIT (src
[1]))
526 else if (src
[0] == '4' && !ISDIGIT (src
[1]))
528 else if (src
[0] == '5' && !ISDIGIT (src
[1]))
530 else if (src
[0] == '2' && src
[1] == '4' && !ISDIGIT (src
[2]))
532 else if (src
[0] == '3' && src
[1] == '2' && !ISDIGIT (src
[2]))
534 else if (src
[0] == '1' && src
[1] == '6' && !ISDIGIT (src
[2]))
537 as_bad (_("invalid operand size requested"));
539 while (ISDIGIT (*src
))
545 /* The many forms of operand:
548 @Rn Register indirect
549 @(exp[:16], Rn) Register indirect with displacement
553 @aa:16 absolute 16 bit
556 #xx[:size] immediate data
557 @(exp:[8], pc) pc rel
558 @@aa[:8] memory indirect. */
561 constant_fits_width_p (struct h8_op
*operand
, offsetT width
)
565 num
= ((operand
->exp
.X_add_number
& 0xffffffff) ^ 0x80000000) - 0x80000000;
566 return (num
& ~width
) == 0 || (num
| width
) == ~0;
570 constant_fits_size_p (struct h8_op
*operand
, int size
, int no_symbols
)
575 && (operand
->exp
.X_add_symbol
!= 0 || operand
->exp
.X_op_symbol
!= 0))
577 num
= operand
->exp
.X_add_number
& 0xffffffff;
581 return (num
& ~3) == 0;
583 return (num
& ~7) == 0;
585 return num
>= 1 && num
< 8;
587 return (num
& ~15) == 0;
589 return num
>= 1 && num
< 32;
591 num
= (num
^ 0x80000000) - 0x80000000;
592 return (num
& ~0xFF) == 0 || (num
| 0x7F) == ~0;
594 return (num
& ~0xFF) == 0;
596 num
= (num
^ 0x80000000) - 0x80000000;
597 return (num
& ~0xFFFF) == 0 || (num
| 0x7FFF) == ~0;
599 return (num
& ~0xFFFF) == 0;
608 get_operand (char **ptr
, struct h8_op
*op
, int direction
)
617 /* Check for '(' and ')' for instructions ldm and stm. */
618 if (src
[0] == '(' && src
[8] == ')')
621 /* Gross. Gross. ldm and stm have a format not easily handled
622 by get_operand. We deal with it explicitly here. */
623 if (TOLOWER (src
[0]) == 'e' && TOLOWER (src
[1]) == 'r' &&
624 ISDIGIT (src
[2]) && src
[3] == '-' &&
625 TOLOWER (src
[4]) == 'e' && TOLOWER (src
[5]) == 'r' && ISDIGIT (src
[6]))
632 /* Check register pair's validity as per tech note TN-H8*-193A/E
633 from Renesas for H8S and H8SX hardware manual. */
634 if ( !(low
== 0 && (high
== 1 || high
== 2 || high
== 3))
635 && !(low
== 1 && (high
== 2 || high
== 3 || high
== 4) && SXmode
)
636 && !(low
== 2 && (high
== 3 || ((high
== 4 || high
== 5) && SXmode
)))
637 && !(low
== 3 && (high
== 4 || high
== 5 || high
== 6) && SXmode
)
638 && !(low
== 4 && (high
== 5 || high
== 6))
639 && !(low
== 4 && high
== 7 && SXmode
)
640 && !(low
== 5 && (high
== 6 || high
== 7) && SXmode
)
641 && !(low
== 6 && high
== 7 && SXmode
))
642 as_bad (_("Invalid register list for ldm/stm\n"));
644 /* Even sicker. We encode two registers into op->reg. One
645 for the low register to save, the other for the high
646 register to save; we also set the high bit in op->reg
647 so we know this is "very special". */
648 op
->reg
= 0x80000000 | (high
<< 8) | low
;
657 len
= parse_reg (src
, &op
->mode
, &op
->reg
, direction
);
663 int size
= op
->mode
& SIZE
;
668 as_warn (_("mismatch between register and suffix"));
669 op
->mode
= (op
->mode
& ~MODE
) | LOWREG
;
672 if (size
!= L_32
&& size
!= L_16
)
673 as_warn (_("mismatch between register and suffix"));
674 op
->mode
= (op
->mode
& ~MODE
) | LOWREG
;
675 op
->mode
= (op
->mode
& ~SIZE
) | L_16
;
678 op
->mode
= (op
->mode
& ~MODE
) | LOWREG
;
679 if (size
!= L_32
&& size
!= L_8
)
680 as_warn (_("mismatch between register and suffix"));
681 op
->mode
= (op
->mode
& ~MODE
) | LOWREG
;
682 op
->mode
= (op
->mode
& ~SIZE
) | L_8
;
685 as_warn (_("invalid suffix after register."));
699 *ptr
= parse_exp (src
+ 1, op
);
700 if (op
->exp
.X_add_number
>= 0x100)
705 /* FIXME : 2? or 4? */
706 if (op
->exp
.X_add_number
>= 0x400)
707 as_bad (_("address too high for vector table jmp/jsr"));
708 else if (op
->exp
.X_add_number
>= 0x200)
713 op
->exp
.X_add_number
= op
->exp
.X_add_number
/ divisor
- 0x80;
720 if (*src
== '-' || *src
== '+')
722 len
= parse_reg (src
+ 1, &mode
, &num
, direction
);
725 /* Oops, not a reg after all, must be ordinary exp. */
726 op
->mode
= ABS
| direction
;
727 *ptr
= parse_exp (src
, op
);
731 if (((mode
& SIZE
) != PSIZE
)
732 /* For Normal mode accept 16 bit and 32 bit pointer registers. */
733 && (!Nmode
|| ((mode
& SIZE
) != L_32
)))
734 as_bad (_("Wrong size pointer register for architecture."));
736 op
->mode
= src
[0] == '-' ? RDPREDEC
: RDPREINC
;
738 *ptr
= src
+ 1 + len
;
745 /* See if this is @(ERn.x, PC). */
746 len
= parse_reg (src
, &mode
, &op
->reg
, direction
);
747 if (len
!= 0 && (mode
& MODE
) == REG
&& src
[len
] == '.')
749 switch (TOLOWER (src
[len
+ 1]))
752 mode
= PCIDXB
| direction
;
755 mode
= PCIDXW
| direction
;
758 mode
= PCIDXL
| direction
;
765 && src
[len
+ 2] == ','
766 && TOLOWER (src
[len
+ 3]) != 'p'
767 && TOLOWER (src
[len
+ 4]) != 'c'
768 && src
[len
+ 5] != ')')
770 *ptr
= src
+ len
+ 6;
774 /* Fall through into disp case - the grammar is somewhat
775 ambiguous, so we should try whether it's a DISP operand
776 after all ("ER3.L" might be a poorly named label...). */
781 /* Start off assuming a 16 bit offset. */
783 src
= parse_exp (src
, op
);
786 op
->mode
|= ABS
| direction
;
793 as_bad (_("expected @(exp, reg16)"));
798 len
= parse_reg (src
, &mode
, &op
->reg
, direction
);
799 if (len
== 0 || (mode
& MODE
) != REG
)
801 as_bad (_("expected @(exp, reg16)"));
807 switch (TOLOWER (src
[1]))
810 op
->mode
|= INDEXB
| direction
;
813 op
->mode
|= INDEXW
| direction
;
816 op
->mode
|= INDEXL
| direction
;
819 as_bad (_("expected .L, .W or .B for register in indexed addressing mode"));
825 op
->mode
|= DISP
| direction
;
826 src
= skip_colonthing (src
, &op
->mode
);
830 as_bad (_("expected @(exp, reg16)"));
836 len
= parse_reg (src
, &mode
, &num
, direction
);
841 if (*src
== '+' || *src
== '-')
843 if (((mode
& SIZE
) != PSIZE
)
844 /* For Normal mode accept 16 bit and 32 bit pointer registers. */
845 && (!Nmode
|| ((mode
& SIZE
) != L_32
)))
846 as_bad (_("Wrong size pointer register for architecture."));
847 op
->mode
= *src
== '+' ? RSPOSTINC
: RSPOSTDEC
;
853 if (((mode
& SIZE
) != PSIZE
)
854 /* For Normal mode accept 16 bit and 32 bit pointer registers. */
855 && (!Nmode
|| ((mode
& SIZE
) != L_32
)))
856 as_bad (_("Wrong size pointer register for architecture."));
858 op
->mode
= direction
| IND
| PSIZE
;
866 /* must be a symbol */
868 op
->mode
= ABS
| direction
;
869 *ptr
= parse_exp (src
, op
);
877 *ptr
= parse_exp (src
+ 1, op
);
880 else if (strncmp (src
, "mach", 4) == 0 ||
881 strncmp (src
, "macl", 4) == 0 ||
882 strncmp (src
, "MACH", 4) == 0 ||
883 strncmp (src
, "MACL", 4) == 0)
885 op
->reg
= TOLOWER (src
[3]) == 'l';
893 *ptr
= parse_exp (src
, op
);
898 get_operands (unsigned int noperands
, char *op_end
, struct h8_op
*operand
)
909 get_operand (&ptr
, operand
+ 0, SRC
);
913 get_operand (&ptr
, operand
+ 1, DST
);
919 get_operand (&ptr
, operand
+ 0, SRC
);
922 get_operand (&ptr
, operand
+ 1, DST
);
927 get_operand (&ptr
, operand
+ 0, SRC
);
930 get_operand (&ptr
, operand
+ 1, DST
);
933 get_operand (&ptr
, operand
+ 2, OP3
);
943 /* MOVA has special requirements. Rather than adding twice the amount of
944 addressing modes, we simply special case it a bit. */
946 get_mova_operands (char *op_end
, struct h8_op
*operand
)
950 if (ptr
[1] != '@' || ptr
[2] != '(')
954 ptr
= parse_exp (ptr
, &operand
[0]);
959 get_operand (&ptr
, operand
+ 1, DST
);
967 operand
[0].mode
= (operand
[0].mode
& ~MODE
) | INDEXB
;
970 operand
[0].mode
= (operand
[0].mode
& ~MODE
) | INDEXW
;
973 operand
[0].mode
= (operand
[0].mode
& ~MODE
) | INDEXL
;
979 else if ((operand
[1].mode
& MODE
) == LOWREG
)
981 switch (operand
[1].mode
& SIZE
)
984 operand
[0].mode
= (operand
[0].mode
& ~MODE
) | INDEXB
;
987 operand
[0].mode
= (operand
[0].mode
& ~MODE
) | INDEXW
;
990 operand
[0].mode
= (operand
[0].mode
& ~MODE
) | INDEXL
;
999 if (*ptr
++ != ')' || *ptr
++ != ',')
1001 get_operand (&ptr
, operand
+ 2, OP3
);
1002 /* See if we can use the short form of MOVA. */
1003 if (((operand
[1].mode
& MODE
) == REG
|| (operand
[1].mode
& MODE
) == LOWREG
)
1004 && (operand
[2].mode
& MODE
) == REG
1005 && (operand
[1].reg
& 7) == (operand
[2].reg
& 7))
1007 operand
[1].mode
= operand
[2].mode
= 0;
1008 operand
[0].reg
= operand
[2].reg
& 7;
1013 as_bad (_("expected valid addressing mode for mova: \"@(disp, ea.sz),ERn\""));
1017 get_rtsl_operands (char *ptr
, struct h8_op
*operand
)
1019 int mode
, len
, type
= 0;
1020 unsigned int num
, num2
;
1028 len
= parse_reg (ptr
, &mode
, &num
, SRC
);
1029 if (len
== 0 || (mode
& MODE
) != REG
)
1031 as_bad (_("expected register"));
1037 len
= parse_reg (++ptr
, &mode
, &num2
, SRC
);
1038 if (len
== 0 || (mode
& MODE
) != REG
)
1040 as_bad (_("expected register"));
1044 /* CONST_xxx are used as placeholders in the opcode table. */
1048 as_bad (_("invalid register list"));
1053 num2
= num
, num
= 0;
1054 if (type
== 1 && *ptr
++ != ')')
1056 as_bad (_("expected closing paren"));
1059 operand
[0].mode
= RS32
;
1060 operand
[1].mode
= RD32
;
1061 operand
[0].reg
= num
;
1062 operand
[1].reg
= num2
;
1065 /* Passed a pointer to a list of opcodes which use different
1066 addressing modes, return the opcode which matches the opcodes
1069 static const struct h8_instruction
*
1070 get_specific (const struct h8_instruction
*instruction
,
1071 struct h8_op
*operands
, int size
)
1073 const struct h8_instruction
*this_try
= instruction
;
1074 const struct h8_instruction
*found_other
= 0, *found_mismatched
= 0;
1076 int this_index
= instruction
->idx
;
1079 /* There's only one ldm/stm and it's easier to just
1080 get out quick for them. */
1081 if (OP_KIND (instruction
->opcode
->how
) == O_LDM
1082 || OP_KIND (instruction
->opcode
->how
) == O_STM
)
1085 while (noperands
< 3 && operands
[noperands
].mode
!= 0)
1088 while (this_index
== instruction
->idx
&& !found
)
1093 this_try
= instruction
++;
1094 this_size
= this_try
->opcode
->how
& SN
;
1096 if (this_try
->noperands
!= noperands
)
1098 else if (this_try
->noperands
> 0)
1102 for (i
= 0; i
< this_try
->noperands
&& found
; i
++)
1104 op_type op
= this_try
->opcode
->args
.nib
[i
];
1105 int op_mode
= op
& MODE
;
1106 int op_size
= op
& SIZE
;
1107 int x
= operands
[i
].mode
;
1108 int x_mode
= x
& MODE
;
1109 int x_size
= x
& SIZE
;
1111 if (op_mode
== LOWREG
&& (x_mode
== REG
|| x_mode
== LOWREG
))
1113 if ((x_size
== L_8
&& (operands
[i
].reg
& 8) == 0)
1114 || (x_size
== L_16
&& (operands
[i
].reg
& 8) == 8))
1115 as_warn (_("can't use high part of register in operand %d"), i
);
1117 if (x_size
!= op_size
)
1120 else if (op_mode
== REG
)
1122 if (x_mode
== LOWREG
)
1128 x_size
= (Hmode
? L_32
: L_16
);
1130 op_size
= (Hmode
? L_32
: L_16
);
1132 /* The size of the reg is v important. */
1133 if (op_size
!= x_size
)
1136 else if (op_mode
& CTRL
) /* control register */
1138 if (!(x_mode
& CTRL
))
1144 if (op_mode
!= CCR
&&
1145 op_mode
!= CCR_EXR
&&
1146 op_mode
!= CC_EX_VB_SB
)
1150 if (op_mode
!= EXR
&&
1151 op_mode
!= CCR_EXR
&&
1152 op_mode
!= CC_EX_VB_SB
)
1156 if (op_mode
!= MACH
&&
1161 if (op_mode
!= MACL
&&
1166 if (op_mode
!= VBR
&&
1167 op_mode
!= VBR_SBR
&&
1168 op_mode
!= CC_EX_VB_SB
)
1172 if (op_mode
!= SBR
&&
1173 op_mode
!= VBR_SBR
&&
1174 op_mode
!= CC_EX_VB_SB
)
1179 else if ((op
& ABSJMP
) && (x_mode
== ABS
|| x_mode
== PCREL
))
1181 operands
[i
].mode
&= ~MODE
;
1182 operands
[i
].mode
|= ABSJMP
;
1183 /* But it may not be 24 bits long. */
1184 if (x_mode
== ABS
&& !Hmode
)
1186 operands
[i
].mode
&= ~SIZE
;
1187 operands
[i
].mode
|= L_16
;
1189 if ((operands
[i
].mode
& SIZE
) == L_32
1190 && (op_mode
& SIZE
) != L_32
)
1193 else if (x_mode
== IMM
&& op_mode
!= IMM
)
1195 offsetT num
= operands
[i
].exp
.X_add_number
& 0xffffffff;
1196 if (op_mode
== KBIT
|| op_mode
== DBIT
)
1197 /* This is ok if the immediate value is sensible. */;
1198 else if (op_mode
== CONST_2
)
1200 else if (op_mode
== CONST_4
)
1202 else if (op_mode
== CONST_8
)
1204 else if (op_mode
== CONST_16
)
1209 else if (op_mode
== PCREL
&& op_mode
== x_mode
)
1211 /* movsd, bsr/bc and bsr/bs only come in PCREL16 flavour:
1212 If x_size is L_8, promote it. */
1213 if (OP_KIND (this_try
->opcode
->how
) == O_MOVSD
1214 || OP_KIND (this_try
->opcode
->how
) == O_BSRBC
1215 || OP_KIND (this_try
->opcode
->how
) == O_BSRBS
)
1219 /* The size of the displacement is important. */
1220 if (op_size
!= x_size
)
1223 else if ((op_mode
== DISP
|| op_mode
== IMM
|| op_mode
== ABS
1224 || op_mode
== INDEXB
|| op_mode
== INDEXW
1225 || op_mode
== INDEXL
)
1226 && op_mode
== x_mode
)
1228 /* Promote a L_24 to L_32 if it makes us match. */
1229 if (x_size
== L_24
&& op_size
== L_32
)
1235 if (((x_size
== L_16
&& op_size
== L_16U
)
1236 || (x_size
== L_8
&& op_size
== L_8U
)
1237 || (x_size
== L_3
&& op_size
== L_3NZ
))
1238 /* We're deliberately more permissive for ABS modes. */
1240 || constant_fits_size_p (operands
+ i
, op_size
,
1244 if (x_size
!= 0 && op_size
!= x_size
)
1246 else if (x_size
== 0
1247 && ! constant_fits_size_p (operands
+ i
, op_size
,
1251 else if (op_mode
!= x_mode
)
1259 if ((this_try
->opcode
->available
== AV_H8SX
&& ! SXmode
)
1260 || (this_try
->opcode
->available
== AV_H8S
&& ! Smode
)
1261 || (this_try
->opcode
->available
== AV_H8H
&& ! Hmode
))
1262 found
= 0, found_other
= this_try
;
1263 else if (this_size
!= size
&& (this_size
!= SN
&& size
!= SN
))
1264 found_mismatched
= this_try
, found
= 0;
1272 as_warn (_("Opcode `%s' with these operand types not available in %s mode"),
1273 found_other
->opcode
->name
,
1274 (! Hmode
&& ! Smode
? "H8/300"
1279 else if (found_mismatched
)
1281 as_warn (_("mismatch between opcode size and operand size"));
1282 return found_mismatched
;
1288 check_operand (struct h8_op
*operand
, unsigned int width
, const char *string
)
1290 if (operand
->exp
.X_add_symbol
== 0
1291 && operand
->exp
.X_op_symbol
== 0)
1293 /* No symbol involved, let's look at offset, it's dangerous if
1294 any of the high bits are not 0 or ff's, find out by oring or
1295 anding with the width and seeing if the answer is 0 or all
1298 if (! constant_fits_width_p (operand
, width
))
1301 && (operand
->exp
.X_add_number
& 0xff00) == 0xff00)
1303 /* Just ignore this one - which happens when trying to
1304 fit a 16 bit address truncated into an 8 bit address
1305 of something like bset. */
1307 else if (strcmp (string
, "@") == 0
1309 && (operand
->exp
.X_add_number
& 0xff8000) == 0xff8000)
1311 /* Just ignore this one - which happens when trying to
1312 fit a 24 bit address truncated into a 16 bit address
1313 of something like mov.w. */
1317 as_warn (_("operand %s0x%lx out of range."), string
,
1318 (unsigned long) operand
->exp
.X_add_number
);
1324 /* RELAXMODE has one of 3 values:
1326 0 Output a "normal" reloc, no relaxing possible for this insn/reloc
1328 1 Output a relaxable 24bit absolute mov.w address relocation
1329 (may relax into a 16bit absolute address).
1331 2 Output a relaxable 16/24 absolute mov.b address relocation
1332 (may relax into an 8bit absolute address). */
1335 do_a_fix_imm (int offset
, int nibble
, struct h8_op
*operand
, int relaxmode
, const struct h8_instruction
*this_try
)
1340 char *bytes
= frag_now
->fr_literal
+ offset
;
1342 const char *t
= ((operand
->mode
& MODE
) == IMM
) ? "#" : "@";
1344 if (operand
->exp
.X_add_symbol
== 0)
1346 switch (operand
->mode
& SIZE
)
1349 check_operand (operand
, 0x3, t
);
1350 bytes
[0] |= (operand
->exp
.X_add_number
& 3) << (nibble
? 0 : 4);
1354 check_operand (operand
, 0x7, t
);
1355 bytes
[0] |= (operand
->exp
.X_add_number
& 7) << (nibble
? 0 : 4);
1358 check_operand (operand
, 0xF, t
);
1359 bytes
[0] |= (operand
->exp
.X_add_number
& 15) << (nibble
? 0 : 4);
1362 check_operand (operand
, 0x1F, t
);
1363 bytes
[0] |= operand
->exp
.X_add_number
& 31;
1367 check_operand (operand
, 0xff, t
);
1368 bytes
[0] |= operand
->exp
.X_add_number
;
1372 check_operand (operand
, 0xffff, t
);
1373 bytes
[0] |= operand
->exp
.X_add_number
>> 8;
1374 bytes
[1] |= operand
->exp
.X_add_number
>> 0;
1376 /* MOVA needs both relocs to relax the second operand properly. */
1378 && (OP_KIND(this_try
->opcode
->how
) == O_MOVAB
1379 || OP_KIND(this_try
->opcode
->how
) == O_MOVAW
1380 || OP_KIND(this_try
->opcode
->how
) == O_MOVAL
))
1383 fix_new_exp (frag_now
, offset
, 2, &operand
->exp
, 0, idx
);
1388 check_operand (operand
, 0xffffff, t
);
1389 bytes
[0] |= operand
->exp
.X_add_number
>> 16;
1390 bytes
[1] |= operand
->exp
.X_add_number
>> 8;
1391 bytes
[2] |= operand
->exp
.X_add_number
>> 0;
1395 /* This should be done with bfd. */
1396 bytes
[0] |= operand
->exp
.X_add_number
>> 24;
1397 bytes
[1] |= operand
->exp
.X_add_number
>> 16;
1398 bytes
[2] |= operand
->exp
.X_add_number
>> 8;
1399 bytes
[3] |= operand
->exp
.X_add_number
>> 0;
1403 if ((operand
->mode
& MODE
) == DISP
&& relaxmode
== 1)
1404 idx
= BFD_RELOC_H8_DISP32A16
;
1407 idx
= (relaxmode
== 2) ? R_MOV24B1
: R_MOVL1
;
1408 fix_new_exp (frag_now
, offset
, 4, &operand
->exp
, 0, idx
);
1415 switch (operand
->mode
& SIZE
)
1420 where
= (operand
->mode
& SIZE
) == L_24
? -1 : 0;
1422 if ((operand
->mode
& MODE
) == DISP
&& relaxmode
== 1)
1423 idx
= BFD_RELOC_H8_DISP32A16
;
1428 else if (relaxmode
== 1)
1434 as_bad (_("Can't work out size of operand.\n"));
1443 operand
->exp
.X_add_number
=
1444 ((operand
->exp
.X_add_number
& 0xffff) ^ 0x8000) - 0x8000;
1445 operand
->exp
.X_add_number
|= (bytes
[0] << 8) | bytes
[1];
1451 operand
->exp
.X_add_number
=
1452 ((operand
->exp
.X_add_number
& 0xff) ^ 0x80) - 0x80;
1453 operand
->exp
.X_add_number
|= bytes
[0];
1456 fix_new_exp (frag_now
,
1465 /* Now we know what sort of opcodes it is, let's build the bytes. */
1468 build_bytes (const struct h8_instruction
*this_try
, struct h8_op
*operand
)
1471 char *output
= frag_more (this_try
->length
);
1472 const op_type
*nibble_ptr
= this_try
->opcode
->data
.nib
;
1474 unsigned int nibble_count
= 0;
1478 char asnibbles
[100];
1479 char *p
= asnibbles
;
1482 if (!Hmode
&& this_try
->opcode
->available
!= AV_H8
)
1483 as_warn (_("Opcode `%s' with these operand types not available in H8/300 mode"),
1484 this_try
->opcode
->name
);
1486 && this_try
->opcode
->available
!= AV_H8
1487 && this_try
->opcode
->available
!= AV_H8H
)
1488 as_warn (_("Opcode `%s' with these operand types not available in H8/300H mode"),
1489 this_try
->opcode
->name
);
1491 && this_try
->opcode
->available
!= AV_H8
1492 && this_try
->opcode
->available
!= AV_H8H
1493 && this_try
->opcode
->available
!= AV_H8S
)
1494 as_warn (_("Opcode `%s' with these operand types not available in H8/300S mode"),
1495 this_try
->opcode
->name
);
1497 while (*nibble_ptr
!= (op_type
) E
)
1504 d
= (c
& OP3
) == OP3
? 2 : (c
& DST
) == DST
? 1 : 0;
1512 if (c2
== REG
|| c2
== LOWREG
1513 || c2
== IND
|| c2
== PREINC
|| c2
== PREDEC
1514 || c2
== POSTINC
|| c2
== POSTDEC
)
1516 nib
= operand
[d
].reg
;
1521 else if (c
& CTRL
) /* Control reg operand. */
1522 nib
= operand
[d
].reg
;
1524 else if ((c
& DISPREG
) == (DISPREG
))
1526 nib
= operand
[d
].reg
;
1530 operand
[d
].mode
= c
;
1531 op_at
[d
] = nibble_count
;
1534 else if (c2
== IMM
|| c2
== PCREL
|| c2
== ABS
1535 || (c
& ABSJMP
) || c2
== DISP
)
1537 operand
[d
].mode
= c
;
1538 op_at
[d
] = nibble_count
;
1541 else if ((c
& IGNORE
) || (c
& DATA
))
1544 else if (c2
== DBIT
)
1546 switch (operand
[0].exp
.X_add_number
)
1555 as_bad (_("Need #1 or #2 here"));
1558 else if (c2
== KBIT
)
1560 switch (operand
[0].exp
.X_add_number
)
1570 as_warn (_("#4 not valid on H8/300."));
1575 as_bad (_("Need #1 or #2 here"));
1578 /* Stop it making a fix. */
1579 operand
[0].mode
= 0;
1583 operand
[d
].mode
|= MEMRELAX
;
1599 if (operand
[0].mode
== MACREG
)
1600 /* stmac has mac[hl] as the first operand. */
1601 nib
= 2 + operand
[0].reg
;
1603 /* ldmac has mac[hl] as the second operand. */
1604 nib
= 2 + operand
[1].reg
;
1612 /* Disgusting. Why, oh why didn't someone ask us for advice
1613 on the assembler format. */
1614 if (OP_KIND (this_try
->opcode
->how
) == O_LDM
)
1616 high
= (operand
[1].reg
>> 8) & 0xf;
1617 low
= (operand
[1].reg
) & 0xf;
1618 asnibbles
[2] = high
- low
;
1619 asnibbles
[7] = high
;
1621 else if (OP_KIND (this_try
->opcode
->how
) == O_STM
)
1623 high
= (operand
[0].reg
>> 8) & 0xf;
1624 low
= (operand
[0].reg
) & 0xf;
1625 asnibbles
[2] = high
- low
;
1629 for (i
= 0; i
< this_try
->length
; i
++)
1630 output
[i
] = (asnibbles
[i
* 2] << 4) | asnibbles
[i
* 2 + 1];
1632 /* Note if this is a mov.b or a bit manipulation instruction
1633 there is a special relaxation which only applies. */
1634 if ( this_try
->opcode
->how
== O (O_MOV
, SB
)
1635 || this_try
->opcode
->how
== O (O_BCLR
, SB
)
1636 || this_try
->opcode
->how
== O (O_BAND
, SB
)
1637 || this_try
->opcode
->how
== O (O_BIAND
, SB
)
1638 || this_try
->opcode
->how
== O (O_BILD
, SB
)
1639 || this_try
->opcode
->how
== O (O_BIOR
, SB
)
1640 || this_try
->opcode
->how
== O (O_BIST
, SB
)
1641 || this_try
->opcode
->how
== O (O_BIXOR
, SB
)
1642 || this_try
->opcode
->how
== O (O_BLD
, SB
)
1643 || this_try
->opcode
->how
== O (O_BNOT
, SB
)
1644 || this_try
->opcode
->how
== O (O_BOR
, SB
)
1645 || this_try
->opcode
->how
== O (O_BSET
, SB
)
1646 || this_try
->opcode
->how
== O (O_BST
, SB
)
1647 || this_try
->opcode
->how
== O (O_BTST
, SB
)
1648 || this_try
->opcode
->how
== O (O_BXOR
, SB
))
1651 /* Output any fixes. */
1652 for (i
= 0; i
< this_try
->noperands
; i
++)
1654 int x
= operand
[i
].mode
;
1655 int x_mode
= x
& MODE
;
1657 if (x_mode
== IMM
|| x_mode
== DISP
)
1660 /* Remove MEMRELAX flag added in h8300.h on mov with
1661 addressing mode "register indirect with displacement". */
1665 do_a_fix_imm (output
- frag_now
->fr_literal
+ op_at
[i
] / 2,
1666 op_at
[i
] & 1, operand
+ i
, (x
& MEMRELAX
) != 0,
1669 else if (x_mode
== ABS
)
1670 do_a_fix_imm (output
- frag_now
->fr_literal
+ op_at
[i
] / 2,
1671 op_at
[i
] & 1, operand
+ i
,
1672 (x
& MEMRELAX
) ? movb
+ 1 : 0,
1675 else if (x_mode
== PCREL
)
1677 int size16
= (x
& SIZE
) == L_16
;
1678 int size
= size16
? 2 : 1;
1679 int type
= size16
? R_PCRWORD
: R_PCRBYTE
;
1682 check_operand (operand
+ i
, size16
? 0x7fff : 0x7f, "@");
1684 if (operand
[i
].exp
.X_add_number
& 1)
1685 as_warn (_("branch operand has odd offset (%lx)\n"),
1686 (unsigned long) operand
->exp
.X_add_number
);
1688 /* The COFF port has always been off by one, changing it
1689 now would be an incompatible change, so we leave it as-is.
1691 We don't want to do this for ELF as we want to be
1692 compatible with the proposed ELF format from Hitachi. */
1693 operand
[i
].exp
.X_add_number
-= 1;
1697 operand
[i
].exp
.X_add_number
=
1698 ((operand
[i
].exp
.X_add_number
& 0xffff) ^ 0x8000) - 0x8000;
1702 operand
[i
].exp
.X_add_number
=
1703 ((operand
[i
].exp
.X_add_number
& 0xff) ^ 0x80) - 0x80;
1708 operand
[i
].exp
.X_add_number
|= output
[op_at
[i
] / 2];
1710 fixP
= fix_new_exp (frag_now
,
1711 output
- frag_now
->fr_literal
+ op_at
[i
] / 2,
1716 fixP
->fx_signed
= 1;
1718 else if (x_mode
== MEMIND
)
1720 check_operand (operand
+ i
, 0xff, "@@");
1721 fix_new_exp (frag_now
,
1722 output
- frag_now
->fr_literal
+ 1,
1728 else if (x_mode
== VECIND
)
1730 check_operand (operand
+ i
, 0x7f, "@@");
1731 /* FIXME: approximating the effect of "B31" here...
1732 This is very hackish, and ought to be done a better way. */
1733 operand
[i
].exp
.X_add_number
|= 0x80;
1734 fix_new_exp (frag_now
,
1735 output
- frag_now
->fr_literal
+ 1,
1741 else if (x
& ABSJMP
)
1744 bfd_reloc_code_real_type reloc_type
= R_JMPL1
;
1747 /* To be compatible with the proposed H8 ELF format, we
1748 want the relocation's offset to point to the first byte
1749 that will be modified, not to the start of the instruction. */
1751 if ((operand
->mode
& SIZE
) == L_32
)
1754 reloc_type
= R_RELLONG
;
1760 /* This jmp may be a jump or a branch. */
1762 check_operand (operand
+ i
,
1763 SXmode
? 0xffffffff : Hmode
? 0xffffff : 0xffff,
1766 if (operand
[i
].exp
.X_add_number
& 1)
1767 as_warn (_("branch operand has odd offset (%lx)\n"),
1768 (unsigned long) operand
->exp
.X_add_number
);
1771 operand
[i
].exp
.X_add_number
=
1772 ((operand
[i
].exp
.X_add_number
& 0xffff) ^ 0x8000) - 0x8000;
1773 fix_new_exp (frag_now
,
1774 output
- frag_now
->fr_literal
+ where
,
1783 /* Try to give an intelligent error message for common and simple to
1787 clever_message (const struct h8_instruction
*instruction
,
1788 struct h8_op
*operand
)
1790 /* Find out if there was more than one possible opcode. */
1792 if ((instruction
+ 1)->idx
!= instruction
->idx
)
1796 /* Only one opcode of this flavour, try to guess which operand
1798 for (argn
= 0; argn
< instruction
->noperands
; argn
++)
1800 switch (instruction
->opcode
->args
.nib
[argn
])
1803 if (operand
[argn
].mode
!= RD16
)
1805 as_bad (_("destination operand must be 16 bit register"));
1812 if (operand
[argn
].mode
!= RS8
)
1814 as_bad (_("source operand must be 8 bit register"));
1820 if (operand
[argn
].mode
!= ABS16DST
)
1822 as_bad (_("destination operand must be 16bit absolute address"));
1827 if (operand
[argn
].mode
!= RD8
)
1829 as_bad (_("destination operand must be 8 bit register"));
1835 if (operand
[argn
].mode
!= ABS16SRC
)
1837 as_bad (_("source operand must be 16bit absolute address"));
1845 as_bad (_("invalid operands"));
1849 /* If OPERAND is part of an address, adjust its size and value given
1850 that it addresses SIZE bytes.
1852 This function decides how big non-immediate constants are when no
1853 size was explicitly given. It also scales down the assembly-level
1854 displacement in an @(d:2,ERn) operand. */
1857 fix_operand_size (struct h8_op
*operand
, int size
)
1859 if (SXmode
&& (operand
->mode
& MODE
) == DISP
)
1861 /* If the user didn't specify an operand width, see if we
1862 can use @(d:2,ERn). */
1863 if ((operand
->mode
& SIZE
) == 0
1864 && operand
->exp
.X_add_symbol
== 0
1865 && operand
->exp
.X_op_symbol
== 0
1866 && (operand
->exp
.X_add_number
== size
1867 || operand
->exp
.X_add_number
== size
* 2
1868 || operand
->exp
.X_add_number
== size
* 3))
1869 operand
->mode
|= L_2
;
1871 /* Scale down the displacement in an @(d:2,ERn) operand.
1872 X_add_number then contains the desired field value. */
1873 if ((operand
->mode
& SIZE
) == L_2
)
1875 if (operand
->exp
.X_add_number
% size
!= 0)
1876 as_warn (_("operand/size mis-match"));
1877 operand
->exp
.X_add_number
/= size
;
1881 if ((operand
->mode
& SIZE
) == 0)
1882 switch (operand
->mode
& MODE
)
1889 /* Pick a 24-bit address unless we know that a 16-bit address
1890 is safe. get_specific() will relax L_24 into L_32 where
1894 && ((((addressT
) operand
->exp
.X_add_number
+ 0x8000)
1895 & 0xffffffff) > 0xffff
1896 || operand
->exp
.X_add_symbol
!= 0
1897 || operand
->exp
.X_op_symbol
!= 0))
1898 operand
->mode
|= L_24
;
1900 operand
->mode
|= L_16
;
1904 if ((((addressT
) operand
->exp
.X_add_number
+ 0x80)
1905 & 0xffffffff) <= 0xff)
1907 if (operand
->exp
.X_add_symbol
!= NULL
)
1908 operand
->mode
|= bsize
;
1910 operand
->mode
|= L_8
;
1913 operand
->mode
|= L_16
;
1919 /* This is the guts of the machine-dependent assembler. STR points to
1920 a machine dependent instruction. This function is supposed to emit
1921 the frags/bytes it assembles. */
1924 md_assemble (char *str
)
1928 struct h8_op operand
[3];
1929 const struct h8_instruction
*instruction
;
1930 const struct h8_instruction
*prev_instruction
;
1937 /* Drop leading whitespace. */
1941 /* Find the op code end. */
1942 for (op_start
= op_end
= str
;
1943 *op_end
!= 0 && *op_end
!= ' ';
1953 else if (*op_end
== '/' && ! slash
)
1957 if (op_end
== op_start
)
1959 as_bad (_("can't find opcode "));
1965 /* The assembler stops scanning the opcode at slashes, so it fails
1966 to make characters following them lower case. Fix them. */
1969 *slash
= TOLOWER (*slash
);
1971 instruction
= (const struct h8_instruction
*)
1972 hash_find (opcode_hash_control
, op_start
);
1974 if (instruction
== NULL
)
1976 as_bad (_("unknown opcode"));
1980 /* We used to set input_line_pointer to the result of get_operands,
1981 but that is wrong. Our caller assumes we don't change it. */
1983 operand
[0].mode
= 0;
1984 operand
[1].mode
= 0;
1985 operand
[2].mode
= 0;
1987 if (OP_KIND (instruction
->opcode
->how
) == O_MOVAB
1988 || OP_KIND (instruction
->opcode
->how
) == O_MOVAW
1989 || OP_KIND (instruction
->opcode
->how
) == O_MOVAL
)
1990 get_mova_operands (op_end
, operand
);
1991 else if (OP_KIND (instruction
->opcode
->how
) == O_RTEL
1992 || OP_KIND (instruction
->opcode
->how
) == O_RTSL
)
1993 get_rtsl_operands (op_end
, operand
);
1995 get_operands (instruction
->noperands
, op_end
, operand
);
1998 prev_instruction
= instruction
;
2000 /* Now we have operands from instruction.
2001 Let's check them out for ldm and stm. */
2002 if (OP_KIND (instruction
->opcode
->how
) == O_LDM
)
2004 /* The first operand must be @er7+, and the
2005 second operand must be a register pair. */
2006 if ((operand
[0].mode
!= RSINC
)
2007 || (operand
[0].reg
!= 7)
2008 || ((operand
[1].reg
& 0x80000000) == 0))
2009 as_bad (_("invalid operand in ldm"));
2011 else if (OP_KIND (instruction
->opcode
->how
) == O_STM
)
2013 /* The first operand must be a register pair,
2014 and the second operand must be @-er7. */
2015 if (((operand
[0].reg
& 0x80000000) == 0)
2016 || (operand
[1].mode
!= RDDEC
)
2017 || (operand
[1].reg
!= 7))
2018 as_bad (_("invalid operand in stm"));
2024 switch (TOLOWER (*dot
))
2039 if (OP_KIND (instruction
->opcode
->how
) == O_MOVAB
||
2040 OP_KIND (instruction
->opcode
->how
) == O_MOVAW
||
2041 OP_KIND (instruction
->opcode
->how
) == O_MOVAL
)
2043 switch (operand
[0].mode
& MODE
)
2047 fix_operand_size (&operand
[1], 1);
2050 fix_operand_size (&operand
[1], 2);
2053 fix_operand_size (&operand
[1], 4);
2059 for (i
= 0; i
< 3 && operand
[i
].mode
!= 0; i
++)
2065 fix_operand_size (&operand
[i
], 1);
2068 fix_operand_size (&operand
[i
], 2);
2071 fix_operand_size (&operand
[i
], 4);
2076 instruction
= get_specific (instruction
, operand
, size
);
2078 if (instruction
== 0)
2080 /* Couldn't find an opcode which matched the operands. */
2081 char *where
= frag_more (2);
2085 clever_message (prev_instruction
, operand
);
2090 build_bytes (instruction
, operand
);
2092 dwarf2_emit_insn (instruction
->length
);
2096 md_undefined_symbol (char *name ATTRIBUTE_UNUSED
)
2101 /* Various routines to kill one day. */
2104 md_atof (int type
, char *litP
, int *sizeP
)
2106 return ieee_md_atof (type
, litP
, sizeP
, TRUE
);
2109 #define OPTION_H_TICK_HEX (OPTION_MD_BASE)
2110 #define OPTION_MACH (OPTION_MD_BASE+1)
2112 const char *md_shortopts
= "";
2113 struct option md_longopts
[] =
2115 { "h-tick-hex", no_argument
, NULL
, OPTION_H_TICK_HEX
},
2116 { "mach", required_argument
, NULL
, OPTION_MACH
},
2117 {NULL
, no_argument
, NULL
, 0}
2120 size_t md_longopts_size
= sizeof (md_longopts
);
2125 void (*func
) (void);
2135 default_mach
= bfd_mach_h8300h
;
2145 default_mach
= bfd_mach_h8300hn
;
2155 default_mach
= bfd_mach_h8300s
;
2165 default_mach
= bfd_mach_h8300sn
;
2175 default_mach
= bfd_mach_h8300sx
;
2179 mach_h8300sxn (void)
2185 default_mach
= bfd_mach_h8300sxn
;
2188 const struct mach_func mach_table
[] =
2190 {"h8300h", mach_h8300h
},
2191 {"h8300hn", mach_h8300hn
},
2192 {"h8300s", mach_h8300s
},
2193 {"h8300sn", mach_h8300sn
},
2194 {"h8300sx", mach_h8300sx
},
2195 {"h8300sxn", mach_h8300sxn
}
2199 md_parse_option (int c ATTRIBUTE_UNUSED
, const char *arg ATTRIBUTE_UNUSED
)
2204 case OPTION_H_TICK_HEX
:
2205 enable_h_tick_hex
= 1;
2208 for (i
= 0; i
< sizeof(mach_table
) / sizeof(struct mach_func
); i
++)
2210 if (strcasecmp (arg
, mach_table
[i
].name
) == 0)
2212 mach_table
[i
].func();
2216 if (i
>= sizeof(mach_table
) / sizeof(struct mach_func
))
2217 as_bad (_("Invalid argument to --mach option: %s"), arg
);
2226 md_show_usage (FILE *stream
)
2228 fprintf (stream
, _(" H8300-specific assembler options:\n"));
2229 fprintf (stream
, _("\
2230 -mach=<name> Set the H8300 machine type to one of:\n\
2231 h8300h, h8300hn, h8300s, h8300sn, h8300sx, h8300sxn\n"));
2232 fprintf (stream
, _("\
2233 -h-tick-hex Support H'00 style hex constants\n"));
2236 void tc_aout_fix_to_chars (void);
2239 tc_aout_fix_to_chars (void)
2241 printf (_("call to tc_aout_fix_to_chars \n"));
2246 md_convert_frag (bfd
*headers ATTRIBUTE_UNUSED
,
2247 segT seg ATTRIBUTE_UNUSED
,
2248 fragS
*fragP ATTRIBUTE_UNUSED
)
2250 printf (_("call to md_convert_frag \n"));
2255 md_section_align (segT segment
, valueT size
)
2257 int align
= bfd_get_section_alignment (stdoutput
, segment
);
2258 return ((size
+ (1 << align
) - 1) & (-1U << align
));
2262 md_apply_fix (fixS
*fixP
, valueT
*valP
, segT seg ATTRIBUTE_UNUSED
)
2264 char *buf
= fixP
->fx_where
+ fixP
->fx_frag
->fr_literal
;
2267 switch (fixP
->fx_size
)
2273 *buf
++ = (val
>> 8);
2277 *buf
++ = (val
>> 24);
2278 *buf
++ = (val
>> 16);
2279 *buf
++ = (val
>> 8);
2283 /* This can arise when the .quad or .8byte pseudo-ops are used.
2284 Returning here (without setting fx_done) will cause the code
2285 to attempt to generate a reloc which will then fail with the
2286 slightly more helpful error message: "Cannot represent
2287 relocation type BFD_RELOC_64". */
2293 if (fixP
->fx_addsy
== NULL
&& fixP
->fx_pcrel
== 0)
2298 md_estimate_size_before_relax (fragS
*fragP ATTRIBUTE_UNUSED
,
2299 segT segment_type ATTRIBUTE_UNUSED
)
2301 printf (_("call to md_estimate_size_before_relax \n"));
2305 /* Put number into target byte order. */
2307 md_number_to_chars (char *ptr
, valueT use
, int nbytes
)
2309 number_to_chars_bigendian (ptr
, use
, nbytes
);
2313 md_pcrel_from (fixS
*fixp
)
2315 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
2316 _("Unexpected reference to a symbol in a non-code section"));
2321 tc_gen_reloc (asection
*section ATTRIBUTE_UNUSED
, fixS
*fixp
)
2324 bfd_reloc_code_real_type r_type
;
2326 if (fixp
->fx_addsy
&& fixp
->fx_subsy
)
2328 if ((S_GET_SEGMENT (fixp
->fx_addsy
) != S_GET_SEGMENT (fixp
->fx_subsy
))
2329 || S_GET_SEGMENT (fixp
->fx_addsy
) == undefined_section
)
2331 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
2332 _("Difference of symbols in different sections is not supported"));
2337 rel
= XNEW (arelent
);
2338 rel
->sym_ptr_ptr
= XNEW (asymbol
*);
2339 *rel
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
2340 rel
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
2341 rel
->addend
= fixp
->fx_offset
;
2343 r_type
= fixp
->fx_r_type
;
2347 fprintf (stderr
, "%s\n", bfd_get_reloc_code_name (r_type
));
2350 rel
->howto
= bfd_reloc_type_lookup (stdoutput
, r_type
);
2351 if (rel
->howto
== NULL
)
2353 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
2354 _("Cannot represent relocation type %s"),
2355 bfd_get_reloc_code_name (r_type
));