1 /* tc-h8300.c -- Assemble code for the Renesas H8/300
2 Copyright 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 2000,
3 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2012
4 Free Software Foundation, Inc.
6 This file is part of GAS, the GNU Assembler.
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3, or (at your option)
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to the Free
20 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
23 /* Written By Steve Chamberlain <sac@cygnus.com>. */
27 #include "dwarf2dbg.h"
30 #define h8_opcodes ops
31 #include "opcode/h8300.h"
32 #include "safe-ctype.h"
38 const char comment_chars
[] = ";";
39 const char line_comment_chars
[] = "#";
40 const char line_separator_chars
[] = "";
42 static void sbranch (int);
43 static void h8300hmode (int);
44 static void h8300smode (int);
45 static void h8300hnmode (int);
46 static void h8300snmode (int);
47 static void h8300sxmode (int);
48 static void h8300sxnmode (int);
49 static void pint (int);
56 #define PSIZE (Hmode && !Nmode ? L_32 : L_16)
58 static int bsize
= L_8
; /* Default branch displacement. */
66 const struct h8_opcode
*opcode
;
69 static struct h8_instruction
*h8_instructions
;
72 h8300hmode (int arg ATTRIBUTE_UNUSED
)
76 if (!bfd_set_arch_mach (stdoutput
, bfd_arch_h8300
, bfd_mach_h8300h
))
77 as_warn (_("could not set architecture and machine"));
81 h8300smode (int arg ATTRIBUTE_UNUSED
)
85 if (!bfd_set_arch_mach (stdoutput
, bfd_arch_h8300
, bfd_mach_h8300s
))
86 as_warn (_("could not set architecture and machine"));
90 h8300hnmode (int arg ATTRIBUTE_UNUSED
)
95 if (!bfd_set_arch_mach (stdoutput
, bfd_arch_h8300
, bfd_mach_h8300hn
))
96 as_warn (_("could not set architecture and machine"));
100 h8300snmode (int arg ATTRIBUTE_UNUSED
)
105 if (!bfd_set_arch_mach (stdoutput
, bfd_arch_h8300
, bfd_mach_h8300sn
))
106 as_warn (_("could not set architecture and machine"));
110 h8300sxmode (int arg ATTRIBUTE_UNUSED
)
115 if (!bfd_set_arch_mach (stdoutput
, bfd_arch_h8300
, bfd_mach_h8300sx
))
116 as_warn (_("could not set architecture and machine"));
120 h8300sxnmode (int arg ATTRIBUTE_UNUSED
)
126 if (!bfd_set_arch_mach (stdoutput
, bfd_arch_h8300
, bfd_mach_h8300sxn
))
127 as_warn (_("could not set architecture and machine"));
137 pint (int arg ATTRIBUTE_UNUSED
)
139 cons (Hmode
? 4 : 2);
142 /* Like obj_elf_section, but issues a warning for new
143 sections which do not have an attribute specification. */
146 h8300_elf_section (int push
)
148 static const char * known_data_sections
[] = { ".rodata", ".tdata", ".tbss" };
149 static const char * known_data_prefixes
[] = { ".debug", ".zdebug", ".gnu.warning" };
150 char * saved_ilp
= input_line_pointer
;
153 name
= obj_elf_section_name ();
157 if (* input_line_pointer
!= ','
158 && bfd_get_section_by_name (stdoutput
, name
) == NULL
)
162 /* Ignore this warning for well known data sections. */
163 for (i
= ARRAY_SIZE (known_data_sections
); i
--;)
164 if (strcmp (name
, known_data_sections
[i
]) == 0)
168 for (i
= ARRAY_SIZE (known_data_prefixes
); i
--;)
169 if (strncmp (name
, known_data_prefixes
[i
],
170 strlen (known_data_prefixes
[i
])) == 0)
174 as_warn (_("new section '%s' defined without attributes - this might cause problems"), name
);
177 /* FIXME: We ought to free the memory allocated by obj_elf_section_name()
178 for 'name', but we do not know if it was taken from the obstack, via
179 demand_copy_C_string(), or xmalloc()ed. */
180 input_line_pointer
= saved_ilp
;
181 obj_elf_section (push
);
184 /* This table describes all the machine specific pseudo-ops the assembler
185 has to support. The fields are:
186 pseudo-op name without dot
187 function to call to execute this pseudo-op
188 Integer arg to pass to the function. */
190 const pseudo_typeS md_pseudo_table
[] =
192 {"h8300h", h8300hmode
, 0},
193 {"h8300hn", h8300hnmode
, 0},
194 {"h8300s", h8300smode
, 0},
195 {"h8300sn", h8300snmode
, 0},
196 {"h8300sx", h8300sxmode
, 0},
197 {"h8300sxn", h8300sxnmode
, 0},
198 {"sbranch", sbranch
, L_8
},
199 {"lbranch", sbranch
, L_16
},
205 {"form", listing_psize
, 0},
206 {"heading", listing_title
, 0},
207 {"import", s_ignore
, 0},
208 {"page", listing_eject
, 0},
209 {"program", s_ignore
, 0},
212 {"section", h8300_elf_section
, 0},
213 {"section.s", h8300_elf_section
, 0},
214 {"sect", h8300_elf_section
, 0},
215 {"sect.s", h8300_elf_section
, 0},
221 const char EXP_CHARS
[] = "eE";
223 /* Chars that mean this number is a floating point constant
226 const char FLT_CHARS
[] = "rRsSfFdDxXpP";
228 static struct hash_control
*opcode_hash_control
; /* Opcode mnemonics. */
230 /* This function is called once, at assembler startup time. This
231 should set up all the tables, etc. that the MD part of the assembler
237 unsigned int nopcodes
;
238 struct h8_opcode
*p
, *p1
;
239 struct h8_instruction
*pi
;
240 char prev_buffer
[100];
243 if (!bfd_set_arch_mach (stdoutput
, bfd_arch_h8300
, bfd_mach_h8300
))
244 as_warn (_("could not set architecture and machine"));
246 opcode_hash_control
= hash_new ();
249 nopcodes
= sizeof (h8_opcodes
) / sizeof (struct h8_opcode
);
251 h8_instructions
= (struct h8_instruction
*)
252 xmalloc (nopcodes
* sizeof (struct h8_instruction
));
254 pi
= h8_instructions
;
256 /* We do a minimum amount of sorting on the opcode table; this is to
257 make it easy to describe the mova instructions without unnecessary
259 Sorting only takes place inside blocks of instructions of the form
260 X/Y, so for example mova/b, mova/w and mova/l can be intermixed. */
263 struct h8_opcode
*first_skipped
= 0;
265 char *src
= p1
->name
;
270 /* Strip off any . part when inserting the opcode and only enter
271 unique codes into the hash table. */
272 dst
= buffer
= malloc (strlen (src
) + 1);
281 cmplen
= src
- p1
->name
+ 1;
288 hash_insert (opcode_hash_control
, buffer
, (char *) pi
);
289 strcpy (prev_buffer
, buffer
);
292 for (p
= p1
; p
->name
; p
++)
294 /* A negative TIME is used to indicate that we've added this opcode
298 if (strncmp (p
->name
, buffer
, cmplen
) != 0
299 || (p
->name
[cmplen
] != '\0' && p
->name
[cmplen
] != '.'
300 && p
->name
[cmplen
- 1] != '/'))
302 if (first_skipped
== 0)
306 if (strncmp (p
->name
, buffer
, len
) != 0)
308 if (first_skipped
== 0)
314 pi
->size
= p
->name
[len
] == '.' ? p
->name
[len
+ 1] : 0;
317 /* Find the number of operands. */
319 while (pi
->noperands
< 3 && p
->args
.nib
[pi
->noperands
] != (op_type
) E
)
322 /* Find the length of the opcode in bytes. */
324 while (p
->data
.nib
[pi
->length
* 2] != (op_type
) E
)
333 /* Add entry for the NULL vector terminator. */
350 static void clever_message (const struct h8_instruction
*, struct h8_op
*);
351 static void fix_operand_size (struct h8_op
*, int);
352 static void build_bytes (const struct h8_instruction
*, struct h8_op
*);
353 static void do_a_fix_imm (int, int, struct h8_op
*, int, const struct h8_instruction
*);
354 static void check_operand (struct h8_op
*, unsigned int, char *);
355 static const struct h8_instruction
* get_specific (const struct h8_instruction
*, struct h8_op
*, int) ;
356 static char *get_operands (unsigned, char *, struct h8_op
*);
357 static void get_operand (char **, struct h8_op
*, int);
358 static int parse_reg (char *, op_type
*, unsigned *, int);
359 static char *skip_colonthing (char *, int *);
360 static char *parse_exp (char *, struct h8_op
*);
362 static int constant_fits_size_p (struct h8_op
*, int, int);
366 WREG r0,r1,r2,r3,r4,r5,r6,r7,fp,sp
375 /* Try to parse a reg name. Return the number of chars consumed. */
378 parse_reg (char *src
, op_type
*mode
, unsigned int *reg
, int direction
)
383 /* Cribbed from get_symbol_end. */
384 if (!is_name_beginner (*src
) || *src
== '\001')
387 while ((is_part_of_name (*end
) && *end
!= '.') || *end
== '\001')
391 if (len
== 2 && TOLOWER (src
[0]) == 's' && TOLOWER (src
[1]) == 'p')
393 *mode
= PSIZE
| REG
| direction
;
398 TOLOWER (src
[0]) == 'c' &&
399 TOLOWER (src
[1]) == 'c' &&
400 TOLOWER (src
[2]) == 'r')
407 TOLOWER (src
[0]) == 'e' &&
408 TOLOWER (src
[1]) == 'x' &&
409 TOLOWER (src
[2]) == 'r')
416 TOLOWER (src
[0]) == 'v' &&
417 TOLOWER (src
[1]) == 'b' &&
418 TOLOWER (src
[2]) == 'r')
425 TOLOWER (src
[0]) == 's' &&
426 TOLOWER (src
[1]) == 'b' &&
427 TOLOWER (src
[2]) == 'r')
433 if (len
== 2 && TOLOWER (src
[0]) == 'f' && TOLOWER (src
[1]) == 'p')
435 *mode
= PSIZE
| REG
| direction
;
439 if (len
== 3 && TOLOWER (src
[0]) == 'e' && TOLOWER (src
[1]) == 'r' &&
440 src
[2] >= '0' && src
[2] <= '7')
442 *mode
= L_32
| REG
| direction
;
445 as_warn (_("Reg not valid for H8/300"));
448 if (len
== 2 && TOLOWER (src
[0]) == 'e' && src
[1] >= '0' && src
[1] <= '7')
450 *mode
= L_16
| REG
| direction
;
451 *reg
= src
[1] - '0' + 8;
453 as_warn (_("Reg not valid for H8/300"));
457 if (TOLOWER (src
[0]) == 'r')
459 if (src
[1] >= '0' && src
[1] <= '7')
461 if (len
== 3 && TOLOWER (src
[2]) == 'l')
463 *mode
= L_8
| REG
| direction
;
464 *reg
= (src
[1] - '0') + 8;
467 if (len
== 3 && TOLOWER (src
[2]) == 'h')
469 *mode
= L_8
| REG
| direction
;
470 *reg
= (src
[1] - '0');
475 *mode
= L_16
| REG
| direction
;
476 *reg
= (src
[1] - '0');
486 /* Parse an immediate or address-related constant and store it in OP.
487 If the user also specifies the operand's size, store that size
488 in OP->MODE, otherwise leave it for later code to decide. */
491 parse_exp (char *src
, struct h8_op
*op
)
495 save
= input_line_pointer
;
496 input_line_pointer
= src
;
497 expression (&op
->exp
);
498 if (op
->exp
.X_op
== O_absent
)
499 as_bad (_("missing operand"));
500 src
= input_line_pointer
;
501 input_line_pointer
= save
;
503 return skip_colonthing (src
, &op
->mode
);
507 /* If SRC starts with an explicit operand size, skip it and store the size
508 in *MODE. Leave *MODE unchanged otherwise. */
511 skip_colonthing (char *src
, int *mode
)
517 if (src
[0] == '8' && !ISDIGIT (src
[1]))
519 else if (src
[0] == '2' && !ISDIGIT (src
[1]))
521 else if (src
[0] == '3' && !ISDIGIT (src
[1]))
523 else if (src
[0] == '4' && !ISDIGIT (src
[1]))
525 else if (src
[0] == '5' && !ISDIGIT (src
[1]))
527 else if (src
[0] == '2' && src
[1] == '4' && !ISDIGIT (src
[2]))
529 else if (src
[0] == '3' && src
[1] == '2' && !ISDIGIT (src
[2]))
531 else if (src
[0] == '1' && src
[1] == '6' && !ISDIGIT (src
[2]))
534 as_bad (_("invalid operand size requested"));
536 while (ISDIGIT (*src
))
542 /* The many forms of operand:
545 @Rn Register indirect
546 @(exp[:16], Rn) Register indirect with displacement
550 @aa:16 absolute 16 bit
553 #xx[:size] immediate data
554 @(exp:[8], pc) pc rel
555 @@aa[:8] memory indirect. */
558 constant_fits_width_p (struct h8_op
*operand
, offsetT width
)
562 num
= ((operand
->exp
.X_add_number
& 0xffffffff) ^ 0x80000000) - 0x80000000;
563 return (num
& ~width
) == 0 || (num
| width
) == ~0;
567 constant_fits_size_p (struct h8_op
*operand
, int size
, int no_symbols
)
572 && (operand
->exp
.X_add_symbol
!= 0 || operand
->exp
.X_op_symbol
!= 0))
574 num
= operand
->exp
.X_add_number
& 0xffffffff;
578 return (num
& ~3) == 0;
580 return (num
& ~7) == 0;
582 return num
>= 1 && num
< 8;
584 return (num
& ~15) == 0;
586 return num
>= 1 && num
< 32;
588 num
= (num
^ 0x80000000) - 0x80000000;
589 return (num
& ~0xFF) == 0 || (num
| 0x7F) == ~0;
591 return (num
& ~0xFF) == 0;
593 num
= (num
^ 0x80000000) - 0x80000000;
594 return (num
& ~0xFFFF) == 0 || (num
| 0x7FFF) == ~0;
596 return (num
& ~0xFFFF) == 0;
605 get_operand (char **ptr
, struct h8_op
*op
, int direction
)
614 /* Check for '(' and ')' for instructions ldm and stm. */
615 if (src
[0] == '(' && src
[8] == ')')
618 /* Gross. Gross. ldm and stm have a format not easily handled
619 by get_operand. We deal with it explicitly here. */
620 if (TOLOWER (src
[0]) == 'e' && TOLOWER (src
[1]) == 'r' &&
621 ISDIGIT (src
[2]) && src
[3] == '-' &&
622 TOLOWER (src
[4]) == 'e' && TOLOWER (src
[5]) == 'r' && ISDIGIT (src
[6]))
629 /* Check register pair's validity as per tech note TN-H8*-193A/E
630 from Renesas for H8S and H8SX hardware manual. */
631 if ( !(low
== 0 && (high
== 1 || high
== 2 || high
== 3))
632 && !(low
== 1 && (high
== 2 || high
== 3 || high
== 4) && SXmode
)
633 && !(low
== 2 && (high
== 3 || ((high
== 4 || high
== 5) && SXmode
)))
634 && !(low
== 3 && (high
== 4 || high
== 5 || high
== 6) && SXmode
)
635 && !(low
== 4 && (high
== 5 || high
== 6))
636 && !(low
== 4 && high
== 7 && SXmode
)
637 && !(low
== 5 && (high
== 6 || high
== 7) && SXmode
)
638 && !(low
== 6 && high
== 7 && SXmode
))
639 as_bad (_("Invalid register list for ldm/stm\n"));
641 /* Even sicker. We encode two registers into op->reg. One
642 for the low register to save, the other for the high
643 register to save; we also set the high bit in op->reg
644 so we know this is "very special". */
645 op
->reg
= 0x80000000 | (high
<< 8) | low
;
654 len
= parse_reg (src
, &op
->mode
, &op
->reg
, direction
);
660 int size
= op
->mode
& SIZE
;
665 as_warn (_("mismatch between register and suffix"));
666 op
->mode
= (op
->mode
& ~MODE
) | LOWREG
;
669 if (size
!= L_32
&& size
!= L_16
)
670 as_warn (_("mismatch between register and suffix"));
671 op
->mode
= (op
->mode
& ~MODE
) | LOWREG
;
672 op
->mode
= (op
->mode
& ~SIZE
) | L_16
;
675 op
->mode
= (op
->mode
& ~MODE
) | LOWREG
;
676 if (size
!= L_32
&& size
!= L_8
)
677 as_warn (_("mismatch between register and suffix"));
678 op
->mode
= (op
->mode
& ~MODE
) | LOWREG
;
679 op
->mode
= (op
->mode
& ~SIZE
) | L_8
;
682 as_warn (_("invalid suffix after register."));
696 *ptr
= parse_exp (src
+ 1, op
);
697 if (op
->exp
.X_add_number
>= 0x100)
702 /* FIXME : 2? or 4? */
703 if (op
->exp
.X_add_number
>= 0x400)
704 as_bad (_("address too high for vector table jmp/jsr"));
705 else if (op
->exp
.X_add_number
>= 0x200)
710 op
->exp
.X_add_number
= op
->exp
.X_add_number
/ divisor
- 0x80;
717 if (*src
== '-' || *src
== '+')
719 len
= parse_reg (src
+ 1, &mode
, &num
, direction
);
722 /* Oops, not a reg after all, must be ordinary exp. */
723 op
->mode
= ABS
| direction
;
724 *ptr
= parse_exp (src
, op
);
728 if (((mode
& SIZE
) != PSIZE
)
729 /* For Normal mode accept 16 bit and 32 bit pointer registers. */
730 && (!Nmode
|| ((mode
& SIZE
) != L_32
)))
731 as_bad (_("Wrong size pointer register for architecture."));
733 op
->mode
= src
[0] == '-' ? RDPREDEC
: RDPREINC
;
735 *ptr
= src
+ 1 + len
;
742 /* See if this is @(ERn.x, PC). */
743 len
= parse_reg (src
, &mode
, &op
->reg
, direction
);
744 if (len
!= 0 && (mode
& MODE
) == REG
&& src
[len
] == '.')
746 switch (TOLOWER (src
[len
+ 1]))
749 mode
= PCIDXB
| direction
;
752 mode
= PCIDXW
| direction
;
755 mode
= PCIDXL
| direction
;
762 && src
[len
+ 2] == ','
763 && TOLOWER (src
[len
+ 3]) != 'p'
764 && TOLOWER (src
[len
+ 4]) != 'c'
765 && src
[len
+ 5] != ')')
767 *ptr
= src
+ len
+ 6;
771 /* Fall through into disp case - the grammar is somewhat
772 ambiguous, so we should try whether it's a DISP operand
773 after all ("ER3.L" might be a poorly named label...). */
778 /* Start off assuming a 16 bit offset. */
780 src
= parse_exp (src
, op
);
783 op
->mode
|= ABS
| direction
;
790 as_bad (_("expected @(exp, reg16)"));
795 len
= parse_reg (src
, &mode
, &op
->reg
, direction
);
796 if (len
== 0 || (mode
& MODE
) != REG
)
798 as_bad (_("expected @(exp, reg16)"));
804 switch (TOLOWER (src
[1]))
807 op
->mode
|= INDEXB
| direction
;
810 op
->mode
|= INDEXW
| direction
;
813 op
->mode
|= INDEXL
| direction
;
816 as_bad (_("expected .L, .W or .B for register in indexed addressing mode"));
822 op
->mode
|= DISP
| direction
;
823 src
= skip_colonthing (src
, &op
->mode
);
825 if (*src
!= ')' && '(')
827 as_bad (_("expected @(exp, reg16)"));
833 len
= parse_reg (src
, &mode
, &num
, direction
);
838 if (*src
== '+' || *src
== '-')
840 if (((mode
& SIZE
) != PSIZE
)
841 /* For Normal mode accept 16 bit and 32 bit pointer registers. */
842 && (!Nmode
|| ((mode
& SIZE
) != L_32
)))
843 as_bad (_("Wrong size pointer register for architecture."));
844 op
->mode
= *src
== '+' ? RSPOSTINC
: RSPOSTDEC
;
850 if (((mode
& SIZE
) != PSIZE
)
851 /* For Normal mode accept 16 bit and 32 bit pointer registers. */
852 && (!Nmode
|| ((mode
& SIZE
) != L_32
)))
853 as_bad (_("Wrong size pointer register for architecture."));
855 op
->mode
= direction
| IND
| PSIZE
;
863 /* must be a symbol */
865 op
->mode
= ABS
| direction
;
866 *ptr
= parse_exp (src
, op
);
874 *ptr
= parse_exp (src
+ 1, op
);
877 else if (strncmp (src
, "mach", 4) == 0 ||
878 strncmp (src
, "macl", 4) == 0 ||
879 strncmp (src
, "MACH", 4) == 0 ||
880 strncmp (src
, "MACL", 4) == 0)
882 op
->reg
= TOLOWER (src
[3]) == 'l';
890 *ptr
= parse_exp (src
, op
);
895 get_operands (unsigned int noperands
, char *op_end
, struct h8_op
*operand
)
906 get_operand (&ptr
, operand
+ 0, SRC
);
910 get_operand (&ptr
, operand
+ 1, DST
);
916 get_operand (&ptr
, operand
+ 0, SRC
);
919 get_operand (&ptr
, operand
+ 1, DST
);
924 get_operand (&ptr
, operand
+ 0, SRC
);
927 get_operand (&ptr
, operand
+ 1, DST
);
930 get_operand (&ptr
, operand
+ 2, OP3
);
940 /* MOVA has special requirements. Rather than adding twice the amount of
941 addressing modes, we simply special case it a bit. */
943 get_mova_operands (char *op_end
, struct h8_op
*operand
)
947 if (ptr
[1] != '@' || ptr
[2] != '(')
951 ptr
= parse_exp (ptr
, &operand
[0]);
956 get_operand (&ptr
, operand
+ 1, DST
);
964 operand
[0].mode
= (operand
[0].mode
& ~MODE
) | INDEXB
;
967 operand
[0].mode
= (operand
[0].mode
& ~MODE
) | INDEXW
;
970 operand
[0].mode
= (operand
[0].mode
& ~MODE
) | INDEXL
;
976 else if ((operand
[1].mode
& MODE
) == LOWREG
)
978 switch (operand
[1].mode
& SIZE
)
981 operand
[0].mode
= (operand
[0].mode
& ~MODE
) | INDEXB
;
984 operand
[0].mode
= (operand
[0].mode
& ~MODE
) | INDEXW
;
987 operand
[0].mode
= (operand
[0].mode
& ~MODE
) | INDEXL
;
996 if (*ptr
++ != ')' || *ptr
++ != ',')
998 get_operand (&ptr
, operand
+ 2, OP3
);
999 /* See if we can use the short form of MOVA. */
1000 if (((operand
[1].mode
& MODE
) == REG
|| (operand
[1].mode
& MODE
) == LOWREG
)
1001 && (operand
[2].mode
& MODE
) == REG
1002 && (operand
[1].reg
& 7) == (operand
[2].reg
& 7))
1004 operand
[1].mode
= operand
[2].mode
= 0;
1005 operand
[0].reg
= operand
[2].reg
& 7;
1010 as_bad (_("expected valid addressing mode for mova: \"@(disp, ea.sz),ERn\""));
1014 get_rtsl_operands (char *ptr
, struct h8_op
*operand
)
1016 int mode
, len
, type
= 0;
1017 unsigned int num
, num2
;
1025 len
= parse_reg (ptr
, &mode
, &num
, SRC
);
1026 if (len
== 0 || (mode
& MODE
) != REG
)
1028 as_bad (_("expected register"));
1034 len
= parse_reg (++ptr
, &mode
, &num2
, SRC
);
1035 if (len
== 0 || (mode
& MODE
) != REG
)
1037 as_bad (_("expected register"));
1041 /* CONST_xxx are used as placeholders in the opcode table. */
1045 as_bad (_("invalid register list"));
1050 num2
= num
, num
= 0;
1051 if (type
== 1 && *ptr
++ != ')')
1053 as_bad (_("expected closing paren"));
1056 operand
[0].mode
= RS32
;
1057 operand
[1].mode
= RD32
;
1058 operand
[0].reg
= num
;
1059 operand
[1].reg
= num2
;
1062 /* Passed a pointer to a list of opcodes which use different
1063 addressing modes, return the opcode which matches the opcodes
1066 static const struct h8_instruction
*
1067 get_specific (const struct h8_instruction
*instruction
,
1068 struct h8_op
*operands
, int size
)
1070 const struct h8_instruction
*this_try
= instruction
;
1071 const struct h8_instruction
*found_other
= 0, *found_mismatched
= 0;
1073 int this_index
= instruction
->idx
;
1076 /* There's only one ldm/stm and it's easier to just
1077 get out quick for them. */
1078 if (OP_KIND (instruction
->opcode
->how
) == O_LDM
1079 || OP_KIND (instruction
->opcode
->how
) == O_STM
)
1082 while (noperands
< 3 && operands
[noperands
].mode
!= 0)
1085 while (this_index
== instruction
->idx
&& !found
)
1090 this_try
= instruction
++;
1091 this_size
= this_try
->opcode
->how
& SN
;
1093 if (this_try
->noperands
!= noperands
)
1095 else if (this_try
->noperands
> 0)
1099 for (i
= 0; i
< this_try
->noperands
&& found
; i
++)
1101 op_type op
= this_try
->opcode
->args
.nib
[i
];
1102 int op_mode
= op
& MODE
;
1103 int op_size
= op
& SIZE
;
1104 int x
= operands
[i
].mode
;
1105 int x_mode
= x
& MODE
;
1106 int x_size
= x
& SIZE
;
1108 if (op_mode
== LOWREG
&& (x_mode
== REG
|| x_mode
== LOWREG
))
1110 if ((x_size
== L_8
&& (operands
[i
].reg
& 8) == 0)
1111 || (x_size
== L_16
&& (operands
[i
].reg
& 8) == 8))
1112 as_warn (_("can't use high part of register in operand %d"), i
);
1114 if (x_size
!= op_size
)
1117 else if (op_mode
== REG
)
1119 if (x_mode
== LOWREG
)
1125 x_size
= (Hmode
? L_32
: L_16
);
1127 op_size
= (Hmode
? L_32
: L_16
);
1129 /* The size of the reg is v important. */
1130 if (op_size
!= x_size
)
1133 else if (op_mode
& CTRL
) /* control register */
1135 if (!(x_mode
& CTRL
))
1141 if (op_mode
!= CCR
&&
1142 op_mode
!= CCR_EXR
&&
1143 op_mode
!= CC_EX_VB_SB
)
1147 if (op_mode
!= EXR
&&
1148 op_mode
!= CCR_EXR
&&
1149 op_mode
!= CC_EX_VB_SB
)
1153 if (op_mode
!= MACH
&&
1158 if (op_mode
!= MACL
&&
1163 if (op_mode
!= VBR
&&
1164 op_mode
!= VBR_SBR
&&
1165 op_mode
!= CC_EX_VB_SB
)
1169 if (op_mode
!= SBR
&&
1170 op_mode
!= VBR_SBR
&&
1171 op_mode
!= CC_EX_VB_SB
)
1176 else if ((op
& ABSJMP
) && (x_mode
== ABS
|| x_mode
== PCREL
))
1178 operands
[i
].mode
&= ~MODE
;
1179 operands
[i
].mode
|= ABSJMP
;
1180 /* But it may not be 24 bits long. */
1181 if (x_mode
== ABS
&& !Hmode
)
1183 operands
[i
].mode
&= ~SIZE
;
1184 operands
[i
].mode
|= L_16
;
1186 if ((operands
[i
].mode
& SIZE
) == L_32
1187 && (op_mode
& SIZE
) != L_32
)
1190 else if (x_mode
== IMM
&& op_mode
!= IMM
)
1192 offsetT num
= operands
[i
].exp
.X_add_number
& 0xffffffff;
1193 if (op_mode
== KBIT
|| op_mode
== DBIT
)
1194 /* This is ok if the immediate value is sensible. */;
1195 else if (op_mode
== CONST_2
)
1197 else if (op_mode
== CONST_4
)
1199 else if (op_mode
== CONST_8
)
1201 else if (op_mode
== CONST_16
)
1206 else if (op_mode
== PCREL
&& op_mode
== x_mode
)
1208 /* movsd, bsr/bc and bsr/bs only come in PCREL16 flavour:
1209 If x_size is L_8, promote it. */
1210 if (OP_KIND (this_try
->opcode
->how
) == O_MOVSD
1211 || OP_KIND (this_try
->opcode
->how
) == O_BSRBC
1212 || OP_KIND (this_try
->opcode
->how
) == O_BSRBS
)
1216 /* The size of the displacement is important. */
1217 if (op_size
!= x_size
)
1220 else if ((op_mode
== DISP
|| op_mode
== IMM
|| op_mode
== ABS
1221 || op_mode
== INDEXB
|| op_mode
== INDEXW
1222 || op_mode
== INDEXL
)
1223 && op_mode
== x_mode
)
1225 /* Promote a L_24 to L_32 if it makes us match. */
1226 if (x_size
== L_24
&& op_size
== L_32
)
1232 if (((x_size
== L_16
&& op_size
== L_16U
)
1233 || (x_size
== L_8
&& op_size
== L_8U
)
1234 || (x_size
== L_3
&& op_size
== L_3NZ
))
1235 /* We're deliberately more permissive for ABS modes. */
1237 || constant_fits_size_p (operands
+ i
, op_size
,
1241 if (x_size
!= 0 && op_size
!= x_size
)
1243 else if (x_size
== 0
1244 && ! constant_fits_size_p (operands
+ i
, op_size
,
1248 else if (op_mode
!= x_mode
)
1256 if ((this_try
->opcode
->available
== AV_H8SX
&& ! SXmode
)
1257 || (this_try
->opcode
->available
== AV_H8S
&& ! Smode
)
1258 || (this_try
->opcode
->available
== AV_H8H
&& ! Hmode
))
1259 found
= 0, found_other
= this_try
;
1260 else if (this_size
!= size
&& (this_size
!= SN
&& size
!= SN
))
1261 found_mismatched
= this_try
, found
= 0;
1269 as_warn (_("Opcode `%s' with these operand types not available in %s mode"),
1270 found_other
->opcode
->name
,
1271 (! Hmode
&& ! Smode
? "H8/300"
1276 else if (found_mismatched
)
1278 as_warn (_("mismatch between opcode size and operand size"));
1279 return found_mismatched
;
1285 check_operand (struct h8_op
*operand
, unsigned int width
, char *string
)
1287 if (operand
->exp
.X_add_symbol
== 0
1288 && operand
->exp
.X_op_symbol
== 0)
1290 /* No symbol involved, let's look at offset, it's dangerous if
1291 any of the high bits are not 0 or ff's, find out by oring or
1292 anding with the width and seeing if the answer is 0 or all
1295 if (! constant_fits_width_p (operand
, width
))
1298 && (operand
->exp
.X_add_number
& 0xff00) == 0xff00)
1300 /* Just ignore this one - which happens when trying to
1301 fit a 16 bit address truncated into an 8 bit address
1302 of something like bset. */
1304 else if (strcmp (string
, "@") == 0
1306 && (operand
->exp
.X_add_number
& 0xff8000) == 0xff8000)
1308 /* Just ignore this one - which happens when trying to
1309 fit a 24 bit address truncated into a 16 bit address
1310 of something like mov.w. */
1314 as_warn (_("operand %s0x%lx out of range."), string
,
1315 (unsigned long) operand
->exp
.X_add_number
);
1321 /* RELAXMODE has one of 3 values:
1323 0 Output a "normal" reloc, no relaxing possible for this insn/reloc
1325 1 Output a relaxable 24bit absolute mov.w address relocation
1326 (may relax into a 16bit absolute address).
1328 2 Output a relaxable 16/24 absolute mov.b address relocation
1329 (may relax into an 8bit absolute address). */
1332 do_a_fix_imm (int offset
, int nibble
, struct h8_op
*operand
, int relaxmode
, const struct h8_instruction
*this_try
)
1337 char *bytes
= frag_now
->fr_literal
+ offset
;
1339 char *t
= ((operand
->mode
& MODE
) == IMM
) ? "#" : "@";
1341 if (operand
->exp
.X_add_symbol
== 0)
1343 switch (operand
->mode
& SIZE
)
1346 check_operand (operand
, 0x3, t
);
1347 bytes
[0] |= (operand
->exp
.X_add_number
& 3) << (nibble
? 0 : 4);
1351 check_operand (operand
, 0x7, t
);
1352 bytes
[0] |= (operand
->exp
.X_add_number
& 7) << (nibble
? 0 : 4);
1355 check_operand (operand
, 0xF, t
);
1356 bytes
[0] |= (operand
->exp
.X_add_number
& 15) << (nibble
? 0 : 4);
1359 check_operand (operand
, 0x1F, t
);
1360 bytes
[0] |= operand
->exp
.X_add_number
& 31;
1364 check_operand (operand
, 0xff, t
);
1365 bytes
[0] |= operand
->exp
.X_add_number
;
1369 check_operand (operand
, 0xffff, t
);
1370 bytes
[0] |= operand
->exp
.X_add_number
>> 8;
1371 bytes
[1] |= operand
->exp
.X_add_number
>> 0;
1373 /* MOVA needs both relocs to relax the second operand properly. */
1375 && (OP_KIND(this_try
->opcode
->how
) == O_MOVAB
1376 || OP_KIND(this_try
->opcode
->how
) == O_MOVAW
1377 || OP_KIND(this_try
->opcode
->how
) == O_MOVAL
))
1380 fix_new_exp (frag_now
, offset
, 2, &operand
->exp
, 0, idx
);
1385 check_operand (operand
, 0xffffff, t
);
1386 bytes
[0] |= operand
->exp
.X_add_number
>> 16;
1387 bytes
[1] |= operand
->exp
.X_add_number
>> 8;
1388 bytes
[2] |= operand
->exp
.X_add_number
>> 0;
1392 /* This should be done with bfd. */
1393 bytes
[0] |= operand
->exp
.X_add_number
>> 24;
1394 bytes
[1] |= operand
->exp
.X_add_number
>> 16;
1395 bytes
[2] |= operand
->exp
.X_add_number
>> 8;
1396 bytes
[3] |= operand
->exp
.X_add_number
>> 0;
1399 idx
= (relaxmode
== 2) ? R_MOV24B1
: R_MOVL1
;
1400 fix_new_exp (frag_now
, offset
, 4, &operand
->exp
, 0, idx
);
1407 switch (operand
->mode
& SIZE
)
1412 where
= (operand
->mode
& SIZE
) == L_24
? -1 : 0;
1415 else if (relaxmode
== 1)
1421 as_bad (_("Can't work out size of operand.\n"));
1430 operand
->exp
.X_add_number
=
1431 ((operand
->exp
.X_add_number
& 0xffff) ^ 0x8000) - 0x8000;
1432 operand
->exp
.X_add_number
|= (bytes
[0] << 8) | bytes
[1];
1438 operand
->exp
.X_add_number
=
1439 ((operand
->exp
.X_add_number
& 0xff) ^ 0x80) - 0x80;
1440 operand
->exp
.X_add_number
|= bytes
[0];
1443 fix_new_exp (frag_now
,
1452 /* Now we know what sort of opcodes it is, let's build the bytes. */
1455 build_bytes (const struct h8_instruction
*this_try
, struct h8_op
*operand
)
1458 char *output
= frag_more (this_try
->length
);
1459 const op_type
*nibble_ptr
= this_try
->opcode
->data
.nib
;
1461 unsigned int nibble_count
= 0;
1465 char asnibbles
[100];
1466 char *p
= asnibbles
;
1469 if (!Hmode
&& this_try
->opcode
->available
!= AV_H8
)
1470 as_warn (_("Opcode `%s' with these operand types not available in H8/300 mode"),
1471 this_try
->opcode
->name
);
1473 && this_try
->opcode
->available
!= AV_H8
1474 && this_try
->opcode
->available
!= AV_H8H
)
1475 as_warn (_("Opcode `%s' with these operand types not available in H8/300H mode"),
1476 this_try
->opcode
->name
);
1478 && this_try
->opcode
->available
!= AV_H8
1479 && this_try
->opcode
->available
!= AV_H8H
1480 && this_try
->opcode
->available
!= AV_H8S
)
1481 as_warn (_("Opcode `%s' with these operand types not available in H8/300S mode"),
1482 this_try
->opcode
->name
);
1484 while (*nibble_ptr
!= (op_type
) E
)
1491 d
= (c
& OP3
) == OP3
? 2 : (c
& DST
) == DST
? 1 : 0;
1499 if (c2
== REG
|| c2
== LOWREG
1500 || c2
== IND
|| c2
== PREINC
|| c2
== PREDEC
1501 || c2
== POSTINC
|| c2
== POSTDEC
)
1503 nib
= operand
[d
].reg
;
1508 else if (c
& CTRL
) /* Control reg operand. */
1509 nib
= operand
[d
].reg
;
1511 else if ((c
& DISPREG
) == (DISPREG
))
1513 nib
= operand
[d
].reg
;
1517 operand
[d
].mode
= c
;
1518 op_at
[d
] = nibble_count
;
1521 else if (c2
== IMM
|| c2
== PCREL
|| c2
== ABS
1522 || (c
& ABSJMP
) || c2
== DISP
)
1524 operand
[d
].mode
= c
;
1525 op_at
[d
] = nibble_count
;
1528 else if ((c
& IGNORE
) || (c
& DATA
))
1531 else if (c2
== DBIT
)
1533 switch (operand
[0].exp
.X_add_number
)
1542 as_bad (_("Need #1 or #2 here"));
1545 else if (c2
== KBIT
)
1547 switch (operand
[0].exp
.X_add_number
)
1557 as_warn (_("#4 not valid on H8/300."));
1562 as_bad (_("Need #1 or #2 here"));
1565 /* Stop it making a fix. */
1566 operand
[0].mode
= 0;
1570 operand
[d
].mode
|= MEMRELAX
;
1586 if (operand
[0].mode
== MACREG
)
1587 /* stmac has mac[hl] as the first operand. */
1588 nib
= 2 + operand
[0].reg
;
1590 /* ldmac has mac[hl] as the second operand. */
1591 nib
= 2 + operand
[1].reg
;
1599 /* Disgusting. Why, oh why didn't someone ask us for advice
1600 on the assembler format. */
1601 if (OP_KIND (this_try
->opcode
->how
) == O_LDM
)
1603 high
= (operand
[1].reg
>> 8) & 0xf;
1604 low
= (operand
[1].reg
) & 0xf;
1605 asnibbles
[2] = high
- low
;
1606 asnibbles
[7] = high
;
1608 else if (OP_KIND (this_try
->opcode
->how
) == O_STM
)
1610 high
= (operand
[0].reg
>> 8) & 0xf;
1611 low
= (operand
[0].reg
) & 0xf;
1612 asnibbles
[2] = high
- low
;
1616 for (i
= 0; i
< this_try
->length
; i
++)
1617 output
[i
] = (asnibbles
[i
* 2] << 4) | asnibbles
[i
* 2 + 1];
1619 /* Note if this is a movb or a bit manipulation instruction
1620 there is a special relaxation which only applies. */
1621 if ( this_try
->opcode
->how
== O (O_MOV
, SB
)
1622 || this_try
->opcode
->how
== O (O_BCLR
, SB
)
1623 || this_try
->opcode
->how
== O (O_BAND
, SB
)
1624 || this_try
->opcode
->how
== O (O_BIAND
, SB
)
1625 || this_try
->opcode
->how
== O (O_BILD
, SB
)
1626 || this_try
->opcode
->how
== O (O_BIOR
, SB
)
1627 || this_try
->opcode
->how
== O (O_BIST
, SB
)
1628 || this_try
->opcode
->how
== O (O_BIXOR
, SB
)
1629 || this_try
->opcode
->how
== O (O_BLD
, SB
)
1630 || this_try
->opcode
->how
== O (O_BNOT
, SB
)
1631 || this_try
->opcode
->how
== O (O_BOR
, SB
)
1632 || this_try
->opcode
->how
== O (O_BSET
, SB
)
1633 || this_try
->opcode
->how
== O (O_BST
, SB
)
1634 || this_try
->opcode
->how
== O (O_BTST
, SB
)
1635 || this_try
->opcode
->how
== O (O_BXOR
, SB
))
1638 /* Output any fixes. */
1639 for (i
= 0; i
< this_try
->noperands
; i
++)
1641 int x
= operand
[i
].mode
;
1642 int x_mode
= x
& MODE
;
1644 if (x_mode
== IMM
|| x_mode
== DISP
)
1645 do_a_fix_imm (output
- frag_now
->fr_literal
+ op_at
[i
] / 2,
1646 op_at
[i
] & 1, operand
+ i
, (x
& MEMRELAX
) != 0,
1649 else if (x_mode
== ABS
)
1650 do_a_fix_imm (output
- frag_now
->fr_literal
+ op_at
[i
] / 2,
1651 op_at
[i
] & 1, operand
+ i
,
1652 (x
& MEMRELAX
) ? movb
+ 1 : 0,
1655 else if (x_mode
== PCREL
)
1657 int size16
= (x
& SIZE
) == L_16
;
1658 int size
= size16
? 2 : 1;
1659 int type
= size16
? R_PCRWORD
: R_PCRBYTE
;
1662 check_operand (operand
+ i
, size16
? 0x7fff : 0x7f, "@");
1664 if (operand
[i
].exp
.X_add_number
& 1)
1665 as_warn (_("branch operand has odd offset (%lx)\n"),
1666 (unsigned long) operand
->exp
.X_add_number
);
1668 /* The COFF port has always been off by one, changing it
1669 now would be an incompatible change, so we leave it as-is.
1671 We don't want to do this for ELF as we want to be
1672 compatible with the proposed ELF format from Hitachi. */
1673 operand
[i
].exp
.X_add_number
-= 1;
1677 operand
[i
].exp
.X_add_number
=
1678 ((operand
[i
].exp
.X_add_number
& 0xffff) ^ 0x8000) - 0x8000;
1682 operand
[i
].exp
.X_add_number
=
1683 ((operand
[i
].exp
.X_add_number
& 0xff) ^ 0x80) - 0x80;
1688 operand
[i
].exp
.X_add_number
|= output
[op_at
[i
] / 2];
1690 fixP
= fix_new_exp (frag_now
,
1691 output
- frag_now
->fr_literal
+ op_at
[i
] / 2,
1696 fixP
->fx_signed
= 1;
1698 else if (x_mode
== MEMIND
)
1700 check_operand (operand
+ i
, 0xff, "@@");
1701 fix_new_exp (frag_now
,
1702 output
- frag_now
->fr_literal
+ 1,
1708 else if (x_mode
== VECIND
)
1710 check_operand (operand
+ i
, 0x7f, "@@");
1711 /* FIXME: approximating the effect of "B31" here...
1712 This is very hackish, and ought to be done a better way. */
1713 operand
[i
].exp
.X_add_number
|= 0x80;
1714 fix_new_exp (frag_now
,
1715 output
- frag_now
->fr_literal
+ 1,
1721 else if (x
& ABSJMP
)
1724 bfd_reloc_code_real_type reloc_type
= R_JMPL1
;
1727 /* To be compatible with the proposed H8 ELF format, we
1728 want the relocation's offset to point to the first byte
1729 that will be modified, not to the start of the instruction. */
1731 if ((operand
->mode
& SIZE
) == L_32
)
1734 reloc_type
= R_RELLONG
;
1740 /* This jmp may be a jump or a branch. */
1742 check_operand (operand
+ i
,
1743 SXmode
? 0xffffffff : Hmode
? 0xffffff : 0xffff,
1746 if (operand
[i
].exp
.X_add_number
& 1)
1747 as_warn (_("branch operand has odd offset (%lx)\n"),
1748 (unsigned long) operand
->exp
.X_add_number
);
1751 operand
[i
].exp
.X_add_number
=
1752 ((operand
[i
].exp
.X_add_number
& 0xffff) ^ 0x8000) - 0x8000;
1753 fix_new_exp (frag_now
,
1754 output
- frag_now
->fr_literal
+ where
,
1763 /* Try to give an intelligent error message for common and simple to
1767 clever_message (const struct h8_instruction
*instruction
,
1768 struct h8_op
*operand
)
1770 /* Find out if there was more than one possible opcode. */
1772 if ((instruction
+ 1)->idx
!= instruction
->idx
)
1776 /* Only one opcode of this flavour, try to guess which operand
1778 for (argn
= 0; argn
< instruction
->noperands
; argn
++)
1780 switch (instruction
->opcode
->args
.nib
[argn
])
1783 if (operand
[argn
].mode
!= RD16
)
1785 as_bad (_("destination operand must be 16 bit register"));
1792 if (operand
[argn
].mode
!= RS8
)
1794 as_bad (_("source operand must be 8 bit register"));
1800 if (operand
[argn
].mode
!= ABS16DST
)
1802 as_bad (_("destination operand must be 16bit absolute address"));
1807 if (operand
[argn
].mode
!= RD8
)
1809 as_bad (_("destination operand must be 8 bit register"));
1815 if (operand
[argn
].mode
!= ABS16SRC
)
1817 as_bad (_("source operand must be 16bit absolute address"));
1825 as_bad (_("invalid operands"));
1829 /* If OPERAND is part of an address, adjust its size and value given
1830 that it addresses SIZE bytes.
1832 This function decides how big non-immediate constants are when no
1833 size was explicitly given. It also scales down the assembly-level
1834 displacement in an @(d:2,ERn) operand. */
1837 fix_operand_size (struct h8_op
*operand
, int size
)
1839 if (SXmode
&& (operand
->mode
& MODE
) == DISP
)
1841 /* If the user didn't specify an operand width, see if we
1842 can use @(d:2,ERn). */
1843 if ((operand
->mode
& SIZE
) == 0
1844 && operand
->exp
.X_add_symbol
== 0
1845 && operand
->exp
.X_op_symbol
== 0
1846 && (operand
->exp
.X_add_number
== size
1847 || operand
->exp
.X_add_number
== size
* 2
1848 || operand
->exp
.X_add_number
== size
* 3))
1849 operand
->mode
|= L_2
;
1851 /* Scale down the displacement in an @(d:2,ERn) operand.
1852 X_add_number then contains the desired field value. */
1853 if ((operand
->mode
& SIZE
) == L_2
)
1855 if (operand
->exp
.X_add_number
% size
!= 0)
1856 as_warn (_("operand/size mis-match"));
1857 operand
->exp
.X_add_number
/= size
;
1861 if ((operand
->mode
& SIZE
) == 0)
1862 switch (operand
->mode
& MODE
)
1869 /* Pick a 24-bit address unless we know that a 16-bit address
1870 is safe. get_specific() will relax L_24 into L_32 where
1874 && ((((addressT
) operand
->exp
.X_add_number
+ 0x8000)
1875 & 0xffffffff) > 0xffff
1876 || operand
->exp
.X_add_symbol
!= 0
1877 || operand
->exp
.X_op_symbol
!= 0))
1878 operand
->mode
|= L_24
;
1880 operand
->mode
|= L_16
;
1884 if ((((addressT
) operand
->exp
.X_add_number
+ 0x80)
1885 & 0xffffffff) <= 0xff)
1887 if (operand
->exp
.X_add_symbol
!= NULL
)
1888 operand
->mode
|= bsize
;
1890 operand
->mode
|= L_8
;
1893 operand
->mode
|= L_16
;
1899 /* This is the guts of the machine-dependent assembler. STR points to
1900 a machine dependent instruction. This function is supposed to emit
1901 the frags/bytes it assembles. */
1904 md_assemble (char *str
)
1908 struct h8_op operand
[3];
1909 const struct h8_instruction
*instruction
;
1910 const struct h8_instruction
*prev_instruction
;
1917 /* Drop leading whitespace. */
1921 /* Find the op code end. */
1922 for (op_start
= op_end
= str
;
1923 *op_end
!= 0 && *op_end
!= ' ';
1933 else if (*op_end
== '/' && ! slash
)
1937 if (op_end
== op_start
)
1939 as_bad (_("can't find opcode "));
1945 /* The assembler stops scanning the opcode at slashes, so it fails
1946 to make characters following them lower case. Fix them. */
1949 *slash
= TOLOWER (*slash
);
1951 instruction
= (const struct h8_instruction
*)
1952 hash_find (opcode_hash_control
, op_start
);
1954 if (instruction
== NULL
)
1956 as_bad (_("unknown opcode"));
1960 /* We used to set input_line_pointer to the result of get_operands,
1961 but that is wrong. Our caller assumes we don't change it. */
1963 operand
[0].mode
= 0;
1964 operand
[1].mode
= 0;
1965 operand
[2].mode
= 0;
1967 if (OP_KIND (instruction
->opcode
->how
) == O_MOVAB
1968 || OP_KIND (instruction
->opcode
->how
) == O_MOVAW
1969 || OP_KIND (instruction
->opcode
->how
) == O_MOVAL
)
1970 get_mova_operands (op_end
, operand
);
1971 else if (OP_KIND (instruction
->opcode
->how
) == O_RTEL
1972 || OP_KIND (instruction
->opcode
->how
) == O_RTSL
)
1973 get_rtsl_operands (op_end
, operand
);
1975 get_operands (instruction
->noperands
, op_end
, operand
);
1978 prev_instruction
= instruction
;
1980 /* Now we have operands from instruction.
1981 Let's check them out for ldm and stm. */
1982 if (OP_KIND (instruction
->opcode
->how
) == O_LDM
)
1984 /* The first operand must be @er7+, and the
1985 second operand must be a register pair. */
1986 if ((operand
[0].mode
!= RSINC
)
1987 || (operand
[0].reg
!= 7)
1988 || ((operand
[1].reg
& 0x80000000) == 0))
1989 as_bad (_("invalid operand in ldm"));
1991 else if (OP_KIND (instruction
->opcode
->how
) == O_STM
)
1993 /* The first operand must be a register pair,
1994 and the second operand must be @-er7. */
1995 if (((operand
[0].reg
& 0x80000000) == 0)
1996 || (operand
[1].mode
!= RDDEC
)
1997 || (operand
[1].reg
!= 7))
1998 as_bad (_("invalid operand in stm"));
2004 switch (TOLOWER (*dot
))
2019 if (OP_KIND (instruction
->opcode
->how
) == O_MOVAB
||
2020 OP_KIND (instruction
->opcode
->how
) == O_MOVAW
||
2021 OP_KIND (instruction
->opcode
->how
) == O_MOVAL
)
2023 switch (operand
[0].mode
& MODE
)
2027 fix_operand_size (&operand
[1], 1);
2030 fix_operand_size (&operand
[1], 2);
2033 fix_operand_size (&operand
[1], 4);
2039 for (i
= 0; i
< 3 && operand
[i
].mode
!= 0; i
++)
2045 fix_operand_size (&operand
[i
], 1);
2048 fix_operand_size (&operand
[i
], 2);
2051 fix_operand_size (&operand
[i
], 4);
2056 instruction
= get_specific (instruction
, operand
, size
);
2058 if (instruction
== 0)
2060 /* Couldn't find an opcode which matched the operands. */
2061 char *where
= frag_more (2);
2065 clever_message (prev_instruction
, operand
);
2070 build_bytes (instruction
, operand
);
2072 dwarf2_emit_insn (instruction
->length
);
2076 md_undefined_symbol (char *name ATTRIBUTE_UNUSED
)
2081 /* Various routines to kill one day. */
2084 md_atof (int type
, char *litP
, int *sizeP
)
2086 return ieee_md_atof (type
, litP
, sizeP
, TRUE
);
2089 #define OPTION_H_TICK_HEX (OPTION_MD_BASE)
2091 const char *md_shortopts
= "";
2092 struct option md_longopts
[] = {
2093 { "h-tick-hex", no_argument
, NULL
, OPTION_H_TICK_HEX
},
2094 {NULL
, no_argument
, NULL
, 0}
2097 size_t md_longopts_size
= sizeof (md_longopts
);
2100 md_parse_option (int c ATTRIBUTE_UNUSED
, char *arg ATTRIBUTE_UNUSED
)
2104 case OPTION_H_TICK_HEX
:
2105 enable_h_tick_hex
= 1;
2115 md_show_usage (FILE *stream ATTRIBUTE_UNUSED
)
2119 void tc_aout_fix_to_chars (void);
2122 tc_aout_fix_to_chars (void)
2124 printf (_("call to tc_aout_fix_to_chars \n"));
2129 md_convert_frag (bfd
*headers ATTRIBUTE_UNUSED
,
2130 segT seg ATTRIBUTE_UNUSED
,
2131 fragS
*fragP ATTRIBUTE_UNUSED
)
2133 printf (_("call to md_convert_frag \n"));
2138 md_section_align (segT segment
, valueT size
)
2140 int align
= bfd_get_section_alignment (stdoutput
, segment
);
2141 return ((size
+ (1 << align
) - 1) & (-1 << align
));
2145 md_apply_fix (fixS
*fixP
, valueT
*valP
, segT seg ATTRIBUTE_UNUSED
)
2147 char *buf
= fixP
->fx_where
+ fixP
->fx_frag
->fr_literal
;
2150 switch (fixP
->fx_size
)
2156 *buf
++ = (val
>> 8);
2160 *buf
++ = (val
>> 24);
2161 *buf
++ = (val
>> 16);
2162 *buf
++ = (val
>> 8);
2166 /* This can arise when the .quad or .8byte pseudo-ops are used.
2167 Returning here (without setting fx_done) will cause the code
2168 to attempt to generate a reloc which will then fail with the
2169 slightly more helpful error message: "Cannot represent
2170 relocation type BFD_RELOC_64". */
2176 if (fixP
->fx_addsy
== NULL
&& fixP
->fx_pcrel
== 0)
2181 md_estimate_size_before_relax (fragS
*fragP ATTRIBUTE_UNUSED
,
2182 segT segment_type ATTRIBUTE_UNUSED
)
2184 printf (_("call to md_estimate_size_before_relax \n"));
2188 /* Put number into target byte order. */
2190 md_number_to_chars (char *ptr
, valueT use
, int nbytes
)
2192 number_to_chars_bigendian (ptr
, use
, nbytes
);
2196 md_pcrel_from (fixS
*fixp
)
2198 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
2199 _("Unexpected reference to a symbol in a non-code section"));
2204 tc_gen_reloc (asection
*section ATTRIBUTE_UNUSED
, fixS
*fixp
)
2207 bfd_reloc_code_real_type r_type
;
2209 if (fixp
->fx_addsy
&& fixp
->fx_subsy
)
2211 if ((S_GET_SEGMENT (fixp
->fx_addsy
) != S_GET_SEGMENT (fixp
->fx_subsy
))
2212 || S_GET_SEGMENT (fixp
->fx_addsy
) == undefined_section
)
2214 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
2215 _("Difference of symbols in different sections is not supported"));
2220 rel
= xmalloc (sizeof (arelent
));
2221 rel
->sym_ptr_ptr
= xmalloc (sizeof (asymbol
*));
2222 *rel
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
2223 rel
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
2224 rel
->addend
= fixp
->fx_offset
;
2226 r_type
= fixp
->fx_r_type
;
2230 fprintf (stderr
, "%s\n", bfd_get_reloc_code_name (r_type
));
2233 rel
->howto
= bfd_reloc_type_lookup (stdoutput
, r_type
);
2234 if (rel
->howto
== NULL
)
2236 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
2237 _("Cannot represent relocation type %s"),
2238 bfd_get_reloc_code_name (r_type
));