1 /* tc-h8300.c -- Assemble code for the Renesas H8/300
2 Copyright 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 2000,
3 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2012
4 Free Software Foundation, Inc.
6 This file is part of GAS, the GNU Assembler.
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3, or (at your option)
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to the Free
20 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
23 /* Written By Steve Chamberlain <sac@cygnus.com>. */
27 #include "dwarf2dbg.h"
30 #define h8_opcodes ops
31 #include "opcode/h8300.h"
32 #include "safe-ctype.h"
38 const char comment_chars
[] = ";";
39 const char line_comment_chars
[] = "#";
40 const char line_separator_chars
[] = "";
42 static void sbranch (int);
43 static void h8300hmode (int);
44 static void h8300smode (int);
45 static void h8300hnmode (int);
46 static void h8300snmode (int);
47 static void h8300sxmode (int);
48 static void h8300sxnmode (int);
49 static void pint (int);
56 #define PSIZE (Hmode && !Nmode ? L_32 : L_16)
58 static int bsize
= L_8
; /* Default branch displacement. */
66 const struct h8_opcode
*opcode
;
69 static struct h8_instruction
*h8_instructions
;
72 h8300hmode (int arg ATTRIBUTE_UNUSED
)
76 if (!bfd_set_arch_mach (stdoutput
, bfd_arch_h8300
, bfd_mach_h8300h
))
77 as_warn (_("could not set architecture and machine"));
81 h8300smode (int arg ATTRIBUTE_UNUSED
)
85 if (!bfd_set_arch_mach (stdoutput
, bfd_arch_h8300
, bfd_mach_h8300s
))
86 as_warn (_("could not set architecture and machine"));
90 h8300hnmode (int arg ATTRIBUTE_UNUSED
)
95 if (!bfd_set_arch_mach (stdoutput
, bfd_arch_h8300
, bfd_mach_h8300hn
))
96 as_warn (_("could not set architecture and machine"));
100 h8300snmode (int arg ATTRIBUTE_UNUSED
)
105 if (!bfd_set_arch_mach (stdoutput
, bfd_arch_h8300
, bfd_mach_h8300sn
))
106 as_warn (_("could not set architecture and machine"));
110 h8300sxmode (int arg ATTRIBUTE_UNUSED
)
115 if (!bfd_set_arch_mach (stdoutput
, bfd_arch_h8300
, bfd_mach_h8300sx
))
116 as_warn (_("could not set architecture and machine"));
120 h8300sxnmode (int arg ATTRIBUTE_UNUSED
)
126 if (!bfd_set_arch_mach (stdoutput
, bfd_arch_h8300
, bfd_mach_h8300sxn
))
127 as_warn (_("could not set architecture and machine"));
137 pint (int arg ATTRIBUTE_UNUSED
)
139 cons (Hmode
? 4 : 2);
142 /* Like obj_elf_section, but issues a warning for new
143 sections which do not have an attribute specification. */
146 h8300_elf_section (int push
)
148 static const char * known_data_sections
[] = { ".rodata", ".tdata", ".tbss" };
149 static const char * known_data_prefixes
[] = { ".debug", ".zdebug", ".gnu.warning" };
150 char * saved_ilp
= input_line_pointer
;
153 name
= obj_elf_section_name ();
157 if (* input_line_pointer
!= ','
158 && bfd_get_section_by_name (stdoutput
, name
) == NULL
)
162 /* Ignore this warning for well known data sections. */
163 for (i
= ARRAY_SIZE (known_data_sections
); i
--;)
164 if (strcmp (name
, known_data_sections
[i
]) == 0)
168 for (i
= ARRAY_SIZE (known_data_prefixes
); i
--;)
169 if (strncmp (name
, known_data_prefixes
[i
],
170 strlen (known_data_prefixes
[i
])) == 0)
174 as_warn (_("new section '%s' defined without attributes - this might cause problems"), name
);
177 /* FIXME: We ought to free the memory allocated by obj_elf_section_name()
178 for 'name', but we do not know if it was taken from the obstack, via
179 demand_copy_C_string(), or xmalloc()ed. */
180 input_line_pointer
= saved_ilp
;
181 obj_elf_section (push
);
184 /* This table describes all the machine specific pseudo-ops the assembler
185 has to support. The fields are:
186 pseudo-op name without dot
187 function to call to execute this pseudo-op
188 Integer arg to pass to the function. */
190 const pseudo_typeS md_pseudo_table
[] =
192 {"h8300h", h8300hmode
, 0},
193 {"h8300hn", h8300hnmode
, 0},
194 {"h8300s", h8300smode
, 0},
195 {"h8300sn", h8300snmode
, 0},
196 {"h8300sx", h8300sxmode
, 0},
197 {"h8300sxn", h8300sxnmode
, 0},
198 {"sbranch", sbranch
, L_8
},
199 {"lbranch", sbranch
, L_16
},
205 {"form", listing_psize
, 0},
206 {"heading", listing_title
, 0},
207 {"import", s_ignore
, 0},
208 {"page", listing_eject
, 0},
209 {"program", s_ignore
, 0},
212 {"section", h8300_elf_section
, 0},
213 {"section.s", h8300_elf_section
, 0},
214 {"sect", h8300_elf_section
, 0},
215 {"sect.s", h8300_elf_section
, 0},
221 const char EXP_CHARS
[] = "eE";
223 /* Chars that mean this number is a floating point constant
226 const char FLT_CHARS
[] = "rRsSfFdDxXpP";
228 static struct hash_control
*opcode_hash_control
; /* Opcode mnemonics. */
230 /* This function is called once, at assembler startup time. This
231 should set up all the tables, etc. that the MD part of the assembler
237 unsigned int nopcodes
;
238 struct h8_opcode
*p
, *p1
;
239 struct h8_instruction
*pi
;
240 char prev_buffer
[100];
243 if (!bfd_set_arch_mach (stdoutput
, bfd_arch_h8300
, bfd_mach_h8300
))
244 as_warn (_("could not set architecture and machine"));
246 opcode_hash_control
= hash_new ();
249 nopcodes
= sizeof (h8_opcodes
) / sizeof (struct h8_opcode
);
251 h8_instructions
= (struct h8_instruction
*)
252 xmalloc (nopcodes
* sizeof (struct h8_instruction
));
254 pi
= h8_instructions
;
256 /* We do a minimum amount of sorting on the opcode table; this is to
257 make it easy to describe the mova instructions without unnecessary
259 Sorting only takes place inside blocks of instructions of the form
260 X/Y, so for example mova/b, mova/w and mova/l can be intermixed. */
263 struct h8_opcode
*first_skipped
= 0;
265 char *src
= p1
->name
;
270 /* Strip off any . part when inserting the opcode and only enter
271 unique codes into the hash table. */
272 dst
= buffer
= malloc (strlen (src
) + 1);
281 cmplen
= src
- p1
->name
+ 1;
288 hash_insert (opcode_hash_control
, buffer
, (char *) pi
);
289 strcpy (prev_buffer
, buffer
);
292 for (p
= p1
; p
->name
; p
++)
294 /* A negative TIME is used to indicate that we've added this opcode
298 if (strncmp (p
->name
, buffer
, cmplen
) != 0
299 || (p
->name
[cmplen
] != '\0' && p
->name
[cmplen
] != '.'
300 && p
->name
[cmplen
- 1] != '/'))
302 if (first_skipped
== 0)
306 if (strncmp (p
->name
, buffer
, len
) != 0)
308 if (first_skipped
== 0)
314 pi
->size
= p
->name
[len
] == '.' ? p
->name
[len
+ 1] : 0;
317 /* Find the number of operands. */
319 while (pi
->noperands
< 3 && p
->args
.nib
[pi
->noperands
] != (op_type
) E
)
322 /* Find the length of the opcode in bytes. */
324 while (p
->data
.nib
[pi
->length
* 2] != (op_type
) E
)
333 /* Add entry for the NULL vector terminator. */
350 static void clever_message (const struct h8_instruction
*, struct h8_op
*);
351 static void fix_operand_size (struct h8_op
*, int);
352 static void build_bytes (const struct h8_instruction
*, struct h8_op
*);
353 static void do_a_fix_imm (int, int, struct h8_op
*, int, const struct h8_instruction
*);
354 static void check_operand (struct h8_op
*, unsigned int, char *);
355 static const struct h8_instruction
* get_specific (const struct h8_instruction
*, struct h8_op
*, int) ;
356 static char *get_operands (unsigned, char *, struct h8_op
*);
357 static void get_operand (char **, struct h8_op
*, int);
358 static int parse_reg (char *, op_type
*, unsigned *, int);
359 static char *skip_colonthing (char *, int *);
360 static char *parse_exp (char *, struct h8_op
*);
362 static int constant_fits_width_p (struct h8_op
*, unsigned int);
363 static int constant_fits_size_p (struct h8_op
*, int, int);
367 WREG r0,r1,r2,r3,r4,r5,r6,r7,fp,sp
376 /* Try to parse a reg name. Return the number of chars consumed. */
379 parse_reg (char *src
, op_type
*mode
, unsigned int *reg
, int direction
)
384 /* Cribbed from get_symbol_end. */
385 if (!is_name_beginner (*src
) || *src
== '\001')
388 while ((is_part_of_name (*end
) && *end
!= '.') || *end
== '\001')
392 if (len
== 2 && TOLOWER (src
[0]) == 's' && TOLOWER (src
[1]) == 'p')
394 *mode
= PSIZE
| REG
| direction
;
399 TOLOWER (src
[0]) == 'c' &&
400 TOLOWER (src
[1]) == 'c' &&
401 TOLOWER (src
[2]) == 'r')
408 TOLOWER (src
[0]) == 'e' &&
409 TOLOWER (src
[1]) == 'x' &&
410 TOLOWER (src
[2]) == 'r')
417 TOLOWER (src
[0]) == 'v' &&
418 TOLOWER (src
[1]) == 'b' &&
419 TOLOWER (src
[2]) == 'r')
426 TOLOWER (src
[0]) == 's' &&
427 TOLOWER (src
[1]) == 'b' &&
428 TOLOWER (src
[2]) == 'r')
434 if (len
== 2 && TOLOWER (src
[0]) == 'f' && TOLOWER (src
[1]) == 'p')
436 *mode
= PSIZE
| REG
| direction
;
440 if (len
== 3 && TOLOWER (src
[0]) == 'e' && TOLOWER (src
[1]) == 'r' &&
441 src
[2] >= '0' && src
[2] <= '7')
443 *mode
= L_32
| REG
| direction
;
446 as_warn (_("Reg not valid for H8/300"));
449 if (len
== 2 && TOLOWER (src
[0]) == 'e' && src
[1] >= '0' && src
[1] <= '7')
451 *mode
= L_16
| REG
| direction
;
452 *reg
= src
[1] - '0' + 8;
454 as_warn (_("Reg not valid for H8/300"));
458 if (TOLOWER (src
[0]) == 'r')
460 if (src
[1] >= '0' && src
[1] <= '7')
462 if (len
== 3 && TOLOWER (src
[2]) == 'l')
464 *mode
= L_8
| REG
| direction
;
465 *reg
= (src
[1] - '0') + 8;
468 if (len
== 3 && TOLOWER (src
[2]) == 'h')
470 *mode
= L_8
| REG
| direction
;
471 *reg
= (src
[1] - '0');
476 *mode
= L_16
| REG
| direction
;
477 *reg
= (src
[1] - '0');
487 /* Parse an immediate or address-related constant and store it in OP.
488 If the user also specifies the operand's size, store that size
489 in OP->MODE, otherwise leave it for later code to decide. */
492 parse_exp (char *src
, struct h8_op
*op
)
496 save
= input_line_pointer
;
497 input_line_pointer
= src
;
498 expression (&op
->exp
);
499 if (op
->exp
.X_op
== O_absent
)
500 as_bad (_("missing operand"));
501 src
= input_line_pointer
;
502 input_line_pointer
= save
;
504 return skip_colonthing (src
, &op
->mode
);
508 /* If SRC starts with an explicit operand size, skip it and store the size
509 in *MODE. Leave *MODE unchanged otherwise. */
512 skip_colonthing (char *src
, int *mode
)
518 if (src
[0] == '8' && !ISDIGIT (src
[1]))
520 else if (src
[0] == '2' && !ISDIGIT (src
[1]))
522 else if (src
[0] == '3' && !ISDIGIT (src
[1]))
524 else if (src
[0] == '4' && !ISDIGIT (src
[1]))
526 else if (src
[0] == '5' && !ISDIGIT (src
[1]))
528 else if (src
[0] == '2' && src
[1] == '4' && !ISDIGIT (src
[2]))
530 else if (src
[0] == '3' && src
[1] == '2' && !ISDIGIT (src
[2]))
532 else if (src
[0] == '1' && src
[1] == '6' && !ISDIGIT (src
[2]))
535 as_bad (_("invalid operand size requested"));
537 while (ISDIGIT (*src
))
543 /* The many forms of operand:
546 @Rn Register indirect
547 @(exp[:16], Rn) Register indirect with displacement
551 @aa:16 absolute 16 bit
554 #xx[:size] immediate data
555 @(exp:[8], pc) pc rel
556 @@aa[:8] memory indirect. */
559 constant_fits_width_p (struct h8_op
*operand
, unsigned int width
)
563 num
= ((operand
->exp
.X_add_number
& 0xffffffff) ^ 0x80000000) - 0x80000000;
564 return (num
& ~width
) == 0 || (num
| width
) == ~0;
568 constant_fits_size_p (struct h8_op
*operand
, int size
, int no_symbols
)
573 && (operand
->exp
.X_add_symbol
!= 0 || operand
->exp
.X_op_symbol
!= 0))
575 num
= operand
->exp
.X_add_number
& 0xffffffff;
579 return (num
& ~3) == 0;
581 return (num
& ~7) == 0;
583 return num
>= 1 && num
< 8;
585 return (num
& ~15) == 0;
587 return num
>= 1 && num
< 32;
589 num
= (num
^ 0x80000000) - 0x80000000;
590 return (num
& ~0xFF) == 0 || (num
| 0x7F) == ~0;
592 return (num
& ~0xFF) == 0;
594 num
= (num
^ 0x80000000) - 0x80000000;
595 return (num
& ~0xFFFF) == 0 || (num
| 0x7FFF) == ~0;
597 return (num
& ~0xFFFF) == 0;
606 get_operand (char **ptr
, struct h8_op
*op
, int direction
)
615 /* Check for '(' and ')' for instructions ldm and stm. */
616 if (src
[0] == '(' && src
[8] == ')')
619 /* Gross. Gross. ldm and stm have a format not easily handled
620 by get_operand. We deal with it explicitly here. */
621 if (TOLOWER (src
[0]) == 'e' && TOLOWER (src
[1]) == 'r' &&
622 ISDIGIT (src
[2]) && src
[3] == '-' &&
623 TOLOWER (src
[4]) == 'e' && TOLOWER (src
[5]) == 'r' && ISDIGIT (src
[6]))
630 /* Check register pair's validity as per tech note TN-H8*-193A/E
631 from Renesas for H8S and H8SX hardware manual. */
632 if ( !(low
== 0 && (high
== 1 || high
== 2 || high
== 3))
633 && !(low
== 1 && (high
== 2 || high
== 3 || high
== 4) && SXmode
)
634 && !(low
== 2 && (high
== 3 || ((high
== 4 || high
== 5) && SXmode
)))
635 && !(low
== 3 && (high
== 4 || high
== 5 || high
== 6) && SXmode
)
636 && !(low
== 4 && (high
== 5 || high
== 6))
637 && !(low
== 4 && high
== 7 && SXmode
)
638 && !(low
== 5 && (high
== 6 || high
== 7) && SXmode
)
639 && !(low
== 6 && high
== 7 && SXmode
))
640 as_bad (_("Invalid register list for ldm/stm\n"));
642 /* Even sicker. We encode two registers into op->reg. One
643 for the low register to save, the other for the high
644 register to save; we also set the high bit in op->reg
645 so we know this is "very special". */
646 op
->reg
= 0x80000000 | (high
<< 8) | low
;
655 len
= parse_reg (src
, &op
->mode
, &op
->reg
, direction
);
661 int size
= op
->mode
& SIZE
;
666 as_warn (_("mismatch between register and suffix"));
667 op
->mode
= (op
->mode
& ~MODE
) | LOWREG
;
670 if (size
!= L_32
&& size
!= L_16
)
671 as_warn (_("mismatch between register and suffix"));
672 op
->mode
= (op
->mode
& ~MODE
) | LOWREG
;
673 op
->mode
= (op
->mode
& ~SIZE
) | L_16
;
676 op
->mode
= (op
->mode
& ~MODE
) | LOWREG
;
677 if (size
!= L_32
&& size
!= L_8
)
678 as_warn (_("mismatch between register and suffix"));
679 op
->mode
= (op
->mode
& ~MODE
) | LOWREG
;
680 op
->mode
= (op
->mode
& ~SIZE
) | L_8
;
683 as_warn (_("invalid suffix after register."));
697 *ptr
= parse_exp (src
+ 1, op
);
698 if (op
->exp
.X_add_number
>= 0x100)
703 /* FIXME : 2? or 4? */
704 if (op
->exp
.X_add_number
>= 0x400)
705 as_bad (_("address too high for vector table jmp/jsr"));
706 else if (op
->exp
.X_add_number
>= 0x200)
711 op
->exp
.X_add_number
= op
->exp
.X_add_number
/ divisor
- 0x80;
718 if (*src
== '-' || *src
== '+')
720 len
= parse_reg (src
+ 1, &mode
, &num
, direction
);
723 /* Oops, not a reg after all, must be ordinary exp. */
724 op
->mode
= ABS
| direction
;
725 *ptr
= parse_exp (src
, op
);
729 if (((mode
& SIZE
) != PSIZE
)
730 /* For Normal mode accept 16 bit and 32 bit pointer registers. */
731 && (!Nmode
|| ((mode
& SIZE
) != L_32
)))
732 as_bad (_("Wrong size pointer register for architecture."));
734 op
->mode
= src
[0] == '-' ? RDPREDEC
: RDPREINC
;
736 *ptr
= src
+ 1 + len
;
743 /* See if this is @(ERn.x, PC). */
744 len
= parse_reg (src
, &mode
, &op
->reg
, direction
);
745 if (len
!= 0 && (mode
& MODE
) == REG
&& src
[len
] == '.')
747 switch (TOLOWER (src
[len
+ 1]))
750 mode
= PCIDXB
| direction
;
753 mode
= PCIDXW
| direction
;
756 mode
= PCIDXL
| direction
;
763 && src
[len
+ 2] == ','
764 && TOLOWER (src
[len
+ 3]) != 'p'
765 && TOLOWER (src
[len
+ 4]) != 'c'
766 && src
[len
+ 5] != ')')
768 *ptr
= src
+ len
+ 6;
772 /* Fall through into disp case - the grammar is somewhat
773 ambiguous, so we should try whether it's a DISP operand
774 after all ("ER3.L" might be a poorly named label...). */
779 /* Start off assuming a 16 bit offset. */
781 src
= parse_exp (src
, op
);
784 op
->mode
|= ABS
| direction
;
791 as_bad (_("expected @(exp, reg16)"));
796 len
= parse_reg (src
, &mode
, &op
->reg
, direction
);
797 if (len
== 0 || (mode
& MODE
) != REG
)
799 as_bad (_("expected @(exp, reg16)"));
805 switch (TOLOWER (src
[1]))
808 op
->mode
|= INDEXB
| direction
;
811 op
->mode
|= INDEXW
| direction
;
814 op
->mode
|= INDEXL
| direction
;
817 as_bad (_("expected .L, .W or .B for register in indexed addressing mode"));
823 op
->mode
|= DISP
| direction
;
824 src
= skip_colonthing (src
, &op
->mode
);
826 if (*src
!= ')' && '(')
828 as_bad (_("expected @(exp, reg16)"));
834 len
= parse_reg (src
, &mode
, &num
, direction
);
839 if (*src
== '+' || *src
== '-')
841 if (((mode
& SIZE
) != PSIZE
)
842 /* For Normal mode accept 16 bit and 32 bit pointer registers. */
843 && (!Nmode
|| ((mode
& SIZE
) != L_32
)))
844 as_bad (_("Wrong size pointer register for architecture."));
845 op
->mode
= *src
== '+' ? RSPOSTINC
: RSPOSTDEC
;
851 if (((mode
& SIZE
) != PSIZE
)
852 /* For Normal mode accept 16 bit and 32 bit pointer registers. */
853 && (!Nmode
|| ((mode
& SIZE
) != L_32
)))
854 as_bad (_("Wrong size pointer register for architecture."));
856 op
->mode
= direction
| IND
| PSIZE
;
864 /* must be a symbol */
866 op
->mode
= ABS
| direction
;
867 *ptr
= parse_exp (src
, op
);
875 *ptr
= parse_exp (src
+ 1, op
);
878 else if (strncmp (src
, "mach", 4) == 0 ||
879 strncmp (src
, "macl", 4) == 0 ||
880 strncmp (src
, "MACH", 4) == 0 ||
881 strncmp (src
, "MACL", 4) == 0)
883 op
->reg
= TOLOWER (src
[3]) == 'l';
891 *ptr
= parse_exp (src
, op
);
896 get_operands (unsigned int noperands
, char *op_end
, struct h8_op
*operand
)
907 get_operand (&ptr
, operand
+ 0, SRC
);
911 get_operand (&ptr
, operand
+ 1, DST
);
917 get_operand (&ptr
, operand
+ 0, SRC
);
920 get_operand (&ptr
, operand
+ 1, DST
);
925 get_operand (&ptr
, operand
+ 0, SRC
);
928 get_operand (&ptr
, operand
+ 1, DST
);
931 get_operand (&ptr
, operand
+ 2, OP3
);
941 /* MOVA has special requirements. Rather than adding twice the amount of
942 addressing modes, we simply special case it a bit. */
944 get_mova_operands (char *op_end
, struct h8_op
*operand
)
948 if (ptr
[1] != '@' || ptr
[2] != '(')
952 ptr
= parse_exp (ptr
, &operand
[0]);
957 get_operand (&ptr
, operand
+ 1, DST
);
965 operand
[0].mode
= (operand
[0].mode
& ~MODE
) | INDEXB
;
968 operand
[0].mode
= (operand
[0].mode
& ~MODE
) | INDEXW
;
971 operand
[0].mode
= (operand
[0].mode
& ~MODE
) | INDEXL
;
977 else if ((operand
[1].mode
& MODE
) == LOWREG
)
979 switch (operand
[1].mode
& SIZE
)
982 operand
[0].mode
= (operand
[0].mode
& ~MODE
) | INDEXB
;
985 operand
[0].mode
= (operand
[0].mode
& ~MODE
) | INDEXW
;
988 operand
[0].mode
= (operand
[0].mode
& ~MODE
) | INDEXL
;
997 if (*ptr
++ != ')' || *ptr
++ != ',')
999 get_operand (&ptr
, operand
+ 2, OP3
);
1000 /* See if we can use the short form of MOVA. */
1001 if (((operand
[1].mode
& MODE
) == REG
|| (operand
[1].mode
& MODE
) == LOWREG
)
1002 && (operand
[2].mode
& MODE
) == REG
1003 && (operand
[1].reg
& 7) == (operand
[2].reg
& 7))
1005 operand
[1].mode
= operand
[2].mode
= 0;
1006 operand
[0].reg
= operand
[2].reg
& 7;
1011 as_bad (_("expected valid addressing mode for mova: \"@(disp, ea.sz),ERn\""));
1015 get_rtsl_operands (char *ptr
, struct h8_op
*operand
)
1017 int mode
, len
, type
= 0;
1018 unsigned int num
, num2
;
1026 len
= parse_reg (ptr
, &mode
, &num
, SRC
);
1027 if (len
== 0 || (mode
& MODE
) != REG
)
1029 as_bad (_("expected register"));
1035 len
= parse_reg (++ptr
, &mode
, &num2
, SRC
);
1036 if (len
== 0 || (mode
& MODE
) != REG
)
1038 as_bad (_("expected register"));
1042 /* CONST_xxx are used as placeholders in the opcode table. */
1046 as_bad (_("invalid register list"));
1051 num2
= num
, num
= 0;
1052 if (type
== 1 && *ptr
++ != ')')
1054 as_bad (_("expected closing paren"));
1057 operand
[0].mode
= RS32
;
1058 operand
[1].mode
= RD32
;
1059 operand
[0].reg
= num
;
1060 operand
[1].reg
= num2
;
1063 /* Passed a pointer to a list of opcodes which use different
1064 addressing modes, return the opcode which matches the opcodes
1067 static const struct h8_instruction
*
1068 get_specific (const struct h8_instruction
*instruction
,
1069 struct h8_op
*operands
, int size
)
1071 const struct h8_instruction
*this_try
= instruction
;
1072 const struct h8_instruction
*found_other
= 0, *found_mismatched
= 0;
1074 int this_index
= instruction
->idx
;
1077 /* There's only one ldm/stm and it's easier to just
1078 get out quick for them. */
1079 if (OP_KIND (instruction
->opcode
->how
) == O_LDM
1080 || OP_KIND (instruction
->opcode
->how
) == O_STM
)
1083 while (noperands
< 3 && operands
[noperands
].mode
!= 0)
1086 while (this_index
== instruction
->idx
&& !found
)
1091 this_try
= instruction
++;
1092 this_size
= this_try
->opcode
->how
& SN
;
1094 if (this_try
->noperands
!= noperands
)
1096 else if (this_try
->noperands
> 0)
1100 for (i
= 0; i
< this_try
->noperands
&& found
; i
++)
1102 op_type op
= this_try
->opcode
->args
.nib
[i
];
1103 int op_mode
= op
& MODE
;
1104 int op_size
= op
& SIZE
;
1105 int x
= operands
[i
].mode
;
1106 int x_mode
= x
& MODE
;
1107 int x_size
= x
& SIZE
;
1109 if (op_mode
== LOWREG
&& (x_mode
== REG
|| x_mode
== LOWREG
))
1111 if ((x_size
== L_8
&& (operands
[i
].reg
& 8) == 0)
1112 || (x_size
== L_16
&& (operands
[i
].reg
& 8) == 8))
1113 as_warn (_("can't use high part of register in operand %d"), i
);
1115 if (x_size
!= op_size
)
1118 else if (op_mode
== REG
)
1120 if (x_mode
== LOWREG
)
1126 x_size
= (Hmode
? L_32
: L_16
);
1128 op_size
= (Hmode
? L_32
: L_16
);
1130 /* The size of the reg is v important. */
1131 if (op_size
!= x_size
)
1134 else if (op_mode
& CTRL
) /* control register */
1136 if (!(x_mode
& CTRL
))
1142 if (op_mode
!= CCR
&&
1143 op_mode
!= CCR_EXR
&&
1144 op_mode
!= CC_EX_VB_SB
)
1148 if (op_mode
!= EXR
&&
1149 op_mode
!= CCR_EXR
&&
1150 op_mode
!= CC_EX_VB_SB
)
1154 if (op_mode
!= MACH
&&
1159 if (op_mode
!= MACL
&&
1164 if (op_mode
!= VBR
&&
1165 op_mode
!= VBR_SBR
&&
1166 op_mode
!= CC_EX_VB_SB
)
1170 if (op_mode
!= SBR
&&
1171 op_mode
!= VBR_SBR
&&
1172 op_mode
!= CC_EX_VB_SB
)
1177 else if ((op
& ABSJMP
) && (x_mode
== ABS
|| x_mode
== PCREL
))
1179 operands
[i
].mode
&= ~MODE
;
1180 operands
[i
].mode
|= ABSJMP
;
1181 /* But it may not be 24 bits long. */
1182 if (x_mode
== ABS
&& !Hmode
)
1184 operands
[i
].mode
&= ~SIZE
;
1185 operands
[i
].mode
|= L_16
;
1187 if ((operands
[i
].mode
& SIZE
) == L_32
1188 && (op_mode
& SIZE
) != L_32
)
1191 else if (x_mode
== IMM
&& op_mode
!= IMM
)
1193 offsetT num
= operands
[i
].exp
.X_add_number
& 0xffffffff;
1194 if (op_mode
== KBIT
|| op_mode
== DBIT
)
1195 /* This is ok if the immediate value is sensible. */;
1196 else if (op_mode
== CONST_2
)
1198 else if (op_mode
== CONST_4
)
1200 else if (op_mode
== CONST_8
)
1202 else if (op_mode
== CONST_16
)
1207 else if (op_mode
== PCREL
&& op_mode
== x_mode
)
1209 /* movsd, bsr/bc and bsr/bs only come in PCREL16 flavour:
1210 If x_size is L_8, promote it. */
1211 if (OP_KIND (this_try
->opcode
->how
) == O_MOVSD
1212 || OP_KIND (this_try
->opcode
->how
) == O_BSRBC
1213 || OP_KIND (this_try
->opcode
->how
) == O_BSRBS
)
1217 /* The size of the displacement is important. */
1218 if (op_size
!= x_size
)
1221 else if ((op_mode
== DISP
|| op_mode
== IMM
|| op_mode
== ABS
1222 || op_mode
== INDEXB
|| op_mode
== INDEXW
1223 || op_mode
== INDEXL
)
1224 && op_mode
== x_mode
)
1226 /* Promote a L_24 to L_32 if it makes us match. */
1227 if (x_size
== L_24
&& op_size
== L_32
)
1233 if (((x_size
== L_16
&& op_size
== L_16U
)
1234 || (x_size
== L_8
&& op_size
== L_8U
)
1235 || (x_size
== L_3
&& op_size
== L_3NZ
))
1236 /* We're deliberately more permissive for ABS modes. */
1238 || constant_fits_size_p (operands
+ i
, op_size
,
1242 if (x_size
!= 0 && op_size
!= x_size
)
1244 else if (x_size
== 0
1245 && ! constant_fits_size_p (operands
+ i
, op_size
,
1249 else if (op_mode
!= x_mode
)
1257 if ((this_try
->opcode
->available
== AV_H8SX
&& ! SXmode
)
1258 || (this_try
->opcode
->available
== AV_H8S
&& ! Smode
)
1259 || (this_try
->opcode
->available
== AV_H8H
&& ! Hmode
))
1260 found
= 0, found_other
= this_try
;
1261 else if (this_size
!= size
&& (this_size
!= SN
&& size
!= SN
))
1262 found_mismatched
= this_try
, found
= 0;
1270 as_warn (_("Opcode `%s' with these operand types not available in %s mode"),
1271 found_other
->opcode
->name
,
1272 (! Hmode
&& ! Smode
? "H8/300"
1277 else if (found_mismatched
)
1279 as_warn (_("mismatch between opcode size and operand size"));
1280 return found_mismatched
;
1286 check_operand (struct h8_op
*operand
, unsigned int width
, char *string
)
1288 if (operand
->exp
.X_add_symbol
== 0
1289 && operand
->exp
.X_op_symbol
== 0)
1291 /* No symbol involved, let's look at offset, it's dangerous if
1292 any of the high bits are not 0 or ff's, find out by oring or
1293 anding with the width and seeing if the answer is 0 or all
1296 if (! constant_fits_width_p (operand
, width
))
1299 && (operand
->exp
.X_add_number
& 0xff00) == 0xff00)
1301 /* Just ignore this one - which happens when trying to
1302 fit a 16 bit address truncated into an 8 bit address
1303 of something like bset. */
1305 else if (strcmp (string
, "@") == 0
1307 && (operand
->exp
.X_add_number
& 0xff8000) == 0xff8000)
1309 /* Just ignore this one - which happens when trying to
1310 fit a 24 bit address truncated into a 16 bit address
1311 of something like mov.w. */
1315 as_warn (_("operand %s0x%lx out of range."), string
,
1316 (unsigned long) operand
->exp
.X_add_number
);
1322 /* RELAXMODE has one of 3 values:
1324 0 Output a "normal" reloc, no relaxing possible for this insn/reloc
1326 1 Output a relaxable 24bit absolute mov.w address relocation
1327 (may relax into a 16bit absolute address).
1329 2 Output a relaxable 16/24 absolute mov.b address relocation
1330 (may relax into an 8bit absolute address). */
1333 do_a_fix_imm (int offset
, int nibble
, struct h8_op
*operand
, int relaxmode
, const struct h8_instruction
*this_try
)
1338 char *bytes
= frag_now
->fr_literal
+ offset
;
1340 char *t
= ((operand
->mode
& MODE
) == IMM
) ? "#" : "@";
1342 if (operand
->exp
.X_add_symbol
== 0)
1344 switch (operand
->mode
& SIZE
)
1347 check_operand (operand
, 0x3, t
);
1348 bytes
[0] |= (operand
->exp
.X_add_number
& 3) << (nibble
? 0 : 4);
1352 check_operand (operand
, 0x7, t
);
1353 bytes
[0] |= (operand
->exp
.X_add_number
& 7) << (nibble
? 0 : 4);
1356 check_operand (operand
, 0xF, t
);
1357 bytes
[0] |= (operand
->exp
.X_add_number
& 15) << (nibble
? 0 : 4);
1360 check_operand (operand
, 0x1F, t
);
1361 bytes
[0] |= operand
->exp
.X_add_number
& 31;
1365 check_operand (operand
, 0xff, t
);
1366 bytes
[0] |= operand
->exp
.X_add_number
;
1370 check_operand (operand
, 0xffff, t
);
1371 bytes
[0] |= operand
->exp
.X_add_number
>> 8;
1372 bytes
[1] |= operand
->exp
.X_add_number
>> 0;
1374 /* MOVA needs both relocs to relax the second operand properly. */
1376 && (OP_KIND(this_try
->opcode
->how
) == O_MOVAB
1377 || OP_KIND(this_try
->opcode
->how
) == O_MOVAW
1378 || OP_KIND(this_try
->opcode
->how
) == O_MOVAL
))
1381 fix_new_exp (frag_now
, offset
, 2, &operand
->exp
, 0, idx
);
1386 check_operand (operand
, 0xffffff, t
);
1387 bytes
[0] |= operand
->exp
.X_add_number
>> 16;
1388 bytes
[1] |= operand
->exp
.X_add_number
>> 8;
1389 bytes
[2] |= operand
->exp
.X_add_number
>> 0;
1393 /* This should be done with bfd. */
1394 bytes
[0] |= operand
->exp
.X_add_number
>> 24;
1395 bytes
[1] |= operand
->exp
.X_add_number
>> 16;
1396 bytes
[2] |= operand
->exp
.X_add_number
>> 8;
1397 bytes
[3] |= operand
->exp
.X_add_number
>> 0;
1400 idx
= (relaxmode
== 2) ? R_MOV24B1
: R_MOVL1
;
1401 fix_new_exp (frag_now
, offset
, 4, &operand
->exp
, 0, idx
);
1408 switch (operand
->mode
& SIZE
)
1413 where
= (operand
->mode
& SIZE
) == L_24
? -1 : 0;
1416 else if (relaxmode
== 1)
1422 as_bad (_("Can't work out size of operand.\n"));
1431 operand
->exp
.X_add_number
=
1432 ((operand
->exp
.X_add_number
& 0xffff) ^ 0x8000) - 0x8000;
1433 operand
->exp
.X_add_number
|= (bytes
[0] << 8) | bytes
[1];
1439 operand
->exp
.X_add_number
=
1440 ((operand
->exp
.X_add_number
& 0xff) ^ 0x80) - 0x80;
1441 operand
->exp
.X_add_number
|= bytes
[0];
1444 fix_new_exp (frag_now
,
1453 /* Now we know what sort of opcodes it is, let's build the bytes. */
1456 build_bytes (const struct h8_instruction
*this_try
, struct h8_op
*operand
)
1459 char *output
= frag_more (this_try
->length
);
1460 const op_type
*nibble_ptr
= this_try
->opcode
->data
.nib
;
1462 unsigned int nibble_count
= 0;
1466 char asnibbles
[100];
1467 char *p
= asnibbles
;
1470 if (!Hmode
&& this_try
->opcode
->available
!= AV_H8
)
1471 as_warn (_("Opcode `%s' with these operand types not available in H8/300 mode"),
1472 this_try
->opcode
->name
);
1474 && this_try
->opcode
->available
!= AV_H8
1475 && this_try
->opcode
->available
!= AV_H8H
)
1476 as_warn (_("Opcode `%s' with these operand types not available in H8/300H mode"),
1477 this_try
->opcode
->name
);
1479 && this_try
->opcode
->available
!= AV_H8
1480 && this_try
->opcode
->available
!= AV_H8H
1481 && this_try
->opcode
->available
!= AV_H8S
)
1482 as_warn (_("Opcode `%s' with these operand types not available in H8/300S mode"),
1483 this_try
->opcode
->name
);
1485 while (*nibble_ptr
!= (op_type
) E
)
1492 d
= (c
& OP3
) == OP3
? 2 : (c
& DST
) == DST
? 1 : 0;
1500 if (c2
== REG
|| c2
== LOWREG
1501 || c2
== IND
|| c2
== PREINC
|| c2
== PREDEC
1502 || c2
== POSTINC
|| c2
== POSTDEC
)
1504 nib
= operand
[d
].reg
;
1509 else if (c
& CTRL
) /* Control reg operand. */
1510 nib
= operand
[d
].reg
;
1512 else if ((c
& DISPREG
) == (DISPREG
))
1514 nib
= operand
[d
].reg
;
1518 operand
[d
].mode
= c
;
1519 op_at
[d
] = nibble_count
;
1522 else if (c2
== IMM
|| c2
== PCREL
|| c2
== ABS
1523 || (c
& ABSJMP
) || c2
== DISP
)
1525 operand
[d
].mode
= c
;
1526 op_at
[d
] = nibble_count
;
1529 else if ((c
& IGNORE
) || (c
& DATA
))
1532 else if (c2
== DBIT
)
1534 switch (operand
[0].exp
.X_add_number
)
1543 as_bad (_("Need #1 or #2 here"));
1546 else if (c2
== KBIT
)
1548 switch (operand
[0].exp
.X_add_number
)
1558 as_warn (_("#4 not valid on H8/300."));
1563 as_bad (_("Need #1 or #2 here"));
1566 /* Stop it making a fix. */
1567 operand
[0].mode
= 0;
1571 operand
[d
].mode
|= MEMRELAX
;
1587 if (operand
[0].mode
== MACREG
)
1588 /* stmac has mac[hl] as the first operand. */
1589 nib
= 2 + operand
[0].reg
;
1591 /* ldmac has mac[hl] as the second operand. */
1592 nib
= 2 + operand
[1].reg
;
1600 /* Disgusting. Why, oh why didn't someone ask us for advice
1601 on the assembler format. */
1602 if (OP_KIND (this_try
->opcode
->how
) == O_LDM
)
1604 high
= (operand
[1].reg
>> 8) & 0xf;
1605 low
= (operand
[1].reg
) & 0xf;
1606 asnibbles
[2] = high
- low
;
1607 asnibbles
[7] = high
;
1609 else if (OP_KIND (this_try
->opcode
->how
) == O_STM
)
1611 high
= (operand
[0].reg
>> 8) & 0xf;
1612 low
= (operand
[0].reg
) & 0xf;
1613 asnibbles
[2] = high
- low
;
1617 for (i
= 0; i
< this_try
->length
; i
++)
1618 output
[i
] = (asnibbles
[i
* 2] << 4) | asnibbles
[i
* 2 + 1];
1620 /* Note if this is a movb or a bit manipulation instruction
1621 there is a special relaxation which only applies. */
1622 if ( this_try
->opcode
->how
== O (O_MOV
, SB
)
1623 || this_try
->opcode
->how
== O (O_BCLR
, SB
)
1624 || this_try
->opcode
->how
== O (O_BAND
, SB
)
1625 || this_try
->opcode
->how
== O (O_BIAND
, SB
)
1626 || this_try
->opcode
->how
== O (O_BILD
, SB
)
1627 || this_try
->opcode
->how
== O (O_BIOR
, SB
)
1628 || this_try
->opcode
->how
== O (O_BIST
, SB
)
1629 || this_try
->opcode
->how
== O (O_BIXOR
, SB
)
1630 || this_try
->opcode
->how
== O (O_BLD
, SB
)
1631 || this_try
->opcode
->how
== O (O_BNOT
, SB
)
1632 || this_try
->opcode
->how
== O (O_BOR
, SB
)
1633 || this_try
->opcode
->how
== O (O_BSET
, SB
)
1634 || this_try
->opcode
->how
== O (O_BST
, SB
)
1635 || this_try
->opcode
->how
== O (O_BTST
, SB
)
1636 || this_try
->opcode
->how
== O (O_BXOR
, SB
))
1639 /* Output any fixes. */
1640 for (i
= 0; i
< this_try
->noperands
; i
++)
1642 int x
= operand
[i
].mode
;
1643 int x_mode
= x
& MODE
;
1645 if (x_mode
== IMM
|| x_mode
== DISP
)
1646 do_a_fix_imm (output
- frag_now
->fr_literal
+ op_at
[i
] / 2,
1647 op_at
[i
] & 1, operand
+ i
, (x
& MEMRELAX
) != 0,
1650 else if (x_mode
== ABS
)
1651 do_a_fix_imm (output
- frag_now
->fr_literal
+ op_at
[i
] / 2,
1652 op_at
[i
] & 1, operand
+ i
,
1653 (x
& MEMRELAX
) ? movb
+ 1 : 0,
1656 else if (x_mode
== PCREL
)
1658 int size16
= (x
& SIZE
) == L_16
;
1659 int size
= size16
? 2 : 1;
1660 int type
= size16
? R_PCRWORD
: R_PCRBYTE
;
1663 check_operand (operand
+ i
, size16
? 0x7fff : 0x7f, "@");
1665 if (operand
[i
].exp
.X_add_number
& 1)
1666 as_warn (_("branch operand has odd offset (%lx)\n"),
1667 (unsigned long) operand
->exp
.X_add_number
);
1669 /* The COFF port has always been off by one, changing it
1670 now would be an incompatible change, so we leave it as-is.
1672 We don't want to do this for ELF as we want to be
1673 compatible with the proposed ELF format from Hitachi. */
1674 operand
[i
].exp
.X_add_number
-= 1;
1678 operand
[i
].exp
.X_add_number
=
1679 ((operand
[i
].exp
.X_add_number
& 0xffff) ^ 0x8000) - 0x8000;
1683 operand
[i
].exp
.X_add_number
=
1684 ((operand
[i
].exp
.X_add_number
& 0xff) ^ 0x80) - 0x80;
1689 operand
[i
].exp
.X_add_number
|= output
[op_at
[i
] / 2];
1691 fixP
= fix_new_exp (frag_now
,
1692 output
- frag_now
->fr_literal
+ op_at
[i
] / 2,
1697 fixP
->fx_signed
= 1;
1699 else if (x_mode
== MEMIND
)
1701 check_operand (operand
+ i
, 0xff, "@@");
1702 fix_new_exp (frag_now
,
1703 output
- frag_now
->fr_literal
+ 1,
1709 else if (x_mode
== VECIND
)
1711 check_operand (operand
+ i
, 0x7f, "@@");
1712 /* FIXME: approximating the effect of "B31" here...
1713 This is very hackish, and ought to be done a better way. */
1714 operand
[i
].exp
.X_add_number
|= 0x80;
1715 fix_new_exp (frag_now
,
1716 output
- frag_now
->fr_literal
+ 1,
1722 else if (x
& ABSJMP
)
1725 bfd_reloc_code_real_type reloc_type
= R_JMPL1
;
1728 /* To be compatible with the proposed H8 ELF format, we
1729 want the relocation's offset to point to the first byte
1730 that will be modified, not to the start of the instruction. */
1732 if ((operand
->mode
& SIZE
) == L_32
)
1735 reloc_type
= R_RELLONG
;
1741 /* This jmp may be a jump or a branch. */
1743 check_operand (operand
+ i
,
1744 SXmode
? 0xffffffff : Hmode
? 0xffffff : 0xffff,
1747 if (operand
[i
].exp
.X_add_number
& 1)
1748 as_warn (_("branch operand has odd offset (%lx)\n"),
1749 (unsigned long) operand
->exp
.X_add_number
);
1752 operand
[i
].exp
.X_add_number
=
1753 ((operand
[i
].exp
.X_add_number
& 0xffff) ^ 0x8000) - 0x8000;
1754 fix_new_exp (frag_now
,
1755 output
- frag_now
->fr_literal
+ where
,
1764 /* Try to give an intelligent error message for common and simple to
1768 clever_message (const struct h8_instruction
*instruction
,
1769 struct h8_op
*operand
)
1771 /* Find out if there was more than one possible opcode. */
1773 if ((instruction
+ 1)->idx
!= instruction
->idx
)
1777 /* Only one opcode of this flavour, try to guess which operand
1779 for (argn
= 0; argn
< instruction
->noperands
; argn
++)
1781 switch (instruction
->opcode
->args
.nib
[argn
])
1784 if (operand
[argn
].mode
!= RD16
)
1786 as_bad (_("destination operand must be 16 bit register"));
1793 if (operand
[argn
].mode
!= RS8
)
1795 as_bad (_("source operand must be 8 bit register"));
1801 if (operand
[argn
].mode
!= ABS16DST
)
1803 as_bad (_("destination operand must be 16bit absolute address"));
1808 if (operand
[argn
].mode
!= RD8
)
1810 as_bad (_("destination operand must be 8 bit register"));
1816 if (operand
[argn
].mode
!= ABS16SRC
)
1818 as_bad (_("source operand must be 16bit absolute address"));
1826 as_bad (_("invalid operands"));
1830 /* If OPERAND is part of an address, adjust its size and value given
1831 that it addresses SIZE bytes.
1833 This function decides how big non-immediate constants are when no
1834 size was explicitly given. It also scales down the assembly-level
1835 displacement in an @(d:2,ERn) operand. */
1838 fix_operand_size (struct h8_op
*operand
, int size
)
1840 if (SXmode
&& (operand
->mode
& MODE
) == DISP
)
1842 /* If the user didn't specify an operand width, see if we
1843 can use @(d:2,ERn). */
1844 if ((operand
->mode
& SIZE
) == 0
1845 && operand
->exp
.X_add_symbol
== 0
1846 && operand
->exp
.X_op_symbol
== 0
1847 && (operand
->exp
.X_add_number
== size
1848 || operand
->exp
.X_add_number
== size
* 2
1849 || operand
->exp
.X_add_number
== size
* 3))
1850 operand
->mode
|= L_2
;
1852 /* Scale down the displacement in an @(d:2,ERn) operand.
1853 X_add_number then contains the desired field value. */
1854 if ((operand
->mode
& SIZE
) == L_2
)
1856 if (operand
->exp
.X_add_number
% size
!= 0)
1857 as_warn (_("operand/size mis-match"));
1858 operand
->exp
.X_add_number
/= size
;
1862 if ((operand
->mode
& SIZE
) == 0)
1863 switch (operand
->mode
& MODE
)
1870 /* Pick a 24-bit address unless we know that a 16-bit address
1871 is safe. get_specific() will relax L_24 into L_32 where
1875 && ((((addressT
) operand
->exp
.X_add_number
+ 0x8000)
1876 & 0xffffffff) > 0xffff
1877 || operand
->exp
.X_add_symbol
!= 0
1878 || operand
->exp
.X_op_symbol
!= 0))
1879 operand
->mode
|= L_24
;
1881 operand
->mode
|= L_16
;
1885 if ((((addressT
) operand
->exp
.X_add_number
+ 0x80)
1886 & 0xffffffff) <= 0xff)
1888 if (operand
->exp
.X_add_symbol
!= NULL
)
1889 operand
->mode
|= bsize
;
1891 operand
->mode
|= L_8
;
1894 operand
->mode
|= L_16
;
1900 /* This is the guts of the machine-dependent assembler. STR points to
1901 a machine dependent instruction. This function is supposed to emit
1902 the frags/bytes it assembles. */
1905 md_assemble (char *str
)
1909 struct h8_op operand
[3];
1910 const struct h8_instruction
*instruction
;
1911 const struct h8_instruction
*prev_instruction
;
1918 /* Drop leading whitespace. */
1922 /* Find the op code end. */
1923 for (op_start
= op_end
= str
;
1924 *op_end
!= 0 && *op_end
!= ' ';
1934 else if (*op_end
== '/' && ! slash
)
1938 if (op_end
== op_start
)
1940 as_bad (_("can't find opcode "));
1946 /* The assembler stops scanning the opcode at slashes, so it fails
1947 to make characters following them lower case. Fix them. */
1950 *slash
= TOLOWER (*slash
);
1952 instruction
= (const struct h8_instruction
*)
1953 hash_find (opcode_hash_control
, op_start
);
1955 if (instruction
== NULL
)
1957 as_bad (_("unknown opcode"));
1961 /* We used to set input_line_pointer to the result of get_operands,
1962 but that is wrong. Our caller assumes we don't change it. */
1964 operand
[0].mode
= 0;
1965 operand
[1].mode
= 0;
1966 operand
[2].mode
= 0;
1968 if (OP_KIND (instruction
->opcode
->how
) == O_MOVAB
1969 || OP_KIND (instruction
->opcode
->how
) == O_MOVAW
1970 || OP_KIND (instruction
->opcode
->how
) == O_MOVAL
)
1971 get_mova_operands (op_end
, operand
);
1972 else if (OP_KIND (instruction
->opcode
->how
) == O_RTEL
1973 || OP_KIND (instruction
->opcode
->how
) == O_RTSL
)
1974 get_rtsl_operands (op_end
, operand
);
1976 get_operands (instruction
->noperands
, op_end
, operand
);
1979 prev_instruction
= instruction
;
1981 /* Now we have operands from instruction.
1982 Let's check them out for ldm and stm. */
1983 if (OP_KIND (instruction
->opcode
->how
) == O_LDM
)
1985 /* The first operand must be @er7+, and the
1986 second operand must be a register pair. */
1987 if ((operand
[0].mode
!= RSINC
)
1988 || (operand
[0].reg
!= 7)
1989 || ((operand
[1].reg
& 0x80000000) == 0))
1990 as_bad (_("invalid operand in ldm"));
1992 else if (OP_KIND (instruction
->opcode
->how
) == O_STM
)
1994 /* The first operand must be a register pair,
1995 and the second operand must be @-er7. */
1996 if (((operand
[0].reg
& 0x80000000) == 0)
1997 || (operand
[1].mode
!= RDDEC
)
1998 || (operand
[1].reg
!= 7))
1999 as_bad (_("invalid operand in stm"));
2005 switch (TOLOWER (*dot
))
2020 if (OP_KIND (instruction
->opcode
->how
) == O_MOVAB
||
2021 OP_KIND (instruction
->opcode
->how
) == O_MOVAW
||
2022 OP_KIND (instruction
->opcode
->how
) == O_MOVAL
)
2024 switch (operand
[0].mode
& MODE
)
2028 fix_operand_size (&operand
[1], 1);
2031 fix_operand_size (&operand
[1], 2);
2034 fix_operand_size (&operand
[1], 4);
2040 for (i
= 0; i
< 3 && operand
[i
].mode
!= 0; i
++)
2046 fix_operand_size (&operand
[i
], 1);
2049 fix_operand_size (&operand
[i
], 2);
2052 fix_operand_size (&operand
[i
], 4);
2057 instruction
= get_specific (instruction
, operand
, size
);
2059 if (instruction
== 0)
2061 /* Couldn't find an opcode which matched the operands. */
2062 char *where
= frag_more (2);
2066 clever_message (prev_instruction
, operand
);
2071 build_bytes (instruction
, operand
);
2073 dwarf2_emit_insn (instruction
->length
);
2077 md_undefined_symbol (char *name ATTRIBUTE_UNUSED
)
2082 /* Various routines to kill one day. */
2085 md_atof (int type
, char *litP
, int *sizeP
)
2087 return ieee_md_atof (type
, litP
, sizeP
, TRUE
);
2090 #define OPTION_H_TICK_HEX (OPTION_MD_BASE)
2092 const char *md_shortopts
= "";
2093 struct option md_longopts
[] = {
2094 { "h-tick-hex", no_argument
, NULL
, OPTION_H_TICK_HEX
},
2095 {NULL
, no_argument
, NULL
, 0}
2098 size_t md_longopts_size
= sizeof (md_longopts
);
2101 md_parse_option (int c ATTRIBUTE_UNUSED
, char *arg ATTRIBUTE_UNUSED
)
2105 case OPTION_H_TICK_HEX
:
2106 enable_h_tick_hex
= 1;
2116 md_show_usage (FILE *stream ATTRIBUTE_UNUSED
)
2120 void tc_aout_fix_to_chars (void);
2123 tc_aout_fix_to_chars (void)
2125 printf (_("call to tc_aout_fix_to_chars \n"));
2130 md_convert_frag (bfd
*headers ATTRIBUTE_UNUSED
,
2131 segT seg ATTRIBUTE_UNUSED
,
2132 fragS
*fragP ATTRIBUTE_UNUSED
)
2134 printf (_("call to md_convert_frag \n"));
2139 md_section_align (segT segment
, valueT size
)
2141 int align
= bfd_get_section_alignment (stdoutput
, segment
);
2142 return ((size
+ (1 << align
) - 1) & (-1 << align
));
2146 md_apply_fix (fixS
*fixP
, valueT
*valP
, segT seg ATTRIBUTE_UNUSED
)
2148 char *buf
= fixP
->fx_where
+ fixP
->fx_frag
->fr_literal
;
2151 switch (fixP
->fx_size
)
2157 *buf
++ = (val
>> 8);
2161 *buf
++ = (val
>> 24);
2162 *buf
++ = (val
>> 16);
2163 *buf
++ = (val
>> 8);
2167 /* This can arise when the .quad or .8byte pseudo-ops are used.
2168 Returning here (without setting fx_done) will cause the code
2169 to attempt to generate a reloc which will then fail with the
2170 slightly more helpful error message: "Cannot represent
2171 relocation type BFD_RELOC_64". */
2177 if (fixP
->fx_addsy
== NULL
&& fixP
->fx_pcrel
== 0)
2182 md_estimate_size_before_relax (fragS
*fragP ATTRIBUTE_UNUSED
,
2183 segT segment_type ATTRIBUTE_UNUSED
)
2185 printf (_("call to md_estimate_size_before_relax \n"));
2189 /* Put number into target byte order. */
2191 md_number_to_chars (char *ptr
, valueT use
, int nbytes
)
2193 number_to_chars_bigendian (ptr
, use
, nbytes
);
2197 md_pcrel_from (fixS
*fixp
)
2199 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
2200 _("Unexpected reference to a symbol in a non-code section"));
2205 tc_gen_reloc (asection
*section ATTRIBUTE_UNUSED
, fixS
*fixp
)
2208 bfd_reloc_code_real_type r_type
;
2210 if (fixp
->fx_addsy
&& fixp
->fx_subsy
)
2212 if ((S_GET_SEGMENT (fixp
->fx_addsy
) != S_GET_SEGMENT (fixp
->fx_subsy
))
2213 || S_GET_SEGMENT (fixp
->fx_addsy
) == undefined_section
)
2215 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
2216 _("Difference of symbols in different sections is not supported"));
2221 rel
= xmalloc (sizeof (arelent
));
2222 rel
->sym_ptr_ptr
= xmalloc (sizeof (asymbol
*));
2223 *rel
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
2224 rel
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
2225 rel
->addend
= fixp
->fx_offset
;
2227 r_type
= fixp
->fx_r_type
;
2231 fprintf (stderr
, "%s\n", bfd_get_reloc_code_name (r_type
));
2234 rel
->howto
= bfd_reloc_type_lookup (stdoutput
, r_type
);
2235 if (rel
->howto
== NULL
)
2237 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
2238 _("Cannot represent relocation type %s"),
2239 bfd_get_reloc_code_name (r_type
));