1 /* i386.c -- Assemble code for the Intel 80386
2 Copyright (C) 1989, 91, 92, 93, 94, 95, 1996 Free Software Foundation.
4 This file is part of GAS, the GNU Assembler.
6 GAS is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GAS is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GAS; see the file COPYING. If not, write to the Free
18 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
22 Intel 80386 machine specific gas.
23 Written by Eliot Dresselhaus (eliot@mgm.mit.edu).
24 Bugs & suggestions are completely welcome. This is free software.
25 Please help us make it better.
34 #include "opcode/i386.h"
37 #define TC_RELOC(X,Y) (Y)
40 /* 'md_assemble ()' gathers together information and puts it into a
45 /* TM holds the template for the insn were currently assembling. */
47 /* SUFFIX holds the opcode suffix (e.g. 'l' for 'movl') if given. */
49 /* Operands are coded with OPERANDS, TYPES, DISPS, IMMS, and REGS. */
51 /* OPERANDS gives the number of given operands. */
52 unsigned int operands
;
54 /* REG_OPERANDS, DISP_OPERANDS, MEM_OPERANDS, IMM_OPERANDS give the number
55 of given register, displacement, memory operands and immediate
57 unsigned int reg_operands
, disp_operands
, mem_operands
, imm_operands
;
59 /* TYPES [i] is the type (see above #defines) which tells us how to
60 search through DISPS [i] & IMMS [i] & REGS [i] for the required
62 unsigned int types
[MAX_OPERANDS
];
64 /* Displacements (if given) for each operand. */
65 expressionS
*disps
[MAX_OPERANDS
];
67 /* Relocation type for operand */
69 enum bfd_reloc_code_real disp_reloc
[MAX_OPERANDS
];
71 int disp_reloc
[MAX_OPERANDS
];
74 /* Immediate operands (if given) for each operand. */
75 expressionS
*imms
[MAX_OPERANDS
];
77 /* Register operands (if given) for each operand. */
78 reg_entry
*regs
[MAX_OPERANDS
];
80 /* BASE_REG, INDEX_REG, and LOG2_SCALE_FACTOR are used to encode
81 the base index byte below. */
84 unsigned int log2_scale_factor
;
86 /* SEG gives the seg_entry of this insn. It is equal to zero unless
87 an explicit segment override is given. */
88 const seg_entry
*seg
; /* segment for memory operands (if given) */
90 /* PREFIX holds all the given prefix opcodes (usually null).
91 PREFIXES is the size of PREFIX. */
92 /* richfix: really unsigned? */
93 unsigned char prefix
[MAX_PREFIXES
];
94 unsigned int prefixes
;
96 /* RM and IB are the modrm byte and the base index byte where the
97 addressing modes of this insn are encoded. */
103 typedef struct _i386_insn i386_insn
;
105 /* This array holds the chars that always start a comment. If the
106 pre-processor is disabled, these aren't very useful */
107 #if defined (TE_I386AIX) || defined (OBJ_ELF)
108 const char comment_chars
[] = "#/";
110 const char comment_chars
[] = "#";
113 /* This array holds the chars that only start a comment at the beginning of
114 a line. If the line seems to have the form '# 123 filename'
115 .line and .file directives will appear in the pre-processed output */
116 /* Note that input_file.c hand checks for '#' at the beginning of the
117 first line of the input file. This is because the compiler outputs
118 #NO_APP at the beginning of its output. */
119 /* Also note that comments started like this one will always work if
120 '/' isn't otherwise defined. */
121 #if defined (TE_I386AIX) || defined (OBJ_ELF)
122 const char line_comment_chars
[] = "";
124 const char line_comment_chars
[] = "/";
126 const char line_separator_chars
[] = "";
128 /* Chars that can be used to separate mant from exp in floating point nums */
129 const char EXP_CHARS
[] = "eE";
131 /* Chars that mean this number is a floating point constant */
134 const char FLT_CHARS
[] = "fFdDxX";
136 /* tables for lexical analysis */
137 static char opcode_chars
[256];
138 static char register_chars
[256];
139 static char operand_chars
[256];
140 static char space_chars
[256];
141 static char identifier_chars
[256];
142 static char digit_chars
[256];
145 #define is_opcode_char(x) (opcode_chars[(unsigned char) x])
146 #define is_operand_char(x) (operand_chars[(unsigned char) x])
147 #define is_register_char(x) (register_chars[(unsigned char) x])
148 #define is_space_char(x) (space_chars[(unsigned char) x])
149 #define is_identifier_char(x) (identifier_chars[(unsigned char) x])
150 #define is_digit_char(x) (digit_chars[(unsigned char) x])
152 /* put here all non-digit non-letter charcters that may occur in an operand */
153 static char operand_special_chars
[] = "%$-+(,)*._~/<>|&^!:[@]";
155 static char *ordinal_names
[] = {"first", "second", "third"}; /* for printfs */
157 /* md_assemble() always leaves the strings it's passed unaltered. To
158 effect this we maintain a stack of saved characters that we've smashed
159 with '\0's (indicating end of strings for various sub-fields of the
160 assembler instruction). */
161 static char save_stack
[32];
162 static char *save_stack_p
; /* stack pointer */
163 #define END_STRING_AND_SAVE(s) *save_stack_p++ = *s; *s = '\0'
164 #define RESTORE_END_STRING(s) *s = *--save_stack_p
166 /* The instruction we're assembling. */
169 /* Per instruction expressionS buffers: 2 displacements & 2 immediate max. */
170 static expressionS disp_expressions
[2], im_expressions
[2];
172 /* pointers to ebp & esp entries in reg_hash hash table */
173 static reg_entry
*ebp
, *esp
;
175 static int this_operand
; /* current operand we are working on */
177 static int flag_do_long_jump
; /* FIXME what does this do? */
179 static int flag_16bit_code
; /* 1 if we're writing 16-bit code, 0 if 32-bit */
181 /* Interface to relax_segment.
182 There are 2 relax states for 386 jump insns: one for conditional &
183 one for unconditional jumps. This is because the these two types
184 of jumps add different sizes to frags when we're figuring out what
185 sort of jump to choose to reach a given label. */
188 #define COND_JUMP 1 /* conditional jump */
189 #define UNCOND_JUMP 2 /* unconditional jump */
194 #define UNKNOWN_SIZE 3
198 #define INLINE __inline__
204 #define ENCODE_RELAX_STATE(type,size) \
205 ((relax_substateT)((type<<2) | (size)))
206 #define SIZE_FROM_RELAX_STATE(s) \
207 ( (((s) & 0x3) == BYTE ? 1 : (((s) & 0x3) == WORD ? 2 : 4)) )
209 const relax_typeS md_relax_table
[] =
212 1) most positive reach of this state,
213 2) most negative reach of this state,
214 3) how many bytes this mode will add to the size of the current frag
215 4) which index into the table to try if we can't fit into this one.
222 /* For now we don't use word displacement jumps; they may be
224 {127 + 1, -128 + 1, 0, ENCODE_RELAX_STATE (COND_JUMP
, DWORD
)},
225 /* word conditionals add 3 bytes to frag:
226 2 opcode prefix; 1 displacement bytes */
227 {32767 + 2, -32768 + 2, 3, ENCODE_RELAX_STATE (COND_JUMP
, DWORD
)},
228 /* dword conditionals adds 4 bytes to frag:
229 1 opcode prefix; 3 displacement bytes */
233 {127 + 1, -128 + 1, 0, ENCODE_RELAX_STATE (UNCOND_JUMP
, DWORD
)},
234 /* word jmp adds 2 bytes to frag:
235 1 opcode prefix; 1 displacement bytes */
236 {32767 + 2, -32768 + 2, 2, ENCODE_RELAX_STATE (UNCOND_JUMP
, DWORD
)},
237 /* dword jmp adds 3 bytes to frag:
238 0 opcode prefix; 3 displacement bytes */
246 i386_align_code (fragP
, count
)
250 /* Various efficient no-op patterns for aligning code labels. */
251 static const char f32_1
[] = {0x90};
252 static const char f32_2
[] = {0x8d,0x36};
253 static const char f32_3
[] = {0x8d,0x76,0x00};
254 static const char f32_4
[] = {0x8d,0x74,0x26,0x00};
255 static const char f32_5
[] = {0x90,
256 0x8d,0x74,0x26,0x00};
257 static const char f32_6
[] = {0x8d,0xb6,0x00,0x00,0x00,0x00};
258 static const char f32_7
[] = {0x8d,0xb4,0x26,0x00,0x00,0x00,0x00};
259 static const char f32_8
[] = {0x90,
260 0x8d,0xb4,0x26,0x00,0x00,0x00,0x00};
261 static const char f32_9
[] = {0x8d,0x36,
262 0x8d,0xb4,0x26,0x00,0x00,0x00,0x00};
263 static const char f32_10
[] = {0x8d,0x76,0x00,
264 0x8d,0xb4,0x26,0x00,0x00,0x00,0x00};
265 static const char f32_11
[] = {0x8d,0x74,0x26,0x00,
266 0x8d,0xb4,0x26,0x00,0x00,0x00,0x00};
267 static const char f32_12
[] = {0x8d,0xb6,0x00,0x00,0x00,0x00,
268 0x8d,0xb6,0x00,0x00,0x00,0x00};
269 static const char f32_13
[] = {0x8d,0xb6,0x00,0x00,0x00,0x00,
270 0x8d,0xb4,0x26,0x00,0x00,0x00,0x00};
271 static const char f32_14
[] = {0x8d,0xb4,0x26,0x00,0x00,0x00,0x00,
272 0x8d,0xb4,0x26,0x00,0x00,0x00,0x00};
273 static const char f32_15
[] = {0xeb,0x0d,0x90,0x90,0x90,0x90,0x90,
274 0x90,0x90,0x90,0x90,0x90,0x90,0x90,0x90};
275 static const char f16_4
[] = {0x8d,0xb6,0x00,0x00};
276 static const char f16_5
[] = {0x90,
277 0x8d,0xb6,0x00,0x00};
278 static const char f16_6
[] = {0x8d,0x36,
279 0x8d,0xb6,0x00,0x00};
280 static const char f16_7
[] = {0x8d,0x76,0x00,
281 0x8d,0xb6,0x00,0x00};
282 static const char f16_8
[] = {0x8d,0xb6,0x00,0x00,
283 0x8d,0xb6,0x00,0x00};
284 static const char *const f32_patt
[] = {
285 f32_1
, f32_2
, f32_3
, f32_4
, f32_5
, f32_6
, f32_7
, f32_8
,
286 f32_9
, f32_10
, f32_11
, f32_12
, f32_13
, f32_14
, f32_15
288 static const char *const f16_patt
[] = {
289 f32_1
, f32_2
, f32_3
, f16_4
, f16_5
, f16_6
, f16_7
, f16_8
,
290 f32_15
, f32_15
, f32_15
, f32_15
, f32_15
, f32_15
, f32_15
293 if (count
> 0 && count
<= 15)
297 memcpy(fragP
->fr_literal
+ fragP
->fr_fix
,
298 f16_patt
[count
- 1], count
);
299 if (count
> 8) /* adjust jump offset */
300 fragP
->fr_literal
[fragP
->fr_fix
+ 1] = count
- 2;
303 memcpy(fragP
->fr_literal
+ fragP
->fr_fix
,
304 f32_patt
[count
- 1], count
);
305 fragP
->fr_var
= count
;
309 static char *output_invalid
PARAMS ((int c
));
310 static int i386_operand
PARAMS ((char *operand_string
));
311 static reg_entry
*parse_register
PARAMS ((char *reg_string
));
313 static void s_bss
PARAMS ((int));
316 symbolS
*GOT_symbol
; /* Pre-defined "__GLOBAL_OFFSET_TABLE" */
318 static INLINE
unsigned long
319 mode_from_disp_size (t
)
322 return (t
& Disp8
) ? 1 : (t
& Disp32
) ? 2 : 0;
327 /* convert opcode suffix ('b' 'w' 'l' typically) into type specifier */
329 static INLINE
unsigned long
330 opcode_suffix_to_type (s
)
333 return (s
== BYTE_OPCODE_SUFFIX
334 ? Byte
: (s
== WORD_OPCODE_SUFFIX
336 } /* opcode_suffix_to_type() */
340 fits_in_signed_byte (num
)
343 return (num
>= -128) && (num
<= 127);
344 } /* fits_in_signed_byte() */
347 fits_in_unsigned_byte (num
)
350 return (num
& 0xff) == num
;
351 } /* fits_in_unsigned_byte() */
354 fits_in_unsigned_word (num
)
357 return (num
& 0xffff) == num
;
358 } /* fits_in_unsigned_word() */
361 fits_in_signed_word (num
)
364 return (-32768 <= num
) && (num
<= 32767);
365 } /* fits_in_signed_word() */
368 smallest_imm_type (num
)
372 /* This code is disabled because all the Imm1 forms in the opcode table
373 are slower on the i486, and they're the versions with the implicitly
374 specified single-position displacement, which has another syntax if
375 you really want to use that form. If you really prefer to have the
376 one-byte-shorter Imm1 form despite these problems, re-enable this
379 return Imm1
| Imm8
| Imm8S
| Imm16
| Imm32
;
381 return (fits_in_signed_byte (num
)
382 ? (Imm8S
| Imm8
| Imm16
| Imm32
)
383 : fits_in_unsigned_byte (num
)
384 ? (Imm8
| Imm16
| Imm32
)
385 : (fits_in_signed_word (num
) || fits_in_unsigned_word (num
))
388 } /* smallest_imm_type() */
390 void set_16bit_code_flag(new_16bit_code_flag
)
391 int new_16bit_code_flag
;
393 flag_16bit_code
= new_16bit_code_flag
;
396 const pseudo_typeS md_pseudo_table
[] =
402 {"align", s_align_bytes
, 0},
404 {"align", s_align_ptwo
, 0},
406 {"ffloat", float_cons
, 'f'},
407 {"dfloat", float_cons
, 'd'},
408 {"tfloat", float_cons
, 'x'},
410 {"noopt", s_ignore
, 0},
411 {"optim", s_ignore
, 0},
412 {"code16", set_16bit_code_flag
, 1},
413 {"code32", set_16bit_code_flag
, 0},
417 /* for interface with expression () */
418 extern char *input_line_pointer
;
420 /* obstack for constructing various things in md_begin */
423 /* hash table for opcode lookup */
424 static struct hash_control
*op_hash
;
425 /* hash table for register lookup */
426 static struct hash_control
*reg_hash
;
427 /* hash table for prefix lookup */
428 static struct hash_control
*prefix_hash
;
434 const char *hash_err
;
436 obstack_begin (&o
, 4096);
438 /* initialize op_hash hash table */
439 op_hash
= hash_new ();
442 register const template *optab
;
443 register templates
*core_optab
;
446 optab
= i386_optab
; /* setup for loop */
447 prev_name
= optab
->name
;
448 obstack_grow (&o
, optab
, sizeof (template));
449 core_optab
= (templates
*) xmalloc (sizeof (templates
));
451 for (optab
++; optab
< i386_optab_end
; optab
++)
453 if (!strcmp (optab
->name
, prev_name
))
455 /* same name as before --> append to current template list */
456 obstack_grow (&o
, optab
, sizeof (template));
460 /* different name --> ship out current template list;
461 add to hash table; & begin anew */
462 /* Note: end must be set before start! since obstack_next_free
463 changes upon opstack_finish */
464 core_optab
->end
= (template *) obstack_next_free (&o
);
465 core_optab
->start
= (template *) obstack_finish (&o
);
466 hash_err
= hash_insert (op_hash
, prev_name
, (char *) core_optab
);
470 as_fatal ("Internal Error: Can't hash %s: %s", prev_name
,
473 prev_name
= optab
->name
;
474 core_optab
= (templates
*) xmalloc (sizeof (templates
));
475 obstack_grow (&o
, optab
, sizeof (template));
480 /* initialize reg_hash hash table */
481 reg_hash
= hash_new ();
483 register const reg_entry
*regtab
;
485 for (regtab
= i386_regtab
; regtab
< i386_regtab_end
; regtab
++)
487 hash_err
= hash_insert (reg_hash
, regtab
->reg_name
, (PTR
) regtab
);
493 esp
= (reg_entry
*) hash_find (reg_hash
, "esp");
494 ebp
= (reg_entry
*) hash_find (reg_hash
, "ebp");
496 /* initialize reg_hash hash table */
497 prefix_hash
= hash_new ();
499 register const prefix_entry
*prefixtab
;
501 for (prefixtab
= i386_prefixtab
;
502 prefixtab
< i386_prefixtab_end
; prefixtab
++)
504 hash_err
= hash_insert (prefix_hash
, prefixtab
->prefix_name
,
511 /* fill in lexical tables: opcode_chars, operand_chars, space_chars */
516 for (c
= 0; c
< 256; c
++)
518 if (islower (c
) || isdigit (c
))
521 register_chars
[c
] = c
;
523 else if (isupper (c
))
525 opcode_chars
[c
] = tolower (c
);
526 register_chars
[c
] = opcode_chars
[c
];
528 else if (c
== PREFIX_SEPERATOR
)
532 else if (c
== ')' || c
== '(')
534 register_chars
[c
] = c
;
537 if (isupper (c
) || islower (c
) || isdigit (c
))
538 operand_chars
[c
] = c
;
540 if (isdigit (c
) || c
== '-')
543 if (isalpha (c
) || c
== '_' || c
== '.' || isdigit (c
))
544 identifier_chars
[c
] = c
;
547 identifier_chars
['@'] = '@';
550 if (c
== ' ' || c
== '\t')
554 for (p
= operand_special_chars
; *p
!= '\0'; p
++)
555 operand_chars
[(unsigned char) *p
] = *p
;
559 record_alignment (text_section
, 2);
560 record_alignment (data_section
, 2);
561 record_alignment (bss_section
, 2);
566 i386_print_statistics (file
)
569 hash_print_statistics (file
, "i386 opcode", op_hash
);
570 hash_print_statistics (file
, "i386 register", reg_hash
);
571 hash_print_statistics (file
, "i386 prefix", prefix_hash
);
577 /* debugging routines for md_assemble */
578 static void pi
PARAMS ((char *, i386_insn
*));
579 static void pte
PARAMS ((template *));
580 static void pt
PARAMS ((unsigned int));
581 static void pe
PARAMS ((expressionS
*));
582 static void ps
PARAMS ((symbolS
*));
589 register template *p
;
592 fprintf (stdout
, "%s: template ", line
);
594 fprintf (stdout
, " modrm: mode %x reg %x reg/mem %x",
595 x
->rm
.mode
, x
->rm
.reg
, x
->rm
.regmem
);
596 fprintf (stdout
, " base %x index %x scale %x\n",
597 x
->bi
.base
, x
->bi
.index
, x
->bi
.scale
);
598 for (i
= 0; i
< x
->operands
; i
++)
600 fprintf (stdout
, " #%d: ", i
+ 1);
602 fprintf (stdout
, "\n");
603 if (x
->types
[i
] & Reg
)
604 fprintf (stdout
, "%s\n", x
->regs
[i
]->reg_name
);
605 if (x
->types
[i
] & Imm
)
607 if (x
->types
[i
] & (Disp
| Abs
))
617 fprintf (stdout
, " %d operands ", t
->operands
);
618 fprintf (stdout
, "opcode %x ",
620 if (t
->extension_opcode
!= None
)
621 fprintf (stdout
, "ext %x ", t
->extension_opcode
);
622 if (t
->opcode_modifier
& D
)
623 fprintf (stdout
, "D");
624 if (t
->opcode_modifier
& W
)
625 fprintf (stdout
, "W");
626 fprintf (stdout
, "\n");
627 for (i
= 0; i
< t
->operands
; i
++)
629 fprintf (stdout
, " #%d type ", i
+ 1);
630 pt (t
->operand_types
[i
]);
631 fprintf (stdout
, "\n");
639 fprintf (stdout
, " operation %d\n", e
->X_op
);
640 fprintf (stdout
, " add_number %d (%x)\n",
641 e
->X_add_number
, e
->X_add_number
);
644 fprintf (stdout
, " add_symbol ");
645 ps (e
->X_add_symbol
);
646 fprintf (stdout
, "\n");
650 fprintf (stdout
, " op_symbol ");
652 fprintf (stdout
, "\n");
660 fprintf (stdout
, "%s type %s%s",
662 S_IS_EXTERNAL (s
) ? "EXTERNAL " : "",
663 segment_name (S_GET_SEGMENT (s
)));
684 { BaseIndex
, "BaseIndex" },
694 { InOutPortReg
, "InOutPortReg" },
695 { ShiftCount
, "ShiftCount" },
697 { Control
, "control reg" },
698 { Test
, "test reg" },
699 { FloatReg
, "FReg" },
700 { FloatAcc
, "FAcc" },
701 { JumpAbsolute
, "Jump Absolute" },
709 register struct type_name
*ty
;
713 fprintf (stdout
, "Unknown");
717 for (ty
= type_names
; ty
->mask
; ty
++)
719 fprintf (stdout
, "%s, ", ty
->tname
);
724 #endif /* DEBUG386 */
727 static bfd_reloc_code_real_type
728 reloc (size
, pcrel
, other
)
731 bfd_reloc_code_real_type other
;
733 if (other
!= NO_RELOC
) return other
;
738 case 1: return BFD_RELOC_8_PCREL
;
739 case 2: return BFD_RELOC_16_PCREL
;
740 case 4: return BFD_RELOC_32_PCREL
;
745 case 1: return BFD_RELOC_8
;
746 case 2: return BFD_RELOC_16
;
747 case 4: return BFD_RELOC_32
;
750 as_bad ("Can not do %d byte %srelocation", size
,
751 pcrel
? "pc-relative " : "");
752 return BFD_RELOC_NONE
;
755 #define reloc(SIZE,PCREL,OTHER) 0
756 #define BFD_RELOC_32 0
757 #define BFD_RELOC_32_PCREL 0
758 #define BFD_RELOC_386_PLT32 0
759 #define BFD_RELOC_386_GOT32 0
760 #define BFD_RELOC_386_GOTOFF 0
764 * Here we decide which fixups can be adjusted to make them relative to
765 * the beginning of the section instead of the symbol. Basically we need
766 * to make sure that the dynamic relocations are done correctly, so in
767 * some cases we force the original symbol to be used.
770 tc_i386_fix_adjustable(fixP
)
774 /* Prevent all adjustments to global symbols. */
775 if (S_IS_EXTERN (fixP
->fx_addsy
))
779 /* adjust_reloc_syms doesn't know about the GOT */
780 if (fixP
->fx_r_type
== BFD_RELOC_386_GOTOFF
781 || fixP
->fx_r_type
== BFD_RELOC_386_PLT32
782 || fixP
->fx_r_type
== BFD_RELOC_386_GOT32
)
788 /* This is the guts of the machine-dependent assembler. LINE points to a
789 machine dependent instruction. This function is supposed to emit
790 the frags/bytes it assembles to. */
796 /* Holds template once we've found it. */
799 /* Count the size of the instruction generated. */
802 /* Possible templates for current insn */
803 templates
*current_templates
= (templates
*) 0;
807 /* Initialize globals. */
808 memset (&i
, '\0', sizeof (i
));
809 for (j
= 0; j
< MAX_OPERANDS
; j
++)
810 i
.disp_reloc
[j
] = NO_RELOC
;
811 memset (disp_expressions
, '\0', sizeof (disp_expressions
));
812 memset (im_expressions
, '\0', sizeof (im_expressions
));
813 save_stack_p
= save_stack
; /* reset stack pointer */
815 /* Fist parse an opcode & call i386_operand for the operands.
816 We assume that the scrubber has arranged it so that line[0] is the valid
817 start of a (possibly prefixed) opcode. */
821 /* 1 if operand is pending after ','. */
822 unsigned int expecting_operand
= 0;
823 /* 1 if we found a prefix only acceptable with string insns. */
824 unsigned int expecting_string_instruction
= 0;
825 /* Non-zero if operand parens not balenced. */
826 unsigned int paren_not_balenced
;
827 char *token_start
= l
;
829 while (!is_space_char (*l
) && *l
!= END_OF_INSN
)
831 if (!is_opcode_char (*l
))
833 as_bad ("invalid character %s in opcode", output_invalid (*l
));
836 else if (*l
!= PREFIX_SEPERATOR
)
838 *l
= opcode_chars
[(unsigned char) *l
]; /* fold case of opcodes */
843 /* This opcode's got a prefix. */
845 prefix_entry
*prefix
;
847 if (l
== token_start
)
849 as_bad ("expecting prefix; got nothing");
852 END_STRING_AND_SAVE (l
);
853 prefix
= (prefix_entry
*) hash_find (prefix_hash
, token_start
);
856 as_bad ("no such opcode prefix ('%s')", token_start
);
859 RESTORE_END_STRING (l
);
860 /* check for repeated prefix */
861 for (q
= 0; q
< i
.prefixes
; q
++)
862 if (i
.prefix
[q
] == prefix
->prefix_code
)
864 as_bad ("same prefix used twice; you don't really want this!");
867 if (i
.prefixes
== MAX_PREFIXES
)
869 as_bad ("too many opcode prefixes");
872 i
.prefix
[i
.prefixes
++] = prefix
->prefix_code
;
873 if (prefix
->prefix_code
== REPE
|| prefix
->prefix_code
== REPNE
)
874 expecting_string_instruction
= 1;
875 /* skip past PREFIX_SEPERATOR and reset token_start */
879 END_STRING_AND_SAVE (l
);
880 if (token_start
== l
)
882 as_bad ("expecting opcode; got nothing");
886 /* Lookup insn in hash; try intel & att naming conventions if appropriate;
887 that is: we only use the opcode suffix 'b' 'w' or 'l' if we need to. */
888 current_templates
= (templates
*) hash_find (op_hash
, token_start
);
889 if (!current_templates
)
891 int last_index
= strlen (token_start
) - 1;
892 char last_char
= token_start
[last_index
];
895 case DWORD_OPCODE_SUFFIX
:
896 case WORD_OPCODE_SUFFIX
:
897 case BYTE_OPCODE_SUFFIX
:
898 token_start
[last_index
] = '\0';
899 current_templates
= (templates
*) hash_find (op_hash
, token_start
);
900 token_start
[last_index
] = last_char
;
901 i
.suffix
= last_char
;
903 if (!current_templates
)
905 as_bad ("no such 386 instruction: `%s'", token_start
);
909 RESTORE_END_STRING (l
);
911 /* check for rep/repne without a string instruction */
912 if (expecting_string_instruction
&&
913 !IS_STRING_INSTRUCTION (current_templates
->
916 as_bad ("expecting string instruction after rep/repne");
920 /* There may be operands to parse. */
921 if (*l
!= END_OF_INSN
&&
922 /* For string instructions, we ignore any operands if given. This
923 kludges, for example, 'rep/movsb %ds:(%esi), %es:(%edi)' where
924 the operands are always going to be the same, and are not really
925 encoded in machine code. */
926 !IS_STRING_INSTRUCTION (current_templates
->
932 /* skip optional white space before operand */
933 while (!is_operand_char (*l
) && *l
!= END_OF_INSN
)
935 if (!is_space_char (*l
))
937 as_bad ("invalid character %s before %s operand",
939 ordinal_names
[i
.operands
]);
944 token_start
= l
; /* after white space */
945 paren_not_balenced
= 0;
946 while (paren_not_balenced
|| *l
!= ',')
948 if (*l
== END_OF_INSN
)
950 if (paren_not_balenced
)
952 as_bad ("unbalenced parenthesis in %s operand.",
953 ordinal_names
[i
.operands
]);
957 break; /* we are done */
959 else if (!is_operand_char (*l
) && !is_space_char (*l
))
961 as_bad ("invalid character %s in %s operand",
963 ordinal_names
[i
.operands
]);
967 ++paren_not_balenced
;
969 --paren_not_balenced
;
972 if (l
!= token_start
)
973 { /* yes, we've read in another operand */
974 unsigned int operand_ok
;
975 this_operand
= i
.operands
++;
976 if (i
.operands
> MAX_OPERANDS
)
978 as_bad ("spurious operands; (%d operands/instruction max)",
982 /* now parse operand adding info to 'i' as we go along */
983 END_STRING_AND_SAVE (l
);
984 operand_ok
= i386_operand (token_start
);
985 RESTORE_END_STRING (l
); /* restore old contents */
991 if (expecting_operand
)
993 expecting_operand_after_comma
:
994 as_bad ("expecting operand after ','; got nothing");
999 as_bad ("expecting operand before ','; got nothing");
1004 /* now *l must be either ',' or END_OF_INSN */
1007 if (*++l
== END_OF_INSN
)
1008 { /* just skip it, if it's \n complain */
1009 goto expecting_operand_after_comma
;
1011 expecting_operand
= 1;
1014 while (*l
!= END_OF_INSN
); /* until we get end of insn */
1018 /* Now we've parsed the opcode into a set of templates, and have the
1021 Next, we find a template that matches the given insn,
1022 making sure the overlap of the given operands types is consistent
1023 with the template operand types. */
1025 #define MATCH(overlap,given_type) \
1027 (((overlap & (JumpAbsolute|BaseIndex|Mem8)) \
1028 == (given_type & (JumpAbsolute|BaseIndex|Mem8))) \
1029 || (overlap == InOutPortReg)))
1032 /* If m0 and m1 are register matches they must be consistent
1033 with the expected operand types t0 and t1.
1034 That is, if both m0 & m1 are register matches
1035 i.e. ( ((m0 & (Reg)) && (m1 & (Reg)) ) ?
1036 then, either 1. or 2. must be true:
1037 1. the expected operand type register overlap is null:
1038 (t0 & t1 & Reg) == 0
1040 the given register overlap is null:
1041 (m0 & m1 & Reg) == 0
1042 2. the expected operand type register overlap == the given
1043 operand type overlap: (t0 & t1 & m0 & m1 & Reg).
1045 #define CONSISTENT_REGISTER_MATCH(m0, m1, t0, t1) \
1046 ( ((m0 & (Reg)) && (m1 & (Reg))) ? \
1047 ( ((t0 & t1 & (Reg)) == 0 && (m0 & m1 & (Reg)) == 0) || \
1048 ((t0 & t1) & (m0 & m1) & (Reg)) \
1051 register unsigned int overlap0
, overlap1
;
1053 unsigned int overlap2
;
1054 unsigned int found_reverse_match
;
1056 overlap0
= overlap1
= overlap2
= found_reverse_match
= 0;
1057 for (t
= current_templates
->start
;
1058 t
< current_templates
->end
;
1061 /* must have right number of operands */
1062 if (i
.operands
!= t
->operands
)
1064 else if (!t
->operands
)
1065 break; /* 0 operands always matches */
1067 overlap0
= i
.types
[0] & t
->operand_types
[0];
1068 switch (t
->operands
)
1071 if (!MATCH (overlap0
, i
.types
[0]))
1076 overlap1
= i
.types
[1] & t
->operand_types
[1];
1077 if (!MATCH (overlap0
, i
.types
[0]) ||
1078 !MATCH (overlap1
, i
.types
[1]) ||
1079 !CONSISTENT_REGISTER_MATCH (overlap0
, overlap1
,
1080 t
->operand_types
[0],
1081 t
->operand_types
[1]))
1084 /* check if other direction is valid ... */
1085 if (!(t
->opcode_modifier
& COMES_IN_BOTH_DIRECTIONS
))
1088 /* try reversing direction of operands */
1089 overlap0
= i
.types
[0] & t
->operand_types
[1];
1090 overlap1
= i
.types
[1] & t
->operand_types
[0];
1091 if (!MATCH (overlap0
, i
.types
[0]) ||
1092 !MATCH (overlap1
, i
.types
[1]) ||
1093 !CONSISTENT_REGISTER_MATCH (overlap0
, overlap1
,
1094 t
->operand_types
[0],
1095 t
->operand_types
[1]))
1097 /* does not match either direction */
1100 /* found a reverse match here -- slip through */
1101 /* found_reverse_match holds which of D or FloatD we've found */
1102 found_reverse_match
= t
->opcode_modifier
& COMES_IN_BOTH_DIRECTIONS
;
1103 } /* endif: not forward match */
1104 /* found either forward/reverse 2 operand match here */
1105 if (t
->operands
== 3)
1107 overlap2
= i
.types
[2] & t
->operand_types
[2];
1108 if (!MATCH (overlap2
, i
.types
[2]) ||
1109 !CONSISTENT_REGISTER_MATCH (overlap0
, overlap2
,
1110 t
->operand_types
[0],
1111 t
->operand_types
[2]) ||
1112 !CONSISTENT_REGISTER_MATCH (overlap1
, overlap2
,
1113 t
->operand_types
[1],
1114 t
->operand_types
[2]))
1117 /* found either forward/reverse 2 or 3 operand match here:
1118 slip through to break */
1120 break; /* we've found a match; break out of loop */
1121 } /* for (t = ... */
1122 if (t
== current_templates
->end
)
1123 { /* we found no match */
1124 as_bad ("operands given don't match any known 386 instruction");
1128 /* Copy the template we found (we may change it!). */
1130 t
= &i
.tm
; /* alter new copy of template */
1132 /* If the matched instruction specifies an explicit opcode suffix,
1133 use it - and make sure none has already been specified. */
1134 if (t
->opcode_modifier
& (Data16
|Data32
))
1138 as_bad ("extraneous opcode suffix given");
1141 if (t
->opcode_modifier
& Data16
)
1142 i
.suffix
= WORD_OPCODE_SUFFIX
;
1144 i
.suffix
= DWORD_OPCODE_SUFFIX
;
1147 /* If there's no opcode suffix we try to invent one based on register
1149 if (!i
.suffix
&& i
.reg_operands
)
1151 /* We take i.suffix from the LAST register operand specified. This
1152 assumes that the last register operands is the destination register
1155 for (op
= 0; op
< MAX_OPERANDS
; op
++)
1156 if (i
.types
[op
] & Reg
)
1158 i
.suffix
= ((i
.types
[op
] & Reg8
) ? BYTE_OPCODE_SUFFIX
:
1159 (i
.types
[op
] & Reg16
) ? WORD_OPCODE_SUFFIX
:
1160 DWORD_OPCODE_SUFFIX
);
1163 else if (i
.suffix
!= 0
1164 && i
.reg_operands
!= 0
1165 && (i
.types
[i
.operands
- 1] & Reg
) != 0)
1169 /* If the last operand is a register, make sure it is
1170 compatible with the suffix. */
1177 case BYTE_OPCODE_SUFFIX
:
1178 /* If this is an eight bit register, it's OK. If it's the
1179 16 or 32 bit version of an eight bit register, we will
1180 just use the low portion, and that's OK too. */
1181 if ((i
.types
[i
.operands
- 1] & Reg8
) == 0
1182 && i
.regs
[i
.operands
- 1]->reg_num
>= 4)
1185 case WORD_OPCODE_SUFFIX
:
1186 case DWORD_OPCODE_SUFFIX
:
1187 /* We don't insist on the presence or absence of the e
1188 prefix on the register, but we reject eight bit
1190 if ((i
.types
[i
.operands
- 1] & Reg8
) != 0)
1194 as_bad ("register does not match opcode suffix");
1197 /* Make still unresolved immediate matches conform to size of immediate
1198 given in i.suffix. Note: overlap2 cannot be an immediate!
1200 if ((overlap0
& (Imm8
| Imm8S
| Imm16
| Imm32
))
1201 && overlap0
!= Imm8
&& overlap0
!= Imm8S
1202 && overlap0
!= Imm16
&& overlap0
!= Imm32
)
1206 as_bad ("no opcode suffix given; can't determine immediate size");
1209 overlap0
&= (i
.suffix
== BYTE_OPCODE_SUFFIX
? (Imm8
| Imm8S
) :
1210 (i
.suffix
== WORD_OPCODE_SUFFIX
? Imm16
: Imm32
));
1212 if ((overlap1
& (Imm8
| Imm8S
| Imm16
| Imm32
))
1213 && overlap1
!= Imm8
&& overlap1
!= Imm8S
1214 && overlap1
!= Imm16
&& overlap1
!= Imm32
)
1218 as_bad ("no opcode suffix given; can't determine immediate size");
1221 overlap1
&= (i
.suffix
== BYTE_OPCODE_SUFFIX
? (Imm8
| Imm8S
) :
1222 (i
.suffix
== WORD_OPCODE_SUFFIX
? Imm16
: Imm32
));
1225 i
.types
[0] = overlap0
;
1226 i
.types
[1] = overlap1
;
1227 i
.types
[2] = overlap2
;
1229 if (overlap0
& ImplicitRegister
)
1231 if (overlap1
& ImplicitRegister
)
1233 if (overlap2
& ImplicitRegister
)
1235 if (overlap0
& Imm1
)
1236 i
.imm_operands
= 0; /* kludge for shift insns */
1238 if (found_reverse_match
)
1241 save
= t
->operand_types
[0];
1242 t
->operand_types
[0] = t
->operand_types
[1];
1243 t
->operand_types
[1] = save
;
1246 /* Finalize opcode. First, we change the opcode based on the operand
1247 size given by i.suffix: we never have to change things for byte insns,
1248 or when no opcode suffix is need to size the operands. */
1250 if (!i
.suffix
&& (t
->opcode_modifier
& W
))
1252 as_bad ("no opcode suffix given and no register operands; can't size instruction");
1256 if (i
.suffix
&& i
.suffix
!= BYTE_OPCODE_SUFFIX
)
1258 /* Select between byte and word/dword operations. */
1259 if (t
->opcode_modifier
& W
)
1260 t
->base_opcode
|= W
;
1261 /* Now select between word & dword operations via the
1262 operand size prefix. */
1263 if ((i
.suffix
== WORD_OPCODE_SUFFIX
) ^ flag_16bit_code
)
1265 if (i
.prefixes
== MAX_PREFIXES
)
1267 as_bad ("%d prefixes given and 'w' opcode suffix gives too many prefixes",
1271 i
.prefix
[i
.prefixes
++] = WORD_PREFIX_OPCODE
;
1275 /* For insns with operands there are more diddles to do to the opcode. */
1278 /* Default segment register this instruction will use
1279 for memory accesses. 0 means unknown.
1280 This is only for optimizing out unnecessary segment overrides. */
1281 const seg_entry
*default_seg
= 0;
1283 /* True if this instruction uses a memory addressing mode,
1284 and therefore may need an address-size prefix. */
1285 int uses_mem_addrmode
= 0;
1288 /* If we found a reverse match we must alter the opcode direction bit
1289 found_reverse_match holds bit to set (different for int &
1292 if (found_reverse_match
)
1294 t
->base_opcode
|= found_reverse_match
;
1297 /* The imul $imm, %reg instruction is converted into
1298 imul $imm, %reg, %reg. */
1299 if (t
->opcode_modifier
& imulKludge
)
1301 /* Pretend we saw the 3 operand case. */
1302 i
.regs
[2] = i
.regs
[1];
1306 /* Certain instructions expect the destination to be in the i.rm.reg
1307 field. This is by far the exceptional case. For these
1308 instructions, if the source operand is a register, we must reverse
1309 the i.rm.reg and i.rm.regmem fields. We accomplish this by faking
1310 that the two register operands were given in the reverse order. */
1311 if ((t
->opcode_modifier
& ReverseRegRegmem
) && i
.reg_operands
== 2)
1313 unsigned int first_reg_operand
= (i
.types
[0] & Reg
) ? 0 : 1;
1314 unsigned int second_reg_operand
= first_reg_operand
+ 1;
1315 reg_entry
*tmp
= i
.regs
[first_reg_operand
];
1316 i
.regs
[first_reg_operand
] = i
.regs
[second_reg_operand
];
1317 i
.regs
[second_reg_operand
] = tmp
;
1320 if (t
->opcode_modifier
& ShortForm
)
1322 /* The register or float register operand is in operand 0 or 1. */
1323 unsigned int op
= (i
.types
[0] & (Reg
| FloatReg
)) ? 0 : 1;
1324 /* Register goes in low 3 bits of opcode. */
1325 t
->base_opcode
|= i
.regs
[op
]->reg_num
;
1327 else if (t
->opcode_modifier
& ShortFormW
)
1329 /* Short form with 0x8 width bit. Register is always dest. operand */
1330 t
->base_opcode
|= i
.regs
[1]->reg_num
;
1331 if (i
.suffix
== WORD_OPCODE_SUFFIX
||
1332 i
.suffix
== DWORD_OPCODE_SUFFIX
)
1333 t
->base_opcode
|= 0x8;
1335 else if (t
->opcode_modifier
& Seg2ShortForm
)
1337 if (t
->base_opcode
== POP_SEG_SHORT
&& i
.regs
[0]->reg_num
== 1)
1339 as_bad ("you can't 'pop cs' on the 386.");
1342 t
->base_opcode
|= (i
.regs
[0]->reg_num
<< 3);
1344 else if (t
->opcode_modifier
& Seg3ShortForm
)
1346 /* 'push %fs' is 0x0fa0; 'pop %fs' is 0x0fa1.
1347 'push %gs' is 0x0fa8; 'pop %fs' is 0x0fa9.
1348 So, only if i.regs[0]->reg_num == 5 (%gs) do we need
1349 to change the opcode. */
1350 if (i
.regs
[0]->reg_num
== 5)
1351 t
->base_opcode
|= 0x08;
1353 else if ((t
->base_opcode
& ~DW
) == MOV_AX_DISP32
)
1355 /* This is a special non-modrm instruction
1356 that addresses memory with a 32-bit displacement mode anyway,
1357 and thus requires an address-size prefix if in 16-bit mode. */
1358 uses_mem_addrmode
= 1;
1361 else if (t
->opcode_modifier
& Modrm
)
1363 /* The opcode is completed (modulo t->extension_opcode which must
1364 be put into the modrm byte.
1365 Now, we make the modrm & index base bytes based on all the info
1368 /* i.reg_operands MUST be the number of real register operands;
1369 implicit registers do not count. */
1370 if (i
.reg_operands
== 2)
1372 unsigned int source
, dest
;
1373 source
= (i
.types
[0] & (Reg
| SReg2
| SReg3
| Control
| Debug
| Test
)) ? 0 : 1;
1376 /* We must be careful to make sure that all
1377 segment/control/test/debug registers go into the i.rm.reg
1378 field (despite the whether they are source or destination
1380 if (i
.regs
[dest
]->reg_type
& (SReg2
| SReg3
| Control
| Debug
| Test
))
1382 i
.rm
.reg
= i
.regs
[dest
]->reg_num
;
1383 i
.rm
.regmem
= i
.regs
[source
]->reg_num
;
1387 i
.rm
.reg
= i
.regs
[source
]->reg_num
;
1388 i
.rm
.regmem
= i
.regs
[dest
]->reg_num
;
1392 { /* if it's not 2 reg operands... */
1395 unsigned int fake_zero_displacement
= 0;
1396 unsigned int op
= (i
.types
[0] & Mem
) ? 0 : ((i
.types
[1] & Mem
) ? 1 : 2);
1398 /* Encode memory operand into modrm byte and base index
1401 if (i
.base_reg
== esp
&& !i
.index_reg
)
1403 /* <disp>(%esp) becomes two byte modrm with no index
1405 i
.rm
.regmem
= ESCAPE_TO_TWO_BYTE_ADDRESSING
;
1406 i
.rm
.mode
= mode_from_disp_size (i
.types
[op
]);
1407 i
.bi
.base
= ESP_REG_NUM
;
1408 i
.bi
.index
= NO_INDEX_REGISTER
;
1409 i
.bi
.scale
= 0; /* Must be zero! */
1411 else if (i
.base_reg
== ebp
&& !i
.index_reg
)
1413 if (!(i
.types
[op
] & Disp
))
1415 /* Must fake a zero byte displacement. There is
1416 no direct way to code '(%ebp)' directly. */
1417 fake_zero_displacement
= 1;
1418 /* fake_zero_displacement code does not set this. */
1419 i
.types
[op
] |= Disp8
;
1421 i
.rm
.mode
= mode_from_disp_size (i
.types
[op
]);
1422 i
.rm
.regmem
= EBP_REG_NUM
;
1424 else if (!i
.base_reg
&& (i
.types
[op
] & BaseIndex
))
1426 /* There are three cases here.
1427 Case 1: '<32bit disp>(,1)' -- indirect absolute.
1428 (Same as cases 2 & 3 with NO index register)
1429 Case 2: <32bit disp> (,<index>) -- no base register with disp
1430 Case 3: (, <index>) --- no base register;
1431 no disp (must add 32bit 0 disp). */
1432 i
.rm
.regmem
= ESCAPE_TO_TWO_BYTE_ADDRESSING
;
1433 i
.rm
.mode
= 0; /* 32bit mode */
1434 i
.bi
.base
= NO_BASE_REGISTER
;
1435 i
.types
[op
] &= ~Disp
;
1436 i
.types
[op
] |= Disp32
; /* Must be 32bit! */
1438 { /* case 2 or case 3 */
1439 i
.bi
.index
= i
.index_reg
->reg_num
;
1440 i
.bi
.scale
= i
.log2_scale_factor
;
1441 if (i
.disp_operands
== 0)
1442 fake_zero_displacement
= 1; /* case 3 */
1446 i
.bi
.index
= NO_INDEX_REGISTER
;
1450 else if (i
.disp_operands
&& !i
.base_reg
&& !i
.index_reg
)
1452 /* Operand is just <32bit disp> */
1453 i
.rm
.regmem
= EBP_REG_NUM
;
1455 i
.types
[op
] &= ~Disp
;
1456 i
.types
[op
] |= Disp32
;
1460 /* It's not a special case; rev'em up. */
1461 i
.rm
.regmem
= i
.base_reg
->reg_num
;
1462 i
.rm
.mode
= mode_from_disp_size (i
.types
[op
]);
1465 i
.rm
.regmem
= ESCAPE_TO_TWO_BYTE_ADDRESSING
;
1466 i
.bi
.base
= i
.base_reg
->reg_num
;
1467 i
.bi
.index
= i
.index_reg
->reg_num
;
1468 i
.bi
.scale
= i
.log2_scale_factor
;
1469 if (i
.base_reg
== ebp
&& i
.disp_operands
== 0)
1471 fake_zero_displacement
= 1;
1472 i
.types
[op
] |= Disp8
;
1473 i
.rm
.mode
= mode_from_disp_size (i
.types
[op
]);
1477 if (fake_zero_displacement
)
1479 /* Fakes a zero displacement assuming that i.types[op]
1480 holds the correct displacement size. */
1481 exp
= &disp_expressions
[i
.disp_operands
++];
1483 exp
->X_op
= O_constant
;
1484 exp
->X_add_number
= 0;
1485 exp
->X_add_symbol
= (symbolS
*) 0;
1486 exp
->X_op_symbol
= (symbolS
*) 0;
1489 /* Find the default segment for the memory operand.
1490 Used to optimize out explicit segment specifications. */
1493 unsigned int seg_index
;
1495 if (i
.rm
.regmem
== ESCAPE_TO_TWO_BYTE_ADDRESSING
)
1497 seg_index
= (i
.rm
.mode
<< 3) | i
.bi
.base
;
1498 default_seg
= two_byte_segment_defaults
[seg_index
];
1502 seg_index
= (i
.rm
.mode
<< 3) | i
.rm
.regmem
;
1503 default_seg
= one_byte_segment_defaults
[seg_index
];
1508 /* Fill in i.rm.reg or i.rm.regmem field with register operand
1509 (if any) based on t->extension_opcode. Again, we must be
1510 careful to make sure that segment/control/debug/test
1511 registers are coded into the i.rm.reg field. */
1515 (i
.types
[0] & (Reg
| SReg2
| SReg3
| Control
| Debug
| Test
)) ? 0 :
1516 (i
.types
[1] & (Reg
| SReg2
| SReg3
| Control
| Debug
| Test
)) ? 1 : 2;
1517 /* If there is an extension opcode to put here, the
1518 register number must be put into the regmem field. */
1519 if (t
->extension_opcode
!= None
)
1520 i
.rm
.regmem
= i
.regs
[op
]->reg_num
;
1522 i
.rm
.reg
= i
.regs
[op
]->reg_num
;
1524 /* Now, if no memory operand has set i.rm.mode = 0, 1, 2
1525 we must set it to 3 to indicate this is a register
1526 operand int the regmem field */
1527 if (!i
.mem_operands
)
1531 /* Fill in i.rm.reg field with extension opcode (if any). */
1532 if (t
->extension_opcode
!= None
)
1533 i
.rm
.reg
= t
->extension_opcode
;
1537 uses_mem_addrmode
= 1;
1540 /* GAS currently doesn't support 16-bit memory addressing modes at all,
1541 so if we're writing 16-bit code and using a memory addressing mode,
1542 always spew out an address size prefix. */
1543 if (uses_mem_addrmode
&& flag_16bit_code
)
1545 if (i
.prefixes
== MAX_PREFIXES
)
1547 as_bad ("%d prefixes given and address size override gives too many prefixes",
1551 i
.prefix
[i
.prefixes
++] = ADDR_PREFIX_OPCODE
;
1554 /* If a segment was explicitly specified,
1555 and the specified segment is not the default,
1556 use an opcode prefix to select it.
1557 If we never figured out what the default segment is,
1558 then default_seg will be zero at this point,
1559 and the specified segment prefix will always be used. */
1560 if ((i
.seg
) && (i
.seg
!= default_seg
))
1562 if (i
.prefixes
== MAX_PREFIXES
)
1564 as_bad ("%d prefixes given and %s segment override gives too many prefixes",
1565 MAX_PREFIXES
, i
.seg
->seg_name
);
1568 i
.prefix
[i
.prefixes
++] = i
.seg
->seg_prefix
;
1573 /* Handle conversion of 'int $3' --> special int3 insn. */
1574 if (t
->base_opcode
== INT_OPCODE
&& i
.imms
[0]->X_add_number
== 3)
1576 t
->base_opcode
= INT3_OPCODE
;
1580 /* We are ready to output the insn. */
1585 if (t
->opcode_modifier
& Jump
)
1587 unsigned long n
= i
.disps
[0]->X_add_number
;
1589 if (i
.disps
[0]->X_op
== O_constant
)
1591 if (fits_in_signed_byte (n
))
1595 p
[0] = t
->base_opcode
;
1599 { /* It's an absolute word/dword displacement. */
1601 /* Use only 16-bit jumps for 16-bit code,
1602 because text segments are limited to 64K anyway;
1603 use only 32-bit jumps for 32-bit code,
1604 because they're faster. */
1605 int jmp_size
= flag_16bit_code
? 2 : 4;
1606 if (flag_16bit_code
&& !fits_in_signed_word (n
))
1608 as_bad ("16-bit jump out of range");
1612 if (t
->base_opcode
== JUMP_PC_RELATIVE
)
1614 /* unconditional jump */
1615 p
= frag_more (1 + jmp_size
);
1616 insn_size
+= 1 + jmp_size
;
1618 md_number_to_chars (&p
[1], (valueT
) n
, jmp_size
);
1622 /* conditional jump */
1623 p
= frag_more (2 + jmp_size
);
1624 insn_size
+= 2 + jmp_size
;
1625 p
[0] = TWO_BYTE_OPCODE_ESCAPE
;
1626 p
[1] = t
->base_opcode
+ 0x10;
1627 md_number_to_chars (&p
[2], (valueT
) n
, jmp_size
);
1633 if (flag_16bit_code
)
1635 FRAG_APPEND_1_CHAR (WORD_PREFIX_OPCODE
);
1639 /* It's a symbol; end frag & setup for relax.
1640 Make sure there are more than 6 chars left in the current frag;
1641 if not we'll have to start a new one. */
1645 p
[0] = t
->base_opcode
;
1646 frag_var (rs_machine_dependent
,
1647 6, /* 2 opcode/prefix + 4 displacement */
1649 ((unsigned char) *p
== JUMP_PC_RELATIVE
1650 ? ENCODE_RELAX_STATE (UNCOND_JUMP
, BYTE
)
1651 : ENCODE_RELAX_STATE (COND_JUMP
, BYTE
)),
1652 i
.disps
[0]->X_add_symbol
,
1656 else if (t
->opcode_modifier
& (JumpByte
| JumpDword
))
1658 int size
= (t
->opcode_modifier
& JumpByte
) ? 1 : 4;
1659 unsigned long n
= i
.disps
[0]->X_add_number
;
1662 /* The jcx/jecx instruction might need a data size prefix. */
1663 for (q
= i
.prefix
; q
< i
.prefix
+ i
.prefixes
; q
++)
1665 if (*q
== WORD_PREFIX_OPCODE
)
1667 FRAG_APPEND_1_CHAR (WORD_PREFIX_OPCODE
);
1673 if ((size
== 4) && (flag_16bit_code
))
1675 FRAG_APPEND_1_CHAR (WORD_PREFIX_OPCODE
);
1679 if (fits_in_unsigned_byte (t
->base_opcode
))
1681 FRAG_APPEND_1_CHAR (t
->base_opcode
);
1686 p
= frag_more (2); /* opcode can be at most two bytes */
1688 /* put out high byte first: can't use md_number_to_chars! */
1689 *p
++ = (t
->base_opcode
>> 8) & 0xff;
1690 *p
= t
->base_opcode
& 0xff;
1693 p
= frag_more (size
);
1695 if (i
.disps
[0]->X_op
== O_constant
)
1697 md_number_to_chars (p
, (valueT
) n
, size
);
1698 if (size
== 1 && !fits_in_signed_byte (n
))
1700 as_bad ("loop/jecx only takes byte displacement; %lu shortened to %d",
1706 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
, size
,
1707 i
.disps
[0], 1, reloc (size
, 1, i
.disp_reloc
[0]));
1711 else if (t
->opcode_modifier
& JumpInterSegment
)
1713 if (flag_16bit_code
)
1715 FRAG_APPEND_1_CHAR (WORD_PREFIX_OPCODE
);
1719 p
= frag_more (1 + 2 + 4); /* 1 opcode; 2 segment; 4 offset */
1720 insn_size
+= 1 + 2 + 4;
1721 p
[0] = t
->base_opcode
;
1722 if (i
.imms
[1]->X_op
== O_constant
)
1723 md_number_to_chars (p
+ 1, (valueT
) i
.imms
[1]->X_add_number
, 4);
1725 fix_new_exp (frag_now
, p
+ 1 - frag_now
->fr_literal
, 4,
1726 i
.imms
[1], 0, BFD_RELOC_32
);
1727 if (i
.imms
[0]->X_op
!= O_constant
)
1728 as_bad ("can't handle non absolute segment in long call/jmp");
1729 md_number_to_chars (p
+ 5, (valueT
) i
.imms
[0]->X_add_number
, 2);
1733 /* Output normal instructions here. */
1736 /* First the prefix bytes. */
1737 for (q
= i
.prefix
; q
< i
.prefix
+ i
.prefixes
; q
++)
1741 md_number_to_chars (p
, (valueT
) *q
, 1);
1744 /* Now the opcode; be careful about word order here! */
1745 if (fits_in_unsigned_byte (t
->base_opcode
))
1747 FRAG_APPEND_1_CHAR (t
->base_opcode
);
1750 else if (fits_in_unsigned_word (t
->base_opcode
))
1754 /* put out high byte first: can't use md_number_to_chars! */
1755 *p
++ = (t
->base_opcode
>> 8) & 0xff;
1756 *p
= t
->base_opcode
& 0xff;
1759 { /* opcode is either 3 or 4 bytes */
1760 if (t
->base_opcode
& 0xff000000)
1764 *p
++ = (t
->base_opcode
>> 24) & 0xff;
1771 *p
++ = (t
->base_opcode
>> 16) & 0xff;
1772 *p
++ = (t
->base_opcode
>> 8) & 0xff;
1773 *p
= (t
->base_opcode
) & 0xff;
1776 /* Now the modrm byte and base index byte (if present). */
1777 if (t
->opcode_modifier
& Modrm
)
1781 /* md_number_to_chars (p, i.rm, 1); */
1782 md_number_to_chars (p
,
1783 (valueT
) (i
.rm
.regmem
<< 0
1787 /* If i.rm.regmem == ESP (4) && i.rm.mode != Mode 3 (Register mode)
1788 ==> need second modrm byte. */
1789 if (i
.rm
.regmem
== ESCAPE_TO_TWO_BYTE_ADDRESSING
&& i
.rm
.mode
!= 3)
1793 /* md_number_to_chars (p, i.bi, 1); */
1794 md_number_to_chars (p
, (valueT
) (i
.bi
.base
<< 0
1801 if (i
.disp_operands
)
1803 register unsigned int n
;
1805 for (n
= 0; n
< i
.operands
; n
++)
1809 if (i
.disps
[n
]->X_op
== O_constant
)
1811 if (i
.types
[n
] & (Disp8
| Abs8
))
1815 md_number_to_chars (p
,
1816 (valueT
) i
.disps
[n
]->X_add_number
,
1819 else if (i
.types
[n
] & (Disp16
| Abs16
))
1823 md_number_to_chars (p
,
1824 (valueT
) i
.disps
[n
]->X_add_number
,
1828 { /* Disp32|Abs32 */
1831 md_number_to_chars (p
,
1832 (valueT
) i
.disps
[n
]->X_add_number
,
1837 { /* not absolute_section */
1838 /* need a 32-bit fixup (don't support 8bit non-absolute disps) */
1841 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
, 4,
1843 TC_RELOC(i
.disp_reloc
[n
], BFD_RELOC_32
));
1847 } /* end displacement output */
1849 /* output immediate */
1852 register unsigned int n
;
1854 for (n
= 0; n
< i
.operands
; n
++)
1858 if (i
.imms
[n
]->X_op
== O_constant
)
1860 if (i
.types
[n
] & (Imm8
| Imm8S
))
1864 md_number_to_chars (p
,
1865 (valueT
) i
.imms
[n
]->X_add_number
,
1868 else if (i
.types
[n
] & Imm16
)
1872 md_number_to_chars (p
,
1873 (valueT
) i
.imms
[n
]->X_add_number
,
1880 md_number_to_chars (p
,
1881 (valueT
) i
.imms
[n
]->X_add_number
,
1886 { /* not absolute_section */
1887 /* Need a 32-bit fixup (don't support 8bit
1888 non-absolute ims). Try to support other
1894 if (i
.types
[n
] & (Imm8
| Imm8S
))
1896 else if (i
.types
[n
] & Imm16
)
1900 r_type
= reloc (size
, 0, i
.disp_reloc
[0]);
1901 p
= frag_more (size
);
1903 #ifdef BFD_ASSEMBLER
1904 if (r_type
== BFD_RELOC_32
1906 && GOT_symbol
== i
.imms
[n
]->X_add_symbol
1907 && (i
.imms
[n
]->X_op
== O_symbol
1908 || (i
.imms
[n
]->X_op
== O_add
1909 && (i
.imms
[n
]->X_op_symbol
->sy_value
.X_op
1912 r_type
= BFD_RELOC_386_GOTPC
;
1913 i
.imms
[n
]->X_add_number
+= 3;
1916 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
, size
,
1917 i
.imms
[n
], pcrel
, r_type
);
1921 } /* end immediate output */
1929 #endif /* DEBUG386 */
1933 /* Parse OPERAND_STRING into the i386_insn structure I. Returns non-zero
1937 i386_operand (operand_string
)
1938 char *operand_string
;
1940 register char *op_string
= operand_string
;
1942 /* Address of '\0' at end of operand_string. */
1943 char *end_of_operand_string
= operand_string
+ strlen (operand_string
);
1945 /* Start and end of displacement string expression (if found). */
1946 char *displacement_string_start
= NULL
;
1947 char *displacement_string_end
= NULL
;
1949 /* We check for an absolute prefix (differentiating,
1950 for example, 'jmp pc_relative_label' from 'jmp *absolute_label'. */
1951 if (*op_string
== ABSOLUTE_PREFIX
)
1954 i
.types
[this_operand
] |= JumpAbsolute
;
1957 /* Check if operand is a register. */
1958 if (*op_string
== REGISTER_PREFIX
)
1960 register reg_entry
*r
;
1961 if (!(r
= parse_register (op_string
)))
1963 as_bad ("bad register name ('%s')", op_string
);
1966 /* Check for segment override, rather than segment register by
1967 searching for ':' after %<x>s where <x> = s, c, d, e, f, g. */
1968 if ((r
->reg_type
& (SReg2
| SReg3
)) && op_string
[3] == ':')
1973 i
.seg
= (seg_entry
*) & es
;
1976 i
.seg
= (seg_entry
*) & cs
;
1979 i
.seg
= (seg_entry
*) & ss
;
1982 i
.seg
= (seg_entry
*) & ds
;
1985 i
.seg
= (seg_entry
*) & fs
;
1988 i
.seg
= (seg_entry
*) & gs
;
1991 op_string
+= 4; /* skip % <x> s : */
1992 operand_string
= op_string
; /* Pretend given string starts here. */
1993 if (!is_digit_char (*op_string
) && !is_identifier_char (*op_string
)
1994 && *op_string
!= '(' && *op_string
!= ABSOLUTE_PREFIX
)
1996 as_bad ("bad memory operand after segment override");
1999 /* Handle case of %es:*foo. */
2000 if (*op_string
== ABSOLUTE_PREFIX
)
2003 i
.types
[this_operand
] |= JumpAbsolute
;
2005 goto do_memory_reference
;
2007 i
.types
[this_operand
] |= r
->reg_type
;
2008 i
.regs
[this_operand
] = r
;
2011 else if (*op_string
== IMMEDIATE_PREFIX
)
2012 { /* ... or an immediate */
2013 char *save_input_line_pointer
;
2017 if (i
.imm_operands
== MAX_IMMEDIATE_OPERANDS
)
2019 as_bad ("only 1 or 2 immediate operands are allowed");
2023 exp
= &im_expressions
[i
.imm_operands
++];
2024 i
.imms
[this_operand
] = exp
;
2025 save_input_line_pointer
= input_line_pointer
;
2026 input_line_pointer
= ++op_string
; /* must advance op_string! */
2028 exp_seg
= expression (exp
);
2029 input_line_pointer
= save_input_line_pointer
;
2031 if (exp
->X_op
== O_absent
)
2033 /* missing or bad expr becomes absolute 0 */
2034 as_bad ("missing or invalid immediate expression '%s' taken as 0",
2036 exp
->X_op
= O_constant
;
2037 exp
->X_add_number
= 0;
2038 exp
->X_add_symbol
= (symbolS
*) 0;
2039 exp
->X_op_symbol
= (symbolS
*) 0;
2040 i
.types
[this_operand
] |= Imm
;
2042 else if (exp
->X_op
== O_constant
)
2044 i
.types
[this_operand
] |=
2045 smallest_imm_type ((unsigned long) exp
->X_add_number
);
2048 else if (exp_seg
!= text_section
2049 && exp_seg
!= data_section
2050 && exp_seg
!= bss_section
2051 && exp_seg
!= undefined_section
2052 #ifdef BFD_ASSEMBLER
2053 && ! bfd_is_com_section (exp_seg
)
2058 as_bad ("Unimplemented segment type %d in parse_operand", exp_seg
);
2064 /* this is an address ==> 32bit */
2065 i
.types
[this_operand
] |= Imm32
;
2067 /* shorten this type of this operand if the instruction wants
2068 * fewer bits than are present in the immediate. The bit field
2069 * code can put out 'andb $0xffffff, %al', for example. pace
2070 * also 'movw $foo,(%eax)'
2074 case WORD_OPCODE_SUFFIX
:
2075 i
.types
[this_operand
] |= Imm16
;
2077 case BYTE_OPCODE_SUFFIX
:
2078 i
.types
[this_operand
] |= Imm16
| Imm8
| Imm8S
;
2082 else if (is_digit_char (*op_string
) || is_identifier_char (*op_string
)
2083 || *op_string
== '(')
2085 /* This is a memory reference of some sort. */
2086 register char *base_string
;
2087 unsigned int found_base_index_form
;
2089 do_memory_reference
:
2090 if (i
.mem_operands
== MAX_MEMORY_OPERANDS
)
2092 as_bad ("more than 1 memory reference in instruction");
2097 /* Determine type of memory operand from opcode_suffix;
2098 no opcode suffix implies general memory references. */
2101 case BYTE_OPCODE_SUFFIX
:
2102 i
.types
[this_operand
] |= Mem8
;
2104 case WORD_OPCODE_SUFFIX
:
2105 i
.types
[this_operand
] |= Mem16
;
2107 case DWORD_OPCODE_SUFFIX
:
2109 i
.types
[this_operand
] |= Mem32
;
2112 /* Check for base index form. We detect the base index form by
2113 looking for an ')' at the end of the operand, searching
2114 for the '(' matching it, and finding a REGISTER_PREFIX or ','
2116 base_string
= end_of_operand_string
- 1;
2117 found_base_index_form
= 0;
2118 if (*base_string
== ')')
2120 unsigned int parens_balenced
= 1;
2121 /* We've already checked that the number of left & right ()'s are
2122 equal, so this loop will not be infinite. */
2126 if (*base_string
== ')')
2128 if (*base_string
== '(')
2131 while (parens_balenced
);
2132 base_string
++; /* Skip past '('. */
2133 if (*base_string
== REGISTER_PREFIX
|| *base_string
== ',')
2134 found_base_index_form
= 1;
2137 /* If we can't parse a base index register expression, we've found
2138 a pure displacement expression. We set up displacement_string_start
2139 and displacement_string_end for the code below. */
2140 if (!found_base_index_form
)
2142 displacement_string_start
= op_string
;
2143 displacement_string_end
= end_of_operand_string
;
2147 char *base_reg_name
, *index_reg_name
, *num_string
;
2150 i
.types
[this_operand
] |= BaseIndex
;
2152 /* If there is a displacement set-up for it to be parsed later. */
2153 if (base_string
!= op_string
+ 1)
2155 displacement_string_start
= op_string
;
2156 displacement_string_end
= base_string
- 1;
2159 /* Find base register (if any). */
2160 if (*base_string
!= ',')
2162 base_reg_name
= base_string
++;
2163 /* skip past register name & parse it */
2164 while (isalpha (*base_string
))
2166 if (base_string
== base_reg_name
+ 1)
2168 as_bad ("can't find base register name after '(%c'",
2172 END_STRING_AND_SAVE (base_string
);
2173 if (!(i
.base_reg
= parse_register (base_reg_name
)))
2175 as_bad ("bad base register name ('%s')", base_reg_name
);
2178 RESTORE_END_STRING (base_string
);
2181 /* Now check seperator; must be ',' ==> index reg
2182 OR num ==> no index reg. just scale factor
2183 OR ')' ==> end. (scale factor = 1) */
2184 if (*base_string
!= ',' && *base_string
!= ')')
2186 as_bad ("expecting ',' or ')' after base register in `%s'",
2191 /* There may index reg here; and there may be a scale factor. */
2192 if (*base_string
== ',' && *(base_string
+ 1) == REGISTER_PREFIX
)
2194 index_reg_name
= ++base_string
;
2195 while (isalpha (*++base_string
));
2196 END_STRING_AND_SAVE (base_string
);
2197 if (!(i
.index_reg
= parse_register (index_reg_name
)))
2199 as_bad ("bad index register name ('%s')", index_reg_name
);
2202 RESTORE_END_STRING (base_string
);
2205 /* Check for scale factor. */
2206 if (*base_string
== ',' && isdigit (*(base_string
+ 1)))
2208 num_string
= ++base_string
;
2209 while (is_digit_char (*base_string
))
2211 if (base_string
== num_string
)
2213 as_bad ("can't find a scale factor after ','");
2216 END_STRING_AND_SAVE (base_string
);
2217 /* We've got a scale factor. */
2218 if (!sscanf (num_string
, "%d", &num
))
2220 as_bad ("can't parse scale factor from '%s'", num_string
);
2223 RESTORE_END_STRING (base_string
);
2225 { /* must be 1 digit scale */
2227 i
.log2_scale_factor
= 0;
2230 i
.log2_scale_factor
= 1;
2233 i
.log2_scale_factor
= 2;
2236 i
.log2_scale_factor
= 3;
2239 as_bad ("expecting scale factor of 1, 2, 4, 8; got %d", num
);
2245 if (!i
.index_reg
&& *base_string
== ',')
2247 as_bad ("expecting index register or scale factor after ','; got '%c'",
2248 *(base_string
+ 1));
2254 /* If there's an expression begining the operand, parse it,
2255 assuming displacement_string_start and displacement_string_end
2257 if (displacement_string_start
)
2259 register expressionS
*exp
;
2261 char *save_input_line_pointer
;
2262 exp
= &disp_expressions
[i
.disp_operands
];
2263 i
.disps
[this_operand
] = exp
;
2264 i
.disp_reloc
[this_operand
] = NO_RELOC
;
2266 save_input_line_pointer
= input_line_pointer
;
2267 input_line_pointer
= displacement_string_start
;
2268 END_STRING_AND_SAVE (displacement_string_end
);
2272 * We can have operands of the form
2273 * <symbol>@GOTOFF+<nnn>
2274 * Take the easy way out here and copy everything
2275 * into a temporary buffer...
2278 if ((cp
= strchr (input_line_pointer
,'@')) != NULL
) {
2279 char tmpbuf
[BUFSIZ
];
2282 GOT_symbol
= symbol_find_or_make(GLOBAL_OFFSET_TABLE_NAME
);
2284 if (strncmp(cp
+1, "PLT", 3) == 0) {
2285 i
.disp_reloc
[this_operand
] = BFD_RELOC_386_PLT32
;
2287 strcpy(tmpbuf
, input_line_pointer
);
2288 strcat(tmpbuf
, cp
+1+3);
2290 } else if (strncmp(cp
+1, "GOTOFF", 6) == 0) {
2291 i
.disp_reloc
[this_operand
] = BFD_RELOC_386_GOTOFF
;
2293 strcpy(tmpbuf
, input_line_pointer
);
2294 strcat(tmpbuf
, cp
+1+6);
2296 } else if (strncmp(cp
+1, "GOT", 3) == 0) {
2297 i
.disp_reloc
[this_operand
] = BFD_RELOC_386_GOT32
;
2299 strcpy(tmpbuf
, input_line_pointer
);
2300 strcat(tmpbuf
, cp
+1+3);
2303 as_bad("Bad reloc specifier '%s' in expression", cp
+1);
2304 input_line_pointer
= tmpbuf
;
2308 exp_seg
= expression (exp
);
2310 #ifdef BFD_ASSEMBLER
2311 /* We do this to make sure that the section symbol is in
2312 the symbol table. We will ultimately change the relocation
2313 to be relative to the beginning of the section */
2314 if (i
.disp_reloc
[this_operand
] == BFD_RELOC_386_GOTOFF
)
2316 if (S_IS_LOCAL(exp
->X_add_symbol
)
2317 && S_GET_SEGMENT (exp
->X_add_symbol
) != undefined_section
)
2318 section_symbol(exp
->X_add_symbol
->bsym
->section
);
2319 assert (exp
->X_op
== O_symbol
);
2320 exp
->X_op
= O_subtract
;
2321 exp
->X_op_symbol
= GOT_symbol
;
2322 i
.disp_reloc
[this_operand
] = BFD_RELOC_32
;
2326 if (*input_line_pointer
)
2327 as_bad ("Ignoring junk '%s' after expression", input_line_pointer
);
2328 RESTORE_END_STRING (displacement_string_end
);
2329 input_line_pointer
= save_input_line_pointer
;
2330 if (exp
->X_op
== O_absent
)
2332 /* missing expr becomes absolute 0 */
2333 as_bad ("missing or invalid displacement '%s' taken as 0",
2335 i
.types
[this_operand
] |= (Disp
| Abs
);
2336 exp
->X_op
= O_constant
;
2337 exp
->X_add_number
= 0;
2338 exp
->X_add_symbol
= (symbolS
*) 0;
2339 exp
->X_op_symbol
= (symbolS
*) 0;
2341 else if (exp
->X_op
== O_constant
)
2343 i
.types
[this_operand
] |= SMALLEST_DISP_TYPE (exp
->X_add_number
);
2345 else if (exp_seg
== text_section
2346 || exp_seg
== data_section
2347 || exp_seg
== bss_section
2348 || exp_seg
== undefined_section
)
2350 i
.types
[this_operand
] |= Disp32
;
2355 i
.types
[this_operand
] |= Disp32
;
2357 goto seg_unimplemented
;
2362 /* Make sure the memory operand we've been dealt is valid. */
2363 if (i
.base_reg
&& i
.index_reg
&&
2364 !(i
.base_reg
->reg_type
& i
.index_reg
->reg_type
& Reg
))
2366 as_bad ("register size mismatch in (base,index,scale) expression");
2370 * special case for (%dx) while doing input/output op
2373 (i
.base_reg
->reg_type
== (Reg16
| InOutPortReg
)) &&
2374 (i
.index_reg
== 0)))
2376 i
.types
[this_operand
] |= InOutPortReg
;
2379 if ((i
.base_reg
&& (i
.base_reg
->reg_type
& Reg32
) == 0) ||
2380 (i
.index_reg
&& (i
.index_reg
->reg_type
& Reg32
) == 0))
2382 as_bad ("base/index register must be 32 bit register");
2385 if (i
.index_reg
&& i
.index_reg
== esp
)
2387 as_bad ("%s may not be used as an index register", esp
->reg_name
);
2392 { /* it's not a memory operand; argh! */
2393 as_bad ("invalid char %s begining %s operand '%s'",
2394 output_invalid (*op_string
), ordinal_names
[this_operand
],
2398 return 1; /* normal return */
2402 * md_estimate_size_before_relax()
2404 * Called just before relax().
2405 * Any symbol that is now undefined will not become defined.
2406 * Return the correct fr_subtype in the frag.
2407 * Return the initial "guess for fr_var" to caller.
2408 * The guess for fr_var is ACTUALLY the growth beyond fr_fix.
2409 * Whatever we do to grow fr_fix or fr_var contributes to our returned value.
2410 * Although it may not be explicit in the frag, pretend fr_var starts with a
2414 md_estimate_size_before_relax (fragP
, segment
)
2415 register fragS
*fragP
;
2416 register segT segment
;
2418 register unsigned char *opcode
;
2419 register int old_fr_fix
;
2421 old_fr_fix
= fragP
->fr_fix
;
2422 opcode
= (unsigned char *) fragP
->fr_opcode
;
2423 /* We've already got fragP->fr_subtype right; all we have to do is check
2424 for un-relaxable symbols. */
2425 if (S_GET_SEGMENT (fragP
->fr_symbol
) != segment
)
2427 /* symbol is undefined in this segment */
2430 case JUMP_PC_RELATIVE
: /* make jmp (0xeb) a dword displacement jump */
2431 opcode
[0] = 0xe9; /* dword disp jmp */
2433 fix_new (fragP
, old_fr_fix
, 4,
2435 fragP
->fr_offset
, 1,
2436 (GOT_symbol
&& /* Not quite right - we should switch on
2437 presence of @PLT, but I cannot see how
2438 to get to that from here. We should have
2439 done this in md_assemble to really
2440 get it right all of the time, but I
2441 think it does not matter that much, as
2442 this will be right most of the time. ERY*/
2443 S_GET_SEGMENT(fragP
->fr_symbol
) == undefined_section
)?
2444 BFD_RELOC_386_PLT32
: BFD_RELOC_32_PCREL
);
2448 /* This changes the byte-displacement jump 0x7N -->
2449 the dword-displacement jump 0x0f8N */
2450 opcode
[1] = opcode
[0] + 0x10;
2451 opcode
[0] = TWO_BYTE_OPCODE_ESCAPE
; /* two-byte escape */
2452 fragP
->fr_fix
+= 1 + 4; /* we've added an opcode byte */
2453 fix_new (fragP
, old_fr_fix
+ 1, 4,
2455 fragP
->fr_offset
, 1,
2456 (GOT_symbol
&& /* Not quite right - we should switch on
2457 presence of @PLT, but I cannot see how
2458 to get to that from here. ERY */
2459 S_GET_SEGMENT(fragP
->fr_symbol
) == undefined_section
)?
2460 BFD_RELOC_386_PLT32
: BFD_RELOC_32_PCREL
);
2465 return (fragP
->fr_var
+ fragP
->fr_fix
- old_fr_fix
);
2466 } /* md_estimate_size_before_relax() */
2469 * md_convert_frag();
2471 * Called after relax() is finished.
2472 * In: Address of frag.
2473 * fr_type == rs_machine_dependent.
2474 * fr_subtype is what the address relaxed to.
2476 * Out: Any fixSs and constants are set up.
2477 * Caller will turn frag into a ".space 0".
2479 #ifndef BFD_ASSEMBLER
2481 md_convert_frag (headers
, sec
, fragP
)
2482 object_headers
*headers
;
2484 register fragS
*fragP
;
2487 md_convert_frag (abfd
, sec
, fragP
)
2490 register fragS
*fragP
;
2493 register unsigned char *opcode
;
2494 unsigned char *where_to_put_displacement
= NULL
;
2495 unsigned int target_address
;
2496 unsigned int opcode_address
;
2497 unsigned int extension
= 0;
2498 int displacement_from_opcode_start
;
2500 opcode
= (unsigned char *) fragP
->fr_opcode
;
2502 /* Address we want to reach in file space. */
2503 target_address
= S_GET_VALUE (fragP
->fr_symbol
) + fragP
->fr_offset
;
2504 #ifdef BFD_ASSEMBLER /* not needed otherwise? */
2505 target_address
+= fragP
->fr_symbol
->sy_frag
->fr_address
;
2508 /* Address opcode resides at in file space. */
2509 opcode_address
= fragP
->fr_address
+ fragP
->fr_fix
;
2511 /* Displacement from opcode start to fill into instruction. */
2512 displacement_from_opcode_start
= target_address
- opcode_address
;
2514 switch (fragP
->fr_subtype
)
2516 case ENCODE_RELAX_STATE (COND_JUMP
, BYTE
):
2517 case ENCODE_RELAX_STATE (UNCOND_JUMP
, BYTE
):
2518 /* don't have to change opcode */
2519 extension
= 1; /* 1 opcode + 1 displacement */
2520 where_to_put_displacement
= &opcode
[1];
2523 case ENCODE_RELAX_STATE (COND_JUMP
, WORD
):
2524 opcode
[1] = TWO_BYTE_OPCODE_ESCAPE
;
2525 opcode
[2] = opcode
[0] + 0x10;
2526 opcode
[0] = WORD_PREFIX_OPCODE
;
2527 extension
= 4; /* 3 opcode + 2 displacement */
2528 where_to_put_displacement
= &opcode
[3];
2531 case ENCODE_RELAX_STATE (UNCOND_JUMP
, WORD
):
2533 opcode
[0] = WORD_PREFIX_OPCODE
;
2534 extension
= 3; /* 2 opcode + 2 displacement */
2535 where_to_put_displacement
= &opcode
[2];
2538 case ENCODE_RELAX_STATE (COND_JUMP
, DWORD
):
2539 opcode
[1] = opcode
[0] + 0x10;
2540 opcode
[0] = TWO_BYTE_OPCODE_ESCAPE
;
2541 extension
= 5; /* 2 opcode + 4 displacement */
2542 where_to_put_displacement
= &opcode
[2];
2545 case ENCODE_RELAX_STATE (UNCOND_JUMP
, DWORD
):
2547 extension
= 4; /* 1 opcode + 4 displacement */
2548 where_to_put_displacement
= &opcode
[1];
2552 BAD_CASE (fragP
->fr_subtype
);
2555 /* now put displacement after opcode */
2556 md_number_to_chars ((char *) where_to_put_displacement
,
2557 (valueT
) (displacement_from_opcode_start
- extension
),
2558 SIZE_FROM_RELAX_STATE (fragP
->fr_subtype
));
2559 fragP
->fr_fix
+= extension
;
2563 int md_short_jump_size
= 2; /* size of byte displacement jmp */
2564 int md_long_jump_size
= 5; /* size of dword displacement jmp */
2565 const int md_reloc_size
= 8; /* Size of relocation record */
2568 md_create_short_jump (ptr
, from_addr
, to_addr
, frag
, to_symbol
)
2570 addressT from_addr
, to_addr
;
2576 offset
= to_addr
- (from_addr
+ 2);
2577 md_number_to_chars (ptr
, (valueT
) 0xeb, 1); /* opcode for byte-disp jump */
2578 md_number_to_chars (ptr
+ 1, (valueT
) offset
, 1);
2582 md_create_long_jump (ptr
, from_addr
, to_addr
, frag
, to_symbol
)
2584 addressT from_addr
, to_addr
;
2590 if (flag_do_long_jump
)
2592 offset
= to_addr
- S_GET_VALUE (to_symbol
);
2593 md_number_to_chars (ptr
, (valueT
) 0xe9, 1);/* opcode for long jmp */
2594 md_number_to_chars (ptr
+ 1, (valueT
) offset
, 4);
2595 fix_new (frag
, (ptr
+ 1) - frag
->fr_literal
, 4,
2596 to_symbol
, (offsetT
) 0, 0, BFD_RELOC_32
);
2600 offset
= to_addr
- (from_addr
+ 5);
2601 md_number_to_chars (ptr
, (valueT
) 0xe9, 1);
2602 md_number_to_chars (ptr
+ 1, (valueT
) offset
, 4);
2606 /* Apply a fixup (fixS) to segment data, once it has been determined
2607 by our caller that we have all the info we need to fix it up.
2609 On the 386, immediates, displacements, and data pointers are all in
2610 the same (little-endian) format, so we don't need to care about which
2614 md_apply_fix3 (fixP
, valp
, seg
)
2615 fixS
*fixP
; /* The fix we're to put in. */
2616 valueT
*valp
; /* Pointer to the value of the bits. */
2617 segT seg
; /* Segment fix is from. */
2619 register char *p
= fixP
->fx_where
+ fixP
->fx_frag
->fr_literal
;
2620 valueT value
= *valp
;
2622 #if defined (BFD_ASSEMBLER) && !defined (TE_Mach)
2624 * This is a hack. There should be a better way to
2627 if (fixP
->fx_r_type
== BFD_RELOC_32_PCREL
&& fixP
->fx_addsy
)
2629 value
+= fixP
->fx_where
+ fixP
->fx_frag
->fr_address
;
2631 if (S_GET_SEGMENT (fixP
->fx_addsy
) == seg
2632 || (fixP
->fx_addsy
->bsym
->flags
& BSF_SECTION_SYM
) != 0)
2634 /* Yes, we add the values in twice. This is because
2635 bfd_perform_relocation subtracts them out again. I think
2636 bfd_perform_relocation is broken, but I don't dare change
2638 value
+= fixP
->fx_where
+ fixP
->fx_frag
->fr_address
;
2643 /* Fix a few things - the dynamic linker expects certain values here,
2644 and we must not dissappoint it. */
2647 switch(fixP
->fx_r_type
) {
2648 case BFD_RELOC_386_PLT32
:
2649 /* Make the jump instruction point to the address of the operand. At
2650 runtime we merely add the offset to the actual PLT entry. */
2653 case BFD_RELOC_386_GOTPC
:
2655 * This is tough to explain. We end up with this one if we have
2656 * operands that look like "_GLOBAL_OFFSET_TABLE_+[.-.L284]". The goal
2657 * here is to obtain the absolute address of the GOT, and it is strongly
2658 * preferable from a performance point of view to avoid using a runtime
2659 * relocation for this. The actual sequence of instructions often look
2665 * addl $_GLOBAL_OFFSET_TABLE_+[.-.L66],%ebx
2667 * The call and pop essentially return the absolute address of
2668 * the label .L66 and store it in %ebx. The linker itself will
2669 * ultimately change the first operand of the addl so that %ebx points to
2670 * the GOT, but to keep things simple, the .o file must have this operand
2671 * set so that it generates not the absolute address of .L66, but the
2672 * absolute address of itself. This allows the linker itself simply
2673 * treat a GOTPC relocation as asking for a pcrel offset to the GOT to be
2674 * added in, and the addend of the relocation is stored in the operand
2675 * field for the instruction itself.
2677 * Our job here is to fix the operand so that it would add the correct
2678 * offset so that %ebx would point to itself. The thing that is tricky is
2679 * that .-.L66 will point to the beginning of the instruction, so we need
2680 * to further modify the operand so that it will point to itself.
2681 * There are other cases where you have something like:
2683 * .long $_GLOBAL_OFFSET_TABLE_+[.-.L66]
2685 * and here no correction would be required. Internally in the assembler
2686 * we treat operands of this form as not being pcrel since the '.' is
2687 * explicitly mentioned, and I wonder whether it would simplify matters
2688 * to do it this way. Who knows. In earlier versions of the PIC patches,
2689 * the pcrel_adjust field was used to store the correction, but since the
2690 * expression is not pcrel, I felt it would be confusing to do it this way.
2694 case BFD_RELOC_386_GOT32
:
2695 value
= 0; /* Fully resolved at runtime. No addend. */
2697 case BFD_RELOC_386_GOTOFF
:
2706 md_number_to_chars (p
, value
, fixP
->fx_size
);
2712 /* This is never used. */
2713 long /* Knows about the byte order in a word. */
2714 md_chars_to_number (con
, nbytes
)
2715 unsigned char con
[]; /* Low order byte 1st. */
2716 int nbytes
; /* Number of bytes in the input. */
2719 for (retval
= 0, con
+= nbytes
- 1; nbytes
--; con
--)
2721 retval
<<= BITS_PER_CHAR
;
2729 #define MAX_LITTLENUMS 6
2731 /* Turn the string pointed to by litP into a floating point constant of type
2732 type, and emit the appropriate bytes. The number of LITTLENUMS emitted
2733 is stored in *sizeP . An error message is returned, or NULL on OK. */
2735 md_atof (type
, litP
, sizeP
)
2741 LITTLENUM_TYPE words
[MAX_LITTLENUMS
];
2742 LITTLENUM_TYPE
*wordP
;
2764 return "Bad call to md_atof ()";
2766 t
= atof_ieee (input_line_pointer
, type
, words
);
2768 input_line_pointer
= t
;
2770 *sizeP
= prec
* sizeof (LITTLENUM_TYPE
);
2771 /* This loops outputs the LITTLENUMs in REVERSE order; in accord with
2772 the bigendian 386. */
2773 for (wordP
= words
+ prec
- 1; prec
--;)
2775 md_number_to_chars (litP
, (valueT
) (*wordP
--), sizeof (LITTLENUM_TYPE
));
2776 litP
+= sizeof (LITTLENUM_TYPE
);
2781 char output_invalid_buf
[8];
2788 sprintf (output_invalid_buf
, "'%c'", c
);
2790 sprintf (output_invalid_buf
, "(0x%x)", (unsigned) c
);
2791 return output_invalid_buf
;
2794 /* reg_string starts *before* REGISTER_PREFIX */
2796 parse_register (reg_string
)
2799 register char *s
= reg_string
;
2801 char reg_name_given
[MAX_REG_NAME_SIZE
];
2803 s
++; /* skip REGISTER_PREFIX */
2804 for (p
= reg_name_given
; is_register_char (*s
); p
++, s
++)
2806 *p
= register_chars
[(unsigned char) *s
];
2807 if (p
>= reg_name_given
+ MAX_REG_NAME_SIZE
)
2808 return (reg_entry
*) 0;
2811 return (reg_entry
*) hash_find (reg_hash
, reg_name_given
);
2815 CONST
char *md_shortopts
= "kmVQ:";
2817 CONST
char *md_shortopts
= "m";
2819 struct option md_longopts
[] = {
2820 {NULL
, no_argument
, NULL
, 0}
2822 size_t md_longopts_size
= sizeof(md_longopts
);
2825 md_parse_option (c
, arg
)
2832 flag_do_long_jump
= 1;
2836 /* -k: Ignore for FreeBSD compatibility. */
2840 /* -V: SVR4 argument to print version ID. */
2842 print_version_id ();
2845 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
2846 should be emitted or not. FIXME: Not implemented. */
2858 md_show_usage (stream
)
2862 -m do long jump\n");
2865 /* We have no need to default values of symbols. */
2869 md_undefined_symbol (name
)
2872 if (*name
== '_' && *(name
+1) == 'G'
2873 && strcmp(name
, GLOBAL_OFFSET_TABLE_NAME
) == 0)
2877 if(symbol_find(name
))
2878 as_bad("GOT already in symbol table");
2879 GOT_symbol
= symbol_new (name
, undefined_section
,
2880 (valueT
) 0, &zero_address_frag
);
2887 /* Round up a section size to the appropriate boundary. */
2889 md_section_align (segment
, size
)
2893 return size
; /* Byte alignment is fine */
2896 /* Exactly what point is a PC-relative offset relative TO? On the
2897 i386, they're relative to the address of the offset, plus its
2898 size. (??? Is this right? FIXME-SOON!) */
2900 md_pcrel_from (fixP
)
2903 return fixP
->fx_size
+ fixP
->fx_where
+ fixP
->fx_frag
->fr_address
;
2914 temp
= get_absolute_expression ();
2915 subseg_set (bss_section
, (subsegT
) temp
);
2916 demand_empty_rest_of_line ();
2922 #ifdef BFD_ASSEMBLER
2925 i386_validate_fix (fixp
)
2928 if (fixp
->fx_subsy
&& fixp
->fx_subsy
== GOT_symbol
)
2930 fixp
->fx_r_type
= BFD_RELOC_386_GOTOFF
;
2935 #define F(SZ,PCREL) (((SZ) << 1) + (PCREL))
2936 #define MAP(SZ,PCREL,TYPE) case F(SZ,PCREL): code = (TYPE); break
2939 tc_gen_reloc (section
, fixp
)
2944 bfd_reloc_code_real_type code
;
2946 switch(fixp
->fx_r_type
)
2948 case BFD_RELOC_386_PLT32
:
2949 case BFD_RELOC_386_GOT32
:
2950 case BFD_RELOC_386_GOTOFF
:
2951 case BFD_RELOC_386_GOTPC
:
2952 code
= fixp
->fx_r_type
;
2955 switch (F (fixp
->fx_size
, fixp
->fx_pcrel
))
2957 MAP (1, 0, BFD_RELOC_8
);
2958 MAP (2, 0, BFD_RELOC_16
);
2959 MAP (4, 0, BFD_RELOC_32
);
2960 MAP (1, 1, BFD_RELOC_8_PCREL
);
2961 MAP (2, 1, BFD_RELOC_16_PCREL
);
2962 MAP (4, 1, BFD_RELOC_32_PCREL
);
2964 as_bad ("Can not do %d byte %srelocation", fixp
->fx_size
,
2965 fixp
->fx_pcrel
? "pc-relative " : "");
2971 if (code
== BFD_RELOC_32
2973 && fixp
->fx_addsy
== GOT_symbol
)
2974 code
= BFD_RELOC_386_GOTPC
;
2976 rel
= (arelent
*) bfd_alloc_by_size_t (stdoutput
, sizeof (arelent
));
2978 as_fatal ("Out of memory");
2979 rel
->sym_ptr_ptr
= &fixp
->fx_addsy
->bsym
;
2980 rel
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
2982 rel
->addend
= fixp
->fx_addnumber
;
2986 rel
->howto
= bfd_reloc_type_lookup (stdoutput
, code
);
2987 if (rel
->howto
== NULL
)
2989 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
2990 "Cannot represent relocation type %s",
2991 bfd_get_reloc_code_name (code
));
2992 /* Set howto to a garbage value so that we can keep going. */
2993 rel
->howto
= bfd_reloc_type_lookup (stdoutput
, BFD_RELOC_32
);
2994 assert (rel
->howto
!= NULL
);
3000 #else /* ! BFD_ASSEMBLER */
3002 #if (defined(OBJ_AOUT) | defined(OBJ_BOUT))
3004 tc_aout_fix_to_chars (where
, fixP
, segment_address_in_file
)
3007 relax_addressT segment_address_in_file
;
3010 * In: length of relocation (or of address) in chars: 1, 2 or 4.
3011 * Out: GNU LD relocation length code: 0, 1, or 2.
3014 static const unsigned char nbytes_r_length
[] = {42, 0, 1, 42, 2};
3017 know (fixP
->fx_addsy
!= NULL
);
3019 md_number_to_chars (where
,
3020 (valueT
) (fixP
->fx_frag
->fr_address
3021 + fixP
->fx_where
- segment_address_in_file
),
3024 r_symbolnum
= (S_IS_DEFINED (fixP
->fx_addsy
)
3025 ? S_GET_TYPE (fixP
->fx_addsy
)
3026 : fixP
->fx_addsy
->sy_number
);
3028 where
[6] = (r_symbolnum
>> 16) & 0x0ff;
3029 where
[5] = (r_symbolnum
>> 8) & 0x0ff;
3030 where
[4] = r_symbolnum
& 0x0ff;
3031 where
[7] = ((((!S_IS_DEFINED (fixP
->fx_addsy
)) << 3) & 0x08)
3032 | ((nbytes_r_length
[fixP
->fx_size
] << 1) & 0x06)
3033 | (((fixP
->fx_pcrel
<< 0) & 0x01) & 0x0f));
3036 #endif /* OBJ_AOUT or OBJ_BOUT */
3038 #if defined (I386COFF)
3041 tc_coff_fix2rtype (fixP
)
3044 if (fixP
->fx_r_type
== R_IMAGEBASE
)
3047 return (fixP
->fx_pcrel
?
3048 (fixP
->fx_size
== 1 ? R_PCRBYTE
:
3049 fixP
->fx_size
== 2 ? R_PCRWORD
:
3051 (fixP
->fx_size
== 1 ? R_RELBYTE
:
3052 fixP
->fx_size
== 2 ? R_RELWORD
:
3057 tc_coff_sizemachdep (frag
)
3061 return (frag
->fr_next
->fr_address
- frag
->fr_address
);
3066 #endif /* I386COFF */
3068 #endif /* BFD_ASSEMBLER? */
3072 /* Heavily plagarized from obj_elf_version. The idea is to emit the
3073 SCO specific identifier in the .notes section to satisfy the SCO
3076 This looks more complicated than it really is. As opposed to the
3077 "obvious" solution, this should handle the cross dev cases
3078 correctly. (i.e, hosting on a 64 bit big endian processor, but
3079 generating SCO Elf code) Efficiency isn't a concern, as there
3080 should be exactly one of these sections per object module.
3082 SCO OpenServer 5 identifies it's ELF modules with a standard ELF
3085 int_32 namesz = 4 ; Name size
3086 int_32 descsz = 12 ; Descriptive information
3088 char name[4] = "SCO" ; Originator name ALWAYS SCO + NULL
3089 int_32 version = (major ver # << 16) | version of tools ;
3090 int_32 source = (tool_id << 16 ) | 1 ;
3091 int_32 info = 0 ; These are set by the SCO tools, but we
3092 don't know enough about the source
3093 environment to set them. SCO ld currently
3094 ignores them, and recommends we set them
3097 #define SCO_MAJOR_VERSION 0x1
3098 #define SCO_MINOR_VERSION 0x1
3107 asection
*seg
= now_seg
;
3108 subsegT subseg
= now_subseg
;
3109 Elf_Internal_Note i_note
;
3110 Elf_External_Note e_note
;
3111 asection
*note_secp
= (asection
*) NULL
;
3114 /* create the .note section */
3116 note_secp
= subseg_new (".note", 0);
3117 bfd_set_section_flags (stdoutput
,
3119 SEC_HAS_CONTENTS
| SEC_READONLY
);
3121 /* process the version string */
3124 i_note
.descsz
= 12; /* 12 descriptive bytes */
3125 i_note
.type
= NT_VERSION
; /* Contains a version string */
3127 p
= frag_more (sizeof (i_note
.namesz
));
3128 md_number_to_chars (p
, (valueT
) i_note
.namesz
, 4);
3130 p
= frag_more (sizeof (i_note
.descsz
));
3131 md_number_to_chars (p
, (valueT
) i_note
.descsz
, 4);
3133 p
= frag_more (sizeof (i_note
.type
));
3134 md_number_to_chars (p
, (valueT
) i_note
.type
, 4);
3139 /* Note: this is the version number of the ELF we're representing */
3141 md_number_to_chars (p
, (SCO_MAJOR_VERSION
<< 16) | (SCO_MINOR_VERSION
), 4);
3143 /* Here, we pick a magic number for ourselves (yes, I "registered"
3144 it with SCO. The bottom bit shows that we are compat with the
3147 md_number_to_chars (p
, 0x4c520000 | 0x0001, 4);
3149 /* If we knew (or cared) what the source language options were, we'd
3150 fill them in here. SCO has given us permission to ignore these
3151 and just set them to zero. */
3153 md_number_to_chars (p
, 0x0000, 4);
3157 /* We probably can't restore the current segment, for there likely
3160 subseg_set (seg
, subseg
);
3163 #endif /* SCO_ELF */
3165 /* end of tc-i386.c */