1 /* i386.c -- Assemble code for the Intel 80386
2 Copyright (C) 1989, 91, 92, 93, 94, 95, 96, 97, 98, 1999
3 Free Software Foundation.
5 This file is part of GAS, the GNU Assembler.
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
23 Intel 80386 machine specific gas.
24 Written by Eliot Dresselhaus (eliot@mgm.mit.edu).
25 Bugs & suggestions are completely welcome. This is free software.
26 Please help us make it better.
33 #include "opcode/i386.h"
36 #define TC_RELOC(X,Y) (Y)
39 #ifndef REGISTER_WARNINGS
40 #define REGISTER_WARNINGS 1
43 #ifndef INFER_ADDR_PREFIX
44 #define INFER_ADDR_PREFIX 1
47 #ifndef SCALE1_WHEN_NO_INDEX
48 /* Specifying a scale factor besides 1 when there is no index is
49 futile. eg. `mov (%ebx,2),%al' does exactly the same as
50 `mov (%ebx),%al'. To slavishly follow what the programmer
51 specified, set SCALE1_WHEN_NO_INDEX to 0. */
52 #define SCALE1_WHEN_NO_INDEX 1
58 static unsigned int mode_from_disp_size
PARAMS ((unsigned int));
59 static int fits_in_signed_byte
PARAMS ((long));
60 static int fits_in_unsigned_byte
PARAMS ((long));
61 static int fits_in_unsigned_word
PARAMS ((long));
62 static int fits_in_signed_word
PARAMS ((long));
63 static int smallest_imm_type
PARAMS ((long));
64 static int add_prefix
PARAMS ((unsigned int));
65 static void set_16bit_code_flag
PARAMS ((int));
66 static void set_16bit_gcc_code_flag
PARAMS((int));
67 static void set_intel_syntax
PARAMS ((int));
70 static bfd_reloc_code_real_type reloc
71 PARAMS ((int, int, bfd_reloc_code_real_type
));
74 /* 'md_assemble ()' gathers together information and puts it into a
79 /* TM holds the template for the insn were currently assembling. */
82 /* SUFFIX holds the instruction mnemonic suffix if given.
83 (e.g. 'l' for 'movl') */
86 /* Operands are coded with OPERANDS, TYPES, DISPS, IMMS, and REGS. */
88 /* OPERANDS gives the number of given operands. */
89 unsigned int operands
;
91 /* REG_OPERANDS, DISP_OPERANDS, MEM_OPERANDS, IMM_OPERANDS give the number
92 of given register, displacement, memory operands and immediate
94 unsigned int reg_operands
, disp_operands
, mem_operands
, imm_operands
;
96 /* TYPES [i] is the type (see above #defines) which tells us how to
97 search through DISPS [i] & IMMS [i] & REGS [i] for the required
99 unsigned int types
[MAX_OPERANDS
];
101 /* Displacements (if given) for each operand. */
102 expressionS
*disps
[MAX_OPERANDS
];
104 /* Relocation type for operand */
106 enum bfd_reloc_code_real disp_reloc
[MAX_OPERANDS
];
108 int disp_reloc
[MAX_OPERANDS
];
111 /* Immediate operands (if given) for each operand. */
112 expressionS
*imms
[MAX_OPERANDS
];
114 /* Register operands (if given) for each operand. */
115 const reg_entry
*regs
[MAX_OPERANDS
];
117 /* BASE_REG, INDEX_REG, and LOG2_SCALE_FACTOR are used to encode
118 the base index byte below. */
119 const reg_entry
*base_reg
;
120 const reg_entry
*index_reg
;
121 unsigned int log2_scale_factor
;
123 /* SEG gives the seg_entries of this insn. They are zero unless
124 explicit segment overrides are given. */
125 const seg_entry
*seg
[2]; /* segments for memory operands (if given) */
127 /* PREFIX holds all the given prefix opcodes (usually null).
128 PREFIXES is the number of prefix opcodes. */
129 unsigned int prefixes
;
130 unsigned char prefix
[MAX_PREFIXES
];
132 /* RM and SIB are the modrm byte and the sib byte where the
133 addressing modes of this insn are encoded. */
139 typedef struct _i386_insn i386_insn
;
141 /* List of chars besides those in app.c:symbol_chars that can start an
142 operand. Used to prevent the scrubber eating vital white-space. */
144 const char extra_symbol_chars
[] = "*%-(@";
146 const char extra_symbol_chars
[] = "*%-(";
149 /* This array holds the chars that always start a comment. If the
150 pre-processor is disabled, these aren't very useful */
151 #if defined (TE_I386AIX) || ((defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)) && ! defined (TE_LINUX))
152 /* Putting '/' here makes it impossible to use the divide operator.
153 However, we need it for compatibility with SVR4 systems. */
154 const char comment_chars
[] = "#/";
155 #define PREFIX_SEPARATOR '\\'
157 const char comment_chars
[] = "#";
158 #define PREFIX_SEPARATOR '/'
161 /* This array holds the chars that only start a comment at the beginning of
162 a line. If the line seems to have the form '# 123 filename'
163 .line and .file directives will appear in the pre-processed output */
164 /* Note that input_file.c hand checks for '#' at the beginning of the
165 first line of the input file. This is because the compiler outputs
166 #NO_APP at the beginning of its output. */
167 /* Also note that comments started like this one will always work if
168 '/' isn't otherwise defined. */
169 #if defined (TE_I386AIX) || ((defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)) && ! defined (TE_LINUX))
170 const char line_comment_chars
[] = "";
172 const char line_comment_chars
[] = "/";
175 const char line_separator_chars
[] = "";
177 /* Chars that can be used to separate mant from exp in floating point nums */
178 const char EXP_CHARS
[] = "eE";
180 /* Chars that mean this number is a floating point constant */
183 const char FLT_CHARS
[] = "fFdDxX";
185 /* tables for lexical analysis */
186 static char mnemonic_chars
[256];
187 static char register_chars
[256];
188 static char operand_chars
[256];
189 static char identifier_chars
[256];
190 static char digit_chars
[256];
193 #define is_mnemonic_char(x) (mnemonic_chars[(unsigned char) x])
194 #define is_operand_char(x) (operand_chars[(unsigned char) x])
195 #define is_register_char(x) (register_chars[(unsigned char) x])
196 #define is_space_char(x) ((x) == ' ')
197 #define is_identifier_char(x) (identifier_chars[(unsigned char) x])
198 #define is_digit_char(x) (digit_chars[(unsigned char) x])
200 /* put here all non-digit non-letter charcters that may occur in an operand */
201 static char operand_special_chars
[] = "%$-+(,)*._~/<>|&^!:[@]";
203 /* md_assemble() always leaves the strings it's passed unaltered. To
204 effect this we maintain a stack of saved characters that we've smashed
205 with '\0's (indicating end of strings for various sub-fields of the
206 assembler instruction). */
207 static char save_stack
[32];
208 static char *save_stack_p
; /* stack pointer */
209 #define END_STRING_AND_SAVE(s) \
210 do { *save_stack_p++ = *(s); *(s) = '\0'; } while (0)
211 #define RESTORE_END_STRING(s) \
212 do { *(s) = *--save_stack_p; } while (0)
214 /* The instruction we're assembling. */
217 /* Possible templates for current insn. */
218 static const templates
*current_templates
;
220 /* Per instruction expressionS buffers: 2 displacements & 2 immediate max. */
221 static expressionS disp_expressions
[2], im_expressions
[2];
223 static int this_operand
; /* current operand we are working on */
225 static int flag_do_long_jump
; /* FIXME what does this do? */
227 static int flag_16bit_code
; /* 1 if we're writing 16-bit code, 0 if 32-bit */
229 static int intel_syntax
= 0; /* 1 for intel syntax, 0 if att syntax */
231 static int allow_naked_reg
= 0; /* 1 if register prefix % not required */
233 static char stackop_size
= '\0'; /* Used in 16 bit gcc mode to add an l
234 suffix to call, ret, enter, leave, push,
235 and pop instructions. */
237 /* Interface to relax_segment.
238 There are 2 relax states for 386 jump insns: one for conditional &
239 one for unconditional jumps. This is because these two types of
240 jumps add different sizes to frags when we're figuring out what
241 sort of jump to choose to reach a given label. */
244 #define COND_JUMP 1 /* conditional jump */
245 #define UNCOND_JUMP 2 /* unconditional jump */
249 #define SMALL16 (SMALL|CODE16)
251 #define BIG16 (BIG|CODE16)
255 #define INLINE __inline__
261 #define ENCODE_RELAX_STATE(type,size) \
262 ((relax_substateT)((type<<2) | (size)))
263 #define SIZE_FROM_RELAX_STATE(s) \
264 ( (((s) & 0x3) == BIG ? 4 : (((s) & 0x3) == BIG16 ? 2 : 1)) )
266 /* This table is used by relax_frag to promote short jumps to long
267 ones where necessary. SMALL (short) jumps may be promoted to BIG
268 (32 bit long) ones, and SMALL16 jumps to BIG16 (16 bit long). We
269 don't allow a short jump in a 32 bit code segment to be promoted to
270 a 16 bit offset jump because it's slower (requires data size
271 prefix), and doesn't work, unless the destination is in the bottom
272 64k of the code segment (The top 16 bits of eip are zeroed). */
274 const relax_typeS md_relax_table
[] =
277 1) most positive reach of this state,
278 2) most negative reach of this state,
279 3) how many bytes this mode will add to the size of the current frag
280 4) which index into the table to try if we can't fit into this one.
287 {127 + 1, -128 + 1, 0, ENCODE_RELAX_STATE (COND_JUMP
, BIG
)},
288 {127 + 1, -128 + 1, 0, ENCODE_RELAX_STATE (COND_JUMP
, BIG16
)},
289 /* dword conditionals adds 4 bytes to frag:
290 1 extra opcode byte, 3 extra displacement bytes. */
292 /* word conditionals add 2 bytes to frag:
293 1 extra opcode byte, 1 extra displacement byte. */
296 {127 + 1, -128 + 1, 0, ENCODE_RELAX_STATE (UNCOND_JUMP
, BIG
)},
297 {127 + 1, -128 + 1, 0, ENCODE_RELAX_STATE (UNCOND_JUMP
, BIG16
)},
298 /* dword jmp adds 3 bytes to frag:
299 0 extra opcode bytes, 3 extra displacement bytes. */
301 /* word jmp adds 1 byte to frag:
302 0 extra opcode bytes, 1 extra displacement byte. */
309 i386_align_code (fragP
, count
)
313 /* Various efficient no-op patterns for aligning code labels. */
314 /* Note: Don't try to assemble the instructions in the comments. */
315 /* 0L and 0w are not legal */
316 static const char f32_1
[] =
318 static const char f32_2
[] =
319 {0x89,0xf6}; /* movl %esi,%esi */
320 static const char f32_3
[] =
321 {0x8d,0x76,0x00}; /* leal 0(%esi),%esi */
322 static const char f32_4
[] =
323 {0x8d,0x74,0x26,0x00}; /* leal 0(%esi,1),%esi */
324 static const char f32_5
[] =
326 0x8d,0x74,0x26,0x00}; /* leal 0(%esi,1),%esi */
327 static const char f32_6
[] =
328 {0x8d,0xb6,0x00,0x00,0x00,0x00}; /* leal 0L(%esi),%esi */
329 static const char f32_7
[] =
330 {0x8d,0xb4,0x26,0x00,0x00,0x00,0x00}; /* leal 0L(%esi,1),%esi */
331 static const char f32_8
[] =
333 0x8d,0xb4,0x26,0x00,0x00,0x00,0x00}; /* leal 0L(%esi,1),%esi */
334 static const char f32_9
[] =
335 {0x89,0xf6, /* movl %esi,%esi */
336 0x8d,0xbc,0x27,0x00,0x00,0x00,0x00}; /* leal 0L(%edi,1),%edi */
337 static const char f32_10
[] =
338 {0x8d,0x76,0x00, /* leal 0(%esi),%esi */
339 0x8d,0xbc,0x27,0x00,0x00,0x00,0x00}; /* leal 0L(%edi,1),%edi */
340 static const char f32_11
[] =
341 {0x8d,0x74,0x26,0x00, /* leal 0(%esi,1),%esi */
342 0x8d,0xbc,0x27,0x00,0x00,0x00,0x00}; /* leal 0L(%edi,1),%edi */
343 static const char f32_12
[] =
344 {0x8d,0xb6,0x00,0x00,0x00,0x00, /* leal 0L(%esi),%esi */
345 0x8d,0xbf,0x00,0x00,0x00,0x00}; /* leal 0L(%edi),%edi */
346 static const char f32_13
[] =
347 {0x8d,0xb6,0x00,0x00,0x00,0x00, /* leal 0L(%esi),%esi */
348 0x8d,0xbc,0x27,0x00,0x00,0x00,0x00}; /* leal 0L(%edi,1),%edi */
349 static const char f32_14
[] =
350 {0x8d,0xb4,0x26,0x00,0x00,0x00,0x00, /* leal 0L(%esi,1),%esi */
351 0x8d,0xbc,0x27,0x00,0x00,0x00,0x00}; /* leal 0L(%edi,1),%edi */
352 static const char f32_15
[] =
353 {0xeb,0x0d,0x90,0x90,0x90,0x90,0x90, /* jmp .+15; lotsa nops */
354 0x90,0x90,0x90,0x90,0x90,0x90,0x90,0x90};
355 static const char f16_3
[] =
356 {0x8d,0x74,0x00}; /* lea 0(%esi),%esi */
357 static const char f16_4
[] =
358 {0x8d,0xb4,0x00,0x00}; /* lea 0w(%si),%si */
359 static const char f16_5
[] =
361 0x8d,0xb4,0x00,0x00}; /* lea 0w(%si),%si */
362 static const char f16_6
[] =
363 {0x89,0xf6, /* mov %si,%si */
364 0x8d,0xbd,0x00,0x00}; /* lea 0w(%di),%di */
365 static const char f16_7
[] =
366 {0x8d,0x74,0x00, /* lea 0(%si),%si */
367 0x8d,0xbd,0x00,0x00}; /* lea 0w(%di),%di */
368 static const char f16_8
[] =
369 {0x8d,0xb4,0x00,0x00, /* lea 0w(%si),%si */
370 0x8d,0xbd,0x00,0x00}; /* lea 0w(%di),%di */
371 static const char *const f32_patt
[] = {
372 f32_1
, f32_2
, f32_3
, f32_4
, f32_5
, f32_6
, f32_7
, f32_8
,
373 f32_9
, f32_10
, f32_11
, f32_12
, f32_13
, f32_14
, f32_15
375 static const char *const f16_patt
[] = {
376 f32_1
, f32_2
, f16_3
, f16_4
, f16_5
, f16_6
, f16_7
, f16_8
,
377 f32_15
, f32_15
, f32_15
, f32_15
, f32_15
, f32_15
, f32_15
380 if (count
> 0 && count
<= 15)
384 memcpy(fragP
->fr_literal
+ fragP
->fr_fix
,
385 f16_patt
[count
- 1], count
);
386 if (count
> 8) /* adjust jump offset */
387 fragP
->fr_literal
[fragP
->fr_fix
+ 1] = count
- 2;
390 memcpy(fragP
->fr_literal
+ fragP
->fr_fix
,
391 f32_patt
[count
- 1], count
);
392 fragP
->fr_var
= count
;
396 static char *output_invalid
PARAMS ((int c
));
397 static int i386_operand
PARAMS ((char *operand_string
));
398 static int i386_intel_operand
PARAMS ((char *operand_string
, int got_a_float
));
399 static const reg_entry
*parse_register
PARAMS ((char *reg_string
,
403 static void s_bss
PARAMS ((int));
406 symbolS
*GOT_symbol
; /* Pre-defined "_GLOBAL_OFFSET_TABLE_" */
408 static INLINE
unsigned int
409 mode_from_disp_size (t
)
412 return (t
& Disp8
) ? 1 : (t
& (Disp16
|Disp32
)) ? 2 : 0;
416 fits_in_signed_byte (num
)
419 return (num
>= -128) && (num
<= 127);
420 } /* fits_in_signed_byte() */
423 fits_in_unsigned_byte (num
)
426 return (num
& 0xff) == num
;
427 } /* fits_in_unsigned_byte() */
430 fits_in_unsigned_word (num
)
433 return (num
& 0xffff) == num
;
434 } /* fits_in_unsigned_word() */
437 fits_in_signed_word (num
)
440 return (-32768 <= num
) && (num
<= 32767);
441 } /* fits_in_signed_word() */
444 smallest_imm_type (num
)
448 /* This code is disabled because all the Imm1 forms in the opcode table
449 are slower on the i486, and they're the versions with the implicitly
450 specified single-position displacement, which has another syntax if
451 you really want to use that form. If you really prefer to have the
452 one-byte-shorter Imm1 form despite these problems, re-enable this
455 return Imm1
| Imm8
| Imm8S
| Imm16
| Imm32
;
457 return (fits_in_signed_byte (num
)
458 ? (Imm8S
| Imm8
| Imm16
| Imm32
)
459 : fits_in_unsigned_byte (num
)
460 ? (Imm8
| Imm16
| Imm32
)
461 : (fits_in_signed_word (num
) || fits_in_unsigned_word (num
))
464 } /* smallest_imm_type() */
466 /* Returns 0 if attempting to add a prefix where one from the same
467 class already exists, 1 if non rep/repne added, 2 if rep/repne
481 case CS_PREFIX_OPCODE
:
482 case DS_PREFIX_OPCODE
:
483 case ES_PREFIX_OPCODE
:
484 case FS_PREFIX_OPCODE
:
485 case GS_PREFIX_OPCODE
:
486 case SS_PREFIX_OPCODE
:
490 case REPNE_PREFIX_OPCODE
:
491 case REPE_PREFIX_OPCODE
:
494 case LOCK_PREFIX_OPCODE
:
502 case ADDR_PREFIX_OPCODE
:
506 case DATA_PREFIX_OPCODE
:
513 as_bad (_("same type of prefix used twice"));
518 i
.prefix
[q
] = prefix
;
523 set_16bit_code_flag (new_16bit_code_flag
)
524 int new_16bit_code_flag
;
526 flag_16bit_code
= new_16bit_code_flag
;
531 set_16bit_gcc_code_flag (new_16bit_code_flag
)
532 int new_16bit_code_flag
;
534 flag_16bit_code
= new_16bit_code_flag
;
535 stackop_size
= new_16bit_code_flag
? 'l' : '\0';
539 set_intel_syntax (syntax_flag
)
542 /* Find out if register prefixing is specified. */
543 int ask_naked_reg
= 0;
546 if (! is_end_of_line
[(unsigned char) *input_line_pointer
])
548 char *string
= input_line_pointer
;
549 int e
= get_symbol_end ();
551 if (strcmp(string
, "prefix") == 0)
553 else if (strcmp(string
, "noprefix") == 0)
556 as_bad (_("Bad argument to syntax directive."));
557 *input_line_pointer
= e
;
559 demand_empty_rest_of_line ();
561 intel_syntax
= syntax_flag
;
563 if (ask_naked_reg
== 0)
566 allow_naked_reg
= (intel_syntax
567 && (bfd_get_symbol_leading_char (stdoutput
) != '\0'));
569 allow_naked_reg
= 0; /* conservative default */
573 allow_naked_reg
= (ask_naked_reg
< 0);
576 const pseudo_typeS md_pseudo_table
[] =
581 #if !defined(OBJ_AOUT) && !defined(USE_ALIGN_PTWO)
582 {"align", s_align_bytes
, 0},
584 {"align", s_align_ptwo
, 0},
586 {"ffloat", float_cons
, 'f'},
587 {"dfloat", float_cons
, 'd'},
588 {"tfloat", float_cons
, 'x'},
590 {"noopt", s_ignore
, 0},
591 {"optim", s_ignore
, 0},
592 {"code16gcc", set_16bit_gcc_code_flag
, 1},
593 {"code16", set_16bit_code_flag
, 1},
594 {"code32", set_16bit_code_flag
, 0},
595 {"intel_syntax", set_intel_syntax
, 1},
596 {"att_syntax", set_intel_syntax
, 0},
600 /* for interface with expression () */
601 extern char *input_line_pointer
;
603 /* hash table for instruction mnemonic lookup */
604 static struct hash_control
*op_hash
;
605 /* hash table for register lookup */
606 static struct hash_control
*reg_hash
;
612 const char *hash_err
;
614 /* initialize op_hash hash table */
615 op_hash
= hash_new ();
618 register const template *optab
;
619 register templates
*core_optab
;
621 optab
= i386_optab
; /* setup for loop */
622 core_optab
= (templates
*) xmalloc (sizeof (templates
));
623 core_optab
->start
= optab
;
628 if (optab
->name
== NULL
629 || strcmp (optab
->name
, (optab
- 1)->name
) != 0)
631 /* different name --> ship out current template list;
632 add to hash table; & begin anew */
633 core_optab
->end
= optab
;
634 hash_err
= hash_insert (op_hash
,
640 as_fatal (_("Internal Error: Can't hash %s: %s"),
644 if (optab
->name
== NULL
)
646 core_optab
= (templates
*) xmalloc (sizeof (templates
));
647 core_optab
->start
= optab
;
652 /* initialize reg_hash hash table */
653 reg_hash
= hash_new ();
655 register const reg_entry
*regtab
;
657 for (regtab
= i386_regtab
;
658 regtab
< i386_regtab
+ sizeof (i386_regtab
) / sizeof (i386_regtab
[0]);
661 hash_err
= hash_insert (reg_hash
, regtab
->reg_name
, (PTR
) regtab
);
667 /* fill in lexical tables: mnemonic_chars, operand_chars. */
672 for (c
= 0; c
< 256; c
++)
677 mnemonic_chars
[c
] = c
;
678 register_chars
[c
] = c
;
679 operand_chars
[c
] = c
;
681 else if (islower (c
))
683 mnemonic_chars
[c
] = c
;
684 register_chars
[c
] = c
;
685 operand_chars
[c
] = c
;
687 else if (isupper (c
))
689 mnemonic_chars
[c
] = tolower (c
);
690 register_chars
[c
] = mnemonic_chars
[c
];
691 operand_chars
[c
] = c
;
694 if (isalpha (c
) || isdigit (c
))
695 identifier_chars
[c
] = c
;
698 identifier_chars
[c
] = c
;
699 operand_chars
[c
] = c
;
704 identifier_chars
['@'] = '@';
706 digit_chars
['-'] = '-';
707 identifier_chars
['_'] = '_';
708 identifier_chars
['.'] = '.';
710 for (p
= operand_special_chars
; *p
!= '\0'; p
++)
711 operand_chars
[(unsigned char) *p
] = *p
;
714 #if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
715 if (OUTPUT_FLAVOR
== bfd_target_elf_flavour
)
717 record_alignment (text_section
, 2);
718 record_alignment (data_section
, 2);
719 record_alignment (bss_section
, 2);
725 i386_print_statistics (file
)
728 hash_print_statistics (file
, "i386 opcode", op_hash
);
729 hash_print_statistics (file
, "i386 register", reg_hash
);
735 /* debugging routines for md_assemble */
736 static void pi
PARAMS ((char *, i386_insn
*));
737 static void pte
PARAMS ((template *));
738 static void pt
PARAMS ((unsigned int));
739 static void pe
PARAMS ((expressionS
*));
740 static void ps
PARAMS ((symbolS
*));
747 register template *p
;
750 fprintf (stdout
, "%s: template ", line
);
752 fprintf (stdout
, " modrm: mode %x reg %x reg/mem %x",
753 x
->rm
.mode
, x
->rm
.reg
, x
->rm
.regmem
);
754 fprintf (stdout
, " base %x index %x scale %x\n",
755 x
->bi
.base
, x
->bi
.index
, x
->bi
.scale
);
756 for (i
= 0; i
< x
->operands
; i
++)
758 fprintf (stdout
, " #%d: ", i
+ 1);
760 fprintf (stdout
, "\n");
762 & (Reg
| SReg2
| SReg3
| Control
| Debug
| Test
| RegMMX
| RegXMM
))
763 fprintf (stdout
, "%s\n", x
->regs
[i
]->reg_name
);
764 if (x
->types
[i
] & Imm
)
766 if (x
->types
[i
] & Disp
)
776 fprintf (stdout
, " %d operands ", t
->operands
);
777 fprintf (stdout
, "opcode %x ",
779 if (t
->extension_opcode
!= None
)
780 fprintf (stdout
, "ext %x ", t
->extension_opcode
);
781 if (t
->opcode_modifier
& D
)
782 fprintf (stdout
, "D");
783 if (t
->opcode_modifier
& W
)
784 fprintf (stdout
, "W");
785 fprintf (stdout
, "\n");
786 for (i
= 0; i
< t
->operands
; i
++)
788 fprintf (stdout
, " #%d type ", i
+ 1);
789 pt (t
->operand_types
[i
]);
790 fprintf (stdout
, "\n");
798 fprintf (stdout
, " operation %d\n", e
->X_op
);
799 fprintf (stdout
, " add_number %ld (%lx)\n",
800 (long) e
->X_add_number
, (long) e
->X_add_number
);
803 fprintf (stdout
, " add_symbol ");
804 ps (e
->X_add_symbol
);
805 fprintf (stdout
, "\n");
809 fprintf (stdout
, " op_symbol ");
811 fprintf (stdout
, "\n");
819 fprintf (stdout
, "%s type %s%s",
821 S_IS_EXTERNAL (s
) ? "EXTERNAL " : "",
822 segment_name (S_GET_SEGMENT (s
)));
841 { BaseIndex
, "BaseIndex" },
845 { InOutPortReg
, "InOutPortReg" },
846 { ShiftCount
, "ShiftCount" },
847 { Control
, "control reg" },
848 { Test
, "test reg" },
849 { Debug
, "debug reg" },
850 { FloatReg
, "FReg" },
851 { FloatAcc
, "FAcc" },
855 { JumpAbsolute
, "Jump Absolute" },
866 register struct type_name
*ty
;
870 fprintf (stdout
, _("Unknown"));
874 for (ty
= type_names
; ty
->mask
; ty
++)
876 fprintf (stdout
, "%s, ", ty
->tname
);
881 #endif /* DEBUG386 */
884 tc_i386_force_relocation (fixp
)
888 if (fixp
->fx_r_type
== BFD_RELOC_VTABLE_INHERIT
889 || fixp
->fx_r_type
== BFD_RELOC_VTABLE_ENTRY
)
894 return fixp
->fx_r_type
==7;
899 static bfd_reloc_code_real_type reloc
900 PARAMS ((int, int, bfd_reloc_code_real_type
));
902 static bfd_reloc_code_real_type
903 reloc (size
, pcrel
, other
)
906 bfd_reloc_code_real_type other
;
908 if (other
!= NO_RELOC
) return other
;
914 case 1: return BFD_RELOC_8_PCREL
;
915 case 2: return BFD_RELOC_16_PCREL
;
916 case 4: return BFD_RELOC_32_PCREL
;
918 as_bad (_("Can not do %d byte pc-relative relocation"), size
);
924 case 1: return BFD_RELOC_8
;
925 case 2: return BFD_RELOC_16
;
926 case 4: return BFD_RELOC_32
;
928 as_bad (_("Can not do %d byte relocation"), size
);
931 return BFD_RELOC_NONE
;
935 * Here we decide which fixups can be adjusted to make them relative to
936 * the beginning of the section instead of the symbol. Basically we need
937 * to make sure that the dynamic relocations are done correctly, so in
938 * some cases we force the original symbol to be used.
941 tc_i386_fix_adjustable (fixP
)
944 #if defined (OBJ_ELF) || defined (TE_PE)
945 /* Prevent all adjustments to global symbols, or else dynamic
946 linking will not work correctly. */
947 if (S_IS_EXTERN (fixP
->fx_addsy
))
949 if (S_IS_WEAK (fixP
->fx_addsy
))
952 /* adjust_reloc_syms doesn't know about the GOT */
953 if (fixP
->fx_r_type
== BFD_RELOC_386_GOTOFF
954 || fixP
->fx_r_type
== BFD_RELOC_386_PLT32
955 || fixP
->fx_r_type
== BFD_RELOC_386_GOT32
956 || fixP
->fx_r_type
== BFD_RELOC_RVA
957 || fixP
->fx_r_type
== BFD_RELOC_VTABLE_INHERIT
958 || fixP
->fx_r_type
== BFD_RELOC_VTABLE_ENTRY
)
963 #define reloc(SIZE,PCREL,OTHER) 0
964 #define BFD_RELOC_16 0
965 #define BFD_RELOC_32 0
966 #define BFD_RELOC_16_PCREL 0
967 #define BFD_RELOC_32_PCREL 0
968 #define BFD_RELOC_386_PLT32 0
969 #define BFD_RELOC_386_GOT32 0
970 #define BFD_RELOC_386_GOTOFF 0
974 intel_float_operand
PARAMS ((char *mnemonic
));
977 intel_float_operand (mnemonic
)
980 if (mnemonic
[0] == 'f' && mnemonic
[1] =='i')
983 if (mnemonic
[0] == 'f')
989 /* This is the guts of the machine-dependent assembler. LINE points to a
990 machine dependent instruction. This function is supposed to emit
991 the frags/bytes it assembles to. */
997 /* Points to template once we've found it. */
1000 /* Count the size of the instruction generated. */
1005 char mnemonic
[MAX_MNEM_SIZE
];
1007 /* Initialize globals. */
1008 memset (&i
, '\0', sizeof (i
));
1009 for (j
= 0; j
< MAX_OPERANDS
; j
++)
1010 i
.disp_reloc
[j
] = NO_RELOC
;
1011 memset (disp_expressions
, '\0', sizeof (disp_expressions
));
1012 memset (im_expressions
, '\0', sizeof (im_expressions
));
1013 save_stack_p
= save_stack
; /* reset stack pointer */
1015 /* First parse an instruction mnemonic & call i386_operand for the operands.
1016 We assume that the scrubber has arranged it so that line[0] is the valid
1017 start of a (possibly prefixed) mnemonic. */
1020 char *token_start
= l
;
1023 /* Non-zero if we found a prefix only acceptable with string insns. */
1024 const char *expecting_string_instruction
= NULL
;
1029 while ((*mnem_p
= mnemonic_chars
[(unsigned char) *l
]) != 0)
1032 if (mnem_p
>= mnemonic
+ sizeof (mnemonic
))
1034 as_bad (_("no such 386 instruction: `%s'"), token_start
);
1039 if (!is_space_char (*l
)
1040 && *l
!= END_OF_INSN
1041 && *l
!= PREFIX_SEPARATOR
)
1043 as_bad (_("invalid character %s in mnemonic"),
1044 output_invalid (*l
));
1047 if (token_start
== l
)
1049 if (*l
== PREFIX_SEPARATOR
)
1050 as_bad (_("expecting prefix; got nothing"));
1052 as_bad (_("expecting mnemonic; got nothing"));
1056 /* Look up instruction (or prefix) via hash table. */
1057 current_templates
= hash_find (op_hash
, mnemonic
);
1059 if (*l
!= END_OF_INSN
1060 && (! is_space_char (*l
) || l
[1] != END_OF_INSN
)
1061 && current_templates
1062 && (current_templates
->start
->opcode_modifier
& IsPrefix
))
1064 /* If we are in 16-bit mode, do not allow addr16 or data16.
1065 Similarly, in 32-bit mode, do not allow addr32 or data32. */
1066 if ((current_templates
->start
->opcode_modifier
& (Size16
| Size32
))
1067 && (((current_templates
->start
->opcode_modifier
& Size32
) != 0)
1070 as_bad (_("redundant %s prefix"),
1071 current_templates
->start
->name
);
1074 /* Add prefix, checking for repeated prefixes. */
1075 switch (add_prefix (current_templates
->start
->base_opcode
))
1080 expecting_string_instruction
=
1081 current_templates
->start
->name
;
1084 /* Skip past PREFIX_SEPARATOR and reset token_start. */
1091 if (!current_templates
)
1093 /* See if we can get a match by trimming off a suffix. */
1096 case DWORD_MNEM_SUFFIX
:
1097 case WORD_MNEM_SUFFIX
:
1098 case BYTE_MNEM_SUFFIX
:
1099 case SHORT_MNEM_SUFFIX
:
1100 #if LONG_MNEM_SUFFIX != DWORD_MNEM_SUFFIX
1101 case LONG_MNEM_SUFFIX
:
1103 i
.suffix
= mnem_p
[-1];
1105 current_templates
= hash_find (op_hash
, mnemonic
);
1109 case INTEL_DWORD_MNEM_SUFFIX
:
1112 i
.suffix
= mnem_p
[-1];
1114 current_templates
= hash_find (op_hash
, mnemonic
);
1118 if (!current_templates
)
1120 as_bad (_("no such 386 instruction: `%s'"), token_start
);
1125 /* check for rep/repne without a string instruction */
1126 if (expecting_string_instruction
1127 && !(current_templates
->start
->opcode_modifier
& IsString
))
1129 as_bad (_("expecting string instruction after `%s'"),
1130 expecting_string_instruction
);
1134 /* There may be operands to parse. */
1135 if (*l
!= END_OF_INSN
)
1137 /* parse operands */
1139 /* 1 if operand is pending after ','. */
1140 unsigned int expecting_operand
= 0;
1142 /* Non-zero if operand parens not balanced. */
1143 unsigned int paren_not_balanced
;
1147 /* skip optional white space before operand */
1148 if (is_space_char (*l
))
1150 if (!is_operand_char (*l
) && *l
!= END_OF_INSN
)
1152 as_bad (_("invalid character %s before operand %d"),
1153 output_invalid (*l
),
1157 token_start
= l
; /* after white space */
1158 paren_not_balanced
= 0;
1159 while (paren_not_balanced
|| *l
!= ',')
1161 if (*l
== END_OF_INSN
)
1163 if (paren_not_balanced
)
1166 as_bad (_("unbalanced parenthesis in operand %d."),
1169 as_bad (_("unbalanced brackets in operand %d."),
1174 break; /* we are done */
1176 else if (!is_operand_char (*l
) && !is_space_char (*l
))
1178 as_bad (_("invalid character %s in operand %d"),
1179 output_invalid (*l
),
1186 ++paren_not_balanced
;
1188 --paren_not_balanced
;
1193 ++paren_not_balanced
;
1195 --paren_not_balanced
;
1199 if (l
!= token_start
)
1200 { /* yes, we've read in another operand */
1201 unsigned int operand_ok
;
1202 this_operand
= i
.operands
++;
1203 if (i
.operands
> MAX_OPERANDS
)
1205 as_bad (_("spurious operands; (%d operands/instruction max)"),
1209 /* now parse operand adding info to 'i' as we go along */
1210 END_STRING_AND_SAVE (l
);
1213 operand_ok
= i386_intel_operand (token_start
, intel_float_operand (mnemonic
));
1215 operand_ok
= i386_operand (token_start
);
1217 RESTORE_END_STRING (l
); /* restore old contents */
1223 if (expecting_operand
)
1225 expecting_operand_after_comma
:
1226 as_bad (_("expecting operand after ','; got nothing"));
1231 as_bad (_("expecting operand before ','; got nothing"));
1236 /* now *l must be either ',' or END_OF_INSN */
1239 if (*++l
== END_OF_INSN
)
1240 { /* just skip it, if it's \n complain */
1241 goto expecting_operand_after_comma
;
1243 expecting_operand
= 1;
1246 while (*l
!= END_OF_INSN
); /* until we get end of insn */
1250 /* Now we've parsed the mnemonic into a set of templates, and have the
1253 Next, we find a template that matches the given insn,
1254 making sure the overlap of the given operands types is consistent
1255 with the template operand types. */
1257 #define MATCH(overlap, given, template) \
1259 && ((given) & BaseIndex) == ((overlap) & BaseIndex) \
1260 && ((given) & JumpAbsolute) == ((template) & JumpAbsolute))
1262 /* If given types r0 and r1 are registers they must be of the same type
1263 unless the expected operand type register overlap is null.
1264 Note that Acc in a template matches every size of reg. */
1265 #define CONSISTENT_REGISTER_MATCH(m0, g0, t0, m1, g1, t1) \
1266 ( ((g0) & Reg) == 0 || ((g1) & Reg) == 0 || \
1267 ((g0) & Reg) == ((g1) & Reg) || \
1268 ((((m0) & Acc) ? Reg : (t0)) & (((m1) & Acc) ? Reg : (t1)) & Reg) == 0 )
1271 register unsigned int overlap0
, overlap1
;
1272 unsigned int overlap2
;
1273 unsigned int found_reverse_match
;
1276 /* All intel opcodes have reversed operands except for BOUND and ENTER */
1278 && (strcmp (mnemonic
, "enter") != 0)
1279 && (strcmp (mnemonic
, "bound") != 0)
1280 && (strncmp (mnemonic
, "fsub", 4) !=0)
1281 && (strncmp (mnemonic
, "fdiv", 4) !=0))
1283 const reg_entry
*temp_reg
= NULL
;
1284 expressionS
*temp_disp
= NULL
;
1285 expressionS
*temp_imm
= NULL
;
1286 unsigned int temp_type
;
1290 if (i
.operands
== 2)
1295 else if (i
.operands
== 3)
1303 temp_type
= i
.types
[xchg2
];
1304 if (temp_type
& (Reg
| FloatReg
))
1305 temp_reg
= i
.regs
[xchg2
];
1306 else if (temp_type
& Imm
)
1307 temp_imm
= i
.imms
[xchg2
];
1308 else if (temp_type
& Disp
)
1309 temp_disp
= i
.disps
[xchg2
];
1311 i
.types
[xchg2
] = i
.types
[xchg1
];
1313 if (i
.types
[xchg1
] & (Reg
| FloatReg
))
1315 i
.regs
[xchg2
] = i
.regs
[xchg1
];
1316 i
.regs
[xchg1
] = NULL
;
1318 else if (i
.types
[xchg2
] & Imm
)
1320 i
.imms
[xchg2
] = i
.imms
[xchg1
];
1321 i
.imms
[xchg1
] = NULL
;
1323 else if (i
.types
[xchg2
] & Disp
)
1325 i
.disps
[xchg2
] = i
.disps
[xchg1
];
1326 i
.disps
[xchg1
] = NULL
;
1329 if (temp_type
& (Reg
| FloatReg
))
1331 i
.regs
[xchg1
] = temp_reg
;
1332 if (! (i
.types
[xchg1
] & (Reg
| FloatReg
)))
1333 i
.regs
[xchg2
] = NULL
;
1335 else if (temp_type
& Imm
)
1337 i
.imms
[xchg1
] = temp_imm
;
1338 if (! (i
.types
[xchg1
] & Imm
))
1339 i
.imms
[xchg2
] = NULL
;
1341 else if (temp_type
& Disp
)
1343 i
.disps
[xchg1
] = temp_disp
;
1344 if (! (i
.types
[xchg1
] & Disp
))
1345 i
.disps
[xchg2
] = NULL
;
1348 i
.types
[xchg1
] = temp_type
;
1350 if (!strcmp(mnemonic
,"jmp")
1351 || !strcmp (mnemonic
, "call"))
1352 if ((i
.types
[0] & Reg
) || i
.types
[0] & BaseIndex
)
1353 i
.types
[0] |= JumpAbsolute
;
1359 found_reverse_match
= 0;
1360 suffix_check
= (i
.suffix
== BYTE_MNEM_SUFFIX
1362 : (i
.suffix
== WORD_MNEM_SUFFIX
1364 : (i
.suffix
== SHORT_MNEM_SUFFIX
1366 : (i
.suffix
== LONG_MNEM_SUFFIX
1368 : (i
.suffix
== INTEL_DWORD_MNEM_SUFFIX
1370 : (i
.suffix
== LONG_DOUBLE_MNEM_SUFFIX
? No_xSuf
: 0))))));
1372 for (t
= current_templates
->start
;
1373 t
< current_templates
->end
;
1376 /* Must have right number of operands. */
1377 if (i
.operands
!= t
->operands
)
1380 /* For some opcodes, don't check the suffix */
1383 if (strcmp (t
->name
, "fnstcw")
1384 && strcmp (t
->name
, "fldcw")
1385 && (t
->opcode_modifier
& suffix_check
))
1388 /* Must not have disallowed suffix. */
1389 else if ((t
->opcode_modifier
& suffix_check
))
1392 else if (!t
->operands
)
1393 break; /* 0 operands always matches */
1395 overlap0
= i
.types
[0] & t
->operand_types
[0];
1396 switch (t
->operands
)
1399 if (!MATCH (overlap0
, i
.types
[0], t
->operand_types
[0]))
1404 overlap1
= i
.types
[1] & t
->operand_types
[1];
1405 if (!MATCH (overlap0
, i
.types
[0], t
->operand_types
[0])
1406 || !MATCH (overlap1
, i
.types
[1], t
->operand_types
[1])
1407 || !CONSISTENT_REGISTER_MATCH (overlap0
, i
.types
[0],
1408 t
->operand_types
[0],
1409 overlap1
, i
.types
[1],
1410 t
->operand_types
[1]))
1413 /* check if other direction is valid ... */
1414 if ((t
->opcode_modifier
& (D
|FloatD
)) == 0)
1417 /* try reversing direction of operands */
1418 overlap0
= i
.types
[0] & t
->operand_types
[1];
1419 overlap1
= i
.types
[1] & t
->operand_types
[0];
1420 if (!MATCH (overlap0
, i
.types
[0], t
->operand_types
[1])
1421 || !MATCH (overlap1
, i
.types
[1], t
->operand_types
[0])
1422 || !CONSISTENT_REGISTER_MATCH (overlap0
, i
.types
[0],
1423 t
->operand_types
[1],
1424 overlap1
, i
.types
[1],
1425 t
->operand_types
[0]))
1427 /* does not match either direction */
1430 /* found_reverse_match holds which of D or FloatDR
1432 found_reverse_match
= t
->opcode_modifier
& (D
|FloatDR
);
1435 /* found a forward 2 operand match here */
1436 if (t
->operands
== 3)
1438 /* Here we make use of the fact that there are no
1439 reverse match 3 operand instructions, and all 3
1440 operand instructions only need to be checked for
1441 register consistency between operands 2 and 3. */
1442 overlap2
= i
.types
[2] & t
->operand_types
[2];
1443 if (!MATCH (overlap2
, i
.types
[2], t
->operand_types
[2])
1444 || !CONSISTENT_REGISTER_MATCH (overlap1
, i
.types
[1],
1445 t
->operand_types
[1],
1446 overlap2
, i
.types
[2],
1447 t
->operand_types
[2]))
1451 /* found either forward/reverse 2 or 3 operand match here:
1452 slip through to break */
1454 break; /* we've found a match; break out of loop */
1455 } /* for (t = ... */
1456 if (t
== current_templates
->end
)
1457 { /* we found no match */
1458 as_bad (_("suffix or operands invalid for `%s'"),
1459 current_templates
->start
->name
);
1463 if ((t
->opcode_modifier
& (IsPrefix
|IgnoreSize
)) == (IsPrefix
|IgnoreSize
))
1465 /* Warn them that a data or address size prefix doesn't affect
1466 assembly of the next line of code. */
1467 as_warn (_("stand-alone `%s' prefix"), t
->name
);
1470 /* Copy the template we found. */
1472 if (found_reverse_match
)
1474 i
.tm
.operand_types
[0] = t
->operand_types
[1];
1475 i
.tm
.operand_types
[1] = t
->operand_types
[0];
1479 if (i
.tm
.opcode_modifier
& FWait
)
1480 if (! add_prefix (FWAIT_OPCODE
))
1483 /* Check string instruction segment overrides */
1484 if ((i
.tm
.opcode_modifier
& IsString
) != 0 && i
.mem_operands
!= 0)
1486 int mem_op
= (i
.types
[0] & AnyMem
) ? 0 : 1;
1487 if ((i
.tm
.operand_types
[mem_op
] & EsSeg
) != 0)
1489 if (i
.seg
[0] != NULL
&& i
.seg
[0] != &es
)
1491 as_bad (_("`%s' operand %d must use `%%es' segment"),
1496 /* There's only ever one segment override allowed per instruction.
1497 This instruction possibly has a legal segment override on the
1498 second operand, so copy the segment to where non-string
1499 instructions store it, allowing common code. */
1500 i
.seg
[0] = i
.seg
[1];
1502 else if ((i
.tm
.operand_types
[mem_op
+ 1] & EsSeg
) != 0)
1504 if (i
.seg
[1] != NULL
&& i
.seg
[1] != &es
)
1506 as_bad (_("`%s' operand %d must use `%%es' segment"),
1514 /* If matched instruction specifies an explicit instruction mnemonic
1516 if (i
.tm
.opcode_modifier
& (Size16
| Size32
))
1518 if (i
.tm
.opcode_modifier
& Size16
)
1519 i
.suffix
= WORD_MNEM_SUFFIX
;
1521 i
.suffix
= DWORD_MNEM_SUFFIX
;
1523 else if (i
.reg_operands
)
1525 /* If there's no instruction mnemonic suffix we try to invent one
1526 based on register operands. */
1529 /* We take i.suffix from the last register operand specified,
1530 Destination register type is more significant than source
1533 for (op
= i
.operands
; --op
>= 0; )
1534 if (i
.types
[op
] & Reg
)
1536 i
.suffix
= ((i
.types
[op
] & Reg8
) ? BYTE_MNEM_SUFFIX
:
1537 (i
.types
[op
] & Reg16
) ? WORD_MNEM_SUFFIX
:
1542 else if (i
.suffix
== BYTE_MNEM_SUFFIX
)
1545 for (op
= i
.operands
; --op
>= 0; )
1547 /* If this is an eight bit register, it's OK. If it's
1548 the 16 or 32 bit version of an eight bit register,
1549 we will just use the low portion, and that's OK too. */
1550 if (i
.types
[op
] & Reg8
)
1553 /* movzx and movsx should not generate this warning. */
1555 && (i
.tm
.base_opcode
== 0xfb7
1556 || i
.tm
.base_opcode
== 0xfb6
1557 || i
.tm
.base_opcode
== 0xfbe
1558 || i
.tm
.base_opcode
== 0xfbf))
1561 if ((i
.types
[op
] & WordReg
) && i
.regs
[op
]->reg_num
< 4
1563 /* Check that the template allows eight bit regs
1564 This kills insns such as `orb $1,%edx', which
1565 maybe should be allowed. */
1566 && (i
.tm
.operand_types
[op
] & (Reg8
|InOutPortReg
))
1570 #if REGISTER_WARNINGS
1571 if ((i
.tm
.operand_types
[op
] & InOutPortReg
) == 0)
1572 as_warn (_("using `%%%s' instead of `%%%s' due to `%c' suffix"),
1573 (i
.regs
[op
] - (i
.types
[op
] & Reg16
? 8 : 16))->reg_name
,
1574 i
.regs
[op
]->reg_name
,
1579 /* Any other register is bad */
1580 if (i
.types
[op
] & (Reg
| RegMMX
| RegXMM
1582 | Control
| Debug
| Test
1583 | FloatReg
| FloatAcc
))
1585 as_bad (_("`%%%s' not allowed with `%s%c'"),
1586 i
.regs
[op
]->reg_name
,
1593 else if (i
.suffix
== DWORD_MNEM_SUFFIX
)
1596 for (op
= i
.operands
; --op
>= 0; )
1597 /* Reject eight bit registers, except where the template
1598 requires them. (eg. movzb) */
1599 if ((i
.types
[op
] & Reg8
) != 0
1600 && (i
.tm
.operand_types
[op
] & (Reg16
|Reg32
|Acc
)) != 0)
1602 as_bad (_("`%%%s' not allowed with `%s%c'"),
1603 i
.regs
[op
]->reg_name
,
1608 #if REGISTER_WARNINGS
1609 /* Warn if the e prefix on a general reg is missing. */
1610 else if ((i
.types
[op
] & Reg16
) != 0
1611 && (i
.tm
.operand_types
[op
] & (Reg32
|Acc
)) != 0)
1613 as_warn (_("using `%%%s' instead of `%%%s' due to `%c' suffix"),
1614 (i
.regs
[op
] + 8)->reg_name
,
1615 i
.regs
[op
]->reg_name
,
1620 else if (i
.suffix
== WORD_MNEM_SUFFIX
)
1623 for (op
= i
.operands
; --op
>= 0; )
1624 /* Reject eight bit registers, except where the template
1625 requires them. (eg. movzb) */
1626 if ((i
.types
[op
] & Reg8
) != 0
1627 && (i
.tm
.operand_types
[op
] & (Reg16
|Reg32
|Acc
)) != 0)
1629 as_bad (_("`%%%s' not allowed with `%s%c'"),
1630 i
.regs
[op
]->reg_name
,
1635 #if REGISTER_WARNINGS
1636 /* Warn if the e prefix on a general reg is present. */
1637 else if ((i
.types
[op
] & Reg32
) != 0
1638 && (i
.tm
.operand_types
[op
] & (Reg16
|Acc
)) != 0)
1640 as_warn (_("using `%%%s' instead of `%%%s' due to `%c' suffix"),
1641 (i
.regs
[op
] - 8)->reg_name
,
1642 i
.regs
[op
]->reg_name
,
1650 else if ((i
.tm
.opcode_modifier
& DefaultSize
) && !i
.suffix
)
1652 i
.suffix
= stackop_size
;
1655 /* Make still unresolved immediate matches conform to size of immediate
1656 given in i.suffix. Note: overlap2 cannot be an immediate! */
1657 if ((overlap0
& (Imm8
| Imm8S
| Imm16
| Imm32
))
1658 && overlap0
!= Imm8
&& overlap0
!= Imm8S
1659 && overlap0
!= Imm16
&& overlap0
!= Imm32
)
1663 overlap0
&= (i
.suffix
== BYTE_MNEM_SUFFIX
? (Imm8
| Imm8S
) :
1664 (i
.suffix
== WORD_MNEM_SUFFIX
? Imm16
: Imm32
));
1666 else if (overlap0
== (Imm16
| Imm32
))
1669 (flag_16bit_code
^ (i
.prefix
[DATA_PREFIX
] != 0)) ? Imm16
: Imm32
;
1673 as_bad (_("no instruction mnemonic suffix given; can't determine immediate size"));
1677 if ((overlap1
& (Imm8
| Imm8S
| Imm16
| Imm32
))
1678 && overlap1
!= Imm8
&& overlap1
!= Imm8S
1679 && overlap1
!= Imm16
&& overlap1
!= Imm32
)
1683 overlap1
&= (i
.suffix
== BYTE_MNEM_SUFFIX
? (Imm8
| Imm8S
) :
1684 (i
.suffix
== WORD_MNEM_SUFFIX
? Imm16
: Imm32
));
1686 else if (overlap1
== (Imm16
| Imm32
))
1689 (flag_16bit_code
^ (i
.prefix
[DATA_PREFIX
] != 0)) ? Imm16
: Imm32
;
1693 as_bad (_("no instruction mnemonic suffix given; can't determine immediate size"));
1697 assert ((overlap2
& Imm
) == 0);
1699 i
.types
[0] = overlap0
;
1700 if (overlap0
& ImplicitRegister
)
1702 if (overlap0
& Imm1
)
1703 i
.imm_operands
= 0; /* kludge for shift insns */
1705 i
.types
[1] = overlap1
;
1706 if (overlap1
& ImplicitRegister
)
1709 i
.types
[2] = overlap2
;
1710 if (overlap2
& ImplicitRegister
)
1713 /* Finalize opcode. First, we change the opcode based on the operand
1714 size given by i.suffix: We need not change things for byte insns. */
1716 if (!i
.suffix
&& (i
.tm
.opcode_modifier
& W
))
1718 as_bad (_("no instruction mnemonic suffix given and no register operands; can't size instruction"));
1722 /* For movzx and movsx, need to check the register type */
1724 && (i
.tm
.base_opcode
== 0xfb6 || i
.tm
.base_opcode
== 0xfbe))
1725 if (i
.suffix
&& i
.suffix
== BYTE_MNEM_SUFFIX
)
1727 unsigned int prefix
= DATA_PREFIX_OPCODE
;
1729 if ((i
.regs
[1]->reg_type
& Reg16
) != 0)
1730 if (!add_prefix (prefix
))
1734 if (i
.suffix
&& i
.suffix
!= BYTE_MNEM_SUFFIX
)
1736 /* It's not a byte, select word/dword operation. */
1737 if (i
.tm
.opcode_modifier
& W
)
1739 if (i
.tm
.opcode_modifier
& ShortForm
)
1740 i
.tm
.base_opcode
|= 8;
1742 i
.tm
.base_opcode
|= 1;
1744 /* Now select between word & dword operations via the operand
1745 size prefix, except for instructions that will ignore this
1747 if (((intel_syntax
&& (i
.suffix
== INTEL_DWORD_MNEM_SUFFIX
))
1748 || i
.suffix
== DWORD_MNEM_SUFFIX
1749 || i
.suffix
== LONG_MNEM_SUFFIX
) == flag_16bit_code
1750 && !(i
.tm
.opcode_modifier
& IgnoreSize
))
1752 unsigned int prefix
= DATA_PREFIX_OPCODE
;
1753 if (i
.tm
.opcode_modifier
& JumpByte
) /* jcxz, loop */
1754 prefix
= ADDR_PREFIX_OPCODE
;
1756 if (! add_prefix (prefix
))
1759 /* Size floating point instruction. */
1760 if (i
.suffix
== LONG_MNEM_SUFFIX
1761 || (intel_syntax
&& i
.suffix
== INTEL_DWORD_MNEM_SUFFIX
))
1763 if (i
.tm
.opcode_modifier
& FloatMF
)
1764 i
.tm
.base_opcode
^= 4;
1768 if (i
.tm
.opcode_modifier
& ImmExt
)
1770 /* These AMD 3DNow! and Intel Katmai New Instructions have an
1771 opcode suffix which is coded in the same place as an 8-bit
1772 immediate field would be. Here we fake an 8-bit immediate
1773 operand from the opcode suffix stored in tm.extension_opcode. */
1777 assert(i
.imm_operands
== 0 && i
.operands
<= 2);
1779 exp
= &im_expressions
[i
.imm_operands
++];
1780 i
.imms
[i
.operands
] = exp
;
1781 i
.types
[i
.operands
++] = Imm8
;
1782 exp
->X_op
= O_constant
;
1783 exp
->X_add_number
= i
.tm
.extension_opcode
;
1784 i
.tm
.extension_opcode
= None
;
1787 /* For insns with operands there are more diddles to do to the opcode. */
1790 /* Default segment register this instruction will use
1791 for memory accesses. 0 means unknown.
1792 This is only for optimizing out unnecessary segment overrides. */
1793 const seg_entry
*default_seg
= 0;
1795 /* If we found a reverse match we must alter the opcode
1796 direction bit. found_reverse_match holds bits to change
1797 (different for int & float insns). */
1799 i
.tm
.base_opcode
^= found_reverse_match
;
1801 /* The imul $imm, %reg instruction is converted into
1802 imul $imm, %reg, %reg, and the clr %reg instruction
1803 is converted into xor %reg, %reg. */
1804 if (i
.tm
.opcode_modifier
& regKludge
)
1806 unsigned int first_reg_op
= (i
.types
[0] & Reg
) ? 0 : 1;
1807 /* Pretend we saw the extra register operand. */
1808 i
.regs
[first_reg_op
+1] = i
.regs
[first_reg_op
];
1812 if (i
.tm
.opcode_modifier
& ShortForm
)
1814 /* The register or float register operand is in operand 0 or 1. */
1815 unsigned int op
= (i
.types
[0] & (Reg
| FloatReg
)) ? 0 : 1;
1816 /* Register goes in low 3 bits of opcode. */
1817 i
.tm
.base_opcode
|= i
.regs
[op
]->reg_num
;
1818 if ((i
.tm
.opcode_modifier
& Ugh
) != 0)
1820 /* Warn about some common errors, but press on regardless.
1821 The first case can be generated by gcc (<= 2.8.1). */
1822 if (i
.operands
== 2)
1824 /* reversed arguments on faddp, fsubp, etc. */
1825 as_warn (_("translating to `%s %%%s,%%%s'"), i
.tm
.name
,
1826 i
.regs
[1]->reg_name
,
1827 i
.regs
[0]->reg_name
);
1831 /* extraneous `l' suffix on fp insn */
1832 as_warn (_("translating to `%s %%%s'"), i
.tm
.name
,
1833 i
.regs
[0]->reg_name
);
1837 else if (i
.tm
.opcode_modifier
& Modrm
)
1839 /* The opcode is completed (modulo i.tm.extension_opcode which
1840 must be put into the modrm byte).
1841 Now, we make the modrm & index base bytes based on all the
1842 info we've collected. */
1844 /* i.reg_operands MUST be the number of real register operands;
1845 implicit registers do not count. */
1846 if (i
.reg_operands
== 2)
1848 unsigned int source
, dest
;
1849 source
= ((i
.types
[0]
1850 & (Reg
| RegMMX
| RegXMM
1852 | Control
| Debug
| Test
))
1857 /* One of the register operands will be encoded in the
1858 i.tm.reg field, the other in the combined i.tm.mode
1859 and i.tm.regmem fields. If no form of this
1860 instruction supports a memory destination operand,
1861 then we assume the source operand may sometimes be
1862 a memory operand and so we need to store the
1863 destination in the i.rm.reg field. */
1864 if ((i
.tm
.operand_types
[dest
] & AnyMem
) == 0)
1866 i
.rm
.reg
= i
.regs
[dest
]->reg_num
;
1867 i
.rm
.regmem
= i
.regs
[source
]->reg_num
;
1871 i
.rm
.reg
= i
.regs
[source
]->reg_num
;
1872 i
.rm
.regmem
= i
.regs
[dest
]->reg_num
;
1876 { /* if it's not 2 reg operands... */
1879 unsigned int fake_zero_displacement
= 0;
1880 unsigned int op
= ((i
.types
[0] & AnyMem
)
1882 : (i
.types
[1] & AnyMem
) ? 1 : 2);
1889 if (! i
.disp_operands
)
1890 fake_zero_displacement
= 1;
1893 /* Operand is just <disp> */
1894 if (flag_16bit_code
^ (i
.prefix
[ADDR_PREFIX
] != 0))
1896 i
.rm
.regmem
= NO_BASE_REGISTER_16
;
1897 i
.types
[op
] &= ~Disp
;
1898 i
.types
[op
] |= Disp16
;
1902 i
.rm
.regmem
= NO_BASE_REGISTER
;
1903 i
.types
[op
] &= ~Disp
;
1904 i
.types
[op
] |= Disp32
;
1907 else /* ! i.base_reg && i.index_reg */
1909 i
.sib
.index
= i
.index_reg
->reg_num
;
1910 i
.sib
.base
= NO_BASE_REGISTER
;
1911 i
.sib
.scale
= i
.log2_scale_factor
;
1912 i
.rm
.regmem
= ESCAPE_TO_TWO_BYTE_ADDRESSING
;
1913 i
.types
[op
] &= ~Disp
;
1914 i
.types
[op
] |= Disp32
; /* Must be 32 bit */
1917 else if (i
.base_reg
->reg_type
& Reg16
)
1919 switch (i
.base_reg
->reg_num
)
1924 else /* (%bx,%si) -> 0, or (%bx,%di) -> 1 */
1925 i
.rm
.regmem
= i
.index_reg
->reg_num
- 6;
1932 if ((i
.types
[op
] & Disp
) == 0)
1934 /* fake (%bp) into 0(%bp) */
1935 i
.types
[op
] |= Disp8
;
1936 fake_zero_displacement
= 1;
1939 else /* (%bp,%si) -> 2, or (%bp,%di) -> 3 */
1940 i
.rm
.regmem
= i
.index_reg
->reg_num
- 6 + 2;
1942 default: /* (%si) -> 4 or (%di) -> 5 */
1943 i
.rm
.regmem
= i
.base_reg
->reg_num
- 6 + 4;
1945 i
.rm
.mode
= mode_from_disp_size (i
.types
[op
]);
1947 else /* i.base_reg and 32 bit mode */
1949 i
.rm
.regmem
= i
.base_reg
->reg_num
;
1950 i
.sib
.base
= i
.base_reg
->reg_num
;
1951 if (i
.base_reg
->reg_num
== EBP_REG_NUM
)
1954 if (i
.disp_operands
== 0)
1956 fake_zero_displacement
= 1;
1957 i
.types
[op
] |= Disp8
;
1960 else if (i
.base_reg
->reg_num
== ESP_REG_NUM
)
1964 i
.sib
.scale
= i
.log2_scale_factor
;
1967 /* <disp>(%esp) becomes two byte modrm
1968 with no index register. We've already
1969 stored the code for esp in i.rm.regmem
1970 ie. ESCAPE_TO_TWO_BYTE_ADDRESSING. Any
1971 base register besides %esp will not use
1972 the extra modrm byte. */
1973 i
.sib
.index
= NO_INDEX_REGISTER
;
1974 #if ! SCALE1_WHEN_NO_INDEX
1975 /* Another case where we force the second
1977 if (i
.log2_scale_factor
)
1978 i
.rm
.regmem
= ESCAPE_TO_TWO_BYTE_ADDRESSING
;
1983 i
.sib
.index
= i
.index_reg
->reg_num
;
1984 i
.rm
.regmem
= ESCAPE_TO_TWO_BYTE_ADDRESSING
;
1986 i
.rm
.mode
= mode_from_disp_size (i
.types
[op
]);
1989 if (fake_zero_displacement
)
1991 /* Fakes a zero displacement assuming that i.types[op]
1992 holds the correct displacement size. */
1995 exp
= &disp_expressions
[i
.disp_operands
++];
1997 exp
->X_op
= O_constant
;
1998 exp
->X_add_number
= 0;
1999 exp
->X_add_symbol
= (symbolS
*) 0;
2000 exp
->X_op_symbol
= (symbolS
*) 0;
2004 /* Fill in i.rm.reg or i.rm.regmem field with register
2005 operand (if any) based on i.tm.extension_opcode.
2006 Again, we must be careful to make sure that
2007 segment/control/debug/test/MMX registers are coded
2008 into the i.rm.reg field. */
2013 & (Reg
| RegMMX
| RegXMM
2015 | Control
| Debug
| Test
))
2018 & (Reg
| RegMMX
| RegXMM
2020 | Control
| Debug
| Test
))
2023 /* If there is an extension opcode to put here, the
2024 register number must be put into the regmem field. */
2025 if (i
.tm
.extension_opcode
!= None
)
2026 i
.rm
.regmem
= i
.regs
[op
]->reg_num
;
2028 i
.rm
.reg
= i
.regs
[op
]->reg_num
;
2030 /* Now, if no memory operand has set i.rm.mode = 0, 1, 2
2031 we must set it to 3 to indicate this is a register
2032 operand in the regmem field. */
2033 if (!i
.mem_operands
)
2037 /* Fill in i.rm.reg field with extension opcode (if any). */
2038 if (i
.tm
.extension_opcode
!= None
)
2039 i
.rm
.reg
= i
.tm
.extension_opcode
;
2042 else if (i
.tm
.opcode_modifier
& (Seg2ShortForm
| Seg3ShortForm
))
2044 if (i
.tm
.base_opcode
== POP_SEG_SHORT
&& i
.regs
[0]->reg_num
== 1)
2046 as_bad (_("you can't `pop %%cs'"));
2049 i
.tm
.base_opcode
|= (i
.regs
[0]->reg_num
<< 3);
2051 else if ((i
.tm
.base_opcode
& ~(D
|W
)) == MOV_AX_DISP32
)
2055 else if ((i
.tm
.opcode_modifier
& IsString
) != 0)
2057 /* For the string instructions that allow a segment override
2058 on one of their operands, the default segment is ds. */
2062 /* If a segment was explicitly specified,
2063 and the specified segment is not the default,
2064 use an opcode prefix to select it.
2065 If we never figured out what the default segment is,
2066 then default_seg will be zero at this point,
2067 and the specified segment prefix will always be used. */
2068 if ((i
.seg
[0]) && (i
.seg
[0] != default_seg
))
2070 if (! add_prefix (i
.seg
[0]->seg_prefix
))
2074 else if ((i
.tm
.opcode_modifier
& Ugh
) != 0)
2076 /* UnixWare fsub no args is alias for fsubp, fadd -> faddp, etc. */
2077 as_warn (_("translating to `%sp'"), i
.tm
.name
);
2081 /* Handle conversion of 'int $3' --> special int3 insn. */
2082 if (i
.tm
.base_opcode
== INT_OPCODE
&& i
.imms
[0]->X_add_number
== 3)
2084 i
.tm
.base_opcode
= INT3_OPCODE
;
2088 if ((i
.tm
.opcode_modifier
& (Jump
| JumpByte
| JumpDword
))
2089 && i
.disps
[0]->X_op
== O_constant
)
2091 /* Convert "jmp constant" (and "call constant") to a jump (call) to
2092 the absolute address given by the constant. Since ix86 jumps and
2093 calls are pc relative, we need to generate a reloc. */
2094 i
.disps
[0]->X_add_symbol
= &abs_symbol
;
2095 i
.disps
[0]->X_op
= O_symbol
;
2098 /* We are ready to output the insn. */
2103 if (i
.tm
.opcode_modifier
& Jump
)
2110 if (flag_16bit_code
)
2114 if (i
.prefix
[DATA_PREFIX
])
2125 if (i
.prefixes
!= 0 && !intel_syntax
)
2126 as_warn (_("skipping prefixes on this instruction"));
2128 /* It's always a symbol; End frag & setup for relax.
2129 Make sure there is enough room in this frag for the largest
2130 instruction we may generate in md_convert_frag. This is 2
2131 bytes for the opcode and room for the prefix and largest
2133 frag_grow (prefix
+ 2 + size
);
2134 insn_size
+= prefix
+ 1;
2135 /* Prefix and 1 opcode byte go in fr_fix. */
2136 p
= frag_more (prefix
+ 1);
2138 *p
++ = DATA_PREFIX_OPCODE
;
2139 *p
= i
.tm
.base_opcode
;
2140 /* 1 possible extra opcode + displacement go in fr_var. */
2141 frag_var (rs_machine_dependent
,
2144 ((unsigned char) *p
== JUMP_PC_RELATIVE
2145 ? ENCODE_RELAX_STATE (UNCOND_JUMP
, SMALL
) | code16
2146 : ENCODE_RELAX_STATE (COND_JUMP
, SMALL
) | code16
),
2147 i
.disps
[0]->X_add_symbol
,
2148 i
.disps
[0]->X_add_number
,
2151 else if (i
.tm
.opcode_modifier
& (JumpByte
| JumpDword
))
2155 if (i
.tm
.opcode_modifier
& JumpByte
)
2157 /* This is a loop or jecxz type instruction. */
2159 if (i
.prefix
[ADDR_PREFIX
])
2162 FRAG_APPEND_1_CHAR (ADDR_PREFIX_OPCODE
);
2171 if (flag_16bit_code
)
2174 if (i
.prefix
[DATA_PREFIX
])
2177 FRAG_APPEND_1_CHAR (DATA_PREFIX_OPCODE
);
2187 if (i
.prefixes
!= 0 && !intel_syntax
)
2188 as_warn (_("skipping prefixes on this instruction"));
2190 if (fits_in_unsigned_byte (i
.tm
.base_opcode
))
2192 insn_size
+= 1 + size
;
2193 p
= frag_more (1 + size
);
2197 /* opcode can be at most two bytes */
2198 insn_size
+= 2 + size
;
2199 p
= frag_more (2 + size
);
2200 *p
++ = (i
.tm
.base_opcode
>> 8) & 0xff;
2202 *p
++ = i
.tm
.base_opcode
& 0xff;
2204 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
, size
,
2205 i
.disps
[0], 1, reloc (size
, 1, i
.disp_reloc
[0]));
2207 else if (i
.tm
.opcode_modifier
& JumpInterSegment
)
2215 if (flag_16bit_code
)
2219 if (i
.prefix
[DATA_PREFIX
])
2227 reloc_type
= BFD_RELOC_32
;
2231 reloc_type
= BFD_RELOC_16
;
2234 if (i
.prefixes
!= 0 && !intel_syntax
)
2235 as_warn (_("skipping prefixes on this instruction"));
2237 insn_size
+= prefix
+ 1 + 2 + size
; /* 1 opcode; 2 segment; offset */
2238 p
= frag_more (prefix
+ 1 + 2 + size
);
2240 *p
++ = DATA_PREFIX_OPCODE
;
2241 *p
++ = i
.tm
.base_opcode
;
2242 if (i
.imms
[1]->X_op
== O_constant
)
2244 long n
= (long) i
.imms
[1]->X_add_number
;
2246 if (size
== 2 && !fits_in_unsigned_word (n
))
2248 as_bad (_("16-bit jump out of range"));
2251 md_number_to_chars (p
, (valueT
) n
, size
);
2254 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
, size
,
2255 i
.imms
[1], 0, reloc_type
);
2256 if (i
.imms
[0]->X_op
!= O_constant
)
2257 as_bad (_("can't handle non absolute segment in `%s'"),
2259 md_number_to_chars (p
+ size
, (valueT
) i
.imms
[0]->X_add_number
, 2);
2263 /* Output normal instructions here. */
2266 /* The prefix bytes. */
2268 q
< i
.prefix
+ sizeof (i
.prefix
) / sizeof (i
.prefix
[0]);
2275 md_number_to_chars (p
, (valueT
) *q
, 1);
2279 /* Now the opcode; be careful about word order here! */
2280 if (fits_in_unsigned_byte (i
.tm
.base_opcode
))
2283 FRAG_APPEND_1_CHAR (i
.tm
.base_opcode
);
2285 else if (fits_in_unsigned_word (i
.tm
.base_opcode
))
2289 /* put out high byte first: can't use md_number_to_chars! */
2290 *p
++ = (i
.tm
.base_opcode
>> 8) & 0xff;
2291 *p
= i
.tm
.base_opcode
& 0xff;
2294 { /* opcode is either 3 or 4 bytes */
2295 if (i
.tm
.base_opcode
& 0xff000000)
2299 *p
++ = (i
.tm
.base_opcode
>> 24) & 0xff;
2306 *p
++ = (i
.tm
.base_opcode
>> 16) & 0xff;
2307 *p
++ = (i
.tm
.base_opcode
>> 8) & 0xff;
2308 *p
= (i
.tm
.base_opcode
) & 0xff;
2311 /* Now the modrm byte and sib byte (if present). */
2312 if (i
.tm
.opcode_modifier
& Modrm
)
2316 md_number_to_chars (p
,
2317 (valueT
) (i
.rm
.regmem
<< 0
2321 /* If i.rm.regmem == ESP (4)
2322 && i.rm.mode != (Register mode)
2324 ==> need second modrm byte. */
2325 if (i
.rm
.regmem
== ESCAPE_TO_TWO_BYTE_ADDRESSING
2327 && !(i
.base_reg
&& (i
.base_reg
->reg_type
& Reg16
) != 0))
2331 md_number_to_chars (p
,
2332 (valueT
) (i
.sib
.base
<< 0
2334 | i
.sib
.scale
<< 6),
2339 if (i
.disp_operands
)
2341 register unsigned int n
;
2343 for (n
= 0; n
< i
.operands
; n
++)
2347 if (i
.disps
[n
]->X_op
== O_constant
)
2350 long val
= (long) i
.disps
[n
]->X_add_number
;
2352 if (i
.types
[n
] & (Disp8
| Disp16
))
2357 mask
= ~ (long) 0xffff;
2358 if (i
.types
[n
] & Disp8
)
2361 mask
= ~ (long) 0xff;
2364 if ((val
& mask
) != 0 && (val
& mask
) != mask
)
2365 as_warn (_("%ld shortened to %ld"),
2369 p
= frag_more (size
);
2370 md_number_to_chars (p
, (valueT
) val
, size
);
2372 else if (i
.types
[n
] & Disp32
)
2376 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
, 4,
2378 TC_RELOC (i
.disp_reloc
[n
], BFD_RELOC_32
));
2381 { /* must be Disp16 */
2384 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
, 2,
2386 TC_RELOC (i
.disp_reloc
[n
], BFD_RELOC_16
));
2390 } /* end displacement output */
2392 /* output immediate */
2395 register unsigned int n
;
2397 for (n
= 0; n
< i
.operands
; n
++)
2401 if (i
.imms
[n
]->X_op
== O_constant
)
2404 long val
= (long) i
.imms
[n
]->X_add_number
;
2406 if (i
.types
[n
] & (Imm8
| Imm8S
| Imm16
))
2411 mask
= ~ (long) 0xffff;
2412 if (i
.types
[n
] & (Imm8
| Imm8S
))
2415 mask
= ~ (long) 0xff;
2417 if ((val
& mask
) != 0 && (val
& mask
) != mask
)
2418 as_warn (_("%ld shortened to %ld"),
2422 p
= frag_more (size
);
2423 md_number_to_chars (p
, (valueT
) val
, size
);
2426 { /* not absolute_section */
2427 /* Need a 32-bit fixup (don't support 8bit
2428 non-absolute ims). Try to support other
2434 if (i
.types
[n
] & (Imm8
| Imm8S
))
2436 else if (i
.types
[n
] & Imm16
)
2441 p
= frag_more (size
);
2442 r_type
= reloc (size
, 0, i
.disp_reloc
[0]);
2443 #ifdef BFD_ASSEMBLER
2444 if (r_type
== BFD_RELOC_32
2446 && GOT_symbol
== i
.imms
[n
]->X_add_symbol
2447 && (i
.imms
[n
]->X_op
== O_symbol
2448 || (i
.imms
[n
]->X_op
== O_add
2449 && ((symbol_get_value_expression
2450 (i
.imms
[n
]->X_op_symbol
)->X_op
)
2453 r_type
= BFD_RELOC_386_GOTPC
;
2454 i
.imms
[n
]->X_add_number
+= 3;
2457 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
, size
,
2458 i
.imms
[n
], pcrel
, r_type
);
2462 } /* end immediate output */
2470 #endif /* DEBUG386 */
2474 static int i386_immediate
PARAMS ((char *));
2477 i386_immediate (imm_start
)
2480 char *save_input_line_pointer
;
2484 if (i
.imm_operands
== MAX_IMMEDIATE_OPERANDS
)
2486 as_bad (_("Only 1 or 2 immediate operands are allowed"));
2490 exp
= &im_expressions
[i
.imm_operands
++];
2491 i
.imms
[this_operand
] = exp
;
2493 if (is_space_char (*imm_start
))
2496 save_input_line_pointer
= input_line_pointer
;
2497 input_line_pointer
= imm_start
;
2502 * We can have operands of the form
2503 * <symbol>@GOTOFF+<nnn>
2504 * Take the easy way out here and copy everything
2505 * into a temporary buffer...
2509 cp
= strchr (input_line_pointer
, '@');
2516 /* GOT relocations are not supported in 16 bit mode */
2517 if (flag_16bit_code
)
2518 as_bad (_("GOT relocations not supported in 16 bit mode"));
2520 if (GOT_symbol
== NULL
)
2521 GOT_symbol
= symbol_find_or_make (GLOBAL_OFFSET_TABLE_NAME
);
2523 if (strncmp (cp
+ 1, "PLT", 3) == 0)
2525 i
.disp_reloc
[this_operand
] = BFD_RELOC_386_PLT32
;
2528 else if (strncmp (cp
+ 1, "GOTOFF", 6) == 0)
2530 i
.disp_reloc
[this_operand
] = BFD_RELOC_386_GOTOFF
;
2533 else if (strncmp (cp
+ 1, "GOT", 3) == 0)
2535 i
.disp_reloc
[this_operand
] = BFD_RELOC_386_GOT32
;
2539 as_bad (_("Bad reloc specifier in expression"));
2541 /* Replace the relocation token with ' ', so that errors like
2542 foo@GOTOFF1 will be detected. */
2543 first
= cp
- input_line_pointer
;
2544 tmpbuf
= (char *) alloca (strlen(input_line_pointer
));
2545 memcpy (tmpbuf
, input_line_pointer
, first
);
2546 tmpbuf
[first
] = ' ';
2547 strcpy (tmpbuf
+ first
+ 1, cp
+ 1 + len
);
2548 input_line_pointer
= tmpbuf
;
2553 exp_seg
= expression (exp
);
2556 if (*input_line_pointer
)
2557 as_bad (_("Ignoring junk `%s' after expression"), input_line_pointer
);
2559 input_line_pointer
= save_input_line_pointer
;
2561 if (exp
->X_op
== O_absent
)
2563 /* missing or bad expr becomes absolute 0 */
2564 as_bad (_("Missing or invalid immediate expression `%s' taken as 0"),
2566 exp
->X_op
= O_constant
;
2567 exp
->X_add_number
= 0;
2568 exp
->X_add_symbol
= (symbolS
*) 0;
2569 exp
->X_op_symbol
= (symbolS
*) 0;
2570 i
.types
[this_operand
] |= Imm
;
2572 else if (exp
->X_op
== O_constant
)
2575 if (flag_16bit_code
^ (i
.prefix
[DATA_PREFIX
] != 0))
2578 i
.types
[this_operand
] |=
2579 (bigimm
| smallest_imm_type ((long) exp
->X_add_number
));
2581 /* If a suffix is given, this operand may be shortended. */
2584 case WORD_MNEM_SUFFIX
:
2585 i
.types
[this_operand
] |= Imm16
;
2587 case BYTE_MNEM_SUFFIX
:
2588 i
.types
[this_operand
] |= Imm16
| Imm8
| Imm8S
;
2593 else if (exp_seg
!= text_section
2594 && exp_seg
!= data_section
2595 && exp_seg
!= bss_section
2596 && exp_seg
!= undefined_section
2597 #ifdef BFD_ASSEMBLER
2598 && !bfd_is_com_section (exp_seg
)
2602 as_bad (_("Unimplemented segment type %d in operand"), exp_seg
);
2608 /* This is an address. The size of the address will be
2609 determined later, depending on destination register,
2610 suffix, or the default for the section. We exclude
2611 Imm8S here so that `push $foo' and other instructions
2612 with an Imm8S form will use Imm16 or Imm32. */
2613 i
.types
[this_operand
] |= (Imm8
| Imm16
| Imm32
);
2619 static int i386_scale
PARAMS ((char *));
2625 if (!isdigit (*scale
))
2632 i
.log2_scale_factor
= 0;
2635 i
.log2_scale_factor
= 1;
2638 i
.log2_scale_factor
= 2;
2641 i
.log2_scale_factor
= 3;
2645 as_bad (_("expecting scale factor of 1, 2, 4, or 8: got `%s'"),
2649 if (i
.log2_scale_factor
!= 0 && ! i
.index_reg
)
2651 as_warn (_("scale factor of %d without an index register"),
2652 1 << i
.log2_scale_factor
);
2653 #if SCALE1_WHEN_NO_INDEX
2654 i
.log2_scale_factor
= 0;
2660 static int i386_displacement
PARAMS ((char *, char *));
2663 i386_displacement (disp_start
, disp_end
)
2667 register expressionS
*exp
;
2669 char *save_input_line_pointer
;
2670 int bigdisp
= Disp32
;
2672 if (flag_16bit_code
^ (i
.prefix
[ADDR_PREFIX
] != 0))
2674 i
.types
[this_operand
] |= bigdisp
;
2676 exp
= &disp_expressions
[i
.disp_operands
];
2677 i
.disps
[this_operand
] = exp
;
2678 i
.disp_reloc
[this_operand
] = NO_RELOC
;
2680 save_input_line_pointer
= input_line_pointer
;
2681 input_line_pointer
= disp_start
;
2682 END_STRING_AND_SAVE (disp_end
);
2684 #ifndef GCC_ASM_O_HACK
2685 #define GCC_ASM_O_HACK 0
2688 END_STRING_AND_SAVE (disp_end
+ 1);
2689 if ((i
.types
[this_operand
] & BaseIndex
) != 0
2690 && displacement_string_end
[-1] == '+')
2692 /* This hack is to avoid a warning when using the "o"
2693 constraint within gcc asm statements.
2696 #define _set_tssldt_desc(n,addr,limit,type) \
2697 __asm__ __volatile__ ( \
2699 "movw %w1,2+%0\n\t" \
2701 "movb %b1,4+%0\n\t" \
2702 "movb %4,5+%0\n\t" \
2703 "movb $0,6+%0\n\t" \
2704 "movb %h1,7+%0\n\t" \
2706 : "=o"(*(n)) : "q" (addr), "ri"(limit), "i"(type))
2708 This works great except that the output assembler ends
2709 up looking a bit weird if it turns out that there is
2710 no offset. You end up producing code that looks like:
2723 So here we provide the missing zero.
2726 *displacement_string_end
= '0';
2732 * We can have operands of the form
2733 * <symbol>@GOTOFF+<nnn>
2734 * Take the easy way out here and copy everything
2735 * into a temporary buffer...
2739 cp
= strchr (input_line_pointer
, '@');
2746 /* GOT relocations are not supported in 16 bit mode */
2747 if (flag_16bit_code
)
2748 as_bad (_("GOT relocations not supported in 16 bit mode"));
2750 if (GOT_symbol
== NULL
)
2751 GOT_symbol
= symbol_find_or_make (GLOBAL_OFFSET_TABLE_NAME
);
2753 if (strncmp (cp
+ 1, "PLT", 3) == 0)
2755 i
.disp_reloc
[this_operand
] = BFD_RELOC_386_PLT32
;
2758 else if (strncmp (cp
+ 1, "GOTOFF", 6) == 0)
2760 i
.disp_reloc
[this_operand
] = BFD_RELOC_386_GOTOFF
;
2763 else if (strncmp (cp
+ 1, "GOT", 3) == 0)
2765 i
.disp_reloc
[this_operand
] = BFD_RELOC_386_GOT32
;
2769 as_bad (_("Bad reloc specifier in expression"));
2771 /* Replace the relocation token with ' ', so that errors like
2772 foo@GOTOFF1 will be detected. */
2773 first
= cp
- input_line_pointer
;
2774 tmpbuf
= (char *) alloca (strlen(input_line_pointer
));
2775 memcpy (tmpbuf
, input_line_pointer
, first
);
2776 tmpbuf
[first
] = ' ';
2777 strcpy (tmpbuf
+ first
+ 1, cp
+ 1 + len
);
2778 input_line_pointer
= tmpbuf
;
2783 exp_seg
= expression (exp
);
2785 #ifdef BFD_ASSEMBLER
2786 /* We do this to make sure that the section symbol is in
2787 the symbol table. We will ultimately change the relocation
2788 to be relative to the beginning of the section */
2789 if (i
.disp_reloc
[this_operand
] == BFD_RELOC_386_GOTOFF
)
2791 if (S_IS_LOCAL(exp
->X_add_symbol
)
2792 && S_GET_SEGMENT (exp
->X_add_symbol
) != undefined_section
)
2793 section_symbol (S_GET_SEGMENT (exp
->X_add_symbol
));
2794 assert (exp
->X_op
== O_symbol
);
2795 exp
->X_op
= O_subtract
;
2796 exp
->X_op_symbol
= GOT_symbol
;
2797 i
.disp_reloc
[this_operand
] = BFD_RELOC_32
;
2802 if (*input_line_pointer
)
2803 as_bad (_("Ignoring junk `%s' after expression"),
2804 input_line_pointer
);
2806 RESTORE_END_STRING (disp_end
+ 1);
2808 RESTORE_END_STRING (disp_end
);
2809 input_line_pointer
= save_input_line_pointer
;
2811 if (exp
->X_op
== O_constant
)
2813 if (fits_in_signed_byte (exp
->X_add_number
))
2814 i
.types
[this_operand
] |= Disp8
;
2817 else if (exp_seg
!= text_section
2818 && exp_seg
!= data_section
2819 && exp_seg
!= bss_section
2820 && exp_seg
!= undefined_section
)
2822 as_bad (_ ("Unimplemented segment type %d in operand"), exp_seg
);
2829 static int i386_operand_modifier
PARAMS ((char **, int));
2832 i386_operand_modifier (op_string
, got_a_float
)
2836 if (!strncasecmp (*op_string
, "BYTE PTR", 8))
2838 i
.suffix
= BYTE_MNEM_SUFFIX
;
2843 else if (!strncasecmp (*op_string
, "WORD PTR", 8))
2845 i
.suffix
= WORD_MNEM_SUFFIX
;
2850 else if (!strncasecmp (*op_string
, "DWORD PTR", 9))
2853 i
.suffix
= SHORT_MNEM_SUFFIX
;
2855 i
.suffix
= DWORD_MNEM_SUFFIX
;
2860 else if (!strncasecmp (*op_string
, "QWORD PTR", 9))
2862 i
.suffix
= INTEL_DWORD_MNEM_SUFFIX
;
2867 else if (!strncasecmp (*op_string
, "XWORD PTR", 9))
2869 i
.suffix
= LONG_DOUBLE_MNEM_SUFFIX
;
2874 else if (!strncasecmp (*op_string
, "SHORT", 5))
2880 else if (!strncasecmp (*op_string
, "OFFSET FLAT:", 12))
2886 else if (!strncasecmp (*op_string
, "FLAT", 4))
2892 else return NONE_FOUND
;
2895 static char * build_displacement_string
PARAMS ((int, char *));
2898 build_displacement_string (initial_disp
, op_string
)
2902 char *temp_string
= (char *) malloc (strlen (op_string
) + 1);
2903 char *end_of_operand_string
;
2907 temp_string
[0] = '\0';
2908 tc
= end_of_operand_string
= strchr (op_string
, '[');
2909 if ( initial_disp
&& !end_of_operand_string
)
2911 strcpy (temp_string
, op_string
);
2912 return (temp_string
);
2915 /* Build the whole displacement string */
2918 strncpy (temp_string
, op_string
, end_of_operand_string
- op_string
);
2919 temp_string
[end_of_operand_string
- op_string
] = '\0';
2923 temp_disp
= op_string
;
2925 while (*temp_disp
!= '\0')
2928 int add_minus
= (*temp_disp
== '-');
2930 if (*temp_disp
== '+' || *temp_disp
== '-' || *temp_disp
== '[')
2933 if (is_space_char (*temp_disp
))
2936 /* Don't consider registers */
2937 if ( !((*temp_disp
== REGISTER_PREFIX
|| allow_naked_reg
)
2938 && parse_register (temp_disp
, &end_op
)) )
2940 char *string_start
= temp_disp
;
2942 while (*temp_disp
!= ']'
2943 && *temp_disp
!= '+'
2944 && *temp_disp
!= '-'
2945 && *temp_disp
!= '*')
2949 strcat (temp_string
, "-");
2951 strcat (temp_string
, "+");
2953 strncat (temp_string
, string_start
, temp_disp
- string_start
);
2954 if (*temp_disp
== '+' || *temp_disp
== '-')
2958 while (*temp_disp
!= '\0'
2959 && *temp_disp
!= '+'
2960 && *temp_disp
!= '-')
2967 static int i386_parse_seg
PARAMS ((char *));
2970 i386_parse_seg (op_string
)
2973 if (is_space_char (*op_string
))
2976 /* Should be one of es, cs, ss, ds fs or gs */
2977 switch (*op_string
++)
2980 i
.seg
[i
.mem_operands
] = &es
;
2983 i
.seg
[i
.mem_operands
] = &cs
;
2986 i
.seg
[i
.mem_operands
] = &ss
;
2989 i
.seg
[i
.mem_operands
] = &ds
;
2992 i
.seg
[i
.mem_operands
] = &fs
;
2995 i
.seg
[i
.mem_operands
] = &gs
;
2998 as_bad (_("bad segment name `%s'"), op_string
);
3002 if (*op_string
++ != 's')
3004 as_bad (_("bad segment name `%s'"), op_string
);
3008 if (is_space_char (*op_string
))
3011 if (*op_string
!= ':')
3013 as_bad (_("bad segment name `%s'"), op_string
);
3021 static int i386_index_check
PARAMS((const char *));
3023 /* Make sure the memory operand we've been dealt is valid.
3024 Returns 1 on success, 0 on a failure.
3027 i386_index_check (operand_string
)
3028 const char *operand_string
;
3030 #if INFER_ADDR_PREFIX
3035 if (flag_16bit_code
^ (i
.prefix
[ADDR_PREFIX
] != 0) ?
3036 /* 16 bit mode checks */
3038 && ((i
.base_reg
->reg_type
& (Reg16
|BaseIndex
))
3039 != (Reg16
|BaseIndex
)))
3041 && (((i
.index_reg
->reg_type
& (Reg16
|BaseIndex
))
3042 != (Reg16
|BaseIndex
))
3044 && i
.base_reg
->reg_num
< 6
3045 && i
.index_reg
->reg_num
>= 6
3046 && i
.log2_scale_factor
== 0)))) :
3047 /* 32 bit mode checks */
3049 && (i
.base_reg
->reg_type
& Reg32
) == 0)
3051 && ((i
.index_reg
->reg_type
& (Reg32
|BaseIndex
))
3052 != (Reg32
|BaseIndex
)))))
3054 #if INFER_ADDR_PREFIX
3055 if (i
.prefix
[ADDR_PREFIX
] == 0 && stackop_size
!= '\0')
3057 i
.prefix
[ADDR_PREFIX
] = ADDR_PREFIX_OPCODE
;
3059 /* Change the size of any displacement too. At most one of
3060 Disp16 or Disp32 is set.
3061 FIXME. There doesn't seem to be any real need for separate
3062 Disp16 and Disp32 flags. The same goes for Imm16 and Imm32.
3063 Removing them would probably clean up the code quite a lot.
3065 if (i
.types
[this_operand
] & (Disp16
|Disp32
))
3066 i
.types
[this_operand
] ^= (Disp16
|Disp32
);
3071 as_bad (_("`%s' is not a valid base/index expression"),
3075 as_bad (_("`%s' is not a valid %s bit base/index expression"),
3077 flag_16bit_code
^ (i
.prefix
[ADDR_PREFIX
] != 0) ? "16" : "32");
3083 static int i386_intel_memory_operand
PARAMS ((char *));
3086 i386_intel_memory_operand (operand_string
)
3087 char *operand_string
;
3089 char *op_string
= operand_string
;
3090 char *end_of_operand_string
;
3092 if ((i
.mem_operands
== 1
3093 && (current_templates
->start
->opcode_modifier
& IsString
) == 0)
3094 || i
.mem_operands
== 2)
3096 as_bad (_("too many memory references for `%s'"),
3097 current_templates
->start
->name
);
3101 /* Look for displacement preceding open bracket */
3102 if (*op_string
!= '[')
3107 end_seg
= strchr (op_string
, ':');
3110 if (!i386_parse_seg (op_string
))
3112 op_string
= end_seg
+ 1;
3115 temp_string
= build_displacement_string (true, op_string
);
3117 if (i
.disp_operands
== 0 &&
3118 !i386_displacement (temp_string
, temp_string
+ strlen (temp_string
)))
3121 end_of_operand_string
= strchr (op_string
, '[');
3122 if (!end_of_operand_string
)
3123 end_of_operand_string
= op_string
+ strlen (op_string
);
3125 if (is_space_char (*end_of_operand_string
))
3126 --end_of_operand_string
;
3128 op_string
= end_of_operand_string
;
3131 if (*op_string
== '[')
3135 /* Pick off each component and figure out where it belongs */
3137 end_of_operand_string
= op_string
;
3139 while (*op_string
!= ']')
3141 const reg_entry
*temp_reg
;
3145 while (*end_of_operand_string
!= '+'
3146 && *end_of_operand_string
!= '-'
3147 && *end_of_operand_string
!= '*'
3148 && *end_of_operand_string
!= ']')
3149 end_of_operand_string
++;
3151 temp_string
= op_string
;
3152 if (*temp_string
== '+')
3155 if (is_space_char (*temp_string
))
3159 if ((*temp_string
== REGISTER_PREFIX
|| allow_naked_reg
)
3160 && (temp_reg
= parse_register (temp_string
, &end_op
)) != NULL
)
3162 if (i
.base_reg
== NULL
)
3163 i
.base_reg
= temp_reg
;
3165 i
.index_reg
= temp_reg
;
3167 i
.types
[this_operand
] |= BaseIndex
;
3169 else if (*temp_string
== REGISTER_PREFIX
)
3171 as_bad (_("bad register name `%s'"), temp_string
);
3174 else if (is_digit_char (*op_string
)
3175 || *op_string
== '+' || *op_string
== '-')
3177 temp_string
= build_displacement_string (false, op_string
);
3179 if (*temp_string
== '+')
3182 if (i
.disp_operands
== 0 &&
3183 !i386_displacement (temp_string
, temp_string
+ strlen (temp_string
)))
3187 end_of_operand_string
= op_string
;
3188 while (*end_of_operand_string
!= ']'
3189 && *end_of_operand_string
!= '+'
3190 && *end_of_operand_string
!= '-'
3191 && *end_of_operand_string
!= '*')
3192 ++end_of_operand_string
;
3194 else if (*op_string
== '*')
3198 if (i
.base_reg
&& !i
.index_reg
)
3200 i
.index_reg
= i
.base_reg
;
3204 if (!i386_scale (op_string
))
3207 op_string
= end_of_operand_string
;
3208 ++end_of_operand_string
;
3212 if (i386_index_check (operand_string
) == 0)
3220 i386_intel_operand (operand_string
, got_a_float
)
3221 char *operand_string
;
3224 const reg_entry
* r
;
3226 char *op_string
= operand_string
;
3228 int operand_modifier
= i386_operand_modifier (&op_string
, got_a_float
);
3229 if (is_space_char (*op_string
))
3232 switch (operand_modifier
)
3239 if (!i386_intel_memory_operand (op_string
))
3245 if (!i386_immediate (op_string
))
3251 /* Should be register or immediate */
3252 if (is_digit_char (*op_string
)
3253 && strchr (op_string
, '[') == 0)
3255 if (!i386_immediate (op_string
))
3258 else if ((*op_string
== REGISTER_PREFIX
|| allow_naked_reg
)
3259 && (r
= parse_register (op_string
, &end_op
)) != NULL
)
3261 /* Check for a segment override by searching for ':' after a
3262 segment register. */
3264 if (is_space_char (*op_string
))
3266 if (*op_string
== ':' && (r
->reg_type
& (SReg2
| SReg3
)))
3271 i
.seg
[i
.mem_operands
] = &es
;
3274 i
.seg
[i
.mem_operands
] = &cs
;
3277 i
.seg
[i
.mem_operands
] = &ss
;
3280 i
.seg
[i
.mem_operands
] = &ds
;
3283 i
.seg
[i
.mem_operands
] = &fs
;
3286 i
.seg
[i
.mem_operands
] = &gs
;
3291 i
.types
[this_operand
] |= r
->reg_type
& ~BaseIndex
;
3292 i
.regs
[this_operand
] = r
;
3295 else if (*op_string
== REGISTER_PREFIX
)
3297 as_bad (_("bad register name `%s'"), op_string
);
3300 else if (!i386_intel_memory_operand (op_string
))
3309 /* Parse OPERAND_STRING into the i386_insn structure I. Returns non-zero
3313 i386_operand (operand_string
)
3314 char *operand_string
;
3318 char *op_string
= operand_string
;
3320 if (is_space_char (*op_string
))
3323 /* We check for an absolute prefix (differentiating,
3324 for example, 'jmp pc_relative_label' from 'jmp *absolute_label'. */
3325 if (*op_string
== ABSOLUTE_PREFIX
)
3328 if (is_space_char (*op_string
))
3330 i
.types
[this_operand
] |= JumpAbsolute
;
3333 /* Check if operand is a register. */
3334 if ((*op_string
== REGISTER_PREFIX
|| allow_naked_reg
)
3335 && (r
= parse_register (op_string
, &end_op
)) != NULL
)
3337 /* Check for a segment override by searching for ':' after a
3338 segment register. */
3340 if (is_space_char (*op_string
))
3342 if (*op_string
== ':' && (r
->reg_type
& (SReg2
| SReg3
)))
3347 i
.seg
[i
.mem_operands
] = &es
;
3350 i
.seg
[i
.mem_operands
] = &cs
;
3353 i
.seg
[i
.mem_operands
] = &ss
;
3356 i
.seg
[i
.mem_operands
] = &ds
;
3359 i
.seg
[i
.mem_operands
] = &fs
;
3362 i
.seg
[i
.mem_operands
] = &gs
;
3366 /* Skip the ':' and whitespace. */
3368 if (is_space_char (*op_string
))
3371 if (!is_digit_char (*op_string
)
3372 && !is_identifier_char (*op_string
)
3373 && *op_string
!= '('
3374 && *op_string
!= ABSOLUTE_PREFIX
)
3376 as_bad (_("bad memory operand `%s'"), op_string
);
3379 /* Handle case of %es:*foo. */
3380 if (*op_string
== ABSOLUTE_PREFIX
)
3383 if (is_space_char (*op_string
))
3385 i
.types
[this_operand
] |= JumpAbsolute
;
3387 goto do_memory_reference
;
3391 as_bad (_("Junk `%s' after register"), op_string
);
3394 i
.types
[this_operand
] |= r
->reg_type
& ~BaseIndex
;
3395 i
.regs
[this_operand
] = r
;
3398 else if (*op_string
== REGISTER_PREFIX
)
3400 as_bad (_("bad register name `%s'"), op_string
);
3403 else if (*op_string
== IMMEDIATE_PREFIX
)
3404 { /* ... or an immediate */
3406 if (i
.types
[this_operand
] & JumpAbsolute
)
3408 as_bad (_("Immediate operand illegal with absolute jump"));
3411 if (!i386_immediate (op_string
))
3414 else if (is_digit_char (*op_string
)
3415 || is_identifier_char (*op_string
)
3416 || *op_string
== '(' )
3418 /* This is a memory reference of some sort. */
3421 /* Start and end of displacement string expression (if found). */
3422 char *displacement_string_start
;
3423 char *displacement_string_end
;
3425 do_memory_reference
:
3426 if ((i
.mem_operands
== 1
3427 && (current_templates
->start
->opcode_modifier
& IsString
) == 0)
3428 || i
.mem_operands
== 2)
3430 as_bad (_("too many memory references for `%s'"),
3431 current_templates
->start
->name
);
3435 /* Check for base index form. We detect the base index form by
3436 looking for an ')' at the end of the operand, searching
3437 for the '(' matching it, and finding a REGISTER_PREFIX or ','
3439 base_string
= op_string
+ strlen (op_string
);
3442 if (is_space_char (*base_string
))
3445 /* If we only have a displacement, set-up for it to be parsed later. */
3446 displacement_string_start
= op_string
;
3447 displacement_string_end
= base_string
+ 1;
3449 if (*base_string
== ')')
3452 unsigned int parens_balanced
= 1;
3453 /* We've already checked that the number of left & right ()'s are
3454 equal, so this loop will not be infinite. */
3458 if (*base_string
== ')')
3460 if (*base_string
== '(')
3463 while (parens_balanced
);
3465 temp_string
= base_string
;
3467 /* Skip past '(' and whitespace. */
3469 if (is_space_char (*base_string
))
3472 if (*base_string
== ','
3473 || ((*base_string
== REGISTER_PREFIX
|| allow_naked_reg
)
3474 && (i
.base_reg
= parse_register (base_string
, &end_op
)) != NULL
))
3476 displacement_string_end
= temp_string
;
3478 i
.types
[this_operand
] |= BaseIndex
;
3482 base_string
= end_op
;
3483 if (is_space_char (*base_string
))
3487 /* There may be an index reg or scale factor here. */
3488 if (*base_string
== ',')
3491 if (is_space_char (*base_string
))
3494 if ((*base_string
== REGISTER_PREFIX
|| allow_naked_reg
)
3495 && (i
.index_reg
= parse_register (base_string
, &end_op
)) != NULL
)
3497 base_string
= end_op
;
3498 if (is_space_char (*base_string
))
3500 if (*base_string
== ',')
3503 if (is_space_char (*base_string
))
3506 else if (*base_string
!= ')' )
3508 as_bad (_("expecting `,' or `)' after index register in `%s'"),
3513 else if (*base_string
== REGISTER_PREFIX
)
3515 as_bad (_("bad register name `%s'"), base_string
);
3519 /* Check for scale factor. */
3520 if (isdigit ((unsigned char) *base_string
))
3522 if (!i386_scale (base_string
))
3526 if (is_space_char (*base_string
))
3528 if (*base_string
!= ')')
3530 as_bad (_("expecting `)' after scale factor in `%s'"),
3535 else if (!i
.index_reg
)
3537 as_bad (_("expecting index register or scale factor after `,'; got '%c'"),
3542 else if (*base_string
!= ')')
3544 as_bad (_("expecting `,' or `)' after base register in `%s'"),
3549 else if (*base_string
== REGISTER_PREFIX
)
3551 as_bad (_("bad register name `%s'"), base_string
);
3556 /* If there's an expression beginning the operand, parse it,
3557 assuming displacement_string_start and
3558 displacement_string_end are meaningful. */
3559 if (displacement_string_start
!= displacement_string_end
)
3561 if (!i386_displacement (displacement_string_start
,
3562 displacement_string_end
))
3566 /* Special case for (%dx) while doing input/output op. */
3568 && i
.base_reg
->reg_type
== (Reg16
| InOutPortReg
)
3570 && i
.log2_scale_factor
== 0
3571 && i
.seg
[i
.mem_operands
] == 0
3572 && (i
.types
[this_operand
] & Disp
) == 0)
3574 i
.types
[this_operand
] = InOutPortReg
;
3578 if (i386_index_check (operand_string
) == 0)
3583 { /* it's not a memory operand; argh! */
3584 as_bad (_("invalid char %s beginning operand %d `%s'"),
3585 output_invalid (*op_string
),
3590 return 1; /* normal return */
3594 * md_estimate_size_before_relax()
3596 * Called just before relax().
3597 * Any symbol that is now undefined will not become defined.
3598 * Return the correct fr_subtype in the frag.
3599 * Return the initial "guess for fr_var" to caller.
3600 * The guess for fr_var is ACTUALLY the growth beyond fr_fix.
3601 * Whatever we do to grow fr_fix or fr_var contributes to our returned value.
3602 * Although it may not be explicit in the frag, pretend fr_var starts with a
3606 md_estimate_size_before_relax (fragP
, segment
)
3607 register fragS
*fragP
;
3608 register segT segment
;
3610 register unsigned char *opcode
;
3611 register int old_fr_fix
;
3613 old_fr_fix
= fragP
->fr_fix
;
3614 opcode
= (unsigned char *) fragP
->fr_opcode
;
3615 /* We've already got fragP->fr_subtype right; all we have to do is
3616 check for un-relaxable symbols. */
3617 if (S_GET_SEGMENT (fragP
->fr_symbol
) != segment
)
3619 /* symbol is undefined in this segment */
3620 int code16
= fragP
->fr_subtype
& CODE16
;
3621 int size
= code16
? 2 : 4;
3622 int pcrel_reloc
= code16
? BFD_RELOC_16_PCREL
: BFD_RELOC_32_PCREL
;
3626 case JUMP_PC_RELATIVE
: /* make jmp (0xeb) a dword displacement jump */
3627 opcode
[0] = 0xe9; /* dword disp jmp */
3628 fragP
->fr_fix
+= size
;
3629 fix_new (fragP
, old_fr_fix
, size
,
3631 fragP
->fr_offset
, 1,
3632 (GOT_symbol
&& /* Not quite right - we should switch on
3633 presence of @PLT, but I cannot see how
3634 to get to that from here. We should have
3635 done this in md_assemble to really
3636 get it right all of the time, but I
3637 think it does not matter that much, as
3638 this will be right most of the time. ERY*/
3639 S_GET_SEGMENT(fragP
->fr_symbol
) == undefined_section
)
3640 ? BFD_RELOC_386_PLT32
: pcrel_reloc
);
3644 /* This changes the byte-displacement jump 0x7N
3645 to the dword-displacement jump 0x0f8N. */
3646 opcode
[1] = opcode
[0] + 0x10;
3647 opcode
[0] = TWO_BYTE_OPCODE_ESCAPE
; /* two-byte escape */
3648 fragP
->fr_fix
+= 1 + size
; /* we've added an opcode byte */
3649 fix_new (fragP
, old_fr_fix
+ 1, size
,
3651 fragP
->fr_offset
, 1,
3652 (GOT_symbol
&& /* Not quite right - we should switch on
3653 presence of @PLT, but I cannot see how
3654 to get to that from here. ERY */
3655 S_GET_SEGMENT(fragP
->fr_symbol
) == undefined_section
)
3656 ? BFD_RELOC_386_PLT32
: pcrel_reloc
);
3661 return (fragP
->fr_var
+ fragP
->fr_fix
- old_fr_fix
);
3662 } /* md_estimate_size_before_relax() */
3665 * md_convert_frag();
3667 * Called after relax() is finished.
3668 * In: Address of frag.
3669 * fr_type == rs_machine_dependent.
3670 * fr_subtype is what the address relaxed to.
3672 * Out: Any fixSs and constants are set up.
3673 * Caller will turn frag into a ".space 0".
3675 #ifndef BFD_ASSEMBLER
3677 md_convert_frag (headers
, sec
, fragP
)
3678 object_headers
*headers ATTRIBUTE_UNUSED
;
3679 segT sec ATTRIBUTE_UNUSED
;
3680 register fragS
*fragP
;
3683 md_convert_frag (abfd
, sec
, fragP
)
3684 bfd
*abfd ATTRIBUTE_UNUSED
;
3685 segT sec ATTRIBUTE_UNUSED
;
3686 register fragS
*fragP
;
3689 register unsigned char *opcode
;
3690 unsigned char *where_to_put_displacement
= NULL
;
3691 unsigned int target_address
;
3692 unsigned int opcode_address
;
3693 unsigned int extension
= 0;
3694 int displacement_from_opcode_start
;
3696 opcode
= (unsigned char *) fragP
->fr_opcode
;
3698 /* Address we want to reach in file space. */
3699 target_address
= S_GET_VALUE (fragP
->fr_symbol
) + fragP
->fr_offset
;
3700 #ifdef BFD_ASSEMBLER /* not needed otherwise? */
3701 target_address
+= symbol_get_frag (fragP
->fr_symbol
)->fr_address
;
3704 /* Address opcode resides at in file space. */
3705 opcode_address
= fragP
->fr_address
+ fragP
->fr_fix
;
3707 /* Displacement from opcode start to fill into instruction. */
3708 displacement_from_opcode_start
= target_address
- opcode_address
;
3710 switch (fragP
->fr_subtype
)
3712 case ENCODE_RELAX_STATE (COND_JUMP
, SMALL
):
3713 case ENCODE_RELAX_STATE (COND_JUMP
, SMALL16
):
3714 case ENCODE_RELAX_STATE (UNCOND_JUMP
, SMALL
):
3715 case ENCODE_RELAX_STATE (UNCOND_JUMP
, SMALL16
):
3716 /* don't have to change opcode */
3717 extension
= 1; /* 1 opcode + 1 displacement */
3718 where_to_put_displacement
= &opcode
[1];
3721 case ENCODE_RELAX_STATE (COND_JUMP
, BIG
):
3722 extension
= 5; /* 2 opcode + 4 displacement */
3723 opcode
[1] = opcode
[0] + 0x10;
3724 opcode
[0] = TWO_BYTE_OPCODE_ESCAPE
;
3725 where_to_put_displacement
= &opcode
[2];
3728 case ENCODE_RELAX_STATE (UNCOND_JUMP
, BIG
):
3729 extension
= 4; /* 1 opcode + 4 displacement */
3731 where_to_put_displacement
= &opcode
[1];
3734 case ENCODE_RELAX_STATE (COND_JUMP
, BIG16
):
3735 extension
= 3; /* 2 opcode + 2 displacement */
3736 opcode
[1] = opcode
[0] + 0x10;
3737 opcode
[0] = TWO_BYTE_OPCODE_ESCAPE
;
3738 where_to_put_displacement
= &opcode
[2];
3741 case ENCODE_RELAX_STATE (UNCOND_JUMP
, BIG16
):
3742 extension
= 2; /* 1 opcode + 2 displacement */
3744 where_to_put_displacement
= &opcode
[1];
3748 BAD_CASE (fragP
->fr_subtype
);
3751 /* now put displacement after opcode */
3752 md_number_to_chars ((char *) where_to_put_displacement
,
3753 (valueT
) (displacement_from_opcode_start
- extension
),
3754 SIZE_FROM_RELAX_STATE (fragP
->fr_subtype
));
3755 fragP
->fr_fix
+= extension
;
3759 int md_short_jump_size
= 2; /* size of byte displacement jmp */
3760 int md_long_jump_size
= 5; /* size of dword displacement jmp */
3761 const int md_reloc_size
= 8; /* Size of relocation record */
3764 md_create_short_jump (ptr
, from_addr
, to_addr
, frag
, to_symbol
)
3766 addressT from_addr
, to_addr
;
3767 fragS
*frag ATTRIBUTE_UNUSED
;
3768 symbolS
*to_symbol ATTRIBUTE_UNUSED
;
3772 offset
= to_addr
- (from_addr
+ 2);
3773 md_number_to_chars (ptr
, (valueT
) 0xeb, 1); /* opcode for byte-disp jump */
3774 md_number_to_chars (ptr
+ 1, (valueT
) offset
, 1);
3778 md_create_long_jump (ptr
, from_addr
, to_addr
, frag
, to_symbol
)
3780 addressT from_addr
, to_addr
;
3786 if (flag_do_long_jump
)
3788 offset
= to_addr
- S_GET_VALUE (to_symbol
);
3789 md_number_to_chars (ptr
, (valueT
) 0xe9, 1);/* opcode for long jmp */
3790 md_number_to_chars (ptr
+ 1, (valueT
) offset
, 4);
3791 fix_new (frag
, (ptr
+ 1) - frag
->fr_literal
, 4,
3792 to_symbol
, (offsetT
) 0, 0, BFD_RELOC_32
);
3796 offset
= to_addr
- (from_addr
+ 5);
3797 md_number_to_chars (ptr
, (valueT
) 0xe9, 1);
3798 md_number_to_chars (ptr
+ 1, (valueT
) offset
, 4);
3802 /* Apply a fixup (fixS) to segment data, once it has been determined
3803 by our caller that we have all the info we need to fix it up.
3805 On the 386, immediates, displacements, and data pointers are all in
3806 the same (little-endian) format, so we don't need to care about which
3810 md_apply_fix3 (fixP
, valp
, seg
)
3811 fixS
*fixP
; /* The fix we're to put in. */
3812 valueT
*valp
; /* Pointer to the value of the bits. */
3813 segT seg ATTRIBUTE_UNUSED
; /* Segment fix is from. */
3815 register char *p
= fixP
->fx_where
+ fixP
->fx_frag
->fr_literal
;
3816 valueT value
= *valp
;
3818 #if defined (BFD_ASSEMBLER) && !defined (TE_Mach)
3821 switch (fixP
->fx_r_type
)
3827 fixP
->fx_r_type
= BFD_RELOC_32_PCREL
;
3830 fixP
->fx_r_type
= BFD_RELOC_16_PCREL
;
3833 fixP
->fx_r_type
= BFD_RELOC_8_PCREL
;
3838 /* This is a hack. There should be a better way to handle this.
3839 This covers for the fact that bfd_install_relocation will
3840 subtract the current location (for partial_inplace, PC relative
3841 relocations); see more below. */
3842 if ((fixP
->fx_r_type
== BFD_RELOC_32_PCREL
3843 || fixP
->fx_r_type
== BFD_RELOC_16_PCREL
3844 || fixP
->fx_r_type
== BFD_RELOC_8_PCREL
)
3848 if (OUTPUT_FLAVOR
== bfd_target_elf_flavour
3850 || OUTPUT_FLAVOR
== bfd_target_coff_flavour
3853 value
+= fixP
->fx_where
+ fixP
->fx_frag
->fr_address
;
3855 #if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
3856 if (OUTPUT_FLAVOR
== bfd_target_elf_flavour
)
3858 segT fseg
= S_GET_SEGMENT (fixP
->fx_addsy
);
3861 || (symbol_section_p (fixP
->fx_addsy
)
3862 && fseg
!= absolute_section
))
3863 && ! S_IS_EXTERNAL (fixP
->fx_addsy
)
3864 && ! S_IS_WEAK (fixP
->fx_addsy
)
3865 && S_IS_DEFINED (fixP
->fx_addsy
)
3866 && ! S_IS_COMMON (fixP
->fx_addsy
))
3868 /* Yes, we add the values in twice. This is because
3869 bfd_perform_relocation subtracts them out again. I think
3870 bfd_perform_relocation is broken, but I don't dare change
3872 value
+= fixP
->fx_where
+ fixP
->fx_frag
->fr_address
;
3876 #if defined (OBJ_COFF) && defined (TE_PE)
3877 /* For some reason, the PE format does not store a section
3878 address offset for a PC relative symbol. */
3879 if (S_GET_SEGMENT (fixP
->fx_addsy
) != seg
)
3880 value
+= md_pcrel_from (fixP
);
3881 else if (S_IS_EXTERNAL (fixP
->fx_addsy
)
3882 || S_IS_WEAK (fixP
->fx_addsy
))
3884 /* We are generating an external relocation for this defined
3885 symbol. We add the address, because
3886 bfd_install_relocation will subtract it. VALUE already
3887 holds the symbol value, because fixup_segment added it
3888 in. We subtract it out, and then we subtract it out
3889 again because bfd_install_relocation will add it in
3891 value
+= md_pcrel_from (fixP
);
3892 value
-= 2 * S_GET_VALUE (fixP
->fx_addsy
);
3897 else if (fixP
->fx_addsy
!= NULL
3898 && S_IS_DEFINED (fixP
->fx_addsy
)
3899 && (S_IS_EXTERNAL (fixP
->fx_addsy
)
3900 || S_IS_WEAK (fixP
->fx_addsy
)))
3902 /* We are generating an external relocation for this defined
3903 symbol. VALUE already holds the symbol value, and
3904 bfd_install_relocation will add it in again. We don't want
3906 value
-= 2 * S_GET_VALUE (fixP
->fx_addsy
);
3910 /* Fix a few things - the dynamic linker expects certain values here,
3911 and we must not dissappoint it. */
3912 #if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
3913 if (OUTPUT_FLAVOR
== bfd_target_elf_flavour
3915 switch (fixP
->fx_r_type
) {
3916 case BFD_RELOC_386_PLT32
:
3917 /* Make the jump instruction point to the address of the operand. At
3918 runtime we merely add the offset to the actual PLT entry. */
3921 case BFD_RELOC_386_GOTPC
:
3923 * This is tough to explain. We end up with this one if we have
3924 * operands that look like "_GLOBAL_OFFSET_TABLE_+[.-.L284]". The goal
3925 * here is to obtain the absolute address of the GOT, and it is strongly
3926 * preferable from a performance point of view to avoid using a runtime
3927 * relocation for this. The actual sequence of instructions often look
3933 * addl $_GLOBAL_OFFSET_TABLE_+[.-.L66],%ebx
3935 * The call and pop essentially return the absolute address of
3936 * the label .L66 and store it in %ebx. The linker itself will
3937 * ultimately change the first operand of the addl so that %ebx points to
3938 * the GOT, but to keep things simple, the .o file must have this operand
3939 * set so that it generates not the absolute address of .L66, but the
3940 * absolute address of itself. This allows the linker itself simply
3941 * treat a GOTPC relocation as asking for a pcrel offset to the GOT to be
3942 * added in, and the addend of the relocation is stored in the operand
3943 * field for the instruction itself.
3945 * Our job here is to fix the operand so that it would add the correct
3946 * offset so that %ebx would point to itself. The thing that is tricky is
3947 * that .-.L66 will point to the beginning of the instruction, so we need
3948 * to further modify the operand so that it will point to itself.
3949 * There are other cases where you have something like:
3951 * .long $_GLOBAL_OFFSET_TABLE_+[.-.L66]
3953 * and here no correction would be required. Internally in the assembler
3954 * we treat operands of this form as not being pcrel since the '.' is
3955 * explicitly mentioned, and I wonder whether it would simplify matters
3956 * to do it this way. Who knows. In earlier versions of the PIC patches,
3957 * the pcrel_adjust field was used to store the correction, but since the
3958 * expression is not pcrel, I felt it would be confusing to do it this way.
3962 case BFD_RELOC_386_GOT32
:
3963 value
= 0; /* Fully resolved at runtime. No addend. */
3965 case BFD_RELOC_386_GOTOFF
:
3968 case BFD_RELOC_VTABLE_INHERIT
:
3969 case BFD_RELOC_VTABLE_ENTRY
:
3976 #endif /* defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF) */
3978 #endif /* defined (BFD_ASSEMBLER) && !defined (TE_Mach) */
3979 md_number_to_chars (p
, value
, fixP
->fx_size
);
3985 /* This is never used. */
3986 long /* Knows about the byte order in a word. */
3987 md_chars_to_number (con
, nbytes
)
3988 unsigned char con
[]; /* Low order byte 1st. */
3989 int nbytes
; /* Number of bytes in the input. */
3992 for (retval
= 0, con
+= nbytes
- 1; nbytes
--; con
--)
3994 retval
<<= BITS_PER_CHAR
;
4002 #define MAX_LITTLENUMS 6
4004 /* Turn the string pointed to by litP into a floating point constant of type
4005 type, and emit the appropriate bytes. The number of LITTLENUMS emitted
4006 is stored in *sizeP . An error message is returned, or NULL on OK. */
4008 md_atof (type
, litP
, sizeP
)
4014 LITTLENUM_TYPE words
[MAX_LITTLENUMS
];
4015 LITTLENUM_TYPE
*wordP
;
4037 return _("Bad call to md_atof ()");
4039 t
= atof_ieee (input_line_pointer
, type
, words
);
4041 input_line_pointer
= t
;
4043 *sizeP
= prec
* sizeof (LITTLENUM_TYPE
);
4044 /* This loops outputs the LITTLENUMs in REVERSE order; in accord with
4045 the bigendian 386. */
4046 for (wordP
= words
+ prec
- 1; prec
--;)
4048 md_number_to_chars (litP
, (valueT
) (*wordP
--), sizeof (LITTLENUM_TYPE
));
4049 litP
+= sizeof (LITTLENUM_TYPE
);
4054 char output_invalid_buf
[8];
4056 static char * output_invalid
PARAMS ((int));
4063 sprintf (output_invalid_buf
, "'%c'", c
);
4065 sprintf (output_invalid_buf
, "(0x%x)", (unsigned) c
);
4066 return output_invalid_buf
;
4070 /* REG_STRING starts *before* REGISTER_PREFIX. */
4072 static const reg_entry
*
4073 parse_register (reg_string
, end_op
)
4077 char *s
= reg_string
;
4079 char reg_name_given
[MAX_REG_NAME_SIZE
+ 1];
4082 /* Skip possible REGISTER_PREFIX and possible whitespace. */
4083 if (*s
== REGISTER_PREFIX
)
4086 if (is_space_char (*s
))
4090 while ((*p
++ = register_chars
[(unsigned char) *s
]) != '\0')
4092 if (p
>= reg_name_given
+ MAX_REG_NAME_SIZE
)
4093 return (const reg_entry
*) NULL
;
4099 r
= (const reg_entry
*) hash_find (reg_hash
, reg_name_given
);
4101 /* Handle floating point regs, allowing spaces in the (i) part. */
4102 if (r
== i386_regtab
/* %st is first entry of table */)
4104 if (is_space_char (*s
))
4109 if (is_space_char (*s
))
4111 if (*s
>= '0' && *s
<= '7')
4113 r
= &i386_float_regtab
[*s
- '0'];
4115 if (is_space_char (*s
))
4123 /* We have "%st(" then garbage */
4124 return (const reg_entry
*) NULL
;
4131 #if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
4132 CONST
char *md_shortopts
= "kmVQ:sq";
4134 CONST
char *md_shortopts
= "m";
4136 struct option md_longopts
[] = {
4137 {NULL
, no_argument
, NULL
, 0}
4139 size_t md_longopts_size
= sizeof (md_longopts
);
4142 md_parse_option (c
, arg
)
4144 char *arg ATTRIBUTE_UNUSED
;
4149 flag_do_long_jump
= 1;
4152 #if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
4153 /* -k: Ignore for FreeBSD compatibility. */
4157 /* -V: SVR4 argument to print version ID. */
4159 print_version_id ();
4162 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
4163 should be emitted or not. FIXME: Not implemented. */
4168 /* -s: On i386 Solaris, this tells the native assembler to use
4169 .stab instead of .stab.excl. We always use .stab anyhow. */
4173 /* -q: On i386 Solaris, this tells the native assembler does
4185 md_show_usage (stream
)
4188 fprintf (stream
, _("\
4189 -m do long jump\n"));
4190 #if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
4191 fprintf (stream
, _("\
4192 -V print assembler version number\n\
4200 #ifdef BFD_ASSEMBLER
4201 #ifdef OBJ_MAYBE_ELF
4202 #ifdef OBJ_MAYBE_COFF
4204 /* Pick the target format to use. */
4207 i386_target_format ()
4209 switch (OUTPUT_FLAVOR
)
4211 case bfd_target_coff_flavour
:
4213 case bfd_target_elf_flavour
:
4214 return "elf32-i386";
4221 #endif /* OBJ_MAYBE_COFF */
4222 #endif /* OBJ_MAYBE_ELF */
4223 #endif /* BFD_ASSEMBLER */
4226 md_undefined_symbol (name
)
4229 if (name
[0] == GLOBAL_OFFSET_TABLE_NAME
[0]
4230 && name
[1] == GLOBAL_OFFSET_TABLE_NAME
[1]
4231 && name
[2] == GLOBAL_OFFSET_TABLE_NAME
[2]
4232 && strcmp (name
, GLOBAL_OFFSET_TABLE_NAME
) == 0)
4236 if (symbol_find (name
))
4237 as_bad (_("GOT already in symbol table"));
4238 GOT_symbol
= symbol_new (name
, undefined_section
,
4239 (valueT
) 0, &zero_address_frag
);
4246 /* Round up a section size to the appropriate boundary. */
4248 md_section_align (segment
, size
)
4249 segT segment ATTRIBUTE_UNUSED
;
4253 #ifdef BFD_ASSEMBLER
4254 /* For a.out, force the section size to be aligned. If we don't do
4255 this, BFD will align it for us, but it will not write out the
4256 final bytes of the section. This may be a bug in BFD, but it is
4257 easier to fix it here since that is how the other a.out targets
4261 align
= bfd_get_section_alignment (stdoutput
, segment
);
4262 size
= ((size
+ (1 << align
) - 1) & ((valueT
) -1 << align
));
4269 /* On the i386, PC-relative offsets are relative to the start of the
4270 next instruction. That is, the address of the offset, plus its
4271 size, since the offset is always the last part of the insn. */
4274 md_pcrel_from (fixP
)
4277 return fixP
->fx_size
+ fixP
->fx_where
+ fixP
->fx_frag
->fr_address
;
4284 int ignore ATTRIBUTE_UNUSED
;
4288 temp
= get_absolute_expression ();
4289 subseg_set (bss_section
, (subsegT
) temp
);
4290 demand_empty_rest_of_line ();
4296 #ifdef BFD_ASSEMBLER
4299 i386_validate_fix (fixp
)
4302 if (fixp
->fx_subsy
&& fixp
->fx_subsy
== GOT_symbol
)
4304 fixp
->fx_r_type
= BFD_RELOC_386_GOTOFF
;
4310 tc_gen_reloc (section
, fixp
)
4311 asection
*section ATTRIBUTE_UNUSED
;
4315 bfd_reloc_code_real_type code
;
4317 switch (fixp
->fx_r_type
)
4319 case BFD_RELOC_386_PLT32
:
4320 case BFD_RELOC_386_GOT32
:
4321 case BFD_RELOC_386_GOTOFF
:
4322 case BFD_RELOC_386_GOTPC
:
4324 case BFD_RELOC_VTABLE_ENTRY
:
4325 case BFD_RELOC_VTABLE_INHERIT
:
4326 code
= fixp
->fx_r_type
;
4331 switch (fixp
->fx_size
)
4334 as_bad (_("Can not do %d byte pc-relative relocation"),
4336 code
= BFD_RELOC_32_PCREL
;
4338 case 1: code
= BFD_RELOC_8_PCREL
; break;
4339 case 2: code
= BFD_RELOC_16_PCREL
; break;
4340 case 4: code
= BFD_RELOC_32_PCREL
; break;
4345 switch (fixp
->fx_size
)
4348 as_bad (_("Can not do %d byte relocation"), fixp
->fx_size
);
4349 code
= BFD_RELOC_32
;
4351 case 1: code
= BFD_RELOC_8
; break;
4352 case 2: code
= BFD_RELOC_16
; break;
4353 case 4: code
= BFD_RELOC_32
; break;
4359 if (code
== BFD_RELOC_32
4361 && fixp
->fx_addsy
== GOT_symbol
)
4362 code
= BFD_RELOC_386_GOTPC
;
4364 rel
= (arelent
*) xmalloc (sizeof (arelent
));
4365 rel
->sym_ptr_ptr
= (asymbol
**) xmalloc (sizeof (asymbol
*));
4366 *rel
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
4368 rel
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
4369 /* HACK: Since i386 ELF uses Rel instead of Rela, encode the
4370 vtable entry to be used in the relocation's section offset. */
4371 if (fixp
->fx_r_type
== BFD_RELOC_VTABLE_ENTRY
)
4372 rel
->address
= fixp
->fx_offset
;
4375 rel
->addend
= fixp
->fx_addnumber
;
4379 rel
->howto
= bfd_reloc_type_lookup (stdoutput
, code
);
4380 if (rel
->howto
== NULL
)
4382 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
4383 _("Cannot represent relocation type %s"),
4384 bfd_get_reloc_code_name (code
));
4385 /* Set howto to a garbage value so that we can keep going. */
4386 rel
->howto
= bfd_reloc_type_lookup (stdoutput
, BFD_RELOC_32
);
4387 assert (rel
->howto
!= NULL
);
4393 #else /* ! BFD_ASSEMBLER */
4395 #if (defined(OBJ_AOUT) | defined(OBJ_BOUT))
4397 tc_aout_fix_to_chars (where
, fixP
, segment_address_in_file
)
4400 relax_addressT segment_address_in_file
;
4403 * In: length of relocation (or of address) in chars: 1, 2 or 4.
4404 * Out: GNU LD relocation length code: 0, 1, or 2.
4407 static const unsigned char nbytes_r_length
[] = {42, 0, 1, 42, 2};
4410 know (fixP
->fx_addsy
!= NULL
);
4412 md_number_to_chars (where
,
4413 (valueT
) (fixP
->fx_frag
->fr_address
4414 + fixP
->fx_where
- segment_address_in_file
),
4417 r_symbolnum
= (S_IS_DEFINED (fixP
->fx_addsy
)
4418 ? S_GET_TYPE (fixP
->fx_addsy
)
4419 : fixP
->fx_addsy
->sy_number
);
4421 where
[6] = (r_symbolnum
>> 16) & 0x0ff;
4422 where
[5] = (r_symbolnum
>> 8) & 0x0ff;
4423 where
[4] = r_symbolnum
& 0x0ff;
4424 where
[7] = ((((!S_IS_DEFINED (fixP
->fx_addsy
)) << 3) & 0x08)
4425 | ((nbytes_r_length
[fixP
->fx_size
] << 1) & 0x06)
4426 | (((fixP
->fx_pcrel
<< 0) & 0x01) & 0x0f));
4429 #endif /* OBJ_AOUT or OBJ_BOUT */
4431 #if defined (I386COFF)
4434 tc_coff_fix2rtype (fixP
)
4437 if (fixP
->fx_r_type
== R_IMAGEBASE
)
4440 return (fixP
->fx_pcrel
?
4441 (fixP
->fx_size
== 1 ? R_PCRBYTE
:
4442 fixP
->fx_size
== 2 ? R_PCRWORD
:
4444 (fixP
->fx_size
== 1 ? R_RELBYTE
:
4445 fixP
->fx_size
== 2 ? R_RELWORD
:
4450 tc_coff_sizemachdep (frag
)
4454 return (frag
->fr_next
->fr_address
- frag
->fr_address
);
4459 #endif /* I386COFF */
4461 #endif /* ! BFD_ASSEMBLER */
4463 /* end of tc-i386.c */