1 /* i386.c -- Assemble code for the Intel 80386
2 Copyright (C) 1989, 1991, 1992, 1993 Free Software Foundation.
4 This file is part of GAS, the GNU Assembler.
6 GAS is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GAS is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GAS; see the file COPYING. If not, write to
18 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
21 Intel 80386 machine specific gas.
22 Written by Eliot Dresselhaus (eliot@mgm.mit.edu).
23 Bugs & suggestions are completely welcome. This is free software.
24 Please help us make it better.
32 #include "opcode/i386.h"
34 /* 'md_assemble ()' gathers together information and puts it into a
39 /* TM holds the template for the insn were currently assembling. */
41 /* SUFFIX holds the opcode suffix (e.g. 'l' for 'movl') if given. */
43 /* Operands are coded with OPERANDS, TYPES, DISPS, IMMS, and REGS. */
45 /* OPERANDS gives the number of given operands. */
46 unsigned int operands
;
48 /* REG_OPERANDS, DISP_OPERANDS, MEM_OPERANDS, IMM_OPERANDS give the number
49 of given register, displacement, memory operands and immediate
51 unsigned int reg_operands
, disp_operands
, mem_operands
, imm_operands
;
53 /* TYPES [i] is the type (see above #defines) which tells us how to
54 search through DISPS [i] & IMMS [i] & REGS [i] for the required
56 unsigned int types
[MAX_OPERANDS
];
58 /* Displacements (if given) for each operand. */
59 expressionS
*disps
[MAX_OPERANDS
];
61 /* Immediate operands (if given) for each operand. */
62 expressionS
*imms
[MAX_OPERANDS
];
64 /* Register operands (if given) for each operand. */
65 reg_entry
*regs
[MAX_OPERANDS
];
67 /* BASE_REG, INDEX_REG, and LOG2_SCALE_FACTOR are used to encode
68 the base index byte below. */
71 unsigned int log2_scale_factor
;
73 /* SEG gives the seg_entry of this insn. It is equal to zero unless
74 an explicit segment override is given. */
75 const seg_entry
*seg
; /* segment for memory operands (if given) */
77 /* PREFIX holds all the given prefix opcodes (usually null).
78 PREFIXES is the size of PREFIX. */
79 /* richfix: really unsigned? */
80 unsigned char prefix
[MAX_PREFIXES
];
81 unsigned int prefixes
;
83 /* RM and IB are the modrm byte and the base index byte where the
84 addressing modes of this insn are encoded. */
90 typedef struct _i386_insn i386_insn
;
92 /* This array holds the chars that always start a comment. If the
93 pre-processor is disabled, these aren't very useful */
95 const char comment_chars
[] = "#/";
97 const char comment_chars
[] = "#";
100 /* This array holds the chars that only start a comment at the beginning of
101 a line. If the line seems to have the form '# 123 filename'
102 .line and .file directives will appear in the pre-processed output */
103 /* Note that input_file.c hand checks for '#' at the beginning of the
104 first line of the input file. This is because the compiler outputs
105 #NO_APP at the beginning of its output. */
106 /* Also note that comments started like this one will always work if
107 '/' isn't otherwise defined. */
108 const char line_comment_chars
[] = "/"; /* removed '#' xoxorich. */
109 const char line_separator_chars
[] = "";
111 /* Chars that can be used to separate mant from exp in floating point nums */
112 const char EXP_CHARS
[] = "eE";
114 /* Chars that mean this number is a floating point constant */
117 const char FLT_CHARS
[] = "fFdDxX";
119 /* tables for lexical analysis */
120 static char opcode_chars
[256];
121 static char register_chars
[256];
122 static char operand_chars
[256];
123 static char space_chars
[256];
124 static char identifier_chars
[256];
125 static char digit_chars
[256];
128 #define is_opcode_char(x) (opcode_chars[(unsigned char) x])
129 #define is_operand_char(x) (operand_chars[(unsigned char) x])
130 #define is_register_char(x) (register_chars[(unsigned char) x])
131 #define is_space_char(x) (space_chars[(unsigned char) x])
132 #define is_identifier_char(x) (identifier_chars[(unsigned char) x])
133 #define is_digit_char(x) (digit_chars[(unsigned char) x])
135 /* put here all non-digit non-letter charcters that may occur in an operand */
136 static char operand_special_chars
[] = "%$-+(,)*._~/<>|&^!:";
138 static char *ordinal_names
[] = {"first", "second", "third"}; /* for printfs */
140 /* md_assemble() always leaves the strings it's passed unaltered. To
141 effect this we maintain a stack of saved characters that we've smashed
142 with '\0's (indicating end of strings for various sub-fields of the
143 assembler instruction). */
144 static char save_stack
[32];
145 static char *save_stack_p
; /* stack pointer */
146 #define END_STRING_AND_SAVE(s) *save_stack_p++ = *s; *s = '\0'
147 #define RESTORE_END_STRING(s) *s = *--save_stack_p
149 /* The instruction we're assembling. */
152 /* Per instruction expressionS buffers: 2 displacements & 2 immediate max. */
153 static expressionS disp_expressions
[2], im_expressions
[2];
155 /* pointers to ebp & esp entries in reg_hash hash table */
156 static reg_entry
*ebp
, *esp
;
158 static int this_operand
; /* current operand we are working on */
160 /* Interface to relax_segment.
161 There are 2 relax states for 386 jump insns: one for conditional &
162 one for unconditional jumps. This is because the these two types
163 of jumps add different sizes to frags when we're figuring out what
164 sort of jump to choose to reach a given label. */
167 #define COND_JUMP 1 /* conditional jump */
168 #define UNCOND_JUMP 2 /* unconditional jump */
173 #define UNKNOWN_SIZE 3
177 #define INLINE __inline__
183 #define ENCODE_RELAX_STATE(type,size) ((type<<2) | (size))
184 #define SIZE_FROM_RELAX_STATE(s) \
185 ( (((s) & 0x3) == BYTE ? 1 : (((s) & 0x3) == WORD ? 2 : 4)) )
187 const relax_typeS md_relax_table
[] =
190 1) most positive reach of this state,
191 2) most negative reach of this state,
192 3) how many bytes this mode will add to the size of the current frag
193 4) which index into the table to try if we can't fit into this one.
200 /* For now we don't use word displacement jumps; they may be
202 {127 + 1, -128 + 1, 0, ENCODE_RELAX_STATE (COND_JUMP
, DWORD
)},
203 /* word conditionals add 3 bytes to frag:
204 2 opcode prefix; 1 displacement bytes */
205 {32767 + 2, -32768 + 2, 3, ENCODE_RELAX_STATE (COND_JUMP
, DWORD
)},
206 /* dword conditionals adds 4 bytes to frag:
207 1 opcode prefix; 3 displacement bytes */
211 {127 + 1, -128 + 1, 0, ENCODE_RELAX_STATE (UNCOND_JUMP
, DWORD
)},
212 /* word jmp adds 2 bytes to frag:
213 1 opcode prefix; 1 displacement bytes */
214 {32767 + 2, -32768 + 2, 2, ENCODE_RELAX_STATE (UNCOND_JUMP
, DWORD
)},
215 /* dword jmp adds 3 bytes to frag:
216 0 opcode prefix; 3 displacement bytes */
222 static char *output_invalid
PARAMS ((int c
));
223 static int i386_operand
PARAMS ((char *operand_string
));
224 static reg_entry
*parse_register
PARAMS ((char *reg_string
));
226 static void s_bss
PARAMS ((void));
229 static INLINE
unsigned long
230 mode_from_disp_size (t
)
233 return (t
& Disp8
) ? 1 : (t
& Disp32
) ? 2 : 0;
236 /* convert opcode suffix ('b' 'w' 'l' typically) into type specifier */
238 static INLINE
unsigned long
239 opcode_suffix_to_type (s
)
242 return (s
== BYTE_OPCODE_SUFFIX
243 ? Byte
: (s
== WORD_OPCODE_SUFFIX
245 } /* opcode_suffix_to_type() */
248 fits_in_signed_byte (num
)
251 return (num
>= -128) && (num
<= 127);
252 } /* fits_in_signed_byte() */
255 fits_in_unsigned_byte (num
)
258 return (num
& 0xff) == num
;
259 } /* fits_in_unsigned_byte() */
262 fits_in_unsigned_word (num
)
265 return (num
& 0xffff) == num
;
266 } /* fits_in_unsigned_word() */
269 fits_in_signed_word (num
)
272 return (-32768 <= num
) && (num
<= 32767);
273 } /* fits_in_signed_word() */
276 smallest_imm_type (num
)
280 ? (Imm1
| Imm8
| Imm8S
| Imm16
| Imm32
)
281 : fits_in_signed_byte (num
)
282 ? (Imm8S
| Imm8
| Imm16
| Imm32
)
283 : fits_in_unsigned_byte (num
)
284 ? (Imm8
| Imm16
| Imm32
)
285 : (fits_in_signed_word (num
) || fits_in_unsigned_word (num
))
288 } /* smallest_imm_type() */
290 /* Ignore certain directives generated by gcc. This probably should
295 while (*input_line_pointer
&& *input_line_pointer
!= '\n')
296 input_line_pointer
++;
299 const pseudo_typeS md_pseudo_table
[] =
305 {"align", s_align_bytes
, 0},
307 {"align", s_align_ptwo
, 0},
309 {"ffloat", float_cons
, 'f'},
310 {"dfloat", float_cons
, 'd'},
311 {"tfloat", float_cons
, 'x'},
313 {"noopt", s_ignore
, 0},
314 {"optim", s_ignore
, 0},
318 /* for interface with expression () */
319 extern char *input_line_pointer
;
321 /* obstack for constructing various things in md_begin */
324 /* hash table for opcode lookup */
325 static struct hash_control
*op_hash
= (struct hash_control
*) 0;
326 /* hash table for register lookup */
327 static struct hash_control
*reg_hash
= (struct hash_control
*) 0;
328 /* hash table for prefix lookup */
329 static struct hash_control
*prefix_hash
= (struct hash_control
*) 0;
337 obstack_begin (&o
, 4096);
339 /* initialize op_hash hash table */
340 op_hash
= hash_new (); /* xmalloc handles error */
343 register const template *optab
;
344 register templates
*core_optab
;
347 optab
= i386_optab
; /* setup for loop */
348 prev_name
= optab
->name
;
349 obstack_grow (&o
, optab
, sizeof (template));
350 core_optab
= (templates
*) xmalloc (sizeof (templates
));
352 for (optab
++; optab
< i386_optab_end
; optab
++)
354 if (!strcmp (optab
->name
, prev_name
))
356 /* same name as before --> append to current template list */
357 obstack_grow (&o
, optab
, sizeof (template));
361 /* different name --> ship out current template list;
362 add to hash table; & begin anew */
363 /* Note: end must be set before start! since obstack_next_free
364 changes upon opstack_finish */
365 core_optab
->end
= (template *) obstack_next_free (&o
);
366 core_optab
->start
= (template *) obstack_finish (&o
);
367 hash_err
= hash_insert (op_hash
, prev_name
, (char *) core_optab
);
368 if (hash_err
&& *hash_err
)
371 as_fatal ("Internal Error: Can't hash %s: %s", prev_name
,
374 prev_name
= optab
->name
;
375 core_optab
= (templates
*) xmalloc (sizeof (templates
));
376 obstack_grow (&o
, optab
, sizeof (template));
381 /* initialize reg_hash hash table */
382 reg_hash
= hash_new ();
384 register const reg_entry
*regtab
;
386 for (regtab
= i386_regtab
; regtab
< i386_regtab_end
; regtab
++)
388 hash_err
= hash_insert (reg_hash
, regtab
->reg_name
, regtab
);
389 if (hash_err
&& *hash_err
)
394 esp
= (reg_entry
*) hash_find (reg_hash
, "esp");
395 ebp
= (reg_entry
*) hash_find (reg_hash
, "ebp");
397 /* initialize reg_hash hash table */
398 prefix_hash
= hash_new ();
400 register const prefix_entry
*prefixtab
;
402 for (prefixtab
= i386_prefixtab
;
403 prefixtab
< i386_prefixtab_end
; prefixtab
++)
405 hash_err
= hash_insert (prefix_hash
, prefixtab
->prefix_name
, prefixtab
);
406 if (hash_err
&& *hash_err
)
411 /* fill in lexical tables: opcode_chars, operand_chars, space_chars */
413 register unsigned int c
;
415 memset (opcode_chars
, '\0', sizeof (opcode_chars
));
416 memset (operand_chars
, '\0', sizeof (operand_chars
));
417 memset (space_chars
, '\0', sizeof (space_chars
));
418 memset (identifier_chars
, '\0', sizeof (identifier_chars
));
419 memset (digit_chars
, '\0', sizeof (digit_chars
));
421 for (c
= 0; c
< 256; c
++)
423 if (islower (c
) || isdigit (c
))
426 register_chars
[c
] = c
;
428 else if (isupper (c
))
430 opcode_chars
[c
] = tolower (c
);
431 register_chars
[c
] = opcode_chars
[c
];
433 else if (c
== PREFIX_SEPERATOR
)
437 else if (c
== ')' || c
== '(')
439 register_chars
[c
] = c
;
442 if (isupper (c
) || islower (c
) || isdigit (c
))
443 operand_chars
[c
] = c
;
444 else if (c
&& strchr (operand_special_chars
, c
))
445 operand_chars
[c
] = c
;
447 if (isdigit (c
) || c
== '-')
450 if (isalpha (c
) || c
== '_' || c
== '.' || isdigit (c
))
451 identifier_chars
[c
] = c
;
453 if (c
== ' ' || c
== '\t')
462 } /* not much to do here. */
467 /* debugging routines for md_assemble */
468 /* static void pi (), pte (), pt (), pe (), ps (); */
475 register template *p
;
478 fprintf (stdout
, "%s: template ", line
);
480 fprintf (stdout
, " modrm: mode %x reg %x reg/mem %x",
481 x
->rm
.mode
, x
->rm
.reg
, x
->rm
.regmem
);
482 fprintf (stdout
, " base %x index %x scale %x\n",
483 x
->bi
.base
, x
->bi
.index
, x
->bi
.scale
);
484 for (i
= 0; i
< x
->operands
; i
++)
486 fprintf (stdout
, " #%d: ", i
+ 1);
488 fprintf (stdout
, "\n");
489 if (x
->types
[i
] & Reg
)
490 fprintf (stdout
, "%s\n", x
->regs
[i
]->reg_name
);
491 if (x
->types
[i
] & Imm
)
493 if (x
->types
[i
] & (Disp
| Abs
))
503 fprintf (stdout
, " %d operands ", t
->operands
);
504 fprintf (stdout
, "opcode %x ",
506 if (t
->extension_opcode
!= None
)
507 fprintf (stdout
, "ext %x ", t
->extension_opcode
);
508 if (t
->opcode_modifier
& D
)
509 fprintf (stdout
, "D");
510 if (t
->opcode_modifier
& W
)
511 fprintf (stdout
, "W");
512 fprintf (stdout
, "\n");
513 for (i
= 0; i
< t
->operands
; i
++)
515 fprintf (stdout
, " #%d type ", i
+ 1);
516 pt (t
->operand_types
[i
]);
517 fprintf (stdout
, "\n");
525 fprintf (stdout
, " operation %d\n", e
->X_op
);
526 fprintf (stdout
, " add_number %d (%x)\n",
527 e
->X_add_number
, e
->X_add_number
);
530 fprintf (stdout
, " add_symbol ");
531 ps (e
->X_add_symbol
);
532 fprintf (stdout
, "\n");
536 fprintf (stdout
, " op_symbol ");
538 fprintf (stdout
, "\n");
546 fprintf (stdout
, "%s type %s%s",
548 S_IS_EXTERNAL (s
) ? "EXTERNAL " : "",
549 segment_name (S_GET_SEGMENT (s
)));
570 { BaseIndex
, "BaseIndex" },
580 { InOutPortReg
, "InOutPortReg" },
581 { ShiftCount
, "ShiftCount" },
583 { Control
, "control reg" },
584 { Test
, "test reg" },
585 { FloatReg
, "FReg" },
586 { FloatAcc
, "FAcc" },
587 { JumpAbsolute
, "Jump Absolute" },
595 register struct type_name
*ty
;
599 fprintf (stdout
, "Unknown");
603 for (ty
= type_names
; ty
->mask
; ty
++)
605 fprintf (stdout
, "%s, ", ty
->tname
);
610 #endif /* DEBUG386 */
613 static bfd_reloc_code_real_type
621 case 1: return BFD_RELOC_8_PCREL
;
622 case 2: return BFD_RELOC_16_PCREL
;
623 case 4: return BFD_RELOC_32_PCREL
;
628 case 1: return BFD_RELOC_8
;
629 case 2: return BFD_RELOC_16
;
630 case 4: return BFD_RELOC_32
;
636 /* This is the guts of the machine-dependent assembler. LINE points to a
637 machine dependent instruction. This function is supposed to emit
638 the frags/bytes it assembles to. */
643 /* Holds temlate once we've found it. */
644 register template *t
;
646 /* Possible templates for current insn */
647 templates
*current_templates
= (templates
*) 0;
649 /* Initialize globals. */
650 memset (&i
, '\0', sizeof (i
));
651 memset (disp_expressions
, '\0', sizeof (disp_expressions
));
652 memset (im_expressions
, '\0', sizeof (im_expressions
));
653 save_stack_p
= save_stack
; /* reset stack pointer */
655 /* Fist parse an opcode & call i386_operand for the operands.
656 We assume that the scrubber has arranged it so that line[0] is the valid
657 start of a (possibly prefixed) opcode. */
659 register char *l
= line
; /* Fast place to put LINE. */
661 /* 1 if operand is pending after ','. */
662 unsigned int expecting_operand
= 0;
663 /* 1 if we found a prefix only acceptable with string insns. */
664 unsigned int expecting_string_instruction
= 0;
665 /* Non-zero if operand parens not balenced. */
666 unsigned int paren_not_balenced
;
667 char *token_start
= l
;
669 while (!is_space_char (*l
) && *l
!= END_OF_INSN
)
671 if (!is_opcode_char (*l
))
673 as_bad ("invalid character %s in opcode", output_invalid (*l
));
676 else if (*l
!= PREFIX_SEPERATOR
)
678 *l
= opcode_chars
[(unsigned char) *l
]; /* fold case of opcodes */
682 { /* this opcode's got a prefix */
683 register unsigned int q
;
684 register prefix_entry
*prefix
;
686 if (l
== token_start
)
688 as_bad ("expecting prefix; got nothing");
691 END_STRING_AND_SAVE (l
);
692 prefix
= (prefix_entry
*) hash_find (prefix_hash
, token_start
);
695 as_bad ("no such opcode prefix ('%s')", token_start
);
698 RESTORE_END_STRING (l
);
699 /* check for repeated prefix */
700 for (q
= 0; q
< i
.prefixes
; q
++)
701 if (i
.prefix
[q
] == prefix
->prefix_code
)
703 as_bad ("same prefix used twice; you don't really want this!");
706 if (i
.prefixes
== MAX_PREFIXES
)
708 as_bad ("too many opcode prefixes");
711 i
.prefix
[i
.prefixes
++] = prefix
->prefix_code
;
712 if (prefix
->prefix_code
== REPE
|| prefix
->prefix_code
== REPNE
)
713 expecting_string_instruction
= 1;
714 /* skip past PREFIX_SEPERATOR and reset token_start */
718 END_STRING_AND_SAVE (l
);
719 if (token_start
== l
)
721 as_bad ("expecting opcode; got nothing");
725 /* Lookup insn in hash; try intel & att naming conventions if appropriate;
726 that is: we only use the opcode suffix 'b' 'w' or 'l' if we need to. */
727 current_templates
= (templates
*) hash_find (op_hash
, token_start
);
728 if (!current_templates
)
730 int last_index
= strlen (token_start
) - 1;
731 char last_char
= token_start
[last_index
];
734 case DWORD_OPCODE_SUFFIX
:
735 case WORD_OPCODE_SUFFIX
:
736 case BYTE_OPCODE_SUFFIX
:
737 token_start
[last_index
] = '\0';
738 current_templates
= (templates
*) hash_find (op_hash
, token_start
);
739 token_start
[last_index
] = last_char
;
740 i
.suffix
= last_char
;
742 if (!current_templates
)
744 as_bad ("no such 386 instruction: `%s'", token_start
);
748 RESTORE_END_STRING (l
);
750 /* check for rep/repne without a string instruction */
751 if (expecting_string_instruction
&&
752 !IS_STRING_INSTRUCTION (current_templates
->
755 as_bad ("expecting string instruction after rep/repne");
759 /* There may be operands to parse. */
760 if (*l
!= END_OF_INSN
&&
761 /* For string instructions, we ignore any operands if given. This
762 kludges, for example, 'rep/movsb %ds:(%esi), %es:(%edi)' where
763 the operands are always going to be the same, and are not really
764 encoded in machine code. */
765 !IS_STRING_INSTRUCTION (current_templates
->
771 /* skip optional white space before operand */
772 while (!is_operand_char (*l
) && *l
!= END_OF_INSN
)
774 if (!is_space_char (*l
))
776 as_bad ("invalid character %s before %s operand",
778 ordinal_names
[i
.operands
]);
783 token_start
= l
; /* after white space */
784 paren_not_balenced
= 0;
785 while (paren_not_balenced
|| *l
!= ',')
787 if (*l
== END_OF_INSN
)
789 if (paren_not_balenced
)
791 as_bad ("unbalenced parenthesis in %s operand.",
792 ordinal_names
[i
.operands
]);
796 break; /* we are done */
798 else if (!is_operand_char (*l
))
800 as_bad ("invalid character %s in %s operand",
802 ordinal_names
[i
.operands
]);
806 ++paren_not_balenced
;
808 --paren_not_balenced
;
811 if (l
!= token_start
)
812 { /* yes, we've read in another operand */
813 unsigned int operand_ok
;
814 this_operand
= i
.operands
++;
815 if (i
.operands
> MAX_OPERANDS
)
817 as_bad ("spurious operands; (%d operands/instruction max)",
821 /* now parse operand adding info to 'i' as we go along */
822 END_STRING_AND_SAVE (l
);
823 operand_ok
= i386_operand (token_start
);
824 RESTORE_END_STRING (l
); /* restore old contents */
830 if (expecting_operand
)
832 expecting_operand_after_comma
:
833 as_bad ("expecting operand after ','; got nothing");
838 as_bad ("expecting operand before ','; got nothing");
843 /* now *l must be either ',' or END_OF_INSN */
846 if (*++l
== END_OF_INSN
)
847 { /* just skip it, if it's \n complain */
848 goto expecting_operand_after_comma
;
850 expecting_operand
= 1;
853 while (*l
!= END_OF_INSN
); /* until we get end of insn */
857 /* Now we've parsed the opcode into a set of templates, and have the
860 Next, we find a template that matches the given insn,
861 making sure the overlap of the given operands types is consistent
862 with the template operand types. */
864 #define MATCH(overlap,given_type) \
866 (((overlap & (JumpAbsolute|BaseIndex|Mem8)) \
867 == (given_type & (JumpAbsolute|BaseIndex|Mem8))) \
868 || (overlap == InOutPortReg)))
871 /* If m0 and m1 are register matches they must be consistent
872 with the expected operand types t0 and t1.
873 That is, if both m0 & m1 are register matches
874 i.e. ( ((m0 & (Reg)) && (m1 & (Reg)) ) ?
875 then, either 1. or 2. must be true:
876 1. the expected operand type register overlap is null:
879 the given register overlap is null:
881 2. the expected operand type register overlap == the given
882 operand type overlap: (t0 & t1 & m0 & m1 & Reg).
884 #define CONSISTENT_REGISTER_MATCH(m0, m1, t0, t1) \
885 ( ((m0 & (Reg)) && (m1 & (Reg))) ? \
886 ( ((t0 & t1 & (Reg)) == 0 && (m0 & m1 & (Reg)) == 0) || \
887 ((t0 & t1) & (m0 & m1) & (Reg)) \
890 register unsigned int overlap0
, overlap1
;
892 unsigned int overlap2
;
893 unsigned int found_reverse_match
;
895 overlap0
= overlap1
= overlap2
= found_reverse_match
= 0;
896 for (t
= current_templates
->start
;
897 t
< current_templates
->end
;
901 /* must have right number of operands */
902 if (i
.operands
!= t
->operands
)
904 else if (!t
->operands
)
905 break; /* 0 operands always matches */
907 overlap0
= i
.types
[0] & t
->operand_types
[0];
911 if (!MATCH (overlap0
, i
.types
[0]))
916 overlap1
= i
.types
[1] & t
->operand_types
[1];
917 if (!MATCH (overlap0
, i
.types
[0]) ||
918 !MATCH (overlap1
, i
.types
[1]) ||
919 !CONSISTENT_REGISTER_MATCH (overlap0
, overlap1
,
921 t
->operand_types
[1]))
924 /* check if other direction is valid ... */
925 if (!(t
->opcode_modifier
& COMES_IN_BOTH_DIRECTIONS
))
928 /* try reversing direction of operands */
929 overlap0
= i
.types
[0] & t
->operand_types
[1];
930 overlap1
= i
.types
[1] & t
->operand_types
[0];
931 if (!MATCH (overlap0
, i
.types
[0]) ||
932 !MATCH (overlap1
, i
.types
[1]) ||
933 !CONSISTENT_REGISTER_MATCH (overlap0
, overlap1
,
935 t
->operand_types
[1]))
937 /* does not match either direction */
940 /* found a reverse match here -- slip through */
941 /* found_reverse_match holds which of D or FloatD we've found */
942 found_reverse_match
= t
->opcode_modifier
& COMES_IN_BOTH_DIRECTIONS
;
943 } /* endif: not forward match */
944 /* found either forward/reverse 2 operand match here */
945 if (t
->operands
== 3)
947 overlap2
= i
.types
[2] & t
->operand_types
[2];
948 if (!MATCH (overlap2
, i
.types
[2]) ||
949 !CONSISTENT_REGISTER_MATCH (overlap0
, overlap2
,
951 t
->operand_types
[2]) ||
952 !CONSISTENT_REGISTER_MATCH (overlap1
, overlap2
,
954 t
->operand_types
[2]))
957 /* found either forward/reverse 2 or 3 operand match here:
958 slip through to break */
960 break; /* we've found a match; break out of loop */
962 if (t
== current_templates
->end
)
963 { /* we found no match */
964 as_bad ("operands given don't match any known 386 instruction");
968 /* Copy the template we found (we may change it!). */
969 memcpy (&i
.tm
, t
, sizeof (template));
970 t
= &i
.tm
; /* alter new copy of template */
972 /* If there's no opcode suffix we try to invent one based on register
974 if (!i
.suffix
&& i
.reg_operands
)
976 /* We take i.suffix from the LAST register operand specified. This
977 assumes that the last register operands is the destination register
980 for (o
= 0; o
< MAX_OPERANDS
; o
++)
981 if (i
.types
[o
] & Reg
)
983 i
.suffix
= (i
.types
[o
] == Reg8
) ? BYTE_OPCODE_SUFFIX
:
984 (i
.types
[o
] == Reg16
) ? WORD_OPCODE_SUFFIX
:
989 /* Make still unresolved immediate matches conform to size of immediate
990 given in i.suffix. Note: overlap2 cannot be an immediate!
992 if ((overlap0
& (Imm8
| Imm8S
| Imm16
| Imm32
))
993 && overlap0
!= Imm8
&& overlap0
!= Imm8S
994 && overlap0
!= Imm16
&& overlap0
!= Imm32
)
998 as_bad ("no opcode suffix given; can't determine immediate size");
1001 overlap0
&= (i
.suffix
== BYTE_OPCODE_SUFFIX
? (Imm8
| Imm8S
) :
1002 (i
.suffix
== WORD_OPCODE_SUFFIX
? Imm16
: Imm32
));
1004 if ((overlap1
& (Imm8
| Imm8S
| Imm16
| Imm32
))
1005 && overlap1
!= Imm8
&& overlap1
!= Imm8S
1006 && overlap1
!= Imm16
&& overlap1
!= Imm32
)
1010 as_bad ("no opcode suffix given; can't determine immediate size");
1013 overlap1
&= (i
.suffix
== BYTE_OPCODE_SUFFIX
? (Imm8
| Imm8S
) :
1014 (i
.suffix
== WORD_OPCODE_SUFFIX
? Imm16
: Imm32
));
1017 i
.types
[0] = overlap0
;
1018 i
.types
[1] = overlap1
;
1019 i
.types
[2] = overlap2
;
1021 if (overlap0
& ImplicitRegister
)
1023 if (overlap1
& ImplicitRegister
)
1025 if (overlap2
& ImplicitRegister
)
1027 if (overlap0
& Imm1
)
1028 i
.imm_operands
= 0; /* kludge for shift insns */
1030 if (found_reverse_match
)
1033 save
= t
->operand_types
[0];
1034 t
->operand_types
[0] = t
->operand_types
[1];
1035 t
->operand_types
[1] = save
;
1038 /* Finalize opcode. First, we change the opcode based on the operand
1039 size given by i.suffix: we never have to change things for byte insns,
1040 or when no opcode suffix is need to size the operands. */
1042 if (!i
.suffix
&& (t
->opcode_modifier
& W
))
1044 as_bad ("no opcode suffix given and no register operands; can't size instruction");
1048 if (i
.suffix
&& i
.suffix
!= BYTE_OPCODE_SUFFIX
)
1050 /* Select between byte and word/dword operations. */
1051 if (t
->opcode_modifier
& W
)
1052 t
->base_opcode
|= W
;
1053 /* Now select between word & dword operations via the
1054 operand size prefix. */
1055 if (i
.suffix
== WORD_OPCODE_SUFFIX
)
1057 if (i
.prefixes
== MAX_PREFIXES
)
1059 as_bad ("%d prefixes given and 'w' opcode suffix gives too many prefixes",
1063 i
.prefix
[i
.prefixes
++] = WORD_PREFIX_OPCODE
;
1067 /* For insns with operands there are more diddles to do to the opcode. */
1070 /* If we found a reverse match we must alter the opcode direction bit
1071 found_reverse_match holds bit to set (different for int &
1074 if (found_reverse_match
)
1076 t
->base_opcode
|= found_reverse_match
;
1079 /* The imul $imm, %reg instruction is converted into
1080 imul $imm, %reg, %reg. */
1081 if (t
->opcode_modifier
& imulKludge
)
1083 /* Pretend we saw the 3 operand case. */
1084 i
.regs
[2] = i
.regs
[1];
1088 /* Certain instructions expect the destination to be in the i.rm.reg
1089 field. This is by far the exceptional case. For these
1090 instructions, if the source operand is a register, we must reverse
1091 the i.rm.reg and i.rm.regmem fields. We accomplish this by faking
1092 that the two register operands were given in the reverse order. */
1093 if ((t
->opcode_modifier
& ReverseRegRegmem
) && i
.reg_operands
== 2)
1095 unsigned int first_reg_operand
= (i
.types
[0] & Reg
) ? 0 : 1;
1096 unsigned int second_reg_operand
= first_reg_operand
+ 1;
1097 reg_entry
*tmp
= i
.regs
[first_reg_operand
];
1098 i
.regs
[first_reg_operand
] = i
.regs
[second_reg_operand
];
1099 i
.regs
[second_reg_operand
] = tmp
;
1102 if (t
->opcode_modifier
& ShortForm
)
1104 /* The register or float register operand is in operand 0 or 1. */
1105 unsigned int o
= (i
.types
[0] & (Reg
| FloatReg
)) ? 0 : 1;
1106 /* Register goes in low 3 bits of opcode. */
1107 t
->base_opcode
|= i
.regs
[o
]->reg_num
;
1109 else if (t
->opcode_modifier
& ShortFormW
)
1111 /* Short form with 0x8 width bit. Register is always dest. operand */
1112 t
->base_opcode
|= i
.regs
[1]->reg_num
;
1113 if (i
.suffix
== WORD_OPCODE_SUFFIX
||
1114 i
.suffix
== DWORD_OPCODE_SUFFIX
)
1115 t
->base_opcode
|= 0x8;
1117 else if (t
->opcode_modifier
& Seg2ShortForm
)
1119 if (t
->base_opcode
== POP_SEG_SHORT
&& i
.regs
[0]->reg_num
== 1)
1121 as_bad ("you can't 'pop cs' on the 386.");
1124 t
->base_opcode
|= (i
.regs
[0]->reg_num
<< 3);
1126 else if (t
->opcode_modifier
& Seg3ShortForm
)
1128 /* 'push %fs' is 0x0fa0; 'pop %fs' is 0x0fa1.
1129 'push %gs' is 0x0fa8; 'pop %fs' is 0x0fa9.
1130 So, only if i.regs[0]->reg_num == 5 (%gs) do we need
1131 to change the opcode. */
1132 if (i
.regs
[0]->reg_num
== 5)
1133 t
->base_opcode
|= 0x08;
1135 else if (t
->opcode_modifier
& Modrm
)
1137 /* The opcode is completed (modulo t->extension_opcode which must
1138 be put into the modrm byte.
1139 Now, we make the modrm & index base bytes based on all the info
1142 /* i.reg_operands MUST be the number of real register operands;
1143 implicit registers do not count. */
1144 if (i
.reg_operands
== 2)
1146 unsigned int source
, dest
;
1147 source
= (i
.types
[0] & (Reg
| SReg2
| SReg3
| Control
| Debug
| Test
)) ? 0 : 1;
1150 /* We must be careful to make sure that all
1151 segment/control/test/debug registers go into the i.rm.reg
1152 field (despite the whether they are source or destination
1154 if (i
.regs
[dest
]->reg_type
& (SReg2
| SReg3
| Control
| Debug
| Test
))
1156 i
.rm
.reg
= i
.regs
[dest
]->reg_num
;
1157 i
.rm
.regmem
= i
.regs
[source
]->reg_num
;
1161 i
.rm
.reg
= i
.regs
[source
]->reg_num
;
1162 i
.rm
.regmem
= i
.regs
[dest
]->reg_num
;
1166 { /* if it's not 2 reg operands... */
1169 unsigned int fake_zero_displacement
= 0;
1170 unsigned int o
= (i
.types
[0] & Mem
) ? 0 : ((i
.types
[1] & Mem
) ? 1 : 2);
1172 /* Encode memory operand into modrm byte and base index
1175 if (i
.base_reg
== esp
&& !i
.index_reg
)
1177 /* <disp>(%esp) becomes two byte modrm with no index
1179 i
.rm
.regmem
= ESCAPE_TO_TWO_BYTE_ADDRESSING
;
1180 i
.rm
.mode
= mode_from_disp_size (i
.types
[o
]);
1181 i
.bi
.base
= ESP_REG_NUM
;
1182 i
.bi
.index
= NO_INDEX_REGISTER
;
1183 i
.bi
.scale
= 0; /* Must be zero! */
1185 else if (i
.base_reg
== ebp
&& !i
.index_reg
)
1187 if (!(i
.types
[o
] & Disp
))
1189 /* Must fake a zero byte displacement. There is
1190 no direct way to code '(%ebp)' directly. */
1191 fake_zero_displacement
= 1;
1192 /* fake_zero_displacement code does not set this. */
1193 i
.types
[o
] |= Disp8
;
1195 i
.rm
.mode
= mode_from_disp_size (i
.types
[o
]);
1196 i
.rm
.regmem
= EBP_REG_NUM
;
1198 else if (!i
.base_reg
&& (i
.types
[o
] & BaseIndex
))
1200 /* There are three cases here.
1201 Case 1: '<32bit disp>(,1)' -- indirect absolute.
1202 (Same as cases 2 & 3 with NO index register)
1203 Case 2: <32bit disp> (,<index>) -- no base register with disp
1204 Case 3: (, <index>) --- no base register;
1205 no disp (must add 32bit 0 disp). */
1206 i
.rm
.regmem
= ESCAPE_TO_TWO_BYTE_ADDRESSING
;
1207 i
.rm
.mode
= 0; /* 32bit mode */
1208 i
.bi
.base
= NO_BASE_REGISTER
;
1209 i
.types
[o
] &= ~Disp
;
1210 i
.types
[o
] |= Disp32
; /* Must be 32bit! */
1212 { /* case 2 or case 3 */
1213 i
.bi
.index
= i
.index_reg
->reg_num
;
1214 i
.bi
.scale
= i
.log2_scale_factor
;
1215 if (i
.disp_operands
== 0)
1216 fake_zero_displacement
= 1; /* case 3 */
1220 i
.bi
.index
= NO_INDEX_REGISTER
;
1224 else if (i
.disp_operands
&& !i
.base_reg
&& !i
.index_reg
)
1226 /* Operand is just <32bit disp> */
1227 i
.rm
.regmem
= EBP_REG_NUM
;
1229 i
.types
[o
] &= ~Disp
;
1230 i
.types
[o
] |= Disp32
;
1234 /* It's not a special case; rev'em up. */
1235 i
.rm
.regmem
= i
.base_reg
->reg_num
;
1236 i
.rm
.mode
= mode_from_disp_size (i
.types
[o
]);
1239 i
.rm
.regmem
= ESCAPE_TO_TWO_BYTE_ADDRESSING
;
1240 i
.bi
.base
= i
.base_reg
->reg_num
;
1241 i
.bi
.index
= i
.index_reg
->reg_num
;
1242 i
.bi
.scale
= i
.log2_scale_factor
;
1243 if (i
.base_reg
== ebp
&& i
.disp_operands
== 0)
1245 fake_zero_displacement
= 1;
1246 i
.types
[o
] |= Disp8
;
1247 i
.rm
.mode
= mode_from_disp_size (i
.types
[o
]);
1251 if (fake_zero_displacement
)
1253 /* Fakes a zero displacement assuming that i.types[o]
1254 holds the correct displacement size. */
1255 exp
= &disp_expressions
[i
.disp_operands
++];
1257 exp
->X_op
= O_constant
;
1258 exp
->X_add_number
= 0;
1259 exp
->X_add_symbol
= (symbolS
*) 0;
1260 exp
->X_op_symbol
= (symbolS
*) 0;
1263 /* Select the correct segment for the memory operand. */
1266 unsigned int seg_index
;
1267 const seg_entry
*default_seg
;
1269 if (i
.rm
.regmem
== ESCAPE_TO_TWO_BYTE_ADDRESSING
)
1271 seg_index
= (i
.rm
.mode
<< 3) | i
.bi
.base
;
1272 default_seg
= two_byte_segment_defaults
[seg_index
];
1276 seg_index
= (i
.rm
.mode
<< 3) | i
.rm
.regmem
;
1277 default_seg
= one_byte_segment_defaults
[seg_index
];
1279 /* If the specified segment is not the default, use an
1280 opcode prefix to select it */
1281 if (i
.seg
!= default_seg
)
1283 if (i
.prefixes
== MAX_PREFIXES
)
1285 as_bad ("%d prefixes given and %s segment override gives too many prefixes",
1286 MAX_PREFIXES
, i
.seg
->seg_name
);
1289 i
.prefix
[i
.prefixes
++] = i
.seg
->seg_prefix
;
1294 /* Fill in i.rm.reg or i.rm.regmem field with register operand
1295 (if any) based on t->extension_opcode. Again, we must be
1296 careful to make sure that segment/control/debug/test
1297 registers are coded into the i.rm.reg field. */
1301 (i
.types
[0] & (Reg
| SReg2
| SReg3
| Control
| Debug
| Test
)) ? 0 :
1302 (i
.types
[1] & (Reg
| SReg2
| SReg3
| Control
| Debug
| Test
)) ? 1 : 2;
1303 /* If there is an extension opcode to put here, the
1304 register number must be put into the regmem field. */
1305 if (t
->extension_opcode
!= None
)
1306 i
.rm
.regmem
= i
.regs
[o
]->reg_num
;
1308 i
.rm
.reg
= i
.regs
[o
]->reg_num
;
1310 /* Now, if no memory operand has set i.rm.mode = 0, 1, 2
1311 we must set it to 3 to indicate this is a register
1312 operand int the regmem field */
1313 if (!i
.mem_operands
)
1317 /* Fill in i.rm.reg field with extension opcode (if any). */
1318 if (t
->extension_opcode
!= None
)
1319 i
.rm
.reg
= t
->extension_opcode
;
1325 /* Handle conversion of 'int $3' --> special int3 insn. */
1326 if (t
->base_opcode
== INT_OPCODE
&& i
.imms
[0]->X_add_number
== 3)
1328 t
->base_opcode
= INT3_OPCODE
;
1332 /* We are ready to output the insn. */
1337 if (t
->opcode_modifier
& Jump
)
1339 int n
= i
.disps
[0]->X_add_number
;
1341 if (i
.disps
[0]->X_op
== O_constant
)
1343 if (fits_in_signed_byte (n
))
1346 p
[0] = t
->base_opcode
;
1349 #if 0 /* leave out 16 bit jumps - pace */
1350 else if (fits_in_signed_word (n
))
1353 p
[0] = WORD_PREFIX_OPCODE
;
1354 p
[1] = t
->base_opcode
;
1355 md_number_to_chars (&p
[2], n
, 2);
1359 { /* It's an absolute dword displacement. */
1360 if (t
->base_opcode
== JUMP_PC_RELATIVE
)
1362 /* unconditional jump */
1365 md_number_to_chars (&p
[1], n
, 4);
1369 /* conditional jump */
1371 p
[0] = TWO_BYTE_OPCODE_ESCAPE
;
1372 p
[1] = t
->base_opcode
+ 0x10;
1373 md_number_to_chars (&p
[2], n
, 4);
1379 /* It's a symbol; end frag & setup for relax.
1380 Make sure there are more than 6 chars left in the current frag;
1381 if not we'll have to start a new one. */
1382 if (obstack_room (&frags
) <= 6)
1384 frag_wane (frag_now
);
1388 p
[0] = t
->base_opcode
;
1389 frag_var (rs_machine_dependent
,
1390 6, /* 2 opcode/prefix + 4 displacement */
1392 ((unsigned char) *p
== JUMP_PC_RELATIVE
1393 ? ENCODE_RELAX_STATE (UNCOND_JUMP
, BYTE
)
1394 : ENCODE_RELAX_STATE (COND_JUMP
, BYTE
)),
1395 i
.disps
[0]->X_add_symbol
,
1399 else if (t
->opcode_modifier
& (JumpByte
| JumpDword
))
1401 int size
= (t
->opcode_modifier
& JumpByte
) ? 1 : 4;
1402 int n
= i
.disps
[0]->X_add_number
;
1404 if (fits_in_unsigned_byte (t
->base_opcode
))
1406 FRAG_APPEND_1_CHAR (t
->base_opcode
);
1410 p
= frag_more (2); /* opcode can be at most two bytes */
1411 /* put out high byte first: can't use md_number_to_chars! */
1412 *p
++ = (t
->base_opcode
>> 8) & 0xff;
1413 *p
= t
->base_opcode
& 0xff;
1416 p
= frag_more (size
);
1417 if (i
.disps
[0]->X_op
== O_constant
)
1419 md_number_to_chars (p
, n
, size
);
1420 if (size
== 1 && !fits_in_signed_byte (n
))
1422 as_bad ("loop/jecx only takes byte displacement; %d shortened to %d",
1428 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
, size
,
1429 i
.disps
[0], 1, NO_RELOC
);
1432 else if (t
->opcode_modifier
& JumpInterSegment
)
1434 p
= frag_more (1 + 2 + 4); /* 1 opcode; 2 segment; 4 offset */
1435 p
[0] = t
->base_opcode
;
1436 if (i
.imms
[1]->X_op
== O_constant
)
1437 md_number_to_chars (p
+ 1, i
.imms
[1]->X_add_number
, 4);
1439 fix_new_exp (frag_now
, p
+ 1 - frag_now
->fr_literal
, 4,
1440 i
.imms
[1], 0, NO_RELOC
);
1441 if (i
.imms
[0]->X_op
!= O_constant
)
1442 as_bad ("can't handle non absolute segment in long call/jmp");
1443 md_number_to_chars (p
+ 5, i
.imms
[0]->X_add_number
, 2);
1447 /* Output normal instructions here. */
1450 /* First the prefix bytes. */
1451 for (q
= i
.prefix
; q
< i
.prefix
+ i
.prefixes
; q
++)
1454 md_number_to_chars (p
, (unsigned int) *q
, 1);
1457 /* Now the opcode; be careful about word order here! */
1458 if (fits_in_unsigned_byte (t
->base_opcode
))
1460 FRAG_APPEND_1_CHAR (t
->base_opcode
);
1462 else if (fits_in_unsigned_word (t
->base_opcode
))
1465 /* put out high byte first: can't use md_number_to_chars! */
1466 *p
++ = (t
->base_opcode
>> 8) & 0xff;
1467 *p
= t
->base_opcode
& 0xff;
1470 { /* opcode is either 3 or 4 bytes */
1471 if (t
->base_opcode
& 0xff000000)
1474 *p
++ = (t
->base_opcode
>> 24) & 0xff;
1478 *p
++ = (t
->base_opcode
>> 16) & 0xff;
1479 *p
++ = (t
->base_opcode
>> 8) & 0xff;
1480 *p
= (t
->base_opcode
) & 0xff;
1483 /* Now the modrm byte and base index byte (if present). */
1484 if (t
->opcode_modifier
& Modrm
)
1487 /* md_number_to_chars (p, i.rm, 1); */
1488 md_number_to_chars (p
, (i
.rm
.regmem
<< 0 | i
.rm
.reg
<< 3 | i
.rm
.mode
<< 6), 1);
1489 /* If i.rm.regmem == ESP (4) && i.rm.mode != Mode 3 (Register mode)
1490 ==> need second modrm byte. */
1491 if (i
.rm
.regmem
== ESCAPE_TO_TWO_BYTE_ADDRESSING
&& i
.rm
.mode
!= 3)
1494 /* md_number_to_chars (p, i.bi, 1); */
1495 md_number_to_chars (p
, (i
.bi
.base
<< 0 | i
.bi
.index
<< 3 | i
.bi
.scale
<< 6), 1);
1499 if (i
.disp_operands
)
1501 register unsigned int n
;
1503 for (n
= 0; n
< i
.operands
; n
++)
1507 if (i
.disps
[n
]->X_op
== O_constant
)
1509 if (i
.types
[n
] & (Disp8
| Abs8
))
1512 md_number_to_chars (p
, i
.disps
[n
]->X_add_number
, 1);
1514 else if (i
.types
[n
] & (Disp16
| Abs16
))
1517 md_number_to_chars (p
, i
.disps
[n
]->X_add_number
, 2);
1520 { /* Disp32|Abs32 */
1522 md_number_to_chars (p
, i
.disps
[n
]->X_add_number
, 4);
1526 { /* not absolute_section */
1527 /* need a 32-bit fixup (don't support 8bit non-absolute disps) */
1529 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
, 4,
1530 i
.disps
[n
], 0, NO_RELOC
);
1534 } /* end displacement output */
1536 /* output immediate */
1539 register unsigned int n
;
1541 for (n
= 0; n
< i
.operands
; n
++)
1545 if (i
.imms
[n
]->X_op
== O_constant
)
1547 if (i
.types
[n
] & (Imm8
| Imm8S
))
1550 md_number_to_chars (p
, i
.imms
[n
]->X_add_number
, 1);
1552 else if (i
.types
[n
] & Imm16
)
1555 md_number_to_chars (p
, i
.imms
[n
]->X_add_number
, 2);
1560 md_number_to_chars (p
, i
.imms
[n
]->X_add_number
, 4);
1564 { /* not absolute_section */
1565 /* need a 32-bit fixup (don't support 8bit non-absolute ims) */
1566 /* try to support other sizes ... */
1568 if (i
.types
[n
] & (Imm8
| Imm8S
))
1570 else if (i
.types
[n
] & Imm16
)
1574 p
= frag_more (size
);
1575 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
, size
,
1576 i
.imms
[n
], 0, NO_RELOC
);
1580 } /* end immediate output */
1588 #endif /* DEBUG386 */
1594 /* Parse OPERAND_STRING into the i386_insn structure I. Returns non-zero
1598 i386_operand (operand_string
)
1599 char *operand_string
;
1601 register char *op_string
= operand_string
;
1603 /* Address of '\0' at end of operand_string. */
1604 char *end_of_operand_string
= operand_string
+ strlen (operand_string
);
1606 /* Start and end of displacement string expression (if found). */
1607 char *displacement_string_start
= NULL
;
1608 char *displacement_string_end
= NULL
;
1610 /* We check for an absolute prefix (differentiating,
1611 for example, 'jmp pc_relative_label' from 'jmp *absolute_label'. */
1612 if (*op_string
== ABSOLUTE_PREFIX
)
1615 i
.types
[this_operand
] |= JumpAbsolute
;
1618 /* Check if operand is a register. */
1619 if (*op_string
== REGISTER_PREFIX
)
1621 register reg_entry
*r
;
1622 if (!(r
= parse_register (op_string
)))
1624 as_bad ("bad register name ('%s')", op_string
);
1627 /* Check for segment override, rather than segment register by
1628 searching for ':' after %<x>s where <x> = s, c, d, e, f, g. */
1629 if ((r
->reg_type
& (SReg2
| SReg3
)) && op_string
[3] == ':')
1634 i
.seg
= (seg_entry
*) & es
;
1637 i
.seg
= (seg_entry
*) & cs
;
1640 i
.seg
= (seg_entry
*) & ss
;
1643 i
.seg
= (seg_entry
*) & ds
;
1646 i
.seg
= (seg_entry
*) & fs
;
1649 i
.seg
= (seg_entry
*) & gs
;
1652 op_string
+= 4; /* skip % <x> s : */
1653 operand_string
= op_string
; /* Pretend given string starts here. */
1654 if (!is_digit_char (*op_string
) && !is_identifier_char (*op_string
)
1655 && *op_string
!= '(' && *op_string
!= ABSOLUTE_PREFIX
)
1657 as_bad ("bad memory operand after segment override");
1660 /* Handle case of %es:*foo. */
1661 if (*op_string
== ABSOLUTE_PREFIX
)
1664 i
.types
[this_operand
] |= JumpAbsolute
;
1666 goto do_memory_reference
;
1668 i
.types
[this_operand
] |= r
->reg_type
;
1669 i
.regs
[this_operand
] = r
;
1672 else if (*op_string
== IMMEDIATE_PREFIX
)
1673 { /* ... or an immediate */
1674 char *save_input_line_pointer
;
1678 if (i
.imm_operands
== MAX_IMMEDIATE_OPERANDS
)
1680 as_bad ("only 1 or 2 immediate operands are allowed");
1684 exp
= &im_expressions
[i
.imm_operands
++];
1685 i
.imms
[this_operand
] = exp
;
1686 save_input_line_pointer
= input_line_pointer
;
1687 input_line_pointer
= ++op_string
; /* must advance op_string! */
1688 exp_seg
= expression (exp
);
1689 input_line_pointer
= save_input_line_pointer
;
1691 if (exp
.X_op
== O_absent
)
1693 /* missing or bad expr becomes absolute 0 */
1694 as_bad ("missing or invalid immediate expression '%s' taken as 0",
1696 exp
->X_op
= O_constant
;
1697 exp
->X_add_number
= 0;
1698 exp
->X_add_symbol
= (symbolS
*) 0;
1699 exp
->X_op_symbol
= (symbolS
*) 0;
1700 i
.types
[this_operand
] |= Imm
;
1702 else if (exp
.X_op
== O_constant
)
1704 i
.types
[this_operand
] |= smallest_imm_type (exp
->X_add_number
);
1707 else if (exp_seg
!= text_section
1708 && exp_seg
!= data_section
1709 && exp_seg
!= bss_section
1710 && exp_seg
!= undefined_section
1711 #ifdef BFD_ASSEMBLER
1712 && ! bfd_is_com_section (exp_seg
)
1717 as_bad ("Unimplemented segment type %d in parse_operand", exp_seg
);
1723 /* this is an address ==> 32bit */
1724 i
.types
[this_operand
] |= Imm32
;
1726 /* shorten this type of this operand if the instruction wants
1727 * fewer bits than are present in the immediate. The bit field
1728 * code can put out 'andb $0xffffff, %al', for example. pace
1729 * also 'movw $foo,(%eax)'
1733 case WORD_OPCODE_SUFFIX
:
1734 i
.types
[this_operand
] |= Imm16
;
1736 case BYTE_OPCODE_SUFFIX
:
1737 i
.types
[this_operand
] |= Imm16
| Imm8
| Imm8S
;
1741 else if (is_digit_char (*op_string
) || is_identifier_char (*op_string
)
1742 || *op_string
== '(')
1744 /* This is a memory reference of some sort. */
1745 register char *base_string
;
1746 unsigned int found_base_index_form
;
1748 do_memory_reference
:
1749 if (i
.mem_operands
== MAX_MEMORY_OPERANDS
)
1751 as_bad ("more than 1 memory reference in instruction");
1756 /* Determine type of memory operand from opcode_suffix;
1757 no opcode suffix implies general memory references. */
1760 case BYTE_OPCODE_SUFFIX
:
1761 i
.types
[this_operand
] |= Mem8
;
1763 case WORD_OPCODE_SUFFIX
:
1764 i
.types
[this_operand
] |= Mem16
;
1766 case DWORD_OPCODE_SUFFIX
:
1768 i
.types
[this_operand
] |= Mem32
;
1771 /* Check for base index form. We detect the base index form by
1772 looking for an ')' at the end of the operand, searching
1773 for the '(' matching it, and finding a REGISTER_PREFIX or ','
1775 base_string
= end_of_operand_string
- 1;
1776 found_base_index_form
= 0;
1777 if (*base_string
== ')')
1779 unsigned int parens_balenced
= 1;
1780 /* We've already checked that the number of left & right ()'s are
1781 equal, so this loop will not be infinite. */
1785 if (*base_string
== ')')
1787 if (*base_string
== '(')
1790 while (parens_balenced
);
1791 base_string
++; /* Skip past '('. */
1792 if (*base_string
== REGISTER_PREFIX
|| *base_string
== ',')
1793 found_base_index_form
= 1;
1796 /* If we can't parse a base index register expression, we've found
1797 a pure displacement expression. We set up displacement_string_start
1798 and displacement_string_end for the code below. */
1799 if (!found_base_index_form
)
1801 displacement_string_start
= op_string
;
1802 displacement_string_end
= end_of_operand_string
;
1806 char *base_reg_name
, *index_reg_name
, *num_string
;
1809 i
.types
[this_operand
] |= BaseIndex
;
1811 /* If there is a displacement set-up for it to be parsed later. */
1812 if (base_string
!= op_string
+ 1)
1814 displacement_string_start
= op_string
;
1815 displacement_string_end
= base_string
- 1;
1818 /* Find base register (if any). */
1819 if (*base_string
!= ',')
1821 base_reg_name
= base_string
++;
1822 /* skip past register name & parse it */
1823 while (isalpha (*base_string
))
1825 if (base_string
== base_reg_name
+ 1)
1827 as_bad ("can't find base register name after '(%c'",
1831 END_STRING_AND_SAVE (base_string
);
1832 if (!(i
.base_reg
= parse_register (base_reg_name
)))
1834 as_bad ("bad base register name ('%s')", base_reg_name
);
1837 RESTORE_END_STRING (base_string
);
1840 /* Now check seperator; must be ',' ==> index reg
1841 OR num ==> no index reg. just scale factor
1842 OR ')' ==> end. (scale factor = 1) */
1843 if (*base_string
!= ',' && *base_string
!= ')')
1845 as_bad ("expecting ',' or ')' after base register in `%s'",
1850 /* There may index reg here; and there may be a scale factor. */
1851 if (*base_string
== ',' && *(base_string
+ 1) == REGISTER_PREFIX
)
1853 index_reg_name
= ++base_string
;
1854 while (isalpha (*++base_string
));
1855 END_STRING_AND_SAVE (base_string
);
1856 if (!(i
.index_reg
= parse_register (index_reg_name
)))
1858 as_bad ("bad index register name ('%s')", index_reg_name
);
1861 RESTORE_END_STRING (base_string
);
1864 /* Check for scale factor. */
1865 if (*base_string
== ',' && isdigit (*(base_string
+ 1)))
1867 num_string
= ++base_string
;
1868 while (is_digit_char (*base_string
))
1870 if (base_string
== num_string
)
1872 as_bad ("can't find a scale factor after ','");
1875 END_STRING_AND_SAVE (base_string
);
1876 /* We've got a scale factor. */
1877 if (!sscanf (num_string
, "%d", &num
))
1879 as_bad ("can't parse scale factor from '%s'", num_string
);
1882 RESTORE_END_STRING (base_string
);
1884 { /* must be 1 digit scale */
1886 i
.log2_scale_factor
= 0;
1889 i
.log2_scale_factor
= 1;
1892 i
.log2_scale_factor
= 2;
1895 i
.log2_scale_factor
= 3;
1898 as_bad ("expecting scale factor of 1, 2, 4, 8; got %d", num
);
1904 if (!i
.index_reg
&& *base_string
== ',')
1906 as_bad ("expecting index register or scale factor after ','; got '%c'",
1907 *(base_string
+ 1));
1913 /* If there's an expression begining the operand, parse it,
1914 assuming displacement_string_start and displacement_string_end
1916 if (displacement_string_start
)
1918 register expressionS
*exp
;
1920 char *save_input_line_pointer
;
1921 exp
= &disp_expressions
[i
.disp_operands
];
1922 i
.disps
[this_operand
] = exp
;
1924 save_input_line_pointer
= input_line_pointer
;
1925 input_line_pointer
= displacement_string_start
;
1926 END_STRING_AND_SAVE (displacement_string_end
);
1927 exp_seg
= expression (exp
);
1928 if (*input_line_pointer
)
1929 as_bad ("Ignoring junk '%s' after expression", input_line_pointer
);
1930 RESTORE_END_STRING (displacement_string_end
);
1931 input_line_pointer
= save_input_line_pointer
;
1932 if (exp
.X_op
== O_absent
)
1934 /* missing expr becomes absolute 0 */
1935 as_bad ("missing or invalid displacement '%s' taken as 0",
1937 i
.types
[this_operand
] |= (Disp
| Abs
);
1938 exp
->X_op
= O_constant
;
1939 exp
->X_add_number
= 0;
1940 exp
->X_add_symbol
= (symbolS
*) 0;
1941 exp
->X_op_symbol
= (symbolS
*) 0;
1943 else if (exp
.X_op
== O_constant
)
1945 i
.types
[this_operand
] |= SMALLEST_DISP_TYPE (exp
->X_add_number
);
1947 else if (exp_seg
== text_section
1948 || exp_seg
== data_section
1949 || exp_seg
== bss_section
1950 || exp_seg
== undefined_section
)
1952 i
.types
[this_operand
] |= Disp32
;
1957 i
.types
[this_operand
] |= Disp32
;
1959 goto seg_unimplemented
;
1964 /* Make sure the memory operand we've been dealt is valid. */
1965 if (i
.base_reg
&& i
.index_reg
&&
1966 !(i
.base_reg
->reg_type
& i
.index_reg
->reg_type
& Reg
))
1968 as_bad ("register size mismatch in (base,index,scale) expression");
1972 * special case for (%dx) while doing input/output op
1975 (i
.base_reg
->reg_type
== (Reg16
| InOutPortReg
)) &&
1976 (i
.index_reg
== 0)))
1978 i
.types
[this_operand
] |= InOutPortReg
;
1981 if ((i
.base_reg
&& (i
.base_reg
->reg_type
& Reg32
) == 0) ||
1982 (i
.index_reg
&& (i
.index_reg
->reg_type
& Reg32
) == 0))
1984 as_bad ("base/index register must be 32 bit register");
1987 if (i
.index_reg
&& i
.index_reg
== esp
)
1989 as_bad ("%s may not be used as an index register", esp
->reg_name
);
1994 { /* it's not a memory operand; argh! */
1995 as_bad ("invalid char %s begining %s operand '%s'",
1996 output_invalid (*op_string
), ordinal_names
[this_operand
],
2000 return 1; /* normal return */
2004 * md_estimate_size_before_relax()
2006 * Called just before relax().
2007 * Any symbol that is now undefined will not become defined.
2008 * Return the correct fr_subtype in the frag.
2009 * Return the initial "guess for fr_var" to caller.
2010 * The guess for fr_var is ACTUALLY the growth beyond fr_fix.
2011 * Whatever we do to grow fr_fix or fr_var contributes to our returned value.
2012 * Although it may not be explicit in the frag, pretend fr_var starts with a
2016 md_estimate_size_before_relax (fragP
, segment
)
2017 register fragS
*fragP
;
2018 register segT segment
;
2020 register unsigned char *opcode
;
2021 register int old_fr_fix
;
2023 old_fr_fix
= fragP
->fr_fix
;
2024 opcode
= (unsigned char *) fragP
->fr_opcode
;
2025 /* We've already got fragP->fr_subtype right; all we have to do is check
2026 for un-relaxable symbols. */
2027 if (S_GET_SEGMENT (fragP
->fr_symbol
) != segment
)
2029 /* symbol is undefined in this segment */
2032 case JUMP_PC_RELATIVE
: /* make jmp (0xeb) a dword displacement jump */
2033 opcode
[0] = 0xe9; /* dword disp jmp */
2035 fix_new (fragP
, old_fr_fix
, 4,
2037 fragP
->fr_offset
, 1, NO_RELOC
);
2041 /* This changes the byte-displacement jump 0x7N -->
2042 the dword-displacement jump 0x0f8N */
2043 opcode
[1] = opcode
[0] + 0x10;
2044 opcode
[0] = TWO_BYTE_OPCODE_ESCAPE
; /* two-byte escape */
2045 fragP
->fr_fix
+= 1 + 4; /* we've added an opcode byte */
2046 fix_new (fragP
, old_fr_fix
+ 1, 4,
2048 fragP
->fr_offset
, 1, NO_RELOC
);
2053 return (fragP
->fr_var
+ fragP
->fr_fix
- old_fr_fix
);
2054 } /* md_estimate_size_before_relax() */
2057 * md_convert_frag();
2059 * Called after relax() is finished.
2060 * In: Address of frag.
2061 * fr_type == rs_machine_dependent.
2062 * fr_subtype is what the address relaxed to.
2064 * Out: Any fixSs and constants are set up.
2065 * Caller will turn frag into a ".space 0".
2067 #ifndef BFD_ASSEMBLER
2069 md_convert_frag (headers
, fragP
)
2070 object_headers
*headers
;
2071 register fragS
*fragP
;
2074 md_convert_frag (abfd
, sec
, fragP
)
2077 register fragS
*fragP
;
2080 register unsigned char *opcode
;
2081 unsigned char *where_to_put_displacement
= NULL
;
2082 unsigned int target_address
;
2083 unsigned int opcode_address
;
2084 unsigned int extension
= 0;
2085 int displacement_from_opcode_start
;
2087 opcode
= (unsigned char *) fragP
->fr_opcode
;
2089 /* Address we want to reach in file space. */
2090 target_address
= S_GET_VALUE (fragP
->fr_symbol
) + fragP
->fr_offset
;
2092 /* Address opcode resides at in file space. */
2093 opcode_address
= fragP
->fr_address
+ fragP
->fr_fix
;
2095 /* Displacement from opcode start to fill into instruction. */
2096 displacement_from_opcode_start
= target_address
- opcode_address
;
2098 switch (fragP
->fr_subtype
)
2100 case ENCODE_RELAX_STATE (COND_JUMP
, BYTE
):
2101 case ENCODE_RELAX_STATE (UNCOND_JUMP
, BYTE
):
2102 /* don't have to change opcode */
2103 extension
= 1; /* 1 opcode + 1 displacement */
2104 where_to_put_displacement
= &opcode
[1];
2107 case ENCODE_RELAX_STATE (COND_JUMP
, WORD
):
2108 opcode
[1] = TWO_BYTE_OPCODE_ESCAPE
;
2109 opcode
[2] = opcode
[0] + 0x10;
2110 opcode
[0] = WORD_PREFIX_OPCODE
;
2111 extension
= 4; /* 3 opcode + 2 displacement */
2112 where_to_put_displacement
= &opcode
[3];
2115 case ENCODE_RELAX_STATE (UNCOND_JUMP
, WORD
):
2117 opcode
[0] = WORD_PREFIX_OPCODE
;
2118 extension
= 3; /* 2 opcode + 2 displacement */
2119 where_to_put_displacement
= &opcode
[2];
2122 case ENCODE_RELAX_STATE (COND_JUMP
, DWORD
):
2123 opcode
[1] = opcode
[0] + 0x10;
2124 opcode
[0] = TWO_BYTE_OPCODE_ESCAPE
;
2125 extension
= 5; /* 2 opcode + 4 displacement */
2126 where_to_put_displacement
= &opcode
[2];
2129 case ENCODE_RELAX_STATE (UNCOND_JUMP
, DWORD
):
2131 extension
= 4; /* 1 opcode + 4 displacement */
2132 where_to_put_displacement
= &opcode
[1];
2136 BAD_CASE (fragP
->fr_subtype
);
2139 /* now put displacement after opcode */
2140 md_number_to_chars ((char *) where_to_put_displacement
,
2141 displacement_from_opcode_start
- extension
,
2142 SIZE_FROM_RELAX_STATE (fragP
->fr_subtype
));
2143 fragP
->fr_fix
+= extension
;
2147 int md_short_jump_size
= 2; /* size of byte displacement jmp */
2148 int md_long_jump_size
= 5; /* size of dword displacement jmp */
2149 const int md_reloc_size
= 8; /* Size of relocation record */
2152 md_create_short_jump (ptr
, from_addr
, to_addr
, frag
, to_symbol
)
2154 addressT from_addr
, to_addr
;
2160 offset
= to_addr
- (from_addr
+ 2);
2161 md_number_to_chars (ptr
, (long) 0xeb, 1); /* opcode for byte-disp jump */
2162 md_number_to_chars (ptr
+ 1, offset
, 1);
2166 md_create_long_jump (ptr
, from_addr
, to_addr
, frag
, to_symbol
)
2168 addressT from_addr
, to_addr
;
2176 offset
= to_addr
- S_GET_VALUE (to_symbol
);
2177 md_number_to_chars (ptr
, 0xe9, 1); /* opcode for long jmp */
2178 md_number_to_chars (ptr
+ 1, offset
, 4);
2179 fix_new (frag
, (ptr
+ 1) - frag
->fr_literal
, 4,
2180 to_symbol
, (offsetT
) 0, 0, NO_RELOC
);
2184 offset
= to_addr
- (from_addr
+ 5);
2185 md_number_to_chars (ptr
, (long) 0xe9, 1);
2186 md_number_to_chars (ptr
+ 1, offset
, 4);
2191 md_parse_option (argP
, cntP
, vecP
)
2199 void /* Knows about order of bytes in address. */
2200 md_number_to_chars (con
, value
, nbytes
)
2201 char con
[]; /* Return 'nbytes' of chars here. */
2202 valueT value
; /* The value of the bits. */
2203 int nbytes
; /* Number of bytes in the output. */
2205 register char *p
= con
;
2210 p
[0] = value
& 0xff;
2213 p
[0] = value
& 0xff;
2214 p
[1] = (value
>> 8) & 0xff;
2217 p
[0] = value
& 0xff;
2218 p
[1] = (value
>> 8) & 0xff;
2219 p
[2] = (value
>> 16) & 0xff;
2220 p
[3] = (value
>> 24) & 0xff;
2228 /* Apply a fixup (fixS) to segment data, once it has been determined
2229 by our caller that we have all the info we need to fix it up.
2231 On the 386, immediates, displacements, and data pointers are all in
2232 the same (little-endian) format, so we don't need to care about which
2236 md_apply_fix_1 (fixP
, value
)
2237 fixS
*fixP
; /* The fix we're to put in */
2238 long value
; /* The value of the bits. */
2240 register char *p
= fixP
->fx_where
+ fixP
->fx_frag
->fr_literal
;
2242 switch (fixP
->fx_size
)
2253 *p
++ = (value
>> 8);
2254 *p
++ = (value
>> 16);
2258 BAD_CASE (fixP
->fx_size
);
2262 #ifdef BFD_ASSEMBLER
2264 md_apply_fix (fixP
, valp
)
2268 md_apply_fix_1 (fixP
, *valp
);
2273 md_apply_fix (fixP
, val
)
2277 md_apply_fix_1 (fixP
, val
);
2281 long /* Knows about the byte order in a word. */
2282 md_chars_to_number (con
, nbytes
)
2283 unsigned char con
[]; /* Low order byte 1st. */
2284 int nbytes
; /* Number of bytes in the input. */
2287 for (retval
= 0, con
+= nbytes
- 1; nbytes
--; con
--)
2289 retval
<<= BITS_PER_CHAR
;
2297 #define MAX_LITTLENUMS 6
2299 /* Turn the string pointed to by litP into a floating point constant of type
2300 type, and emit the appropriate bytes. The number of LITTLENUMS emitted
2301 is stored in *sizeP . An error message is returned, or NULL on OK. */
2303 md_atof (type
, litP
, sizeP
)
2309 LITTLENUM_TYPE words
[MAX_LITTLENUMS
];
2310 LITTLENUM_TYPE
*wordP
;
2332 return "Bad call to md_atof ()";
2334 t
= atof_ieee (input_line_pointer
, type
, words
);
2336 input_line_pointer
= t
;
2338 *sizeP
= prec
* sizeof (LITTLENUM_TYPE
);
2339 /* This loops outputs the LITTLENUMs in REVERSE order; in accord with
2340 the bigendian 386. */
2341 for (wordP
= words
+ prec
- 1; prec
--;)
2343 md_number_to_chars (litP
, (long) (*wordP
--), sizeof (LITTLENUM_TYPE
));
2344 litP
+= sizeof (LITTLENUM_TYPE
);
2349 char output_invalid_buf
[8];
2356 sprintf (output_invalid_buf
, "'%c'", c
);
2358 sprintf (output_invalid_buf
, "(0x%x)", (unsigned) c
);
2359 return output_invalid_buf
;
2363 parse_register (reg_string
)
2364 /* reg_string starts *before* REGISTER_PREFIX */
2367 register char *s
= reg_string
;
2369 char reg_name_given
[MAX_REG_NAME_SIZE
];
2371 s
++; /* skip REGISTER_PREFIX */
2372 for (p
= reg_name_given
; is_register_char (*s
); p
++, s
++)
2374 *p
= register_chars
[*s
];
2375 if (p
>= reg_name_given
+ MAX_REG_NAME_SIZE
)
2376 return (reg_entry
*) 0;
2379 return (reg_entry
*) hash_find (reg_hash
, reg_name_given
);
2383 /* We have no need to default values of symbols. */
2387 md_undefined_symbol (name
)
2393 /* Parse an operand that is machine-specific.
2394 We just return without modifying the expression if we have nothing
2399 md_operand (expressionP
)
2400 expressionS
*expressionP
;
2404 /* Round up a section size to the appropriate boundary. */
2406 md_section_align (segment
, size
)
2410 return size
; /* Byte alignment is fine */
2413 /* Exactly what point is a PC-relative offset relative TO?
2414 On the i386, they're relative to the address of the offset, plus
2415 its size. (??? Is this right? FIXME-SOON!) */
2417 md_pcrel_from (fixP
)
2420 return fixP
->fx_size
+ fixP
->fx_where
+ fixP
->fx_frag
->fr_address
;
2430 temp
= get_absolute_expression ();
2431 #ifdef BFD_ASSEMBLER
2432 subseg_set (bss_section
, (subsegT
) temp
);
2434 subseg_new (bss_section
, (subsegT
) temp
);
2436 demand_empty_rest_of_line ();
2442 #ifdef BFD_ASSEMBLER
2445 tc_gen_reloc (section
, fixp
)
2450 bfd_reloc_code_real_type code
;
2452 #define F(SZ,PCREL) (((SZ) << 1) + (PCREL))
2453 switch (F (fixp
->fx_size
, fixp
->fx_pcrel
))
2455 #define MAP(SZ,PCREL,TYPE) case F(SZ,PCREL): code = (TYPE); break
2456 MAP (1, 0, BFD_RELOC_8
);
2457 MAP (2, 0, BFD_RELOC_16
);
2458 MAP (4, 0, BFD_RELOC_32
);
2459 MAP (1, 1, BFD_RELOC_8_PCREL
);
2460 MAP (2, 1, BFD_RELOC_16_PCREL
);
2461 MAP (4, 1, BFD_RELOC_32_PCREL
);
2468 reloc
= (arelent
*) bfd_alloc_by_size_t (stdoutput
, sizeof (arelent
));
2469 assert (reloc
!= 0);
2470 reloc
->sym_ptr_ptr
= &fixp
->fx_addsy
->bsym
;
2471 reloc
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
2473 reloc
->addend
= fixp
->fx_addnumber
;
2477 reloc
->howto
= bfd_reloc_type_lookup (stdoutput
, code
);
2478 assert (reloc
->howto
!= 0);
2483 #else /* ! BFD_ASSEMBLER */
2485 #if (defined(OBJ_AOUT) | defined(OBJ_BOUT))
2487 tc_aout_fix_to_chars (where
, fixP
, segment_address_in_file
)
2490 relax_addressT segment_address_in_file
;
2493 * In: length of relocation (or of address) in chars: 1, 2 or 4.
2494 * Out: GNU LD relocation length code: 0, 1, or 2.
2497 static const unsigned char nbytes_r_length
[] = {42, 0, 1, 42, 2};
2500 know (fixP
->fx_addsy
!= NULL
);
2502 md_number_to_chars (where
,
2503 fixP
->fx_frag
->fr_address
+ fixP
->fx_where
- segment_address_in_file
,
2506 r_symbolnum
= (S_IS_DEFINED (fixP
->fx_addsy
)
2507 ? S_GET_TYPE (fixP
->fx_addsy
)
2508 : fixP
->fx_addsy
->sy_number
);
2510 where
[6] = (r_symbolnum
>> 16) & 0x0ff;
2511 where
[5] = (r_symbolnum
>> 8) & 0x0ff;
2512 where
[4] = r_symbolnum
& 0x0ff;
2513 where
[7] = ((((!S_IS_DEFINED (fixP
->fx_addsy
)) << 3) & 0x08)
2514 | ((nbytes_r_length
[fixP
->fx_size
] << 1) & 0x06)
2515 | (((fixP
->fx_pcrel
<< 0) & 0x01) & 0x0f));
2518 #endif /* OBJ_AOUT or OBJ_BOUT */
2520 #if defined (I386COFF)
2523 tc_coff_fix2rtype (fixP
)
2526 return (fixP
->fx_pcrel
?
2527 (fixP
->fx_size
== 1 ? R_PCRBYTE
:
2528 fixP
->fx_size
== 2 ? R_PCRWORD
:
2530 (fixP
->fx_size
== 1 ? R_RELBYTE
:
2531 fixP
->fx_size
== 2 ? R_RELWORD
:
2538 tc_coff_sizemachdep (frag
)
2542 return (frag
->fr_next
->fr_address
- frag
->fr_address
);
2547 #endif /* I386COFF */
2549 #endif /* BFD_ASSEMBLER? */
2551 /* end of tc-i386.c */