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[deliverable/binutils-gdb.git] / gas / config / tc-i386.c
1 /* i386.c -- Assemble code for the Intel 80386
2 Copyright (C) 1989, 1991, 1992 Free Software Foundation.
3
4 This file is part of GAS, the GNU Assembler.
5
6 GAS is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
9 any later version.
10
11 GAS is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with GAS; see the file COPYING. If not, write to
18 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
19
20 /*
21 Intel 80386 machine specific gas.
22 Written by Eliot Dresselhaus (eliot@mgm.mit.edu).
23 Bugs & suggestions are completely welcome. This is free software.
24 Please help us make it better.
25 */
26
27 #include "as.h"
28
29 #include "obstack.h"
30 #include "opcode/i386.h"
31
32 /* 'md_assemble ()' gathers together information and puts it into a
33 i386_insn. */
34
35 typedef struct {
36 /* TM holds the template for the insn were currently assembling. */
37 template tm;
38 /* SUFFIX holds the opcode suffix (e.g. 'l' for 'movl') if given. */
39 char suffix;
40 /* Operands are coded with OPERANDS, TYPES, DISPS, IMMS, and REGS. */
41
42 /* OPERANDS gives the number of given operands. */
43 unsigned int operands;
44
45 /* REG_OPERANDS, DISP_OPERANDS, MEM_OPERANDS, IMM_OPERANDS give the number of
46 given register, displacement, memory operands and immediate operands. */
47 unsigned int reg_operands, disp_operands, mem_operands, imm_operands;
48
49 /* TYPES [i] is the type (see above #defines) which tells us how to
50 search through DISPS [i] & IMMS [i] & REGS [i] for the required
51 operand. */
52 unsigned int types [MAX_OPERANDS];
53
54 /* Displacements (if given) for each operand. */
55 expressionS * disps [MAX_OPERANDS];
56
57 /* Immediate operands (if given) for each operand. */
58 expressionS * imms [MAX_OPERANDS];
59
60 /* Register operands (if given) for each operand. */
61 reg_entry * regs [MAX_OPERANDS];
62
63 /* BASE_REG, INDEX_REG, and LOG2_SCALE_FACTOR are used to encode
64 the base index byte below. */
65 reg_entry * base_reg;
66 reg_entry * index_reg;
67 unsigned int log2_scale_factor;
68
69 /* SEG gives the seg_entry of this insn. It is equal to zero unless
70 an explicit segment override is given. */
71 seg_entry * seg; /* segment for memory operands (if given) */
72
73 /* PREFIX holds all the given prefix opcodes (usually null).
74 PREFIXES is the size of PREFIX. */
75 char prefix [MAX_PREFIXES];
76 unsigned int prefixes;
77
78 /* RM and IB are the modrm byte and the base index byte where the addressing
79 modes of this insn are encoded. */
80
81 modrm_byte rm;
82 base_index_byte bi;
83 } i386_insn;
84
85 /* This array holds the chars that always start a comment. If the
86 pre-processor is disabled, these aren't very useful */
87 const char comment_chars[] = "#";
88
89 /* This array holds the chars that only start a comment at the beginning of
90 a line. If the line seems to have the form '# 123 filename'
91 .line and .file directives will appear in the pre-processed output */
92 /* Note that input_file.c hand checks for '#' at the beginning of the
93 first line of the input file. This is because the compiler outputs
94 #NO_APP at the beginning of its output. */
95 /* Also note that comments started like this one will always work if
96 '/' isn't otherwise defined. */
97 const char line_comment_chars[] = "/"; /* removed '#' xoxorich. */
98
99 /* Chars that can be used to separate mant from exp in floating point nums */
100 const char EXP_CHARS[] = "eE";
101
102 /* Chars that mean this number is a floating point constant */
103 /* As in 0f12.456 */
104 /* or 0d1.2345e12 */
105 const char FLT_CHARS[] = "fFdDxX";
106
107 /* tables for lexical analysis */
108 static char opcode_chars[256];
109 static char register_chars[256];
110 static char operand_chars[256];
111 static char space_chars[256];
112 static char identifier_chars[256];
113 static char digit_chars[256];
114
115 /* lexical macros */
116 #define is_opcode_char(x) (opcode_chars[(unsigned char) x])
117 #define is_operand_char(x) (operand_chars[(unsigned char) x])
118 #define is_register_char(x) (register_chars[(unsigned char) x])
119 #define is_space_char(x) (space_chars[(unsigned char) x])
120 #define is_identifier_char(x) (identifier_chars[(unsigned char) x])
121 #define is_digit_char(x) (digit_chars[(unsigned char) x])
122
123 /* put here all non-digit non-letter charcters that may occur in an operand */
124 static char operand_special_chars[] = "%$-+(,)*._~/<>|&^!:";
125
126 static char *ordinal_names[] = { "first", "second", "third" }; /* for printfs */
127
128 /* md_assemble() always leaves the strings it's passed unaltered. To
129 effect this we maintain a stack of saved characters that we've smashed
130 with '\0's (indicating end of strings for various sub-fields of the
131 assembler instruction). */
132 static char save_stack[32];
133 static char *save_stack_p; /* stack pointer */
134 #define END_STRING_AND_SAVE(s) *save_stack_p++ = *s; *s = '\0'
135 #define RESTORE_END_STRING(s) *s = *--save_stack_p
136
137 /* The instruction we're assembling. */
138 static i386_insn i;
139
140 /* Per instruction expressionS buffers: 2 displacements & 2 immediate max. */
141 static expressionS disp_expressions[2], im_expressions[2];
142
143 /* pointers to ebp & esp entries in reg_hash hash table */
144 static reg_entry *ebp, *esp;
145
146 static int this_operand; /* current operand we are working on */
147
148 /*
149 Interface to relax_segment.
150 There are 2 relax states for 386 jump insns: one for conditional & one
151 for unconditional jumps. This is because the these two types of jumps
152 add different sizes to frags when we're figuring out what sort of jump
153 to choose to reach a given label. */
154
155 /* types */
156 #define COND_JUMP 1 /* conditional jump */
157 #define UNCOND_JUMP 2 /* unconditional jump */
158 /* sizes */
159 #define BYTE 0
160 #define WORD 1
161 #define DWORD 2
162 #define UNKNOWN_SIZE 3
163
164 #define ENCODE_RELAX_STATE(type,size) ((type<<2) | (size))
165 #define SIZE_FROM_RELAX_STATE(s) \
166 ( (((s) & 0x3) == BYTE ? 1 : (((s) & 0x3) == WORD ? 2 : 4)) )
167
168 const relax_typeS md_relax_table[] = {
169 /*
170 The fields are:
171 1) most positive reach of this state,
172 2) most negative reach of this state,
173 3) how many bytes this mode will add to the size of the current frag
174 4) which index into the table to try if we can't fit into this one.
175 */
176 {1, 1, 0, 0},
177 {1, 1, 0, 0},
178 {1, 1, 0, 0},
179 {1, 1, 0, 0},
180
181 /* For now we don't use word displacement jumps: they may be
182 untrustworthy. */
183 {127+1, -128+1, 0, ENCODE_RELAX_STATE(COND_JUMP,DWORD) },
184 /* word conditionals add 3 bytes to frag:
185 2 opcode prefix; 1 displacement bytes */
186 {32767+2, -32768+2, 3, ENCODE_RELAX_STATE(COND_JUMP,DWORD) },
187 /* dword conditionals adds 4 bytes to frag:
188 1 opcode prefix; 3 displacement bytes */
189 {0, 0, 4, 0},
190 {1, 1, 0, 0},
191
192 {127+1, -128+1, 0, ENCODE_RELAX_STATE(UNCOND_JUMP,DWORD) },
193 /* word jmp adds 2 bytes to frag:
194 1 opcode prefix; 1 displacement bytes */
195 {32767+2, -32768+2, 2, ENCODE_RELAX_STATE(UNCOND_JUMP,DWORD) },
196 /* dword jmp adds 3 bytes to frag:
197 0 opcode prefix; 3 displacement bytes */
198 {0, 0, 3, 0},
199 {1, 1, 0, 0},
200
201 };
202
203 #if __STDC__ == 1
204
205 static char *output_invalid(int c);
206 static int i386_operand(char *operand_string);
207 static reg_entry *parse_register(char *reg_string);
208
209 #else /* not __STDC__ */
210
211 static char *output_invalid();
212 static int i386_operand();
213 static reg_entry *parse_register();
214
215 #endif /* not __STDC__ */
216
217
218 /* Ignore certain directives generated by gcc. This probably should
219 not be here. */
220 void dummy ()
221 {
222 while (*input_line_pointer && *input_line_pointer != '\n')
223 input_line_pointer++;
224 }
225
226 const pseudo_typeS md_pseudo_table[] = {
227 { "ffloat", float_cons, 'f' },
228 { "dfloat", float_cons, 'd' },
229 { "tfloat", float_cons, 'x' },
230 { "value", cons, 2 },
231 { 0, 0, 0 }
232 };
233
234 /* for interface with expression () */
235 extern char * input_line_pointer;
236
237 /* obstack for constructing various things in md_begin */
238 struct obstack o;
239
240 /* hash table for opcode lookup */
241 static struct hash_control *op_hash = (struct hash_control *) 0;
242 /* hash table for register lookup */
243 static struct hash_control *reg_hash = (struct hash_control *) 0;
244 /* hash table for prefix lookup */
245 static struct hash_control *prefix_hash = (struct hash_control *) 0;
246
247 \f
248 void md_begin ()
249 {
250 char * hash_err;
251
252 obstack_begin (&o,4096);
253
254 /* initialize op_hash hash table */
255 op_hash = hash_new(); /* xmalloc handles error */
256
257 {
258 register const template *optab;
259 register templates *core_optab;
260 char *prev_name;
261
262 optab = i386_optab; /* setup for loop */
263 prev_name = optab->name;
264 obstack_grow (&o, optab, sizeof(template));
265 core_optab = (templates *) xmalloc (sizeof (templates));
266
267 for (optab++; optab < i386_optab_end; optab++) {
268 if (! strcmp (optab->name, prev_name)) {
269 /* same name as before --> append to current template list */
270 obstack_grow (&o, optab, sizeof(template));
271 } else {
272 /* different name --> ship out current template list;
273 add to hash table; & begin anew */
274 /* Note: end must be set before start! since obstack_next_free changes
275 upon opstack_finish */
276 core_optab->end = (template *) obstack_next_free(&o);
277 core_optab->start = (template *) obstack_finish(&o);
278 hash_err = hash_insert (op_hash, prev_name, (char *) core_optab);
279 if (hash_err && *hash_err) {
280 hash_error:
281 as_fatal("Internal Error: Can't hash %s: %s", prev_name, hash_err);
282 }
283 prev_name = optab->name;
284 core_optab = (templates *) xmalloc (sizeof(templates));
285 obstack_grow (&o, optab, sizeof(template));
286 }
287 }
288 }
289
290 /* initialize reg_hash hash table */
291 reg_hash = hash_new();
292 {
293 register const reg_entry *regtab;
294
295 for (regtab = i386_regtab; regtab < i386_regtab_end; regtab++) {
296 hash_err = hash_insert (reg_hash, regtab->reg_name, regtab);
297 if (hash_err && *hash_err) goto hash_error;
298 }
299 }
300
301 esp = (reg_entry *) hash_find (reg_hash, "esp");
302 ebp = (reg_entry *) hash_find (reg_hash, "ebp");
303
304 /* initialize reg_hash hash table */
305 prefix_hash = hash_new();
306 {
307 register const prefix_entry *prefixtab;
308
309 for (prefixtab = i386_prefixtab;
310 prefixtab < i386_prefixtab_end; prefixtab++) {
311 hash_err = hash_insert (prefix_hash, prefixtab->prefix_name, prefixtab);
312 if (hash_err && *hash_err) goto hash_error;
313 }
314 }
315
316 /* fill in lexical tables: opcode_chars, operand_chars, space_chars */
317 {
318 register unsigned int c;
319
320 bzero (opcode_chars, sizeof(opcode_chars));
321 bzero (operand_chars, sizeof(operand_chars));
322 bzero (space_chars, sizeof(space_chars));
323 bzero (identifier_chars, sizeof(identifier_chars));
324 bzero (digit_chars, sizeof(digit_chars));
325
326 for (c = 0; c < 256; c++) {
327 if (islower(c) || isdigit(c)) {
328 opcode_chars[c] = c;
329 register_chars[c] = c;
330 } else if (isupper(c)) {
331 opcode_chars[c] = tolower(c);
332 register_chars[c] = opcode_chars[c];
333 } else if (c == PREFIX_SEPERATOR) {
334 opcode_chars[c] = c;
335 } else if (c == ')' || c == '(') {
336 register_chars[c] = c;
337 }
338
339 if (isupper(c) || islower(c) || isdigit(c))
340 operand_chars[c] = c;
341 else if (c && strchr(operand_special_chars, c))
342 operand_chars[c] = c;
343
344 if (isdigit(c) || c == '-') digit_chars[c] = c;
345
346 if (isalpha(c) || c == '_' || c == '.' || isdigit(c))
347 identifier_chars[c] = c;
348
349 if (c == ' ' || c == '\t') space_chars[c] = c;
350 }
351 }
352 }
353
354 void md_end() {} /* not much to do here. */
355
356 \f
357 #ifdef DEBUG386
358
359 /* debugging routines for md_assemble */
360 /* static void pi (), pte (), pt (), pe (), ps (); */
361
362 static void pi (line, x)
363 char * line;
364 i386_insn *x;
365 {
366 register template *p;
367 int i;
368
369 fprintf (stdout, "%s: template ", line);
370 pte (&x->tm);
371 fprintf (stdout, " modrm: mode %x reg %x reg/mem %x",
372 x->rm.mode, x->rm.reg, x->rm.regmem);
373 fprintf (stdout, " base %x index %x scale %x\n",
374 x->bi.base, x->bi.index, x->bi.scale);
375 for (i = 0; i < x->operands; i++) {
376 fprintf (stdout, " #%d: ", i+1);
377 pt (x->types[i]);
378 fprintf (stdout, "\n");
379 if (x->types[i] & Reg) fprintf (stdout, "%s\n", x->regs[i]->reg_name);
380 if (x->types[i] & Imm) pe (x->imms[i]);
381 if (x->types[i] & (Disp|Abs)) pe (x->disps[i]);
382 }
383 }
384
385 static void pte (t)
386 template *t;
387 {
388 int i;
389 fprintf (stdout, " %d operands ", t->operands);
390 fprintf (stdout, "opcode %x ",
391 t->base_opcode);
392 if (t->extension_opcode != None)
393 fprintf (stdout, "ext %x ", t->extension_opcode);
394 if (t->opcode_modifier&D)
395 fprintf (stdout, "D");
396 if (t->opcode_modifier&W)
397 fprintf (stdout, "W");
398 fprintf (stdout, "\n");
399 for (i = 0; i < t->operands; i++) {
400 fprintf (stdout, " #%d type ", i+1);
401 pt (t->operand_types[i]);
402 fprintf (stdout, "\n");
403 }
404 }
405
406 static void pe (e)
407 expressionS *e;
408 {
409 fprintf (stdout, " segment %s\n", segment_name (e->X_seg));
410 fprintf (stdout, " add_number %d (%x)\n",
411 e->X_add_number, e->X_add_number);
412 if (e->X_add_symbol) {
413 fprintf (stdout, " add_symbol ");
414 ps (e->X_add_symbol);
415 fprintf (stdout, "\n");
416 }
417 if (e->X_subtract_symbol) {
418 fprintf (stdout, " sub_symbol ");
419 ps (e->X_subtract_symbol);
420 fprintf (stdout, "\n");
421 }
422 }
423
424 static void ps (s)
425 symbolS *s;
426 {
427 fprintf (stdout, "%s type %s%s",
428 S_GET_NAME(s),
429 S_IS_EXTERNAL(s) ? "EXTERNAL " : "",
430 segment_name(S_GET_SEGMENT(s)));
431 }
432
433 struct type_name {
434 unsigned int mask;
435 char *tname;
436 } type_names[] = {
437 { Reg8, "r8" }, { Reg16, "r16" }, { Reg32, "r32" }, { Imm8, "i8" },
438 { Imm8S, "i8s" },
439 { Imm16, "i16" }, { Imm32, "i32" }, { Mem8, "Mem8"}, { Mem16, "Mem16"},
440 { Mem32, "Mem32"}, { BaseIndex, "BaseIndex" },
441 { Abs8, "Abs8" }, { Abs16, "Abs16" }, { Abs32, "Abs32" },
442 { Disp8, "d8" }, { Disp16, "d16" },
443 { Disp32, "d32" }, { SReg2, "SReg2" }, { SReg3, "SReg3" }, { Acc, "Acc" },
444 { InOutPortReg, "InOutPortReg" }, { ShiftCount, "ShiftCount" },
445 { Imm1, "i1" }, { Control, "control reg" }, {Test, "test reg"},
446 { FloatReg, "FReg"}, {FloatAcc, "FAcc"},
447 { JumpAbsolute, "Jump Absolute"},
448 { 0, "" }
449 };
450
451 static void pt (t)
452 unsigned int t;
453 {
454 register struct type_name *ty;
455
456 if (t == Unknown) {
457 fprintf (stdout, "Unknown");
458 } else {
459 for (ty = type_names; ty->mask; ty++)
460 if (t & ty->mask) fprintf (stdout, "%s, ", ty->tname);
461 }
462 fflush (stdout);
463 }
464
465 #endif /* DEBUG386 */
466 \f
467 /*
468 This is the guts of the machine-dependent assembler. LINE points to a
469 machine dependent instruction. This funciton is supposed to emit
470 the frags/bytes it assembles to.
471 */
472 void md_assemble (line)
473 char *line;
474 {
475 /* Holds temlate once we've found it. */
476 register template * t;
477
478 /* Possible templates for current insn */
479 templates *current_templates = (templates *) 0;
480
481 /* Initialize globals. */
482 bzero (&i, sizeof(i));
483 bzero (disp_expressions, sizeof(disp_expressions));
484 bzero (im_expressions, sizeof(im_expressions));
485 save_stack_p = save_stack; /* reset stack pointer */
486
487 /* Fist parse an opcode & call i386_operand for the operands.
488 We assume that the scrubber has arranged it so that line[0] is the valid
489 start of a (possibly prefixed) opcode. */
490 {
491 register char *l = line; /* Fast place to put LINE. */
492
493 /* 1 if operand is pending after ','. */
494 unsigned int expecting_operand = 0;
495 /* 1 if we found a prefix only acceptable with string insns. */
496 unsigned int expecting_string_instruction = 0;
497 /* Non-zero if operand parens not balenced. */
498 unsigned int paren_not_balenced;
499 char * token_start = l;
500
501 while (! is_space_char(*l) && *l != END_OF_INSN) {
502 if (! is_opcode_char(*l)) {
503 as_bad("invalid character %s in opcode", output_invalid(*l));
504 return;
505 } else if (*l != PREFIX_SEPERATOR) {
506 *l = opcode_chars[(unsigned char) *l]; /* fold case of opcodes */
507 l++;
508 } else { /* this opcode's got a prefix */
509 register unsigned int q;
510 register prefix_entry * prefix;
511
512 if (l == token_start) {
513 as_bad("expecting prefix; got nothing");
514 return;
515 }
516 END_STRING_AND_SAVE (l);
517 prefix = (prefix_entry *) hash_find (prefix_hash, token_start);
518 if (! prefix) {
519 as_bad("no such opcode prefix ('%s')", token_start);
520 return;
521 }
522 RESTORE_END_STRING (l);
523 /* check for repeated prefix */
524 for (q = 0; q < i.prefixes; q++)
525 if (i.prefix[q] == prefix->prefix_code) {
526 as_bad("same prefix used twice; you don't really want this!");
527 return;
528 }
529 if (i.prefixes == MAX_PREFIXES) {
530 as_bad("too many opcode prefixes");
531 return;
532 }
533 i.prefix[i.prefixes++] = prefix->prefix_code;
534 if (prefix->prefix_code == REPE || prefix->prefix_code == REPNE)
535 expecting_string_instruction = 1;
536 /* skip past PREFIX_SEPERATOR and reset token_start */
537 token_start = ++l;
538 }
539 }
540 END_STRING_AND_SAVE (l);
541 if (token_start == l) {
542 as_bad("expecting opcode; got nothing");
543 return;
544 }
545
546 /* Lookup insn in hash; try intel & att naming conventions if appropriate;
547 that is: we only use the opcode suffix 'b' 'w' or 'l' if we need to. */
548 current_templates = (templates *) hash_find (op_hash, token_start);
549 if (! current_templates) {
550 int last_index = strlen(token_start) - 1;
551 char last_char = token_start[last_index];
552 switch (last_char) {
553 case DWORD_OPCODE_SUFFIX:
554 case WORD_OPCODE_SUFFIX:
555 case BYTE_OPCODE_SUFFIX:
556 token_start[last_index] = '\0';
557 current_templates = (templates *) hash_find (op_hash, token_start);
558 token_start[last_index] = last_char;
559 i.suffix = last_char;
560 }
561 if (!current_templates) {
562 as_bad("no such 386 instruction: `%s'", token_start); return;
563 }
564 }
565 RESTORE_END_STRING (l);
566
567 /* check for rep/repne without a string instruction */
568 if (expecting_string_instruction &&
569 ! IS_STRING_INSTRUCTION (current_templates->
570 start->base_opcode)) {
571 as_bad("expecting string instruction after rep/repne");
572 return;
573 }
574
575 /* There may be operands to parse. */
576 if (*l != END_OF_INSN &&
577 /* For string instructions, we ignore any operands if given. This
578 kludges, for example, 'rep/movsb %ds:(%esi), %es:(%edi)' where
579 the operands are always going to be the same, and are not really
580 encoded in machine code. */
581 ! IS_STRING_INSTRUCTION (current_templates->
582 start->base_opcode)) {
583 /* parse operands */
584 do {
585 /* skip optional white space before operand */
586 while (! is_operand_char(*l) && *l != END_OF_INSN) {
587 if (! is_space_char(*l)) {
588 as_bad("invalid character %s before %s operand",
589 output_invalid(*l),
590 ordinal_names[i.operands]);
591 return;
592 }
593 l++;
594 }
595 token_start = l; /* after white space */
596 paren_not_balenced = 0;
597 while (paren_not_balenced || *l != ',') {
598 if (*l == END_OF_INSN) {
599 if (paren_not_balenced) {
600 as_bad("unbalenced parenthesis in %s operand.",
601 ordinal_names[i.operands]);
602 return;
603 } else break; /* we are done */
604 } else if (! is_operand_char(*l)) {
605 as_bad("invalid character %s in %s operand",
606 output_invalid(*l),
607 ordinal_names[i.operands]);
608 return;
609 }
610 if (*l == '(') ++paren_not_balenced;
611 if (*l == ')') --paren_not_balenced;
612 l++;
613 }
614 if (l != token_start) { /* yes, we've read in another operand */
615 unsigned int operand_ok;
616 this_operand = i.operands++;
617 if (i.operands > MAX_OPERANDS) {
618 as_bad("spurious operands; (%d operands/instruction max)",
619 MAX_OPERANDS);
620 return;
621 }
622 /* now parse operand adding info to 'i' as we go along */
623 END_STRING_AND_SAVE (l);
624 operand_ok = i386_operand (token_start);
625 RESTORE_END_STRING (l); /* restore old contents */
626 if (!operand_ok) return;
627 } else {
628 if (expecting_operand) {
629 expecting_operand_after_comma:
630 as_bad("expecting operand after ','; got nothing");
631 return;
632 }
633 if (*l == ',') {
634 as_bad("expecting operand before ','; got nothing");
635 return;
636 }
637 }
638
639 /* now *l must be either ',' or END_OF_INSN */
640 if (*l == ',') {
641 if (*++l == END_OF_INSN) { /* just skip it, if it's \n complain */
642 goto expecting_operand_after_comma;
643 }
644 expecting_operand = 1;
645 }
646 } while (*l != END_OF_INSN); /* until we get end of insn */
647 }
648 }
649
650 /* Now we've parsed the opcode into a set of templates, and have the
651 operands at hand.
652 Next, we find a template that matches the given insn,
653 making sure the overlap of the given operands types is consistent
654 with the template operand types. */
655
656 #define MATCH(overlap,given_type) \
657 (overlap && \
658 (overlap & (JumpAbsolute|BaseIndex|Mem8)) \
659 == (given_type & (JumpAbsolute|BaseIndex|Mem8)))
660
661 /* If m0 and m1 are register matches they must be consistent
662 with the expected operand types t0 and t1.
663 That is, if both m0 & m1 are register matches
664 i.e. ( ((m0 & (Reg)) && (m1 & (Reg)) ) ?
665 then, either 1. or 2. must be true:
666 1. the expected operand type register overlap is null:
667 (t0 & t1 & Reg) == 0
668 AND
669 the given register overlap is null:
670 (m0 & m1 & Reg) == 0
671 2. the expected operand type register overlap == the given
672 operand type overlap: (t0 & t1 & m0 & m1 & Reg).
673 */
674 #define CONSISTENT_REGISTER_MATCH(m0, m1, t0, t1) \
675 ( ((m0 & (Reg)) && (m1 & (Reg))) ? \
676 ( ((t0 & t1 & (Reg)) == 0 && (m0 & m1 & (Reg)) == 0) || \
677 ((t0 & t1) & (m0 & m1) & (Reg)) \
678 ) : 1)
679 {
680 register unsigned int overlap0, overlap1;
681 expressionS * exp;
682 unsigned int overlap2;
683 unsigned int found_reverse_match;
684
685 overlap0 = overlap1 = overlap2 = found_reverse_match = 0;
686 for (t = current_templates->start;
687 t < current_templates->end;
688 t++) {
689
690 /* must have right number of operands */
691 if (i.operands != t->operands) continue;
692 else if (!t->operands) break; /* 0 operands always matches */
693
694 overlap0 = i.types[0] & t->operand_types[0];
695 switch (t->operands) {
696 case 1:
697 if (! MATCH (overlap0,i.types[0])) continue;
698 break;
699 case 2: case 3:
700 overlap1 = i.types[1] & t->operand_types[1];
701 if (! MATCH (overlap0,i.types[0]) ||
702 ! MATCH (overlap1,i.types[1]) ||
703 ! CONSISTENT_REGISTER_MATCH(overlap0, overlap1,
704 t->operand_types[0],
705 t->operand_types[1])) {
706
707 /* check if other direction is valid ... */
708 if (! (t->opcode_modifier & COMES_IN_BOTH_DIRECTIONS))
709 continue;
710
711 /* try reversing direction of operands */
712 overlap0 = i.types[0] & t->operand_types[1];
713 overlap1 = i.types[1] & t->operand_types[0];
714 if (! MATCH (overlap0,i.types[0]) ||
715 ! MATCH (overlap1,i.types[1]) ||
716 ! CONSISTENT_REGISTER_MATCH (overlap0, overlap1,
717 t->operand_types[0],
718 t->operand_types[1])) {
719 /* does not match either direction */
720 continue;
721 }
722 /* found a reverse match here -- slip through */
723 /* found_reverse_match holds which of D or FloatD we've found */
724 found_reverse_match = t->opcode_modifier & COMES_IN_BOTH_DIRECTIONS;
725 } /* endif: not forward match */
726 /* found either forward/reverse 2 operand match here */
727 if (t->operands == 3) {
728 overlap2 = i.types[2] & t->operand_types[2];
729 if (! MATCH (overlap2,i.types[2]) ||
730 ! CONSISTENT_REGISTER_MATCH (overlap0, overlap2,
731 t->operand_types[0],
732 t->operand_types[2]) ||
733 ! CONSISTENT_REGISTER_MATCH (overlap1, overlap2,
734 t->operand_types[1],
735 t->operand_types[2]))
736 continue;
737 }
738 /* found either forward/reverse 2 or 3 operand match here:
739 slip through to break */
740 }
741 break; /* we've found a match; break out of loop */
742 } /* for (t = ... */
743 if (t == current_templates->end) { /* we found no match */
744 as_bad("operands given don't match any known 386 instruction");
745 return;
746 }
747
748 /* Copy the template we found (we may change it!). */
749 bcopy (t, &i.tm, sizeof (template));
750 t = &i.tm; /* alter new copy of template */
751
752 /* If there's no opcode suffix we try to invent one based on register
753 operands. */
754 if (! i.suffix && i.reg_operands) {
755 /* We take i.suffix from the LAST register operand specified. This
756 assumes that the last register operands is the destination register
757 operand. */
758 int o;
759 for (o = 0; o < MAX_OPERANDS; o++)
760 if (i.types[o] & Reg) {
761 i.suffix = (i.types[o] == Reg8) ? BYTE_OPCODE_SUFFIX :
762 (i.types[o] == Reg16) ? WORD_OPCODE_SUFFIX :
763 DWORD_OPCODE_SUFFIX;
764 }
765 }
766
767 /* Make still unresolved immediate matches conform to size of immediate
768 given in i.suffix. Note: overlap2 cannot be an immediate!
769 We assume this. */
770 if ((overlap0 & (Imm8|Imm8S|Imm16|Imm32))
771 && overlap0 != Imm8 && overlap0 != Imm8S
772 && overlap0 != Imm16 && overlap0 != Imm32) {
773 if (! i.suffix) {
774 as_bad("no opcode suffix given; can't determine immediate size");
775 return;
776 }
777 overlap0 &= (i.suffix == BYTE_OPCODE_SUFFIX ? (Imm8|Imm8S) :
778 (i.suffix == WORD_OPCODE_SUFFIX ? Imm16 : Imm32));
779 }
780 if ((overlap1 & (Imm8|Imm8S|Imm16|Imm32))
781 && overlap1 != Imm8 && overlap1 != Imm8S
782 && overlap1 != Imm16 && overlap1 != Imm32) {
783 if (! i.suffix) {
784 as_bad("no opcode suffix given; can't determine immediate size");
785 return;
786 }
787 overlap1 &= (i.suffix == BYTE_OPCODE_SUFFIX ? (Imm8|Imm8S) :
788 (i.suffix == WORD_OPCODE_SUFFIX ? Imm16 : Imm32));
789 }
790
791 i.types[0] = overlap0;
792 i.types[1] = overlap1;
793 i.types[2] = overlap2;
794
795 if (overlap0 & ImplicitRegister) i.reg_operands--;
796 if (overlap1 & ImplicitRegister) i.reg_operands--;
797 if (overlap2 & ImplicitRegister) i.reg_operands--;
798 if (overlap0 & Imm1) i.imm_operands = 0; /* kludge for shift insns */
799
800 if (found_reverse_match) {
801 unsigned int save;
802 save = t->operand_types[0];
803 t->operand_types[0] = t->operand_types[1];
804 t->operand_types[1] = save;
805 }
806
807 /* Finalize opcode. First, we change the opcode based on the operand
808 size given by i.suffix: we never have to change things for byte insns,
809 or when no opcode suffix is need to size the operands. */
810
811 if (! i.suffix && (t->opcode_modifier & W)) {
812 as_bad("no opcode suffix given and no register operands; can't size instruction");
813 return;
814 }
815
816 if (i.suffix && i.suffix != BYTE_OPCODE_SUFFIX) {
817 /* Select between byte and word/dword operations. */
818 if (t->opcode_modifier & W)
819 t->base_opcode |= W;
820 /* Now select between word & dword operations via the
821 operand size prefix. */
822 if (i.suffix == WORD_OPCODE_SUFFIX) {
823 if (i.prefixes == MAX_PREFIXES) {
824 as_bad("%d prefixes given and 'w' opcode suffix gives too many prefixes",
825 MAX_PREFIXES);
826 return;
827 }
828 i.prefix[i.prefixes++] = WORD_PREFIX_OPCODE;
829 }
830 }
831
832 /* For insns with operands there are more diddles to do to the opcode. */
833 if (i.operands) {
834 /* If we found a reverse match we must alter the opcode direction bit
835 found_reverse_match holds bit to set (different for int &
836 float insns). */
837
838 if (found_reverse_match) {
839 t->base_opcode |= found_reverse_match;
840 }
841
842 /*
843 The imul $imm, %reg instruction is converted into
844 imul $imm, %reg, %reg. */
845 if (t->opcode_modifier & imulKludge) {
846 i.regs[2] = i.regs[1]; /* Pretend we saw the 3 operand case. */
847 i.reg_operands = 2;
848 }
849
850 /* Certain instructions expect the destination to be in the i.rm.reg
851 field. This is by far the exceptional case. For these instructions,
852 if the source operand is a register, we must reverse the i.rm.reg
853 and i.rm.regmem fields. We accomplish this by faking that the
854 two register operands were given in the reverse order. */
855 if ((t->opcode_modifier & ReverseRegRegmem) && i.reg_operands == 2) {
856 unsigned int first_reg_operand = (i.types[0] & Reg) ? 0 : 1;
857 unsigned int second_reg_operand = first_reg_operand + 1;
858 reg_entry *tmp = i.regs[first_reg_operand];
859 i.regs[first_reg_operand] = i.regs[second_reg_operand];
860 i.regs[second_reg_operand] = tmp;
861 }
862
863 if (t->opcode_modifier & ShortForm) {
864 /* The register or float register operand is in operand 0 or 1. */
865 unsigned int o = (i.types[0] & (Reg|FloatReg)) ? 0 : 1;
866 /* Register goes in low 3 bits of opcode. */
867 t->base_opcode |= i.regs[o]->reg_num;
868 } else if (t->opcode_modifier & ShortFormW) {
869 /* Short form with 0x8 width bit. Register is always dest. operand */
870 t->base_opcode |= i.regs[1]->reg_num;
871 if (i.suffix == WORD_OPCODE_SUFFIX ||
872 i.suffix == DWORD_OPCODE_SUFFIX)
873 t->base_opcode |= 0x8;
874 } else if (t->opcode_modifier & Seg2ShortForm) {
875 if (t->base_opcode == POP_SEG_SHORT && i.regs[0]->reg_num == 1) {
876 as_bad("you can't 'pop cs' on the 386.");
877 return;
878 }
879 t->base_opcode |= (i.regs[0]->reg_num << 3);
880 } else if (t->opcode_modifier & Seg3ShortForm) {
881 /* 'push %fs' is 0x0fa0; 'pop %fs' is 0x0fa1.
882 'push %gs' is 0x0fa8; 'pop %fs' is 0x0fa9.
883 So, only if i.regs[0]->reg_num == 5 (%gs) do we need
884 to change the opcode. */
885 if (i.regs[0]->reg_num == 5)
886 t->base_opcode |= 0x08;
887 } else if (t->opcode_modifier & Modrm) {
888 /* The opcode is completed (modulo t->extension_opcode which must
889 be put into the modrm byte.
890 Now, we make the modrm & index base bytes based on all the info
891 we've collected. */
892
893 /* i.reg_operands MUST be the number of real register operands;
894 implicit registers do not count. */
895 if (i.reg_operands == 2) {
896 unsigned int source, dest;
897 source = (i.types[0] & (Reg|SReg2|SReg3|Control|Debug|Test)) ? 0 : 1;
898 dest = source + 1;
899 i.rm.mode = 3;
900 /* We must be careful to make sure that all segment/control/test/
901 debug registers go into the i.rm.reg field (despite the whether
902 they are source or destination operands). */
903 if (i.regs[dest]->reg_type & (SReg2|SReg3|Control|Debug|Test)) {
904 i.rm.reg = i.regs[dest]->reg_num;
905 i.rm.regmem = i.regs[source]->reg_num;
906 } else {
907 i.rm.reg = i.regs[source]->reg_num;
908 i.rm.regmem = i.regs[dest]->reg_num;
909 }
910 } else { /* if it's not 2 reg operands... */
911 if (i.mem_operands) {
912 unsigned int fake_zero_displacement = 0;
913 unsigned int o = (i.types[0] & Mem) ? 0 : ((i.types[1] & Mem) ? 1 : 2);
914
915 /* Encode memory operand into modrm byte and base index byte. */
916
917 if (i.base_reg == esp && ! i.index_reg) {
918 /* <disp>(%esp) becomes two byte modrm with no index register. */
919 i.rm.regmem = ESCAPE_TO_TWO_BYTE_ADDRESSING;
920 i.rm.mode = MODE_FROM_DISP_SIZE (i.types[o]);
921 i.bi.base = ESP_REG_NUM;
922 i.bi.index = NO_INDEX_REGISTER;
923 i.bi.scale = 0; /* Must be zero! */
924 } else if (i.base_reg == ebp && !i.index_reg) {
925 if (! (i.types[o] & Disp)) {
926 /* Must fake a zero byte displacement.
927 There is no direct way to code '(%ebp)' directly. */
928 fake_zero_displacement = 1;
929 /* fake_zero_displacement code does not set this. */
930 i.types[o] |= Disp8;
931 }
932 i.rm.mode = MODE_FROM_DISP_SIZE (i.types[o]);
933 i.rm.regmem = EBP_REG_NUM;
934 } else if (! i.base_reg && (i.types[o] & BaseIndex)) {
935 /* There are three cases here.
936 Case 1: '<32bit disp>(,1)' -- indirect absolute.
937 (Same as cases 2 & 3 with NO index register)
938 Case 2: <32bit disp> (,<index>) -- no base register with disp
939 Case 3: (, <index>) --- no base register;
940 no disp (must add 32bit 0 disp). */
941 i.rm.regmem = ESCAPE_TO_TWO_BYTE_ADDRESSING;
942 i.rm.mode = 0; /* 32bit mode */
943 i.bi.base = NO_BASE_REGISTER;
944 i.types[o] &= ~Disp;
945 i.types[o] |= Disp32; /* Must be 32bit! */
946 if (i.index_reg) { /* case 2 or case 3 */
947 i.bi.index = i.index_reg->reg_num;
948 i.bi.scale = i.log2_scale_factor;
949 if (i.disp_operands == 0)
950 fake_zero_displacement = 1; /* case 3 */
951 } else {
952 i.bi.index = NO_INDEX_REGISTER;
953 i.bi.scale = 0;
954 }
955 } else if (i.disp_operands && !i.base_reg && !i.index_reg) {
956 /* Operand is just <32bit disp> */
957 i.rm.regmem = EBP_REG_NUM;
958 i.rm.mode = 0;
959 i.types[o] &= ~Disp;
960 i.types[o] |= Disp32;
961 } else {
962 /* It's not a special case; rev'em up. */
963 i.rm.regmem = i.base_reg->reg_num;
964 i.rm.mode = MODE_FROM_DISP_SIZE (i.types[o]);
965 if (i.index_reg) {
966 i.rm.regmem = ESCAPE_TO_TWO_BYTE_ADDRESSING;
967 i.bi.base = i.base_reg->reg_num;
968 i.bi.index = i.index_reg->reg_num;
969 i.bi.scale = i.log2_scale_factor;
970 if (i.base_reg == ebp && i.disp_operands == 0) { /* pace */
971 fake_zero_displacement = 1;
972 i.types[o] |= Disp8;
973 i.rm.mode = MODE_FROM_DISP_SIZE (i.types[o]);
974 }
975 }
976 }
977 if (fake_zero_displacement) {
978 /* Fakes a zero displacement assuming that i.types[o] holds
979 the correct displacement size. */
980 exp = &disp_expressions[i.disp_operands++];
981 i.disps[o] = exp;
982 exp->X_seg = SEG_ABSOLUTE;
983 exp->X_add_number = 0;
984 exp->X_add_symbol = (symbolS *) 0;
985 exp->X_subtract_symbol = (symbolS *) 0;
986 }
987
988 /* Select the correct segment for the memory operand. */
989 if (i.seg) {
990 const unsigned int seg_index;
991 const seg_entry * default_seg;
992
993 if (i.rm.regmem == ESCAPE_TO_TWO_BYTE_ADDRESSING) {
994 seg_index = (i.rm.mode<<3) | i.bi.base;
995 default_seg = two_byte_segment_defaults [seg_index];
996 } else {
997 seg_index = (i.rm.mode<<3) | i.rm.regmem;
998 default_seg = one_byte_segment_defaults [seg_index];
999 }
1000 /* If the specified segment is not the default, use an
1001 opcode prefix to select it */
1002 if (i.seg != default_seg) {
1003 if (i.prefixes == MAX_PREFIXES) {
1004 as_bad("%d prefixes given and %s segment override gives too many prefixes",
1005 MAX_PREFIXES, i.seg->seg_name);
1006 return;
1007 }
1008 i.prefix[i.prefixes++] = i.seg->seg_prefix;
1009 }
1010 }
1011 }
1012
1013 /* Fill in i.rm.reg or i.rm.regmem field with register operand
1014 (if any) based on t->extension_opcode. Again, we must be careful
1015 to make sure that segment/control/debug/test registers are coded
1016 into the i.rm.reg field. */
1017 if (i.reg_operands) {
1018 unsigned int o =
1019 (i.types[0] & (Reg|SReg2|SReg3|Control|Debug|Test)) ? 0 :
1020 (i.types[1] & (Reg|SReg2|SReg3|Control|Debug|Test)) ? 1 : 2;
1021 /* If there is an extension opcode to put here, the register number
1022 must be put into the regmem field. */
1023 if (t->extension_opcode != None)
1024 i.rm.regmem = i.regs[o]->reg_num;
1025 else i.rm.reg = i.regs[o]->reg_num;
1026
1027 /* Now, if no memory operand has set i.rm.mode = 0, 1, 2
1028 we must set it to 3 to indicate this is a register operand
1029 int the regmem field */
1030 if (! i.mem_operands) i.rm.mode = 3;
1031 }
1032
1033 /* Fill in i.rm.reg field with extension opcode (if any). */
1034 if (t->extension_opcode != None)
1035 i.rm.reg = t->extension_opcode;
1036 }
1037 }
1038 }
1039 }
1040
1041 /* Handle conversion of 'int $3' --> special int3 insn. */
1042 if (t->base_opcode == INT_OPCODE && i.imms[0]->X_add_number == 3) {
1043 t->base_opcode = INT3_OPCODE;
1044 i.imm_operands = 0;
1045 }
1046
1047 /* We are ready to output the insn. */
1048 {
1049 register char * p;
1050
1051 /* Output jumps. */
1052 if (t->opcode_modifier & Jump) {
1053 int n = i.disps[0]->X_add_number;
1054
1055 switch (i.disps[0]->X_seg) {
1056 case SEG_ABSOLUTE:
1057 if (FITS_IN_SIGNED_BYTE (n)) {
1058 p = frag_more (2);
1059 p[0] = t->base_opcode;
1060 p[1] = n;
1061 #if 0 /* leave out 16 bit jumps - pace */
1062 } else if (FITS_IN_SIGNED_WORD (n)) {
1063 p = frag_more (4);
1064 p[0] = WORD_PREFIX_OPCODE;
1065 p[1] = t->base_opcode;
1066 md_number_to_chars (&p[2], n, 2);
1067 #endif
1068 } else { /* It's an absolute dword displacement. */
1069 if (t->base_opcode == JUMP_PC_RELATIVE) { /* pace */
1070 /* unconditional jump */
1071 p = frag_more (5);
1072 p[0] = 0xe9;
1073 md_number_to_chars (&p[1], n, 4);
1074 } else {
1075 /* conditional jump */
1076 p = frag_more (6);
1077 p[0] = TWO_BYTE_OPCODE_ESCAPE;
1078 p[1] = t->base_opcode + 0x10;
1079 md_number_to_chars (&p[2], n, 4);
1080 }
1081 }
1082 break;
1083 default:
1084 /* It's a symbol; end frag & setup for relax.
1085 Make sure there are 6 chars left in the current frag; if not
1086 we'll have to start a new one. */
1087 /* I caught it failing with obstack_room == 6,
1088 so I changed to <= pace */
1089 if (obstack_room (&frags) <= 6) {
1090 frag_wane(frag_now);
1091 frag_new (0);
1092 }
1093 p = frag_more (1);
1094 p[0] = t->base_opcode;
1095 frag_var (rs_machine_dependent,
1096 6, /* 2 opcode/prefix + 4 displacement */
1097 1,
1098 ((unsigned char) *p == JUMP_PC_RELATIVE
1099 ? ENCODE_RELAX_STATE (UNCOND_JUMP, BYTE)
1100 : ENCODE_RELAX_STATE (COND_JUMP, BYTE)),
1101 i.disps[0]->X_add_symbol,
1102 n, p);
1103 break;
1104 }
1105 } else if (t->opcode_modifier & (JumpByte|JumpDword)) {
1106 int size = (t->opcode_modifier & JumpByte) ? 1 : 4;
1107 int n = i.disps[0]->X_add_number;
1108
1109 if (FITS_IN_UNSIGNED_BYTE(t->base_opcode)) {
1110 FRAG_APPEND_1_CHAR (t->base_opcode);
1111 } else {
1112 p = frag_more (2); /* opcode can be at most two bytes */
1113 /* put out high byte first: can't use md_number_to_chars! */
1114 *p++ = (t->base_opcode >> 8) & 0xff;
1115 *p = t->base_opcode & 0xff;
1116 }
1117
1118 p = frag_more (size);
1119 switch (i.disps[0]->X_seg) {
1120 case SEG_ABSOLUTE:
1121 md_number_to_chars (p, n, size);
1122 if (size == 1 && ! FITS_IN_SIGNED_BYTE (n)) {
1123 as_bad("loop/jecx only takes byte displacement; %d shortened to %d",
1124 n, *p);
1125 }
1126 break;
1127 default:
1128 fix_new (frag_now, p - frag_now->fr_literal, size,
1129 i.disps[0]->X_add_symbol, i.disps[0]->X_subtract_symbol,
1130 i.disps[0]->X_add_number, 1, NO_RELOC);
1131 break;
1132 }
1133 } else if (t->opcode_modifier & JumpInterSegment) {
1134 p = frag_more (1 + 2 + 4); /* 1 opcode; 2 segment; 4 offset */
1135 p[0] = t->base_opcode;
1136 if (i.imms[1]->X_seg == SEG_ABSOLUTE)
1137 md_number_to_chars (p + 1, i.imms[1]->X_add_number, 4);
1138 else
1139 fix_new (frag_now, p + 1 - frag_now->fr_literal, 4,
1140 i.imms[1]->X_add_symbol,
1141 i.imms[1]->X_subtract_symbol,
1142 i.imms[1]->X_add_number, 0, NO_RELOC);
1143 if (i.imms[0]->X_seg != SEG_ABSOLUTE)
1144 as_bad("can't handle non absolute segment in long call/jmp");
1145 md_number_to_chars (p + 5, i.imms[0]->X_add_number, 2);
1146 } else {
1147 /* Output normal instructions here. */
1148 register char *q;
1149
1150 /* First the prefix bytes. */
1151 for (q = i.prefix; q < i.prefix + i.prefixes; q++) {
1152 p = frag_more (1);
1153 md_number_to_chars (p, (unsigned int) *q, 1);
1154 }
1155
1156 /* Now the opcode; be careful about word order here! */
1157 if (FITS_IN_UNSIGNED_BYTE(t->base_opcode)) {
1158 FRAG_APPEND_1_CHAR (t->base_opcode);
1159 } else if (FITS_IN_UNSIGNED_WORD(t->base_opcode)) {
1160 p = frag_more (2);
1161 /* put out high byte first: can't use md_number_to_chars! */
1162 *p++ = (t->base_opcode >> 8) & 0xff;
1163 *p = t->base_opcode & 0xff;
1164 } else { /* opcode is either 3 or 4 bytes */
1165 if (t->base_opcode & 0xff000000) {
1166 p = frag_more (4);
1167 *p++ = (t->base_opcode >> 24) & 0xff;
1168 } else p = frag_more (3);
1169 *p++ = (t->base_opcode >> 16) & 0xff;
1170 *p++ = (t->base_opcode >> 8) & 0xff;
1171 *p = (t->base_opcode ) & 0xff;
1172 }
1173
1174 /* Now the modrm byte and base index byte (if present). */
1175 if (t->opcode_modifier & Modrm) {
1176 p = frag_more (1);
1177 /* md_number_to_chars (p, i.rm, 1); */
1178 md_number_to_chars (p, (i.rm.regmem<<0 | i.rm.reg<<3 | i.rm.mode<<6), 1);
1179 /* If i.rm.regmem == ESP (4) && i.rm.mode != Mode 3 (Register mode)
1180 ==> need second modrm byte. */
1181 if (i.rm.regmem == ESCAPE_TO_TWO_BYTE_ADDRESSING && i.rm.mode != 3) {
1182 p = frag_more (1);
1183 /* md_number_to_chars (p, i.bi, 1); */
1184 md_number_to_chars (p,(i.bi.base<<0 | i.bi.index<<3 | i.bi.scale<<6), 1);
1185 }
1186 }
1187
1188 if (i.disp_operands) {
1189 register unsigned int n;
1190
1191 for (n = 0; n < i.operands; n++) {
1192 if (i.disps[n]) {
1193 if (i.disps[n]->X_seg == SEG_ABSOLUTE) {
1194 if (i.types[n] & (Disp8|Abs8)) {
1195 p = frag_more (1);
1196 md_number_to_chars (p, i.disps[n]->X_add_number, 1);
1197 } else if (i.types[n] & (Disp16|Abs16)) {
1198 p = frag_more (2);
1199 md_number_to_chars (p, i.disps[n]->X_add_number, 2);
1200 } else { /* Disp32|Abs32 */
1201 p = frag_more (4);
1202 md_number_to_chars (p, i.disps[n]->X_add_number, 4);
1203 }
1204 } else { /* not SEG_ABSOLUTE */
1205 /* need a 32-bit fixup (don't support 8bit non-absolute disps) */
1206 p = frag_more (4);
1207 fix_new (frag_now, p - frag_now->fr_literal, 4,
1208 i.disps[n]->X_add_symbol, i.disps[n]->X_subtract_symbol,
1209 i.disps[n]->X_add_number, 0, NO_RELOC);
1210 }
1211 }
1212 }
1213 } /* end displacement output */
1214
1215 /* output immediate */
1216 if (i.imm_operands) {
1217 register unsigned int n;
1218
1219 for (n = 0; n < i.operands; n++) {
1220 if (i.imms[n]) {
1221 if (i.imms[n]->X_seg == SEG_ABSOLUTE) {
1222 if (i.types[n] & (Imm8|Imm8S)) {
1223 p = frag_more (1);
1224 md_number_to_chars (p, i.imms[n]->X_add_number, 1);
1225 } else if (i.types[n] & Imm16) {
1226 p = frag_more (2);
1227 md_number_to_chars (p, i.imms[n]->X_add_number, 2);
1228 } else {
1229 p = frag_more (4);
1230 md_number_to_chars (p, i.imms[n]->X_add_number, 4);
1231 }
1232 } else { /* not SEG_ABSOLUTE */
1233 /* need a 32-bit fixup (don't support 8bit non-absolute ims) */
1234 /* try to support other sizes ... */
1235 int size;
1236 if (i.types[n] & (Imm8|Imm8S))
1237 size = 1;
1238 else if (i.types[n] & Imm16)
1239 size = 2;
1240 else
1241 size = 4;
1242 p = frag_more (size);
1243 fix_new (frag_now, p - frag_now->fr_literal, size,
1244 i.imms[n]->X_add_symbol, i.imms[n]->X_subtract_symbol,
1245 i.imms[n]->X_add_number, 0, NO_RELOC);
1246 }
1247 }
1248 }
1249 } /* end immediate output */
1250 }
1251
1252 #ifdef DEBUG386
1253 if (flagseen ['D']) {
1254 pi (line, &i);
1255 }
1256 #endif /* DEBUG386 */
1257
1258 }
1259 return;
1260 }
1261 \f
1262 /* Parse OPERAND_STRING into the i386_insn structure I. Returns non-zero
1263 on error. */
1264
1265 static int i386_operand (operand_string)
1266 char *operand_string;
1267 {
1268 register char *op_string = operand_string;
1269
1270 /* Address of '\0' at end of operand_string. */
1271 char * end_of_operand_string = operand_string + strlen(operand_string);
1272
1273 /* Start and end of displacement string expression (if found). */
1274 char * displacement_string_start = 0;
1275 char * displacement_string_end;
1276
1277 /* We check for an absolute prefix (differentiating,
1278 for example, 'jmp pc_relative_label' from 'jmp *absolute_label'. */
1279 if (*op_string == ABSOLUTE_PREFIX) {
1280 op_string++;
1281 i.types[this_operand] |= JumpAbsolute;
1282 }
1283
1284 /* Check if operand is a register. */
1285 if (*op_string == REGISTER_PREFIX) {
1286 register reg_entry * r;
1287 if (! (r = parse_register (op_string))) {
1288 as_bad("bad register name ('%s')", op_string);
1289 return 0;
1290 }
1291 /* Check for segment override, rather than segment register by
1292 searching for ':' after %<x>s where <x> = s, c, d, e, f, g. */
1293 if ((r->reg_type & (SReg2|SReg3)) && op_string[3] == ':') {
1294 switch (r->reg_num) {
1295 case 0:
1296 i.seg = &es; break;
1297 case 1:
1298 i.seg = &cs; break;
1299 case 2:
1300 i.seg = &ss; break;
1301 case 3:
1302 i.seg = &ds; break;
1303 case 4:
1304 i.seg = &fs; break;
1305 case 5:
1306 i.seg = &gs; break;
1307 }
1308 op_string += 4; /* skip % <x> s : */
1309 operand_string = op_string; /* Pretend given string starts here. */
1310 if (!is_digit_char(*op_string) && !is_identifier_char(*op_string)
1311 && *op_string != '(' && *op_string != ABSOLUTE_PREFIX) {
1312 as_bad("bad memory operand after segment override");
1313 return 0;
1314 }
1315 /* Handle case of %es:*foo. */
1316 if (*op_string == ABSOLUTE_PREFIX) {
1317 op_string++;
1318 i.types[this_operand] |= JumpAbsolute;
1319 }
1320 goto do_memory_reference;
1321 }
1322 i.types[this_operand] |= r->reg_type;
1323 i.regs[this_operand] = r;
1324 i.reg_operands++;
1325 } else if (*op_string == IMMEDIATE_PREFIX) { /* ... or an immediate */
1326 char * save_input_line_pointer;
1327 register expressionS *exp;
1328 segT exp_seg;
1329 if (i.imm_operands == MAX_IMMEDIATE_OPERANDS) {
1330 as_bad("only 1 or 2 immediate operands are allowed");
1331 return 0;
1332 }
1333 exp = &im_expressions[i.imm_operands++];
1334 i.imms [this_operand] = exp;
1335 save_input_line_pointer = input_line_pointer;
1336 input_line_pointer = ++op_string; /* must advance op_string! */
1337 exp_seg = expression (exp);
1338 input_line_pointer = save_input_line_pointer;
1339 switch (exp_seg) {
1340 case SEG_ABSENT: /* missing or bad expr becomes absolute 0 */
1341 as_bad("missing or invalid immediate expression '%s' taken as 0",
1342 operand_string);
1343 exp->X_seg = SEG_ABSOLUTE;
1344 exp->X_add_number = 0;
1345 exp->X_add_symbol = (symbolS *) 0;
1346 exp->X_subtract_symbol = (symbolS *) 0;
1347 i.types[this_operand] |= Imm;
1348 break;
1349 case SEG_ABSOLUTE:
1350 i.types[this_operand] |= SMALLEST_IMM_TYPE (exp->X_add_number);
1351 break;
1352 case SEG_TEXT: case SEG_DATA: case SEG_BSS: case SEG_UNKNOWN:
1353 i.types[this_operand] |= Imm32; /* this is an address ==> 32bit */
1354 break;
1355 default:
1356 seg_unimplemented:
1357 as_bad("Unimplemented segment type %d in parse_operand", exp_seg);
1358 return 0;
1359 }
1360 /* shorten this type of this operand if the instruction wants
1361 * fewer bits than are present in the immediate. The bit field
1362 * code can put out 'andb $0xffffff, %al', for example. pace
1363 * also 'movw $foo,(%eax)'
1364 */
1365 switch (i.suffix) {
1366 case WORD_OPCODE_SUFFIX:
1367 i.types[this_operand] |= Imm16;
1368 break;
1369 case BYTE_OPCODE_SUFFIX:
1370 i.types[this_operand] |= Imm16 | Imm8 | Imm8S;
1371 break;
1372 }
1373 } else if (is_digit_char(*op_string) || is_identifier_char(*op_string)
1374 || *op_string == '(') {
1375 /* This is a memory reference of some sort. */
1376 register char * base_string;
1377 unsigned int found_base_index_form;
1378
1379 do_memory_reference:
1380 if (i.mem_operands == MAX_MEMORY_OPERANDS) {
1381 as_bad("more than 1 memory reference in instruction");
1382 return 0;
1383 }
1384 i.mem_operands++;
1385
1386 /* Determine type of memory operand from opcode_suffix;
1387 no opcode suffix implies general memory references. */
1388 switch (i.suffix) {
1389 case BYTE_OPCODE_SUFFIX:
1390 i.types[this_operand] |= Mem8;
1391 break;
1392 case WORD_OPCODE_SUFFIX:
1393 i.types[this_operand] |= Mem16;
1394 break;
1395 case DWORD_OPCODE_SUFFIX:
1396 default:
1397 i.types[this_operand] |= Mem32;
1398 }
1399
1400 /* Check for base index form. We detect the base index form by
1401 looking for an ')' at the end of the operand, searching
1402 for the '(' matching it, and finding a REGISTER_PREFIX or ','
1403 after it. */
1404 base_string = end_of_operand_string - 1;
1405 found_base_index_form = 0;
1406 if (*base_string == ')') {
1407 unsigned int parens_balenced = 1;
1408 /* We've already checked that the number of left & right ()'s are equal,
1409 so this loop will not be infinite. */
1410 do {
1411 base_string--;
1412 if (*base_string == ')') parens_balenced++;
1413 if (*base_string == '(') parens_balenced--;
1414 } while (parens_balenced);
1415 base_string++; /* Skip past '('. */
1416 if (*base_string == REGISTER_PREFIX || *base_string == ',')
1417 found_base_index_form = 1;
1418 }
1419
1420 /* If we can't parse a base index register expression, we've found
1421 a pure displacement expression. We set up displacement_string_start
1422 and displacement_string_end for the code below. */
1423 if (! found_base_index_form) {
1424 displacement_string_start = op_string;
1425 displacement_string_end = end_of_operand_string;
1426 } else {
1427 char *base_reg_name, *index_reg_name, *num_string;
1428 int num;
1429
1430 i.types[this_operand] |= BaseIndex;
1431
1432 /* If there is a displacement set-up for it to be parsed later. */
1433 if (base_string != op_string + 1) {
1434 displacement_string_start = op_string;
1435 displacement_string_end = base_string - 1;
1436 }
1437
1438 /* Find base register (if any). */
1439 if (*base_string != ',') {
1440 base_reg_name = base_string++;
1441 /* skip past register name & parse it */
1442 while (isalpha(*base_string)) base_string++;
1443 if (base_string == base_reg_name+1) {
1444 as_bad("can't find base register name after '(%c'",
1445 REGISTER_PREFIX);
1446 return 0;
1447 }
1448 END_STRING_AND_SAVE (base_string);
1449 if (! (i.base_reg = parse_register (base_reg_name))) {
1450 as_bad("bad base register name ('%s')", base_reg_name);
1451 return 0;
1452 }
1453 RESTORE_END_STRING (base_string);
1454 }
1455
1456 /* Now check seperator; must be ',' ==> index reg
1457 OR num ==> no index reg. just scale factor
1458 OR ')' ==> end. (scale factor = 1) */
1459 if (*base_string != ',' && *base_string != ')') {
1460 as_bad("expecting ',' or ')' after base register in `%s'",
1461 operand_string);
1462 return 0;
1463 }
1464
1465 /* There may index reg here; and there may be a scale factor. */
1466 if (*base_string == ',' && *(base_string+1) == REGISTER_PREFIX) {
1467 index_reg_name = ++base_string;
1468 while (isalpha(*++base_string));
1469 END_STRING_AND_SAVE (base_string);
1470 if (! (i.index_reg = parse_register(index_reg_name))) {
1471 as_bad("bad index register name ('%s')", index_reg_name);
1472 return 0;
1473 }
1474 RESTORE_END_STRING (base_string);
1475 }
1476
1477 /* Check for scale factor. */
1478 if (*base_string == ',' && isdigit(*(base_string+1))) {
1479 num_string = ++base_string;
1480 while (is_digit_char(*base_string)) base_string++;
1481 if (base_string == num_string) {
1482 as_bad("can't find a scale factor after ','");
1483 return 0;
1484 }
1485 END_STRING_AND_SAVE (base_string);
1486 /* We've got a scale factor. */
1487 if (! sscanf (num_string, "%d", &num)) {
1488 as_bad("can't parse scale factor from '%s'", num_string);
1489 return 0;
1490 }
1491 RESTORE_END_STRING (base_string);
1492 switch (num) { /* must be 1 digit scale */
1493 case 1: i.log2_scale_factor = 0; break;
1494 case 2: i.log2_scale_factor = 1; break;
1495 case 4: i.log2_scale_factor = 2; break;
1496 case 8: i.log2_scale_factor = 3; break;
1497 default:
1498 as_bad("expecting scale factor of 1, 2, 4, 8; got %d", num);
1499 return 0;
1500 }
1501 } else {
1502 if (! i.index_reg && *base_string == ',') {
1503 as_bad("expecting index register or scale factor after ','; got '%c'",
1504 *(base_string+1));
1505 return 0;
1506 }
1507 }
1508 }
1509
1510 /* If there's an expression begining the operand, parse it,
1511 assuming displacement_string_start and displacement_string_end
1512 are meaningful. */
1513 if (displacement_string_start) {
1514 register expressionS * exp;
1515 segT exp_seg;
1516 char * save_input_line_pointer;
1517 exp = &disp_expressions[i.disp_operands];
1518 i.disps [this_operand] = exp;
1519 i.disp_operands++;
1520 save_input_line_pointer = input_line_pointer;
1521 input_line_pointer = displacement_string_start;
1522 END_STRING_AND_SAVE (displacement_string_end);
1523 exp_seg = expression (exp);
1524 if(*input_line_pointer)
1525 as_bad("Ignoring junk '%s' after expression",input_line_pointer);
1526 RESTORE_END_STRING (displacement_string_end);
1527 input_line_pointer = save_input_line_pointer;
1528 switch (exp_seg) {
1529 case SEG_ABSENT:
1530 /* missing expr becomes absolute 0 */
1531 as_bad("missing or invalid displacement '%s' taken as 0",
1532 operand_string);
1533 i.types[this_operand] |= (Disp|Abs);
1534 exp->X_seg = SEG_ABSOLUTE;
1535 exp->X_add_number = 0;
1536 exp->X_add_symbol = (symbolS *) 0;
1537 exp->X_subtract_symbol = (symbolS *) 0;
1538 break;
1539 case SEG_ABSOLUTE:
1540 i.types[this_operand] |= SMALLEST_DISP_TYPE (exp->X_add_number);
1541 break;
1542 case SEG_TEXT: case SEG_DATA: case SEG_BSS:
1543 case SEG_UNKNOWN: /* must be 32 bit displacement (i.e. address) */
1544 i.types[this_operand] |= Disp32;
1545 break;
1546 default:
1547 goto seg_unimplemented;
1548 }
1549 }
1550
1551 /* Make sure the memory operand we've been dealt is valid. */
1552 if (i.base_reg && i.index_reg &&
1553 ! (i.base_reg->reg_type & i.index_reg->reg_type & Reg)) {
1554 as_bad("register size mismatch in (base,index,scale) expression");
1555 return 0;
1556 }
1557 if ((i.base_reg && (i.base_reg->reg_type & Reg32) == 0) ||
1558 (i.index_reg && (i.index_reg->reg_type & Reg32) == 0)) {
1559 as_bad("base/index register must be 32 bit register");
1560 return 0;
1561 }
1562 if (i.index_reg && i.index_reg == esp) {
1563 as_bad("%s may not be used as an index register", esp->reg_name);
1564 return 0;
1565 }
1566 } else { /* it's not a memory operand; argh! */
1567 as_bad("invalid char %s begining %s operand '%s'",
1568 output_invalid(*op_string), ordinal_names[this_operand],
1569 op_string);
1570 return 0;
1571 }
1572 return 1; /* normal return */
1573 }
1574 \f
1575 /*
1576 * md_estimate_size_before_relax()
1577 *
1578 * Called just before relax().
1579 * Any symbol that is now undefined will not become defined.
1580 * Return the correct fr_subtype in the frag.
1581 * Return the initial "guess for fr_var" to caller.
1582 * The guess for fr_var is ACTUALLY the growth beyond fr_fix.
1583 * Whatever we do to grow fr_fix or fr_var contributes to our returned value.
1584 * Although it may not be explicit in the frag, pretend fr_var starts with a
1585 * 0 value.
1586 */
1587 int
1588 md_estimate_size_before_relax (fragP, segment)
1589 register fragS * fragP;
1590 register segT segment;
1591 {
1592 register unsigned char * opcode;
1593 register int old_fr_fix;
1594
1595 old_fr_fix = fragP -> fr_fix;
1596 opcode = (unsigned char *) fragP -> fr_opcode;
1597 /* We've already got fragP->fr_subtype right; all we have to do is check
1598 for un-relaxable symbols. */
1599 if (S_GET_SEGMENT(fragP -> fr_symbol) != segment) {
1600 /* symbol is undefined in this segment */
1601 switch (opcode[0]) {
1602 case JUMP_PC_RELATIVE: /* make jmp (0xeb) a dword displacement jump */
1603 opcode[0] = 0xe9; /* dword disp jmp */
1604 fragP -> fr_fix += 4;
1605 fix_new (fragP, old_fr_fix, 4,
1606 fragP -> fr_symbol,
1607 (symbolS *) 0,
1608 fragP -> fr_offset, 1, NO_RELOC);
1609 break;
1610
1611 default:
1612 /* This changes the byte-displacement jump 0x7N -->
1613 the dword-displacement jump 0x0f8N */
1614 opcode[1] = opcode[0] + 0x10;
1615 opcode[0] = TWO_BYTE_OPCODE_ESCAPE; /* two-byte escape */
1616 fragP -> fr_fix += 1 + 4; /* we've added an opcode byte */
1617 fix_new (fragP, old_fr_fix + 1, 4,
1618 fragP -> fr_symbol,
1619 (symbolS *) 0,
1620 fragP -> fr_offset, 1, NO_RELOC);
1621 break;
1622 }
1623 frag_wane (fragP);
1624 }
1625 return (fragP -> fr_var + fragP -> fr_fix - old_fr_fix);
1626 } /* md_estimate_size_before_relax() */
1627 \f
1628 /*
1629 * md_convert_frag();
1630 *
1631 * Called after relax() is finished.
1632 * In: Address of frag.
1633 * fr_type == rs_machine_dependent.
1634 * fr_subtype is what the address relaxed to.
1635 *
1636 * Out: Any fixSs and constants are set up.
1637 * Caller will turn frag into a ".space 0".
1638 */
1639 void
1640 md_convert_frag (headers, fragP)
1641 object_headers *headers;
1642 register fragS * fragP;
1643 {
1644 register unsigned char * opcode;
1645 unsigned char * where_to_put_displacement;
1646 unsigned int target_address, opcode_address;
1647 unsigned int extension;
1648 int displacement_from_opcode_start;
1649
1650 opcode = (unsigned char *) fragP -> fr_opcode;
1651
1652 /* Address we want to reach in file space. */
1653 target_address = S_GET_VALUE(fragP->fr_symbol) + fragP->fr_offset;
1654
1655 /* Address opcode resides at in file space. */
1656 opcode_address = fragP->fr_address + fragP->fr_fix;
1657
1658 /* Displacement from opcode start to fill into instruction. */
1659 displacement_from_opcode_start = target_address - opcode_address;
1660
1661 switch (fragP->fr_subtype) {
1662 case ENCODE_RELAX_STATE (COND_JUMP, BYTE):
1663 case ENCODE_RELAX_STATE (UNCOND_JUMP, BYTE):
1664 /* don't have to change opcode */
1665 extension = 1; /* 1 opcode + 1 displacement */
1666 where_to_put_displacement = &opcode[1];
1667 break;
1668
1669 case ENCODE_RELAX_STATE (COND_JUMP, WORD):
1670 opcode[1] = TWO_BYTE_OPCODE_ESCAPE;
1671 opcode[2] = opcode[0] + 0x10;
1672 opcode[0] = WORD_PREFIX_OPCODE;
1673 extension = 4; /* 3 opcode + 2 displacement */
1674 where_to_put_displacement = &opcode[3];
1675 break;
1676
1677 case ENCODE_RELAX_STATE (UNCOND_JUMP, WORD):
1678 opcode[1] = 0xe9;
1679 opcode[0] = WORD_PREFIX_OPCODE;
1680 extension = 3; /* 2 opcode + 2 displacement */
1681 where_to_put_displacement = &opcode[2];
1682 break;
1683
1684 case ENCODE_RELAX_STATE (COND_JUMP, DWORD):
1685 opcode[1] = opcode[0] + 0x10;
1686 opcode[0] = TWO_BYTE_OPCODE_ESCAPE;
1687 extension = 5; /* 2 opcode + 4 displacement */
1688 where_to_put_displacement = &opcode[2];
1689 break;
1690
1691 case ENCODE_RELAX_STATE (UNCOND_JUMP, DWORD):
1692 opcode[0] = 0xe9;
1693 extension = 4; /* 1 opcode + 4 displacement */
1694 where_to_put_displacement = &opcode[1];
1695 break;
1696
1697 default:
1698 BAD_CASE(fragP -> fr_subtype);
1699 break;
1700 }
1701 /* now put displacement after opcode */
1702 md_number_to_chars (where_to_put_displacement,
1703 displacement_from_opcode_start - extension,
1704 SIZE_FROM_RELAX_STATE (fragP->fr_subtype));
1705 fragP -> fr_fix += extension;
1706 }
1707
1708 \f
1709 int md_short_jump_size = 2; /* size of byte displacement jmp */
1710 int md_long_jump_size = 5; /* size of dword displacement jmp */
1711 int md_reloc_size = 8; /* Size of relocation record */
1712
1713 void md_create_short_jump(ptr, from_addr, to_addr, frag, to_symbol)
1714 char *ptr;
1715 long from_addr, to_addr;
1716 fragS *frag;
1717 symbolS *to_symbol;
1718 {
1719 long offset;
1720
1721 offset = to_addr - (from_addr + 2);
1722 md_number_to_chars (ptr, (long) 0xeb, 1); /* opcode for byte-disp jump */
1723 md_number_to_chars (ptr + 1, offset, 1);
1724 }
1725
1726 void md_create_long_jump (ptr, from_addr, to_addr, frag, to_symbol)
1727 char *ptr;
1728 long from_addr, to_addr;
1729 fragS *frag;
1730 symbolS *to_symbol;
1731 {
1732 long offset;
1733
1734 if (flagseen['m']) {
1735 offset = to_addr - S_GET_VALUE(to_symbol);
1736 md_number_to_chars (ptr, 0xe9, 1); /* opcode for long jmp */
1737 md_number_to_chars (ptr + 1, offset, 4);
1738 fix_new (frag, (ptr+1) - frag->fr_literal, 4,
1739 to_symbol, (symbolS *) 0, (long) 0, 0, NO_RELOC);
1740 } else {
1741 offset = to_addr - (from_addr + 5);
1742 md_number_to_chars(ptr, (long) 0xe9, 1);
1743 md_number_to_chars(ptr + 1, offset, 4);
1744 }
1745 }
1746 \f
1747 int
1748 md_parse_option(argP,cntP,vecP)
1749 char **argP;
1750 int *cntP;
1751 char ***vecP;
1752 {
1753 return 1;
1754 }
1755 \f
1756 void /* Knows about order of bytes in address. */
1757 md_number_to_chars (con, value, nbytes)
1758 char con []; /* Return 'nbytes' of chars here. */
1759 long value; /* The value of the bits. */
1760 int nbytes; /* Number of bytes in the output. */
1761 {
1762 register char * p = con;
1763
1764 switch (nbytes) {
1765 case 1:
1766 p[0] = value & 0xff;
1767 break;
1768 case 2:
1769 p[0] = value & 0xff;
1770 p[1] = (value >> 8) & 0xff;
1771 break;
1772 case 4:
1773 p[0] = value & 0xff;
1774 p[1] = (value>>8) & 0xff;
1775 p[2] = (value>>16) & 0xff;
1776 p[3] = (value>>24) & 0xff;
1777 break;
1778 default:
1779 BAD_CASE (nbytes);
1780 }
1781 }
1782
1783
1784 /* Apply a fixup (fixS) to segment data, once it has been determined
1785 by our caller that we have all the info we need to fix it up.
1786
1787 On the 386, immediates, displacements, and data pointers are all in
1788 the same (little-endian) format, so we don't need to care about which
1789 we are handling. */
1790
1791 void
1792 md_apply_fix (fixP, value)
1793 fixS * fixP; /* The fix we're to put in */
1794 long value; /* The value of the bits. */
1795 {
1796 register char * p = fixP->fx_where + fixP->fx_frag->fr_literal;
1797
1798 switch (fixP->fx_size) {
1799 case 1:
1800 *p = value;
1801 break;
1802 case 2:
1803 *p++ = value;
1804 *p = (value>>8);
1805 break;
1806 case 4:
1807 *p++ = value;
1808 *p++ = (value>>8);
1809 *p++ = (value>>16);
1810 *p = (value>>24);
1811 break;
1812 default:
1813 BAD_CASE (fixP->fx_size);
1814 }
1815 }
1816
1817 long /* Knows about the byte order in a word. */
1818 md_chars_to_number (con, nbytes)
1819 unsigned char con[]; /* Low order byte 1st. */
1820 int nbytes; /* Number of bytes in the input. */
1821 {
1822 long retval;
1823 for (retval=0, con+=nbytes-1; nbytes--; con--)
1824 {
1825 retval <<= BITS_PER_CHAR;
1826 retval |= *con;
1827 }
1828 return retval;
1829 }
1830
1831 /* Not needed for coff since relocation structure does not
1832 contain bitfields. */
1833 #if defined(OBJ_AOUT) | defined(OBJ_BOUT)
1834 #ifdef comment
1835 /* Output relocation information in the target's format. */
1836 void
1837 md_ri_to_chars(the_bytes, ri)
1838 char *the_bytes;
1839 struct reloc_info_generic *ri;
1840 {
1841 /* this is easy */
1842 md_number_to_chars(the_bytes, ri->r_address, 4);
1843 /* now the fun stuff */
1844 the_bytes[6] = (ri->r_symbolnum >> 16) & 0x0ff;
1845 the_bytes[5] = (ri->r_symbolnum >> 8) & 0x0ff;
1846 the_bytes[4] = ri->r_symbolnum & 0x0ff;
1847 the_bytes[7] = (((ri->r_extern << 3) & 0x08) | ((ri->r_length << 1) & 0x06) |
1848 ((ri->r_pcrel << 0) & 0x01)) & 0x0F;
1849 }
1850 #endif /* comment */
1851
1852 void tc_aout_fix_to_chars(where, fixP, segment_address_in_file)
1853 char *where;
1854 fixS *fixP;
1855 relax_addressT segment_address_in_file;
1856 {
1857 /*
1858 * In: length of relocation (or of address) in chars: 1, 2 or 4.
1859 * Out: GNU LD relocation length code: 0, 1, or 2.
1860 */
1861
1862 static unsigned char nbytes_r_length [] = { 42, 0, 1, 42, 2 };
1863 long r_index;
1864
1865 know(fixP->fx_addsy != NULL);
1866
1867 r_index = (S_IS_DEFINED(fixP->fx_addsy)
1868 ? S_GET_TYPE(fixP->fx_addsy)
1869 : fixP->fx_addsy->sy_number);
1870
1871 /* this is easy */
1872 md_number_to_chars(where,
1873 fixP->fx_frag->fr_address + fixP->fx_where - segment_address_in_file,
1874 4);
1875
1876 /* now the fun stuff */
1877 where[4] = r_index & 0x0ff;
1878 where[5] = (r_index >> 8) & 0x0ff;
1879 where[6] = (r_index >> 16) & 0x0ff;
1880 where[7] = ((((!S_IS_DEFINED(fixP->fx_addsy)) << 3) & 0x08)
1881 | ((nbytes_r_length[fixP->fx_size] << 1) & 0x06)
1882 | ((fixP->fx_pcrel << 0) & 0x01) & 0x0f);
1883
1884 return;
1885 } /* tc_aout_fix_to_chars() */
1886
1887 #endif /* OBJ_AOUT or OBJ_BOUT */
1888
1889 \f
1890 #define MAX_LITTLENUMS 6
1891
1892 /* Turn the string pointed to by litP into a floating point constant of type
1893 type, and emit the appropriate bytes. The number of LITTLENUMS emitted
1894 is stored in *sizeP . An error message is returned, or NULL on OK.
1895 */
1896 char *
1897 md_atof(type,litP,sizeP)
1898 char type;
1899 char *litP;
1900 int *sizeP;
1901 {
1902 int prec;
1903 LITTLENUM_TYPE words[MAX_LITTLENUMS];
1904 LITTLENUM_TYPE *wordP;
1905 char *t;
1906
1907 switch(type) {
1908 case 'f':
1909 case 'F':
1910 prec = 2;
1911 break;
1912
1913 case 'd':
1914 case 'D':
1915 prec = 4;
1916 break;
1917
1918 case 'x':
1919 case 'X':
1920 prec = 5;
1921 break;
1922
1923 default:
1924 *sizeP=0;
1925 return "Bad call to md_atof ()";
1926 }
1927 t = atof_ieee (input_line_pointer,type,words);
1928 if(t)
1929 input_line_pointer=t;
1930
1931 *sizeP = prec * sizeof(LITTLENUM_TYPE);
1932 /* this loops outputs the LITTLENUMs in REVERSE order; in accord with
1933 the bigendian 386 */
1934 for(wordP = words + prec - 1;prec--;) {
1935 md_number_to_chars (litP, (long) (*wordP--), sizeof(LITTLENUM_TYPE));
1936 litP += sizeof(LITTLENUM_TYPE);
1937 }
1938 return ""; /* Someone should teach Dean about null pointers */
1939 }
1940 \f
1941 char output_invalid_buf[8];
1942
1943 static char * output_invalid (c)
1944 char c;
1945 {
1946 if (isprint(c)) sprintf (output_invalid_buf, "'%c'", c);
1947 else sprintf (output_invalid_buf, "(0x%x)", (unsigned) c);
1948 return output_invalid_buf;
1949 }
1950
1951 static reg_entry *parse_register (reg_string)
1952 char *reg_string; /* reg_string starts *before* REGISTER_PREFIX */
1953 {
1954 register char *s = reg_string;
1955 register char *p;
1956 char reg_name_given[MAX_REG_NAME_SIZE];
1957
1958 s++; /* skip REGISTER_PREFIX */
1959 for (p = reg_name_given; is_register_char (*s); p++, s++) {
1960 *p = register_chars [*s];
1961 if (p >= reg_name_given + MAX_REG_NAME_SIZE)
1962 return (reg_entry *) 0;
1963 }
1964 *p = '\0';
1965 return (reg_entry *) hash_find (reg_hash, reg_name_given);
1966 }
1967
1968
1969 /* We have no need to default values of symbols. */
1970
1971 /* ARGSUSED */
1972 symbolS *
1973 md_undefined_symbol (name)
1974 char *name;
1975 {
1976 return 0;
1977 }
1978
1979 /* Parse an operand that is machine-specific.
1980 We just return without modifying the expression if we have nothing
1981 to do. */
1982
1983 /* ARGSUSED */
1984 void
1985 md_operand (expressionP)
1986 expressionS *expressionP;
1987 {
1988 }
1989
1990 /* Round up a section size to the appropriate boundary. */
1991 long
1992 md_section_align (segment, size)
1993 segT segment;
1994 long size;
1995 {
1996 return size; /* Byte alignment is fine */
1997 }
1998
1999 /* Exactly what point is a PC-relative offset relative TO?
2000 On the i386, they're relative to the address of the offset, plus
2001 its size. (??? Is this right? FIXME-SOON!) */
2002 long
2003 md_pcrel_from (fixP)
2004 fixS *fixP;
2005 {
2006 return fixP->fx_size + fixP->fx_where + fixP->fx_frag->fr_address;
2007 }
2008
2009 /*
2010 * Local Variables:
2011 * comment-column: 0
2012 * End:
2013 */
2014
2015 /* end of tc-i386.c */
GDB Binutils - Deliverables
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