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fighting bitrot in a major way
[deliverable/binutils-gdb.git] / gas / config / tc-i386.c
1 /* i386.c -- Assemble code for the Intel 80386
2 Copyright (C) 1989, 1991, 1992 Free Software Foundation.
3
4 This file is part of GAS, the GNU Assembler.
5
6 GAS is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
9 any later version.
10
11 GAS is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with GAS; see the file COPYING. If not, write to
18 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
19
20 /*
21 Intel 80386 machine specific gas.
22 Written by Eliot Dresselhaus (eliot@mgm.mit.edu).
23 Bugs & suggestions are completely welcome. This is free software.
24 Please help us make it better.
25 */
26
27 #include "as.h"
28
29 #include "obstack.h"
30 #include "opcode/i386.h"
31
32 /* 'md_assemble ()' gathers together information and puts it into a
33 i386_insn. */
34
35 typedef struct {
36 /* TM holds the template for the insn were currently assembling. */
37 template tm;
38 /* SUFFIX holds the opcode suffix (e.g. 'l' for 'movl') if given. */
39 char suffix;
40 /* Operands are coded with OPERANDS, TYPES, DISPS, IMMS, and REGS. */
41
42 /* OPERANDS gives the number of given operands. */
43 unsigned int operands;
44
45 /* REG_OPERANDS, DISP_OPERANDS, MEM_OPERANDS, IMM_OPERANDS give the number of
46 given register, displacement, memory operands and immediate operands. */
47 unsigned int reg_operands, disp_operands, mem_operands, imm_operands;
48
49 /* TYPES [i] is the type (see above #defines) which tells us how to
50 search through DISPS [i] & IMMS [i] & REGS [i] for the required
51 operand. */
52 unsigned int types[MAX_OPERANDS];
53
54 /* Displacements (if given) for each operand. */
55 expressionS *disps[MAX_OPERANDS];
56
57 /* Immediate operands (if given) for each operand. */
58 expressionS *imms[MAX_OPERANDS];
59
60 /* Register operands (if given) for each operand. */
61 reg_entry *regs[MAX_OPERANDS];
62
63 /* BASE_REG, INDEX_REG, and LOG2_SCALE_FACTOR are used to encode
64 the base index byte below. */
65 reg_entry *base_reg;
66 reg_entry *index_reg;
67 unsigned int log2_scale_factor;
68
69 /* SEG gives the seg_entry of this insn. It is equal to zero unless
70 an explicit segment override is given. */
71 const seg_entry *seg; /* segment for memory operands (if given) */
72
73 /* PREFIX holds all the given prefix opcodes (usually null).
74 PREFIXES is the size of PREFIX. */
75 /* richfix: really unsigned? */
76 unsigned char prefix[MAX_PREFIXES];
77 unsigned int prefixes;
78
79 /* RM and IB are the modrm byte and the base index byte where the addressing
80 modes of this insn are encoded. */
81
82 modrm_byte rm;
83 base_index_byte bi;
84 } i386_insn;
85
86 /* This array holds the chars that always start a comment. If the
87 pre-processor is disabled, these aren't very useful */
88 const char comment_chars[] = "#";
89
90 /* This array holds the chars that only start a comment at the beginning of
91 a line. If the line seems to have the form '# 123 filename'
92 .line and .file directives will appear in the pre-processed output */
93 /* Note that input_file.c hand checks for '#' at the beginning of the
94 first line of the input file. This is because the compiler outputs
95 #NO_APP at the beginning of its output. */
96 /* Also note that comments started like this one will always work if
97 '/' isn't otherwise defined. */
98 const char line_comment_chars[] = "/"; /* removed '#' xoxorich. */
99
100 /* Chars that can be used to separate mant from exp in floating point nums */
101 const char EXP_CHARS[] = "eE";
102
103 /* Chars that mean this number is a floating point constant */
104 /* As in 0f12.456 */
105 /* or 0d1.2345e12 */
106 const char FLT_CHARS[] = "fFdDxX";
107
108 /* tables for lexical analysis */
109 static char opcode_chars[256];
110 static char register_chars[256];
111 static char operand_chars[256];
112 static char space_chars[256];
113 static char identifier_chars[256];
114 static char digit_chars[256];
115
116 /* lexical macros */
117 #define is_opcode_char(x) (opcode_chars[(unsigned char) x])
118 #define is_operand_char(x) (operand_chars[(unsigned char) x])
119 #define is_register_char(x) (register_chars[(unsigned char) x])
120 #define is_space_char(x) (space_chars[(unsigned char) x])
121 #define is_identifier_char(x) (identifier_chars[(unsigned char) x])
122 #define is_digit_char(x) (digit_chars[(unsigned char) x])
123
124 /* put here all non-digit non-letter charcters that may occur in an operand */
125 static char operand_special_chars[] = "%$-+(,)*._~/<>|&^!:";
126
127 static char *ordinal_names[] = { "first", "second", "third" }; /* for printfs */
128
129 /* md_assemble() always leaves the strings it's passed unaltered. To
130 effect this we maintain a stack of saved characters that we've smashed
131 with '\0's (indicating end of strings for various sub-fields of the
132 assembler instruction). */
133 static char save_stack[32];
134 static char *save_stack_p; /* stack pointer */
135 #define END_STRING_AND_SAVE(s) *save_stack_p++ = *s; *s = '\0'
136 #define RESTORE_END_STRING(s) *s = *--save_stack_p
137
138 /* The instruction we're assembling. */
139 static i386_insn i;
140
141 /* Per instruction expressionS buffers: 2 displacements & 2 immediate max. */
142 static expressionS disp_expressions[2], im_expressions[2];
143
144 /* pointers to ebp & esp entries in reg_hash hash table */
145 static reg_entry *ebp, *esp;
146
147 static int this_operand; /* current operand we are working on */
148
149 /*
150 Interface to relax_segment.
151 There are 2 relax states for 386 jump insns: one for conditional & one
152 for unconditional jumps. This is because the these two types of jumps
153 add different sizes to frags when we're figuring out what sort of jump
154 to choose to reach a given label. */
155
156 /* types */
157 #define COND_JUMP 1 /* conditional jump */
158 #define UNCOND_JUMP 2 /* unconditional jump */
159 /* sizes */
160 #define BYTE 0
161 #define WORD 1
162 #define DWORD 2
163 #define UNKNOWN_SIZE 3
164
165 #define ENCODE_RELAX_STATE(type,size) ((type<<2) | (size))
166 #define SIZE_FROM_RELAX_STATE(s) \
167 ( (((s) & 0x3) == BYTE ? 1 : (((s) & 0x3) == WORD ? 2 : 4)) )
168
169 const relax_typeS md_relax_table[] = {
170 /*
171 The fields are:
172 1) most positive reach of this state,
173 2) most negative reach of this state,
174 3) how many bytes this mode will add to the size of the current frag
175 4) which index into the table to try if we can't fit into this one.
176 */
177 {1, 1, 0, 0},
178 {1, 1, 0, 0},
179 {1, 1, 0, 0},
180 {1, 1, 0, 0},
181
182 /* For now we don't use word displacement jumps: they may be
183 untrustworthy. */
184 {127+1, -128+1, 0, ENCODE_RELAX_STATE(COND_JUMP,DWORD) },
185 /* word conditionals add 3 bytes to frag:
186 2 opcode prefix; 1 displacement bytes */
187 {32767+2, -32768+2, 3, ENCODE_RELAX_STATE(COND_JUMP,DWORD) },
188 /* dword conditionals adds 4 bytes to frag:
189 1 opcode prefix; 3 displacement bytes */
190 {0, 0, 4, 0},
191 {1, 1, 0, 0},
192
193 {127+1, -128+1, 0, ENCODE_RELAX_STATE(UNCOND_JUMP,DWORD) },
194 /* word jmp adds 2 bytes to frag:
195 1 opcode prefix; 1 displacement bytes */
196 {32767+2, -32768+2, 2, ENCODE_RELAX_STATE(UNCOND_JUMP,DWORD) },
197 /* dword jmp adds 3 bytes to frag:
198 0 opcode prefix; 3 displacement bytes */
199 {0, 0, 3, 0},
200 {1, 1, 0, 0},
201
202 };
203
204 #if __STDC__ == 1
205
206 static char *output_invalid(int c);
207 static int fits_in_signed_byte(long num);
208 static int fits_in_signed_word(long num);
209 static int fits_in_unsigned_byte(long num);
210 static int fits_in_unsigned_word(long num);
211 static int i386_operand(char *operand_string);
212 static int smallest_imm_type(long num);
213 static reg_entry *parse_register(char *reg_string);
214 static unsigned long mode_from_disp_size(unsigned long t);
215 static unsigned long opcode_suffix_to_type(unsigned long s);
216
217 #else /* not __STDC__ */
218
219 static char *output_invalid();
220 static int fits_in_signed_byte();
221 static int fits_in_signed_word();
222 static int fits_in_unsigned_byte();
223 static int fits_in_unsigned_word();
224 static int i386_operand();
225 static int smallest_imm_type();
226 static reg_entry *parse_register();
227 static unsigned long mode_from_disp_size();
228 static unsigned long opcode_suffix_to_type();
229
230 #endif /* not __STDC__ */
231
232
233 /* Ignore certain directives generated by gcc. This probably should
234 not be here. */
235 void dummy ()
236 {
237 while (*input_line_pointer && *input_line_pointer != '\n')
238 input_line_pointer++;
239 }
240
241 const pseudo_typeS md_pseudo_table[] = {
242 { "ffloat", float_cons, 'f' },
243 { "dfloat", float_cons, 'd' },
244 { "tfloat", float_cons, 'x' },
245 { "value", cons, 2 },
246 { 0, 0, 0 }
247 };
248
249 /* for interface with expression () */
250 extern char * input_line_pointer;
251
252 /* obstack for constructing various things in md_begin */
253 struct obstack o;
254
255 /* hash table for opcode lookup */
256 static struct hash_control *op_hash = (struct hash_control *) 0;
257 /* hash table for register lookup */
258 static struct hash_control *reg_hash = (struct hash_control *) 0;
259 /* hash table for prefix lookup */
260 static struct hash_control *prefix_hash = (struct hash_control *) 0;
261
262 \f
263 void md_begin ()
264 {
265 char * hash_err;
266
267 obstack_begin (&o,4096);
268
269 /* initialize op_hash hash table */
270 op_hash = hash_new(); /* xmalloc handles error */
271
272 {
273 register const template *optab;
274 register templates *core_optab;
275 char *prev_name;
276
277 optab = i386_optab; /* setup for loop */
278 prev_name = optab->name;
279 obstack_grow (&o, optab, sizeof(template));
280 core_optab = (templates *) xmalloc (sizeof (templates));
281
282 for (optab++; optab < i386_optab_end; optab++) {
283 if (! strcmp (optab->name, prev_name)) {
284 /* same name as before --> append to current template list */
285 obstack_grow (&o, optab, sizeof(template));
286 } else {
287 /* different name --> ship out current template list;
288 add to hash table; & begin anew */
289 /* Note: end must be set before start! since obstack_next_free changes
290 upon opstack_finish */
291 core_optab->end = (template *) obstack_next_free(&o);
292 core_optab->start = (template *) obstack_finish(&o);
293 hash_err = hash_insert (op_hash, prev_name, (char *) core_optab);
294 if (hash_err && *hash_err) {
295 hash_error:
296 as_fatal("Internal Error: Can't hash %s: %s", prev_name, hash_err);
297 }
298 prev_name = optab->name;
299 core_optab = (templates *) xmalloc (sizeof(templates));
300 obstack_grow (&o, optab, sizeof(template));
301 }
302 }
303 }
304
305 /* initialize reg_hash hash table */
306 reg_hash = hash_new();
307 {
308 register const reg_entry *regtab;
309
310 for (regtab = i386_regtab; regtab < i386_regtab_end; regtab++) {
311 hash_err = hash_insert (reg_hash, regtab->reg_name, regtab);
312 if (hash_err && *hash_err) goto hash_error;
313 }
314 }
315
316 esp = (reg_entry *) hash_find (reg_hash, "esp");
317 ebp = (reg_entry *) hash_find (reg_hash, "ebp");
318
319 /* initialize reg_hash hash table */
320 prefix_hash = hash_new();
321 {
322 register const prefix_entry *prefixtab;
323
324 for (prefixtab = i386_prefixtab;
325 prefixtab < i386_prefixtab_end; prefixtab++) {
326 hash_err = hash_insert (prefix_hash, prefixtab->prefix_name, prefixtab);
327 if (hash_err && *hash_err) goto hash_error;
328 }
329 }
330
331 /* fill in lexical tables: opcode_chars, operand_chars, space_chars */
332 {
333 register unsigned int c;
334
335 memset(opcode_chars, '\0', sizeof(opcode_chars));
336 memset(operand_chars, '\0', sizeof(operand_chars));
337 memset(space_chars, '\0', sizeof(space_chars));
338 memset(identifier_chars, '\0', sizeof(identifier_chars));
339 memset(digit_chars, '\0', sizeof(digit_chars));
340
341 for (c = 0; c < 256; c++) {
342 if (islower(c) || isdigit(c)) {
343 opcode_chars[c] = c;
344 register_chars[c] = c;
345 } else if (isupper(c)) {
346 opcode_chars[c] = tolower(c);
347 register_chars[c] = opcode_chars[c];
348 } else if (c == PREFIX_SEPERATOR) {
349 opcode_chars[c] = c;
350 } else if (c == ')' || c == '(') {
351 register_chars[c] = c;
352 }
353
354 if (isupper(c) || islower(c) || isdigit(c))
355 operand_chars[c] = c;
356 else if (c && strchr(operand_special_chars, c))
357 operand_chars[c] = c;
358
359 if (isdigit(c) || c == '-') digit_chars[c] = c;
360
361 if (isalpha(c) || c == '_' || c == '.' || isdigit(c))
362 identifier_chars[c] = c;
363
364 if (c == ' ' || c == '\t') space_chars[c] = c;
365 }
366 }
367 }
368
369 void md_end() {} /* not much to do here. */
370
371 \f
372 #ifdef DEBUG386
373
374 /* debugging routines for md_assemble */
375 /* static void pi (), pte (), pt (), pe (), ps (); */
376
377 static void pi (line, x)
378 char * line;
379 i386_insn *x;
380 {
381 register template *p;
382 int i;
383
384 fprintf (stdout, "%s: template ", line);
385 pte (&x->tm);
386 fprintf (stdout, " modrm: mode %x reg %x reg/mem %x",
387 x->rm.mode, x->rm.reg, x->rm.regmem);
388 fprintf (stdout, " base %x index %x scale %x\n",
389 x->bi.base, x->bi.index, x->bi.scale);
390 for (i = 0; i < x->operands; i++) {
391 fprintf (stdout, " #%d: ", i+1);
392 pt (x->types[i]);
393 fprintf (stdout, "\n");
394 if (x->types[i] & Reg) fprintf (stdout, "%s\n", x->regs[i]->reg_name);
395 if (x->types[i] & Imm) pe (x->imms[i]);
396 if (x->types[i] & (Disp|Abs)) pe (x->disps[i]);
397 }
398 }
399
400 static void pte (t)
401 template *t;
402 {
403 int i;
404 fprintf (stdout, " %d operands ", t->operands);
405 fprintf (stdout, "opcode %x ",
406 t->base_opcode);
407 if (t->extension_opcode != None)
408 fprintf (stdout, "ext %x ", t->extension_opcode);
409 if (t->opcode_modifier&D)
410 fprintf (stdout, "D");
411 if (t->opcode_modifier&W)
412 fprintf (stdout, "W");
413 fprintf (stdout, "\n");
414 for (i = 0; i < t->operands; i++) {
415 fprintf (stdout, " #%d type ", i+1);
416 pt (t->operand_types[i]);
417 fprintf (stdout, "\n");
418 }
419 }
420
421 static void pe (e)
422 expressionS *e;
423 {
424 fprintf (stdout, " segment %s\n", segment_name (e->X_seg));
425 fprintf (stdout, " add_number %d (%x)\n",
426 e->X_add_number, e->X_add_number);
427 if (e->X_add_symbol) {
428 fprintf (stdout, " add_symbol ");
429 ps (e->X_add_symbol);
430 fprintf (stdout, "\n");
431 }
432 if (e->X_subtract_symbol) {
433 fprintf (stdout, " sub_symbol ");
434 ps (e->X_subtract_symbol);
435 fprintf (stdout, "\n");
436 }
437 }
438
439 static void ps (s)
440 symbolS *s;
441 {
442 fprintf (stdout, "%s type %s%s",
443 S_GET_NAME(s),
444 S_IS_EXTERNAL(s) ? "EXTERNAL " : "",
445 segment_name(S_GET_SEGMENT(s)));
446 }
447
448 struct type_name {
449 unsigned int mask;
450 char *tname;
451 } type_names[] = {
452 { Reg8, "r8" }, { Reg16, "r16" }, { Reg32, "r32" }, { Imm8, "i8" },
453 { Imm8S, "i8s" },
454 { Imm16, "i16" }, { Imm32, "i32" }, { Mem8, "Mem8"}, { Mem16, "Mem16"},
455 { Mem32, "Mem32"}, { BaseIndex, "BaseIndex" },
456 { Abs8, "Abs8" }, { Abs16, "Abs16" }, { Abs32, "Abs32" },
457 { Disp8, "d8" }, { Disp16, "d16" },
458 { Disp32, "d32" }, { SReg2, "SReg2" }, { SReg3, "SReg3" }, { Acc, "Acc" },
459 { InOutPortReg, "InOutPortReg" }, { ShiftCount, "ShiftCount" },
460 { Imm1, "i1" }, { Control, "control reg" }, {Test, "test reg"},
461 { FloatReg, "FReg"}, {FloatAcc, "FAcc"},
462 { JumpAbsolute, "Jump Absolute"},
463 { 0, "" }
464 };
465
466 static void pt (t)
467 unsigned int t;
468 {
469 register struct type_name *ty;
470
471 if (t == Unknown) {
472 fprintf (stdout, "Unknown");
473 } else {
474 for (ty = type_names; ty->mask; ty++)
475 if (t & ty->mask) fprintf (stdout, "%s, ", ty->tname);
476 }
477 fflush (stdout);
478 }
479
480 #endif /* DEBUG386 */
481 \f
482 /*
483 This is the guts of the machine-dependent assembler. LINE points to a
484 machine dependent instruction. This funciton is supposed to emit
485 the frags/bytes it assembles to.
486 */
487 void md_assemble (line)
488 char *line;
489 {
490 /* Holds temlate once we've found it. */
491 register template *t;
492
493 /* Possible templates for current insn */
494 templates *current_templates = (templates *) 0;
495
496 /* Initialize globals. */
497 memset(&i, '\0', sizeof(i));
498 memset(disp_expressions, '\0', sizeof(disp_expressions));
499 memset(im_expressions, '\0', sizeof(im_expressions));
500 save_stack_p = save_stack; /* reset stack pointer */
501
502 /* Fist parse an opcode & call i386_operand for the operands.
503 We assume that the scrubber has arranged it so that line[0] is the valid
504 start of a (possibly prefixed) opcode. */
505 {
506 register char *l = line; /* Fast place to put LINE. */
507
508 /* 1 if operand is pending after ','. */
509 unsigned int expecting_operand = 0;
510 /* 1 if we found a prefix only acceptable with string insns. */
511 unsigned int expecting_string_instruction = 0;
512 /* Non-zero if operand parens not balenced. */
513 unsigned int paren_not_balenced;
514 char * token_start = l;
515
516 while (! is_space_char(*l) && *l != END_OF_INSN) {
517 if (! is_opcode_char(*l)) {
518 as_bad("invalid character %s in opcode", output_invalid(*l));
519 return;
520 } else if (*l != PREFIX_SEPERATOR) {
521 *l = opcode_chars[(unsigned char) *l]; /* fold case of opcodes */
522 l++;
523 } else { /* this opcode's got a prefix */
524 register unsigned int q;
525 register prefix_entry * prefix;
526
527 if (l == token_start) {
528 as_bad("expecting prefix; got nothing");
529 return;
530 }
531 END_STRING_AND_SAVE (l);
532 prefix = (prefix_entry *) hash_find (prefix_hash, token_start);
533 if (! prefix) {
534 as_bad("no such opcode prefix ('%s')", token_start);
535 return;
536 }
537 RESTORE_END_STRING (l);
538 /* check for repeated prefix */
539 for (q = 0; q < i.prefixes; q++)
540 if (i.prefix[q] == prefix->prefix_code) {
541 as_bad("same prefix used twice; you don't really want this!");
542 return;
543 }
544 if (i.prefixes == MAX_PREFIXES) {
545 as_bad("too many opcode prefixes");
546 return;
547 }
548 i.prefix[i.prefixes++] = prefix->prefix_code;
549 if (prefix->prefix_code == REPE || prefix->prefix_code == REPNE)
550 expecting_string_instruction = 1;
551 /* skip past PREFIX_SEPERATOR and reset token_start */
552 token_start = ++l;
553 }
554 }
555 END_STRING_AND_SAVE (l);
556 if (token_start == l) {
557 as_bad("expecting opcode; got nothing");
558 return;
559 }
560
561 /* Lookup insn in hash; try intel & att naming conventions if appropriate;
562 that is: we only use the opcode suffix 'b' 'w' or 'l' if we need to. */
563 current_templates = (templates *) hash_find (op_hash, token_start);
564 if (! current_templates) {
565 int last_index = strlen(token_start) - 1;
566 char last_char = token_start[last_index];
567 switch (last_char) {
568 case DWORD_OPCODE_SUFFIX:
569 case WORD_OPCODE_SUFFIX:
570 case BYTE_OPCODE_SUFFIX:
571 token_start[last_index] = '\0';
572 current_templates = (templates *) hash_find (op_hash, token_start);
573 token_start[last_index] = last_char;
574 i.suffix = last_char;
575 }
576 if (!current_templates) {
577 as_bad("no such 386 instruction: `%s'", token_start); return;
578 }
579 }
580 RESTORE_END_STRING (l);
581
582 /* check for rep/repne without a string instruction */
583 if (expecting_string_instruction &&
584 ! IS_STRING_INSTRUCTION (current_templates->
585 start->base_opcode)) {
586 as_bad("expecting string instruction after rep/repne");
587 return;
588 }
589
590 /* There may be operands to parse. */
591 if (*l != END_OF_INSN &&
592 /* For string instructions, we ignore any operands if given. This
593 kludges, for example, 'rep/movsb %ds:(%esi), %es:(%edi)' where
594 the operands are always going to be the same, and are not really
595 encoded in machine code. */
596 ! IS_STRING_INSTRUCTION (current_templates->
597 start->base_opcode)) {
598 /* parse operands */
599 do {
600 /* skip optional white space before operand */
601 while (! is_operand_char(*l) && *l != END_OF_INSN) {
602 if (! is_space_char(*l)) {
603 as_bad("invalid character %s before %s operand",
604 output_invalid(*l),
605 ordinal_names[i.operands]);
606 return;
607 }
608 l++;
609 }
610 token_start = l; /* after white space */
611 paren_not_balenced = 0;
612 while (paren_not_balenced || *l != ',') {
613 if (*l == END_OF_INSN) {
614 if (paren_not_balenced) {
615 as_bad("unbalenced parenthesis in %s operand.",
616 ordinal_names[i.operands]);
617 return;
618 } else break; /* we are done */
619 } else if (! is_operand_char(*l)) {
620 as_bad("invalid character %s in %s operand",
621 output_invalid(*l),
622 ordinal_names[i.operands]);
623 return;
624 }
625 if (*l == '(') ++paren_not_balenced;
626 if (*l == ')') --paren_not_balenced;
627 l++;
628 }
629 if (l != token_start) { /* yes, we've read in another operand */
630 unsigned int operand_ok;
631 this_operand = i.operands++;
632 if (i.operands > MAX_OPERANDS) {
633 as_bad("spurious operands; (%d operands/instruction max)",
634 MAX_OPERANDS);
635 return;
636 }
637 /* now parse operand adding info to 'i' as we go along */
638 END_STRING_AND_SAVE (l);
639 operand_ok = i386_operand (token_start);
640 RESTORE_END_STRING (l); /* restore old contents */
641 if (!operand_ok) return;
642 } else {
643 if (expecting_operand) {
644 expecting_operand_after_comma:
645 as_bad("expecting operand after ','; got nothing");
646 return;
647 }
648 if (*l == ',') {
649 as_bad("expecting operand before ','; got nothing");
650 return;
651 }
652 }
653
654 /* now *l must be either ',' or END_OF_INSN */
655 if (*l == ',') {
656 if (*++l == END_OF_INSN) { /* just skip it, if it's \n complain */
657 goto expecting_operand_after_comma;
658 }
659 expecting_operand = 1;
660 }
661 } while (*l != END_OF_INSN); /* until we get end of insn */
662 }
663 }
664
665 /* Now we've parsed the opcode into a set of templates, and have the
666 operands at hand.
667 Next, we find a template that matches the given insn,
668 making sure the overlap of the given operands types is consistent
669 with the template operand types. */
670
671 #define MATCH(overlap,given_type) \
672 (overlap && \
673 (overlap & (JumpAbsolute|BaseIndex|Mem8)) \
674 == (given_type & (JumpAbsolute|BaseIndex|Mem8)))
675
676 /* If m0 and m1 are register matches they must be consistent
677 with the expected operand types t0 and t1.
678 That is, if both m0 & m1 are register matches
679 i.e. ( ((m0 & (Reg)) && (m1 & (Reg)) ) ?
680 then, either 1. or 2. must be true:
681 1. the expected operand type register overlap is null:
682 (t0 & t1 & Reg) == 0
683 AND
684 the given register overlap is null:
685 (m0 & m1 & Reg) == 0
686 2. the expected operand type register overlap == the given
687 operand type overlap: (t0 & t1 & m0 & m1 & Reg).
688 */
689 #define CONSISTENT_REGISTER_MATCH(m0, m1, t0, t1) \
690 ( ((m0 & (Reg)) && (m1 & (Reg))) ? \
691 ( ((t0 & t1 & (Reg)) == 0 && (m0 & m1 & (Reg)) == 0) || \
692 ((t0 & t1) & (m0 & m1) & (Reg)) \
693 ) : 1)
694 {
695 register unsigned int overlap0, overlap1;
696 expressionS * exp;
697 unsigned int overlap2;
698 unsigned int found_reverse_match;
699
700 overlap0 = overlap1 = overlap2 = found_reverse_match = 0;
701 for (t = current_templates->start;
702 t < current_templates->end;
703 t++) {
704
705 /* must have right number of operands */
706 if (i.operands != t->operands) continue;
707 else if (!t->operands) break; /* 0 operands always matches */
708
709 overlap0 = i.types[0] & t->operand_types[0];
710 switch (t->operands) {
711 case 1:
712 if (! MATCH (overlap0,i.types[0])) continue;
713 break;
714 case 2: case 3:
715 overlap1 = i.types[1] & t->operand_types[1];
716 if (! MATCH (overlap0,i.types[0]) ||
717 ! MATCH (overlap1,i.types[1]) ||
718 ! CONSISTENT_REGISTER_MATCH(overlap0, overlap1,
719 t->operand_types[0],
720 t->operand_types[1])) {
721
722 /* check if other direction is valid ... */
723 if (! (t->opcode_modifier & COMES_IN_BOTH_DIRECTIONS))
724 continue;
725
726 /* try reversing direction of operands */
727 overlap0 = i.types[0] & t->operand_types[1];
728 overlap1 = i.types[1] & t->operand_types[0];
729 if (! MATCH (overlap0,i.types[0]) ||
730 ! MATCH (overlap1,i.types[1]) ||
731 ! CONSISTENT_REGISTER_MATCH (overlap0, overlap1,
732 t->operand_types[0],
733 t->operand_types[1])) {
734 /* does not match either direction */
735 continue;
736 }
737 /* found a reverse match here -- slip through */
738 /* found_reverse_match holds which of D or FloatD we've found */
739 found_reverse_match = t->opcode_modifier & COMES_IN_BOTH_DIRECTIONS;
740 } /* endif: not forward match */
741 /* found either forward/reverse 2 operand match here */
742 if (t->operands == 3) {
743 overlap2 = i.types[2] & t->operand_types[2];
744 if (! MATCH (overlap2,i.types[2]) ||
745 ! CONSISTENT_REGISTER_MATCH (overlap0, overlap2,
746 t->operand_types[0],
747 t->operand_types[2]) ||
748 ! CONSISTENT_REGISTER_MATCH (overlap1, overlap2,
749 t->operand_types[1],
750 t->operand_types[2]))
751 continue;
752 }
753 /* found either forward/reverse 2 or 3 operand match here:
754 slip through to break */
755 }
756 break; /* we've found a match; break out of loop */
757 } /* for (t = ... */
758 if (t == current_templates->end) { /* we found no match */
759 as_bad("operands given don't match any known 386 instruction");
760 return;
761 }
762
763 /* Copy the template we found (we may change it!). */
764 memcpy(&i.tm, t, sizeof(template));
765 t = &i.tm; /* alter new copy of template */
766
767 /* If there's no opcode suffix we try to invent one based on register
768 operands. */
769 if (! i.suffix && i.reg_operands) {
770 /* We take i.suffix from the LAST register operand specified. This
771 assumes that the last register operands is the destination register
772 operand. */
773 int o;
774 for (o = 0; o < MAX_OPERANDS; o++)
775 if (i.types[o] & Reg) {
776 i.suffix = (i.types[o] == Reg8) ? BYTE_OPCODE_SUFFIX :
777 (i.types[o] == Reg16) ? WORD_OPCODE_SUFFIX :
778 DWORD_OPCODE_SUFFIX;
779 }
780 }
781
782 /* Make still unresolved immediate matches conform to size of immediate
783 given in i.suffix. Note: overlap2 cannot be an immediate!
784 We assume this. */
785 if ((overlap0 & (Imm8|Imm8S|Imm16|Imm32))
786 && overlap0 != Imm8 && overlap0 != Imm8S
787 && overlap0 != Imm16 && overlap0 != Imm32) {
788 if (! i.suffix) {
789 as_bad("no opcode suffix given; can't determine immediate size");
790 return;
791 }
792 overlap0 &= (i.suffix == BYTE_OPCODE_SUFFIX ? (Imm8|Imm8S) :
793 (i.suffix == WORD_OPCODE_SUFFIX ? Imm16 : Imm32));
794 }
795 if ((overlap1 & (Imm8|Imm8S|Imm16|Imm32))
796 && overlap1 != Imm8 && overlap1 != Imm8S
797 && overlap1 != Imm16 && overlap1 != Imm32) {
798 if (! i.suffix) {
799 as_bad("no opcode suffix given; can't determine immediate size");
800 return;
801 }
802 overlap1 &= (i.suffix == BYTE_OPCODE_SUFFIX ? (Imm8|Imm8S) :
803 (i.suffix == WORD_OPCODE_SUFFIX ? Imm16 : Imm32));
804 }
805
806 i.types[0] = overlap0;
807 i.types[1] = overlap1;
808 i.types[2] = overlap2;
809
810 if (overlap0 & ImplicitRegister) i.reg_operands--;
811 if (overlap1 & ImplicitRegister) i.reg_operands--;
812 if (overlap2 & ImplicitRegister) i.reg_operands--;
813 if (overlap0 & Imm1) i.imm_operands = 0; /* kludge for shift insns */
814
815 if (found_reverse_match) {
816 unsigned int save;
817 save = t->operand_types[0];
818 t->operand_types[0] = t->operand_types[1];
819 t->operand_types[1] = save;
820 }
821
822 /* Finalize opcode. First, we change the opcode based on the operand
823 size given by i.suffix: we never have to change things for byte insns,
824 or when no opcode suffix is need to size the operands. */
825
826 if (! i.suffix && (t->opcode_modifier & W)) {
827 as_bad("no opcode suffix given and no register operands; can't size instruction");
828 return;
829 }
830
831 if (i.suffix && i.suffix != BYTE_OPCODE_SUFFIX) {
832 /* Select between byte and word/dword operations. */
833 if (t->opcode_modifier & W)
834 t->base_opcode |= W;
835 /* Now select between word & dword operations via the
836 operand size prefix. */
837 if (i.suffix == WORD_OPCODE_SUFFIX) {
838 if (i.prefixes == MAX_PREFIXES) {
839 as_bad("%d prefixes given and 'w' opcode suffix gives too many prefixes",
840 MAX_PREFIXES);
841 return;
842 }
843 i.prefix[i.prefixes++] = WORD_PREFIX_OPCODE;
844 }
845 }
846
847 /* For insns with operands there are more diddles to do to the opcode. */
848 if (i.operands) {
849 /* If we found a reverse match we must alter the opcode direction bit
850 found_reverse_match holds bit to set (different for int &
851 float insns). */
852
853 if (found_reverse_match) {
854 t->base_opcode |= found_reverse_match;
855 }
856
857 /*
858 The imul $imm, %reg instruction is converted into
859 imul $imm, %reg, %reg. */
860 if (t->opcode_modifier & imulKludge) {
861 i.regs[2] = i.regs[1]; /* Pretend we saw the 3 operand case. */
862 i.reg_operands = 2;
863 }
864
865 /* Certain instructions expect the destination to be in the i.rm.reg
866 field. This is by far the exceptional case. For these instructions,
867 if the source operand is a register, we must reverse the i.rm.reg
868 and i.rm.regmem fields. We accomplish this by faking that the
869 two register operands were given in the reverse order. */
870 if ((t->opcode_modifier & ReverseRegRegmem) && i.reg_operands == 2) {
871 unsigned int first_reg_operand = (i.types[0] & Reg) ? 0 : 1;
872 unsigned int second_reg_operand = first_reg_operand + 1;
873 reg_entry *tmp = i.regs[first_reg_operand];
874 i.regs[first_reg_operand] = i.regs[second_reg_operand];
875 i.regs[second_reg_operand] = tmp;
876 }
877
878 if (t->opcode_modifier & ShortForm) {
879 /* The register or float register operand is in operand 0 or 1. */
880 unsigned int o = (i.types[0] & (Reg|FloatReg)) ? 0 : 1;
881 /* Register goes in low 3 bits of opcode. */
882 t->base_opcode |= i.regs[o]->reg_num;
883 } else if (t->opcode_modifier & ShortFormW) {
884 /* Short form with 0x8 width bit. Register is always dest. operand */
885 t->base_opcode |= i.regs[1]->reg_num;
886 if (i.suffix == WORD_OPCODE_SUFFIX ||
887 i.suffix == DWORD_OPCODE_SUFFIX)
888 t->base_opcode |= 0x8;
889 } else if (t->opcode_modifier & Seg2ShortForm) {
890 if (t->base_opcode == POP_SEG_SHORT && i.regs[0]->reg_num == 1) {
891 as_bad("you can't 'pop cs' on the 386.");
892 return;
893 }
894 t->base_opcode |= (i.regs[0]->reg_num << 3);
895 } else if (t->opcode_modifier & Seg3ShortForm) {
896 /* 'push %fs' is 0x0fa0; 'pop %fs' is 0x0fa1.
897 'push %gs' is 0x0fa8; 'pop %fs' is 0x0fa9.
898 So, only if i.regs[0]->reg_num == 5 (%gs) do we need
899 to change the opcode. */
900 if (i.regs[0]->reg_num == 5)
901 t->base_opcode |= 0x08;
902 } else if (t->opcode_modifier & Modrm) {
903 /* The opcode is completed (modulo t->extension_opcode which must
904 be put into the modrm byte.
905 Now, we make the modrm & index base bytes based on all the info
906 we've collected. */
907
908 /* i.reg_operands MUST be the number of real register operands;
909 implicit registers do not count. */
910 if (i.reg_operands == 2) {
911 unsigned int source, dest;
912 source = (i.types[0] & (Reg|SReg2|SReg3|Control|Debug|Test)) ? 0 : 1;
913 dest = source + 1;
914 i.rm.mode = 3;
915 /* We must be careful to make sure that all segment/control/test/
916 debug registers go into the i.rm.reg field (despite the whether
917 they are source or destination operands). */
918 if (i.regs[dest]->reg_type & (SReg2|SReg3|Control|Debug|Test)) {
919 i.rm.reg = i.regs[dest]->reg_num;
920 i.rm.regmem = i.regs[source]->reg_num;
921 } else {
922 i.rm.reg = i.regs[source]->reg_num;
923 i.rm.regmem = i.regs[dest]->reg_num;
924 }
925 } else { /* if it's not 2 reg operands... */
926 if (i.mem_operands) {
927 unsigned int fake_zero_displacement = 0;
928 unsigned int o = (i.types[0] & Mem) ? 0 : ((i.types[1] & Mem) ? 1 : 2);
929
930 /* Encode memory operand into modrm byte and base index byte. */
931
932 if (i.base_reg == esp && ! i.index_reg) {
933 /* <disp>(%esp) becomes two byte modrm with no index register. */
934 i.rm.regmem = ESCAPE_TO_TWO_BYTE_ADDRESSING;
935 i.rm.mode = mode_from_disp_size(i.types[o]);
936 i.bi.base = ESP_REG_NUM;
937 i.bi.index = NO_INDEX_REGISTER;
938 i.bi.scale = 0; /* Must be zero! */
939 } else if (i.base_reg == ebp && !i.index_reg) {
940 if (! (i.types[o] & Disp)) {
941 /* Must fake a zero byte displacement.
942 There is no direct way to code '(%ebp)' directly. */
943 fake_zero_displacement = 1;
944 /* fake_zero_displacement code does not set this. */
945 i.types[o] |= Disp8;
946 }
947 i.rm.mode = mode_from_disp_size(i.types[o]);
948 i.rm.regmem = EBP_REG_NUM;
949 } else if (! i.base_reg && (i.types[o] & BaseIndex)) {
950 /* There are three cases here.
951 Case 1: '<32bit disp>(,1)' -- indirect absolute.
952 (Same as cases 2 & 3 with NO index register)
953 Case 2: <32bit disp> (,<index>) -- no base register with disp
954 Case 3: (, <index>) --- no base register;
955 no disp (must add 32bit 0 disp). */
956 i.rm.regmem = ESCAPE_TO_TWO_BYTE_ADDRESSING;
957 i.rm.mode = 0; /* 32bit mode */
958 i.bi.base = NO_BASE_REGISTER;
959 i.types[o] &= ~Disp;
960 i.types[o] |= Disp32; /* Must be 32bit! */
961 if (i.index_reg) { /* case 2 or case 3 */
962 i.bi.index = i.index_reg->reg_num;
963 i.bi.scale = i.log2_scale_factor;
964 if (i.disp_operands == 0)
965 fake_zero_displacement = 1; /* case 3 */
966 } else {
967 i.bi.index = NO_INDEX_REGISTER;
968 i.bi.scale = 0;
969 }
970 } else if (i.disp_operands && !i.base_reg && !i.index_reg) {
971 /* Operand is just <32bit disp> */
972 i.rm.regmem = EBP_REG_NUM;
973 i.rm.mode = 0;
974 i.types[o] &= ~Disp;
975 i.types[o] |= Disp32;
976 } else {
977 /* It's not a special case; rev'em up. */
978 i.rm.regmem = i.base_reg->reg_num;
979 i.rm.mode = mode_from_disp_size(i.types[o]);
980 if (i.index_reg) {
981 i.rm.regmem = ESCAPE_TO_TWO_BYTE_ADDRESSING;
982 i.bi.base = i.base_reg->reg_num;
983 i.bi.index = i.index_reg->reg_num;
984 i.bi.scale = i.log2_scale_factor;
985 if (i.base_reg == ebp && i.disp_operands == 0) { /* pace */
986 fake_zero_displacement = 1;
987 i.types[o] |= Disp8;
988 i.rm.mode = mode_from_disp_size(i.types[o]);
989 }
990 }
991 }
992 if (fake_zero_displacement) {
993 /* Fakes a zero displacement assuming that i.types[o] holds
994 the correct displacement size. */
995 exp = &disp_expressions[i.disp_operands++];
996 i.disps[o] = exp;
997 exp->X_seg = SEG_ABSOLUTE;
998 exp->X_add_number = 0;
999 exp->X_add_symbol = (symbolS *) 0;
1000 exp->X_subtract_symbol = (symbolS *) 0;
1001 }
1002
1003 /* Select the correct segment for the memory operand. */
1004 if (i.seg) {
1005 unsigned int seg_index;
1006 const seg_entry *default_seg;
1007
1008 if (i.rm.regmem == ESCAPE_TO_TWO_BYTE_ADDRESSING) {
1009 seg_index = (i.rm.mode<<3) | i.bi.base;
1010 default_seg = two_byte_segment_defaults[seg_index];
1011 } else {
1012 seg_index = (i.rm.mode<<3) | i.rm.regmem;
1013 default_seg = one_byte_segment_defaults[seg_index];
1014 }
1015 /* If the specified segment is not the default, use an
1016 opcode prefix to select it */
1017 if (i.seg != default_seg) {
1018 if (i.prefixes == MAX_PREFIXES) {
1019 as_bad("%d prefixes given and %s segment override gives too many prefixes",
1020 MAX_PREFIXES, i.seg->seg_name);
1021 return;
1022 }
1023 i.prefix[i.prefixes++] = i.seg->seg_prefix;
1024 }
1025 }
1026 }
1027
1028 /* Fill in i.rm.reg or i.rm.regmem field with register operand
1029 (if any) based on t->extension_opcode. Again, we must be careful
1030 to make sure that segment/control/debug/test registers are coded
1031 into the i.rm.reg field. */
1032 if (i.reg_operands) {
1033 unsigned int o =
1034 (i.types[0] & (Reg|SReg2|SReg3|Control|Debug|Test)) ? 0 :
1035 (i.types[1] & (Reg|SReg2|SReg3|Control|Debug|Test)) ? 1 : 2;
1036 /* If there is an extension opcode to put here, the register number
1037 must be put into the regmem field. */
1038 if (t->extension_opcode != None)
1039 i.rm.regmem = i.regs[o]->reg_num;
1040 else i.rm.reg = i.regs[o]->reg_num;
1041
1042 /* Now, if no memory operand has set i.rm.mode = 0, 1, 2
1043 we must set it to 3 to indicate this is a register operand
1044 int the regmem field */
1045 if (! i.mem_operands) i.rm.mode = 3;
1046 }
1047
1048 /* Fill in i.rm.reg field with extension opcode (if any). */
1049 if (t->extension_opcode != None)
1050 i.rm.reg = t->extension_opcode;
1051 }
1052 }
1053 }
1054 }
1055
1056 /* Handle conversion of 'int $3' --> special int3 insn. */
1057 if (t->base_opcode == INT_OPCODE && i.imms[0]->X_add_number == 3) {
1058 t->base_opcode = INT3_OPCODE;
1059 i.imm_operands = 0;
1060 }
1061
1062 /* We are ready to output the insn. */
1063 {
1064 register char * p;
1065
1066 /* Output jumps. */
1067 if (t->opcode_modifier & Jump) {
1068 int n = i.disps[0]->X_add_number;
1069
1070 switch (i.disps[0]->X_seg) {
1071 case SEG_ABSOLUTE:
1072 if (fits_in_signed_byte(n)) {
1073 p = frag_more (2);
1074 p[0] = t->base_opcode;
1075 p[1] = n;
1076 #if 0 /* leave out 16 bit jumps - pace */
1077 } else if (fits_in_signed_word(n)) {
1078 p = frag_more (4);
1079 p[0] = WORD_PREFIX_OPCODE;
1080 p[1] = t->base_opcode;
1081 md_number_to_chars (&p[2], n, 2);
1082 #endif
1083 } else { /* It's an absolute dword displacement. */
1084 if (t->base_opcode == JUMP_PC_RELATIVE) { /* pace */
1085 /* unconditional jump */
1086 p = frag_more (5);
1087 p[0] = 0xe9;
1088 md_number_to_chars (&p[1], n, 4);
1089 } else {
1090 /* conditional jump */
1091 p = frag_more (6);
1092 p[0] = TWO_BYTE_OPCODE_ESCAPE;
1093 p[1] = t->base_opcode + 0x10;
1094 md_number_to_chars (&p[2], n, 4);
1095 }
1096 }
1097 break;
1098 default:
1099 /* It's a symbol; end frag & setup for relax.
1100 Make sure there are 6 chars left in the current frag; if not
1101 we'll have to start a new one. */
1102 /* I caught it failing with obstack_room == 6,
1103 so I changed to <= pace */
1104 if (obstack_room (&frags) <= 6) {
1105 frag_wane(frag_now);
1106 frag_new (0);
1107 }
1108 p = frag_more (1);
1109 p[0] = t->base_opcode;
1110 frag_var (rs_machine_dependent,
1111 6, /* 2 opcode/prefix + 4 displacement */
1112 1,
1113 ((unsigned char) *p == JUMP_PC_RELATIVE
1114 ? ENCODE_RELAX_STATE (UNCOND_JUMP, BYTE)
1115 : ENCODE_RELAX_STATE (COND_JUMP, BYTE)),
1116 i.disps[0]->X_add_symbol,
1117 n, p);
1118 break;
1119 }
1120 } else if (t->opcode_modifier & (JumpByte|JumpDword)) {
1121 int size = (t->opcode_modifier & JumpByte) ? 1 : 4;
1122 int n = i.disps[0]->X_add_number;
1123
1124 if (fits_in_unsigned_byte(t->base_opcode)) {
1125 FRAG_APPEND_1_CHAR (t->base_opcode);
1126 } else {
1127 p = frag_more (2); /* opcode can be at most two bytes */
1128 /* put out high byte first: can't use md_number_to_chars! */
1129 *p++ = (t->base_opcode >> 8) & 0xff;
1130 *p = t->base_opcode & 0xff;
1131 }
1132
1133 p = frag_more (size);
1134 switch (i.disps[0]->X_seg) {
1135 case SEG_ABSOLUTE:
1136 md_number_to_chars (p, n, size);
1137 if (size == 1 && ! fits_in_signed_byte(n)) {
1138 as_bad("loop/jecx only takes byte displacement; %d shortened to %d",
1139 n, *p);
1140 }
1141 break;
1142 default:
1143 fix_new (frag_now, p - frag_now->fr_literal, size,
1144 i.disps[0]->X_add_symbol, i.disps[0]->X_subtract_symbol,
1145 i.disps[0]->X_add_number, 1, NO_RELOC);
1146 break;
1147 }
1148 } else if (t->opcode_modifier & JumpInterSegment) {
1149 p = frag_more (1 + 2 + 4); /* 1 opcode; 2 segment; 4 offset */
1150 p[0] = t->base_opcode;
1151 if (i.imms[1]->X_seg == SEG_ABSOLUTE)
1152 md_number_to_chars (p + 1, i.imms[1]->X_add_number, 4);
1153 else
1154 fix_new (frag_now, p + 1 - frag_now->fr_literal, 4,
1155 i.imms[1]->X_add_symbol,
1156 i.imms[1]->X_subtract_symbol,
1157 i.imms[1]->X_add_number, 0, NO_RELOC);
1158 if (i.imms[0]->X_seg != SEG_ABSOLUTE)
1159 as_bad("can't handle non absolute segment in long call/jmp");
1160 md_number_to_chars (p + 5, i.imms[0]->X_add_number, 2);
1161 } else {
1162 /* Output normal instructions here. */
1163 unsigned char *q;
1164
1165 /* First the prefix bytes. */
1166 for (q = i.prefix; q < i.prefix + i.prefixes; q++) {
1167 p = frag_more (1);
1168 md_number_to_chars (p, (unsigned int) *q, 1);
1169 }
1170
1171 /* Now the opcode; be careful about word order here! */
1172 if (fits_in_unsigned_byte(t->base_opcode)) {
1173 FRAG_APPEND_1_CHAR (t->base_opcode);
1174 } else if (fits_in_unsigned_word(t->base_opcode)) {
1175 p = frag_more (2);
1176 /* put out high byte first: can't use md_number_to_chars! */
1177 *p++ = (t->base_opcode >> 8) & 0xff;
1178 *p = t->base_opcode & 0xff;
1179 } else { /* opcode is either 3 or 4 bytes */
1180 if (t->base_opcode & 0xff000000) {
1181 p = frag_more (4);
1182 *p++ = (t->base_opcode >> 24) & 0xff;
1183 } else p = frag_more (3);
1184 *p++ = (t->base_opcode >> 16) & 0xff;
1185 *p++ = (t->base_opcode >> 8) & 0xff;
1186 *p = (t->base_opcode ) & 0xff;
1187 }
1188
1189 /* Now the modrm byte and base index byte (if present). */
1190 if (t->opcode_modifier & Modrm) {
1191 p = frag_more (1);
1192 /* md_number_to_chars (p, i.rm, 1); */
1193 md_number_to_chars (p, (i.rm.regmem<<0 | i.rm.reg<<3 | i.rm.mode<<6), 1);
1194 /* If i.rm.regmem == ESP (4) && i.rm.mode != Mode 3 (Register mode)
1195 ==> need second modrm byte. */
1196 if (i.rm.regmem == ESCAPE_TO_TWO_BYTE_ADDRESSING && i.rm.mode != 3) {
1197 p = frag_more (1);
1198 /* md_number_to_chars (p, i.bi, 1); */
1199 md_number_to_chars (p,(i.bi.base<<0 | i.bi.index<<3 | i.bi.scale<<6), 1);
1200 }
1201 }
1202
1203 if (i.disp_operands) {
1204 register unsigned int n;
1205
1206 for (n = 0; n < i.operands; n++) {
1207 if (i.disps[n]) {
1208 if (i.disps[n]->X_seg == SEG_ABSOLUTE) {
1209 if (i.types[n] & (Disp8|Abs8)) {
1210 p = frag_more (1);
1211 md_number_to_chars (p, i.disps[n]->X_add_number, 1);
1212 } else if (i.types[n] & (Disp16|Abs16)) {
1213 p = frag_more (2);
1214 md_number_to_chars (p, i.disps[n]->X_add_number, 2);
1215 } else { /* Disp32|Abs32 */
1216 p = frag_more (4);
1217 md_number_to_chars (p, i.disps[n]->X_add_number, 4);
1218 }
1219 } else { /* not SEG_ABSOLUTE */
1220 /* need a 32-bit fixup (don't support 8bit non-absolute disps) */
1221 p = frag_more (4);
1222 fix_new (frag_now, p - frag_now->fr_literal, 4,
1223 i.disps[n]->X_add_symbol, i.disps[n]->X_subtract_symbol,
1224 i.disps[n]->X_add_number, 0, NO_RELOC);
1225 }
1226 }
1227 }
1228 } /* end displacement output */
1229
1230 /* output immediate */
1231 if (i.imm_operands) {
1232 register unsigned int n;
1233
1234 for (n = 0; n < i.operands; n++) {
1235 if (i.imms[n]) {
1236 if (i.imms[n]->X_seg == SEG_ABSOLUTE) {
1237 if (i.types[n] & (Imm8|Imm8S)) {
1238 p = frag_more (1);
1239 md_number_to_chars (p, i.imms[n]->X_add_number, 1);
1240 } else if (i.types[n] & Imm16) {
1241 p = frag_more (2);
1242 md_number_to_chars (p, i.imms[n]->X_add_number, 2);
1243 } else {
1244 p = frag_more (4);
1245 md_number_to_chars (p, i.imms[n]->X_add_number, 4);
1246 }
1247 } else { /* not SEG_ABSOLUTE */
1248 /* need a 32-bit fixup (don't support 8bit non-absolute ims) */
1249 /* try to support other sizes ... */
1250 int size;
1251 if (i.types[n] & (Imm8|Imm8S))
1252 size = 1;
1253 else if (i.types[n] & Imm16)
1254 size = 2;
1255 else
1256 size = 4;
1257 p = frag_more (size);
1258 fix_new (frag_now, p - frag_now->fr_literal, size,
1259 i.imms[n]->X_add_symbol, i.imms[n]->X_subtract_symbol,
1260 i.imms[n]->X_add_number, 0, NO_RELOC);
1261 }
1262 }
1263 }
1264 } /* end immediate output */
1265 }
1266
1267 #ifdef DEBUG386
1268 if (flagseen ['D']) {
1269 pi (line, &i);
1270 }
1271 #endif /* DEBUG386 */
1272
1273 }
1274 return;
1275 }
1276 \f
1277 /* Parse OPERAND_STRING into the i386_insn structure I. Returns non-zero
1278 on error. */
1279
1280 static int i386_operand (operand_string)
1281 char *operand_string;
1282 {
1283 register char *op_string = operand_string;
1284
1285 /* Address of '\0' at end of operand_string. */
1286 char * end_of_operand_string = operand_string + strlen(operand_string);
1287
1288 /* Start and end of displacement string expression (if found). */
1289 char *displacement_string_start = NULL;
1290 char *displacement_string_end = NULL;
1291
1292 /* We check for an absolute prefix (differentiating,
1293 for example, 'jmp pc_relative_label' from 'jmp *absolute_label'. */
1294 if (*op_string == ABSOLUTE_PREFIX) {
1295 op_string++;
1296 i.types[this_operand] |= JumpAbsolute;
1297 }
1298
1299 /* Check if operand is a register. */
1300 if (*op_string == REGISTER_PREFIX) {
1301 register reg_entry *r;
1302 if (!(r = parse_register (op_string))) {
1303 as_bad("bad register name ('%s')", op_string);
1304 return 0;
1305 }
1306 /* Check for segment override, rather than segment register by
1307 searching for ':' after %<x>s where <x> = s, c, d, e, f, g. */
1308 if ((r->reg_type & (SReg2|SReg3)) && op_string[3] == ':') {
1309 switch (r->reg_num) {
1310 case 0:
1311 i.seg = &es; break;
1312 case 1:
1313 i.seg = &cs; break;
1314 case 2:
1315 i.seg = &ss; break;
1316 case 3:
1317 i.seg = &ds; break;
1318 case 4:
1319 i.seg = &fs; break;
1320 case 5:
1321 i.seg = &gs; break;
1322 }
1323 op_string += 4; /* skip % <x> s : */
1324 operand_string = op_string; /* Pretend given string starts here. */
1325 if (!is_digit_char(*op_string) && !is_identifier_char(*op_string)
1326 && *op_string != '(' && *op_string != ABSOLUTE_PREFIX) {
1327 as_bad("bad memory operand after segment override");
1328 return 0;
1329 }
1330 /* Handle case of %es:*foo. */
1331 if (*op_string == ABSOLUTE_PREFIX) {
1332 op_string++;
1333 i.types[this_operand] |= JumpAbsolute;
1334 }
1335 goto do_memory_reference;
1336 }
1337 i.types[this_operand] |= r->reg_type;
1338 i.regs[this_operand] = r;
1339 i.reg_operands++;
1340 } else if (*op_string == IMMEDIATE_PREFIX) { /* ... or an immediate */
1341 char *save_input_line_pointer;
1342 segT exp_seg = SEG_GOOF;
1343 expressionS *exp;
1344
1345 if (i.imm_operands == MAX_IMMEDIATE_OPERANDS) {
1346 as_bad("only 1 or 2 immediate operands are allowed");
1347 return 0;
1348 }
1349
1350 exp = &im_expressions[i.imm_operands++];
1351 i.imms[this_operand] = exp;
1352 save_input_line_pointer = input_line_pointer;
1353 input_line_pointer = ++op_string; /* must advance op_string! */
1354 exp_seg = expression(exp);
1355 input_line_pointer = save_input_line_pointer;
1356
1357 switch (exp_seg) {
1358 case SEG_ABSENT: /* missing or bad expr becomes absolute 0 */
1359 as_bad("missing or invalid immediate expression '%s' taken as 0",
1360 operand_string);
1361 exp->X_seg = SEG_ABSOLUTE;
1362 exp->X_add_number = 0;
1363 exp->X_add_symbol = (symbolS *) 0;
1364 exp->X_subtract_symbol = (symbolS *) 0;
1365 i.types[this_operand] |= Imm;
1366 break;
1367 case SEG_ABSOLUTE:
1368 i.types[this_operand] |= smallest_imm_type(exp->X_add_number);
1369 break;
1370 case SEG_TEXT: case SEG_DATA: case SEG_BSS: case SEG_UNKNOWN:
1371 i.types[this_operand] |= Imm32; /* this is an address ==> 32bit */
1372 break;
1373 default:
1374 seg_unimplemented:
1375 as_bad("Unimplemented segment type %d in parse_operand", exp_seg);
1376 return 0;
1377 }
1378 /* shorten this type of this operand if the instruction wants
1379 * fewer bits than are present in the immediate. The bit field
1380 * code can put out 'andb $0xffffff, %al', for example. pace
1381 * also 'movw $foo,(%eax)'
1382 */
1383 switch (i.suffix) {
1384 case WORD_OPCODE_SUFFIX:
1385 i.types[this_operand] |= Imm16;
1386 break;
1387 case BYTE_OPCODE_SUFFIX:
1388 i.types[this_operand] |= Imm16 | Imm8 | Imm8S;
1389 break;
1390 }
1391 } else if (is_digit_char(*op_string) || is_identifier_char(*op_string)
1392 || *op_string == '(') {
1393 /* This is a memory reference of some sort. */
1394 register char * base_string;
1395 unsigned int found_base_index_form;
1396
1397 do_memory_reference:
1398 if (i.mem_operands == MAX_MEMORY_OPERANDS) {
1399 as_bad("more than 1 memory reference in instruction");
1400 return 0;
1401 }
1402 i.mem_operands++;
1403
1404 /* Determine type of memory operand from opcode_suffix;
1405 no opcode suffix implies general memory references. */
1406 switch (i.suffix) {
1407 case BYTE_OPCODE_SUFFIX:
1408 i.types[this_operand] |= Mem8;
1409 break;
1410 case WORD_OPCODE_SUFFIX:
1411 i.types[this_operand] |= Mem16;
1412 break;
1413 case DWORD_OPCODE_SUFFIX:
1414 default:
1415 i.types[this_operand] |= Mem32;
1416 }
1417
1418 /* Check for base index form. We detect the base index form by
1419 looking for an ')' at the end of the operand, searching
1420 for the '(' matching it, and finding a REGISTER_PREFIX or ','
1421 after it. */
1422 base_string = end_of_operand_string - 1;
1423 found_base_index_form = 0;
1424 if (*base_string == ')') {
1425 unsigned int parens_balenced = 1;
1426 /* We've already checked that the number of left & right ()'s are equal,
1427 so this loop will not be infinite. */
1428 do {
1429 base_string--;
1430 if (*base_string == ')') parens_balenced++;
1431 if (*base_string == '(') parens_balenced--;
1432 } while (parens_balenced);
1433 base_string++; /* Skip past '('. */
1434 if (*base_string == REGISTER_PREFIX || *base_string == ',')
1435 found_base_index_form = 1;
1436 }
1437
1438 /* If we can't parse a base index register expression, we've found
1439 a pure displacement expression. We set up displacement_string_start
1440 and displacement_string_end for the code below. */
1441 if (! found_base_index_form) {
1442 displacement_string_start = op_string;
1443 displacement_string_end = end_of_operand_string;
1444 } else {
1445 char *base_reg_name, *index_reg_name, *num_string;
1446 int num;
1447
1448 i.types[this_operand] |= BaseIndex;
1449
1450 /* If there is a displacement set-up for it to be parsed later. */
1451 if (base_string != op_string + 1) {
1452 displacement_string_start = op_string;
1453 displacement_string_end = base_string - 1;
1454 }
1455
1456 /* Find base register (if any). */
1457 if (*base_string != ',') {
1458 base_reg_name = base_string++;
1459 /* skip past register name & parse it */
1460 while (isalpha(*base_string)) base_string++;
1461 if (base_string == base_reg_name+1) {
1462 as_bad("can't find base register name after '(%c'",
1463 REGISTER_PREFIX);
1464 return 0;
1465 }
1466 END_STRING_AND_SAVE (base_string);
1467 if (! (i.base_reg = parse_register (base_reg_name))) {
1468 as_bad("bad base register name ('%s')", base_reg_name);
1469 return 0;
1470 }
1471 RESTORE_END_STRING (base_string);
1472 }
1473
1474 /* Now check seperator; must be ',' ==> index reg
1475 OR num ==> no index reg. just scale factor
1476 OR ')' ==> end. (scale factor = 1) */
1477 if (*base_string != ',' && *base_string != ')') {
1478 as_bad("expecting ',' or ')' after base register in `%s'",
1479 operand_string);
1480 return 0;
1481 }
1482
1483 /* There may index reg here; and there may be a scale factor. */
1484 if (*base_string == ',' && *(base_string+1) == REGISTER_PREFIX) {
1485 index_reg_name = ++base_string;
1486 while (isalpha(*++base_string));
1487 END_STRING_AND_SAVE (base_string);
1488 if (! (i.index_reg = parse_register(index_reg_name))) {
1489 as_bad("bad index register name ('%s')", index_reg_name);
1490 return 0;
1491 }
1492 RESTORE_END_STRING (base_string);
1493 }
1494
1495 /* Check for scale factor. */
1496 if (*base_string == ',' && isdigit(*(base_string+1))) {
1497 num_string = ++base_string;
1498 while (is_digit_char(*base_string)) base_string++;
1499 if (base_string == num_string) {
1500 as_bad("can't find a scale factor after ','");
1501 return 0;
1502 }
1503 END_STRING_AND_SAVE (base_string);
1504 /* We've got a scale factor. */
1505 if (! sscanf (num_string, "%d", &num)) {
1506 as_bad("can't parse scale factor from '%s'", num_string);
1507 return 0;
1508 }
1509 RESTORE_END_STRING (base_string);
1510 switch (num) { /* must be 1 digit scale */
1511 case 1: i.log2_scale_factor = 0; break;
1512 case 2: i.log2_scale_factor = 1; break;
1513 case 4: i.log2_scale_factor = 2; break;
1514 case 8: i.log2_scale_factor = 3; break;
1515 default:
1516 as_bad("expecting scale factor of 1, 2, 4, 8; got %d", num);
1517 return 0;
1518 }
1519 } else {
1520 if (! i.index_reg && *base_string == ',') {
1521 as_bad("expecting index register or scale factor after ','; got '%c'",
1522 *(base_string+1));
1523 return 0;
1524 }
1525 }
1526 }
1527
1528 /* If there's an expression begining the operand, parse it,
1529 assuming displacement_string_start and displacement_string_end
1530 are meaningful. */
1531 if (displacement_string_start) {
1532 register expressionS *exp;
1533 segT exp_seg = SEG_GOOF;
1534 char *save_input_line_pointer;
1535 exp = &disp_expressions[i.disp_operands];
1536 i.disps [this_operand] = exp;
1537 i.disp_operands++;
1538 save_input_line_pointer = input_line_pointer;
1539 input_line_pointer = displacement_string_start;
1540 END_STRING_AND_SAVE (displacement_string_end);
1541 exp_seg = expression(exp);
1542 if(*input_line_pointer)
1543 as_bad("Ignoring junk '%s' after expression",input_line_pointer);
1544 RESTORE_END_STRING (displacement_string_end);
1545 input_line_pointer = save_input_line_pointer;
1546 switch (exp_seg) {
1547 case SEG_ABSENT:
1548 /* missing expr becomes absolute 0 */
1549 as_bad("missing or invalid displacement '%s' taken as 0",
1550 operand_string);
1551 i.types[this_operand] |= (Disp|Abs);
1552 exp->X_seg = SEG_ABSOLUTE;
1553 exp->X_add_number = 0;
1554 exp->X_add_symbol = (symbolS *) 0;
1555 exp->X_subtract_symbol = (symbolS *) 0;
1556 break;
1557 case SEG_ABSOLUTE:
1558 i.types[this_operand] |= SMALLEST_DISP_TYPE (exp->X_add_number);
1559 break;
1560 case SEG_TEXT: case SEG_DATA: case SEG_BSS:
1561 case SEG_UNKNOWN: /* must be 32 bit displacement (i.e. address) */
1562 i.types[this_operand] |= Disp32;
1563 break;
1564 default:
1565 goto seg_unimplemented;
1566 }
1567 }
1568
1569 /* Make sure the memory operand we've been dealt is valid. */
1570 if (i.base_reg && i.index_reg &&
1571 ! (i.base_reg->reg_type & i.index_reg->reg_type & Reg)) {
1572 as_bad("register size mismatch in (base,index,scale) expression");
1573 return 0;
1574 }
1575 if ((i.base_reg && (i.base_reg->reg_type & Reg32) == 0) ||
1576 (i.index_reg && (i.index_reg->reg_type & Reg32) == 0)) {
1577 as_bad("base/index register must be 32 bit register");
1578 return 0;
1579 }
1580 if (i.index_reg && i.index_reg == esp) {
1581 as_bad("%s may not be used as an index register", esp->reg_name);
1582 return 0;
1583 }
1584 } else { /* it's not a memory operand; argh! */
1585 as_bad("invalid char %s begining %s operand '%s'",
1586 output_invalid(*op_string), ordinal_names[this_operand],
1587 op_string);
1588 return 0;
1589 }
1590 return 1; /* normal return */
1591 }
1592 \f
1593 /*
1594 * md_estimate_size_before_relax()
1595 *
1596 * Called just before relax().
1597 * Any symbol that is now undefined will not become defined.
1598 * Return the correct fr_subtype in the frag.
1599 * Return the initial "guess for fr_var" to caller.
1600 * The guess for fr_var is ACTUALLY the growth beyond fr_fix.
1601 * Whatever we do to grow fr_fix or fr_var contributes to our returned value.
1602 * Although it may not be explicit in the frag, pretend fr_var starts with a
1603 * 0 value.
1604 */
1605 int
1606 md_estimate_size_before_relax (fragP, segment)
1607 register fragS * fragP;
1608 register segT segment;
1609 {
1610 register unsigned char * opcode;
1611 register int old_fr_fix;
1612
1613 old_fr_fix = fragP -> fr_fix;
1614 opcode = (unsigned char *) fragP -> fr_opcode;
1615 /* We've already got fragP->fr_subtype right; all we have to do is check
1616 for un-relaxable symbols. */
1617 if (S_GET_SEGMENT(fragP -> fr_symbol) != segment) {
1618 /* symbol is undefined in this segment */
1619 switch (opcode[0]) {
1620 case JUMP_PC_RELATIVE: /* make jmp (0xeb) a dword displacement jump */
1621 opcode[0] = 0xe9; /* dword disp jmp */
1622 fragP -> fr_fix += 4;
1623 fix_new (fragP, old_fr_fix, 4,
1624 fragP -> fr_symbol,
1625 (symbolS *) 0,
1626 fragP -> fr_offset, 1, NO_RELOC);
1627 break;
1628
1629 default:
1630 /* This changes the byte-displacement jump 0x7N -->
1631 the dword-displacement jump 0x0f8N */
1632 opcode[1] = opcode[0] + 0x10;
1633 opcode[0] = TWO_BYTE_OPCODE_ESCAPE; /* two-byte escape */
1634 fragP -> fr_fix += 1 + 4; /* we've added an opcode byte */
1635 fix_new (fragP, old_fr_fix + 1, 4,
1636 fragP -> fr_symbol,
1637 (symbolS *) 0,
1638 fragP -> fr_offset, 1, NO_RELOC);
1639 break;
1640 }
1641 frag_wane (fragP);
1642 }
1643 return (fragP -> fr_var + fragP -> fr_fix - old_fr_fix);
1644 } /* md_estimate_size_before_relax() */
1645 \f
1646 /*
1647 * md_convert_frag();
1648 *
1649 * Called after relax() is finished.
1650 * In: Address of frag.
1651 * fr_type == rs_machine_dependent.
1652 * fr_subtype is what the address relaxed to.
1653 *
1654 * Out: Any fixSs and constants are set up.
1655 * Caller will turn frag into a ".space 0".
1656 */
1657 void
1658 md_convert_frag (headers, fragP)
1659 object_headers *headers;
1660 register fragS * fragP;
1661 {
1662 register unsigned char *opcode;
1663 unsigned char *where_to_put_displacement = NULL;
1664 unsigned int target_address;
1665 unsigned int opcode_address;
1666 unsigned int extension = 0;
1667 int displacement_from_opcode_start;
1668
1669 opcode = (unsigned char *) fragP -> fr_opcode;
1670
1671 /* Address we want to reach in file space. */
1672 target_address = S_GET_VALUE(fragP->fr_symbol) + fragP->fr_offset;
1673
1674 /* Address opcode resides at in file space. */
1675 opcode_address = fragP->fr_address + fragP->fr_fix;
1676
1677 /* Displacement from opcode start to fill into instruction. */
1678 displacement_from_opcode_start = target_address - opcode_address;
1679
1680 switch (fragP->fr_subtype) {
1681 case ENCODE_RELAX_STATE (COND_JUMP, BYTE):
1682 case ENCODE_RELAX_STATE (UNCOND_JUMP, BYTE):
1683 /* don't have to change opcode */
1684 extension = 1; /* 1 opcode + 1 displacement */
1685 where_to_put_displacement = &opcode[1];
1686 break;
1687
1688 case ENCODE_RELAX_STATE (COND_JUMP, WORD):
1689 opcode[1] = TWO_BYTE_OPCODE_ESCAPE;
1690 opcode[2] = opcode[0] + 0x10;
1691 opcode[0] = WORD_PREFIX_OPCODE;
1692 extension = 4; /* 3 opcode + 2 displacement */
1693 where_to_put_displacement = &opcode[3];
1694 break;
1695
1696 case ENCODE_RELAX_STATE (UNCOND_JUMP, WORD):
1697 opcode[1] = 0xe9;
1698 opcode[0] = WORD_PREFIX_OPCODE;
1699 extension = 3; /* 2 opcode + 2 displacement */
1700 where_to_put_displacement = &opcode[2];
1701 break;
1702
1703 case ENCODE_RELAX_STATE (COND_JUMP, DWORD):
1704 opcode[1] = opcode[0] + 0x10;
1705 opcode[0] = TWO_BYTE_OPCODE_ESCAPE;
1706 extension = 5; /* 2 opcode + 4 displacement */
1707 where_to_put_displacement = &opcode[2];
1708 break;
1709
1710 case ENCODE_RELAX_STATE (UNCOND_JUMP, DWORD):
1711 opcode[0] = 0xe9;
1712 extension = 4; /* 1 opcode + 4 displacement */
1713 where_to_put_displacement = &opcode[1];
1714 break;
1715
1716 default:
1717 BAD_CASE(fragP -> fr_subtype);
1718 break;
1719 }
1720 /* now put displacement after opcode */
1721 md_number_to_chars (where_to_put_displacement,
1722 displacement_from_opcode_start - extension,
1723 SIZE_FROM_RELAX_STATE (fragP->fr_subtype));
1724 fragP -> fr_fix += extension;
1725 }
1726
1727 \f
1728 int md_short_jump_size = 2; /* size of byte displacement jmp */
1729 int md_long_jump_size = 5; /* size of dword displacement jmp */
1730 int md_reloc_size = 8; /* Size of relocation record */
1731
1732 void md_create_short_jump(ptr, from_addr, to_addr, frag, to_symbol)
1733 char *ptr;
1734 long from_addr, to_addr;
1735 fragS *frag;
1736 symbolS *to_symbol;
1737 {
1738 long offset;
1739
1740 offset = to_addr - (from_addr + 2);
1741 md_number_to_chars (ptr, (long) 0xeb, 1); /* opcode for byte-disp jump */
1742 md_number_to_chars (ptr + 1, offset, 1);
1743 }
1744
1745 void md_create_long_jump (ptr, from_addr, to_addr, frag, to_symbol)
1746 char *ptr;
1747 long from_addr, to_addr;
1748 fragS *frag;
1749 symbolS *to_symbol;
1750 {
1751 long offset;
1752
1753 if (flagseen['m']) {
1754 offset = to_addr - S_GET_VALUE(to_symbol);
1755 md_number_to_chars (ptr, 0xe9, 1); /* opcode for long jmp */
1756 md_number_to_chars (ptr + 1, offset, 4);
1757 fix_new (frag, (ptr+1) - frag->fr_literal, 4,
1758 to_symbol, (symbolS *) 0, (long) 0, 0, NO_RELOC);
1759 } else {
1760 offset = to_addr - (from_addr + 5);
1761 md_number_to_chars(ptr, (long) 0xe9, 1);
1762 md_number_to_chars(ptr + 1, offset, 4);
1763 }
1764 }
1765 \f
1766 int
1767 md_parse_option(argP,cntP,vecP)
1768 char **argP;
1769 int *cntP;
1770 char ***vecP;
1771 {
1772 return 1;
1773 }
1774 \f
1775 void /* Knows about order of bytes in address. */
1776 md_number_to_chars (con, value, nbytes)
1777 char con []; /* Return 'nbytes' of chars here. */
1778 long value; /* The value of the bits. */
1779 int nbytes; /* Number of bytes in the output. */
1780 {
1781 register char * p = con;
1782
1783 switch (nbytes) {
1784 case 1:
1785 p[0] = value & 0xff;
1786 break;
1787 case 2:
1788 p[0] = value & 0xff;
1789 p[1] = (value >> 8) & 0xff;
1790 break;
1791 case 4:
1792 p[0] = value & 0xff;
1793 p[1] = (value>>8) & 0xff;
1794 p[2] = (value>>16) & 0xff;
1795 p[3] = (value>>24) & 0xff;
1796 break;
1797 default:
1798 BAD_CASE (nbytes);
1799 }
1800 }
1801
1802
1803 /* Apply a fixup (fixS) to segment data, once it has been determined
1804 by our caller that we have all the info we need to fix it up.
1805
1806 On the 386, immediates, displacements, and data pointers are all in
1807 the same (little-endian) format, so we don't need to care about which
1808 we are handling. */
1809
1810 void
1811 md_apply_fix (fixP, value)
1812 fixS * fixP; /* The fix we're to put in */
1813 long value; /* The value of the bits. */
1814 {
1815 register char * p = fixP->fx_where + fixP->fx_frag->fr_literal;
1816
1817 switch (fixP->fx_size) {
1818 case 1:
1819 *p = value;
1820 break;
1821 case 2:
1822 *p++ = value;
1823 *p = (value>>8);
1824 break;
1825 case 4:
1826 *p++ = value;
1827 *p++ = (value>>8);
1828 *p++ = (value>>16);
1829 *p = (value>>24);
1830 break;
1831 default:
1832 BAD_CASE (fixP->fx_size);
1833 }
1834 }
1835
1836 long /* Knows about the byte order in a word. */
1837 md_chars_to_number (con, nbytes)
1838 unsigned char con[]; /* Low order byte 1st. */
1839 int nbytes; /* Number of bytes in the input. */
1840 {
1841 long retval;
1842 for (retval=0, con+=nbytes-1; nbytes--; con--)
1843 {
1844 retval <<= BITS_PER_CHAR;
1845 retval |= *con;
1846 }
1847 return retval;
1848 }
1849
1850 /* Not needed for coff since relocation structure does not
1851 contain bitfields. */
1852 #if defined(OBJ_AOUT) | defined(OBJ_BOUT)
1853 #ifdef comment
1854 /* Output relocation information in the target's format. */
1855 void
1856 md_ri_to_chars(the_bytes, ri)
1857 char *the_bytes;
1858 struct reloc_info_generic *ri;
1859 {
1860 /* this is easy */
1861 md_number_to_chars(the_bytes, ri->r_address, 4);
1862 /* now the fun stuff */
1863 the_bytes[6] = (ri->r_symbolnum >> 16) & 0x0ff;
1864 the_bytes[5] = (ri->r_symbolnum >> 8) & 0x0ff;
1865 the_bytes[4] = ri->r_symbolnum & 0x0ff;
1866 the_bytes[7] = (((ri->r_extern << 3) & 0x08) | ((ri->r_length << 1) & 0x06) |
1867 ((ri->r_pcrel << 0) & 0x01)) & 0x0F;
1868 }
1869 #endif /* comment */
1870
1871 void tc_aout_fix_to_chars(where, fixP, segment_address_in_file)
1872 char *where;
1873 fixS *fixP;
1874 relax_addressT segment_address_in_file;
1875 {
1876 /*
1877 * In: length of relocation (or of address) in chars: 1, 2 or 4.
1878 * Out: GNU LD relocation length code: 0, 1, or 2.
1879 */
1880
1881 static unsigned char nbytes_r_length [] = { 42, 0, 1, 42, 2 };
1882 long r_symbolnum;
1883
1884 know(fixP->fx_addsy != NULL);
1885
1886 md_number_to_chars(where,
1887 fixP->fx_frag->fr_address + fixP->fx_where - segment_address_in_file,
1888 4);
1889
1890 r_symbolnum = (S_IS_DEFINED(fixP->fx_addsy)
1891 ? S_GET_TYPE(fixP->fx_addsy)
1892 : fixP->fx_addsy->sy_number);
1893
1894 where[6] = (r_symbolnum >> 16) & 0x0ff;
1895 where[5] = (r_symbolnum >> 8) & 0x0ff;
1896 where[4] = r_symbolnum & 0x0ff;
1897 where[7] = ((((!S_IS_DEFINED(fixP->fx_addsy)) << 3) & 0x08)
1898 | ((nbytes_r_length[fixP->fx_size] << 1) & 0x06)
1899 | (((fixP->fx_pcrel << 0) & 0x01) & 0x0f));
1900
1901 return;
1902 } /* tc_aout_fix_to_chars() */
1903
1904 #endif /* OBJ_AOUT or OBJ_BOUT */
1905
1906 \f
1907 #define MAX_LITTLENUMS 6
1908
1909 /* Turn the string pointed to by litP into a floating point constant of type
1910 type, and emit the appropriate bytes. The number of LITTLENUMS emitted
1911 is stored in *sizeP . An error message is returned, or NULL on OK.
1912 */
1913 char *
1914 md_atof(type,litP,sizeP)
1915 char type;
1916 char *litP;
1917 int *sizeP;
1918 {
1919 int prec;
1920 LITTLENUM_TYPE words[MAX_LITTLENUMS];
1921 LITTLENUM_TYPE *wordP;
1922 char *t;
1923
1924 switch(type) {
1925 case 'f':
1926 case 'F':
1927 prec = 2;
1928 break;
1929
1930 case 'd':
1931 case 'D':
1932 prec = 4;
1933 break;
1934
1935 case 'x':
1936 case 'X':
1937 prec = 5;
1938 break;
1939
1940 default:
1941 *sizeP=0;
1942 return "Bad call to md_atof ()";
1943 }
1944 t = atof_ieee (input_line_pointer,type,words);
1945 if(t)
1946 input_line_pointer=t;
1947
1948 *sizeP = prec * sizeof(LITTLENUM_TYPE);
1949 /* this loops outputs the LITTLENUMs in REVERSE order; in accord with
1950 the bigendian 386 */
1951 for(wordP = words + prec - 1;prec--;) {
1952 md_number_to_chars (litP, (long) (*wordP--), sizeof(LITTLENUM_TYPE));
1953 litP += sizeof(LITTLENUM_TYPE);
1954 }
1955 return ""; /* Someone should teach Dean about null pointers */
1956 }
1957 \f
1958 char output_invalid_buf[8];
1959
1960 static char * output_invalid (c)
1961 char c;
1962 {
1963 if (isprint(c)) sprintf (output_invalid_buf, "'%c'", c);
1964 else sprintf (output_invalid_buf, "(0x%x)", (unsigned) c);
1965 return output_invalid_buf;
1966 }
1967
1968 static reg_entry *parse_register (reg_string)
1969 char *reg_string; /* reg_string starts *before* REGISTER_PREFIX */
1970 {
1971 register char *s = reg_string;
1972 register char *p;
1973 char reg_name_given[MAX_REG_NAME_SIZE];
1974
1975 s++; /* skip REGISTER_PREFIX */
1976 for (p = reg_name_given; is_register_char (*s); p++, s++) {
1977 *p = register_chars [*s];
1978 if (p >= reg_name_given + MAX_REG_NAME_SIZE)
1979 return (reg_entry *) 0;
1980 }
1981 *p = '\0';
1982 return (reg_entry *) hash_find (reg_hash, reg_name_given);
1983 }
1984
1985
1986 /* We have no need to default values of symbols. */
1987
1988 /* ARGSUSED */
1989 symbolS *
1990 md_undefined_symbol (name)
1991 char *name;
1992 {
1993 return 0;
1994 }
1995
1996 /* Parse an operand that is machine-specific.
1997 We just return without modifying the expression if we have nothing
1998 to do. */
1999
2000 /* ARGSUSED */
2001 void
2002 md_operand (expressionP)
2003 expressionS *expressionP;
2004 {
2005 }
2006
2007 /* Round up a section size to the appropriate boundary. */
2008 long
2009 md_section_align (segment, size)
2010 segT segment;
2011 long size;
2012 {
2013 return size; /* Byte alignment is fine */
2014 }
2015
2016 /* Exactly what point is a PC-relative offset relative TO?
2017 On the i386, they're relative to the address of the offset, plus
2018 its size. (??? Is this right? FIXME-SOON!) */
2019 long
2020 md_pcrel_from (fixP)
2021 fixS *fixP;
2022 {
2023 return fixP->fx_size + fixP->fx_where + fixP->fx_frag->fr_address;
2024 }
2025
2026 /* these were macros, but I don't trust macros that eval their
2027 arguments more than once. Besides, gcc can static inline them.
2028 xoxorich. */
2029
2030 static unsigned long mode_from_disp_size(t)
2031 unsigned long t;
2032 {
2033 return((t & (Disp8))
2034 ? 1
2035 : ((t & (Disp32)) ? 2 : 0));
2036 } /* mode_from_disp_size() */
2037
2038 /* convert opcode suffix ('b' 'w' 'l' typically) into type specifyer */
2039
2040 static unsigned long opcode_suffix_to_type(s)
2041 unsigned long s;
2042 {
2043 return(s == BYTE_OPCODE_SUFFIX
2044 ? Byte : (s == WORD_OPCODE_SUFFIX
2045 ? Word : DWord));
2046 } /* opcode_suffix_to_type() */
2047
2048 static int fits_in_signed_byte(num)
2049 long num;
2050 {
2051 return((num >= -128) && (num <= 127));
2052 } /* fits_in_signed_byte() */
2053
2054 static int fits_in_unsigned_byte(num)
2055 long num;
2056 {
2057 return((num & 0xff) == num);
2058 } /* fits_in_unsigned_byte() */
2059
2060 static int fits_in_unsigned_word(num)
2061 long num;
2062 {
2063 return((num & 0xffff) == num);
2064 } /* fits_in_unsigned_word() */
2065
2066 static int fits_in_signed_word(num)
2067 long num;
2068 {
2069 return((-32768 <= num) && (num <= 32767));
2070 } /* fits_in_signed_word() */
2071
2072 static int smallest_imm_type(num)
2073 long num;
2074 {
2075 return((num == 1)
2076 ? (Imm1|Imm8|Imm8S|Imm16|Imm32)
2077 : (fits_in_signed_byte(num)
2078 ? (Imm8S|Imm8|Imm16|Imm32)
2079 : (fits_in_unsigned_byte(num)
2080 ? (Imm8|Imm16|Imm32)
2081 : ((fits_in_signed_word(num) || fits_in_unsigned_word(num))
2082 ? (Imm16|Imm32)
2083 : (Imm32)))));
2084 } /* smallest_imm_type() */
2085
2086 /*
2087 * Local Variables:
2088 * comment-column: 0
2089 * End:
2090 */
2091
2092 /* end of tc-i386.c */
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