1 /* i386.c -- Assemble code for the Intel 80386
2 Copyright (C) 1989, 91, 92, 93, 94, 95, 96, 97, 1998
3 Free Software Foundation.
5 This file is part of GAS, the GNU Assembler.
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
23 Intel 80386 machine specific gas.
24 Written by Eliot Dresselhaus (eliot@mgm.mit.edu).
25 Bugs & suggestions are completely welcome. This is free software.
26 Please help us make it better.
35 #include "opcode/i386.h"
38 #define TC_RELOC(X,Y) (Y)
41 #ifndef SCALE1_WHEN_NO_INDEX
42 /* Specifying a scale factor besides 1 when there is no index is
43 futile. eg. `mov (%ebx,2),%al' does exactly the same as
44 `mov (%ebx),%al'. To slavishly follow what the programmer
45 specified, set SCALE1_WHEN_NO_INDEX to 0. */
46 #define SCALE1_WHEN_NO_INDEX 1
49 static unsigned long mode_from_disp_size
PARAMS ((unsigned long));
50 static int fits_in_signed_byte
PARAMS ((long));
51 static int fits_in_unsigned_byte
PARAMS ((long));
52 static int fits_in_unsigned_word
PARAMS ((long));
53 static int fits_in_signed_word
PARAMS ((long));
54 static int smallest_imm_type
PARAMS ((long));
55 static int check_prefix
PARAMS ((int));
56 static void set_16bit_code_flag
PARAMS ((int));
58 static bfd_reloc_code_real_type reloc
59 PARAMS ((int, int, bfd_reloc_code_real_type
));
62 /* 'md_assemble ()' gathers together information and puts it into a
67 /* TM holds the template for the insn were currently assembling. */
69 /* SUFFIX holds the opcode suffix (e.g. 'l' for 'movl') if given. */
71 /* Operands are coded with OPERANDS, TYPES, DISPS, IMMS, and REGS. */
73 /* OPERANDS gives the number of given operands. */
74 unsigned int operands
;
76 /* REG_OPERANDS, DISP_OPERANDS, MEM_OPERANDS, IMM_OPERANDS give the number
77 of given register, displacement, memory operands and immediate
79 unsigned int reg_operands
, disp_operands
, mem_operands
, imm_operands
;
81 /* TYPES [i] is the type (see above #defines) which tells us how to
82 search through DISPS [i] & IMMS [i] & REGS [i] for the required
84 unsigned int types
[MAX_OPERANDS
];
86 /* Displacements (if given) for each operand. */
87 expressionS
*disps
[MAX_OPERANDS
];
89 /* Relocation type for operand */
91 enum bfd_reloc_code_real disp_reloc
[MAX_OPERANDS
];
93 int disp_reloc
[MAX_OPERANDS
];
96 /* Immediate operands (if given) for each operand. */
97 expressionS
*imms
[MAX_OPERANDS
];
99 /* Register operands (if given) for each operand. */
100 reg_entry
*regs
[MAX_OPERANDS
];
102 /* BASE_REG, INDEX_REG, and LOG2_SCALE_FACTOR are used to encode
103 the base index byte below. */
105 reg_entry
*index_reg
;
106 unsigned int log2_scale_factor
;
108 /* SEG gives the seg_entries of this insn. They are zero unless
109 explicit segment overrides are given. */
110 const seg_entry
*seg
[2]; /* segments for memory operands (if given) */
112 /* PREFIX holds all the given prefix opcodes (usually null).
113 PREFIXES is the number of prefix opcodes. */
114 unsigned int prefixes
;
115 unsigned char prefix
[MAX_PREFIXES
];
117 /* Wait prefix needs to come before any other prefixes, so handle
118 it specially. wait_prefix will hold the opcode modifier flag
119 FWait if a wait prefix is given. */
122 /* RM and BI are the modrm byte and the base index byte where the
123 addressing modes of this insn are encoded. */
129 typedef struct _i386_insn i386_insn
;
131 /* This array holds the chars that always start a comment. If the
132 pre-processor is disabled, these aren't very useful */
133 #if defined (TE_I386AIX) || defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
134 const char comment_chars
[] = "#/";
136 const char comment_chars
[] = "#";
139 /* This array holds the chars that only start a comment at the beginning of
140 a line. If the line seems to have the form '# 123 filename'
141 .line and .file directives will appear in the pre-processed output */
142 /* Note that input_file.c hand checks for '#' at the beginning of the
143 first line of the input file. This is because the compiler outputs
144 #NO_APP at the beginning of its output. */
145 /* Also note that comments started like this one will always work if
146 '/' isn't otherwise defined. */
147 #if defined (TE_I386AIX) || defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
148 const char line_comment_chars
[] = "";
150 const char line_comment_chars
[] = "/";
152 const char line_separator_chars
[] = "";
154 /* Chars that can be used to separate mant from exp in floating point nums */
155 const char EXP_CHARS
[] = "eE";
157 /* Chars that mean this number is a floating point constant */
160 const char FLT_CHARS
[] = "fFdDxX";
162 /* tables for lexical analysis */
163 static char opcode_chars
[256];
164 static char register_chars
[256];
165 static char operand_chars
[256];
166 static char space_chars
[256];
167 static char identifier_chars
[256];
168 static char digit_chars
[256];
171 #define is_opcode_char(x) (opcode_chars[(unsigned char) x])
172 #define is_operand_char(x) (operand_chars[(unsigned char) x])
173 #define is_register_char(x) (register_chars[(unsigned char) x])
174 #define is_space_char(x) (space_chars[(unsigned char) x])
175 #define is_identifier_char(x) (identifier_chars[(unsigned char) x])
176 #define is_digit_char(x) (digit_chars[(unsigned char) x])
178 /* put here all non-digit non-letter charcters that may occur in an operand */
179 static char operand_special_chars
[] = "%$-+(,)*._~/<>|&^!:[@]";
181 /* md_assemble() always leaves the strings it's passed unaltered. To
182 effect this we maintain a stack of saved characters that we've smashed
183 with '\0's (indicating end of strings for various sub-fields of the
184 assembler instruction). */
185 static char save_stack
[32];
186 static char *save_stack_p
; /* stack pointer */
187 #define END_STRING_AND_SAVE(s) *save_stack_p++ = *s; *s = '\0'
188 #define RESTORE_END_STRING(s) *s = *--save_stack_p
190 /* The instruction we're assembling. */
193 /* Possible templates for current insn. */
194 static templates
*current_templates
;
196 /* Per instruction expressionS buffers: 2 displacements & 2 immediate max. */
197 static expressionS disp_expressions
[2], im_expressions
[2];
199 static int this_operand
; /* current operand we are working on */
201 static int flag_do_long_jump
; /* FIXME what does this do? */
203 static int flag_16bit_code
; /* 1 if we're writing 16-bit code, 0 if 32-bit */
205 /* Interface to relax_segment.
206 There are 2 relax states for 386 jump insns: one for conditional &
207 one for unconditional jumps. This is because the these two types
208 of jumps add different sizes to frags when we're figuring out what
209 sort of jump to choose to reach a given label. */
212 #define COND_JUMP 1 /* conditional jump */
213 #define UNCOND_JUMP 2 /* unconditional jump */
218 #define UNKNOWN_SIZE 3
222 #define INLINE __inline__
228 #define ENCODE_RELAX_STATE(type,size) \
229 ((relax_substateT)((type<<2) | (size)))
230 #define SIZE_FROM_RELAX_STATE(s) \
231 ( (((s) & 0x3) == BYTE ? 1 : (((s) & 0x3) == WORD ? 2 : 4)) )
233 const relax_typeS md_relax_table
[] =
236 1) most positive reach of this state,
237 2) most negative reach of this state,
238 3) how many bytes this mode will add to the size of the current frag
239 4) which index into the table to try if we can't fit into this one.
246 /* For now we don't use word displacement jumps; they will not work
247 for destination addresses > 0xFFFF, since they clear the upper 16
249 {127 + 1, -128 + 1, 0, ENCODE_RELAX_STATE (COND_JUMP
, DWORD
)},
250 /* word conditionals add 3 bytes to frag:
251 2 opcode prefix; 1 displacement bytes */
252 {32767 + 2, -32768 + 2, 3, ENCODE_RELAX_STATE (COND_JUMP
, DWORD
)},
253 /* dword conditionals adds 4 bytes to frag:
254 1 opcode prefix; 3 displacement bytes */
258 {127 + 1, -128 + 1, 0, ENCODE_RELAX_STATE (UNCOND_JUMP
, DWORD
)},
259 /* word jmp adds 2 bytes to frag:
260 1 opcode prefix; 1 displacement bytes */
261 {32767 + 2, -32768 + 2, 2, ENCODE_RELAX_STATE (UNCOND_JUMP
, DWORD
)},
262 /* dword jmp adds 3 bytes to frag:
263 0 opcode prefix; 3 displacement bytes */
271 i386_align_code (fragP
, count
)
275 /* Various efficient no-op patterns for aligning code labels. */
276 /* Note: Don't try to assemble the instructions in the comments. */
277 /* 0L and 0w are not legal */
278 static const char f32_1
[] =
280 static const char f32_2
[] =
281 {0x89,0xf6}; /* movl %esi,%esi */
282 static const char f32_3
[] =
283 {0x8d,0x76,0x00}; /* leal 0(%esi),%esi */
284 static const char f32_4
[] =
285 {0x8d,0x74,0x26,0x00}; /* leal 0(%esi,1),%esi */
286 static const char f32_5
[] =
288 0x8d,0x74,0x26,0x00}; /* leal 0(%esi,1),%esi */
289 static const char f32_6
[] =
290 {0x8d,0xb6,0x00,0x00,0x00,0x00}; /* leal 0L(%esi),%esi */
291 static const char f32_7
[] =
292 {0x8d,0xb4,0x26,0x00,0x00,0x00,0x00}; /* leal 0L(%esi,1),%esi */
293 static const char f32_8
[] =
295 0x8d,0xb4,0x26,0x00,0x00,0x00,0x00}; /* leal 0L(%esi,1),%esi */
296 static const char f32_9
[] =
297 {0x89,0xf6, /* movl %esi,%esi */
298 0x8d,0xbc,0x27,0x00,0x00,0x00,0x00}; /* leal 0L(%edi,1),%edi */
299 static const char f32_10
[] =
300 {0x8d,0x76,0x00, /* leal 0(%esi),%esi */
301 0x8d,0xbc,0x27,0x00,0x00,0x00,0x00}; /* leal 0L(%edi,1),%edi */
302 static const char f32_11
[] =
303 {0x8d,0x74,0x26,0x00, /* leal 0(%esi,1),%esi */
304 0x8d,0xbc,0x27,0x00,0x00,0x00,0x00}; /* leal 0L(%edi,1),%edi */
305 static const char f32_12
[] =
306 {0x8d,0xb6,0x00,0x00,0x00,0x00, /* leal 0L(%esi),%esi */
307 0x8d,0xbf,0x00,0x00,0x00,0x00}; /* leal 0L(%edi),%edi */
308 static const char f32_13
[] =
309 {0x8d,0xb6,0x00,0x00,0x00,0x00, /* leal 0L(%esi),%esi */
310 0x8d,0xbc,0x27,0x00,0x00,0x00,0x00}; /* leal 0L(%edi,1),%edi */
311 static const char f32_14
[] =
312 {0x8d,0xb4,0x26,0x00,0x00,0x00,0x00, /* leal 0L(%esi,1),%esi */
313 0x8d,0xbc,0x27,0x00,0x00,0x00,0x00}; /* leal 0L(%edi,1),%edi */
314 static const char f32_15
[] =
315 {0xeb,0x0d,0x90,0x90,0x90,0x90,0x90, /* jmp .+15; lotsa nops */
316 0x90,0x90,0x90,0x90,0x90,0x90,0x90,0x90};
317 static const char f16_4
[] =
318 {0x8d,0xb4,0x00,0x00}; /* lea 0w(%si),%si */
319 static const char f16_5
[] =
321 0x8d,0xb4,0x00,0x00}; /* lea 0w(%si),%si */
322 static const char f16_6
[] =
323 {0x89,0xf6, /* mov %si,%si */
324 0x8d,0xbd,0x00,0x00}; /* lea 0w(%di),%di */
325 static const char f16_7
[] =
326 {0x8d,0x74,0x00, /* lea 0(%si),%si */
327 0x8d,0xbd,0x00,0x00}; /* lea 0w(%di),%di */
328 static const char f16_8
[] =
329 {0x8d,0xb4,0x00,0x00, /* lea 0w(%si),%si */
330 0x8d,0xbd,0x00,0x00}; /* lea 0w(%di),%di */
331 static const char *const f32_patt
[] = {
332 f32_1
, f32_2
, f32_3
, f32_4
, f32_5
, f32_6
, f32_7
, f32_8
,
333 f32_9
, f32_10
, f32_11
, f32_12
, f32_13
, f32_14
, f32_15
335 static const char *const f16_patt
[] = {
336 f32_1
, f32_2
, f32_3
, f16_4
, f16_5
, f16_6
, f16_7
, f16_8
,
337 f32_15
, f32_15
, f32_15
, f32_15
, f32_15
, f32_15
, f32_15
340 if (count
> 0 && count
<= 15)
344 memcpy(fragP
->fr_literal
+ fragP
->fr_fix
,
345 f16_patt
[count
- 1], count
);
346 if (count
> 8) /* adjust jump offset */
347 fragP
->fr_literal
[fragP
->fr_fix
+ 1] = count
- 2;
350 memcpy(fragP
->fr_literal
+ fragP
->fr_fix
,
351 f32_patt
[count
- 1], count
);
352 fragP
->fr_var
= count
;
356 static char *output_invalid
PARAMS ((int c
));
357 static int i386_operand
PARAMS ((char *operand_string
));
358 static reg_entry
*parse_register
PARAMS ((char *reg_string
));
360 static void s_bss
PARAMS ((int));
363 symbolS
*GOT_symbol
; /* Pre-defined "_GLOBAL_OFFSET_TABLE_" */
365 static INLINE
unsigned long
366 mode_from_disp_size (t
)
369 return (t
& Disp8
) ? 1 : (t
& Disp32
) ? 2 : 0;
374 /* convert opcode suffix ('b' 'w' 'l' typically) into type specifier */
376 static INLINE
unsigned long
377 opcode_suffix_to_type (s
)
380 return (s
== BYTE_OPCODE_SUFFIX
381 ? Byte
: (s
== WORD_OPCODE_SUFFIX
383 } /* opcode_suffix_to_type() */
387 fits_in_signed_byte (num
)
390 return (num
>= -128) && (num
<= 127);
391 } /* fits_in_signed_byte() */
394 fits_in_unsigned_byte (num
)
397 return (num
& 0xff) == num
;
398 } /* fits_in_unsigned_byte() */
401 fits_in_unsigned_word (num
)
404 return (num
& 0xffff) == num
;
405 } /* fits_in_unsigned_word() */
408 fits_in_signed_word (num
)
411 return (-32768 <= num
) && (num
<= 32767);
412 } /* fits_in_signed_word() */
415 smallest_imm_type (num
)
419 /* This code is disabled because all the Imm1 forms in the opcode table
420 are slower on the i486, and they're the versions with the implicitly
421 specified single-position displacement, which has another syntax if
422 you really want to use that form. If you really prefer to have the
423 one-byte-shorter Imm1 form despite these problems, re-enable this
426 return Imm1
| Imm8
| Imm8S
| Imm16
| Imm32
;
428 return (fits_in_signed_byte (num
)
429 ? (Imm8S
| Imm8
| Imm16
| Imm32
)
430 : fits_in_unsigned_byte (num
)
431 ? (Imm8
| Imm16
| Imm32
)
432 : (fits_in_signed_word (num
) || fits_in_unsigned_word (num
))
435 } /* smallest_imm_type() */
438 check_prefix (prefix
)
443 for (q
= 0; q
< i
.prefixes
; q
++)
447 case CS_PREFIX_OPCODE
:
448 case DS_PREFIX_OPCODE
:
449 case ES_PREFIX_OPCODE
:
450 case FS_PREFIX_OPCODE
:
451 case GS_PREFIX_OPCODE
:
452 case SS_PREFIX_OPCODE
:
455 case CS_PREFIX_OPCODE
:
456 case DS_PREFIX_OPCODE
:
457 case ES_PREFIX_OPCODE
:
458 case FS_PREFIX_OPCODE
:
459 case GS_PREFIX_OPCODE
:
460 case SS_PREFIX_OPCODE
:
461 as_bad ("same type of prefix used twice");
472 as_bad ("same type of prefix used twice");
478 if (i
.wait_prefix
!= 0)
480 as_bad ("same type of prefix used twice");
486 if (i
.prefix
[q
] == prefix
)
488 as_bad ("same type of prefix used twice");
494 if (i
.prefixes
== MAX_PREFIXES
&& prefix
!= FWAIT_OPCODE
)
496 char *p
= "another"; /* paranoia */
499 q
< sizeof (i386_prefixtab
) / sizeof (i386_prefixtab
[0]);
501 if (i386_prefixtab
[q
].prefix_code
== prefix
)
502 p
= i386_prefixtab
[q
].prefix_name
;
504 as_bad ("%d prefixes given and `%%%s' prefix gives too many",
513 set_16bit_code_flag (new_16bit_code_flag
)
514 int new_16bit_code_flag
;
516 flag_16bit_code
= new_16bit_code_flag
;
519 const pseudo_typeS md_pseudo_table
[] =
524 #if !defined(OBJ_AOUT) && !defined(USE_ALIGN_PTWO)
525 {"align", s_align_bytes
, 0},
527 {"align", s_align_ptwo
, 0},
529 {"ffloat", float_cons
, 'f'},
530 {"dfloat", float_cons
, 'd'},
531 {"tfloat", float_cons
, 'x'},
533 {"noopt", s_ignore
, 0},
534 {"optim", s_ignore
, 0},
535 {"code16", set_16bit_code_flag
, 1},
536 {"code32", set_16bit_code_flag
, 0},
540 /* for interface with expression () */
541 extern char *input_line_pointer
;
543 /* obstack for constructing various things in md_begin */
546 /* hash table for opcode lookup */
547 static struct hash_control
*op_hash
;
548 /* hash table for register lookup */
549 static struct hash_control
*reg_hash
;
550 /* hash table for prefix lookup */
551 static struct hash_control
*prefix_hash
;
557 const char *hash_err
;
559 obstack_begin (&o
, 4096);
561 /* initialize op_hash hash table */
562 op_hash
= hash_new ();
565 register const template *optab
;
566 register templates
*core_optab
;
569 optab
= i386_optab
; /* setup for loop */
570 prev_name
= optab
->name
;
571 obstack_grow (&o
, optab
, sizeof (template));
572 core_optab
= (templates
*) xmalloc (sizeof (templates
));
574 for (optab
++; optab
< i386_optab_end
; optab
++)
576 if (!strcmp (optab
->name
, prev_name
))
578 /* same name as before --> append to current template list */
579 obstack_grow (&o
, optab
, sizeof (template));
583 /* different name --> ship out current template list;
584 add to hash table; & begin anew */
585 /* Note: end must be set before start! since obstack_next_free
586 changes upon opstack_finish */
587 core_optab
->end
= (template *) obstack_next_free (&o
);
588 core_optab
->start
= (template *) obstack_finish (&o
);
589 hash_err
= hash_insert (op_hash
, prev_name
, (char *) core_optab
);
593 as_fatal (_("Internal Error: Can't hash %s: %s"), prev_name
,
596 prev_name
= optab
->name
;
597 core_optab
= (templates
*) xmalloc (sizeof (templates
));
598 obstack_grow (&o
, optab
, sizeof (template));
603 /* initialize reg_hash hash table */
604 reg_hash
= hash_new ();
606 register const reg_entry
*regtab
;
608 for (regtab
= i386_regtab
; regtab
< i386_regtab_end
; regtab
++)
610 hash_err
= hash_insert (reg_hash
, regtab
->reg_name
, (PTR
) regtab
);
616 /* initialize reg_hash hash table */
617 prefix_hash
= hash_new ();
619 register const prefix_entry
*prefixtab
;
621 for (prefixtab
= i386_prefixtab
;
622 prefixtab
< i386_prefixtab_end
; prefixtab
++)
624 hash_err
= hash_insert (prefix_hash
, prefixtab
->prefix_name
,
631 /* fill in lexical tables: opcode_chars, operand_chars, space_chars */
636 for (c
= 0; c
< 256; c
++)
638 if (islower (c
) || isdigit (c
))
641 register_chars
[c
] = c
;
643 else if (isupper (c
))
645 opcode_chars
[c
] = tolower (c
);
646 register_chars
[c
] = opcode_chars
[c
];
648 else if (c
== PREFIX_SEPERATOR
)
652 else if (c
== ')' || c
== '(')
654 register_chars
[c
] = c
;
657 if (isupper (c
) || islower (c
) || isdigit (c
))
658 operand_chars
[c
] = c
;
660 if (isdigit (c
) || c
== '-')
663 if (isalpha (c
) || c
== '_' || c
== '.' || isdigit (c
))
664 identifier_chars
[c
] = c
;
667 identifier_chars
['@'] = '@';
670 if (c
== ' ' || c
== '\t')
674 for (p
= operand_special_chars
; *p
!= '\0'; p
++)
675 operand_chars
[(unsigned char) *p
] = *p
;
678 #if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
679 if (OUTPUT_FLAVOR
== bfd_target_elf_flavour
)
681 record_alignment (text_section
, 2);
682 record_alignment (data_section
, 2);
683 record_alignment (bss_section
, 2);
689 i386_print_statistics (file
)
692 hash_print_statistics (file
, "i386 opcode", op_hash
);
693 hash_print_statistics (file
, "i386 register", reg_hash
);
694 hash_print_statistics (file
, "i386 prefix", prefix_hash
);
700 /* debugging routines for md_assemble */
701 static void pi
PARAMS ((char *, i386_insn
*));
702 static void pte
PARAMS ((template *));
703 static void pt
PARAMS ((unsigned int));
704 static void pe
PARAMS ((expressionS
*));
705 static void ps
PARAMS ((symbolS
*));
712 register template *p
;
715 fprintf (stdout
, "%s: template ", line
);
717 fprintf (stdout
, " modrm: mode %x reg %x reg/mem %x",
718 x
->rm
.mode
, x
->rm
.reg
, x
->rm
.regmem
);
719 fprintf (stdout
, " base %x index %x scale %x\n",
720 x
->bi
.base
, x
->bi
.index
, x
->bi
.scale
);
721 for (i
= 0; i
< x
->operands
; i
++)
723 fprintf (stdout
, " #%d: ", i
+ 1);
725 fprintf (stdout
, "\n");
727 & (Reg
| SReg2
| SReg3
| Control
| Debug
| Test
| RegMMX
))
728 fprintf (stdout
, "%s\n", x
->regs
[i
]->reg_name
);
729 if (x
->types
[i
] & Imm
)
731 if (x
->types
[i
] & (Disp
| Abs
))
741 fprintf (stdout
, " %d operands ", t
->operands
);
742 fprintf (stdout
, "opcode %x ",
744 if (t
->extension_opcode
!= None
)
745 fprintf (stdout
, "ext %x ", t
->extension_opcode
);
746 if (t
->opcode_modifier
& D
)
747 fprintf (stdout
, "D");
748 if (t
->opcode_modifier
& W
)
749 fprintf (stdout
, "W");
750 fprintf (stdout
, "\n");
751 for (i
= 0; i
< t
->operands
; i
++)
753 fprintf (stdout
, " #%d type ", i
+ 1);
754 pt (t
->operand_types
[i
]);
755 fprintf (stdout
, "\n");
763 fprintf (stdout
, " operation %d\n", e
->X_op
);
764 fprintf (stdout
, " add_number %d (%x)\n",
765 e
->X_add_number
, e
->X_add_number
);
768 fprintf (stdout
, " add_symbol ");
769 ps (e
->X_add_symbol
);
770 fprintf (stdout
, "\n");
774 fprintf (stdout
, " op_symbol ");
776 fprintf (stdout
, "\n");
784 fprintf (stdout
, "%s type %s%s",
786 S_IS_EXTERNAL (s
) ? "EXTERNAL " : "",
787 segment_name (S_GET_SEGMENT (s
)));
808 { BaseIndex
, "BaseIndex" },
818 { InOutPortReg
, "InOutPortReg" },
819 { ShiftCount
, "ShiftCount" },
821 { Control
, "control reg" },
822 { Test
, "test reg" },
823 { Debug
, "debug reg" },
824 { FloatReg
, "FReg" },
825 { FloatAcc
, "FAcc" },
826 { JumpAbsolute
, "Jump Absolute" },
836 register struct type_name
*ty
;
840 fprintf (stdout
, _("Unknown"));
844 for (ty
= type_names
; ty
->mask
; ty
++)
846 fprintf (stdout
, "%s, ", ty
->tname
);
851 #endif /* DEBUG386 */
854 static bfd_reloc_code_real_type
855 reloc (size
, pcrel
, other
)
858 bfd_reloc_code_real_type other
;
860 if (other
!= NO_RELOC
) return other
;
865 case 1: return BFD_RELOC_8_PCREL
;
866 case 2: return BFD_RELOC_16_PCREL
;
867 case 4: return BFD_RELOC_32_PCREL
;
872 case 1: return BFD_RELOC_8
;
873 case 2: return BFD_RELOC_16
;
874 case 4: return BFD_RELOC_32
;
878 as_bad (_("Can not do %d byte pc-relative relocation"), size
);
880 as_bad (_("Can not do %d byte relocation"), size
);
882 return BFD_RELOC_NONE
;
886 * Here we decide which fixups can be adjusted to make them relative to
887 * the beginning of the section instead of the symbol. Basically we need
888 * to make sure that the dynamic relocations are done correctly, so in
889 * some cases we force the original symbol to be used.
892 tc_i386_fix_adjustable(fixP
)
896 /* Prevent all adjustments to global symbols. */
897 if (S_IS_EXTERN (fixP
->fx_addsy
))
899 if (S_IS_WEAK (fixP
->fx_addsy
))
901 #endif /* ! defined (OBJ_AOUT) */
902 /* adjust_reloc_syms doesn't know about the GOT */
903 if (fixP
->fx_r_type
== BFD_RELOC_386_GOTOFF
904 || fixP
->fx_r_type
== BFD_RELOC_386_PLT32
905 || fixP
->fx_r_type
== BFD_RELOC_386_GOT32
)
910 #define reloc(SIZE,PCREL,OTHER) 0
911 #define BFD_RELOC_32 0
912 #define BFD_RELOC_32_PCREL 0
913 #define BFD_RELOC_386_PLT32 0
914 #define BFD_RELOC_386_GOT32 0
915 #define BFD_RELOC_386_GOTOFF 0
918 /* This is the guts of the machine-dependent assembler. LINE points to a
919 machine dependent instruction. This function is supposed to emit
920 the frags/bytes it assembles to. */
926 /* Points to template once we've found it. */
929 /* Count the size of the instruction generated. */
934 /* Initialize globals. */
935 memset (&i
, '\0', sizeof (i
));
936 for (j
= 0; j
< MAX_OPERANDS
; j
++)
937 i
.disp_reloc
[j
] = NO_RELOC
;
938 memset (disp_expressions
, '\0', sizeof (disp_expressions
));
939 memset (im_expressions
, '\0', sizeof (im_expressions
));
940 save_stack_p
= save_stack
; /* reset stack pointer */
942 /* First parse an opcode & call i386_operand for the operands.
943 We assume that the scrubber has arranged it so that line[0] is the valid
944 start of a (possibly prefixed) opcode. */
948 /* 1 if operand is pending after ','. */
949 unsigned int expecting_operand
= 0;
950 /* Non-zero if we found a prefix only acceptable with string insns. */
951 const char *expecting_string_instruction
= NULL
;
952 /* Non-zero if operand parens not balanced. */
953 unsigned int paren_not_balanced
;
954 char *token_start
= l
;
956 while (!is_space_char (*l
) && *l
!= END_OF_INSN
)
958 if (!is_opcode_char (*l
))
960 as_bad (_("invalid character %s in opcode"), output_invalid (*l
));
963 else if (*l
!= PREFIX_SEPERATOR
)
965 *l
= opcode_chars
[(unsigned char) *l
]; /* fold case of opcodes */
970 /* This opcode's got a prefix. */
971 prefix_entry
*prefix
;
973 if (l
== token_start
)
975 as_bad (_("expecting prefix; got nothing"));
978 END_STRING_AND_SAVE (l
);
979 prefix
= (prefix_entry
*) hash_find (prefix_hash
, token_start
);
982 as_bad (_("no such opcode prefix `%s'"), token_start
);
983 RESTORE_END_STRING (l
);
986 RESTORE_END_STRING (l
);
987 /* check for repeated prefix */
988 if (! check_prefix (prefix
->prefix_code
))
990 if (prefix
->prefix_code
== FWAIT_OPCODE
)
992 i
.wait_prefix
= FWait
;
996 i
.prefix
[i
.prefixes
++] = prefix
->prefix_code
;
997 if (prefix
->prefix_code
== REPE
998 || prefix
->prefix_code
== REPNE
)
999 expecting_string_instruction
= prefix
->prefix_name
;
1001 /* Skip past PREFIX_SEPARATOR and reset token_start. */
1005 END_STRING_AND_SAVE (l
);
1006 if (token_start
== l
)
1008 as_bad (_("expecting opcode; got nothing"));
1009 RESTORE_END_STRING (l
);
1013 /* Lookup insn in hash; try intel & att naming conventions if appropriate;
1014 that is: we only use the opcode suffix 'b' 'w' or 'l' if we need to. */
1015 current_templates
= (templates
*) hash_find (op_hash
, token_start
);
1016 if (!current_templates
)
1018 int last_index
= strlen (token_start
) - 1;
1019 char last_char
= token_start
[last_index
];
1022 case DWORD_OPCODE_SUFFIX
:
1023 case WORD_OPCODE_SUFFIX
:
1024 case BYTE_OPCODE_SUFFIX
:
1025 token_start
[last_index
] = '\0';
1026 current_templates
= (templates
*) hash_find (op_hash
, token_start
);
1027 token_start
[last_index
] = last_char
;
1028 i
.suffix
= last_char
;
1030 if (!current_templates
)
1032 as_bad (_("no such 386 instruction: `%s'"), token_start
);
1033 RESTORE_END_STRING (l
);
1037 RESTORE_END_STRING (l
);
1039 /* check for rep/repne without a string instruction */
1040 if (expecting_string_instruction
&&
1041 !(current_templates
->start
->opcode_modifier
& IsString
))
1043 as_bad (_("expecting string instruction after `%s'"),
1044 expecting_string_instruction
);
1048 /* There may be operands to parse. */
1049 if (*l
!= END_OF_INSN
)
1051 /* parse operands */
1054 /* skip optional white space before operand */
1055 while (!is_operand_char (*l
) && *l
!= END_OF_INSN
)
1057 if (!is_space_char (*l
))
1059 as_bad (_("invalid character %s before operand %d"),
1060 output_invalid (*l
), i
.operands
);
1065 token_start
= l
; /* after white space */
1066 paren_not_balanced
= 0;
1067 while (paren_not_balanced
|| *l
!= ',')
1069 if (*l
== END_OF_INSN
)
1071 if (paren_not_balanced
)
1073 as_bad (_("unbalanced parenthesis in operand %d."),
1078 break; /* we are done */
1080 else if (!is_operand_char (*l
) && !is_space_char (*l
))
1082 as_bad (_("invalid character %s in operand %d"),
1083 output_invalid (*l
), i
.operands
);
1087 ++paren_not_balanced
;
1089 --paren_not_balanced
;
1092 if (l
!= token_start
)
1093 { /* yes, we've read in another operand */
1094 unsigned int operand_ok
;
1095 this_operand
= i
.operands
++;
1096 if (i
.operands
> MAX_OPERANDS
)
1098 as_bad (_("spurious operands; (%d operands/instruction max)"),
1102 /* now parse operand adding info to 'i' as we go along */
1103 END_STRING_AND_SAVE (l
);
1104 operand_ok
= i386_operand (token_start
);
1105 RESTORE_END_STRING (l
); /* restore old contents */
1111 if (expecting_operand
)
1113 expecting_operand_after_comma
:
1114 as_bad (_("expecting operand after ','; got nothing"));
1119 as_bad (_("expecting operand before ','; got nothing"));
1124 /* now *l must be either ',' or END_OF_INSN */
1127 if (*++l
== END_OF_INSN
)
1128 { /* just skip it, if it's \n complain */
1129 goto expecting_operand_after_comma
;
1131 expecting_operand
= 1;
1134 while (*l
!= END_OF_INSN
); /* until we get end of insn */
1138 /* Now we've parsed the opcode into a set of templates, and have the
1141 Next, we find a template that matches the given insn,
1142 making sure the overlap of the given operands types is consistent
1143 with the template operand types. */
1145 #define MATCH(overlap,given_type) \
1147 && ((overlap & (JumpAbsolute|BaseIndex|Mem8)) \
1148 == (given_type & (JumpAbsolute|BaseIndex|Mem8))))
1150 /* If m0 and m1 are register matches they must be consistent
1151 with the expected operand types t0 and t1.
1152 That is, if both m0 & m1 are register matches
1153 i.e. ( ((m0 & (Reg)) && (m1 & (Reg)) ) ?
1154 then, either 1. or 2. must be true:
1155 1. the expected operand type register overlap is null:
1156 (t0 & t1 & Reg) == 0
1158 the given register overlap is null:
1159 (m0 & m1 & Reg) == 0
1160 2. the expected operand type register overlap == the given
1161 operand type overlap: (t0 & t1 & m0 & m1 & Reg).
1163 #define CONSISTENT_REGISTER_MATCH(m0, m1, t0, t1) \
1164 ( ((m0 & (Reg)) && (m1 & (Reg))) ? \
1165 ( ((t0 & t1 & (Reg)) == 0 && (m0 & m1 & (Reg)) == 0) || \
1166 ((t0 & t1) & (m0 & m1) & (Reg)) \
1169 register unsigned int overlap0
, overlap1
;
1171 unsigned int overlap2
;
1172 unsigned int found_reverse_match
;
1174 overlap0
= overlap1
= overlap2
= found_reverse_match
= 0;
1175 for (t
= current_templates
->start
;
1176 t
< current_templates
->end
;
1179 /* must have right number of operands */
1180 if (i
.operands
!= t
->operands
)
1182 else if (!t
->operands
)
1183 break; /* 0 operands always matches */
1185 overlap0
= i
.types
[0] & t
->operand_types
[0];
1186 switch (t
->operands
)
1189 if (!MATCH (overlap0
, i
.types
[0]))
1194 overlap1
= i
.types
[1] & t
->operand_types
[1];
1195 if (!MATCH (overlap0
, i
.types
[0]) ||
1196 !MATCH (overlap1
, i
.types
[1]) ||
1197 !CONSISTENT_REGISTER_MATCH (overlap0
, overlap1
,
1198 t
->operand_types
[0],
1199 t
->operand_types
[1]))
1202 /* check if other direction is valid ... */
1203 if (!(t
->opcode_modifier
& COMES_IN_BOTH_DIRECTIONS
))
1206 /* try reversing direction of operands */
1207 overlap0
= i
.types
[0] & t
->operand_types
[1];
1208 overlap1
= i
.types
[1] & t
->operand_types
[0];
1209 if (!MATCH (overlap0
, i
.types
[0]) ||
1210 !MATCH (overlap1
, i
.types
[1]) ||
1211 !CONSISTENT_REGISTER_MATCH (overlap0
, overlap1
,
1212 t
->operand_types
[1],
1213 t
->operand_types
[0]))
1215 /* does not match either direction */
1218 /* found a reverse match here -- slip through */
1219 /* found_reverse_match holds which of D or FloatD we've found */
1220 found_reverse_match
= t
->opcode_modifier
& COMES_IN_BOTH_DIRECTIONS
;
1221 } /* endif: not forward match */
1222 /* found either forward/reverse 2 operand match here */
1223 if (t
->operands
== 3)
1225 overlap2
= i
.types
[2] & t
->operand_types
[2];
1226 if (!MATCH (overlap2
, i
.types
[2]) ||
1227 !CONSISTENT_REGISTER_MATCH (overlap0
, overlap2
,
1228 t
->operand_types
[0],
1229 t
->operand_types
[2]) ||
1230 !CONSISTENT_REGISTER_MATCH (overlap1
, overlap2
,
1231 t
->operand_types
[1],
1232 t
->operand_types
[2]))
1235 /* found either forward/reverse 2 or 3 operand match here:
1236 slip through to break */
1238 break; /* we've found a match; break out of loop */
1239 } /* for (t = ... */
1240 if (t
== current_templates
->end
)
1241 { /* we found no match */
1242 as_bad (_("suffix or operands invalid for `%s'"),
1243 current_templates
->start
->name
);
1247 /* Copy the template we found. */
1249 i
.tm
.opcode_modifier
|= i
.wait_prefix
;
1251 if (found_reverse_match
)
1253 i
.tm
.operand_types
[0] = t
->operand_types
[1];
1254 i
.tm
.operand_types
[1] = t
->operand_types
[0];
1257 /* Check string instruction segment overrides */
1258 if ((i
.tm
.opcode_modifier
& IsString
) != 0 && i
.mem_operands
!= 0)
1260 int mem_op
= (i
.types
[0] & Mem
) ? 0 : 1;
1261 if ((i
.tm
.operand_types
[mem_op
] & EsSeg
) != 0)
1263 if (i
.seg
[0] != (seg_entry
*) 0 && i
.seg
[0] != (seg_entry
*) &es
)
1265 as_bad ("`%s' operand %d must use `%%es' segment",
1269 /* There's only ever one segment override allowed per instruction.
1270 This instruction possibly has a legal segment override on the
1271 second operand, so copy the segment to where non-string
1272 instructions store it, allowing common code. */
1273 i
.seg
[0] = i
.seg
[1];
1275 else if ((i
.tm
.operand_types
[mem_op
+ 1] & EsSeg
) != 0)
1277 if (i
.seg
[1] != (seg_entry
*) 0 && i
.seg
[1] != (seg_entry
*) &es
)
1279 as_bad ("`%s' operand %d must use `%%es' segment",
1280 i
.tm
.name
, mem_op
+ 1);
1286 /* If the matched instruction specifies an explicit opcode suffix,
1287 use it - and make sure none has already been specified. */
1288 if (i
.tm
.opcode_modifier
& (Data16
|Data32
))
1292 as_bad (_("extraneous opcode suffix given"));
1295 if (i
.tm
.opcode_modifier
& Data16
)
1296 i
.suffix
= WORD_OPCODE_SUFFIX
;
1298 i
.suffix
= DWORD_OPCODE_SUFFIX
;
1301 /* If there's no opcode suffix we try to invent one based on register
1303 if (!i
.suffix
&& i
.reg_operands
)
1305 /* We take i.suffix from the LAST register operand specified. This
1306 assumes that the last register operands is the destination register
1309 for (op
= 0; op
< MAX_OPERANDS
; op
++)
1310 if (i
.types
[op
] & Reg
)
1312 i
.suffix
= ((i
.types
[op
] & Reg8
) ? BYTE_OPCODE_SUFFIX
:
1313 (i
.types
[op
] & Reg16
) ? WORD_OPCODE_SUFFIX
:
1314 DWORD_OPCODE_SUFFIX
);
1317 else if (i
.suffix
!= 0
1318 && i
.reg_operands
!= 0
1319 && (i
.types
[i
.operands
- 1] & Reg
) != 0)
1323 /* If the last operand is a register, make sure it is
1324 compatible with the suffix. */
1331 case BYTE_OPCODE_SUFFIX
:
1332 /* If this is an eight bit register, it's OK. If it's the
1333 16 or 32 bit version of an eight bit register, we will
1334 just use the low portion, and that's OK too. */
1335 if ((i
.types
[i
.operands
- 1] & Reg8
) == 0
1336 && i
.regs
[i
.operands
- 1]->reg_num
>= 4)
1339 case WORD_OPCODE_SUFFIX
:
1340 case DWORD_OPCODE_SUFFIX
:
1341 /* We don't insist on the presence or absence of the e
1342 prefix on the register, but we reject eight bit
1344 if ((i
.types
[i
.operands
- 1] & Reg8
) != 0)
1348 as_bad (_("register does not match opcode suffix"));
1351 /* Make still unresolved immediate matches conform to size of immediate
1352 given in i.suffix. Note: overlap2 cannot be an immediate!
1354 if ((overlap0
& (Imm8
| Imm8S
| Imm16
| Imm32
))
1355 && overlap0
!= Imm8
&& overlap0
!= Imm8S
1356 && overlap0
!= Imm16
&& overlap0
!= Imm32
)
1360 as_bad (_("no opcode suffix given; can't determine immediate size"));
1363 overlap0
&= (i
.suffix
== BYTE_OPCODE_SUFFIX
? (Imm8
| Imm8S
) :
1364 (i
.suffix
== WORD_OPCODE_SUFFIX
? Imm16
: Imm32
));
1366 if ((overlap1
& (Imm8
| Imm8S
| Imm16
| Imm32
))
1367 && overlap1
!= Imm8
&& overlap1
!= Imm8S
1368 && overlap1
!= Imm16
&& overlap1
!= Imm32
)
1372 as_bad (_("no opcode suffix given; can't determine immediate size"));
1375 overlap1
&= (i
.suffix
== BYTE_OPCODE_SUFFIX
? (Imm8
| Imm8S
) :
1376 (i
.suffix
== WORD_OPCODE_SUFFIX
? Imm16
: Imm32
));
1379 i
.types
[0] = overlap0
;
1380 i
.types
[1] = overlap1
;
1381 i
.types
[2] = overlap2
;
1383 if (overlap0
& ImplicitRegister
)
1385 if (overlap1
& ImplicitRegister
)
1387 if (overlap2
& ImplicitRegister
)
1389 if (overlap0
& Imm1
)
1390 i
.imm_operands
= 0; /* kludge for shift insns */
1392 /* Finalize opcode. First, we change the opcode based on the operand
1393 size given by i.suffix: we never have to change things for byte insns,
1394 or when no opcode suffix is need to size the operands. */
1396 if (!i
.suffix
&& (i
.tm
.opcode_modifier
& W
))
1398 as_bad (_("no opcode suffix given and no register operands; can't size instruction"));
1402 if (i
.suffix
&& i
.suffix
!= BYTE_OPCODE_SUFFIX
)
1404 /* Select between byte and word/dword operations. */
1405 if (i
.tm
.opcode_modifier
& W
)
1406 i
.tm
.base_opcode
|= W
;
1407 /* Now select between word & dword operations via the operand
1409 if ((i
.suffix
== WORD_OPCODE_SUFFIX
) ^ flag_16bit_code
)
1411 if (! check_prefix (WORD_PREFIX_OPCODE
))
1413 i
.prefix
[i
.prefixes
++] = WORD_PREFIX_OPCODE
;
1417 /* For insns with operands there are more diddles to do to the opcode. */
1420 /* Default segment register this instruction will use
1421 for memory accesses. 0 means unknown.
1422 This is only for optimizing out unnecessary segment overrides. */
1423 const seg_entry
*default_seg
= 0;
1425 /* True if this instruction uses a memory addressing mode,
1426 and therefore may need an address-size prefix. */
1427 int uses_mem_addrmode
= 0;
1430 /* If we found a reverse match we must alter the opcode direction bit
1431 found_reverse_match holds bit to set (different for int &
1434 i
.tm
.base_opcode
^= found_reverse_match
;
1436 /* The imul $imm, %reg instruction is converted into
1437 imul $imm, %reg, %reg, and the clr %reg instruction
1438 is converted into xor %reg, %reg. */
1439 if (i
.tm
.opcode_modifier
& regKludge
)
1441 unsigned int first_reg_op
= (i
.types
[0] & Reg
) ? 0 : 1;
1442 /* Pretend we saw the extra register operand. */
1443 i
.regs
[first_reg_op
+1] = i
.regs
[first_reg_op
];
1447 if (i
.tm
.opcode_modifier
& ShortForm
)
1449 /* The register or float register operand is in operand 0 or 1. */
1450 unsigned int op
= (i
.types
[0] & (Reg
| FloatReg
)) ? 0 : 1;
1451 /* Register goes in low 3 bits of opcode. */
1452 i
.tm
.base_opcode
|= i
.regs
[op
]->reg_num
;
1454 else if (i
.tm
.opcode_modifier
& ShortFormW
)
1456 /* Short form with 0x8 width bit. Register is always dest. operand */
1457 i
.tm
.base_opcode
|= i
.regs
[1]->reg_num
;
1458 if (i
.suffix
== WORD_OPCODE_SUFFIX
||
1459 i
.suffix
== DWORD_OPCODE_SUFFIX
)
1460 i
.tm
.base_opcode
|= 0x8;
1462 else if (i
.tm
.opcode_modifier
& Modrm
)
1464 /* The opcode is completed (modulo i.tm.extension_opcode which
1465 must be put into the modrm byte).
1466 Now, we make the modrm & index base bytes based on all the
1467 info we've collected. */
1469 /* i.reg_operands MUST be the number of real register operands;
1470 implicit registers do not count. */
1471 if (i
.reg_operands
== 2)
1473 unsigned int source
, dest
;
1474 source
= ((i
.types
[0]
1485 /* Certain instructions expect the destination to be
1486 in the i.rm.reg field. This is by far the
1487 exceptional case. For these instructions, if the
1488 source operand is a register, we must reverse the
1489 i.rm.reg and i.rm.regmem fields. We accomplish
1490 this by pretending that the two register operands
1491 were given in the reverse order. */
1492 if (i
.tm
.opcode_modifier
& ReverseRegRegmem
)
1494 reg_entry
*tmp
= i
.regs
[source
];
1495 i
.regs
[source
] = i
.regs
[dest
];
1500 /* We must be careful to make sure that all
1501 segment/control/test/debug/MMX registers go into
1502 the i.rm.reg field (despite whether they are
1503 source or destination operands). */
1504 if (i
.regs
[dest
]->reg_type
1505 & (SReg2
| SReg3
| Control
| Debug
| Test
| RegMMX
))
1507 i
.rm
.reg
= i
.regs
[dest
]->reg_num
;
1508 i
.rm
.regmem
= i
.regs
[source
]->reg_num
;
1512 i
.rm
.reg
= i
.regs
[source
]->reg_num
;
1513 i
.rm
.regmem
= i
.regs
[dest
]->reg_num
;
1517 { /* if it's not 2 reg operands... */
1520 unsigned int fake_zero_displacement
= 0;
1521 unsigned int op
= ((i
.types
[0] & Mem
)
1523 : (i
.types
[1] & Mem
) ? 1 : 2);
1530 if (! i
.disp_operands
)
1531 fake_zero_displacement
= 1;
1534 /* Operand is just <disp> */
1535 i
.rm
.regmem
= NO_BASE_REGISTER
;
1536 i
.types
[op
] &= ~Disp
;
1537 i
.types
[op
] |= Disp32
;
1541 i
.bi
.index
= i
.index_reg
->reg_num
;
1542 i
.bi
.base
= NO_BASE_REGISTER
;
1543 i
.bi
.scale
= i
.log2_scale_factor
;
1544 i
.rm
.regmem
= ESCAPE_TO_TWO_BYTE_ADDRESSING
;
1545 i
.types
[op
] &= ~Disp
;
1546 i
.types
[op
] |= Disp32
; /* Must be 32 bit */
1549 else /* i.base_reg */
1551 i
.rm
.regmem
= i
.base_reg
->reg_num
;
1552 i
.bi
.base
= i
.base_reg
->reg_num
;
1553 if (i
.base_reg
->reg_num
== EBP_REG_NUM
)
1556 if (i
.disp_operands
== 0)
1558 fake_zero_displacement
= 1;
1559 i
.types
[op
] |= Disp8
;
1562 else if (i
.base_reg
->reg_num
== ESP_REG_NUM
)
1566 i
.bi
.scale
= i
.log2_scale_factor
;
1569 /* <disp>(%esp) becomes two byte modrm
1570 with no index register. We've already
1571 stored the code for esp in i.rm.regmem
1572 ie. ESCAPE_TO_TWO_BYTE_ADDRESSING. Any
1573 base register besides %esp will not use
1574 the extra modrm byte. */
1575 i
.bi
.index
= NO_INDEX_REGISTER
;
1576 #if ! SCALE1_WHEN_NO_INDEX
1577 /* Another case where we force the second
1579 if (i
.log2_scale_factor
)
1580 i
.rm
.regmem
= ESCAPE_TO_TWO_BYTE_ADDRESSING
;
1585 i
.bi
.index
= i
.index_reg
->reg_num
;
1586 i
.rm
.regmem
= ESCAPE_TO_TWO_BYTE_ADDRESSING
;
1588 i
.rm
.mode
= mode_from_disp_size (i
.types
[op
]);
1591 if (fake_zero_displacement
)
1593 /* Fakes a zero displacement assuming that i.types[op]
1594 holds the correct displacement size. */
1595 exp
= &disp_expressions
[i
.disp_operands
++];
1597 exp
->X_op
= O_constant
;
1598 exp
->X_add_number
= 0;
1599 exp
->X_add_symbol
= (symbolS
*) 0;
1600 exp
->X_op_symbol
= (symbolS
*) 0;
1604 /* Fill in i.rm.reg or i.rm.regmem field with register
1605 operand (if any) based on i.tm.extension_opcode.
1606 Again, we must be careful to make sure that
1607 segment/control/debug/test/MMX registers are coded
1608 into the i.rm.reg field. */
1613 & (Reg
| SReg2
| SReg3
| Control
| Debug
1617 & (Reg
| SReg2
| SReg3
| Control
| Debug
1621 /* If there is an extension opcode to put here, the
1622 register number must be put into the regmem field. */
1623 if (i
.tm
.extension_opcode
!= None
)
1624 i
.rm
.regmem
= i
.regs
[op
]->reg_num
;
1626 i
.rm
.reg
= i
.regs
[op
]->reg_num
;
1628 /* Now, if no memory operand has set i.rm.mode = 0, 1, 2
1629 we must set it to 3 to indicate this is a register
1630 operand in the regmem field. */
1631 if (!i
.mem_operands
)
1635 /* Fill in i.rm.reg field with extension opcode (if any). */
1636 if (i
.tm
.extension_opcode
!= None
)
1637 i
.rm
.reg
= i
.tm
.extension_opcode
;
1641 uses_mem_addrmode
= 1;
1643 else if (i
.tm
.opcode_modifier
& Seg2ShortForm
)
1645 if (i
.tm
.base_opcode
== POP_SEG_SHORT
&& i
.regs
[0]->reg_num
== 1)
1647 as_bad ("you can't `pop %%cs' on the 386.");
1650 i
.tm
.base_opcode
|= (i
.regs
[0]->reg_num
<< 3);
1652 else if (i
.tm
.opcode_modifier
& Seg3ShortForm
)
1654 /* 'push %fs' is 0x0fa0; 'pop %fs' is 0x0fa1.
1655 'push %gs' is 0x0fa8; 'pop %fs' is 0x0fa9.
1656 So, only if i.regs[0]->reg_num == 5 (%gs) do we need
1657 to change the opcode. */
1658 if (i
.regs
[0]->reg_num
== 5)
1659 i
.tm
.base_opcode
|= 0x08;
1661 else if ((i
.tm
.base_opcode
& ~DW
) == MOV_AX_DISP32
)
1663 /* This is a special non-modrm instruction
1664 that addresses memory with a 32-bit displacement mode anyway,
1665 and thus requires an address-size prefix if in 16-bit mode. */
1666 uses_mem_addrmode
= 1;
1669 else if ((i
.tm
.opcode_modifier
& IsString
) != 0)
1671 /* For the string instructions that allow a segment override
1672 on one of their operands, the default segment is ds. */
1676 /* GAS currently doesn't support 16-bit memory addressing modes at all,
1677 so if we're writing 16-bit code and using a memory addressing mode,
1678 always spew out an address size prefix. */
1679 if (uses_mem_addrmode
&& flag_16bit_code
)
1681 if (! check_prefix (ADDR_PREFIX_OPCODE
))
1683 i
.prefix
[i
.prefixes
++] = ADDR_PREFIX_OPCODE
;
1686 /* If a segment was explicitly specified,
1687 and the specified segment is not the default,
1688 use an opcode prefix to select it.
1689 If we never figured out what the default segment is,
1690 then default_seg will be zero at this point,
1691 and the specified segment prefix will always be used. */
1692 if ((i
.seg
[0]) && (i
.seg
[0] != default_seg
))
1694 if (! check_prefix (i
.seg
[0]->seg_prefix
))
1696 i
.prefix
[i
.prefixes
++] = i
.seg
[0]->seg_prefix
;
1701 /* Handle conversion of 'int $3' --> special int3 insn. */
1702 if (i
.tm
.base_opcode
== INT_OPCODE
&& i
.imms
[0]->X_add_number
== 3)
1704 i
.tm
.base_opcode
= INT3_OPCODE
;
1708 /* We are ready to output the insn. */
1713 if (i
.tm
.opcode_modifier
& Jump
)
1715 unsigned long n
= i
.disps
[0]->X_add_number
;
1717 if (i
.prefixes
!= 0)
1718 as_warn ("skipping prefixes on this instruction");
1720 if (i
.disps
[0]->X_op
== O_constant
)
1722 if (fits_in_signed_byte (n
))
1726 p
[0] = i
.tm
.base_opcode
;
1730 { /* It's an absolute word/dword displacement. */
1732 /* Use 16-bit jumps only for 16-bit code,
1733 because text segments are limited to 64K anyway;
1734 Use 32-bit jumps for 32-bit code, because they're faster,
1735 and a 16-bit jump will clear the top 16 bits of %eip. */
1736 int jmp_size
= flag_16bit_code
? 2 : 4;
1737 if (flag_16bit_code
&& !fits_in_signed_word (n
))
1739 as_bad (_("16-bit jump out of range"));
1743 if (i
.tm
.base_opcode
== JUMP_PC_RELATIVE
)
1745 /* unconditional jump */
1746 p
= frag_more (1 + jmp_size
);
1747 insn_size
+= 1 + jmp_size
;
1749 md_number_to_chars (&p
[1], (valueT
) n
, jmp_size
);
1753 /* conditional jump */
1754 p
= frag_more (2 + jmp_size
);
1755 insn_size
+= 2 + jmp_size
;
1756 p
[0] = TWO_BYTE_OPCODE_ESCAPE
;
1757 p
[1] = i
.tm
.base_opcode
+ 0x10;
1758 md_number_to_chars (&p
[2], (valueT
) n
, jmp_size
);
1764 if (flag_16bit_code
)
1766 FRAG_APPEND_1_CHAR (WORD_PREFIX_OPCODE
);
1770 /* It's a symbol; end frag & setup for relax.
1771 Make sure there are more than 6 chars left in the current frag;
1772 if not we'll have to start a new one. */
1776 p
[0] = i
.tm
.base_opcode
;
1777 frag_var (rs_machine_dependent
,
1778 6, /* 2 opcode/prefix + 4 displacement */
1780 ((unsigned char) *p
== JUMP_PC_RELATIVE
1781 ? ENCODE_RELAX_STATE (UNCOND_JUMP
, BYTE
)
1782 : ENCODE_RELAX_STATE (COND_JUMP
, BYTE
)),
1783 i
.disps
[0]->X_add_symbol
,
1787 else if (i
.tm
.opcode_modifier
& (JumpByte
| JumpDword
))
1789 int size
= (i
.tm
.opcode_modifier
& JumpByte
) ? 1 : 4;
1790 unsigned long n
= i
.disps
[0]->X_add_number
;
1793 /* The jcx/jecx instruction might need a data size prefix. */
1794 for (q
= i
.prefix
; q
< i
.prefix
+ i
.prefixes
; q
++)
1796 if (*q
== WORD_PREFIX_OPCODE
)
1798 /* The jcxz/jecxz instructions are marked with Data16
1799 and Data32, which means that they may get
1800 WORD_PREFIX_OPCODE added to the list of prefixes.
1801 However, the are correctly distinguished using
1802 ADDR_PREFIX_OPCODE. Here we look for
1803 WORD_PREFIX_OPCODE, and actually emit
1804 ADDR_PREFIX_OPCODE. This is a hack, but, then, so
1805 is the instruction itself.
1807 If an explicit suffix is used for the loop
1808 instruction, that actually controls whether we use
1809 cx vs. ecx. This is also controlled by
1812 I don't know if there is any valid case in which we
1813 want to emit WORD_PREFIX_OPCODE, but I am keeping
1814 the old behaviour for safety. */
1816 if (IS_JUMP_ON_CX_ZERO (i
.tm
.base_opcode
)
1817 || IS_LOOP_ECX_TIMES (i
.tm
.base_opcode
))
1818 FRAG_APPEND_1_CHAR (ADDR_PREFIX_OPCODE
);
1820 FRAG_APPEND_1_CHAR (WORD_PREFIX_OPCODE
);
1826 if ((size
== 4) && (flag_16bit_code
))
1828 FRAG_APPEND_1_CHAR (WORD_PREFIX_OPCODE
);
1832 if (fits_in_unsigned_byte (i
.tm
.base_opcode
))
1834 FRAG_APPEND_1_CHAR (i
.tm
.base_opcode
);
1839 p
= frag_more (2); /* opcode can be at most two bytes */
1841 /* put out high byte first: can't use md_number_to_chars! */
1842 *p
++ = (i
.tm
.base_opcode
>> 8) & 0xff;
1843 *p
= i
.tm
.base_opcode
& 0xff;
1846 p
= frag_more (size
);
1848 if (i
.disps
[0]->X_op
== O_constant
)
1850 md_number_to_chars (p
, (valueT
) n
, size
);
1851 if (size
== 1 && !fits_in_signed_byte (n
))
1853 as_bad (_("loop/jecx only takes byte displacement; %lu shortened to %d"),
1859 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
, size
,
1860 i
.disps
[0], 1, reloc (size
, 1, i
.disp_reloc
[0]));
1864 else if (i
.tm
.opcode_modifier
& JumpInterSegment
)
1866 if (i
.prefixes
!= 0)
1867 as_warn ("skipping prefixes on this instruction");
1869 if (flag_16bit_code
)
1871 FRAG_APPEND_1_CHAR (WORD_PREFIX_OPCODE
);
1875 p
= frag_more (1 + 2 + 4); /* 1 opcode; 2 segment; 4 offset */
1876 insn_size
+= 1 + 2 + 4;
1877 p
[0] = i
.tm
.base_opcode
;
1878 if (i
.imms
[1]->X_op
== O_constant
)
1879 md_number_to_chars (p
+ 1, (valueT
) i
.imms
[1]->X_add_number
, 4);
1881 fix_new_exp (frag_now
, p
+ 1 - frag_now
->fr_literal
, 4,
1882 i
.imms
[1], 0, BFD_RELOC_32
);
1883 if (i
.imms
[0]->X_op
!= O_constant
)
1884 as_bad (_("can't handle non absolute segment in long call/jmp"));
1885 md_number_to_chars (p
+ 5, (valueT
) i
.imms
[0]->X_add_number
, 2);
1889 /* Output normal instructions here. */
1892 /* Hack for fwait. It must come before any prefixes, as it
1893 really is an instruction rather than a prefix. */
1894 if ((i
.tm
.opcode_modifier
& FWait
) != 0)
1898 md_number_to_chars (p
, (valueT
) FWAIT_OPCODE
, 1);
1901 /* The prefix bytes. */
1902 for (q
= i
.prefix
; q
< i
.prefix
+ i
.prefixes
; q
++)
1906 md_number_to_chars (p
, (valueT
) *q
, 1);
1909 /* Now the opcode; be careful about word order here! */
1910 if (fits_in_unsigned_byte (i
.tm
.base_opcode
))
1912 FRAG_APPEND_1_CHAR (i
.tm
.base_opcode
);
1915 else if (fits_in_unsigned_word (i
.tm
.base_opcode
))
1919 /* put out high byte first: can't use md_number_to_chars! */
1920 *p
++ = (i
.tm
.base_opcode
>> 8) & 0xff;
1921 *p
= i
.tm
.base_opcode
& 0xff;
1924 { /* opcode is either 3 or 4 bytes */
1925 if (i
.tm
.base_opcode
& 0xff000000)
1929 *p
++ = (i
.tm
.base_opcode
>> 24) & 0xff;
1936 *p
++ = (i
.tm
.base_opcode
>> 16) & 0xff;
1937 *p
++ = (i
.tm
.base_opcode
>> 8) & 0xff;
1938 *p
= (i
.tm
.base_opcode
) & 0xff;
1941 /* Now the modrm byte and base index byte (if present). */
1942 if (i
.tm
.opcode_modifier
& Modrm
)
1946 /* md_number_to_chars (p, i.rm, 1); */
1947 md_number_to_chars (p
,
1948 (valueT
) (i
.rm
.regmem
<< 0
1952 /* If i.rm.regmem == ESP (4) && i.rm.mode != Mode 3 (Register mode)
1953 ==> need second modrm byte. */
1954 if (i
.rm
.regmem
== ESCAPE_TO_TWO_BYTE_ADDRESSING
1959 /* md_number_to_chars (p, i.bi, 1); */
1960 md_number_to_chars (p
, (valueT
) (i
.bi
.base
<< 0
1967 if (i
.disp_operands
)
1969 register unsigned int n
;
1971 for (n
= 0; n
< i
.operands
; n
++)
1975 if (i
.disps
[n
]->X_op
== O_constant
)
1977 if (i
.types
[n
] & (Disp8
| Abs8
))
1981 md_number_to_chars (p
,
1982 (valueT
) i
.disps
[n
]->X_add_number
,
1985 else if (i
.types
[n
] & (Disp16
| Abs16
))
1989 md_number_to_chars (p
,
1990 (valueT
) i
.disps
[n
]->X_add_number
,
1994 { /* Disp32|Abs32 */
1997 md_number_to_chars (p
,
1998 (valueT
) i
.disps
[n
]->X_add_number
,
2003 { /* not absolute_section */
2004 /* need a 32-bit fixup (don't support 8bit non-absolute disps) */
2007 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
, 4,
2009 TC_RELOC(i
.disp_reloc
[n
], BFD_RELOC_32
));
2013 } /* end displacement output */
2015 /* output immediate */
2018 register unsigned int n
;
2020 for (n
= 0; n
< i
.operands
; n
++)
2024 if (i
.imms
[n
]->X_op
== O_constant
)
2026 if (i
.types
[n
] & (Imm8
| Imm8S
))
2030 md_number_to_chars (p
,
2031 (valueT
) i
.imms
[n
]->X_add_number
,
2034 else if (i
.types
[n
] & Imm16
)
2038 md_number_to_chars (p
,
2039 (valueT
) i
.imms
[n
]->X_add_number
,
2046 md_number_to_chars (p
,
2047 (valueT
) i
.imms
[n
]->X_add_number
,
2052 { /* not absolute_section */
2053 /* Need a 32-bit fixup (don't support 8bit
2054 non-absolute ims). Try to support other
2060 if (i
.types
[n
] & (Imm8
| Imm8S
))
2062 else if (i
.types
[n
] & Imm16
)
2066 r_type
= reloc (size
, 0, i
.disp_reloc
[0]);
2067 p
= frag_more (size
);
2069 #ifdef BFD_ASSEMBLER
2070 if (r_type
== BFD_RELOC_32
2072 && GOT_symbol
== i
.imms
[n
]->X_add_symbol
2073 && (i
.imms
[n
]->X_op
== O_symbol
2074 || (i
.imms
[n
]->X_op
== O_add
2075 && (i
.imms
[n
]->X_op_symbol
->sy_value
.X_op
2078 r_type
= BFD_RELOC_386_GOTPC
;
2079 i
.imms
[n
]->X_add_number
+= 3;
2082 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
, size
,
2083 i
.imms
[n
], pcrel
, r_type
);
2087 } /* end immediate output */
2095 #endif /* DEBUG386 */
2099 /* Parse OPERAND_STRING into the i386_insn structure I. Returns non-zero
2103 i386_operand (operand_string
)
2104 char *operand_string
;
2106 register char *op_string
= operand_string
;
2108 /* Address of '\0' at end of operand_string. */
2109 char *end_of_operand_string
= operand_string
+ strlen (operand_string
);
2111 /* Start and end of displacement string expression (if found). */
2112 char *displacement_string_start
= NULL
;
2113 char *displacement_string_end
= NULL
;
2115 /* We check for an absolute prefix (differentiating,
2116 for example, 'jmp pc_relative_label' from 'jmp *absolute_label'. */
2117 if (*op_string
== ABSOLUTE_PREFIX
)
2120 i
.types
[this_operand
] |= JumpAbsolute
;
2123 /* Check if operand is a register. */
2124 if (*op_string
== REGISTER_PREFIX
)
2126 register reg_entry
*r
;
2127 if (!(r
= parse_register (op_string
)))
2129 as_bad (_("bad register name `%s'"), op_string
);
2132 /* Check for segment override, rather than segment register by
2133 searching for ':' after %<x>s where <x> = s, c, d, e, f, g. */
2134 if ((r
->reg_type
& (SReg2
| SReg3
)) && op_string
[3] == ':')
2139 i
.seg
[i
.mem_operands
] = (seg_entry
*) & es
;
2142 i
.seg
[i
.mem_operands
] = (seg_entry
*) & cs
;
2145 i
.seg
[i
.mem_operands
] = (seg_entry
*) & ss
;
2148 i
.seg
[i
.mem_operands
] = (seg_entry
*) & ds
;
2151 i
.seg
[i
.mem_operands
] = (seg_entry
*) & fs
;
2154 i
.seg
[i
.mem_operands
] = (seg_entry
*) & gs
;
2157 op_string
+= 4; /* skip % <x> s : */
2158 operand_string
= op_string
; /* Pretend given string starts here. */
2159 if (!is_digit_char (*op_string
) && !is_identifier_char (*op_string
)
2160 && *op_string
!= '(' && *op_string
!= ABSOLUTE_PREFIX
)
2162 as_bad (_("bad memory operand `%s'"), op_string
);
2165 /* Handle case of %es:*foo. */
2166 if (*op_string
== ABSOLUTE_PREFIX
)
2169 i
.types
[this_operand
] |= JumpAbsolute
;
2171 goto do_memory_reference
;
2173 i
.types
[this_operand
] |= r
->reg_type
& ~BaseIndex
;
2174 i
.regs
[this_operand
] = r
;
2177 else if (*op_string
== IMMEDIATE_PREFIX
)
2178 { /* ... or an immediate */
2179 char *save_input_line_pointer
;
2183 if (i
.imm_operands
== MAX_IMMEDIATE_OPERANDS
)
2185 as_bad (_("only 1 or 2 immediate operands are allowed"));
2189 exp
= &im_expressions
[i
.imm_operands
++];
2190 i
.imms
[this_operand
] = exp
;
2191 save_input_line_pointer
= input_line_pointer
;
2192 input_line_pointer
= ++op_string
; /* must advance op_string! */
2194 exp_seg
= expression (exp
);
2195 if (*input_line_pointer
!= '\0')
2197 /* This should be as_bad, but some versions of gcc, up to
2198 about 2.8 and egcs 1.01, generate a bogus @GOTOFF(%ebx)
2199 in certain cases. Oddly, the code in question turns out
2200 to work correctly anyhow, so we make this just a warning
2201 until those versions of gcc are obsolete. */
2202 as_warn (_("unrecognized characters `%s' in expression"),
2203 input_line_pointer
);
2205 input_line_pointer
= save_input_line_pointer
;
2207 if (exp
->X_op
== O_absent
)
2209 /* missing or bad expr becomes absolute 0 */
2210 as_bad (_("missing or invalid immediate expression `%s' taken as 0"),
2212 exp
->X_op
= O_constant
;
2213 exp
->X_add_number
= 0;
2214 exp
->X_add_symbol
= (symbolS
*) 0;
2215 exp
->X_op_symbol
= (symbolS
*) 0;
2216 i
.types
[this_operand
] |= Imm
;
2218 else if (exp
->X_op
== O_constant
)
2220 i
.types
[this_operand
] |=
2221 smallest_imm_type ((unsigned long) exp
->X_add_number
);
2224 else if (exp_seg
!= text_section
2225 && exp_seg
!= data_section
2226 && exp_seg
!= bss_section
2227 && exp_seg
!= undefined_section
2228 #ifdef BFD_ASSEMBLER
2229 && ! bfd_is_com_section (exp_seg
)
2234 as_bad (_("Unimplemented segment type %d in parse_operand"), exp_seg
);
2240 /* this is an address ==> 32bit */
2241 i
.types
[this_operand
] |= Imm32
;
2243 /* shorten this type of this operand if the instruction wants
2244 * fewer bits than are present in the immediate. The bit field
2245 * code can put out 'andb $0xffffff, %al', for example. pace
2246 * also 'movw $foo,(%eax)'
2250 case WORD_OPCODE_SUFFIX
:
2251 i
.types
[this_operand
] |= Imm16
;
2253 case BYTE_OPCODE_SUFFIX
:
2254 i
.types
[this_operand
] |= Imm16
| Imm8
| Imm8S
;
2258 else if (is_digit_char (*op_string
) || is_identifier_char (*op_string
)
2259 || *op_string
== '(')
2261 /* This is a memory reference of some sort. */
2262 register char *base_string
;
2263 int found_base_index_form
;
2265 do_memory_reference
:
2266 if ((i
.mem_operands
== 1
2267 && (current_templates
->start
->opcode_modifier
& IsString
) == 0)
2268 || i
.mem_operands
== 2)
2270 as_bad (_("too many memory references for `%s'"),
2271 current_templates
->start
->name
);
2275 /* Determine type of memory operand from opcode_suffix;
2276 no opcode suffix implies general memory references. */
2279 case BYTE_OPCODE_SUFFIX
:
2280 i
.types
[this_operand
] |= Mem8
;
2282 case WORD_OPCODE_SUFFIX
:
2283 i
.types
[this_operand
] |= Mem16
;
2285 case DWORD_OPCODE_SUFFIX
:
2287 i
.types
[this_operand
] |= Mem32
;
2290 /* Check for base index form. We detect the base index form by
2291 looking for an ')' at the end of the operand, searching
2292 for the '(' matching it, and finding a REGISTER_PREFIX or ','
2294 base_string
= end_of_operand_string
- 1;
2295 found_base_index_form
= 0;
2296 if (*base_string
== ')')
2298 unsigned int parens_balanced
= 1;
2299 /* We've already checked that the number of left & right ()'s are
2300 equal, so this loop will not be infinite. */
2304 if (*base_string
== ')')
2306 if (*base_string
== '(')
2309 while (parens_balanced
);
2310 base_string
++; /* Skip past '('. */
2311 if (*base_string
== REGISTER_PREFIX
|| *base_string
== ',')
2312 found_base_index_form
= 1;
2315 /* If we can't parse a base index register expression, we've found
2316 a pure displacement expression. We set up displacement_string_start
2317 and displacement_string_end for the code below. */
2318 if (!found_base_index_form
)
2320 displacement_string_start
= op_string
;
2321 displacement_string_end
= end_of_operand_string
;
2325 char *base_reg_name
, *index_reg_name
, *num_string
;
2328 i
.types
[this_operand
] |= BaseIndex
;
2330 /* If there is a displacement set-up for it to be parsed later. */
2331 if (base_string
!= op_string
+ 1)
2333 displacement_string_start
= op_string
;
2334 displacement_string_end
= base_string
- 1;
2337 /* Find base register (if any). */
2338 if (*base_string
!= ',')
2340 base_reg_name
= base_string
++;
2341 /* skip past register name & parse it */
2342 while (isalpha (*base_string
))
2344 if (base_string
== base_reg_name
+ 1)
2346 as_bad (_("can't find base register name after `(%c'"),
2350 END_STRING_AND_SAVE (base_string
);
2351 if (!(i
.base_reg
= parse_register (base_reg_name
)))
2353 as_bad (_("bad base register name `%s'"), base_reg_name
);
2354 RESTORE_END_STRING (base_string
);
2357 RESTORE_END_STRING (base_string
);
2360 /* Now check seperator; must be ',' ==> index reg
2361 OR num ==> no index reg. just scale factor
2362 OR ')' ==> end. (scale factor = 1) */
2363 if (*base_string
!= ',' && *base_string
!= ')')
2365 as_bad (_("expecting `,' or `)' after base register in `%s'"),
2370 /* There may index reg here; and there may be a scale factor. */
2371 if (*base_string
== ',' && *(base_string
+ 1) == REGISTER_PREFIX
)
2373 index_reg_name
= ++base_string
;
2374 while (isalpha (*++base_string
));
2375 END_STRING_AND_SAVE (base_string
);
2376 if (!(i
.index_reg
= parse_register (index_reg_name
)))
2378 as_bad (_("bad index register name `%s'"), index_reg_name
);
2379 RESTORE_END_STRING (base_string
);
2382 RESTORE_END_STRING (base_string
);
2385 /* Check for scale factor. */
2386 if (*base_string
== ',' && isdigit (*(base_string
+ 1)))
2388 num_string
= ++base_string
;
2389 while (is_digit_char (*base_string
))
2391 if (base_string
== num_string
)
2393 as_bad (_("can't find a scale factor after `,'"));
2396 END_STRING_AND_SAVE (base_string
);
2397 /* We've got a scale factor. */
2398 if (!sscanf (num_string
, "%d", &num
))
2400 as_bad (_("can't parse scale factor from `%s'"), num_string
);
2401 RESTORE_END_STRING (base_string
);
2404 RESTORE_END_STRING (base_string
);
2406 { /* must be 1 digit scale */
2408 i
.log2_scale_factor
= 0;
2411 i
.log2_scale_factor
= 1;
2414 i
.log2_scale_factor
= 2;
2417 i
.log2_scale_factor
= 3;
2420 as_bad (_("expecting scale factor of 1, 2, 4, 8; got %d"), num
);
2423 if (num
!= 1 && ! i
.index_reg
)
2425 as_warn (_("scale factor of %d without an index register"),
2427 #if SCALE1_WHEN_NO_INDEX
2428 i
.log2_scale_factor
= 0;
2434 if (!i
.index_reg
&& *base_string
== ',')
2436 as_bad (_("expecting index register or scale factor after `,'; got '%c'"),
2437 *(base_string
+ 1));
2443 /* If there's an expression begining the operand, parse it,
2444 assuming displacement_string_start and displacement_string_end
2446 if (displacement_string_start
)
2448 register expressionS
*exp
;
2450 char *save_input_line_pointer
;
2451 exp
= &disp_expressions
[i
.disp_operands
];
2452 i
.disps
[this_operand
] = exp
;
2453 i
.disp_reloc
[this_operand
] = NO_RELOC
;
2455 save_input_line_pointer
= input_line_pointer
;
2456 input_line_pointer
= displacement_string_start
;
2457 END_STRING_AND_SAVE (displacement_string_end
);
2462 * We can have operands of the form
2463 * <symbol>@GOTOFF+<nnn>
2464 * Take the easy way out here and copy everything
2465 * into a temporary buffer...
2469 cp
= strchr (input_line_pointer
, '@');
2474 if (GOT_symbol
== NULL
)
2475 GOT_symbol
= symbol_find_or_make (GLOBAL_OFFSET_TABLE_NAME
);
2477 tmpbuf
= (char *) alloca ((cp
- input_line_pointer
) + 20);
2479 if (strncmp (cp
+ 1, "PLT", 3) == 0)
2481 i
.disp_reloc
[this_operand
] = BFD_RELOC_386_PLT32
;
2483 strcpy (tmpbuf
, input_line_pointer
);
2484 strcat (tmpbuf
, cp
+ 1 + 3);
2487 else if (strncmp (cp
+ 1, "GOTOFF", 6) == 0)
2489 i
.disp_reloc
[this_operand
] = BFD_RELOC_386_GOTOFF
;
2491 strcpy (tmpbuf
, input_line_pointer
);
2492 strcat (tmpbuf
, cp
+ 1 + 6);
2495 else if (strncmp (cp
+ 1, "GOT", 3) == 0)
2497 i
.disp_reloc
[this_operand
] = BFD_RELOC_386_GOT32
;
2499 strcpy (tmpbuf
, input_line_pointer
);
2500 strcat (tmpbuf
, cp
+ 1 + 3);
2504 as_bad (_("Bad reloc specifier `%s' in expression"), cp
+ 1);
2506 input_line_pointer
= tmpbuf
;
2511 exp_seg
= expression (exp
);
2513 #ifdef BFD_ASSEMBLER
2514 /* We do this to make sure that the section symbol is in
2515 the symbol table. We will ultimately change the relocation
2516 to be relative to the beginning of the section */
2517 if (i
.disp_reloc
[this_operand
] == BFD_RELOC_386_GOTOFF
)
2519 if (S_IS_LOCAL(exp
->X_add_symbol
)
2520 && S_GET_SEGMENT (exp
->X_add_symbol
) != undefined_section
)
2521 section_symbol(exp
->X_add_symbol
->bsym
->section
);
2522 assert (exp
->X_op
== O_symbol
);
2523 exp
->X_op
= O_subtract
;
2524 exp
->X_op_symbol
= GOT_symbol
;
2525 i
.disp_reloc
[this_operand
] = BFD_RELOC_32
;
2529 if (*input_line_pointer
)
2530 as_bad (_("Ignoring junk `%s' after expression"),
2531 input_line_pointer
);
2532 RESTORE_END_STRING (displacement_string_end
);
2533 input_line_pointer
= save_input_line_pointer
;
2534 if (exp
->X_op
== O_absent
)
2536 /* missing expr becomes absolute 0 */
2537 as_bad (_("missing or invalid displacement `%s' taken as 0"),
2539 i
.types
[this_operand
] |= (Disp
| Abs
);
2540 exp
->X_op
= O_constant
;
2541 exp
->X_add_number
= 0;
2542 exp
->X_add_symbol
= (symbolS
*) 0;
2543 exp
->X_op_symbol
= (symbolS
*) 0;
2545 else if (exp
->X_op
== O_constant
)
2547 i
.types
[this_operand
] |= SMALLEST_DISP_TYPE (exp
->X_add_number
);
2549 else if (exp_seg
== text_section
2550 || exp_seg
== data_section
2551 || exp_seg
== bss_section
2552 || exp_seg
== undefined_section
)
2554 i
.types
[this_operand
] |= Disp32
;
2559 i
.types
[this_operand
] |= Disp32
;
2561 goto seg_unimplemented
;
2566 /* Special case for (%dx) while doing input/output op. */
2568 i
.base_reg
->reg_type
== (Reg16
| InOutPortReg
) &&
2570 i
.log2_scale_factor
== 0 &&
2571 i
.seg
[i
.mem_operands
] == 0)
2573 i
.types
[this_operand
] = InOutPortReg
;
2576 /* Make sure the memory operand we've been dealt is valid. */
2577 if ((i
.base_reg
&& (i
.base_reg
->reg_type
& BaseIndex
) == 0)
2578 || (i
.index_reg
&& ((i
.index_reg
->reg_type
& BaseIndex
) == 0
2579 || i
.index_reg
->reg_num
== ESP_REG_NUM
))
2580 || (i
.base_reg
&& i
.index_reg
2581 && (i
.base_reg
->reg_type
& i
.index_reg
->reg_type
& Reg
) == 0))
2583 as_bad (_("`%s' is not a valid base/index expression"),
2590 { /* it's not a memory operand; argh! */
2591 as_bad (_("invalid char %s begining operand %d `%s'"),
2592 output_invalid (*op_string
), this_operand
,
2596 return 1; /* normal return */
2600 * md_estimate_size_before_relax()
2602 * Called just before relax().
2603 * Any symbol that is now undefined will not become defined.
2604 * Return the correct fr_subtype in the frag.
2605 * Return the initial "guess for fr_var" to caller.
2606 * The guess for fr_var is ACTUALLY the growth beyond fr_fix.
2607 * Whatever we do to grow fr_fix or fr_var contributes to our returned value.
2608 * Although it may not be explicit in the frag, pretend fr_var starts with a
2612 md_estimate_size_before_relax (fragP
, segment
)
2613 register fragS
*fragP
;
2614 register segT segment
;
2616 register unsigned char *opcode
;
2617 register int old_fr_fix
;
2619 old_fr_fix
= fragP
->fr_fix
;
2620 opcode
= (unsigned char *) fragP
->fr_opcode
;
2621 /* We've already got fragP->fr_subtype right; all we have to do is check
2622 for un-relaxable symbols. */
2623 if (S_GET_SEGMENT (fragP
->fr_symbol
) != segment
)
2625 /* symbol is undefined in this segment */
2628 case JUMP_PC_RELATIVE
: /* make jmp (0xeb) a dword displacement jump */
2629 opcode
[0] = 0xe9; /* dword disp jmp */
2631 fix_new (fragP
, old_fr_fix
, 4,
2633 fragP
->fr_offset
, 1,
2634 (GOT_symbol
&& /* Not quite right - we should switch on
2635 presence of @PLT, but I cannot see how
2636 to get to that from here. We should have
2637 done this in md_assemble to really
2638 get it right all of the time, but I
2639 think it does not matter that much, as
2640 this will be right most of the time. ERY*/
2641 S_GET_SEGMENT(fragP
->fr_symbol
) == undefined_section
)?
2642 BFD_RELOC_386_PLT32
: BFD_RELOC_32_PCREL
);
2646 /* This changes the byte-displacement jump 0x7N -->
2647 the dword-displacement jump 0x0f8N */
2648 opcode
[1] = opcode
[0] + 0x10;
2649 opcode
[0] = TWO_BYTE_OPCODE_ESCAPE
; /* two-byte escape */
2650 fragP
->fr_fix
+= 1 + 4; /* we've added an opcode byte */
2651 fix_new (fragP
, old_fr_fix
+ 1, 4,
2653 fragP
->fr_offset
, 1,
2654 (GOT_symbol
&& /* Not quite right - we should switch on
2655 presence of @PLT, but I cannot see how
2656 to get to that from here. ERY */
2657 S_GET_SEGMENT(fragP
->fr_symbol
) == undefined_section
)?
2658 BFD_RELOC_386_PLT32
: BFD_RELOC_32_PCREL
);
2663 return (fragP
->fr_var
+ fragP
->fr_fix
- old_fr_fix
);
2664 } /* md_estimate_size_before_relax() */
2667 * md_convert_frag();
2669 * Called after relax() is finished.
2670 * In: Address of frag.
2671 * fr_type == rs_machine_dependent.
2672 * fr_subtype is what the address relaxed to.
2674 * Out: Any fixSs and constants are set up.
2675 * Caller will turn frag into a ".space 0".
2677 #ifndef BFD_ASSEMBLER
2679 md_convert_frag (headers
, sec
, fragP
)
2680 object_headers
*headers
;
2682 register fragS
*fragP
;
2685 md_convert_frag (abfd
, sec
, fragP
)
2688 register fragS
*fragP
;
2691 register unsigned char *opcode
;
2692 unsigned char *where_to_put_displacement
= NULL
;
2693 unsigned int target_address
;
2694 unsigned int opcode_address
;
2695 unsigned int extension
= 0;
2696 int displacement_from_opcode_start
;
2698 opcode
= (unsigned char *) fragP
->fr_opcode
;
2700 /* Address we want to reach in file space. */
2701 target_address
= S_GET_VALUE (fragP
->fr_symbol
) + fragP
->fr_offset
;
2702 #ifdef BFD_ASSEMBLER /* not needed otherwise? */
2703 target_address
+= fragP
->fr_symbol
->sy_frag
->fr_address
;
2706 /* Address opcode resides at in file space. */
2707 opcode_address
= fragP
->fr_address
+ fragP
->fr_fix
;
2709 /* Displacement from opcode start to fill into instruction. */
2710 displacement_from_opcode_start
= target_address
- opcode_address
;
2712 switch (fragP
->fr_subtype
)
2714 case ENCODE_RELAX_STATE (COND_JUMP
, BYTE
):
2715 case ENCODE_RELAX_STATE (UNCOND_JUMP
, BYTE
):
2716 /* don't have to change opcode */
2717 extension
= 1; /* 1 opcode + 1 displacement */
2718 where_to_put_displacement
= &opcode
[1];
2721 case ENCODE_RELAX_STATE (COND_JUMP
, WORD
):
2722 opcode
[1] = TWO_BYTE_OPCODE_ESCAPE
;
2723 opcode
[2] = opcode
[0] + 0x10;
2724 opcode
[0] = WORD_PREFIX_OPCODE
;
2725 extension
= 4; /* 3 opcode + 2 displacement */
2726 where_to_put_displacement
= &opcode
[3];
2729 case ENCODE_RELAX_STATE (UNCOND_JUMP
, WORD
):
2731 opcode
[0] = WORD_PREFIX_OPCODE
;
2732 extension
= 3; /* 2 opcode + 2 displacement */
2733 where_to_put_displacement
= &opcode
[2];
2736 case ENCODE_RELAX_STATE (COND_JUMP
, DWORD
):
2737 opcode
[1] = opcode
[0] + 0x10;
2738 opcode
[0] = TWO_BYTE_OPCODE_ESCAPE
;
2739 extension
= 5; /* 2 opcode + 4 displacement */
2740 where_to_put_displacement
= &opcode
[2];
2743 case ENCODE_RELAX_STATE (UNCOND_JUMP
, DWORD
):
2745 extension
= 4; /* 1 opcode + 4 displacement */
2746 where_to_put_displacement
= &opcode
[1];
2750 BAD_CASE (fragP
->fr_subtype
);
2753 /* now put displacement after opcode */
2754 md_number_to_chars ((char *) where_to_put_displacement
,
2755 (valueT
) (displacement_from_opcode_start
- extension
),
2756 SIZE_FROM_RELAX_STATE (fragP
->fr_subtype
));
2757 fragP
->fr_fix
+= extension
;
2761 int md_short_jump_size
= 2; /* size of byte displacement jmp */
2762 int md_long_jump_size
= 5; /* size of dword displacement jmp */
2763 const int md_reloc_size
= 8; /* Size of relocation record */
2766 md_create_short_jump (ptr
, from_addr
, to_addr
, frag
, to_symbol
)
2768 addressT from_addr
, to_addr
;
2774 offset
= to_addr
- (from_addr
+ 2);
2775 md_number_to_chars (ptr
, (valueT
) 0xeb, 1); /* opcode for byte-disp jump */
2776 md_number_to_chars (ptr
+ 1, (valueT
) offset
, 1);
2780 md_create_long_jump (ptr
, from_addr
, to_addr
, frag
, to_symbol
)
2782 addressT from_addr
, to_addr
;
2788 if (flag_do_long_jump
)
2790 offset
= to_addr
- S_GET_VALUE (to_symbol
);
2791 md_number_to_chars (ptr
, (valueT
) 0xe9, 1);/* opcode for long jmp */
2792 md_number_to_chars (ptr
+ 1, (valueT
) offset
, 4);
2793 fix_new (frag
, (ptr
+ 1) - frag
->fr_literal
, 4,
2794 to_symbol
, (offsetT
) 0, 0, BFD_RELOC_32
);
2798 offset
= to_addr
- (from_addr
+ 5);
2799 md_number_to_chars (ptr
, (valueT
) 0xe9, 1);
2800 md_number_to_chars (ptr
+ 1, (valueT
) offset
, 4);
2804 /* Apply a fixup (fixS) to segment data, once it has been determined
2805 by our caller that we have all the info we need to fix it up.
2807 On the 386, immediates, displacements, and data pointers are all in
2808 the same (little-endian) format, so we don't need to care about which
2812 md_apply_fix3 (fixP
, valp
, seg
)
2813 fixS
*fixP
; /* The fix we're to put in. */
2814 valueT
*valp
; /* Pointer to the value of the bits. */
2815 segT seg
; /* Segment fix is from. */
2817 register char *p
= fixP
->fx_where
+ fixP
->fx_frag
->fr_literal
;
2818 valueT value
= *valp
;
2820 if (fixP
->fx_r_type
== BFD_RELOC_32
&& fixP
->fx_pcrel
)
2821 fixP
->fx_r_type
= BFD_RELOC_32_PCREL
;
2823 #if defined (BFD_ASSEMBLER) && !defined (TE_Mach)
2825 * This is a hack. There should be a better way to
2828 if (fixP
->fx_r_type
== BFD_RELOC_32_PCREL
&& fixP
->fx_addsy
)
2831 if (OUTPUT_FLAVOR
== bfd_target_elf_flavour
2832 || OUTPUT_FLAVOR
== bfd_target_coff_flavour
)
2833 value
+= fixP
->fx_where
+ fixP
->fx_frag
->fr_address
;
2835 #if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
2836 if (OUTPUT_FLAVOR
== bfd_target_elf_flavour
2837 && (S_GET_SEGMENT (fixP
->fx_addsy
) == seg
2838 || (fixP
->fx_addsy
->bsym
->flags
& BSF_SECTION_SYM
) != 0)
2839 && ! S_IS_EXTERNAL (fixP
->fx_addsy
)
2840 && ! S_IS_WEAK (fixP
->fx_addsy
)
2841 && S_IS_DEFINED (fixP
->fx_addsy
)
2842 && ! S_IS_COMMON (fixP
->fx_addsy
))
2844 /* Yes, we add the values in twice. This is because
2845 bfd_perform_relocation subtracts them out again. I think
2846 bfd_perform_relocation is broken, but I don't dare change
2848 value
+= fixP
->fx_where
+ fixP
->fx_frag
->fr_address
;
2851 #if defined (OBJ_COFF) && defined (TE_PE)
2852 /* For some reason, the PE format does not store a section
2853 address offset for a PC relative symbol. */
2854 if (S_GET_SEGMENT (fixP
->fx_addsy
) != seg
)
2855 value
+= md_pcrel_from (fixP
);
2859 /* Fix a few things - the dynamic linker expects certain values here,
2860 and we must not dissappoint it. */
2861 #if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
2862 if (OUTPUT_FLAVOR
== bfd_target_elf_flavour
2864 switch(fixP
->fx_r_type
) {
2865 case BFD_RELOC_386_PLT32
:
2866 /* Make the jump instruction point to the address of the operand. At
2867 runtime we merely add the offset to the actual PLT entry. */
2870 case BFD_RELOC_386_GOTPC
:
2872 * This is tough to explain. We end up with this one if we have
2873 * operands that look like "_GLOBAL_OFFSET_TABLE_+[.-.L284]". The goal
2874 * here is to obtain the absolute address of the GOT, and it is strongly
2875 * preferable from a performance point of view to avoid using a runtime
2876 * relocation for this. The actual sequence of instructions often look
2882 * addl $_GLOBAL_OFFSET_TABLE_+[.-.L66],%ebx
2884 * The call and pop essentially return the absolute address of
2885 * the label .L66 and store it in %ebx. The linker itself will
2886 * ultimately change the first operand of the addl so that %ebx points to
2887 * the GOT, but to keep things simple, the .o file must have this operand
2888 * set so that it generates not the absolute address of .L66, but the
2889 * absolute address of itself. This allows the linker itself simply
2890 * treat a GOTPC relocation as asking for a pcrel offset to the GOT to be
2891 * added in, and the addend of the relocation is stored in the operand
2892 * field for the instruction itself.
2894 * Our job here is to fix the operand so that it would add the correct
2895 * offset so that %ebx would point to itself. The thing that is tricky is
2896 * that .-.L66 will point to the beginning of the instruction, so we need
2897 * to further modify the operand so that it will point to itself.
2898 * There are other cases where you have something like:
2900 * .long $_GLOBAL_OFFSET_TABLE_+[.-.L66]
2902 * and here no correction would be required. Internally in the assembler
2903 * we treat operands of this form as not being pcrel since the '.' is
2904 * explicitly mentioned, and I wonder whether it would simplify matters
2905 * to do it this way. Who knows. In earlier versions of the PIC patches,
2906 * the pcrel_adjust field was used to store the correction, but since the
2907 * expression is not pcrel, I felt it would be confusing to do it this way.
2911 case BFD_RELOC_386_GOT32
:
2912 value
= 0; /* Fully resolved at runtime. No addend. */
2914 case BFD_RELOC_386_GOTOFF
:
2923 md_number_to_chars (p
, value
, fixP
->fx_size
);
2929 /* This is never used. */
2930 long /* Knows about the byte order in a word. */
2931 md_chars_to_number (con
, nbytes
)
2932 unsigned char con
[]; /* Low order byte 1st. */
2933 int nbytes
; /* Number of bytes in the input. */
2936 for (retval
= 0, con
+= nbytes
- 1; nbytes
--; con
--)
2938 retval
<<= BITS_PER_CHAR
;
2946 #define MAX_LITTLENUMS 6
2948 /* Turn the string pointed to by litP into a floating point constant of type
2949 type, and emit the appropriate bytes. The number of LITTLENUMS emitted
2950 is stored in *sizeP . An error message is returned, or NULL on OK. */
2952 md_atof (type
, litP
, sizeP
)
2958 LITTLENUM_TYPE words
[MAX_LITTLENUMS
];
2959 LITTLENUM_TYPE
*wordP
;
2981 return _("Bad call to md_atof ()");
2983 t
= atof_ieee (input_line_pointer
, type
, words
);
2985 input_line_pointer
= t
;
2987 *sizeP
= prec
* sizeof (LITTLENUM_TYPE
);
2988 /* This loops outputs the LITTLENUMs in REVERSE order; in accord with
2989 the bigendian 386. */
2990 for (wordP
= words
+ prec
- 1; prec
--;)
2992 md_number_to_chars (litP
, (valueT
) (*wordP
--), sizeof (LITTLENUM_TYPE
));
2993 litP
+= sizeof (LITTLENUM_TYPE
);
2998 char output_invalid_buf
[8];
3005 sprintf (output_invalid_buf
, "'%c'", c
);
3007 sprintf (output_invalid_buf
, "(0x%x)", (unsigned) c
);
3008 return output_invalid_buf
;
3011 /* reg_string starts *before* REGISTER_PREFIX */
3013 parse_register (reg_string
)
3016 register char *s
= reg_string
;
3018 char reg_name_given
[MAX_REG_NAME_SIZE
];
3020 s
++; /* skip REGISTER_PREFIX */
3021 for (p
= reg_name_given
; is_register_char (*s
); p
++, s
++)
3023 *p
= register_chars
[(unsigned char) *s
];
3024 if (p
>= reg_name_given
+ MAX_REG_NAME_SIZE
)
3025 return (reg_entry
*) 0;
3028 return (reg_entry
*) hash_find (reg_hash
, reg_name_given
);
3032 CONST
char *md_shortopts
= "kmVQ:";
3034 CONST
char *md_shortopts
= "m";
3036 struct option md_longopts
[] = {
3037 {NULL
, no_argument
, NULL
, 0}
3039 size_t md_longopts_size
= sizeof(md_longopts
);
3042 md_parse_option (c
, arg
)
3049 flag_do_long_jump
= 1;
3052 #if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
3053 /* -k: Ignore for FreeBSD compatibility. */
3057 /* -V: SVR4 argument to print version ID. */
3059 print_version_id ();
3062 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
3063 should be emitted or not. FIXME: Not implemented. */
3075 md_show_usage (stream
)
3078 fprintf (stream
, _("\
3079 -m do long jump\n"));
3082 #ifdef BFD_ASSEMBLER
3083 #ifdef OBJ_MAYBE_ELF
3084 #ifdef OBJ_MAYBE_COFF
3086 /* Pick the target format to use. */
3089 i386_target_format ()
3091 switch (OUTPUT_FLAVOR
)
3093 case bfd_target_coff_flavour
:
3095 case bfd_target_elf_flavour
:
3096 return "elf32-i386";
3103 #endif /* OBJ_MAYBE_COFF */
3104 #endif /* OBJ_MAYBE_ELF */
3105 #endif /* BFD_ASSEMBLER */
3109 md_undefined_symbol (name
)
3112 if (*name
== '_' && *(name
+1) == 'G'
3113 && strcmp(name
, GLOBAL_OFFSET_TABLE_NAME
) == 0)
3117 if(symbol_find(name
))
3118 as_bad(_("GOT already in symbol table"));
3119 GOT_symbol
= symbol_new (name
, undefined_section
,
3120 (valueT
) 0, &zero_address_frag
);
3127 /* Round up a section size to the appropriate boundary. */
3129 md_section_align (segment
, size
)
3134 #ifdef BFD_ASSEMBLER
3135 /* For a.out, force the section size to be aligned. If we don't do
3136 this, BFD will align it for us, but it will not write out the
3137 final bytes of the section. This may be a bug in BFD, but it is
3138 easier to fix it here since that is how the other a.out targets
3142 align
= bfd_get_section_alignment (stdoutput
, segment
);
3143 size
= ((size
+ (1 << align
) - 1) & ((valueT
) -1 << align
));
3150 /* Exactly what point is a PC-relative offset relative TO? On the
3151 i386, they're relative to the address of the offset, plus its
3152 size. (??? Is this right? FIXME-SOON!) */
3154 md_pcrel_from (fixP
)
3157 return fixP
->fx_size
+ fixP
->fx_where
+ fixP
->fx_frag
->fr_address
;
3168 temp
= get_absolute_expression ();
3169 subseg_set (bss_section
, (subsegT
) temp
);
3170 demand_empty_rest_of_line ();
3176 #ifdef BFD_ASSEMBLER
3179 i386_validate_fix (fixp
)
3182 if (fixp
->fx_subsy
&& fixp
->fx_subsy
== GOT_symbol
)
3184 fixp
->fx_r_type
= BFD_RELOC_386_GOTOFF
;
3189 #define F(SZ,PCREL) (((SZ) << 1) + (PCREL))
3190 #define MAP(SZ,PCREL,TYPE) case F(SZ,PCREL): code = (TYPE); break
3193 tc_gen_reloc (section
, fixp
)
3198 bfd_reloc_code_real_type code
;
3200 switch(fixp
->fx_r_type
)
3202 case BFD_RELOC_386_PLT32
:
3203 case BFD_RELOC_386_GOT32
:
3204 case BFD_RELOC_386_GOTOFF
:
3205 case BFD_RELOC_386_GOTPC
:
3207 code
= fixp
->fx_r_type
;
3210 switch (F (fixp
->fx_size
, fixp
->fx_pcrel
))
3212 MAP (1, 0, BFD_RELOC_8
);
3213 MAP (2, 0, BFD_RELOC_16
);
3214 MAP (4, 0, BFD_RELOC_32
);
3215 MAP (1, 1, BFD_RELOC_8_PCREL
);
3216 MAP (2, 1, BFD_RELOC_16_PCREL
);
3217 MAP (4, 1, BFD_RELOC_32_PCREL
);
3220 as_bad (_("Can not do %d byte pc-relative relocation"),
3223 as_bad (_("Can not do %d byte relocation"), fixp
->fx_size
);
3229 if (code
== BFD_RELOC_32
3231 && fixp
->fx_addsy
== GOT_symbol
)
3232 code
= BFD_RELOC_386_GOTPC
;
3234 rel
= (arelent
*) xmalloc (sizeof (arelent
));
3235 rel
->sym_ptr_ptr
= &fixp
->fx_addsy
->bsym
;
3236 rel
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
3238 rel
->addend
= fixp
->fx_addnumber
;
3242 rel
->howto
= bfd_reloc_type_lookup (stdoutput
, code
);
3243 if (rel
->howto
== NULL
)
3245 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
3246 _("Cannot represent relocation type %s"),
3247 bfd_get_reloc_code_name (code
));
3248 /* Set howto to a garbage value so that we can keep going. */
3249 rel
->howto
= bfd_reloc_type_lookup (stdoutput
, BFD_RELOC_32
);
3250 assert (rel
->howto
!= NULL
);
3256 #else /* ! BFD_ASSEMBLER */
3258 #if (defined(OBJ_AOUT) | defined(OBJ_BOUT))
3260 tc_aout_fix_to_chars (where
, fixP
, segment_address_in_file
)
3263 relax_addressT segment_address_in_file
;
3266 * In: length of relocation (or of address) in chars: 1, 2 or 4.
3267 * Out: GNU LD relocation length code: 0, 1, or 2.
3270 static const unsigned char nbytes_r_length
[] = {42, 0, 1, 42, 2};
3273 know (fixP
->fx_addsy
!= NULL
);
3275 md_number_to_chars (where
,
3276 (valueT
) (fixP
->fx_frag
->fr_address
3277 + fixP
->fx_where
- segment_address_in_file
),
3280 r_symbolnum
= (S_IS_DEFINED (fixP
->fx_addsy
)
3281 ? S_GET_TYPE (fixP
->fx_addsy
)
3282 : fixP
->fx_addsy
->sy_number
);
3284 where
[6] = (r_symbolnum
>> 16) & 0x0ff;
3285 where
[5] = (r_symbolnum
>> 8) & 0x0ff;
3286 where
[4] = r_symbolnum
& 0x0ff;
3287 where
[7] = ((((!S_IS_DEFINED (fixP
->fx_addsy
)) << 3) & 0x08)
3288 | ((nbytes_r_length
[fixP
->fx_size
] << 1) & 0x06)
3289 | (((fixP
->fx_pcrel
<< 0) & 0x01) & 0x0f));
3292 #endif /* OBJ_AOUT or OBJ_BOUT */
3294 #if defined (I386COFF)
3297 tc_coff_fix2rtype (fixP
)
3300 if (fixP
->fx_r_type
== R_IMAGEBASE
)
3303 return (fixP
->fx_pcrel
?
3304 (fixP
->fx_size
== 1 ? R_PCRBYTE
:
3305 fixP
->fx_size
== 2 ? R_PCRWORD
:
3307 (fixP
->fx_size
== 1 ? R_RELBYTE
:
3308 fixP
->fx_size
== 2 ? R_RELWORD
:
3313 tc_coff_sizemachdep (frag
)
3317 return (frag
->fr_next
->fr_address
- frag
->fr_address
);
3322 #endif /* I386COFF */
3324 #endif /* BFD_ASSEMBLER? */
3326 /* end of tc-i386.c */